Re: [PATCH v5 1/7] clk: msm8996-gcc: Mark halt check as no-op for USB/PCIE pipe_clk

From: kbuild test robot <lkp@intel.com>
Cc: kbuild-all@01.org, Kishon Vijay Abraham I <kishon@ti.com>,
	robh@kernel.org, sboyd@kernel.org, devicetree@vger.kernel.org,
	linux-kernel@vger.kernel.org, dianders@chromium.org,
	evgreen@chromium.org, Vivek Gautam <vivek.gautam@codeaurora.org>,
	linux-arm-msm@vger.kernel.org, linux-usb@vger.kernel.org,
	Manu Gautam <mgautam@codeaurora.org>
Subject: Re: [PATCH v5 1/7] clk: msm8996-gcc: Mark halt check as no-op for USB/PCIE pipe_clk
Date: Thu, 3 May 2018 18:41:12 +0800	[thread overview]
Message-ID: <201805031813.n6Bb4tCJ%fengguang.wu@intel.com> (raw)
In-Reply-To: <1525295174-15995-2-git-send-email-mgautam@codeaurora.org>

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Hi Manu,

Thank you for the patch! Yet something to improve:

[auto build test ERROR on phy/next]
[also build test ERROR on v4.17-rc3 next-20180503]
[if your patch is applied to the wrong git tree, please drop us a note to help improve the system]

url:    https://github.com/0day-ci/linux/commits/Manu-Gautam/phy-qcom-Updates-for-USB-PHYs-on-SDM845/20180503-163006
base:   https://git.kernel.org/pub/scm/linux/kernel/git/kishon/linux-phy.git next
config: x86_64-allyesconfig (attached as .config)
compiler: gcc-7 (Debian 7.3.0-16) 7.3.0
reproduce:
        # save the attached .config to linux build tree
        make ARCH=x86_64 

All errors (new ones prefixed by >>):

>> drivers/clk//qcom/gcc-msm8996.c:1421:16: error: 'BRANCH_HALT_SKIP' undeclared here (not in a function); did you mean 'BRANCH_HALT_VOTED'?
     .halt_check = BRANCH_HALT_SKIP,
                   ^~~~~~~~~~~~~~~~
                   BRANCH_HALT_VOTED

vim +1421 drivers/clk//qcom/gcc-msm8996.c

  1418	
  1419	static struct clk_branch gcc_usb3_phy_pipe_clk = {
  1420		.halt_reg = 0x50004,
> 1421		.halt_check = BRANCH_HALT_SKIP,
  1422		.clkr = {
  1423			.enable_reg = 0x50004,
  1424			.enable_mask = BIT(0),
  1425			.hw.init = &(struct clk_init_data){
  1426				.name = "gcc_usb3_phy_pipe_clk",
  1427				.parent_names = (const char *[]){ "usb3_phy_pipe_clk_src" },
  1428				.num_parents = 1,
  1429				.flags = CLK_SET_RATE_PARENT,
  1430				.ops = &clk_branch2_ops,
  1431			},
  1432		},
  1433	};
  1434	

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