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From: Doug Anderson <dianders@chromium.org>
To: Manu Gautam <mgautam@codeaurora.org>
Cc: Kishon Vijay Abraham I <kishon@ti.com>,
	Rob Herring <robh@kernel.org>, Stephen Boyd <sboyd@kernel.org>,
	devicetree@vger.kernel.org, LKML <linux-kernel@vger.kernel.org>,
	Evan Green <evgreen@chromium.org>,
	Vivek Gautam <vivek.gautam@codeaurora.org>,
	linux-arm-msm@vger.kernel.org, linux-usb@vger.kernel.org
Subject: Re: [PATCH v5 1/7] clk: msm8996-gcc: Mark halt check as no-op for USB/PCIE pipe_clk
Date: Fri, 4 May 2018 12:46:51 -0700	[thread overview]
Message-ID: <CAD=FV=WNa=k__pymaTWEGtHn+QaHW7ezPb+ZsO4Z9UtLKYQQSg@mail.gmail.com> (raw)
In-Reply-To: <1525295174-15995-2-git-send-email-mgautam@codeaurora.org>

Hi,

On Wed, May 2, 2018 at 2:06 PM, Manu Gautam <mgautam@codeaurora.org> wrote:
> The USB and PCIE pipe clocks are sourced from external clocks
> inside the QMP USB/PCIE PHYs. Enabling or disabling of PIPE RCG
> clocks is dependent on PHY initialization sequence hence
> update halt_check to BRANCH_HALT_SKIP for these clocks so
> that clock status bit is not polled when enabling or disabling
> the clocks. It allows to simplify PHY client driver code which
> is both user and source of the pipe_clk and avoid error logging
> related status check on clk_disable/enable.
>
> Signed-off-by: Manu Gautam <mgautam@codeaurora.org>
> ---
>  drivers/clk/qcom/gcc-msm8996.c | 4 ++++
>  1 file changed, 4 insertions(+)

FWIW this matches my understanding of what Stephen and you agreed upon.  Thus:

Reviewed-by: Douglas Anderson <dianders@chromium.org>

WARNING: multiple messages have this Message-ID (diff)
From: Doug Anderson <dianders@chromium.org>
To: Manu Gautam <mgautam@codeaurora.org>
Cc: Kishon Vijay Abraham I <kishon@ti.com>,
	Rob Herring <robh@kernel.org>, Stephen Boyd <sboyd@kernel.org>,
	devicetree@vger.kernel.org, LKML <linux-kernel@vger.kernel.org>,
	Evan Green <evgreen@chromium.org>,
	Vivek Gautam <vivek.gautam@codeaurora.org>,
	linux-arm-msm@vger.kernel.org, linux-usb@vger.kernel.org
Subject: [v5,1/7] clk: msm8996-gcc: Mark halt check as no-op for USB/PCIE pipe_clk
Date: Fri, 4 May 2018 12:46:51 -0700	[thread overview]
Message-ID: <CAD=FV=WNa=k__pymaTWEGtHn+QaHW7ezPb+ZsO4Z9UtLKYQQSg@mail.gmail.com> (raw)

Hi,

On Wed, May 2, 2018 at 2:06 PM, Manu Gautam <mgautam@codeaurora.org> wrote:
> The USB and PCIE pipe clocks are sourced from external clocks
> inside the QMP USB/PCIE PHYs. Enabling or disabling of PIPE RCG
> clocks is dependent on PHY initialization sequence hence
> update halt_check to BRANCH_HALT_SKIP for these clocks so
> that clock status bit is not polled when enabling or disabling
> the clocks. It allows to simplify PHY client driver code which
> is both user and source of the pipe_clk and avoid error logging
> related status check on clk_disable/enable.
>
> Signed-off-by: Manu Gautam <mgautam@codeaurora.org>
> ---
>  drivers/clk/qcom/gcc-msm8996.c | 4 ++++
>  1 file changed, 4 insertions(+)

FWIW this matches my understanding of what Stephen and you agreed upon.  Thus:

Reviewed-by: Douglas Anderson <dianders@chromium.org>
---
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  parent reply	other threads:[~2018-05-04 19:46 UTC|newest]

Thread overview: 37+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-05-02 21:06 [PATCH v5 0/7] phy: qcom: Updates for USB PHYs on SDM845 Manu Gautam
2018-05-02 21:06 ` [PATCH v5 1/7] clk: msm8996-gcc: Mark halt check as no-op for USB/PCIE pipe_clk Manu Gautam
2018-05-02 21:06   ` [v5,1/7] " Manu Gautam
2018-05-03 10:41   ` [PATCH v5 1/7] " kbuild test robot
2018-05-03 10:41     ` [v5,1/7] " kbuild test robot
2018-05-03 10:41     ` [PATCH v5 1/7] " kbuild test robot
2018-05-04 19:46   ` Doug Anderson [this message]
2018-05-04 19:46     ` [v5,1/7] " Doug Anderson
2018-06-01 18:45   ` [PATCH v5 1/7] " Stephen Boyd
2018-06-01 18:45     ` [v5,1/7] " Stephen Boyd
2018-06-01 18:45     ` [PATCH v5 1/7] " Stephen Boyd
2018-05-02 21:06 ` [PATCH v5 2/7] phy: qcom-qmp: Enable pipe_clk before PHY initialization Manu Gautam
2018-05-02 21:06   ` [v5,2/7] " Manu Gautam
2018-05-04 19:47   ` [PATCH v5 2/7] " Doug Anderson
2018-05-04 19:47     ` [v5,2/7] " Doug Anderson
2018-05-02 21:06 ` [PATCH v5 3/7] phy: qcom-qusb2: Fix crash if nvmem cell not specified Manu Gautam
2018-05-02 21:06   ` [v5,3/7] " Manu Gautam
2018-05-02 21:06 ` [PATCH v5 4/7] dt-bindings: phy-qcom-qmp: Update bindings for sdm845 Manu Gautam
2018-05-02 21:06   ` [v5,4/7] " Manu Gautam
2018-05-07 14:08   ` [PATCH v5 4/7] " Rob Herring
2018-05-07 14:08     ` [v5,4/7] " Rob Herring
2018-05-02 21:06 ` [PATCH v5 5/7] phy: qcom-qmp: Add QMP V3 USB3 UNI PHY support " Manu Gautam
2018-05-02 21:06   ` [v5,5/7] " Manu Gautam
2018-05-02 21:06 ` [PATCH v5 6/7] dt-bindings: phy-qcom-usb2: Add support to override tuning values Manu Gautam
2018-05-02 21:06   ` [v5,6/7] " Manu Gautam
2018-05-04 19:47   ` [PATCH v5 6/7] " Doug Anderson
2018-05-04 19:47     ` [v5,6/7] " Doug Anderson
2018-05-07 15:53   ` [PATCH v5 6/7] " Rob Herring
2018-05-07 15:53     ` [v5,6/7] " Rob Herring
2018-05-07 15:57     ` [PATCH v5 6/7] " Doug Anderson
2018-05-07 15:57       ` [v5,6/7] " Doug Anderson
2018-05-07 20:40       ` [PATCH v5 6/7] " Rob Herring
2018-05-07 20:40         ` [v5,6/7] " Rob Herring
2018-05-02 21:06 ` [PATCH v5 7/7] phy: qcom-qusb2: Add QUSB2 PHYs support for sdm845 Manu Gautam
2018-05-02 21:06   ` [v5,7/7] " Manu Gautam
2018-05-04 19:47   ` [PATCH v5 7/7] " Doug Anderson
2018-05-04 19:47     ` [v5,7/7] " Doug Anderson

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