* [PATCH v5 00/22] sh: LANDISK and R2Dplus convert to device tree
@ 2016-07-03 16:46 ` Yoshinori Sato
0 siblings, 0 replies; 138+ messages in thread
From: Yoshinori Sato @ 2016-07-03 16:46 UTC (permalink / raw)
To: linux-sh, linux-kernel; +Cc: Yoshinori Sato
SH get devicetree support. But it not working on existing H/W.
IO-DATA HDL-U (aka landisk) currentry supported.
This H/W like SH7751 evalution board. It's a best to use this as a
change base H/W.
RTS7751R2Dplus is QEMU-SH4 target. So easy trying.
Changes V5
- added "#address-cells" before interrupt-map
- remove interrupt-controller of landisk.dts and r2dplus.dts
- Add ".suppress_bind_attrs" to pci driver.
- some cleanup.
Changes V4
- split board depend patch.
- dts cleanup.
Changes V3
- PCI driver update for v4.7.
- New Clock driver. Unified PLL/Divider.
- R2Dplus support.
- Split DTS.
- Some cleanup.
Changes V2
- split DeviceTree suppoty update.
- PCI driver update.
- Some cleanup.
Yoshinori Sato (22):
sh: Add sh-specific early_init_dt_reserve_memory_arch
sh: More early unflatten device tree
sh: set preset_lpj
sh: Use P1SEGADDR
sh: command line passing chosen/bootargs in devicetree
sh: FDT address save before bank change
sh: Passing FDT address on zImage
sh: Disable board specific code on device tree mode
sh: Use GENERIC_IOMAP on device tree mode
sh: Add board specific initialize of of-generic
sh: SH7750/51 CPG Driver
sh: Add PCI host bridge driver for SH7751
sh: irqchip: SH7751 IRQCHIP Driver
sh: SH7751 core dtsi
sh: Move common PCI stuff to arch/sh/kernel
pci: pci_config_window move to linux/pci.h
pci: PCI_HOST_GENERIC enable for SH
sh: Add separate DTB build rule
sh: IO-DATA HDL-U (a,k.a landisk) IRQCHIP driver
sh: IO-DATA HDL-U (a,k.a landisk) DeviceTree
sh: Renesas RTS7751R2Dplus (a,k.a R2Dplus) IRQCHIP Driver
sh: Renesas RTS7751R2Dplus (a,k.a R2Dplus) DeviceTree
.../bindings/clock/renesas,sh7750-cpg.txt | 25 ++
.../interrupt-controller/iodata-landisk.txt | 31 ++
.../interrupt-controller/renesas,sh7751-intc.txt | 25 ++
.../interrupt-controller/renesas-r2dplus.txt | 38 +++
.../devicetree/bindings/pci/sh7751-pci.txt | 37 +++
arch/sh/Kconfig | 6 +-
arch/sh/Makefile | 9 +
arch/sh/boards/Kconfig | 4 +
arch/sh/boards/of-generic.c | 88 +++++-
arch/sh/boot/compressed/head_32.S | 5 +-
arch/sh/boot/dts/Makefile | 5 +
arch/sh/boot/dts/include/dt-bindings | 1 +
arch/sh/boot/dts/landisk.dts | 61 ++++
arch/sh/boot/dts/r2dplus.dts | 85 +++++
arch/sh/boot/dts/sh7751.dtsi | 83 +++++
arch/sh/drivers/Makefile | 2 +
arch/sh/drivers/pci/Makefile | 2 -
arch/sh/drivers/pci/common.c | 162 ----------
arch/sh/drivers/pci/pci.c | 320 -------------------
arch/sh/include/asm/io.h | 6 +
arch/sh/kernel/Makefile | 2 +
arch/sh/kernel/cpu/Makefile | 8 +-
arch/sh/kernel/cpu/clock.c | 6 +-
arch/sh/kernel/cpu/sh4/Makefile | 2 +
arch/sh/kernel/head_32.S | 7 +-
arch/sh/kernel/pci-common.c | 162 ++++++++++
arch/sh/kernel/pci.c | 342 ++++++++++++++++++++
arch/sh/kernel/setup.c | 15 +-
drivers/clk/Kconfig | 1 +
drivers/clk/Makefile | 3 +-
drivers/clk/sh/Kconfig | 2 +
drivers/clk/sh/Makefile | 1 +
drivers/clk/sh/clk-sh7750cpg.c | 344 +++++++++++++++++++++
drivers/irqchip/Kconfig | 5 +
drivers/irqchip/Makefile | 1 +
drivers/irqchip/irq-io-landisk.c | 72 +++++
drivers/irqchip/irq-renesas-r2dplus.c | 88 ++++++
drivers/irqchip/irq-renesas-sh7751.c | 141 +++++++++
drivers/pci/ecam.h | 17 +-
drivers/pci/host/Kconfig | 9 +-
drivers/pci/host/Makefile | 1 +
drivers/pci/host/pci-sh7751.c | 326 +++++++++++++++++++
include/dt-bindings/clock/renesas-sh7750.h | 26 ++
include/dt-bindings/interrupt-controller/sh_intc.h | 2 +
include/linux/pci.h | 18 ++
45 files changed, 2075 insertions(+), 521 deletions(-)
create mode 100644 Documentation/devicetree/bindings/clock/renesas,sh7750-cpg.txt
create mode 100644 Documentation/devicetree/bindings/interrupt-controller/iodata-landisk.txt
create mode 100644 Documentation/devicetree/bindings/interrupt-controller/renesas,sh7751-intc.txt
create mode 100644 Documentation/devicetree/bindings/interrupt-controller/renesas-r2dplus.txt
create mode 100644 Documentation/devicetree/bindings/pci/sh7751-pci.txt
create mode 120000 arch/sh/boot/dts/include/dt-bindings
create mode 100644 arch/sh/boot/dts/landisk.dts
create mode 100644 arch/sh/boot/dts/r2dplus.dts
create mode 100644 arch/sh/boot/dts/sh7751.dtsi
delete mode 100644 arch/sh/drivers/pci/common.c
delete mode 100644 arch/sh/drivers/pci/pci.c
create mode 100644 arch/sh/kernel/pci-common.c
create mode 100644 arch/sh/kernel/pci.c
create mode 100644 drivers/clk/sh/Kconfig
create mode 100644 drivers/clk/sh/Makefile
create mode 100644 drivers/clk/sh/clk-sh7750cpg.c
create mode 100644 drivers/irqchip/irq-io-landisk.c
create mode 100644 drivers/irqchip/irq-renesas-r2dplus.c
create mode 100644 drivers/irqchip/irq-renesas-sh7751.c
create mode 100644 drivers/pci/host/pci-sh7751.c
create mode 100644 include/dt-bindings/clock/renesas-sh7750.h
create mode 100644 include/dt-bindings/interrupt-controller/sh_intc.h
--
2.7.0
^ permalink raw reply [flat|nested] 138+ messages in thread
* [PATCH v5 01/22] sh: Add sh-specific early_init_dt_reserve_memory_arch
2016-07-03 16:46 ` Yoshinori Sato
@ 2016-07-03 16:46 ` Yoshinori Sato
-1 siblings, 0 replies; 138+ messages in thread
From: Yoshinori Sato @ 2016-07-03 16:46 UTC (permalink / raw)
To: linux-sh, linux-kernel; +Cc: Yoshinori Sato
sh used P1 address space in early device tree.
So need convert P1 to physical address before reserve memory.
Signed-off-by: Yoshinori Sato <ysato@users.sourceforge.jp>
---
arch/sh/boards/of-generic.c | 12 ++++++++++++
1 file changed, 12 insertions(+)
diff --git a/arch/sh/boards/of-generic.c b/arch/sh/boards/of-generic.c
index 57d45dc..8dbf978 100644
--- a/arch/sh/boards/of-generic.c
+++ b/arch/sh/boards/of-generic.c
@@ -15,6 +15,7 @@
#include <linux/clocksource.h>
#include <linux/irqchip.h>
#include <linux/clk-provider.h>
+#include <linux/memblock.h>
#include <asm/machvec.h>
#include <asm/rtc.h>
@@ -203,3 +204,14 @@ static int __init sh_of_device_init(void)
return 0;
}
arch_initcall_sync(sh_of_device_init);
+
+int __init early_init_dt_reserve_memory_arch(phys_addr_t base,
+ phys_addr_t size, bool nomap)
+{
+ if (nomap)
+ return memblock_remove(base, size);
+
+ if (base >= P1SEG)
+ base &= ~P1SEG;
+ return memblock_reserve(base, size);
+}
--
2.7.0
^ permalink raw reply related [flat|nested] 138+ messages in thread* [PATCH v5 01/22] sh: Add sh-specific early_init_dt_reserve_memory_arch
@ 2016-07-03 16:46 ` Yoshinori Sato
0 siblings, 0 replies; 138+ messages in thread
From: Yoshinori Sato @ 2016-07-03 16:46 UTC (permalink / raw)
To: linux-sh, linux-kernel; +Cc: Yoshinori Sato
sh used P1 address space in early device tree.
So need convert P1 to physical address before reserve memory.
Signed-off-by: Yoshinori Sato <ysato@users.sourceforge.jp>
---
arch/sh/boards/of-generic.c | 12 ++++++++++++
1 file changed, 12 insertions(+)
diff --git a/arch/sh/boards/of-generic.c b/arch/sh/boards/of-generic.c
index 57d45dc..8dbf978 100644
--- a/arch/sh/boards/of-generic.c
+++ b/arch/sh/boards/of-generic.c
@@ -15,6 +15,7 @@
#include <linux/clocksource.h>
#include <linux/irqchip.h>
#include <linux/clk-provider.h>
+#include <linux/memblock.h>
#include <asm/machvec.h>
#include <asm/rtc.h>
@@ -203,3 +204,14 @@ static int __init sh_of_device_init(void)
return 0;
}
arch_initcall_sync(sh_of_device_init);
+
+int __init early_init_dt_reserve_memory_arch(phys_addr_t base,
+ phys_addr_t size, bool nomap)
+{
+ if (nomap)
+ return memblock_remove(base, size);
+
+ if (base >= P1SEG)
+ base &= ~P1SEG;
+ return memblock_reserve(base, size);
+}
--
2.7.0
^ permalink raw reply related [flat|nested] 138+ messages in thread* Re: [PATCH v5 01/22] sh: Add sh-specific early_init_dt_reserve_memory_arch
2016-07-03 16:46 ` Yoshinori Sato
@ 2016-07-04 2:03 ` Rich Felker
-1 siblings, 0 replies; 138+ messages in thread
From: Rich Felker @ 2016-07-04 2:03 UTC (permalink / raw)
To: Yoshinori Sato; +Cc: linux-sh, linux-kernel
On Mon, Jul 04, 2016 at 01:46:21AM +0900, Yoshinori Sato wrote:
> sh used P1 address space in early device tree.
> So need convert P1 to physical address before reserve memory.
>
> Signed-off-by: Yoshinori Sato <ysato@users.sourceforge.jp>
> ---
> arch/sh/boards/of-generic.c | 12 ++++++++++++
> 1 file changed, 12 insertions(+)
>
> diff --git a/arch/sh/boards/of-generic.c b/arch/sh/boards/of-generic.c
> index 57d45dc..8dbf978 100644
> --- a/arch/sh/boards/of-generic.c
> +++ b/arch/sh/boards/of-generic.c
> @@ -15,6 +15,7 @@
> #include <linux/clocksource.h>
> #include <linux/irqchip.h>
> #include <linux/clk-provider.h>
> +#include <linux/memblock.h>
> #include <asm/machvec.h>
> #include <asm/rtc.h>
>
> @@ -203,3 +204,14 @@ static int __init sh_of_device_init(void)
> return 0;
> }
> arch_initcall_sync(sh_of_device_init);
> +
> +int __init early_init_dt_reserve_memory_arch(phys_addr_t base,
> + phys_addr_t size, bool nomap)
> +{
> + if (nomap)
> + return memblock_remove(base, size);
> +
> + if (base >= P1SEG)
> + base &= ~P1SEG;
> + return memblock_reserve(base, size);
> +}
> --
I think we need a consistent form of physical memory addressing in the
DT that doesn't require this. Hard-coding details of the segmented
memory model all over the place does not look like a good idea; it's
going to badly break anything with full 32-bit which I believe some
SH-4 models had (those with PMB?) and which J3/J4 will almost
certainly have.
Rich
^ permalink raw reply [flat|nested] 138+ messages in thread* Re: [PATCH v5 01/22] sh: Add sh-specific early_init_dt_reserve_memory_arch
@ 2016-07-04 2:03 ` Rich Felker
0 siblings, 0 replies; 138+ messages in thread
From: Rich Felker @ 2016-07-04 2:03 UTC (permalink / raw)
To: Yoshinori Sato; +Cc: linux-sh, linux-kernel
On Mon, Jul 04, 2016 at 01:46:21AM +0900, Yoshinori Sato wrote:
> sh used P1 address space in early device tree.
> So need convert P1 to physical address before reserve memory.
>
> Signed-off-by: Yoshinori Sato <ysato@users.sourceforge.jp>
> ---
> arch/sh/boards/of-generic.c | 12 ++++++++++++
> 1 file changed, 12 insertions(+)
>
> diff --git a/arch/sh/boards/of-generic.c b/arch/sh/boards/of-generic.c
> index 57d45dc..8dbf978 100644
> --- a/arch/sh/boards/of-generic.c
> +++ b/arch/sh/boards/of-generic.c
> @@ -15,6 +15,7 @@
> #include <linux/clocksource.h>
> #include <linux/irqchip.h>
> #include <linux/clk-provider.h>
> +#include <linux/memblock.h>
> #include <asm/machvec.h>
> #include <asm/rtc.h>
>
> @@ -203,3 +204,14 @@ static int __init sh_of_device_init(void)
> return 0;
> }
> arch_initcall_sync(sh_of_device_init);
> +
> +int __init early_init_dt_reserve_memory_arch(phys_addr_t base,
> + phys_addr_t size, bool nomap)
> +{
> + if (nomap)
> + return memblock_remove(base, size);
> +
> + if (base >= P1SEG)
> + base &= ~P1SEG;
> + return memblock_reserve(base, size);
> +}
> --
I think we need a consistent form of physical memory addressing in the
DT that doesn't require this. Hard-coding details of the segmented
memory model all over the place does not look like a good idea; it's
going to badly break anything with full 32-bit which I believe some
SH-4 models had (those with PMB?) and which J3/J4 will almost
certainly have.
Rich
^ permalink raw reply [flat|nested] 138+ messages in thread* Re: [PATCH v5 01/22] sh: Add sh-specific early_init_dt_reserve_memory_arch
2016-07-04 2:03 ` Rich Felker
@ 2016-07-06 13:53 ` Yoshinori Sato
-1 siblings, 0 replies; 138+ messages in thread
From: Yoshinori Sato @ 2016-07-06 13:53 UTC (permalink / raw)
To: Rich Felker; +Cc: linux-sh, linux-kernel
On Mon, 04 Jul 2016 11:03:50 +0900,
Rich Felker wrote:
>
> On Mon, Jul 04, 2016 at 01:46:21AM +0900, Yoshinori Sato wrote:
> > sh used P1 address space in early device tree.
> > So need convert P1 to physical address before reserve memory.
> >
> > Signed-off-by: Yoshinori Sato <ysato@users.sourceforge.jp>
> > ---
> > arch/sh/boards/of-generic.c | 12 ++++++++++++
> > 1 file changed, 12 insertions(+)
> >
> > diff --git a/arch/sh/boards/of-generic.c b/arch/sh/boards/of-generic.c
> > index 57d45dc..8dbf978 100644
> > --- a/arch/sh/boards/of-generic.c
> > +++ b/arch/sh/boards/of-generic.c
> > @@ -15,6 +15,7 @@
> > #include <linux/clocksource.h>
> > #include <linux/irqchip.h>
> > #include <linux/clk-provider.h>
> > +#include <linux/memblock.h>
> > #include <asm/machvec.h>
> > #include <asm/rtc.h>
> >
> > @@ -203,3 +204,14 @@ static int __init sh_of_device_init(void)
> > return 0;
> > }
> > arch_initcall_sync(sh_of_device_init);
> > +
> > +int __init early_init_dt_reserve_memory_arch(phys_addr_t base,
> > + phys_addr_t size, bool nomap)
> > +{
> > + if (nomap)
> > + return memblock_remove(base, size);
> > +
> > + if (base >= P1SEG)
> > + base &= ~P1SEG;
> > + return memblock_reserve(base, size);
> > +}
> > --
>
> I think we need a consistent form of physical memory addressing in the
> DT that doesn't require this. Hard-coding details of the segmented
> memory model all over the place does not look like a good idea; it's
> going to badly break anything with full 32-bit which I believe some
> SH-4 models had (those with PMB?) and which J3/J4 will almost
> certainly have.
Even 32 bits mode are assigned to the same area now.
But lookup PMB more better.
It add "#ifdef CONFIG_29BIT".
Thanks.
> Rich
> --
> To unsubscribe from this list: send the line "unsubscribe linux-sh" in
> the body of a message to majordomo@vger.kernel.org
> More majordomo info at http://vger.kernel.org/majordomo-info.html
--
Yoshinori Sato
<ysato@users.sourceforge.jp>
^ permalink raw reply [flat|nested] 138+ messages in thread* Re: [PATCH v5 01/22] sh: Add sh-specific early_init_dt_reserve_memory_arch
@ 2016-07-06 13:53 ` Yoshinori Sato
0 siblings, 0 replies; 138+ messages in thread
From: Yoshinori Sato @ 2016-07-06 13:53 UTC (permalink / raw)
To: Rich Felker; +Cc: linux-sh, linux-kernel
On Mon, 04 Jul 2016 11:03:50 +0900,
Rich Felker wrote:
>
> On Mon, Jul 04, 2016 at 01:46:21AM +0900, Yoshinori Sato wrote:
> > sh used P1 address space in early device tree.
> > So need convert P1 to physical address before reserve memory.
> >
> > Signed-off-by: Yoshinori Sato <ysato@users.sourceforge.jp>
> > ---
> > arch/sh/boards/of-generic.c | 12 ++++++++++++
> > 1 file changed, 12 insertions(+)
> >
> > diff --git a/arch/sh/boards/of-generic.c b/arch/sh/boards/of-generic.c
> > index 57d45dc..8dbf978 100644
> > --- a/arch/sh/boards/of-generic.c
> > +++ b/arch/sh/boards/of-generic.c
> > @@ -15,6 +15,7 @@
> > #include <linux/clocksource.h>
> > #include <linux/irqchip.h>
> > #include <linux/clk-provider.h>
> > +#include <linux/memblock.h>
> > #include <asm/machvec.h>
> > #include <asm/rtc.h>
> >
> > @@ -203,3 +204,14 @@ static int __init sh_of_device_init(void)
> > return 0;
> > }
> > arch_initcall_sync(sh_of_device_init);
> > +
> > +int __init early_init_dt_reserve_memory_arch(phys_addr_t base,
> > + phys_addr_t size, bool nomap)
> > +{
> > + if (nomap)
> > + return memblock_remove(base, size);
> > +
> > + if (base >= P1SEG)
> > + base &= ~P1SEG;
> > + return memblock_reserve(base, size);
> > +}
> > --
>
> I think we need a consistent form of physical memory addressing in the
> DT that doesn't require this. Hard-coding details of the segmented
> memory model all over the place does not look like a good idea; it's
> going to badly break anything with full 32-bit which I believe some
> SH-4 models had (those with PMB?) and which J3/J4 will almost
> certainly have.
Even 32 bits mode are assigned to the same area now.
But lookup PMB more better.
It add "#ifdef CONFIG_29BIT".
Thanks.
> Rich
> --
> To unsubscribe from this list: send the line "unsubscribe linux-sh" in
> the body of a message to majordomo@vger.kernel.org
> More majordomo info at http://vger.kernel.org/majordomo-info.html
--
Yoshinori Sato
<ysato@users.sourceforge.jp>
^ permalink raw reply [flat|nested] 138+ messages in thread* Re: [PATCH v5 01/22] sh: Add sh-specific early_init_dt_reserve_memory_arch
2016-07-06 13:53 ` Yoshinori Sato
@ 2016-07-06 14:50 ` Rich Felker
-1 siblings, 0 replies; 138+ messages in thread
From: Rich Felker @ 2016-07-06 14:50 UTC (permalink / raw)
To: Yoshinori Sato; +Cc: linux-sh, linux-kernel
On Wed, Jul 06, 2016 at 10:53:23PM +0900, Yoshinori Sato wrote:
> On Mon, 04 Jul 2016 11:03:50 +0900,
> Rich Felker wrote:
> >
> > On Mon, Jul 04, 2016 at 01:46:21AM +0900, Yoshinori Sato wrote:
> > > sh used P1 address space in early device tree.
> > > So need convert P1 to physical address before reserve memory.
> > >
> > > Signed-off-by: Yoshinori Sato <ysato@users.sourceforge.jp>
> > > ---
> > > arch/sh/boards/of-generic.c | 12 ++++++++++++
> > > 1 file changed, 12 insertions(+)
> > >
> > > diff --git a/arch/sh/boards/of-generic.c b/arch/sh/boards/of-generic.c
> > > index 57d45dc..8dbf978 100644
> > > --- a/arch/sh/boards/of-generic.c
> > > +++ b/arch/sh/boards/of-generic.c
> > > @@ -15,6 +15,7 @@
> > > #include <linux/clocksource.h>
> > > #include <linux/irqchip.h>
> > > #include <linux/clk-provider.h>
> > > +#include <linux/memblock.h>
> > > #include <asm/machvec.h>
> > > #include <asm/rtc.h>
> > >
> > > @@ -203,3 +204,14 @@ static int __init sh_of_device_init(void)
> > > return 0;
> > > }
> > > arch_initcall_sync(sh_of_device_init);
> > > +
> > > +int __init early_init_dt_reserve_memory_arch(phys_addr_t base,
> > > + phys_addr_t size, bool nomap)
> > > +{
> > > + if (nomap)
> > > + return memblock_remove(base, size);
> > > +
> > > + if (base >= P1SEG)
> > > + base &= ~P1SEG;
> > > + return memblock_reserve(base, size);
> > > +}
> > > --
> >
> > I think we need a consistent form of physical memory addressing in the
> > DT that doesn't require this. Hard-coding details of the segmented
> > memory model all over the place does not look like a good idea; it's
> > going to badly break anything with full 32-bit which I believe some
> > SH-4 models had (those with PMB?) and which J3/J4 will almost
> > certainly have.
>
> Even 32 bits mode are assigned to the same area now.
> But lookup PMB more better.
>
> It add "#ifdef CONFIG_29BIT".
> Thanks.
I still don't think there should be any sh-specific code here. Can you
explain why you think it's needed with an example including real
addresses and how they'd get mapped incorrectly without this patch?
Rich
^ permalink raw reply [flat|nested] 138+ messages in thread* Re: [PATCH v5 01/22] sh: Add sh-specific early_init_dt_reserve_memory_arch
@ 2016-07-06 14:50 ` Rich Felker
0 siblings, 0 replies; 138+ messages in thread
From: Rich Felker @ 2016-07-06 14:50 UTC (permalink / raw)
To: Yoshinori Sato; +Cc: linux-sh, linux-kernel
On Wed, Jul 06, 2016 at 10:53:23PM +0900, Yoshinori Sato wrote:
> On Mon, 04 Jul 2016 11:03:50 +0900,
> Rich Felker wrote:
> >
> > On Mon, Jul 04, 2016 at 01:46:21AM +0900, Yoshinori Sato wrote:
> > > sh used P1 address space in early device tree.
> > > So need convert P1 to physical address before reserve memory.
> > >
> > > Signed-off-by: Yoshinori Sato <ysato@users.sourceforge.jp>
> > > ---
> > > arch/sh/boards/of-generic.c | 12 ++++++++++++
> > > 1 file changed, 12 insertions(+)
> > >
> > > diff --git a/arch/sh/boards/of-generic.c b/arch/sh/boards/of-generic.c
> > > index 57d45dc..8dbf978 100644
> > > --- a/arch/sh/boards/of-generic.c
> > > +++ b/arch/sh/boards/of-generic.c
> > > @@ -15,6 +15,7 @@
> > > #include <linux/clocksource.h>
> > > #include <linux/irqchip.h>
> > > #include <linux/clk-provider.h>
> > > +#include <linux/memblock.h>
> > > #include <asm/machvec.h>
> > > #include <asm/rtc.h>
> > >
> > > @@ -203,3 +204,14 @@ static int __init sh_of_device_init(void)
> > > return 0;
> > > }
> > > arch_initcall_sync(sh_of_device_init);
> > > +
> > > +int __init early_init_dt_reserve_memory_arch(phys_addr_t base,
> > > + phys_addr_t size, bool nomap)
> > > +{
> > > + if (nomap)
> > > + return memblock_remove(base, size);
> > > +
> > > + if (base >= P1SEG)
> > > + base &= ~P1SEG;
> > > + return memblock_reserve(base, size);
> > > +}
> > > --
> >
> > I think we need a consistent form of physical memory addressing in the
> > DT that doesn't require this. Hard-coding details of the segmented
> > memory model all over the place does not look like a good idea; it's
> > going to badly break anything with full 32-bit which I believe some
> > SH-4 models had (those with PMB?) and which J3/J4 will almost
> > certainly have.
>
> Even 32 bits mode are assigned to the same area now.
> But lookup PMB more better.
>
> It add "#ifdef CONFIG_29BIT".
> Thanks.
I still don't think there should be any sh-specific code here. Can you
explain why you think it's needed with an example including real
addresses and how they'd get mapped incorrectly without this patch?
Rich
^ permalink raw reply [flat|nested] 138+ messages in thread
* [PATCH v5 02/22] sh: More early unflatten device tree
2016-07-03 16:46 ` Yoshinori Sato
@ 2016-07-03 16:46 ` Yoshinori Sato
-1 siblings, 0 replies; 138+ messages in thread
From: Yoshinori Sato @ 2016-07-03 16:46 UTC (permalink / raw)
To: linux-sh, linux-kernel; +Cc: Yoshinori Sato
unflatten required MMU disabled.
Signed-off-by: Yoshinori Sato <ysato@users.sourceforge.jp>
---
arch/sh/boards/of-generic.c | 6 ------
arch/sh/kernel/setup.c | 7 +++++++
2 files changed, 7 insertions(+), 6 deletions(-)
diff --git a/arch/sh/boards/of-generic.c b/arch/sh/boards/of-generic.c
index 8dbf978..3db4294 100644
--- a/arch/sh/boards/of-generic.c
+++ b/arch/sh/boards/of-generic.c
@@ -129,12 +129,6 @@ static void __init sh_of_setup(char **cmdline_p)
{
struct device_node *root;
-#ifdef CONFIG_USE_BUILTIN_DTB
- unflatten_and_copy_device_tree();
-#else
- unflatten_device_tree();
-#endif
-
board_time_init = sh_of_time_init;
sh_mv.mv_name = "Unknown SH model";
diff --git a/arch/sh/kernel/setup.c b/arch/sh/kernel/setup.c
index 5b9eb70..86f2792 100644
--- a/arch/sh/kernel/setup.c
+++ b/arch/sh/kernel/setup.c
@@ -271,6 +271,13 @@ void __ref sh_fdt_init(phys_addr_t dt_phys)
void __init setup_arch(char **cmdline_p)
{
+#ifdef CONFIG_OF
+#ifdef CONFIG_USE_BUILTIN_DTB
+ unflatten_and_copy_device_tree();
+#else
+ unflatten_device_tree();
+#endif
+#endif
enable_mmu();
ROOT_DEV = old_decode_dev(ORIG_ROOT_DEV);
--
2.7.0
^ permalink raw reply related [flat|nested] 138+ messages in thread* [PATCH v5 02/22] sh: More early unflatten device tree
@ 2016-07-03 16:46 ` Yoshinori Sato
0 siblings, 0 replies; 138+ messages in thread
From: Yoshinori Sato @ 2016-07-03 16:46 UTC (permalink / raw)
To: linux-sh, linux-kernel; +Cc: Yoshinori Sato
unflatten required MMU disabled.
Signed-off-by: Yoshinori Sato <ysato@users.sourceforge.jp>
---
arch/sh/boards/of-generic.c | 6 ------
arch/sh/kernel/setup.c | 7 +++++++
2 files changed, 7 insertions(+), 6 deletions(-)
diff --git a/arch/sh/boards/of-generic.c b/arch/sh/boards/of-generic.c
index 8dbf978..3db4294 100644
--- a/arch/sh/boards/of-generic.c
+++ b/arch/sh/boards/of-generic.c
@@ -129,12 +129,6 @@ static void __init sh_of_setup(char **cmdline_p)
{
struct device_node *root;
-#ifdef CONFIG_USE_BUILTIN_DTB
- unflatten_and_copy_device_tree();
-#else
- unflatten_device_tree();
-#endif
-
board_time_init = sh_of_time_init;
sh_mv.mv_name = "Unknown SH model";
diff --git a/arch/sh/kernel/setup.c b/arch/sh/kernel/setup.c
index 5b9eb70..86f2792 100644
--- a/arch/sh/kernel/setup.c
+++ b/arch/sh/kernel/setup.c
@@ -271,6 +271,13 @@ void __ref sh_fdt_init(phys_addr_t dt_phys)
void __init setup_arch(char **cmdline_p)
{
+#ifdef CONFIG_OF
+#ifdef CONFIG_USE_BUILTIN_DTB
+ unflatten_and_copy_device_tree();
+#else
+ unflatten_device_tree();
+#endif
+#endif
enable_mmu();
ROOT_DEV = old_decode_dev(ORIG_ROOT_DEV);
--
2.7.0
^ permalink raw reply related [flat|nested] 138+ messages in thread
* [PATCH v5 03/22] sh: set preset_lpj
2016-07-03 16:46 ` Yoshinori Sato
@ 2016-07-03 16:46 ` Yoshinori Sato
-1 siblings, 0 replies; 138+ messages in thread
From: Yoshinori Sato @ 2016-07-03 16:46 UTC (permalink / raw)
To: linux-sh, linux-kernel; +Cc: Yoshinori Sato
Generic callibrate delay required this value.
Signed-off-by: Yoshinori Sato <ysato@users.sourceforge.jp>
---
arch/sh/boards/of-generic.c | 6 ++++++
1 file changed, 6 insertions(+)
diff --git a/arch/sh/boards/of-generic.c b/arch/sh/boards/of-generic.c
index 3db4294..2d3cda3 100644
--- a/arch/sh/boards/of-generic.c
+++ b/arch/sh/boards/of-generic.c
@@ -128,6 +128,8 @@ static void __init sh_of_time_init(void)
static void __init sh_of_setup(char **cmdline_p)
{
struct device_node *root;
+ struct device_node *cpu;
+ u32 freq;
board_time_init = sh_of_time_init;
@@ -139,6 +141,10 @@ static void __init sh_of_setup(char **cmdline_p)
}
sh_of_smp_probe();
+
+ cpu = of_find_node_by_name(NULL, "cpu");
+ if (!of_property_read_u32(cpu, "clock-frequency", &freq))
+ preset_lpj = freq / CONFIG_HZ / 2;
}
static int sh_of_irq_demux(int irq)
--
2.7.0
^ permalink raw reply related [flat|nested] 138+ messages in thread* [PATCH v5 03/22] sh: set preset_lpj
@ 2016-07-03 16:46 ` Yoshinori Sato
0 siblings, 0 replies; 138+ messages in thread
From: Yoshinori Sato @ 2016-07-03 16:46 UTC (permalink / raw)
To: linux-sh, linux-kernel; +Cc: Yoshinori Sato
Generic callibrate delay required this value.
Signed-off-by: Yoshinori Sato <ysato@users.sourceforge.jp>
---
arch/sh/boards/of-generic.c | 6 ++++++
1 file changed, 6 insertions(+)
diff --git a/arch/sh/boards/of-generic.c b/arch/sh/boards/of-generic.c
index 3db4294..2d3cda3 100644
--- a/arch/sh/boards/of-generic.c
+++ b/arch/sh/boards/of-generic.c
@@ -128,6 +128,8 @@ static void __init sh_of_time_init(void)
static void __init sh_of_setup(char **cmdline_p)
{
struct device_node *root;
+ struct device_node *cpu;
+ u32 freq;
board_time_init = sh_of_time_init;
@@ -139,6 +141,10 @@ static void __init sh_of_setup(char **cmdline_p)
}
sh_of_smp_probe();
+
+ cpu = of_find_node_by_name(NULL, "cpu");
+ if (!of_property_read_u32(cpu, "clock-frequency", &freq))
+ preset_lpj = freq / CONFIG_HZ / 2;
}
static int sh_of_irq_demux(int irq)
--
2.7.0
^ permalink raw reply related [flat|nested] 138+ messages in thread
* [PATCH v5 04/22] sh: Use P1SEGADDR
2016-07-03 16:46 ` Yoshinori Sato
@ 2016-07-03 16:46 ` Yoshinori Sato
-1 siblings, 0 replies; 138+ messages in thread
From: Yoshinori Sato @ 2016-07-03 16:46 UTC (permalink / raw)
To: linux-sh, linux-kernel; +Cc: Yoshinori Sato
FDT address is P1SEG. So not virtual address.
Signed-off-by: Yoshinori Sato <ysato@users.sourceforge.jp>
---
arch/sh/kernel/setup.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/sh/kernel/setup.c b/arch/sh/kernel/setup.c
index 86f2792..8e3b099 100644
--- a/arch/sh/kernel/setup.c
+++ b/arch/sh/kernel/setup.c
@@ -254,7 +254,7 @@ void __ref sh_fdt_init(phys_addr_t dt_phys)
#ifdef CONFIG_USE_BUILTIN_DTB
dt_virt = __dtb_start;
#else
- dt_virt = phys_to_virt(dt_phys);
+ dt_virt = (void *)P1SEGADDR(dt_phys);
#endif
if (!dt_virt || !early_init_dt_scan(dt_virt)) {
--
2.7.0
^ permalink raw reply related [flat|nested] 138+ messages in thread* [PATCH v5 04/22] sh: Use P1SEGADDR
@ 2016-07-03 16:46 ` Yoshinori Sato
0 siblings, 0 replies; 138+ messages in thread
From: Yoshinori Sato @ 2016-07-03 16:46 UTC (permalink / raw)
To: linux-sh, linux-kernel; +Cc: Yoshinori Sato
FDT address is P1SEG. So not virtual address.
Signed-off-by: Yoshinori Sato <ysato@users.sourceforge.jp>
---
arch/sh/kernel/setup.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/sh/kernel/setup.c b/arch/sh/kernel/setup.c
index 86f2792..8e3b099 100644
--- a/arch/sh/kernel/setup.c
+++ b/arch/sh/kernel/setup.c
@@ -254,7 +254,7 @@ void __ref sh_fdt_init(phys_addr_t dt_phys)
#ifdef CONFIG_USE_BUILTIN_DTB
dt_virt = __dtb_start;
#else
- dt_virt = phys_to_virt(dt_phys);
+ dt_virt = (void *)P1SEGADDR(dt_phys);
#endif
if (!dt_virt || !early_init_dt_scan(dt_virt)) {
--
2.7.0
^ permalink raw reply related [flat|nested] 138+ messages in thread* Re: [PATCH v5 04/22] sh: Use P1SEGADDR
2016-07-03 16:46 ` Yoshinori Sato
@ 2016-07-04 1:48 ` Rich Felker
-1 siblings, 0 replies; 138+ messages in thread
From: Rich Felker @ 2016-07-04 1:48 UTC (permalink / raw)
To: Yoshinori Sato; +Cc: linux-sh, linux-kernel
On Mon, Jul 04, 2016 at 01:46:24AM +0900, Yoshinori Sato wrote:
> FDT address is P1SEG. So not virtual address.
>
> Signed-off-by: Yoshinori Sato <ysato@users.sourceforge.jp>
> ---
> arch/sh/kernel/setup.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/arch/sh/kernel/setup.c b/arch/sh/kernel/setup.c
> index 86f2792..8e3b099 100644
> --- a/arch/sh/kernel/setup.c
> +++ b/arch/sh/kernel/setup.c
> @@ -254,7 +254,7 @@ void __ref sh_fdt_init(phys_addr_t dt_phys)
> #ifdef CONFIG_USE_BUILTIN_DTB
> dt_virt = __dtb_start;
> #else
> - dt_virt = phys_to_virt(dt_phys);
> + dt_virt = (void *)P1SEGADDR(dt_phys);
> #endif
>
> if (!dt_virt || !early_init_dt_scan(dt_virt)) {
> --
I don't think this change is correct, and I'm not sure what the
motivation is. It certainly can't work with !CONFIG_29BIT, and likely
can't work on nommu either (it won't work on J2). Maybe we have
different ideas about the sort of physical address the boot loader is
expected to pass; I would expect it to be something that, when passed
to phys_to_virt, yields an address the kernel can use to access the
memory. This does not necessarily mean it's MMU-mapped memory; it
could be (and in practice will be, I think) an address in the P1
segment obtained by adding PAGE_OFFSET (see asm/page.h).
Rich
^ permalink raw reply [flat|nested] 138+ messages in thread* Re: [PATCH v5 04/22] sh: Use P1SEGADDR
@ 2016-07-04 1:48 ` Rich Felker
0 siblings, 0 replies; 138+ messages in thread
From: Rich Felker @ 2016-07-04 1:48 UTC (permalink / raw)
To: Yoshinori Sato; +Cc: linux-sh, linux-kernel
On Mon, Jul 04, 2016 at 01:46:24AM +0900, Yoshinori Sato wrote:
> FDT address is P1SEG. So not virtual address.
>
> Signed-off-by: Yoshinori Sato <ysato@users.sourceforge.jp>
> ---
> arch/sh/kernel/setup.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/arch/sh/kernel/setup.c b/arch/sh/kernel/setup.c
> index 86f2792..8e3b099 100644
> --- a/arch/sh/kernel/setup.c
> +++ b/arch/sh/kernel/setup.c
> @@ -254,7 +254,7 @@ void __ref sh_fdt_init(phys_addr_t dt_phys)
> #ifdef CONFIG_USE_BUILTIN_DTB
> dt_virt = __dtb_start;
> #else
> - dt_virt = phys_to_virt(dt_phys);
> + dt_virt = (void *)P1SEGADDR(dt_phys);
> #endif
>
> if (!dt_virt || !early_init_dt_scan(dt_virt)) {
> --
I don't think this change is correct, and I'm not sure what the
motivation is. It certainly can't work with !CONFIG_29BIT, and likely
can't work on nommu either (it won't work on J2). Maybe we have
different ideas about the sort of physical address the boot loader is
expected to pass; I would expect it to be something that, when passed
to phys_to_virt, yields an address the kernel can use to access the
memory. This does not necessarily mean it's MMU-mapped memory; it
could be (and in practice will be, I think) an address in the P1
segment obtained by adding PAGE_OFFSET (see asm/page.h).
Rich
^ permalink raw reply [flat|nested] 138+ messages in thread* Re: [PATCH v5 04/22] sh: Use P1SEGADDR
2016-07-04 1:48 ` Rich Felker
@ 2016-07-06 14:11 ` Yoshinori Sato
-1 siblings, 0 replies; 138+ messages in thread
From: Yoshinori Sato @ 2016-07-06 14:11 UTC (permalink / raw)
To: Rich Felker; +Cc: linux-sh, linux-kernel
On Mon, 04 Jul 2016 10:48:52 +0900,
Rich Felker wrote:
>
> On Mon, Jul 04, 2016 at 01:46:24AM +0900, Yoshinori Sato wrote:
> > FDT address is P1SEG. So not virtual address.
> >
> > Signed-off-by: Yoshinori Sato <ysato@users.sourceforge.jp>
> > ---
> > arch/sh/kernel/setup.c | 2 +-
> > 1 file changed, 1 insertion(+), 1 deletion(-)
> >
> > diff --git a/arch/sh/kernel/setup.c b/arch/sh/kernel/setup.c
> > index 86f2792..8e3b099 100644
> > --- a/arch/sh/kernel/setup.c
> > +++ b/arch/sh/kernel/setup.c
> > @@ -254,7 +254,7 @@ void __ref sh_fdt_init(phys_addr_t dt_phys)
> > #ifdef CONFIG_USE_BUILTIN_DTB
> > dt_virt = __dtb_start;
> > #else
> > - dt_virt = phys_to_virt(dt_phys);
> > + dt_virt = (void *)P1SEGADDR(dt_phys);
> > #endif
> >
> > if (!dt_virt || !early_init_dt_scan(dt_virt)) {
> > --
>
> I don't think this change is correct, and I'm not sure what the
> motivation is. It certainly can't work with !CONFIG_29BIT, and likely
> can't work on nommu either (it won't work on J2). Maybe we have
> different ideas about the sort of physical address the boot loader is
> expected to pass; I would expect it to be something that, when passed
> to phys_to_virt, yields an address the kernel can use to access the
> memory. This does not necessarily mean it's MMU-mapped memory; it
> could be (and in practice will be, I think) an address in the P1
> segment obtained by adding PAGE_OFFSET (see asm/page.h).
>
> Rich
Hmm...
It's better to pass a virtual address in bootloader.
--
Yoshinori Sato
<ysato@users.sourceforge.jp>
^ permalink raw reply [flat|nested] 138+ messages in thread* Re: [PATCH v5 04/22] sh: Use P1SEGADDR
@ 2016-07-06 14:11 ` Yoshinori Sato
0 siblings, 0 replies; 138+ messages in thread
From: Yoshinori Sato @ 2016-07-06 14:11 UTC (permalink / raw)
To: Rich Felker; +Cc: linux-sh, linux-kernel
On Mon, 04 Jul 2016 10:48:52 +0900,
Rich Felker wrote:
>
> On Mon, Jul 04, 2016 at 01:46:24AM +0900, Yoshinori Sato wrote:
> > FDT address is P1SEG. So not virtual address.
> >
> > Signed-off-by: Yoshinori Sato <ysato@users.sourceforge.jp>
> > ---
> > arch/sh/kernel/setup.c | 2 +-
> > 1 file changed, 1 insertion(+), 1 deletion(-)
> >
> > diff --git a/arch/sh/kernel/setup.c b/arch/sh/kernel/setup.c
> > index 86f2792..8e3b099 100644
> > --- a/arch/sh/kernel/setup.c
> > +++ b/arch/sh/kernel/setup.c
> > @@ -254,7 +254,7 @@ void __ref sh_fdt_init(phys_addr_t dt_phys)
> > #ifdef CONFIG_USE_BUILTIN_DTB
> > dt_virt = __dtb_start;
> > #else
> > - dt_virt = phys_to_virt(dt_phys);
> > + dt_virt = (void *)P1SEGADDR(dt_phys);
> > #endif
> >
> > if (!dt_virt || !early_init_dt_scan(dt_virt)) {
> > --
>
> I don't think this change is correct, and I'm not sure what the
> motivation is. It certainly can't work with !CONFIG_29BIT, and likely
> can't work on nommu either (it won't work on J2). Maybe we have
> different ideas about the sort of physical address the boot loader is
> expected to pass; I would expect it to be something that, when passed
> to phys_to_virt, yields an address the kernel can use to access the
> memory. This does not necessarily mean it's MMU-mapped memory; it
> could be (and in practice will be, I think) an address in the P1
> segment obtained by adding PAGE_OFFSET (see asm/page.h).
>
> Rich
Hmm...
It's better to pass a virtual address in bootloader.
--
Yoshinori Sato
<ysato@users.sourceforge.jp>
^ permalink raw reply [flat|nested] 138+ messages in thread* Re: [PATCH v5 04/22] sh: Use P1SEGADDR
2016-07-06 14:11 ` Yoshinori Sato
@ 2016-07-06 14:53 ` Rich Felker
-1 siblings, 0 replies; 138+ messages in thread
From: Rich Felker @ 2016-07-06 14:53 UTC (permalink / raw)
To: Yoshinori Sato; +Cc: linux-sh, linux-kernel
On Wed, Jul 06, 2016 at 11:11:44PM +0900, Yoshinori Sato wrote:
> On Mon, 04 Jul 2016 10:48:52 +0900,
> Rich Felker wrote:
> >
> > On Mon, Jul 04, 2016 at 01:46:24AM +0900, Yoshinori Sato wrote:
> > > FDT address is P1SEG. So not virtual address.
> > >
> > > Signed-off-by: Yoshinori Sato <ysato@users.sourceforge.jp>
> > > ---
> > > arch/sh/kernel/setup.c | 2 +-
> > > 1 file changed, 1 insertion(+), 1 deletion(-)
> > >
> > > diff --git a/arch/sh/kernel/setup.c b/arch/sh/kernel/setup.c
> > > index 86f2792..8e3b099 100644
> > > --- a/arch/sh/kernel/setup.c
> > > +++ b/arch/sh/kernel/setup.c
> > > @@ -254,7 +254,7 @@ void __ref sh_fdt_init(phys_addr_t dt_phys)
> > > #ifdef CONFIG_USE_BUILTIN_DTB
> > > dt_virt = __dtb_start;
> > > #else
> > > - dt_virt = phys_to_virt(dt_phys);
> > > + dt_virt = (void *)P1SEGADDR(dt_phys);
> > > #endif
> > >
> > > if (!dt_virt || !early_init_dt_scan(dt_virt)) {
> > > --
> >
> > I don't think this change is correct, and I'm not sure what the
> > motivation is. It certainly can't work with !CONFIG_29BIT, and likely
> > can't work on nommu either (it won't work on J2). Maybe we have
> > different ideas about the sort of physical address the boot loader is
> > expected to pass; I would expect it to be something that, when passed
> > to phys_to_virt, yields an address the kernel can use to access the
> > memory. This does not necessarily mean it's MMU-mapped memory; it
> > could be (and in practice will be, I think) an address in the P1
> > segment obtained by adding PAGE_OFFSET (see asm/page.h).
>
> Hmm...
> It's better to pass a virtual address in bootloader.
I think we're just having a miscommunication on what "physical
address" vs "virtual address" means. I wouldn't call logical addresses
in the P1 segment "virtual" because they're not remapped by the MMU.
Could you provide an example showing the type of address your
bootloader is currently passing to the kernel and why it needs to be
mapped by P1SEGADDR rather than phys_to_virt?
Rich
^ permalink raw reply [flat|nested] 138+ messages in thread* Re: [PATCH v5 04/22] sh: Use P1SEGADDR
@ 2016-07-06 14:53 ` Rich Felker
0 siblings, 0 replies; 138+ messages in thread
From: Rich Felker @ 2016-07-06 14:53 UTC (permalink / raw)
To: Yoshinori Sato; +Cc: linux-sh, linux-kernel
On Wed, Jul 06, 2016 at 11:11:44PM +0900, Yoshinori Sato wrote:
> On Mon, 04 Jul 2016 10:48:52 +0900,
> Rich Felker wrote:
> >
> > On Mon, Jul 04, 2016 at 01:46:24AM +0900, Yoshinori Sato wrote:
> > > FDT address is P1SEG. So not virtual address.
> > >
> > > Signed-off-by: Yoshinori Sato <ysato@users.sourceforge.jp>
> > > ---
> > > arch/sh/kernel/setup.c | 2 +-
> > > 1 file changed, 1 insertion(+), 1 deletion(-)
> > >
> > > diff --git a/arch/sh/kernel/setup.c b/arch/sh/kernel/setup.c
> > > index 86f2792..8e3b099 100644
> > > --- a/arch/sh/kernel/setup.c
> > > +++ b/arch/sh/kernel/setup.c
> > > @@ -254,7 +254,7 @@ void __ref sh_fdt_init(phys_addr_t dt_phys)
> > > #ifdef CONFIG_USE_BUILTIN_DTB
> > > dt_virt = __dtb_start;
> > > #else
> > > - dt_virt = phys_to_virt(dt_phys);
> > > + dt_virt = (void *)P1SEGADDR(dt_phys);
> > > #endif
> > >
> > > if (!dt_virt || !early_init_dt_scan(dt_virt)) {
> > > --
> >
> > I don't think this change is correct, and I'm not sure what the
> > motivation is. It certainly can't work with !CONFIG_29BIT, and likely
> > can't work on nommu either (it won't work on J2). Maybe we have
> > different ideas about the sort of physical address the boot loader is
> > expected to pass; I would expect it to be something that, when passed
> > to phys_to_virt, yields an address the kernel can use to access the
> > memory. This does not necessarily mean it's MMU-mapped memory; it
> > could be (and in practice will be, I think) an address in the P1
> > segment obtained by adding PAGE_OFFSET (see asm/page.h).
>
> Hmm...
> It's better to pass a virtual address in bootloader.
I think we're just having a miscommunication on what "physical
address" vs "virtual address" means. I wouldn't call logical addresses
in the P1 segment "virtual" because they're not remapped by the MMU.
Could you provide an example showing the type of address your
bootloader is currently passing to the kernel and why it needs to be
mapped by P1SEGADDR rather than phys_to_virt?
Rich
^ permalink raw reply [flat|nested] 138+ messages in thread
* [PATCH v5 05/22] sh: command line passing chosen/bootargs in devicetree
2016-07-03 16:46 ` Yoshinori Sato
@ 2016-07-03 16:46 ` Yoshinori Sato
-1 siblings, 0 replies; 138+ messages in thread
From: Yoshinori Sato @ 2016-07-03 16:46 UTC (permalink / raw)
To: linux-sh, linux-kernel; +Cc: Yoshinori Sato
Signed-off-by: Yoshinori Sato <ysato@users.sourceforge.jp>
---
arch/sh/kernel/setup.c | 6 ++++++
1 file changed, 6 insertions(+)
diff --git a/arch/sh/kernel/setup.c b/arch/sh/kernel/setup.c
index 8e3b099..bdf57e5 100644
--- a/arch/sh/kernel/setup.c
+++ b/arch/sh/kernel/setup.c
@@ -280,6 +280,7 @@ void __init setup_arch(char **cmdline_p)
#endif
enable_mmu();
+#ifndef CONFIG_OF
ROOT_DEV = old_decode_dev(ORIG_ROOT_DEV);
printk(KERN_NOTICE "Boot params:\n"
@@ -301,6 +302,7 @@ void __init setup_arch(char **cmdline_p)
if (!MOUNT_ROOT_RDONLY)
root_mountflags &= ~MS_RDONLY;
+#endif
init_mm.start_code = (unsigned long) _text;
init_mm.end_code = (unsigned long) _etext;
init_mm.end_data = (unsigned long) _edata;
@@ -323,9 +325,13 @@ void __init setup_arch(char **cmdline_p)
#endif
#endif
+#if !defined(CONFIG_OF) || defined(CONFIG_USE_BUILTIN_DTB)
/* Save unparsed command line copy for /proc/cmdline */
memcpy(boot_command_line, command_line, COMMAND_LINE_SIZE);
*cmdline_p = command_line;
+#else
+ *cmdline_p = boot_command_line;
+#endif
parse_early_param();
--
2.7.0
^ permalink raw reply related [flat|nested] 138+ messages in thread
* [PATCH v5 05/22] sh: command line passing chosen/bootargs in devicetree
@ 2016-07-03 16:46 ` Yoshinori Sato
0 siblings, 0 replies; 138+ messages in thread
From: Yoshinori Sato @ 2016-07-03 16:46 UTC (permalink / raw)
To: linux-sh, linux-kernel; +Cc: Yoshinori Sato
Signed-off-by: Yoshinori Sato <ysato@users.sourceforge.jp>
---
arch/sh/kernel/setup.c | 6 ++++++
1 file changed, 6 insertions(+)
diff --git a/arch/sh/kernel/setup.c b/arch/sh/kernel/setup.c
index 8e3b099..bdf57e5 100644
--- a/arch/sh/kernel/setup.c
+++ b/arch/sh/kernel/setup.c
@@ -280,6 +280,7 @@ void __init setup_arch(char **cmdline_p)
#endif
enable_mmu();
+#ifndef CONFIG_OF
ROOT_DEV = old_decode_dev(ORIG_ROOT_DEV);
printk(KERN_NOTICE "Boot params:\n"
@@ -301,6 +302,7 @@ void __init setup_arch(char **cmdline_p)
if (!MOUNT_ROOT_RDONLY)
root_mountflags &= ~MS_RDONLY;
+#endif
init_mm.start_code = (unsigned long) _text;
init_mm.end_code = (unsigned long) _etext;
init_mm.end_data = (unsigned long) _edata;
@@ -323,9 +325,13 @@ void __init setup_arch(char **cmdline_p)
#endif
#endif
+#if !defined(CONFIG_OF) || defined(CONFIG_USE_BUILTIN_DTB)
/* Save unparsed command line copy for /proc/cmdline */
memcpy(boot_command_line, command_line, COMMAND_LINE_SIZE);
*cmdline_p = command_line;
+#else
+ *cmdline_p = boot_command_line;
+#endif
parse_early_param();
--
2.7.0
^ permalink raw reply related [flat|nested] 138+ messages in thread
* [PATCH v5 06/22] sh: FDT address save before bank change
2016-07-03 16:46 ` Yoshinori Sato
@ 2016-07-03 16:46 ` Yoshinori Sato
-1 siblings, 0 replies; 138+ messages in thread
From: Yoshinori Sato @ 2016-07-03 16:46 UTC (permalink / raw)
To: linux-sh, linux-kernel; +Cc: Yoshinori Sato
SH3/4 have register bank of R0-R7.
Preset FDT address assigned bank depend on boot loader.
Before setting a bank because we don't depend on a boot loader, it's evacuated.
Signed-off-by: Yoshinori Sato <ysato@users.sourceforge.jp>
---
arch/sh/kernel/head_32.S | 7 +++----
1 file changed, 3 insertions(+), 4 deletions(-)
diff --git a/arch/sh/kernel/head_32.S b/arch/sh/kernel/head_32.S
index 974bc15..ef44fe8 100644
--- a/arch/sh/kernel/head_32.S
+++ b/arch/sh/kernel/head_32.S
@@ -58,6 +58,9 @@ ENTRY(empty_zero_page)
*
*/
ENTRY(_stext)
+#ifdef CONFIG_OF
+ mov r4, r12 ! Store device tree blob pointer
+#endif
! Initialize Status Register
mov.l 1f, r0 ! MD=1, RB=0, BL=0, IMASK=0xF
ldc r0, sr
@@ -67,10 +70,6 @@ ENTRY(_stext)
ldc r0, r6_bank
#endif
-#ifdef CONFIG_OF
- mov r4, r12 ! Store device tree blob pointer in r12
-#endif
-
/*
* Prefetch if possible to reduce cache miss penalty.
*
--
2.7.0
^ permalink raw reply related [flat|nested] 138+ messages in thread
* [PATCH v5 06/22] sh: FDT address save before bank change
@ 2016-07-03 16:46 ` Yoshinori Sato
0 siblings, 0 replies; 138+ messages in thread
From: Yoshinori Sato @ 2016-07-03 16:46 UTC (permalink / raw)
To: linux-sh, linux-kernel; +Cc: Yoshinori Sato
SH3/4 have register bank of R0-R7.
Preset FDT address assigned bank depend on boot loader.
Before setting a bank because we don't depend on a boot loader, it's evacuated.
Signed-off-by: Yoshinori Sato <ysato@users.sourceforge.jp>
---
arch/sh/kernel/head_32.S | 7 +++----
1 file changed, 3 insertions(+), 4 deletions(-)
diff --git a/arch/sh/kernel/head_32.S b/arch/sh/kernel/head_32.S
index 974bc15..ef44fe8 100644
--- a/arch/sh/kernel/head_32.S
+++ b/arch/sh/kernel/head_32.S
@@ -58,6 +58,9 @@ ENTRY(empty_zero_page)
*
*/
ENTRY(_stext)
+#ifdef CONFIG_OF
+ mov r4, r12 ! Store device tree blob pointer
+#endif
! Initialize Status Register
mov.l 1f, r0 ! MD=1, RB=0, BL=0, IMASK=0xF
ldc r0, sr
@@ -67,10 +70,6 @@ ENTRY(_stext)
ldc r0, r6_bank
#endif
-#ifdef CONFIG_OF
- mov r4, r12 ! Store device tree blob pointer in r12
-#endif
-
/*
* Prefetch if possible to reduce cache miss penalty.
*
--
2.7.0
^ permalink raw reply related [flat|nested] 138+ messages in thread
* [PATCH v5 07/22] sh: Passing FDT address on zImage
2016-07-03 16:46 ` Yoshinori Sato
@ 2016-07-03 16:46 ` Yoshinori Sato
-1 siblings, 0 replies; 138+ messages in thread
From: Yoshinori Sato @ 2016-07-03 16:46 UTC (permalink / raw)
To: linux-sh, linux-kernel; +Cc: Yoshinori Sato
Signed-off-by: Yoshinori Sato <ysato@users.sourceforge.jp>
---
arch/sh/boot/compressed/head_32.S | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/arch/sh/boot/compressed/head_32.S b/arch/sh/boot/compressed/head_32.S
index 3e15032..a980c48 100644
--- a/arch/sh/boot/compressed/head_32.S
+++ b/arch/sh/boot/compressed/head_32.S
@@ -11,10 +11,11 @@
.global startup
startup:
+ /* Save FDT address */
+ mov r4, r13
/* Load initial status register */
mov.l init_sr, r1
ldc r1, sr
-
/* Move myself to proper location if necessary */
mova 1f, r0
mov.l 1f, r2
@@ -83,7 +84,7 @@ l1:
/* Jump to the start of the decompressed kernel */
mov.l kernel_start_addr, r0
jmp @r0
- nop
+ mov r13,r4
.align 2
bss_start_addr:
--
2.7.0
^ permalink raw reply related [flat|nested] 138+ messages in thread
* [PATCH v5 07/22] sh: Passing FDT address on zImage
@ 2016-07-03 16:46 ` Yoshinori Sato
0 siblings, 0 replies; 138+ messages in thread
From: Yoshinori Sato @ 2016-07-03 16:46 UTC (permalink / raw)
To: linux-sh, linux-kernel; +Cc: Yoshinori Sato
Signed-off-by: Yoshinori Sato <ysato@users.sourceforge.jp>
---
arch/sh/boot/compressed/head_32.S | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/arch/sh/boot/compressed/head_32.S b/arch/sh/boot/compressed/head_32.S
index 3e15032..a980c48 100644
--- a/arch/sh/boot/compressed/head_32.S
+++ b/arch/sh/boot/compressed/head_32.S
@@ -11,10 +11,11 @@
.global startup
startup:
+ /* Save FDT address */
+ mov r4, r13
/* Load initial status register */
mov.l init_sr, r1
ldc r1, sr
-
/* Move myself to proper location if necessary */
mova 1f, r0
mov.l 1f, r2
@@ -83,7 +84,7 @@ l1:
/* Jump to the start of the decompressed kernel */
mov.l kernel_start_addr, r0
jmp @r0
- nop
+ mov r13,r4
.align 2
bss_start_addr:
--
2.7.0
^ permalink raw reply related [flat|nested] 138+ messages in thread
* [PATCH v5 08/22] sh: Disable board specific code on device tree mode
2016-07-03 16:46 ` Yoshinori Sato
@ 2016-07-03 16:46 ` Yoshinori Sato
-1 siblings, 0 replies; 138+ messages in thread
From: Yoshinori Sato @ 2016-07-03 16:46 UTC (permalink / raw)
To: linux-sh, linux-kernel; +Cc: Yoshinori Sato
Signed-off-by: Yoshinori Sato <ysato@users.sourceforge.jp>
---
arch/sh/Makefile | 2 ++
arch/sh/kernel/cpu/sh4/Makefile | 2 ++
2 files changed, 4 insertions(+)
diff --git a/arch/sh/Makefile b/arch/sh/Makefile
index 3b2c8b4..8adffa8 100644
--- a/arch/sh/Makefile
+++ b/arch/sh/Makefile
@@ -132,6 +132,7 @@ core-$(CONFIG_SH_FPU_EMU) += arch/sh/math-emu/
core-$(CONFIG_USE_BUILTIN_DTB) += arch/sh/boot/dts/
+ifneq ($(CONFIG_SH_DEVICE_TREE),y)
# Mach groups
machdir-$(CONFIG_SOLUTION_ENGINE) += mach-se
machdir-$(CONFIG_SH_HP6XX) += mach-hp6xx
@@ -152,6 +153,7 @@ machdir-$(CONFIG_SH_LANDISK) += mach-landisk
machdir-$(CONFIG_SH_LBOX_RE2) += mach-lboxre2
machdir-$(CONFIG_SH_CAYMAN) += mach-cayman
machdir-$(CONFIG_SH_RSK) += mach-rsk
+endif
ifneq ($(machdir-y),)
core-y += $(addprefix arch/sh/boards/, \
diff --git a/arch/sh/kernel/cpu/sh4/Makefile b/arch/sh/kernel/cpu/sh4/Makefile
index 3a1dbc7..b822c0c 100644
--- a/arch/sh/kernel/cpu/sh4/Makefile
+++ b/arch/sh/kernel/cpu/sh4/Makefile
@@ -14,6 +14,7 @@ perf-$(CONFIG_CPU_SUBTYPE_SH7750) := perf_event.o
perf-$(CONFIG_CPU_SUBTYPE_SH7750S) := perf_event.o
perf-$(CONFIG_CPU_SUBTYPE_SH7091) := perf_event.o
+ifndef CONFIG_OF
# CPU subtype setup
obj-$(CONFIG_CPU_SUBTYPE_SH7750) += setup-sh7750.o
obj-$(CONFIG_CPU_SUBTYPE_SH7750R) += setup-sh7750.o
@@ -31,6 +32,7 @@ endif
# Additional clocks by subtype
clock-$(CONFIG_CPU_SUBTYPE_SH4_202) += clock-sh4-202.o
+endif
obj-y += $(clock-y)
obj-$(CONFIG_PERF_EVENTS) += $(perf-y)
--
2.7.0
^ permalink raw reply related [flat|nested] 138+ messages in thread
* [PATCH v5 08/22] sh: Disable board specific code on device tree mode
@ 2016-07-03 16:46 ` Yoshinori Sato
0 siblings, 0 replies; 138+ messages in thread
From: Yoshinori Sato @ 2016-07-03 16:46 UTC (permalink / raw)
To: linux-sh, linux-kernel; +Cc: Yoshinori Sato
Signed-off-by: Yoshinori Sato <ysato@users.sourceforge.jp>
---
arch/sh/Makefile | 2 ++
arch/sh/kernel/cpu/sh4/Makefile | 2 ++
2 files changed, 4 insertions(+)
diff --git a/arch/sh/Makefile b/arch/sh/Makefile
index 3b2c8b4..8adffa8 100644
--- a/arch/sh/Makefile
+++ b/arch/sh/Makefile
@@ -132,6 +132,7 @@ core-$(CONFIG_SH_FPU_EMU) += arch/sh/math-emu/
core-$(CONFIG_USE_BUILTIN_DTB) += arch/sh/boot/dts/
+ifneq ($(CONFIG_SH_DEVICE_TREE),y)
# Mach groups
machdir-$(CONFIG_SOLUTION_ENGINE) += mach-se
machdir-$(CONFIG_SH_HP6XX) += mach-hp6xx
@@ -152,6 +153,7 @@ machdir-$(CONFIG_SH_LANDISK) += mach-landisk
machdir-$(CONFIG_SH_LBOX_RE2) += mach-lboxre2
machdir-$(CONFIG_SH_CAYMAN) += mach-cayman
machdir-$(CONFIG_SH_RSK) += mach-rsk
+endif
ifneq ($(machdir-y),)
core-y += $(addprefix arch/sh/boards/, \
diff --git a/arch/sh/kernel/cpu/sh4/Makefile b/arch/sh/kernel/cpu/sh4/Makefile
index 3a1dbc7..b822c0c 100644
--- a/arch/sh/kernel/cpu/sh4/Makefile
+++ b/arch/sh/kernel/cpu/sh4/Makefile
@@ -14,6 +14,7 @@ perf-$(CONFIG_CPU_SUBTYPE_SH7750) := perf_event.o
perf-$(CONFIG_CPU_SUBTYPE_SH7750S) := perf_event.o
perf-$(CONFIG_CPU_SUBTYPE_SH7091) := perf_event.o
+ifndef CONFIG_OF
# CPU subtype setup
obj-$(CONFIG_CPU_SUBTYPE_SH7750) += setup-sh7750.o
obj-$(CONFIG_CPU_SUBTYPE_SH7750R) += setup-sh7750.o
@@ -31,6 +32,7 @@ endif
# Additional clocks by subtype
clock-$(CONFIG_CPU_SUBTYPE_SH4_202) += clock-sh4-202.o
+endif
obj-y += $(clock-y)
obj-$(CONFIG_PERF_EVENTS) += $(perf-y)
--
2.7.0
^ permalink raw reply related [flat|nested] 138+ messages in thread
* [PATCH v5 09/22] sh: Use GENERIC_IOMAP on device tree mode
2016-07-03 16:46 ` Yoshinori Sato
@ 2016-07-03 16:46 ` Yoshinori Sato
-1 siblings, 0 replies; 138+ messages in thread
From: Yoshinori Sato @ 2016-07-03 16:46 UTC (permalink / raw)
To: linux-sh, linux-kernel; +Cc: Yoshinori Sato
Signed-off-by: Yoshinori Sato <ysato@users.sourceforge.jp>
---
arch/sh/boards/Kconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/sh/boards/Kconfig b/arch/sh/boards/Kconfig
index 5e52d53..9e4ccd0 100644
--- a/arch/sh/boards/Kconfig
+++ b/arch/sh/boards/Kconfig
@@ -12,6 +12,7 @@ config SH_DEVICE_TREE
select OF_EARLY_FLATTREE
select CLKSRC_OF
select GENERIC_CALIBRATE_DELAY
+ select GENERIC_IOMAP
help
Select Board Described by Device Tree to build a kernel that
does not hard-code any board-specific knowledge but instead uses
--
2.7.0
^ permalink raw reply related [flat|nested] 138+ messages in thread
* [PATCH v5 09/22] sh: Use GENERIC_IOMAP on device tree mode
@ 2016-07-03 16:46 ` Yoshinori Sato
0 siblings, 0 replies; 138+ messages in thread
From: Yoshinori Sato @ 2016-07-03 16:46 UTC (permalink / raw)
To: linux-sh, linux-kernel; +Cc: Yoshinori Sato
Signed-off-by: Yoshinori Sato <ysato@users.sourceforge.jp>
---
arch/sh/boards/Kconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/sh/boards/Kconfig b/arch/sh/boards/Kconfig
index 5e52d53..9e4ccd0 100644
--- a/arch/sh/boards/Kconfig
+++ b/arch/sh/boards/Kconfig
@@ -12,6 +12,7 @@ config SH_DEVICE_TREE
select OF_EARLY_FLATTREE
select CLKSRC_OF
select GENERIC_CALIBRATE_DELAY
+ select GENERIC_IOMAP
help
Select Board Described by Device Tree to build a kernel that
does not hard-code any board-specific knowledge but instead uses
--
2.7.0
^ permalink raw reply related [flat|nested] 138+ messages in thread
* [PATCH v5 10/22] sh: Add board specific initialize of of-generic
2016-07-03 16:46 ` Yoshinori Sato
@ 2016-07-03 16:46 ` Yoshinori Sato
-1 siblings, 0 replies; 138+ messages in thread
From: Yoshinori Sato @ 2016-07-03 16:46 UTC (permalink / raw)
To: linux-sh, linux-kernel; +Cc: Yoshinori Sato
Signed-off-by: Yoshinori Sato <ysato@users.sourceforge.jp>
---
arch/sh/boards/of-generic.c | 64 +++++++++++++++++++++++++++++++++++++++++++++
1 file changed, 64 insertions(+)
diff --git a/arch/sh/boards/of-generic.c b/arch/sh/boards/of-generic.c
index 2d3cda3..4038682 100644
--- a/arch/sh/boards/of-generic.c
+++ b/arch/sh/boards/of-generic.c
@@ -16,9 +16,15 @@
#include <linux/irqchip.h>
#include <linux/clk-provider.h>
#include <linux/memblock.h>
+#include <linux/sm501-regs.h>
#include <asm/machvec.h>
#include <asm/rtc.h>
+struct model_setup {
+ char *name;
+ void (*fn)(void);
+};
+
#ifdef CONFIG_SMP
static void dummy_smp_setup(void)
@@ -125,10 +131,61 @@ static void __init sh_of_time_init(void)
clocksource_probe();
}
+#define PA_LED 0xb0000001 /* LED Control Register */
+#define PA_SHUTDOWN 0xb0000003 /* Shutdown Control Register */
+static void landisk_power_off(void)
+{
+ __raw_writeb(0x01, PA_SHUTDOWN);
+}
+
+static void __init landisk_setup(void)
+{
+ /* LED ON */
+ __raw_writeb(__raw_readb(PA_LED) | 0x03, PA_LED);
+ pm_power_off = landisk_power_off;
+}
+
+#define PA_POWOFF 0xa4000030 /* Board Power OFF control */
+#define PA_OUTPORT 0xa4000036 /* LED control */
+static void rts7751r2d_power_off(void)
+{
+ __raw_writew(0x0001, PA_POWOFF);
+}
+
+static void __init r2dplus_setup(void)
+{
+ void __iomem *sm501_reg;
+
+ __raw_writew(0x0000, PA_OUTPORT);
+ pm_power_off = rts7751r2d_power_off;
+
+ /* sm501 dram configuration:
+ * ColSizeX = 11 - External Memory Column Size: 256 words.
+ * APX = 1 - External Memory Active to Pre-Charge Delay: 7 clocks.
+ * RstX = 1 - External Memory Reset: Normal.
+ * Rfsh = 1 - Local Memory Refresh to Command Delay: 12 clocks.
+ * BwC = 1 - Local Memory Block Write Cycle Time: 2 clocks.
+ * BwP = 1 - Local Memory Block Write to Pre-Charge Delay: 1 clock.
+ * AP = 1 - Internal Memory Active to Pre-Charge Delay: 7 clocks.
+ * Rst = 1 - Internal Memory Reset: Normal.
+ * RA = 1 - Internal Memory Remain in Active State: Do not remain.
+ */
+
+ sm501_reg = (void __iomem *)0xb3e00000 + SM501_DRAM_CONTROL;
+ writel(readl(sm501_reg) | 0x00f107c0, sm501_reg);
+}
+
+static const struct model_setup model_setup_table[] __initconst = {
+ { .name = "iodata,HDL-U", .fn = landisk_setup, },
+ { .name = "renesas,RTS7751R2D+", .fn = r2dplus_setup, },
+ {},
+};
+
static void __init sh_of_setup(char **cmdline_p)
{
struct device_node *root;
struct device_node *cpu;
+ const struct model_setup *setup;
u32 freq;
board_time_init = sh_of_time_init;
@@ -145,6 +202,13 @@ static void __init sh_of_setup(char **cmdline_p)
cpu = of_find_node_by_name(NULL, "cpu");
if (!of_property_read_u32(cpu, "clock-frequency", &freq))
preset_lpj = freq / CONFIG_HZ / 2;
+
+ for (setup = model_setup_table; setup->name; setup++) {
+ if (strcmp(setup->name, sh_mv.mv_name) = 0) {
+ setup->fn();
+ break;
+ }
+ }
}
static int sh_of_irq_demux(int irq)
--
2.7.0
^ permalink raw reply related [flat|nested] 138+ messages in thread* [PATCH v5 10/22] sh: Add board specific initialize of of-generic
@ 2016-07-03 16:46 ` Yoshinori Sato
0 siblings, 0 replies; 138+ messages in thread
From: Yoshinori Sato @ 2016-07-03 16:46 UTC (permalink / raw)
To: linux-sh, linux-kernel; +Cc: Yoshinori Sato
Signed-off-by: Yoshinori Sato <ysato@users.sourceforge.jp>
---
arch/sh/boards/of-generic.c | 64 +++++++++++++++++++++++++++++++++++++++++++++
1 file changed, 64 insertions(+)
diff --git a/arch/sh/boards/of-generic.c b/arch/sh/boards/of-generic.c
index 2d3cda3..4038682 100644
--- a/arch/sh/boards/of-generic.c
+++ b/arch/sh/boards/of-generic.c
@@ -16,9 +16,15 @@
#include <linux/irqchip.h>
#include <linux/clk-provider.h>
#include <linux/memblock.h>
+#include <linux/sm501-regs.h>
#include <asm/machvec.h>
#include <asm/rtc.h>
+struct model_setup {
+ char *name;
+ void (*fn)(void);
+};
+
#ifdef CONFIG_SMP
static void dummy_smp_setup(void)
@@ -125,10 +131,61 @@ static void __init sh_of_time_init(void)
clocksource_probe();
}
+#define PA_LED 0xb0000001 /* LED Control Register */
+#define PA_SHUTDOWN 0xb0000003 /* Shutdown Control Register */
+static void landisk_power_off(void)
+{
+ __raw_writeb(0x01, PA_SHUTDOWN);
+}
+
+static void __init landisk_setup(void)
+{
+ /* LED ON */
+ __raw_writeb(__raw_readb(PA_LED) | 0x03, PA_LED);
+ pm_power_off = landisk_power_off;
+}
+
+#define PA_POWOFF 0xa4000030 /* Board Power OFF control */
+#define PA_OUTPORT 0xa4000036 /* LED control */
+static void rts7751r2d_power_off(void)
+{
+ __raw_writew(0x0001, PA_POWOFF);
+}
+
+static void __init r2dplus_setup(void)
+{
+ void __iomem *sm501_reg;
+
+ __raw_writew(0x0000, PA_OUTPORT);
+ pm_power_off = rts7751r2d_power_off;
+
+ /* sm501 dram configuration:
+ * ColSizeX = 11 - External Memory Column Size: 256 words.
+ * APX = 1 - External Memory Active to Pre-Charge Delay: 7 clocks.
+ * RstX = 1 - External Memory Reset: Normal.
+ * Rfsh = 1 - Local Memory Refresh to Command Delay: 12 clocks.
+ * BwC = 1 - Local Memory Block Write Cycle Time: 2 clocks.
+ * BwP = 1 - Local Memory Block Write to Pre-Charge Delay: 1 clock.
+ * AP = 1 - Internal Memory Active to Pre-Charge Delay: 7 clocks.
+ * Rst = 1 - Internal Memory Reset: Normal.
+ * RA = 1 - Internal Memory Remain in Active State: Do not remain.
+ */
+
+ sm501_reg = (void __iomem *)0xb3e00000 + SM501_DRAM_CONTROL;
+ writel(readl(sm501_reg) | 0x00f107c0, sm501_reg);
+}
+
+static const struct model_setup model_setup_table[] __initconst = {
+ { .name = "iodata,HDL-U", .fn = landisk_setup, },
+ { .name = "renesas,RTS7751R2D+", .fn = r2dplus_setup, },
+ {},
+};
+
static void __init sh_of_setup(char **cmdline_p)
{
struct device_node *root;
struct device_node *cpu;
+ const struct model_setup *setup;
u32 freq;
board_time_init = sh_of_time_init;
@@ -145,6 +202,13 @@ static void __init sh_of_setup(char **cmdline_p)
cpu = of_find_node_by_name(NULL, "cpu");
if (!of_property_read_u32(cpu, "clock-frequency", &freq))
preset_lpj = freq / CONFIG_HZ / 2;
+
+ for (setup = model_setup_table; setup->name; setup++) {
+ if (strcmp(setup->name, sh_mv.mv_name) == 0) {
+ setup->fn();
+ break;
+ }
+ }
}
static int sh_of_irq_demux(int irq)
--
2.7.0
^ permalink raw reply related [flat|nested] 138+ messages in thread* Re: [PATCH v5 10/22] sh: Add board specific initialize of of-generic
2016-07-03 16:46 ` Yoshinori Sato
@ 2016-07-04 1:35 ` Rich Felker
-1 siblings, 0 replies; 138+ messages in thread
From: Rich Felker @ 2016-07-04 1:35 UTC (permalink / raw)
To: Yoshinori Sato; +Cc: linux-sh, linux-kernel
On Mon, Jul 04, 2016 at 01:46:30AM +0900, Yoshinori Sato wrote:
> Signed-off-by: Yoshinori Sato <ysato@users.sourceforge.jp>
> ---
> arch/sh/boards/of-generic.c | 64 +++++++++++++++++++++++++++++++++++++++++++++
> 1 file changed, 64 insertions(+)
>
> diff --git a/arch/sh/boards/of-generic.c b/arch/sh/boards/of-generic.c
> index 2d3cda3..4038682 100644
> --- a/arch/sh/boards/of-generic.c
> +++ b/arch/sh/boards/of-generic.c
> @@ -16,9 +16,15 @@
> #include <linux/irqchip.h>
> #include <linux/clk-provider.h>
> #include <linux/memblock.h>
> +#include <linux/sm501-regs.h>
> #include <asm/machvec.h>
> #include <asm/rtc.h>
>
> +struct model_setup {
> + char *name;
> + void (*fn)(void);
> +};
> +
> #ifdef CONFIG_SMP
>
> static void dummy_smp_setup(void)
> @@ -125,10 +131,61 @@ static void __init sh_of_time_init(void)
> clocksource_probe();
> }
>
> +#define PA_LED 0xb0000001 /* LED Control Register */
> +#define PA_SHUTDOWN 0xb0000003 /* Shutdown Control Register */
> +static void landisk_power_off(void)
> +{
> + __raw_writeb(0x01, PA_SHUTDOWN);
> +}
> +
> +static void __init landisk_setup(void)
> +{
> + /* LED ON */
> + __raw_writeb(__raw_readb(PA_LED) | 0x03, PA_LED);
> + pm_power_off = landisk_power_off;
> +}
> +
> +#define PA_POWOFF 0xa4000030 /* Board Power OFF control */
> +#define PA_OUTPORT 0xa4000036 /* LED control */
> +static void rts7751r2d_power_off(void)
> +{
> + __raw_writew(0x0001, PA_POWOFF);
> +}
> +
> +static void __init r2dplus_setup(void)
> +{
> + void __iomem *sm501_reg;
> +
> + __raw_writew(0x0000, PA_OUTPORT);
> + pm_power_off = rts7751r2d_power_off;
> +
> + /* sm501 dram configuration:
> + * ColSizeX = 11 - External Memory Column Size: 256 words.
> + * APX = 1 - External Memory Active to Pre-Charge Delay: 7 clocks.
> + * RstX = 1 - External Memory Reset: Normal.
> + * Rfsh = 1 - Local Memory Refresh to Command Delay: 12 clocks.
> + * BwC = 1 - Local Memory Block Write Cycle Time: 2 clocks.
> + * BwP = 1 - Local Memory Block Write to Pre-Charge Delay: 1 clock.
> + * AP = 1 - Internal Memory Active to Pre-Charge Delay: 7 clocks.
> + * Rst = 1 - Internal Memory Reset: Normal.
> + * RA = 1 - Internal Memory Remain in Active State: Do not remain.
> + */
> +
> + sm501_reg = (void __iomem *)0xb3e00000 + SM501_DRAM_CONTROL;
> + writel(readl(sm501_reg) | 0x00f107c0, sm501_reg);
> +}
> +
> +static const struct model_setup model_setup_table[] __initconst = {
> + { .name = "iodata,HDL-U", .fn = landisk_setup, },
> + { .name = "renesas,RTS7751R2D+", .fn = r2dplus_setup, },
> + {},
> +};
> +
> static void __init sh_of_setup(char **cmdline_p)
> {
> struct device_node *root;
> struct device_node *cpu;
> + const struct model_setup *setup;
> u32 freq;
>
> board_time_init = sh_of_time_init;
> @@ -145,6 +202,13 @@ static void __init sh_of_setup(char **cmdline_p)
> cpu = of_find_node_by_name(NULL, "cpu");
> if (!of_property_read_u32(cpu, "clock-frequency", &freq))
> preset_lpj = freq / CONFIG_HZ / 2;
> +
> + for (setup = model_setup_table; setup->name; setup++) {
> + if (strcmp(setup->name, sh_mv.mv_name) = 0) {
> + setup->fn();
> + break;
> + }
> + }
> }
>
> static int sh_of_irq_demux(int irq)
> --
I think all of this code should be in appropriate driver files, not
of-generic.c. Much of it looks like it should be pm (power management)
drivers for which I'd assume there's an existing framework. I'm not
sure about the DRAM control. For the LED I think there's an LED GPIO
framework already too that would be appropriate and that probably
only needs appropriate nodes in the DT, not even any code.
Rich
^ permalink raw reply [flat|nested] 138+ messages in thread* Re: [PATCH v5 10/22] sh: Add board specific initialize of of-generic
@ 2016-07-04 1:35 ` Rich Felker
0 siblings, 0 replies; 138+ messages in thread
From: Rich Felker @ 2016-07-04 1:35 UTC (permalink / raw)
To: Yoshinori Sato; +Cc: linux-sh, linux-kernel
On Mon, Jul 04, 2016 at 01:46:30AM +0900, Yoshinori Sato wrote:
> Signed-off-by: Yoshinori Sato <ysato@users.sourceforge.jp>
> ---
> arch/sh/boards/of-generic.c | 64 +++++++++++++++++++++++++++++++++++++++++++++
> 1 file changed, 64 insertions(+)
>
> diff --git a/arch/sh/boards/of-generic.c b/arch/sh/boards/of-generic.c
> index 2d3cda3..4038682 100644
> --- a/arch/sh/boards/of-generic.c
> +++ b/arch/sh/boards/of-generic.c
> @@ -16,9 +16,15 @@
> #include <linux/irqchip.h>
> #include <linux/clk-provider.h>
> #include <linux/memblock.h>
> +#include <linux/sm501-regs.h>
> #include <asm/machvec.h>
> #include <asm/rtc.h>
>
> +struct model_setup {
> + char *name;
> + void (*fn)(void);
> +};
> +
> #ifdef CONFIG_SMP
>
> static void dummy_smp_setup(void)
> @@ -125,10 +131,61 @@ static void __init sh_of_time_init(void)
> clocksource_probe();
> }
>
> +#define PA_LED 0xb0000001 /* LED Control Register */
> +#define PA_SHUTDOWN 0xb0000003 /* Shutdown Control Register */
> +static void landisk_power_off(void)
> +{
> + __raw_writeb(0x01, PA_SHUTDOWN);
> +}
> +
> +static void __init landisk_setup(void)
> +{
> + /* LED ON */
> + __raw_writeb(__raw_readb(PA_LED) | 0x03, PA_LED);
> + pm_power_off = landisk_power_off;
> +}
> +
> +#define PA_POWOFF 0xa4000030 /* Board Power OFF control */
> +#define PA_OUTPORT 0xa4000036 /* LED control */
> +static void rts7751r2d_power_off(void)
> +{
> + __raw_writew(0x0001, PA_POWOFF);
> +}
> +
> +static void __init r2dplus_setup(void)
> +{
> + void __iomem *sm501_reg;
> +
> + __raw_writew(0x0000, PA_OUTPORT);
> + pm_power_off = rts7751r2d_power_off;
> +
> + /* sm501 dram configuration:
> + * ColSizeX = 11 - External Memory Column Size: 256 words.
> + * APX = 1 - External Memory Active to Pre-Charge Delay: 7 clocks.
> + * RstX = 1 - External Memory Reset: Normal.
> + * Rfsh = 1 - Local Memory Refresh to Command Delay: 12 clocks.
> + * BwC = 1 - Local Memory Block Write Cycle Time: 2 clocks.
> + * BwP = 1 - Local Memory Block Write to Pre-Charge Delay: 1 clock.
> + * AP = 1 - Internal Memory Active to Pre-Charge Delay: 7 clocks.
> + * Rst = 1 - Internal Memory Reset: Normal.
> + * RA = 1 - Internal Memory Remain in Active State: Do not remain.
> + */
> +
> + sm501_reg = (void __iomem *)0xb3e00000 + SM501_DRAM_CONTROL;
> + writel(readl(sm501_reg) | 0x00f107c0, sm501_reg);
> +}
> +
> +static const struct model_setup model_setup_table[] __initconst = {
> + { .name = "iodata,HDL-U", .fn = landisk_setup, },
> + { .name = "renesas,RTS7751R2D+", .fn = r2dplus_setup, },
> + {},
> +};
> +
> static void __init sh_of_setup(char **cmdline_p)
> {
> struct device_node *root;
> struct device_node *cpu;
> + const struct model_setup *setup;
> u32 freq;
>
> board_time_init = sh_of_time_init;
> @@ -145,6 +202,13 @@ static void __init sh_of_setup(char **cmdline_p)
> cpu = of_find_node_by_name(NULL, "cpu");
> if (!of_property_read_u32(cpu, "clock-frequency", &freq))
> preset_lpj = freq / CONFIG_HZ / 2;
> +
> + for (setup = model_setup_table; setup->name; setup++) {
> + if (strcmp(setup->name, sh_mv.mv_name) == 0) {
> + setup->fn();
> + break;
> + }
> + }
> }
>
> static int sh_of_irq_demux(int irq)
> --
I think all of this code should be in appropriate driver files, not
of-generic.c. Much of it looks like it should be pm (power management)
drivers for which I'd assume there's an existing framework. I'm not
sure about the DRAM control. For the LED I think there's an LED GPIO
framework already too that would be appropriate and that probably
only needs appropriate nodes in the DT, not even any code.
Rich
^ permalink raw reply [flat|nested] 138+ messages in thread* Re: [PATCH v5 10/22] sh: Add board specific initialize of of-generic
2016-07-04 1:35 ` Rich Felker
@ 2016-07-06 14:27 ` Yoshinori Sato
-1 siblings, 0 replies; 138+ messages in thread
From: Yoshinori Sato @ 2016-07-06 14:27 UTC (permalink / raw)
To: Rich Felker; +Cc: linux-sh, linux-kernel
On Mon, 04 Jul 2016 10:35:57 +0900,
Rich Felker wrote:
>
> On Mon, Jul 04, 2016 at 01:46:30AM +0900, Yoshinori Sato wrote:
> > Signed-off-by: Yoshinori Sato <ysato@users.sourceforge.jp>
> > ---
> > arch/sh/boards/of-generic.c | 64 +++++++++++++++++++++++++++++++++++++++++++++
> > 1 file changed, 64 insertions(+)
> >
> > diff --git a/arch/sh/boards/of-generic.c b/arch/sh/boards/of-generic.c
> > index 2d3cda3..4038682 100644
> > --- a/arch/sh/boards/of-generic.c
> > +++ b/arch/sh/boards/of-generic.c
> > @@ -16,9 +16,15 @@
> > #include <linux/irqchip.h>
> > #include <linux/clk-provider.h>
> > #include <linux/memblock.h>
> > +#include <linux/sm501-regs.h>
> > #include <asm/machvec.h>
> > #include <asm/rtc.h>
> >
> > +struct model_setup {
> > + char *name;
> > + void (*fn)(void);
> > +};
> > +
> > #ifdef CONFIG_SMP
> >
> > static void dummy_smp_setup(void)
> > @@ -125,10 +131,61 @@ static void __init sh_of_time_init(void)
> > clocksource_probe();
> > }
> >
> > +#define PA_LED 0xb0000001 /* LED Control Register */
> > +#define PA_SHUTDOWN 0xb0000003 /* Shutdown Control Register */
> > +static void landisk_power_off(void)
> > +{
> > + __raw_writeb(0x01, PA_SHUTDOWN);
> > +}
> > +
> > +static void __init landisk_setup(void)
> > +{
> > + /* LED ON */
> > + __raw_writeb(__raw_readb(PA_LED) | 0x03, PA_LED);
> > + pm_power_off = landisk_power_off;
> > +}
> > +
> > +#define PA_POWOFF 0xa4000030 /* Board Power OFF control */
> > +#define PA_OUTPORT 0xa4000036 /* LED control */
> > +static void rts7751r2d_power_off(void)
> > +{
> > + __raw_writew(0x0001, PA_POWOFF);
> > +}
> > +
> > +static void __init r2dplus_setup(void)
> > +{
> > + void __iomem *sm501_reg;
> > +
> > + __raw_writew(0x0000, PA_OUTPORT);
> > + pm_power_off = rts7751r2d_power_off;
> > +
> > + /* sm501 dram configuration:
> > + * ColSizeX = 11 - External Memory Column Size: 256 words.
> > + * APX = 1 - External Memory Active to Pre-Charge Delay: 7 clocks.
> > + * RstX = 1 - External Memory Reset: Normal.
> > + * Rfsh = 1 - Local Memory Refresh to Command Delay: 12 clocks.
> > + * BwC = 1 - Local Memory Block Write Cycle Time: 2 clocks.
> > + * BwP = 1 - Local Memory Block Write to Pre-Charge Delay: 1 clock.
> > + * AP = 1 - Internal Memory Active to Pre-Charge Delay: 7 clocks.
> > + * Rst = 1 - Internal Memory Reset: Normal.
> > + * RA = 1 - Internal Memory Remain in Active State: Do not remain.
> > + */
> > +
> > + sm501_reg = (void __iomem *)0xb3e00000 + SM501_DRAM_CONTROL;
> > + writel(readl(sm501_reg) | 0x00f107c0, sm501_reg);
> > +}
> > +
> > +static const struct model_setup model_setup_table[] __initconst = {
> > + { .name = "iodata,HDL-U", .fn = landisk_setup, },
> > + { .name = "renesas,RTS7751R2D+", .fn = r2dplus_setup, },
> > + {},
> > +};
> > +
> > static void __init sh_of_setup(char **cmdline_p)
> > {
> > struct device_node *root;
> > struct device_node *cpu;
> > + const struct model_setup *setup;
> > u32 freq;
> >
> > board_time_init = sh_of_time_init;
> > @@ -145,6 +202,13 @@ static void __init sh_of_setup(char **cmdline_p)
> > cpu = of_find_node_by_name(NULL, "cpu");
> > if (!of_property_read_u32(cpu, "clock-frequency", &freq))
> > preset_lpj = freq / CONFIG_HZ / 2;
> > +
> > + for (setup = model_setup_table; setup->name; setup++) {
> > + if (strcmp(setup->name, sh_mv.mv_name) = 0) {
> > + setup->fn();
> > + break;
> > + }
> > + }
> > }
> >
> > static int sh_of_irq_demux(int irq)
> > --
>
> I think all of this code should be in appropriate driver files, not
> of-generic.c. Much of it looks like it should be pm (power management)
> drivers for which I'd assume there's an existing framework. I'm not
> sure about the DRAM control. For the LED I think there's an LED GPIO
> framework already too that would be appropriate and that probably
> only needs appropriate nodes in the DT, not even any code.
>
> Rich
OK.
I'll separate code.
--
Yoshinori Sato
<ysato@users.sourceforge.jp>
^ permalink raw reply [flat|nested] 138+ messages in thread* Re: [PATCH v5 10/22] sh: Add board specific initialize of of-generic
@ 2016-07-06 14:27 ` Yoshinori Sato
0 siblings, 0 replies; 138+ messages in thread
From: Yoshinori Sato @ 2016-07-06 14:27 UTC (permalink / raw)
To: Rich Felker; +Cc: linux-sh, linux-kernel
On Mon, 04 Jul 2016 10:35:57 +0900,
Rich Felker wrote:
>
> On Mon, Jul 04, 2016 at 01:46:30AM +0900, Yoshinori Sato wrote:
> > Signed-off-by: Yoshinori Sato <ysato@users.sourceforge.jp>
> > ---
> > arch/sh/boards/of-generic.c | 64 +++++++++++++++++++++++++++++++++++++++++++++
> > 1 file changed, 64 insertions(+)
> >
> > diff --git a/arch/sh/boards/of-generic.c b/arch/sh/boards/of-generic.c
> > index 2d3cda3..4038682 100644
> > --- a/arch/sh/boards/of-generic.c
> > +++ b/arch/sh/boards/of-generic.c
> > @@ -16,9 +16,15 @@
> > #include <linux/irqchip.h>
> > #include <linux/clk-provider.h>
> > #include <linux/memblock.h>
> > +#include <linux/sm501-regs.h>
> > #include <asm/machvec.h>
> > #include <asm/rtc.h>
> >
> > +struct model_setup {
> > + char *name;
> > + void (*fn)(void);
> > +};
> > +
> > #ifdef CONFIG_SMP
> >
> > static void dummy_smp_setup(void)
> > @@ -125,10 +131,61 @@ static void __init sh_of_time_init(void)
> > clocksource_probe();
> > }
> >
> > +#define PA_LED 0xb0000001 /* LED Control Register */
> > +#define PA_SHUTDOWN 0xb0000003 /* Shutdown Control Register */
> > +static void landisk_power_off(void)
> > +{
> > + __raw_writeb(0x01, PA_SHUTDOWN);
> > +}
> > +
> > +static void __init landisk_setup(void)
> > +{
> > + /* LED ON */
> > + __raw_writeb(__raw_readb(PA_LED) | 0x03, PA_LED);
> > + pm_power_off = landisk_power_off;
> > +}
> > +
> > +#define PA_POWOFF 0xa4000030 /* Board Power OFF control */
> > +#define PA_OUTPORT 0xa4000036 /* LED control */
> > +static void rts7751r2d_power_off(void)
> > +{
> > + __raw_writew(0x0001, PA_POWOFF);
> > +}
> > +
> > +static void __init r2dplus_setup(void)
> > +{
> > + void __iomem *sm501_reg;
> > +
> > + __raw_writew(0x0000, PA_OUTPORT);
> > + pm_power_off = rts7751r2d_power_off;
> > +
> > + /* sm501 dram configuration:
> > + * ColSizeX = 11 - External Memory Column Size: 256 words.
> > + * APX = 1 - External Memory Active to Pre-Charge Delay: 7 clocks.
> > + * RstX = 1 - External Memory Reset: Normal.
> > + * Rfsh = 1 - Local Memory Refresh to Command Delay: 12 clocks.
> > + * BwC = 1 - Local Memory Block Write Cycle Time: 2 clocks.
> > + * BwP = 1 - Local Memory Block Write to Pre-Charge Delay: 1 clock.
> > + * AP = 1 - Internal Memory Active to Pre-Charge Delay: 7 clocks.
> > + * Rst = 1 - Internal Memory Reset: Normal.
> > + * RA = 1 - Internal Memory Remain in Active State: Do not remain.
> > + */
> > +
> > + sm501_reg = (void __iomem *)0xb3e00000 + SM501_DRAM_CONTROL;
> > + writel(readl(sm501_reg) | 0x00f107c0, sm501_reg);
> > +}
> > +
> > +static const struct model_setup model_setup_table[] __initconst = {
> > + { .name = "iodata,HDL-U", .fn = landisk_setup, },
> > + { .name = "renesas,RTS7751R2D+", .fn = r2dplus_setup, },
> > + {},
> > +};
> > +
> > static void __init sh_of_setup(char **cmdline_p)
> > {
> > struct device_node *root;
> > struct device_node *cpu;
> > + const struct model_setup *setup;
> > u32 freq;
> >
> > board_time_init = sh_of_time_init;
> > @@ -145,6 +202,13 @@ static void __init sh_of_setup(char **cmdline_p)
> > cpu = of_find_node_by_name(NULL, "cpu");
> > if (!of_property_read_u32(cpu, "clock-frequency", &freq))
> > preset_lpj = freq / CONFIG_HZ / 2;
> > +
> > + for (setup = model_setup_table; setup->name; setup++) {
> > + if (strcmp(setup->name, sh_mv.mv_name) == 0) {
> > + setup->fn();
> > + break;
> > + }
> > + }
> > }
> >
> > static int sh_of_irq_demux(int irq)
> > --
>
> I think all of this code should be in appropriate driver files, not
> of-generic.c. Much of it looks like it should be pm (power management)
> drivers for which I'd assume there's an existing framework. I'm not
> sure about the DRAM control. For the LED I think there's an LED GPIO
> framework already too that would be appropriate and that probably
> only needs appropriate nodes in the DT, not even any code.
>
> Rich
OK.
I'll separate code.
--
Yoshinori Sato
<ysato@users.sourceforge.jp>
^ permalink raw reply [flat|nested] 138+ messages in thread
* [PATCH v5 11/22] sh: SH7750/51 CPG Driver
2016-07-03 16:46 ` Yoshinori Sato
@ 2016-07-03 16:46 ` Yoshinori Sato
-1 siblings, 0 replies; 138+ messages in thread
From: Yoshinori Sato @ 2016-07-03 16:46 UTC (permalink / raw)
To: linux-sh, linux-kernel; +Cc: Yoshinori Sato
Convert SH specific clock framework to CCF.
Signed-off-by: Yoshinori Sato <ysato@users.sourceforge.jp>
Acked-by: Rob Herring <robh@kernel.org>
---
.../bindings/clock/renesas,sh7750-cpg.txt | 25 ++
arch/sh/boards/Kconfig | 1 +
arch/sh/kernel/cpu/Makefile | 8 +-
arch/sh/kernel/cpu/clock.c | 6 +-
drivers/clk/Kconfig | 1 +
drivers/clk/Makefile | 3 +-
drivers/clk/sh/Kconfig | 2 +
drivers/clk/sh/Makefile | 1 +
drivers/clk/sh/clk-sh7750cpg.c | 344 +++++++++++++++++++++
9 files changed, 387 insertions(+), 4 deletions(-)
create mode 100644 Documentation/devicetree/bindings/clock/renesas,sh7750-cpg.txt
create mode 100644 drivers/clk/sh/Kconfig
create mode 100644 drivers/clk/sh/Makefile
create mode 100644 drivers/clk/sh/clk-sh7750cpg.c
diff --git a/Documentation/devicetree/bindings/clock/renesas,sh7750-cpg.txt b/Documentation/devicetree/bindings/clock/renesas,sh7750-cpg.txt
new file mode 100644
index 0000000..e763e2c
--- /dev/null
+++ b/Documentation/devicetree/bindings/clock/renesas,sh7750-cpg.txt
@@ -0,0 +1,25 @@
+* Renesas SH7750/51 CPG
+
+Required Properties:
+
+ - compatible: Must be "renesas,sh7750-cpg"
+
+ - clocks: Reference to the parent clocks (xtal or external)
+
+ - #clock-cells: Must be 1
+
+ - reg: Base address and length of the FREQCR
+ and Base address and length of the CLKSTP00 (optional)
+
+ - renesas,mult: PLL1 multiply rate
+
+Example
+-------
+
+ cpg: cpg@ffc00000 {
+ compatible = "renesas,sh7750-cpg";
+ clocks = <&oclk>;
+ #clock-cells = <1>;
+ renesas,mult = <12>;
+ reg = <0xffc00000 32>, <0xfe0a0000 16>;
+ };
diff --git a/arch/sh/boards/Kconfig b/arch/sh/boards/Kconfig
index 9e4ccd0..b6ff9df 100644
--- a/arch/sh/boards/Kconfig
+++ b/arch/sh/boards/Kconfig
@@ -13,6 +13,7 @@ config SH_DEVICE_TREE
select CLKSRC_OF
select GENERIC_CALIBRATE_DELAY
select GENERIC_IOMAP
+ select COMMON_CLK
help
Select Board Described by Device Tree to build a kernel that
does not hard-code any board-specific knowledge but instead uses
diff --git a/arch/sh/kernel/cpu/Makefile b/arch/sh/kernel/cpu/Makefile
index accc7ca..22ad0ee 100644
--- a/arch/sh/kernel/cpu/Makefile
+++ b/arch/sh/kernel/cpu/Makefile
@@ -16,6 +16,10 @@ obj-$(CONFIG_ARCH_SHMOBILE) += shmobile/
# Common interfaces.
obj-$(CONFIG_SH_ADC) += adc.o
+ifndef CONFIG_COMMON_CLK
obj-$(CONFIG_SH_CLK_CPG_LEGACY) += clock-cpg.o
-
-obj-y += irq/ init.o clock.o fpu.o pfc.o proc.o
+endif
+ifndef CONFIG_GENERIC_IRQ_CHIP
+obj-y += irq/
+endif
+obj-y += init.o clock.o fpu.o pfc.o proc.o
diff --git a/arch/sh/kernel/cpu/clock.c b/arch/sh/kernel/cpu/clock.c
index 4187cf4..8e66e23 100644
--- a/arch/sh/kernel/cpu/clock.c
+++ b/arch/sh/kernel/cpu/clock.c
@@ -22,13 +22,15 @@
int __init clk_init(void)
{
- int ret;
+ int ret = 0;
+#ifndef CONFIG_COMMON_CLK
ret = arch_clk_init();
if (unlikely(ret)) {
pr_err("%s: CPU clock registration failed.\n", __func__);
return ret;
}
+#endif
if (sh_mv.mv_clk_init) {
ret = sh_mv.mv_clk_init();
@@ -39,11 +41,13 @@ int __init clk_init(void)
}
}
+#ifndef CONFIG_COMMON_CLK
/* Kick the child clocks.. */
recalculate_root_clocks();
/* Enable the necessary init clocks */
clk_enable_init_clocks();
+#endif
return ret;
}
diff --git a/drivers/clk/Kconfig b/drivers/clk/Kconfig
index 98efbfc..60d19d0 100644
--- a/drivers/clk/Kconfig
+++ b/drivers/clk/Kconfig
@@ -213,6 +213,7 @@ source "drivers/clk/mvebu/Kconfig"
source "drivers/clk/qcom/Kconfig"
source "drivers/clk/renesas/Kconfig"
source "drivers/clk/samsung/Kconfig"
+source "drivers/clk/sh/Kconfig"
source "drivers/clk/tegra/Kconfig"
source "drivers/clk/ti/Kconfig"
diff --git a/drivers/clk/Makefile b/drivers/clk/Makefile
index dcc5e69..c4bfbb9 100644
--- a/drivers/clk/Makefile
+++ b/drivers/clk/Makefile
@@ -86,5 +86,6 @@ obj-$(CONFIG_COMMON_CLK_VERSATILE) += versatile/
obj-$(CONFIG_X86) += x86/
obj-$(CONFIG_ARCH_ZX) += zte/
obj-$(CONFIG_ARCH_ZYNQ) += zynq/
-obj-$(CONFIG_H8300) += h8300/
+obj-$(CONFIG_H8300) += h8300/
obj-$(CONFIG_ARC_PLAT_AXS10X) += axs10x/
+obj-$(CONFIG_SUPERH) += sh/
diff --git a/drivers/clk/sh/Kconfig b/drivers/clk/sh/Kconfig
new file mode 100644
index 0000000..2090415
--- /dev/null
+++ b/drivers/clk/sh/Kconfig
@@ -0,0 +1,2 @@
+config COMMON_CLK_SH7750
+ bool "CPG driver for SH7750/SH7751"
diff --git a/drivers/clk/sh/Makefile b/drivers/clk/sh/Makefile
new file mode 100644
index 0000000..7ce4da3
--- /dev/null
+++ b/drivers/clk/sh/Makefile
@@ -0,0 +1 @@
+obj-$(CONFIG_COMMON_CLK_SH7750) += clk-sh7750cpg.o
diff --git a/drivers/clk/sh/clk-sh7750cpg.c b/drivers/clk/sh/clk-sh7750cpg.c
new file mode 100644
index 0000000..a538be4
--- /dev/null
+++ b/drivers/clk/sh/clk-sh7750cpg.c
@@ -0,0 +1,344 @@
+/*
+ * Renesas SH7750/51 clock driver
+ *
+ * Copyright 2016 Yoshinori Sato <ysato@users.sourceforge.jp>
+ */
+
+#include <linux/clk.h>
+#include <linux/clkdev.h>
+#include <linux/clk-provider.h>
+#include <linux/err.h>
+#include <linux/of.h>
+#include <linux/of_address.h>
+#include <linux/io.h>
+#include <linux/slab.h>
+
+/* Available FREQCR settings */
+static const int freqcr_table[] = {
+ 0x0400, 0x0401, 0x0402, 0x0403, 0x0404, 0x0408,
+ 0x0409, 0x040a, 0x040b, 0x040c, 0x0411, 0x0412,
+ 0x0413, 0x0414, 0x041a, 0x041b, 0x041c, 0x0423,
+ 0x0424, 0x0448, 0x0449, 0x044a, 0x044b, 0x044c,
+ 0x0451, 0x0452, 0x0453, 0x0454, 0x045a, 0x045b,
+ 0x045c, 0x0463, 0x0464, 0x0491, 0x0492, 0x0493,
+ 0x0494, 0x049a, 0x049b, 0x049c, 0x04a3, 0x04a4,
+ 0x04da, 0x04db, 0x04dc, 0x04e3, 0x04e4, 0x0523,
+ 0x0524, 0x0000, 0x0001, 0x0002, 0x0003, 0x0004,
+ 0x0008, 0x0009, 0x000a, 0x000b, 0x000c, 0x0011,
+ 0x0012, 0x0013, 0x0014, 0x0019, 0x001a, 0x001b,
+ 0x001c, 0x0023, 0x0024, 0x0048, 0x0049, 0x004a,
+ 0x004b, 0x004c, 0x0051, 0x0052, 0x0053, 0x0054,
+ 0x0059, 0x005a, 0x005b, 0x005c, 0x0063, 0x0064,
+ 0x0091, 0x0092, 0x0093, 0x0094, 0x0099, 0x009a,
+ 0x009b, 0x009c, 0x00a3, 0x00a4, 0x00d1, 0x00d2,
+ 0x00d3, 0x00d4, 0x00d9, 0x00da, 0x00db, 0x00dc,
+ 0x00e3, 0x00e4, 0x0123, 0x0124, 0x0163, 0x0164,
+};
+
+struct priv {
+ void __iomem *freqcr;
+ void __iomem *clkstp;
+ int mult;
+ struct clk **clks;
+};
+
+struct cpg_clock {
+ struct clk_hw hw;
+ struct priv *priv;
+ int index;
+};
+
+struct clockname {
+ char *name;
+ int index;
+};
+
+static const struct clockname clocknames[] __initconst = {
+ { .name = "sci", .index = 0 },
+ { .name = "rtc", .index = 1 },
+ { .name = "tmu0", .index = 2 },
+ { .name = "tmu1", .index = 2 },
+ { .name = "tmu2", .index = 2 },
+ { .name = "scif", .index = 3 },
+ { .name = "dmac", .index = 4 },
+ { .name = "ubc", .index = 8 },
+ { .name = "sq", .index = 9 },
+ { .name = "intc", .index = 16 },
+ { .name = "tmu3", .index = 17 },
+ { .name = "tmu4", .index = 17 },
+ { .name = "pcic", .index = 18 },
+ { .name = "core", .index = 128 },
+};
+
+static const int iclk_div[] = {1, 2, 3, 4, 6, 8, 0, 0};
+static const int pclk_div[] = {2, 3, 4, 6, 8, 0, 0, 0};
+
+static DEFINE_SPINLOCK(clklock);
+
+#define to_cpg_clock(_hw) container_of(_hw, struct cpg_clock, hw)
+
+static unsigned long pllout(u16 freqcr, unsigned long parent_rate, int mult)
+{
+ if ((freqcr >> 10) & 1)
+ return parent_rate * mult;
+ else
+ return parent_rate;
+}
+
+static unsigned long cpg_recalc_rate(struct clk_hw *hw,
+ unsigned long parent_rate)
+{
+ struct cpg_clock *cpg_clock = to_cpg_clock(hw);
+ struct priv *priv = cpg_clock->priv;
+ unsigned long div;
+ u16 freqcr;
+
+ freqcr = ioread16(priv->freqcr);
+ if (cpg_clock->index = 128)
+ div = iclk_div[(freqcr >> 6) & 7];
+ else
+ div = pclk_div[freqcr & 7];
+ return pllout(freqcr, parent_rate, priv->mult) / div;
+}
+
+static u16 get_best_freqcr(unsigned long rate,
+ unsigned long pclk_rate,
+ unsigned long parent, int mult)
+{
+ int i;
+ int div;
+ u16 freqcr;
+
+ for (i = 0; i < ARRAY_SIZE(freqcr_table); i++) {
+ freqcr = freqcr_table[i];
+ if (pllout(freqcr, parent, mult) / pclk_div[freqcr & 7]
+ != pclk_rate)
+ continue;
+ div = iclk_div[(freqcr >> 6) & 7];
+ if (pllout(freqcr, parent, mult) / div < rate)
+ return freqcr;
+ }
+ return 0;
+}
+
+static long cpg_round_rate(struct clk_hw *hw, unsigned long rate,
+ unsigned long *prate)
+{
+ struct cpg_clock *cpg_clock = to_cpg_clock(hw);
+ struct priv *priv = cpg_clock->priv;
+ unsigned long pclk_rate;
+ u16 freqcr;
+ int div;
+
+ freqcr = ioread16(priv->freqcr);
+ pclk_rate = pllout(freqcr, *prate, priv->mult) / pclk_div[freqcr & 7];
+
+ freqcr = get_best_freqcr(rate, pclk_rate, *prate, priv->mult);
+ if (cpg_clock->index = 128)
+ div = iclk_div[(freqcr >> 6) & 7];
+ else
+ div = pclk_div[freqcr & 7];
+
+ return pllout(freqcr, *prate, priv->mult) / div;
+}
+
+static int cpg_set_rate(struct clk_hw *hw, unsigned long rate,
+ unsigned long parent_rate)
+{
+ struct cpg_clock *cpg_clock = to_cpg_clock(hw);
+ struct priv *priv = cpg_clock->priv;
+ unsigned long flags;
+ unsigned long pclk_rate;
+ u16 freqcr, new_freqcr;
+
+ if (cpg_clock->index != 128)
+ return 0;
+
+ freqcr = ioread16(priv->freqcr);
+ pclk_rate = pllout(freqcr, parent_rate, priv->mult) /
+ pclk_div[freqcr & 7];
+
+ new_freqcr = get_best_freqcr(rate, pclk_rate, parent_rate, priv->mult);
+
+ if ((freqcr & 0x0200) = 0 && (new_freqcr & 0x0200) != 0) {
+ /* PLL on */
+ /* required stable time */
+ spin_lock_irqsave(&clklock, flags);
+ iowrite16(0x5a00, priv->freqcr + 8);
+ iowrite16(0xa503, priv->freqcr + 12);
+ iowrite16(new_freqcr, priv->freqcr);
+ spin_unlock_irqrestore(&clklock, flags);
+ } else {
+ /* PLL state no change */
+ /* not required stable time */
+ iowrite16(new_freqcr, priv->freqcr);
+ }
+ return 0;
+}
+
+static int cpg_enable(struct clk_hw *hw)
+{
+ struct cpg_clock *cpg_clock = to_cpg_clock(hw);
+ struct priv *priv = cpg_clock->priv;
+ u8 stbcr;
+
+ switch ((cpg_clock->index >> 3) & 3) {
+ case 0:
+ /* STBCR */
+ stbcr = ioread8(priv->freqcr + 4);
+ stbcr &= ~(1 << (cpg_clock->index & 7));
+ iowrite8(stbcr, priv->freqcr + 4);
+ break;
+ case 1:
+ /* STBCR2 */
+ stbcr = ioread8(priv->freqcr + 16);
+ stbcr &= ~(1 << (cpg_clock->index & 7));
+ iowrite8(stbcr, priv->freqcr + 16);
+ break;
+ case 2:
+ /* CLKSTPCLR00 */
+ iowrite32(1 << (cpg_clock->index - 16), priv->clkstp + 8);
+ break;
+ }
+ return 0;
+}
+
+static void cpg_disable(struct clk_hw *hw)
+{
+ struct cpg_clock *cpg_clock = to_cpg_clock(hw);
+ struct priv *priv = cpg_clock->priv;
+ u8 stbcr;
+
+ switch ((cpg_clock->index >> 3) & 3) {
+ case 0:
+ /* STBCR */
+ stbcr = ioread8(priv->freqcr + 4);
+ stbcr |= (1 << (cpg_clock->index & 7));
+ iowrite8(stbcr, priv->freqcr + 4);
+ break;
+ case 1:
+ /* STBCR2 */
+ stbcr = ioread8(priv->freqcr + 16);
+ stbcr |= (1 << (cpg_clock->index & 7));
+ iowrite8(stbcr, priv->freqcr + 16);
+ break;
+ case 2:
+ /* CLKSTP00 */
+ iowrite32(1 << (cpg_clock->index - 16), priv->clkstp);
+ break;
+ }
+}
+
+struct clk *sh7750_onecell_get(struct of_phandle_args *clkspec, void *data)
+{
+ struct priv *priv = data;
+ unsigned int idx = clkspec->args[0];
+
+ if (idx >= ARRAY_SIZE(clocknames)) {
+ pr_err("%s: invalid clock index %u\n", __func__, idx);
+ return ERR_PTR(-EINVAL);
+ }
+
+ return priv->clks[idx];
+}
+
+static const struct clk_ops cpg_ops = {
+ .recalc_rate = cpg_recalc_rate,
+ .round_rate = cpg_round_rate,
+ .set_rate = cpg_set_rate,
+ .enable = cpg_enable,
+ .disable = cpg_disable,
+};
+
+static struct clk * __init sh7750_cpg_register(struct device_node *node,
+ const struct clockname *name,
+ const char *parent_name,
+ struct priv *priv)
+{
+ struct cpg_clock *cpg_clock;
+ struct clk_init_data init;
+ struct clk *clk;
+
+ cpg_clock = kzalloc(sizeof(struct cpg_clock), GFP_KERNEL);
+ if (!cpg_clock) {
+ pr_err("%s: failed to alloc memory", name->name);
+ return NULL;
+ }
+
+ init.name = name->name;
+ init.ops = &cpg_ops;
+ init.flags = CLK_IS_BASIC;
+ init.parent_names = &parent_name;
+ init.num_parents = 1;
+ cpg_clock->hw.init = &init;
+ cpg_clock->priv = priv;
+ cpg_clock->index = name->index;
+
+ clk = clk_register(NULL, &cpg_clock->hw);
+ if (IS_ERR(clk)) {
+ pr_err("%s: failed to register %s pll clock (%ld)\n",
+ __func__, name->name, PTR_ERR(clk));
+ return NULL;
+ }
+ return clk;
+}
+
+static void __init sh7750_cpg_setup(struct device_node *node)
+{
+ const char *parent_name;
+ struct priv *priv;
+ int i;
+
+ priv = kzalloc(sizeof(struct priv), GFP_KERNEL);
+ if (priv = NULL) {
+ pr_err("%s: failed to alloc memory",
+ node->name);
+ return;
+ }
+ priv->clks = kmalloc_array(sizeof(priv->clks), ARRAY_SIZE(clocknames),
+ GFP_KERNEL);
+ if (priv->clks = NULL) {
+ pr_err("%s: failed to alloc memory",
+ node->name);
+ kfree(priv);
+ return;
+ }
+ for (i = 0; i < ARRAY_SIZE(clocknames); i++)
+ priv->clks[i] = ERR_PTR(-ENOENT);
+
+ priv->freqcr = of_iomap(node, 0);
+ if (priv->freqcr = NULL) {
+ pr_err("%s: failed to map frequenct control register",
+ node->name);
+ goto free_clock;
+ }
+
+ /* Optional register */
+ priv->clkstp = of_iomap(node, 1);
+
+ of_property_read_u32_index(node, "renesas,mult", 0, &priv->mult);
+
+ parent_name = of_clk_get_parent_name(node, 0);
+
+ for (i = 0; i < ARRAY_SIZE(clocknames); i++) {
+ priv->clks[i] = sh7750_cpg_register(node, &clocknames[i],
+ parent_name, priv);
+ if (priv->clks[i] = NULL)
+ goto unmap_reg;
+ }
+ of_clk_add_provider(node, sh7750_onecell_get, priv);
+ return;
+
+unmap_reg:
+ if (priv->clkstp)
+ iounmap(priv->clkstp);
+ iounmap(priv->freqcr);
+free_clock:
+ for (i = 0; i < ARRAY_SIZE(clocknames); i++)
+ if (priv->clks[i] != ERR_PTR(-ENOENT) && priv->clks[i])
+ clk_unregister(priv->clks[i]);
+ kfree(priv->clks);
+ kfree(priv);
+}
+
+CLK_OF_DECLARE(sh7750_cpg, "renesas,sh7750-cpg", sh7750_cpg_setup);
--
2.7.0
^ permalink raw reply related [flat|nested] 138+ messages in thread* [PATCH v5 11/22] sh: SH7750/51 CPG Driver
@ 2016-07-03 16:46 ` Yoshinori Sato
0 siblings, 0 replies; 138+ messages in thread
From: Yoshinori Sato @ 2016-07-03 16:46 UTC (permalink / raw)
To: linux-sh, linux-kernel; +Cc: Yoshinori Sato
Convert SH specific clock framework to CCF.
Signed-off-by: Yoshinori Sato <ysato@users.sourceforge.jp>
Acked-by: Rob Herring <robh@kernel.org>
---
.../bindings/clock/renesas,sh7750-cpg.txt | 25 ++
arch/sh/boards/Kconfig | 1 +
arch/sh/kernel/cpu/Makefile | 8 +-
arch/sh/kernel/cpu/clock.c | 6 +-
drivers/clk/Kconfig | 1 +
drivers/clk/Makefile | 3 +-
drivers/clk/sh/Kconfig | 2 +
drivers/clk/sh/Makefile | 1 +
drivers/clk/sh/clk-sh7750cpg.c | 344 +++++++++++++++++++++
9 files changed, 387 insertions(+), 4 deletions(-)
create mode 100644 Documentation/devicetree/bindings/clock/renesas,sh7750-cpg.txt
create mode 100644 drivers/clk/sh/Kconfig
create mode 100644 drivers/clk/sh/Makefile
create mode 100644 drivers/clk/sh/clk-sh7750cpg.c
diff --git a/Documentation/devicetree/bindings/clock/renesas,sh7750-cpg.txt b/Documentation/devicetree/bindings/clock/renesas,sh7750-cpg.txt
new file mode 100644
index 0000000..e763e2c
--- /dev/null
+++ b/Documentation/devicetree/bindings/clock/renesas,sh7750-cpg.txt
@@ -0,0 +1,25 @@
+* Renesas SH7750/51 CPG
+
+Required Properties:
+
+ - compatible: Must be "renesas,sh7750-cpg"
+
+ - clocks: Reference to the parent clocks (xtal or external)
+
+ - #clock-cells: Must be 1
+
+ - reg: Base address and length of the FREQCR
+ and Base address and length of the CLKSTP00 (optional)
+
+ - renesas,mult: PLL1 multiply rate
+
+Example
+-------
+
+ cpg: cpg@ffc00000 {
+ compatible = "renesas,sh7750-cpg";
+ clocks = <&oclk>;
+ #clock-cells = <1>;
+ renesas,mult = <12>;
+ reg = <0xffc00000 32>, <0xfe0a0000 16>;
+ };
diff --git a/arch/sh/boards/Kconfig b/arch/sh/boards/Kconfig
index 9e4ccd0..b6ff9df 100644
--- a/arch/sh/boards/Kconfig
+++ b/arch/sh/boards/Kconfig
@@ -13,6 +13,7 @@ config SH_DEVICE_TREE
select CLKSRC_OF
select GENERIC_CALIBRATE_DELAY
select GENERIC_IOMAP
+ select COMMON_CLK
help
Select Board Described by Device Tree to build a kernel that
does not hard-code any board-specific knowledge but instead uses
diff --git a/arch/sh/kernel/cpu/Makefile b/arch/sh/kernel/cpu/Makefile
index accc7ca..22ad0ee 100644
--- a/arch/sh/kernel/cpu/Makefile
+++ b/arch/sh/kernel/cpu/Makefile
@@ -16,6 +16,10 @@ obj-$(CONFIG_ARCH_SHMOBILE) += shmobile/
# Common interfaces.
obj-$(CONFIG_SH_ADC) += adc.o
+ifndef CONFIG_COMMON_CLK
obj-$(CONFIG_SH_CLK_CPG_LEGACY) += clock-cpg.o
-
-obj-y += irq/ init.o clock.o fpu.o pfc.o proc.o
+endif
+ifndef CONFIG_GENERIC_IRQ_CHIP
+obj-y += irq/
+endif
+obj-y += init.o clock.o fpu.o pfc.o proc.o
diff --git a/arch/sh/kernel/cpu/clock.c b/arch/sh/kernel/cpu/clock.c
index 4187cf4..8e66e23 100644
--- a/arch/sh/kernel/cpu/clock.c
+++ b/arch/sh/kernel/cpu/clock.c
@@ -22,13 +22,15 @@
int __init clk_init(void)
{
- int ret;
+ int ret = 0;
+#ifndef CONFIG_COMMON_CLK
ret = arch_clk_init();
if (unlikely(ret)) {
pr_err("%s: CPU clock registration failed.\n", __func__);
return ret;
}
+#endif
if (sh_mv.mv_clk_init) {
ret = sh_mv.mv_clk_init();
@@ -39,11 +41,13 @@ int __init clk_init(void)
}
}
+#ifndef CONFIG_COMMON_CLK
/* Kick the child clocks.. */
recalculate_root_clocks();
/* Enable the necessary init clocks */
clk_enable_init_clocks();
+#endif
return ret;
}
diff --git a/drivers/clk/Kconfig b/drivers/clk/Kconfig
index 98efbfc..60d19d0 100644
--- a/drivers/clk/Kconfig
+++ b/drivers/clk/Kconfig
@@ -213,6 +213,7 @@ source "drivers/clk/mvebu/Kconfig"
source "drivers/clk/qcom/Kconfig"
source "drivers/clk/renesas/Kconfig"
source "drivers/clk/samsung/Kconfig"
+source "drivers/clk/sh/Kconfig"
source "drivers/clk/tegra/Kconfig"
source "drivers/clk/ti/Kconfig"
diff --git a/drivers/clk/Makefile b/drivers/clk/Makefile
index dcc5e69..c4bfbb9 100644
--- a/drivers/clk/Makefile
+++ b/drivers/clk/Makefile
@@ -86,5 +86,6 @@ obj-$(CONFIG_COMMON_CLK_VERSATILE) += versatile/
obj-$(CONFIG_X86) += x86/
obj-$(CONFIG_ARCH_ZX) += zte/
obj-$(CONFIG_ARCH_ZYNQ) += zynq/
-obj-$(CONFIG_H8300) += h8300/
+obj-$(CONFIG_H8300) += h8300/
obj-$(CONFIG_ARC_PLAT_AXS10X) += axs10x/
+obj-$(CONFIG_SUPERH) += sh/
diff --git a/drivers/clk/sh/Kconfig b/drivers/clk/sh/Kconfig
new file mode 100644
index 0000000..2090415
--- /dev/null
+++ b/drivers/clk/sh/Kconfig
@@ -0,0 +1,2 @@
+config COMMON_CLK_SH7750
+ bool "CPG driver for SH7750/SH7751"
diff --git a/drivers/clk/sh/Makefile b/drivers/clk/sh/Makefile
new file mode 100644
index 0000000..7ce4da3
--- /dev/null
+++ b/drivers/clk/sh/Makefile
@@ -0,0 +1 @@
+obj-$(CONFIG_COMMON_CLK_SH7750) += clk-sh7750cpg.o
diff --git a/drivers/clk/sh/clk-sh7750cpg.c b/drivers/clk/sh/clk-sh7750cpg.c
new file mode 100644
index 0000000..a538be4
--- /dev/null
+++ b/drivers/clk/sh/clk-sh7750cpg.c
@@ -0,0 +1,344 @@
+/*
+ * Renesas SH7750/51 clock driver
+ *
+ * Copyright 2016 Yoshinori Sato <ysato@users.sourceforge.jp>
+ */
+
+#include <linux/clk.h>
+#include <linux/clkdev.h>
+#include <linux/clk-provider.h>
+#include <linux/err.h>
+#include <linux/of.h>
+#include <linux/of_address.h>
+#include <linux/io.h>
+#include <linux/slab.h>
+
+/* Available FREQCR settings */
+static const int freqcr_table[] = {
+ 0x0400, 0x0401, 0x0402, 0x0403, 0x0404, 0x0408,
+ 0x0409, 0x040a, 0x040b, 0x040c, 0x0411, 0x0412,
+ 0x0413, 0x0414, 0x041a, 0x041b, 0x041c, 0x0423,
+ 0x0424, 0x0448, 0x0449, 0x044a, 0x044b, 0x044c,
+ 0x0451, 0x0452, 0x0453, 0x0454, 0x045a, 0x045b,
+ 0x045c, 0x0463, 0x0464, 0x0491, 0x0492, 0x0493,
+ 0x0494, 0x049a, 0x049b, 0x049c, 0x04a3, 0x04a4,
+ 0x04da, 0x04db, 0x04dc, 0x04e3, 0x04e4, 0x0523,
+ 0x0524, 0x0000, 0x0001, 0x0002, 0x0003, 0x0004,
+ 0x0008, 0x0009, 0x000a, 0x000b, 0x000c, 0x0011,
+ 0x0012, 0x0013, 0x0014, 0x0019, 0x001a, 0x001b,
+ 0x001c, 0x0023, 0x0024, 0x0048, 0x0049, 0x004a,
+ 0x004b, 0x004c, 0x0051, 0x0052, 0x0053, 0x0054,
+ 0x0059, 0x005a, 0x005b, 0x005c, 0x0063, 0x0064,
+ 0x0091, 0x0092, 0x0093, 0x0094, 0x0099, 0x009a,
+ 0x009b, 0x009c, 0x00a3, 0x00a4, 0x00d1, 0x00d2,
+ 0x00d3, 0x00d4, 0x00d9, 0x00da, 0x00db, 0x00dc,
+ 0x00e3, 0x00e4, 0x0123, 0x0124, 0x0163, 0x0164,
+};
+
+struct priv {
+ void __iomem *freqcr;
+ void __iomem *clkstp;
+ int mult;
+ struct clk **clks;
+};
+
+struct cpg_clock {
+ struct clk_hw hw;
+ struct priv *priv;
+ int index;
+};
+
+struct clockname {
+ char *name;
+ int index;
+};
+
+static const struct clockname clocknames[] __initconst = {
+ { .name = "sci", .index = 0 },
+ { .name = "rtc", .index = 1 },
+ { .name = "tmu0", .index = 2 },
+ { .name = "tmu1", .index = 2 },
+ { .name = "tmu2", .index = 2 },
+ { .name = "scif", .index = 3 },
+ { .name = "dmac", .index = 4 },
+ { .name = "ubc", .index = 8 },
+ { .name = "sq", .index = 9 },
+ { .name = "intc", .index = 16 },
+ { .name = "tmu3", .index = 17 },
+ { .name = "tmu4", .index = 17 },
+ { .name = "pcic", .index = 18 },
+ { .name = "core", .index = 128 },
+};
+
+static const int iclk_div[] = {1, 2, 3, 4, 6, 8, 0, 0};
+static const int pclk_div[] = {2, 3, 4, 6, 8, 0, 0, 0};
+
+static DEFINE_SPINLOCK(clklock);
+
+#define to_cpg_clock(_hw) container_of(_hw, struct cpg_clock, hw)
+
+static unsigned long pllout(u16 freqcr, unsigned long parent_rate, int mult)
+{
+ if ((freqcr >> 10) & 1)
+ return parent_rate * mult;
+ else
+ return parent_rate;
+}
+
+static unsigned long cpg_recalc_rate(struct clk_hw *hw,
+ unsigned long parent_rate)
+{
+ struct cpg_clock *cpg_clock = to_cpg_clock(hw);
+ struct priv *priv = cpg_clock->priv;
+ unsigned long div;
+ u16 freqcr;
+
+ freqcr = ioread16(priv->freqcr);
+ if (cpg_clock->index == 128)
+ div = iclk_div[(freqcr >> 6) & 7];
+ else
+ div = pclk_div[freqcr & 7];
+ return pllout(freqcr, parent_rate, priv->mult) / div;
+}
+
+static u16 get_best_freqcr(unsigned long rate,
+ unsigned long pclk_rate,
+ unsigned long parent, int mult)
+{
+ int i;
+ int div;
+ u16 freqcr;
+
+ for (i = 0; i < ARRAY_SIZE(freqcr_table); i++) {
+ freqcr = freqcr_table[i];
+ if (pllout(freqcr, parent, mult) / pclk_div[freqcr & 7]
+ != pclk_rate)
+ continue;
+ div = iclk_div[(freqcr >> 6) & 7];
+ if (pllout(freqcr, parent, mult) / div < rate)
+ return freqcr;
+ }
+ return 0;
+}
+
+static long cpg_round_rate(struct clk_hw *hw, unsigned long rate,
+ unsigned long *prate)
+{
+ struct cpg_clock *cpg_clock = to_cpg_clock(hw);
+ struct priv *priv = cpg_clock->priv;
+ unsigned long pclk_rate;
+ u16 freqcr;
+ int div;
+
+ freqcr = ioread16(priv->freqcr);
+ pclk_rate = pllout(freqcr, *prate, priv->mult) / pclk_div[freqcr & 7];
+
+ freqcr = get_best_freqcr(rate, pclk_rate, *prate, priv->mult);
+ if (cpg_clock->index == 128)
+ div = iclk_div[(freqcr >> 6) & 7];
+ else
+ div = pclk_div[freqcr & 7];
+
+ return pllout(freqcr, *prate, priv->mult) / div;
+}
+
+static int cpg_set_rate(struct clk_hw *hw, unsigned long rate,
+ unsigned long parent_rate)
+{
+ struct cpg_clock *cpg_clock = to_cpg_clock(hw);
+ struct priv *priv = cpg_clock->priv;
+ unsigned long flags;
+ unsigned long pclk_rate;
+ u16 freqcr, new_freqcr;
+
+ if (cpg_clock->index != 128)
+ return 0;
+
+ freqcr = ioread16(priv->freqcr);
+ pclk_rate = pllout(freqcr, parent_rate, priv->mult) /
+ pclk_div[freqcr & 7];
+
+ new_freqcr = get_best_freqcr(rate, pclk_rate, parent_rate, priv->mult);
+
+ if ((freqcr & 0x0200) == 0 && (new_freqcr & 0x0200) != 0) {
+ /* PLL on */
+ /* required stable time */
+ spin_lock_irqsave(&clklock, flags);
+ iowrite16(0x5a00, priv->freqcr + 8);
+ iowrite16(0xa503, priv->freqcr + 12);
+ iowrite16(new_freqcr, priv->freqcr);
+ spin_unlock_irqrestore(&clklock, flags);
+ } else {
+ /* PLL state no change */
+ /* not required stable time */
+ iowrite16(new_freqcr, priv->freqcr);
+ }
+ return 0;
+}
+
+static int cpg_enable(struct clk_hw *hw)
+{
+ struct cpg_clock *cpg_clock = to_cpg_clock(hw);
+ struct priv *priv = cpg_clock->priv;
+ u8 stbcr;
+
+ switch ((cpg_clock->index >> 3) & 3) {
+ case 0:
+ /* STBCR */
+ stbcr = ioread8(priv->freqcr + 4);
+ stbcr &= ~(1 << (cpg_clock->index & 7));
+ iowrite8(stbcr, priv->freqcr + 4);
+ break;
+ case 1:
+ /* STBCR2 */
+ stbcr = ioread8(priv->freqcr + 16);
+ stbcr &= ~(1 << (cpg_clock->index & 7));
+ iowrite8(stbcr, priv->freqcr + 16);
+ break;
+ case 2:
+ /* CLKSTPCLR00 */
+ iowrite32(1 << (cpg_clock->index - 16), priv->clkstp + 8);
+ break;
+ }
+ return 0;
+}
+
+static void cpg_disable(struct clk_hw *hw)
+{
+ struct cpg_clock *cpg_clock = to_cpg_clock(hw);
+ struct priv *priv = cpg_clock->priv;
+ u8 stbcr;
+
+ switch ((cpg_clock->index >> 3) & 3) {
+ case 0:
+ /* STBCR */
+ stbcr = ioread8(priv->freqcr + 4);
+ stbcr |= (1 << (cpg_clock->index & 7));
+ iowrite8(stbcr, priv->freqcr + 4);
+ break;
+ case 1:
+ /* STBCR2 */
+ stbcr = ioread8(priv->freqcr + 16);
+ stbcr |= (1 << (cpg_clock->index & 7));
+ iowrite8(stbcr, priv->freqcr + 16);
+ break;
+ case 2:
+ /* CLKSTP00 */
+ iowrite32(1 << (cpg_clock->index - 16), priv->clkstp);
+ break;
+ }
+}
+
+struct clk *sh7750_onecell_get(struct of_phandle_args *clkspec, void *data)
+{
+ struct priv *priv = data;
+ unsigned int idx = clkspec->args[0];
+
+ if (idx >= ARRAY_SIZE(clocknames)) {
+ pr_err("%s: invalid clock index %u\n", __func__, idx);
+ return ERR_PTR(-EINVAL);
+ }
+
+ return priv->clks[idx];
+}
+
+static const struct clk_ops cpg_ops = {
+ .recalc_rate = cpg_recalc_rate,
+ .round_rate = cpg_round_rate,
+ .set_rate = cpg_set_rate,
+ .enable = cpg_enable,
+ .disable = cpg_disable,
+};
+
+static struct clk * __init sh7750_cpg_register(struct device_node *node,
+ const struct clockname *name,
+ const char *parent_name,
+ struct priv *priv)
+{
+ struct cpg_clock *cpg_clock;
+ struct clk_init_data init;
+ struct clk *clk;
+
+ cpg_clock = kzalloc(sizeof(struct cpg_clock), GFP_KERNEL);
+ if (!cpg_clock) {
+ pr_err("%s: failed to alloc memory", name->name);
+ return NULL;
+ }
+
+ init.name = name->name;
+ init.ops = &cpg_ops;
+ init.flags = CLK_IS_BASIC;
+ init.parent_names = &parent_name;
+ init.num_parents = 1;
+ cpg_clock->hw.init = &init;
+ cpg_clock->priv = priv;
+ cpg_clock->index = name->index;
+
+ clk = clk_register(NULL, &cpg_clock->hw);
+ if (IS_ERR(clk)) {
+ pr_err("%s: failed to register %s pll clock (%ld)\n",
+ __func__, name->name, PTR_ERR(clk));
+ return NULL;
+ }
+ return clk;
+}
+
+static void __init sh7750_cpg_setup(struct device_node *node)
+{
+ const char *parent_name;
+ struct priv *priv;
+ int i;
+
+ priv = kzalloc(sizeof(struct priv), GFP_KERNEL);
+ if (priv == NULL) {
+ pr_err("%s: failed to alloc memory",
+ node->name);
+ return;
+ }
+ priv->clks = kmalloc_array(sizeof(priv->clks), ARRAY_SIZE(clocknames),
+ GFP_KERNEL);
+ if (priv->clks == NULL) {
+ pr_err("%s: failed to alloc memory",
+ node->name);
+ kfree(priv);
+ return;
+ }
+ for (i = 0; i < ARRAY_SIZE(clocknames); i++)
+ priv->clks[i] = ERR_PTR(-ENOENT);
+
+ priv->freqcr = of_iomap(node, 0);
+ if (priv->freqcr == NULL) {
+ pr_err("%s: failed to map frequenct control register",
+ node->name);
+ goto free_clock;
+ }
+
+ /* Optional register */
+ priv->clkstp = of_iomap(node, 1);
+
+ of_property_read_u32_index(node, "renesas,mult", 0, &priv->mult);
+
+ parent_name = of_clk_get_parent_name(node, 0);
+
+ for (i = 0; i < ARRAY_SIZE(clocknames); i++) {
+ priv->clks[i] = sh7750_cpg_register(node, &clocknames[i],
+ parent_name, priv);
+ if (priv->clks[i] == NULL)
+ goto unmap_reg;
+ }
+ of_clk_add_provider(node, sh7750_onecell_get, priv);
+ return;
+
+unmap_reg:
+ if (priv->clkstp)
+ iounmap(priv->clkstp);
+ iounmap(priv->freqcr);
+free_clock:
+ for (i = 0; i < ARRAY_SIZE(clocknames); i++)
+ if (priv->clks[i] != ERR_PTR(-ENOENT) && priv->clks[i])
+ clk_unregister(priv->clks[i]);
+ kfree(priv->clks);
+ kfree(priv);
+}
+
+CLK_OF_DECLARE(sh7750_cpg, "renesas,sh7750-cpg", sh7750_cpg_setup);
--
2.7.0
^ permalink raw reply related [flat|nested] 138+ messages in thread
[parent not found: <1467564402-2649-1-git-send-email-ysato-Rn4VEauK+AKRv+LV9MX5uooqe+aC9MnS@public.gmane.org>]
* [PATCH v6 12/22] sh: Add PCI host bridge driver for SH7751
2016-07-03 16:46 ` Yoshinori Sato
(?)
@ 2016-07-03 16:46 ` Yoshinori Sato
-1 siblings, 0 replies; 138+ messages in thread
From: Yoshinori Sato @ 2016-07-03 16:46 UTC (permalink / raw)
To: devicetree-u79uwXL29TY76Z2rM5mHXA,
linux-pci-u79uwXL29TY76Z2rM5mHXA,
linux-sh-u79uwXL29TY76Z2rM5mHXA,
linux-kernel-u79uwXL29TY76Z2rM5mHXA
Cc: Yoshinori Sato
This is an alternative SH7751 PCI driver.
Existing driver (arch/sh/drivers/pci/pci-sh7751) uses SH specific interface.
But this driver uses common PCI interface. It is more modern and generic.
Signed-off-by: Yoshinori Sato <ysato@users.sourceforge.jp>
---
.../devicetree/bindings/pci/sh7751-pci.txt | 37 +++
arch/sh/boards/Kconfig | 1 +
arch/sh/drivers/Makefile | 2 +
drivers/pci/host/Kconfig | 7 +
drivers/pci/host/Makefile | 1 +
drivers/pci/host/pci-sh7751.c | 327 +++++++++++++++++++++
6 files changed, 375 insertions(+)
create mode 100644 Documentation/devicetree/bindings/pci/sh7751-pci.txt
create mode 100644 drivers/pci/host/pci-sh7751.c
diff --git a/Documentation/devicetree/bindings/pci/sh7751-pci.txt b/Documentation/devicetree/bindings/pci/sh7751-pci.txt
new file mode 100644
index 0000000..2df9af6
--- /dev/null
+++ b/Documentation/devicetree/bindings/pci/sh7751-pci.txt
@@ -0,0 +1,37 @@
+* Renesas SH7751 PCI host interfaces
+
+Required properties:
+ - compatible: "renesas,sh7751-pci" is required.
+ And board specific compatible if fixup required.
+ - reg: contain two entries.
+ first entry: PCI controller register base address and length.
+ second entry: BUS controller register base address and length.
+ - #address-cells: set to <2>
+ - #size-cells: set to <1>
+ - bus-range: PCI bus numbers covered
+ - device_type: set to "pci"
+ - ranges: ranges for the PCI memory and I/O regions.
+ - interrupt-map-mask and interrupt-map: standard PCI properties
+ to define the mapping of the PCI interface to interrupt
+ numbers.
+
+Example:
+ pci: pci-controller@fe200000 {
+ compatible = "renesas,sh7751-pci", "iodata,landisk";
+ device_type = "pci";
+ bus-range = <0 0>;
+ #address-cells = <2>;
+ #size-cells = <1>;
+ ranges = <0x02000000 0x00000000 0xfd000000 0xfd000000 0x00000000 0x01000000>,
+ <0x01000000 0x00000000 0xfe240000 0x00000000 0x00000000 0x00040000>;
+ reg = <0xfe200000 0x0400>,
+ <0xff800000 0x0030>;
+ #interrupt-cells = <1>;
+ interrupt-map-mask = <0x1800 0 7>;
+ interrupt-map = <0x0000 0 1 &cpldintc 0 0>,
+ <0x0800 0 1 &cpldintc 1 0>,
+ <0x1000 0 1 &cpldintc 2 0>,
+ <0x1800 0 1 &cpldintc 3 0>,
+ <0x1800 0 2 &cpldintc 0 0>;
+ };
+};
diff --git a/arch/sh/boards/Kconfig b/arch/sh/boards/Kconfig
index b6ff9df..cfde921 100644
--- a/arch/sh/boards/Kconfig
+++ b/arch/sh/boards/Kconfig
@@ -14,6 +14,7 @@ config SH_DEVICE_TREE
select GENERIC_CALIBRATE_DELAY
select GENERIC_IOMAP
select COMMON_CLK
+ select SYS_SUPPORTS_PCI
help
Select Board Described by Device Tree to build a kernel that
does not hard-code any board-specific knowledge but instead uses
diff --git a/arch/sh/drivers/Makefile b/arch/sh/drivers/Makefile
index e13f06b..382e86f 100644
--- a/arch/sh/drivers/Makefile
+++ b/arch/sh/drivers/Makefile
@@ -4,7 +4,9 @@
obj-y += dma/
+ifndef CONFIG_SH_DEVICE_TREE
obj-$(CONFIG_PCI) += pci/
+endif
obj-$(CONFIG_SUPERHYWAY) += superhyway/
obj-$(CONFIG_PUSH_SWITCH) += push-switch.o
obj-$(CONFIG_HEARTBEAT) += heartbeat.o
diff --git a/drivers/pci/host/Kconfig b/drivers/pci/host/Kconfig
index 5d2374e..df60505 100644
--- a/drivers/pci/host/Kconfig
+++ b/drivers/pci/host/Kconfig
@@ -245,4 +245,11 @@ config PCIE_ARMADA_8K
Designware hardware and therefore the driver re-uses the
Designware core functions to implement the driver.
+config PCI_SH7751
+ bool "Renesas SH7751 On-Chip PCI controller"
+ depends on OF && SUPERH
+ select PCI_HOST_COMMON
+ help
+ Say Y here if you want PCI support on SH7751.
+
endmenu
diff --git a/drivers/pci/host/Makefile b/drivers/pci/host/Makefile
index 9c8698e..4681e49 100644
--- a/drivers/pci/host/Makefile
+++ b/drivers/pci/host/Makefile
@@ -29,3 +29,4 @@ obj-$(CONFIG_PCIE_QCOM) += pcie-qcom.o
obj-$(CONFIG_PCI_HOST_THUNDER_ECAM) += pci-thunder-ecam.o
obj-$(CONFIG_PCI_HOST_THUNDER_PEM) += pci-thunder-pem.o
obj-$(CONFIG_PCIE_ARMADA_8K) += pcie-armada8k.o
+obj-$(CONFIG_PCI_SH7751) += pci-sh7751.o
diff --git a/drivers/pci/host/pci-sh7751.c b/drivers/pci/host/pci-sh7751.c
new file mode 100644
index 0000000..21601f1
--- /dev/null
+++ b/drivers/pci/host/pci-sh7751.c
@@ -0,0 +1,327 @@
+/*
+ * SH7751 PCI driver
+ * Copyright (C) 2016 Yoshinori Sato
+ */
+
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/of_address.h>
+#include <linux/of_pci.h>
+#include <linux/of_platform.h>
+#include <linux/pci.h>
+#include <linux/platform_device.h>
+#include <linux/io.h>
+#include "../ecam.h"
+
+#define SH7751_PCICONF1 0x4 /* PCI Config Reg 1 */
+#define SH7751_PCICONF4 0x10 /* PCI Config Reg 4 */
+#define SH7751_PCICONF5 0x14 /* PCI Config Reg 5 */
+#define SH7751_PCICONF6 0x18 /* PCI Config Reg 6 */
+#define SH4_PCICR 0x100 /* PCI Control Register */
+ #define SH4_PCICR_PREFIX 0xA5000000 /* CR prefix for write */
+ #define SH4_PCICR_FTO BIT(10) /* TRDY/IRDY Enable */
+ #define SH4_PCICR_TRSB BIT(9) /* Target Read Single */
+ #define SH4_PCICR_BSWP BIT(8) /* Target Byte Swap */
+ #define SH4_PCICR_PLUP BIT(7) /* Enable PCI Pullup */
+ #define SH4_PCICR_ARBM BIT(6) /* PCI Arbitration Mode */
+#define SH4_PCICR_MD (BIT(4) | BIT(5)) /* MD9 and MD10 status */
+ #define SH4_PCICR_SERR BIT(3) /* SERR output assert */
+ #define SH4_PCICR_INTA BIT(2) /* INTA output assert */
+ #define SH4_PCICR_PRST BIT(1) /* PCI Reset Assert */
+ #define SH4_PCICR_CFIN BIT(0) /* Central Fun. Init Done */
+#define SH4_PCILSR0 0x104 /* PCI Local Space Register0 */
+#define SH4_PCILSR1 0x108 /* PCI Local Space Register1 */
+#define SH4_PCILAR0 0x10C /* PCI Local Addr Register1 */
+#define SH4_PCILAR1 0x110 /* PCI Local Addr Register1 */
+#define SH4_PCIINTM 0x118 /* PCI Interrupt Mask */
+ #define SH4_PCIINTM_TTADIM BIT(14) /* Target-target abort interrupt */
+ #define SH4_PCIINTM_TMTOIM BIT(9) /* Target retry timeout */
+ #define SH4_PCIINTM_MDEIM BIT(8) /* Master function disable error */
+ #define SH4_PCIINTM_APEDIM BIT(7) /* Address parity error detection */
+ #define SH4_PCIINTM_SDIM BIT(6) /* SERR detection */
+ #define SH4_PCIINTM_DPEITWM BIT(5) /* Data parity error for target write */
+ #define SH4_PCIINTM_PEDITRM BIT(4) /* PERR detection for target read */
+ #define SH4_PCIINTM_TADIMM BIT(3) /* Target abort for master */
+ #define SH4_PCIINTM_MADIMM BIT(2) /* Master abort for master */
+ #define SH4_PCIINTM_MWPDIM BIT(1) /* Master write data parity error */
+ #define SH4_PCIINTM_MRDPEIM BIT(0) /* Master read data parity error */
+#define SH4_PCIAINTM 0x134 /* Arbiter Int. Mask Register */
+#define SH4_PCIPAR 0x1C0 /* PIO Address Register */
+ #define SH4_PCIPAR_CFGEN 0x80000000 /* Configuration Enable */
+ #define SH4_PCIPAR_BUSNO 0x00FF0000 /* Config. Bus Number */
+ #define SH4_PCIPAR_DEVNO 0x0000FF00 /* Config. Device Number */
+ #define SH4_PCIPAR_REGAD 0x000000FC /* Register Address Number */
+#define SH4_PCIPINT 0x1CC /* Power Mgmnt Int. Register */
+ #define SH4_PCIPINT_D3 0x00000002 /* D3 Pwr Mgmt. Interrupt */
+ #define SH4_PCIPINT_D0 0x00000001 /* D0 Pwr Mgmt. Interrupt */
+#define SH4_PCICLKR 0x1D4 /* Clock Ctrl. Register */
+/* For definitions of BCR, MCR see ... */
+#define SH4_PCIBCR1 0x1E0 /* Memory BCR1 Register */
+ #define SH4_PCIMBR0 SH4_PCIBCR1
+#define SH4_PCIBCR2 0x1E4 /* Memory BCR2 Register */
+ #define SH4_PCIMBMR0 SH4_PCIBCR2
+#define SH4_PCIWCR1 0x1E8 /* Wait Control 1 Register */
+#define SH4_PCIWCR2 0x1EC /* Wait Control 2 Register */
+#define SH4_PCIWCR3 0x1F0 /* Wait Control 3 Register */
+ #define SH4_PCIMBR2 SH4_PCIWCR3
+#define SH4_PCIMCR 0x1F4 /* Memory Control Register */
+#define SH4_PCIPDR 0x220 /* Port IO Data Register */
+
+/* Platform Specific Values */
+#define SH7751_VENDOR_ID 0x1054
+#define SH7751_DEVICE_ID 0x3505
+#define SH7751R_DEVICE_ID 0x350e
+
+/* Memory Control Registers */
+#define SH7751_BCR1 0x0000 /* Memory BCR1 Register */
+#define SH7751_BCR2 0x0004 /* Memory BCR2 Register */
+#define SH7751_BCR3 0x0050 /* Memory BCR3 Register */
+#define SH7751_WCR1 0x0008 /* Wait Control 1 Register */
+#define SH7751_WCR2 0x000C /* Wait Control 2 Register */
+#define SH7751_WCR3 0x0010 /* Wait Control 3 Register */
+#define SH7751_MCR 0x0014 /* Memory Control Register */
+
+#define pcic_writel(val, reg) iowrite32(val, pci_reg_base + (reg))
+#define pcic_readl(reg) ioread32(pci_reg_base + (reg))
+
+/*
+ * PCIC fixups
+ */
+
+#define PCIMCR_MRSET 0x40000000
+#define PCIMCR_RFSH 0x00000004
+
+static void __init landisk_fixup(void __iomem *pci_reg_base, void __iomem *bcr)
+{
+ unsigned long bcr1, mcr;
+
+ bcr1 = ioread32(bcr + SH7751_BCR1);
+ bcr1 |= 0x00080000; /* Enable Bit 19 BREQEN, set PCIC to slave */
+ pcic_writel(bcr1, SH4_PCIBCR1);
+
+ mcr = ioread32(bcr + SH7751_MCR);
+ mcr &= (~PCIMCR_MRSET) & (~PCIMCR_RFSH);
+ pcic_writel(mcr, SH4_PCIMCR);
+
+ pcic_writel(0x0c000000, PCI_BASE_ADDRESS_1);
+ pcic_writel(0xd0000000, PCI_BASE_ADDRESS_2);
+ pcic_writel(0x0c000000, SH4_PCILAR0);
+ pcic_writel(0x00000000, SH4_PCILAR1);
+}
+
+static void __init r2dplus_fixup(void __iomem *pci_reg_base, void __iomem *bcr)
+{
+ unsigned long bcr1, mcr;
+
+ bcr1 = ioread32(bcr + SH7751_BCR1);
+ bcr1 |= 0x40080000; /* Enable Bit 19 BREQEN, set PCIC to slave */
+ pcic_writel(bcr1, SH4_PCIBCR1);
+
+ /* Enable all interrupts, so we known what to fix */
+ pcic_writel(0x0000c3ff, SH4_PCIINTM);
+ pcic_writel(0x0000380f, SH4_PCIAINTM);
+
+ pcic_writel(0xfb900047, SH7751_PCICONF1);
+ pcic_writel(0xab000001, SH7751_PCICONF4);
+
+ mcr = ioread32(bcr + SH7751_MCR);
+ mcr &= (~PCIMCR_MRSET) & (~PCIMCR_RFSH);
+ pcic_writel(mcr, SH4_PCIMCR);
+
+ pcic_writel(0x0c000000, SH7751_PCICONF5);
+ pcic_writel(0xd0000000, SH7751_PCICONF6);
+ pcic_writel(0x0c000000, SH4_PCILAR0);
+ pcic_writel(0x00000000, SH4_PCILAR1);
+}
+
+/*
+ * Direct access to PCI hardware...
+ */
+#define CONFIG_CMD(bus, devfn, where) \
+ (0x80000000 | (bus->number << 16) | (devfn << 8) | (where & ~3))
+
+/*
+ * Functions for accessing PCI configuration space with type 1 accesses
+ */
+static void __iomem *sh7751_map_bus(struct pci_bus *bus,
+ unsigned int devfn, int where)
+{
+ struct pci_config_window *cfg = bus->sysdata;
+ void __iomem *pci_reg_base = (void __iomem *)cfg->res.start;
+
+ pcic_writel(CONFIG_CMD(bus, devfn, where), SH4_PCIPAR);
+ return pci_reg_base + SH4_PCIPDR;
+}
+
+static const struct of_device_id fixup_of_match[] = {
+ { .compatible = "iodata,landisk-pci", .data = landisk_fixup, },
+ { .compatible = "renesas,r2dplus-pci", .data = r2dplus_fixup, },
+ { },
+};
+
+static const struct of_device_id sh7751_pci_of_match[] = {
+ { .compatible = "renesas,sh7751-pci", },
+ { },
+};
+MODULE_DEVICE_TABLE(of, sh7751_pci_of_match);
+
+static resource_size_t sh7751_align_resource(struct pci_dev *dev,
+ const struct resource *res,
+ resource_size_t start,
+ resource_size_t size,
+ resource_size_t align)
+{
+ if (res->flags & IORESOURCE_IO) {
+ if (start < PCIBIOS_MIN_IO + 0x1000)
+ start = PCIBIOS_MIN_IO + 0x1000;
+
+ /*
+ * Put everything into 0x00-0xff region modulo 0x400.
+ */
+ if (start & 0x300)
+ start = (start + 0x3ff) & ~0x3ff;
+ }
+
+ return start;
+}
+
+static void __init set_pci_bcr(void __iomem *pci_reg_base,
+ void __iomem *bcr,
+ unsigned int area)
+{
+ unsigned long word;
+
+ word = ioread32(bcr + SH7751_BCR1);
+ /* check BCR for SDRAM in area */
+ if (((word >> area) & 1) = 0) {
+ pr_info("PCI: Area %d is not configured for SDRAM. BCR1=0x%lx\n",
+ area, word);
+ return;
+ }
+ pcic_writel(word, SH4_PCIBCR1);
+
+ word = ioread16(bcr + SH7751_BCR2);
+ /* check BCR2 for 32bit SDRAM interface*/
+ if (((word >> (area << 1)) & 0x3) != 0x3) {
+ pr_info("PCI: Area %d is not 32 bit SDRAM. BCR2=0x%lx\n",
+ area, word);
+ return;
+ }
+ pcic_writel(word, SH4_PCIBCR2);
+}
+
+static __init int sh7751_cfg_init(struct device *dev,
+ struct pci_config_window *cfg)
+{
+ cfg->priv = sh7751_align_resource;
+ return 0;
+}
+
+static struct pci_ecam_ops ecm_ops __initdata = {
+ .init = sh7751_cfg_init,
+ .pci_ops = {
+ .read = pci_generic_config_read32,
+ .write = pci_generic_config_write32,
+ .map_bus = sh7751_map_bus,
+ }
+};
+
+static __init int sh7751_pci_probe(struct platform_device *pdev)
+{
+ struct resource *res;
+ u32 id;
+ u32 reg, word;
+ void __iomem *pci_reg_base;
+ void __iomem *bcr;
+ const struct of_device_id *match;
+ void (*fixup_fn)(void __iomem *pci_reg_base, void __iomem *bcr);
+
+ res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+ pci_reg_base = ioremap(res->start, resource_size(res));
+ if (IS_ERR(pci_reg_base))
+ return PTR_ERR(pci_reg_base);
+
+ res = platform_get_resource(pdev, IORESOURCE_MEM, 1);
+ bcr = ioremap(res->start, resource_size(res));
+ if (IS_ERR(bcr))
+ return PTR_ERR(bcr);
+
+ /* check for SH7751/SH7751R hardware */
+ id = pcic_readl(PCI_VENDOR_ID);
+ if (id != ((SH7751_DEVICE_ID << 16) | SH7751_VENDOR_ID) &&
+ id != ((SH7751R_DEVICE_ID << 16) | SH7751_VENDOR_ID)) {
+ pr_warn("PCI: This is not an SH7751(R)\n");
+ return -ENODEV;
+ }
+ dev_info(&pdev->dev, "PCI core found at %pR\n",
+ pci_reg_base);
+
+ /* Set the BCRs to enable PCI access */
+ reg = ioread32(bcr);
+ reg |= 0x80000;
+ iowrite32(reg, bcr);
+
+ /* Turn the clocks back on (not done in reset)*/
+ pcic_writel(0, SH4_PCICLKR);
+ /* Clear Powerdown IRQs (not done in reset) */
+ word = SH4_PCIPINT_D3 | SH4_PCIPINT_D0;
+ pcic_writel(word, SH4_PCIPINT);
+
+ /* set the command/status bits to:
+ * Wait Cycle Control + Parity Enable + Bus Master +
+ * Mem space enable
+ */
+ word = PCI_COMMAND_WAIT | PCI_COMMAND_PARITY |
+ PCI_COMMAND_MASTER | PCI_COMMAND_MEMORY;
+ pcic_writel(word, PCI_COMMAND);
+
+ /* define this host as the host bridge */
+ word = PCI_BASE_CLASS_BRIDGE << 24;
+ pcic_writel(word, PCI_CLASS_REVISION);
+
+ /* Set IO and Mem windows to local address
+ * Make PCI and local address the same for easy 1 to 1 mapping
+ */
+ word = memory_end - memory_start - 1;
+ pcic_writel(word, SH4_PCILSR0);
+ /* Set the values on window 0 PCI config registers */
+ word = P2SEGADDR(__pa(memory_start));
+ pcic_writel(word, SH4_PCILAR0);
+ pcic_writel(word, PCI_BASE_ADDRESS_1);
+
+ set_pci_bcr(pci_reg_base, bcr, (__pa(memory_start) >> 27) & 0x07);
+
+ /* configure the wait control registers */
+ word = ioread32(bcr + SH7751_WCR1);
+ pcic_writel(word, SH4_PCIWCR1);
+ word = ioread32(bcr + SH7751_WCR2);
+ pcic_writel(word, SH4_PCIWCR2);
+ word = ioread32(bcr + SH7751_WCR3);
+ pcic_writel(word, SH4_PCIWCR3);
+ word = ioread32(bcr + SH7751_MCR);
+ pcic_writel(word, SH4_PCIMCR);
+
+ match = of_match_node(fixup_of_match, pdev->dev.of_node);
+ if (match) {
+ fixup_fn = match->data;
+ fixup_fn(pci_reg_base, bcr);
+ }
+ /*
+ * SH7751 init done, set central function init complete
+ * use round robin mode to stop a device starving/overruning
+ */
+ word = SH4_PCICR_PREFIX | SH4_PCICR_CFIN | SH4_PCICR_ARBM;
+ pcic_writel(word, SH4_PCICR);
+
+ return pci_host_common_probe(pdev, &ecm_ops);
+}
+
+static __refdata struct platform_driver sh7751_pci_driver = {
+ .driver = {
+ .name = "sh7751-pci",
+ .of_match_table = sh7751_pci_of_match,
+ .suppress_bind_attrs = true,
+ },
+ .probe = sh7751_pci_probe,
+};
+builtin_platform_driver(sh7751_pci_driver);
--
2.7.0
^ permalink raw reply related [flat|nested] 138+ messages in thread* [PATCH v6 12/22] sh: Add PCI host bridge driver for SH7751
@ 2016-07-03 16:46 ` Yoshinori Sato
0 siblings, 0 replies; 138+ messages in thread
From: Yoshinori Sato @ 2016-07-03 16:46 UTC (permalink / raw)
To: devicetree-u79uwXL29TY76Z2rM5mHXA,
linux-pci-u79uwXL29TY76Z2rM5mHXA,
linux-sh-u79uwXL29TY76Z2rM5mHXA,
linux-kernel-u79uwXL29TY76Z2rM5mHXA
Cc: Yoshinori Sato
This is an alternative SH7751 PCI driver.
Existing driver (arch/sh/drivers/pci/pci-sh7751) uses SH specific interface.
But this driver uses common PCI interface. It is more modern and generic.
Signed-off-by: Yoshinori Sato <ysato-Rn4VEauK+AKRv+LV9MX5uooqe+aC9MnS@public.gmane.org>
---
.../devicetree/bindings/pci/sh7751-pci.txt | 37 +++
arch/sh/boards/Kconfig | 1 +
arch/sh/drivers/Makefile | 2 +
drivers/pci/host/Kconfig | 7 +
drivers/pci/host/Makefile | 1 +
drivers/pci/host/pci-sh7751.c | 327 +++++++++++++++++++++
6 files changed, 375 insertions(+)
create mode 100644 Documentation/devicetree/bindings/pci/sh7751-pci.txt
create mode 100644 drivers/pci/host/pci-sh7751.c
diff --git a/Documentation/devicetree/bindings/pci/sh7751-pci.txt b/Documentation/devicetree/bindings/pci/sh7751-pci.txt
new file mode 100644
index 0000000..2df9af6
--- /dev/null
+++ b/Documentation/devicetree/bindings/pci/sh7751-pci.txt
@@ -0,0 +1,37 @@
+* Renesas SH7751 PCI host interfaces
+
+Required properties:
+ - compatible: "renesas,sh7751-pci" is required.
+ And board specific compatible if fixup required.
+ - reg: contain two entries.
+ first entry: PCI controller register base address and length.
+ second entry: BUS controller register base address and length.
+ - #address-cells: set to <2>
+ - #size-cells: set to <1>
+ - bus-range: PCI bus numbers covered
+ - device_type: set to "pci"
+ - ranges: ranges for the PCI memory and I/O regions.
+ - interrupt-map-mask and interrupt-map: standard PCI properties
+ to define the mapping of the PCI interface to interrupt
+ numbers.
+
+Example:
+ pci: pci-controller@fe200000 {
+ compatible = "renesas,sh7751-pci", "iodata,landisk";
+ device_type = "pci";
+ bus-range = <0 0>;
+ #address-cells = <2>;
+ #size-cells = <1>;
+ ranges = <0x02000000 0x00000000 0xfd000000 0xfd000000 0x00000000 0x01000000>,
+ <0x01000000 0x00000000 0xfe240000 0x00000000 0x00000000 0x00040000>;
+ reg = <0xfe200000 0x0400>,
+ <0xff800000 0x0030>;
+ #interrupt-cells = <1>;
+ interrupt-map-mask = <0x1800 0 7>;
+ interrupt-map = <0x0000 0 1 &cpldintc 0 0>,
+ <0x0800 0 1 &cpldintc 1 0>,
+ <0x1000 0 1 &cpldintc 2 0>,
+ <0x1800 0 1 &cpldintc 3 0>,
+ <0x1800 0 2 &cpldintc 0 0>;
+ };
+};
diff --git a/arch/sh/boards/Kconfig b/arch/sh/boards/Kconfig
index b6ff9df..cfde921 100644
--- a/arch/sh/boards/Kconfig
+++ b/arch/sh/boards/Kconfig
@@ -14,6 +14,7 @@ config SH_DEVICE_TREE
select GENERIC_CALIBRATE_DELAY
select GENERIC_IOMAP
select COMMON_CLK
+ select SYS_SUPPORTS_PCI
help
Select Board Described by Device Tree to build a kernel that
does not hard-code any board-specific knowledge but instead uses
diff --git a/arch/sh/drivers/Makefile b/arch/sh/drivers/Makefile
index e13f06b..382e86f 100644
--- a/arch/sh/drivers/Makefile
+++ b/arch/sh/drivers/Makefile
@@ -4,7 +4,9 @@
obj-y += dma/
+ifndef CONFIG_SH_DEVICE_TREE
obj-$(CONFIG_PCI) += pci/
+endif
obj-$(CONFIG_SUPERHYWAY) += superhyway/
obj-$(CONFIG_PUSH_SWITCH) += push-switch.o
obj-$(CONFIG_HEARTBEAT) += heartbeat.o
diff --git a/drivers/pci/host/Kconfig b/drivers/pci/host/Kconfig
index 5d2374e..df60505 100644
--- a/drivers/pci/host/Kconfig
+++ b/drivers/pci/host/Kconfig
@@ -245,4 +245,11 @@ config PCIE_ARMADA_8K
Designware hardware and therefore the driver re-uses the
Designware core functions to implement the driver.
+config PCI_SH7751
+ bool "Renesas SH7751 On-Chip PCI controller"
+ depends on OF && SUPERH
+ select PCI_HOST_COMMON
+ help
+ Say Y here if you want PCI support on SH7751.
+
endmenu
diff --git a/drivers/pci/host/Makefile b/drivers/pci/host/Makefile
index 9c8698e..4681e49 100644
--- a/drivers/pci/host/Makefile
+++ b/drivers/pci/host/Makefile
@@ -29,3 +29,4 @@ obj-$(CONFIG_PCIE_QCOM) += pcie-qcom.o
obj-$(CONFIG_PCI_HOST_THUNDER_ECAM) += pci-thunder-ecam.o
obj-$(CONFIG_PCI_HOST_THUNDER_PEM) += pci-thunder-pem.o
obj-$(CONFIG_PCIE_ARMADA_8K) += pcie-armada8k.o
+obj-$(CONFIG_PCI_SH7751) += pci-sh7751.o
diff --git a/drivers/pci/host/pci-sh7751.c b/drivers/pci/host/pci-sh7751.c
new file mode 100644
index 0000000..21601f1
--- /dev/null
+++ b/drivers/pci/host/pci-sh7751.c
@@ -0,0 +1,327 @@
+/*
+ * SH7751 PCI driver
+ * Copyright (C) 2016 Yoshinori Sato
+ */
+
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/of_address.h>
+#include <linux/of_pci.h>
+#include <linux/of_platform.h>
+#include <linux/pci.h>
+#include <linux/platform_device.h>
+#include <linux/io.h>
+#include "../ecam.h"
+
+#define SH7751_PCICONF1 0x4 /* PCI Config Reg 1 */
+#define SH7751_PCICONF4 0x10 /* PCI Config Reg 4 */
+#define SH7751_PCICONF5 0x14 /* PCI Config Reg 5 */
+#define SH7751_PCICONF6 0x18 /* PCI Config Reg 6 */
+#define SH4_PCICR 0x100 /* PCI Control Register */
+ #define SH4_PCICR_PREFIX 0xA5000000 /* CR prefix for write */
+ #define SH4_PCICR_FTO BIT(10) /* TRDY/IRDY Enable */
+ #define SH4_PCICR_TRSB BIT(9) /* Target Read Single */
+ #define SH4_PCICR_BSWP BIT(8) /* Target Byte Swap */
+ #define SH4_PCICR_PLUP BIT(7) /* Enable PCI Pullup */
+ #define SH4_PCICR_ARBM BIT(6) /* PCI Arbitration Mode */
+#define SH4_PCICR_MD (BIT(4) | BIT(5)) /* MD9 and MD10 status */
+ #define SH4_PCICR_SERR BIT(3) /* SERR output assert */
+ #define SH4_PCICR_INTA BIT(2) /* INTA output assert */
+ #define SH4_PCICR_PRST BIT(1) /* PCI Reset Assert */
+ #define SH4_PCICR_CFIN BIT(0) /* Central Fun. Init Done */
+#define SH4_PCILSR0 0x104 /* PCI Local Space Register0 */
+#define SH4_PCILSR1 0x108 /* PCI Local Space Register1 */
+#define SH4_PCILAR0 0x10C /* PCI Local Addr Register1 */
+#define SH4_PCILAR1 0x110 /* PCI Local Addr Register1 */
+#define SH4_PCIINTM 0x118 /* PCI Interrupt Mask */
+ #define SH4_PCIINTM_TTADIM BIT(14) /* Target-target abort interrupt */
+ #define SH4_PCIINTM_TMTOIM BIT(9) /* Target retry timeout */
+ #define SH4_PCIINTM_MDEIM BIT(8) /* Master function disable error */
+ #define SH4_PCIINTM_APEDIM BIT(7) /* Address parity error detection */
+ #define SH4_PCIINTM_SDIM BIT(6) /* SERR detection */
+ #define SH4_PCIINTM_DPEITWM BIT(5) /* Data parity error for target write */
+ #define SH4_PCIINTM_PEDITRM BIT(4) /* PERR detection for target read */
+ #define SH4_PCIINTM_TADIMM BIT(3) /* Target abort for master */
+ #define SH4_PCIINTM_MADIMM BIT(2) /* Master abort for master */
+ #define SH4_PCIINTM_MWPDIM BIT(1) /* Master write data parity error */
+ #define SH4_PCIINTM_MRDPEIM BIT(0) /* Master read data parity error */
+#define SH4_PCIAINTM 0x134 /* Arbiter Int. Mask Register */
+#define SH4_PCIPAR 0x1C0 /* PIO Address Register */
+ #define SH4_PCIPAR_CFGEN 0x80000000 /* Configuration Enable */
+ #define SH4_PCIPAR_BUSNO 0x00FF0000 /* Config. Bus Number */
+ #define SH4_PCIPAR_DEVNO 0x0000FF00 /* Config. Device Number */
+ #define SH4_PCIPAR_REGAD 0x000000FC /* Register Address Number */
+#define SH4_PCIPINT 0x1CC /* Power Mgmnt Int. Register */
+ #define SH4_PCIPINT_D3 0x00000002 /* D3 Pwr Mgmt. Interrupt */
+ #define SH4_PCIPINT_D0 0x00000001 /* D0 Pwr Mgmt. Interrupt */
+#define SH4_PCICLKR 0x1D4 /* Clock Ctrl. Register */
+/* For definitions of BCR, MCR see ... */
+#define SH4_PCIBCR1 0x1E0 /* Memory BCR1 Register */
+ #define SH4_PCIMBR0 SH4_PCIBCR1
+#define SH4_PCIBCR2 0x1E4 /* Memory BCR2 Register */
+ #define SH4_PCIMBMR0 SH4_PCIBCR2
+#define SH4_PCIWCR1 0x1E8 /* Wait Control 1 Register */
+#define SH4_PCIWCR2 0x1EC /* Wait Control 2 Register */
+#define SH4_PCIWCR3 0x1F0 /* Wait Control 3 Register */
+ #define SH4_PCIMBR2 SH4_PCIWCR3
+#define SH4_PCIMCR 0x1F4 /* Memory Control Register */
+#define SH4_PCIPDR 0x220 /* Port IO Data Register */
+
+/* Platform Specific Values */
+#define SH7751_VENDOR_ID 0x1054
+#define SH7751_DEVICE_ID 0x3505
+#define SH7751R_DEVICE_ID 0x350e
+
+/* Memory Control Registers */
+#define SH7751_BCR1 0x0000 /* Memory BCR1 Register */
+#define SH7751_BCR2 0x0004 /* Memory BCR2 Register */
+#define SH7751_BCR3 0x0050 /* Memory BCR3 Register */
+#define SH7751_WCR1 0x0008 /* Wait Control 1 Register */
+#define SH7751_WCR2 0x000C /* Wait Control 2 Register */
+#define SH7751_WCR3 0x0010 /* Wait Control 3 Register */
+#define SH7751_MCR 0x0014 /* Memory Control Register */
+
+#define pcic_writel(val, reg) iowrite32(val, pci_reg_base + (reg))
+#define pcic_readl(reg) ioread32(pci_reg_base + (reg))
+
+/*
+ * PCIC fixups
+ */
+
+#define PCIMCR_MRSET 0x40000000
+#define PCIMCR_RFSH 0x00000004
+
+static void __init landisk_fixup(void __iomem *pci_reg_base, void __iomem *bcr)
+{
+ unsigned long bcr1, mcr;
+
+ bcr1 = ioread32(bcr + SH7751_BCR1);
+ bcr1 |= 0x00080000; /* Enable Bit 19 BREQEN, set PCIC to slave */
+ pcic_writel(bcr1, SH4_PCIBCR1);
+
+ mcr = ioread32(bcr + SH7751_MCR);
+ mcr &= (~PCIMCR_MRSET) & (~PCIMCR_RFSH);
+ pcic_writel(mcr, SH4_PCIMCR);
+
+ pcic_writel(0x0c000000, PCI_BASE_ADDRESS_1);
+ pcic_writel(0xd0000000, PCI_BASE_ADDRESS_2);
+ pcic_writel(0x0c000000, SH4_PCILAR0);
+ pcic_writel(0x00000000, SH4_PCILAR1);
+}
+
+static void __init r2dplus_fixup(void __iomem *pci_reg_base, void __iomem *bcr)
+{
+ unsigned long bcr1, mcr;
+
+ bcr1 = ioread32(bcr + SH7751_BCR1);
+ bcr1 |= 0x40080000; /* Enable Bit 19 BREQEN, set PCIC to slave */
+ pcic_writel(bcr1, SH4_PCIBCR1);
+
+ /* Enable all interrupts, so we known what to fix */
+ pcic_writel(0x0000c3ff, SH4_PCIINTM);
+ pcic_writel(0x0000380f, SH4_PCIAINTM);
+
+ pcic_writel(0xfb900047, SH7751_PCICONF1);
+ pcic_writel(0xab000001, SH7751_PCICONF4);
+
+ mcr = ioread32(bcr + SH7751_MCR);
+ mcr &= (~PCIMCR_MRSET) & (~PCIMCR_RFSH);
+ pcic_writel(mcr, SH4_PCIMCR);
+
+ pcic_writel(0x0c000000, SH7751_PCICONF5);
+ pcic_writel(0xd0000000, SH7751_PCICONF6);
+ pcic_writel(0x0c000000, SH4_PCILAR0);
+ pcic_writel(0x00000000, SH4_PCILAR1);
+}
+
+/*
+ * Direct access to PCI hardware...
+ */
+#define CONFIG_CMD(bus, devfn, where) \
+ (0x80000000 | (bus->number << 16) | (devfn << 8) | (where & ~3))
+
+/*
+ * Functions for accessing PCI configuration space with type 1 accesses
+ */
+static void __iomem *sh7751_map_bus(struct pci_bus *bus,
+ unsigned int devfn, int where)
+{
+ struct pci_config_window *cfg = bus->sysdata;
+ void __iomem *pci_reg_base = (void __iomem *)cfg->res.start;
+
+ pcic_writel(CONFIG_CMD(bus, devfn, where), SH4_PCIPAR);
+ return pci_reg_base + SH4_PCIPDR;
+}
+
+static const struct of_device_id fixup_of_match[] = {
+ { .compatible = "iodata,landisk-pci", .data = landisk_fixup, },
+ { .compatible = "renesas,r2dplus-pci", .data = r2dplus_fixup, },
+ { },
+};
+
+static const struct of_device_id sh7751_pci_of_match[] = {
+ { .compatible = "renesas,sh7751-pci", },
+ { },
+};
+MODULE_DEVICE_TABLE(of, sh7751_pci_of_match);
+
+static resource_size_t sh7751_align_resource(struct pci_dev *dev,
+ const struct resource *res,
+ resource_size_t start,
+ resource_size_t size,
+ resource_size_t align)
+{
+ if (res->flags & IORESOURCE_IO) {
+ if (start < PCIBIOS_MIN_IO + 0x1000)
+ start = PCIBIOS_MIN_IO + 0x1000;
+
+ /*
+ * Put everything into 0x00-0xff region modulo 0x400.
+ */
+ if (start & 0x300)
+ start = (start + 0x3ff) & ~0x3ff;
+ }
+
+ return start;
+}
+
+static void __init set_pci_bcr(void __iomem *pci_reg_base,
+ void __iomem *bcr,
+ unsigned int area)
+{
+ unsigned long word;
+
+ word = ioread32(bcr + SH7751_BCR1);
+ /* check BCR for SDRAM in area */
+ if (((word >> area) & 1) == 0) {
+ pr_info("PCI: Area %d is not configured for SDRAM. BCR1=0x%lx\n",
+ area, word);
+ return;
+ }
+ pcic_writel(word, SH4_PCIBCR1);
+
+ word = ioread16(bcr + SH7751_BCR2);
+ /* check BCR2 for 32bit SDRAM interface*/
+ if (((word >> (area << 1)) & 0x3) != 0x3) {
+ pr_info("PCI: Area %d is not 32 bit SDRAM. BCR2=0x%lx\n",
+ area, word);
+ return;
+ }
+ pcic_writel(word, SH4_PCIBCR2);
+}
+
+static __init int sh7751_cfg_init(struct device *dev,
+ struct pci_config_window *cfg)
+{
+ cfg->priv = sh7751_align_resource;
+ return 0;
+}
+
+static struct pci_ecam_ops ecm_ops __initdata = {
+ .init = sh7751_cfg_init,
+ .pci_ops = {
+ .read = pci_generic_config_read32,
+ .write = pci_generic_config_write32,
+ .map_bus = sh7751_map_bus,
+ }
+};
+
+static __init int sh7751_pci_probe(struct platform_device *pdev)
+{
+ struct resource *res;
+ u32 id;
+ u32 reg, word;
+ void __iomem *pci_reg_base;
+ void __iomem *bcr;
+ const struct of_device_id *match;
+ void (*fixup_fn)(void __iomem *pci_reg_base, void __iomem *bcr);
+
+ res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+ pci_reg_base = ioremap(res->start, resource_size(res));
+ if (IS_ERR(pci_reg_base))
+ return PTR_ERR(pci_reg_base);
+
+ res = platform_get_resource(pdev, IORESOURCE_MEM, 1);
+ bcr = ioremap(res->start, resource_size(res));
+ if (IS_ERR(bcr))
+ return PTR_ERR(bcr);
+
+ /* check for SH7751/SH7751R hardware */
+ id = pcic_readl(PCI_VENDOR_ID);
+ if (id != ((SH7751_DEVICE_ID << 16) | SH7751_VENDOR_ID) &&
+ id != ((SH7751R_DEVICE_ID << 16) | SH7751_VENDOR_ID)) {
+ pr_warn("PCI: This is not an SH7751(R)\n");
+ return -ENODEV;
+ }
+ dev_info(&pdev->dev, "PCI core found at %pR\n",
+ pci_reg_base);
+
+ /* Set the BCRs to enable PCI access */
+ reg = ioread32(bcr);
+ reg |= 0x80000;
+ iowrite32(reg, bcr);
+
+ /* Turn the clocks back on (not done in reset)*/
+ pcic_writel(0, SH4_PCICLKR);
+ /* Clear Powerdown IRQs (not done in reset) */
+ word = SH4_PCIPINT_D3 | SH4_PCIPINT_D0;
+ pcic_writel(word, SH4_PCIPINT);
+
+ /* set the command/status bits to:
+ * Wait Cycle Control + Parity Enable + Bus Master +
+ * Mem space enable
+ */
+ word = PCI_COMMAND_WAIT | PCI_COMMAND_PARITY |
+ PCI_COMMAND_MASTER | PCI_COMMAND_MEMORY;
+ pcic_writel(word, PCI_COMMAND);
+
+ /* define this host as the host bridge */
+ word = PCI_BASE_CLASS_BRIDGE << 24;
+ pcic_writel(word, PCI_CLASS_REVISION);
+
+ /* Set IO and Mem windows to local address
+ * Make PCI and local address the same for easy 1 to 1 mapping
+ */
+ word = memory_end - memory_start - 1;
+ pcic_writel(word, SH4_PCILSR0);
+ /* Set the values on window 0 PCI config registers */
+ word = P2SEGADDR(__pa(memory_start));
+ pcic_writel(word, SH4_PCILAR0);
+ pcic_writel(word, PCI_BASE_ADDRESS_1);
+
+ set_pci_bcr(pci_reg_base, bcr, (__pa(memory_start) >> 27) & 0x07);
+
+ /* configure the wait control registers */
+ word = ioread32(bcr + SH7751_WCR1);
+ pcic_writel(word, SH4_PCIWCR1);
+ word = ioread32(bcr + SH7751_WCR2);
+ pcic_writel(word, SH4_PCIWCR2);
+ word = ioread32(bcr + SH7751_WCR3);
+ pcic_writel(word, SH4_PCIWCR3);
+ word = ioread32(bcr + SH7751_MCR);
+ pcic_writel(word, SH4_PCIMCR);
+
+ match = of_match_node(fixup_of_match, pdev->dev.of_node);
+ if (match) {
+ fixup_fn = match->data;
+ fixup_fn(pci_reg_base, bcr);
+ }
+ /*
+ * SH7751 init done, set central function init complete
+ * use round robin mode to stop a device starving/overruning
+ */
+ word = SH4_PCICR_PREFIX | SH4_PCICR_CFIN | SH4_PCICR_ARBM;
+ pcic_writel(word, SH4_PCICR);
+
+ return pci_host_common_probe(pdev, &ecm_ops);
+}
+
+static __refdata struct platform_driver sh7751_pci_driver = {
+ .driver = {
+ .name = "sh7751-pci",
+ .of_match_table = sh7751_pci_of_match,
+ .suppress_bind_attrs = true,
+ },
+ .probe = sh7751_pci_probe,
+};
+builtin_platform_driver(sh7751_pci_driver);
--
2.7.0
--
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^ permalink raw reply related [flat|nested] 138+ messages in thread* [PATCH v6 12/22] sh: Add PCI host bridge driver for SH7751
@ 2016-07-03 16:46 ` Yoshinori Sato
0 siblings, 0 replies; 138+ messages in thread
From: Yoshinori Sato @ 2016-07-03 16:46 UTC (permalink / raw)
To: devicetree, linux-pci, linux-sh, linux-kernel; +Cc: Yoshinori Sato
This is an alternative SH7751 PCI driver.
Existing driver (arch/sh/drivers/pci/pci-sh7751) uses SH specific interface.
But this driver uses common PCI interface. It is more modern and generic.
Signed-off-by: Yoshinori Sato <ysato@users.sourceforge.jp>
---
.../devicetree/bindings/pci/sh7751-pci.txt | 37 +++
arch/sh/boards/Kconfig | 1 +
arch/sh/drivers/Makefile | 2 +
drivers/pci/host/Kconfig | 7 +
drivers/pci/host/Makefile | 1 +
drivers/pci/host/pci-sh7751.c | 327 +++++++++++++++++++++
6 files changed, 375 insertions(+)
create mode 100644 Documentation/devicetree/bindings/pci/sh7751-pci.txt
create mode 100644 drivers/pci/host/pci-sh7751.c
diff --git a/Documentation/devicetree/bindings/pci/sh7751-pci.txt b/Documentation/devicetree/bindings/pci/sh7751-pci.txt
new file mode 100644
index 0000000..2df9af6
--- /dev/null
+++ b/Documentation/devicetree/bindings/pci/sh7751-pci.txt
@@ -0,0 +1,37 @@
+* Renesas SH7751 PCI host interfaces
+
+Required properties:
+ - compatible: "renesas,sh7751-pci" is required.
+ And board specific compatible if fixup required.
+ - reg: contain two entries.
+ first entry: PCI controller register base address and length.
+ second entry: BUS controller register base address and length.
+ - #address-cells: set to <2>
+ - #size-cells: set to <1>
+ - bus-range: PCI bus numbers covered
+ - device_type: set to "pci"
+ - ranges: ranges for the PCI memory and I/O regions.
+ - interrupt-map-mask and interrupt-map: standard PCI properties
+ to define the mapping of the PCI interface to interrupt
+ numbers.
+
+Example:
+ pci: pci-controller@fe200000 {
+ compatible = "renesas,sh7751-pci", "iodata,landisk";
+ device_type = "pci";
+ bus-range = <0 0>;
+ #address-cells = <2>;
+ #size-cells = <1>;
+ ranges = <0x02000000 0x00000000 0xfd000000 0xfd000000 0x00000000 0x01000000>,
+ <0x01000000 0x00000000 0xfe240000 0x00000000 0x00000000 0x00040000>;
+ reg = <0xfe200000 0x0400>,
+ <0xff800000 0x0030>;
+ #interrupt-cells = <1>;
+ interrupt-map-mask = <0x1800 0 7>;
+ interrupt-map = <0x0000 0 1 &cpldintc 0 0>,
+ <0x0800 0 1 &cpldintc 1 0>,
+ <0x1000 0 1 &cpldintc 2 0>,
+ <0x1800 0 1 &cpldintc 3 0>,
+ <0x1800 0 2 &cpldintc 0 0>;
+ };
+};
diff --git a/arch/sh/boards/Kconfig b/arch/sh/boards/Kconfig
index b6ff9df..cfde921 100644
--- a/arch/sh/boards/Kconfig
+++ b/arch/sh/boards/Kconfig
@@ -14,6 +14,7 @@ config SH_DEVICE_TREE
select GENERIC_CALIBRATE_DELAY
select GENERIC_IOMAP
select COMMON_CLK
+ select SYS_SUPPORTS_PCI
help
Select Board Described by Device Tree to build a kernel that
does not hard-code any board-specific knowledge but instead uses
diff --git a/arch/sh/drivers/Makefile b/arch/sh/drivers/Makefile
index e13f06b..382e86f 100644
--- a/arch/sh/drivers/Makefile
+++ b/arch/sh/drivers/Makefile
@@ -4,7 +4,9 @@
obj-y += dma/
+ifndef CONFIG_SH_DEVICE_TREE
obj-$(CONFIG_PCI) += pci/
+endif
obj-$(CONFIG_SUPERHYWAY) += superhyway/
obj-$(CONFIG_PUSH_SWITCH) += push-switch.o
obj-$(CONFIG_HEARTBEAT) += heartbeat.o
diff --git a/drivers/pci/host/Kconfig b/drivers/pci/host/Kconfig
index 5d2374e..df60505 100644
--- a/drivers/pci/host/Kconfig
+++ b/drivers/pci/host/Kconfig
@@ -245,4 +245,11 @@ config PCIE_ARMADA_8K
Designware hardware and therefore the driver re-uses the
Designware core functions to implement the driver.
+config PCI_SH7751
+ bool "Renesas SH7751 On-Chip PCI controller"
+ depends on OF && SUPERH
+ select PCI_HOST_COMMON
+ help
+ Say Y here if you want PCI support on SH7751.
+
endmenu
diff --git a/drivers/pci/host/Makefile b/drivers/pci/host/Makefile
index 9c8698e..4681e49 100644
--- a/drivers/pci/host/Makefile
+++ b/drivers/pci/host/Makefile
@@ -29,3 +29,4 @@ obj-$(CONFIG_PCIE_QCOM) += pcie-qcom.o
obj-$(CONFIG_PCI_HOST_THUNDER_ECAM) += pci-thunder-ecam.o
obj-$(CONFIG_PCI_HOST_THUNDER_PEM) += pci-thunder-pem.o
obj-$(CONFIG_PCIE_ARMADA_8K) += pcie-armada8k.o
+obj-$(CONFIG_PCI_SH7751) += pci-sh7751.o
diff --git a/drivers/pci/host/pci-sh7751.c b/drivers/pci/host/pci-sh7751.c
new file mode 100644
index 0000000..21601f1
--- /dev/null
+++ b/drivers/pci/host/pci-sh7751.c
@@ -0,0 +1,327 @@
+/*
+ * SH7751 PCI driver
+ * Copyright (C) 2016 Yoshinori Sato
+ */
+
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/of_address.h>
+#include <linux/of_pci.h>
+#include <linux/of_platform.h>
+#include <linux/pci.h>
+#include <linux/platform_device.h>
+#include <linux/io.h>
+#include "../ecam.h"
+
+#define SH7751_PCICONF1 0x4 /* PCI Config Reg 1 */
+#define SH7751_PCICONF4 0x10 /* PCI Config Reg 4 */
+#define SH7751_PCICONF5 0x14 /* PCI Config Reg 5 */
+#define SH7751_PCICONF6 0x18 /* PCI Config Reg 6 */
+#define SH4_PCICR 0x100 /* PCI Control Register */
+ #define SH4_PCICR_PREFIX 0xA5000000 /* CR prefix for write */
+ #define SH4_PCICR_FTO BIT(10) /* TRDY/IRDY Enable */
+ #define SH4_PCICR_TRSB BIT(9) /* Target Read Single */
+ #define SH4_PCICR_BSWP BIT(8) /* Target Byte Swap */
+ #define SH4_PCICR_PLUP BIT(7) /* Enable PCI Pullup */
+ #define SH4_PCICR_ARBM BIT(6) /* PCI Arbitration Mode */
+#define SH4_PCICR_MD (BIT(4) | BIT(5)) /* MD9 and MD10 status */
+ #define SH4_PCICR_SERR BIT(3) /* SERR output assert */
+ #define SH4_PCICR_INTA BIT(2) /* INTA output assert */
+ #define SH4_PCICR_PRST BIT(1) /* PCI Reset Assert */
+ #define SH4_PCICR_CFIN BIT(0) /* Central Fun. Init Done */
+#define SH4_PCILSR0 0x104 /* PCI Local Space Register0 */
+#define SH4_PCILSR1 0x108 /* PCI Local Space Register1 */
+#define SH4_PCILAR0 0x10C /* PCI Local Addr Register1 */
+#define SH4_PCILAR1 0x110 /* PCI Local Addr Register1 */
+#define SH4_PCIINTM 0x118 /* PCI Interrupt Mask */
+ #define SH4_PCIINTM_TTADIM BIT(14) /* Target-target abort interrupt */
+ #define SH4_PCIINTM_TMTOIM BIT(9) /* Target retry timeout */
+ #define SH4_PCIINTM_MDEIM BIT(8) /* Master function disable error */
+ #define SH4_PCIINTM_APEDIM BIT(7) /* Address parity error detection */
+ #define SH4_PCIINTM_SDIM BIT(6) /* SERR detection */
+ #define SH4_PCIINTM_DPEITWM BIT(5) /* Data parity error for target write */
+ #define SH4_PCIINTM_PEDITRM BIT(4) /* PERR detection for target read */
+ #define SH4_PCIINTM_TADIMM BIT(3) /* Target abort for master */
+ #define SH4_PCIINTM_MADIMM BIT(2) /* Master abort for master */
+ #define SH4_PCIINTM_MWPDIM BIT(1) /* Master write data parity error */
+ #define SH4_PCIINTM_MRDPEIM BIT(0) /* Master read data parity error */
+#define SH4_PCIAINTM 0x134 /* Arbiter Int. Mask Register */
+#define SH4_PCIPAR 0x1C0 /* PIO Address Register */
+ #define SH4_PCIPAR_CFGEN 0x80000000 /* Configuration Enable */
+ #define SH4_PCIPAR_BUSNO 0x00FF0000 /* Config. Bus Number */
+ #define SH4_PCIPAR_DEVNO 0x0000FF00 /* Config. Device Number */
+ #define SH4_PCIPAR_REGAD 0x000000FC /* Register Address Number */
+#define SH4_PCIPINT 0x1CC /* Power Mgmnt Int. Register */
+ #define SH4_PCIPINT_D3 0x00000002 /* D3 Pwr Mgmt. Interrupt */
+ #define SH4_PCIPINT_D0 0x00000001 /* D0 Pwr Mgmt. Interrupt */
+#define SH4_PCICLKR 0x1D4 /* Clock Ctrl. Register */
+/* For definitions of BCR, MCR see ... */
+#define SH4_PCIBCR1 0x1E0 /* Memory BCR1 Register */
+ #define SH4_PCIMBR0 SH4_PCIBCR1
+#define SH4_PCIBCR2 0x1E4 /* Memory BCR2 Register */
+ #define SH4_PCIMBMR0 SH4_PCIBCR2
+#define SH4_PCIWCR1 0x1E8 /* Wait Control 1 Register */
+#define SH4_PCIWCR2 0x1EC /* Wait Control 2 Register */
+#define SH4_PCIWCR3 0x1F0 /* Wait Control 3 Register */
+ #define SH4_PCIMBR2 SH4_PCIWCR3
+#define SH4_PCIMCR 0x1F4 /* Memory Control Register */
+#define SH4_PCIPDR 0x220 /* Port IO Data Register */
+
+/* Platform Specific Values */
+#define SH7751_VENDOR_ID 0x1054
+#define SH7751_DEVICE_ID 0x3505
+#define SH7751R_DEVICE_ID 0x350e
+
+/* Memory Control Registers */
+#define SH7751_BCR1 0x0000 /* Memory BCR1 Register */
+#define SH7751_BCR2 0x0004 /* Memory BCR2 Register */
+#define SH7751_BCR3 0x0050 /* Memory BCR3 Register */
+#define SH7751_WCR1 0x0008 /* Wait Control 1 Register */
+#define SH7751_WCR2 0x000C /* Wait Control 2 Register */
+#define SH7751_WCR3 0x0010 /* Wait Control 3 Register */
+#define SH7751_MCR 0x0014 /* Memory Control Register */
+
+#define pcic_writel(val, reg) iowrite32(val, pci_reg_base + (reg))
+#define pcic_readl(reg) ioread32(pci_reg_base + (reg))
+
+/*
+ * PCIC fixups
+ */
+
+#define PCIMCR_MRSET 0x40000000
+#define PCIMCR_RFSH 0x00000004
+
+static void __init landisk_fixup(void __iomem *pci_reg_base, void __iomem *bcr)
+{
+ unsigned long bcr1, mcr;
+
+ bcr1 = ioread32(bcr + SH7751_BCR1);
+ bcr1 |= 0x00080000; /* Enable Bit 19 BREQEN, set PCIC to slave */
+ pcic_writel(bcr1, SH4_PCIBCR1);
+
+ mcr = ioread32(bcr + SH7751_MCR);
+ mcr &= (~PCIMCR_MRSET) & (~PCIMCR_RFSH);
+ pcic_writel(mcr, SH4_PCIMCR);
+
+ pcic_writel(0x0c000000, PCI_BASE_ADDRESS_1);
+ pcic_writel(0xd0000000, PCI_BASE_ADDRESS_2);
+ pcic_writel(0x0c000000, SH4_PCILAR0);
+ pcic_writel(0x00000000, SH4_PCILAR1);
+}
+
+static void __init r2dplus_fixup(void __iomem *pci_reg_base, void __iomem *bcr)
+{
+ unsigned long bcr1, mcr;
+
+ bcr1 = ioread32(bcr + SH7751_BCR1);
+ bcr1 |= 0x40080000; /* Enable Bit 19 BREQEN, set PCIC to slave */
+ pcic_writel(bcr1, SH4_PCIBCR1);
+
+ /* Enable all interrupts, so we known what to fix */
+ pcic_writel(0x0000c3ff, SH4_PCIINTM);
+ pcic_writel(0x0000380f, SH4_PCIAINTM);
+
+ pcic_writel(0xfb900047, SH7751_PCICONF1);
+ pcic_writel(0xab000001, SH7751_PCICONF4);
+
+ mcr = ioread32(bcr + SH7751_MCR);
+ mcr &= (~PCIMCR_MRSET) & (~PCIMCR_RFSH);
+ pcic_writel(mcr, SH4_PCIMCR);
+
+ pcic_writel(0x0c000000, SH7751_PCICONF5);
+ pcic_writel(0xd0000000, SH7751_PCICONF6);
+ pcic_writel(0x0c000000, SH4_PCILAR0);
+ pcic_writel(0x00000000, SH4_PCILAR1);
+}
+
+/*
+ * Direct access to PCI hardware...
+ */
+#define CONFIG_CMD(bus, devfn, where) \
+ (0x80000000 | (bus->number << 16) | (devfn << 8) | (where & ~3))
+
+/*
+ * Functions for accessing PCI configuration space with type 1 accesses
+ */
+static void __iomem *sh7751_map_bus(struct pci_bus *bus,
+ unsigned int devfn, int where)
+{
+ struct pci_config_window *cfg = bus->sysdata;
+ void __iomem *pci_reg_base = (void __iomem *)cfg->res.start;
+
+ pcic_writel(CONFIG_CMD(bus, devfn, where), SH4_PCIPAR);
+ return pci_reg_base + SH4_PCIPDR;
+}
+
+static const struct of_device_id fixup_of_match[] = {
+ { .compatible = "iodata,landisk-pci", .data = landisk_fixup, },
+ { .compatible = "renesas,r2dplus-pci", .data = r2dplus_fixup, },
+ { },
+};
+
+static const struct of_device_id sh7751_pci_of_match[] = {
+ { .compatible = "renesas,sh7751-pci", },
+ { },
+};
+MODULE_DEVICE_TABLE(of, sh7751_pci_of_match);
+
+static resource_size_t sh7751_align_resource(struct pci_dev *dev,
+ const struct resource *res,
+ resource_size_t start,
+ resource_size_t size,
+ resource_size_t align)
+{
+ if (res->flags & IORESOURCE_IO) {
+ if (start < PCIBIOS_MIN_IO + 0x1000)
+ start = PCIBIOS_MIN_IO + 0x1000;
+
+ /*
+ * Put everything into 0x00-0xff region modulo 0x400.
+ */
+ if (start & 0x300)
+ start = (start + 0x3ff) & ~0x3ff;
+ }
+
+ return start;
+}
+
+static void __init set_pci_bcr(void __iomem *pci_reg_base,
+ void __iomem *bcr,
+ unsigned int area)
+{
+ unsigned long word;
+
+ word = ioread32(bcr + SH7751_BCR1);
+ /* check BCR for SDRAM in area */
+ if (((word >> area) & 1) == 0) {
+ pr_info("PCI: Area %d is not configured for SDRAM. BCR1=0x%lx\n",
+ area, word);
+ return;
+ }
+ pcic_writel(word, SH4_PCIBCR1);
+
+ word = ioread16(bcr + SH7751_BCR2);
+ /* check BCR2 for 32bit SDRAM interface*/
+ if (((word >> (area << 1)) & 0x3) != 0x3) {
+ pr_info("PCI: Area %d is not 32 bit SDRAM. BCR2=0x%lx\n",
+ area, word);
+ return;
+ }
+ pcic_writel(word, SH4_PCIBCR2);
+}
+
+static __init int sh7751_cfg_init(struct device *dev,
+ struct pci_config_window *cfg)
+{
+ cfg->priv = sh7751_align_resource;
+ return 0;
+}
+
+static struct pci_ecam_ops ecm_ops __initdata = {
+ .init = sh7751_cfg_init,
+ .pci_ops = {
+ .read = pci_generic_config_read32,
+ .write = pci_generic_config_write32,
+ .map_bus = sh7751_map_bus,
+ }
+};
+
+static __init int sh7751_pci_probe(struct platform_device *pdev)
+{
+ struct resource *res;
+ u32 id;
+ u32 reg, word;
+ void __iomem *pci_reg_base;
+ void __iomem *bcr;
+ const struct of_device_id *match;
+ void (*fixup_fn)(void __iomem *pci_reg_base, void __iomem *bcr);
+
+ res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+ pci_reg_base = ioremap(res->start, resource_size(res));
+ if (IS_ERR(pci_reg_base))
+ return PTR_ERR(pci_reg_base);
+
+ res = platform_get_resource(pdev, IORESOURCE_MEM, 1);
+ bcr = ioremap(res->start, resource_size(res));
+ if (IS_ERR(bcr))
+ return PTR_ERR(bcr);
+
+ /* check for SH7751/SH7751R hardware */
+ id = pcic_readl(PCI_VENDOR_ID);
+ if (id != ((SH7751_DEVICE_ID << 16) | SH7751_VENDOR_ID) &&
+ id != ((SH7751R_DEVICE_ID << 16) | SH7751_VENDOR_ID)) {
+ pr_warn("PCI: This is not an SH7751(R)\n");
+ return -ENODEV;
+ }
+ dev_info(&pdev->dev, "PCI core found at %pR\n",
+ pci_reg_base);
+
+ /* Set the BCRs to enable PCI access */
+ reg = ioread32(bcr);
+ reg |= 0x80000;
+ iowrite32(reg, bcr);
+
+ /* Turn the clocks back on (not done in reset)*/
+ pcic_writel(0, SH4_PCICLKR);
+ /* Clear Powerdown IRQs (not done in reset) */
+ word = SH4_PCIPINT_D3 | SH4_PCIPINT_D0;
+ pcic_writel(word, SH4_PCIPINT);
+
+ /* set the command/status bits to:
+ * Wait Cycle Control + Parity Enable + Bus Master +
+ * Mem space enable
+ */
+ word = PCI_COMMAND_WAIT | PCI_COMMAND_PARITY |
+ PCI_COMMAND_MASTER | PCI_COMMAND_MEMORY;
+ pcic_writel(word, PCI_COMMAND);
+
+ /* define this host as the host bridge */
+ word = PCI_BASE_CLASS_BRIDGE << 24;
+ pcic_writel(word, PCI_CLASS_REVISION);
+
+ /* Set IO and Mem windows to local address
+ * Make PCI and local address the same for easy 1 to 1 mapping
+ */
+ word = memory_end - memory_start - 1;
+ pcic_writel(word, SH4_PCILSR0);
+ /* Set the values on window 0 PCI config registers */
+ word = P2SEGADDR(__pa(memory_start));
+ pcic_writel(word, SH4_PCILAR0);
+ pcic_writel(word, PCI_BASE_ADDRESS_1);
+
+ set_pci_bcr(pci_reg_base, bcr, (__pa(memory_start) >> 27) & 0x07);
+
+ /* configure the wait control registers */
+ word = ioread32(bcr + SH7751_WCR1);
+ pcic_writel(word, SH4_PCIWCR1);
+ word = ioread32(bcr + SH7751_WCR2);
+ pcic_writel(word, SH4_PCIWCR2);
+ word = ioread32(bcr + SH7751_WCR3);
+ pcic_writel(word, SH4_PCIWCR3);
+ word = ioread32(bcr + SH7751_MCR);
+ pcic_writel(word, SH4_PCIMCR);
+
+ match = of_match_node(fixup_of_match, pdev->dev.of_node);
+ if (match) {
+ fixup_fn = match->data;
+ fixup_fn(pci_reg_base, bcr);
+ }
+ /*
+ * SH7751 init done, set central function init complete
+ * use round robin mode to stop a device starving/overruning
+ */
+ word = SH4_PCICR_PREFIX | SH4_PCICR_CFIN | SH4_PCICR_ARBM;
+ pcic_writel(word, SH4_PCICR);
+
+ return pci_host_common_probe(pdev, &ecm_ops);
+}
+
+static __refdata struct platform_driver sh7751_pci_driver = {
+ .driver = {
+ .name = "sh7751-pci",
+ .of_match_table = sh7751_pci_of_match,
+ .suppress_bind_attrs = true,
+ },
+ .probe = sh7751_pci_probe,
+};
+builtin_platform_driver(sh7751_pci_driver);
--
2.7.0
^ permalink raw reply related [flat|nested] 138+ messages in thread* Re: [PATCH v6 12/22] sh: Add PCI host bridge driver for SH7751
2016-07-03 16:46 ` Yoshinori Sato
@ 2016-07-05 15:53 ` Rob Herring
-1 siblings, 0 replies; 138+ messages in thread
From: Rob Herring @ 2016-07-05 15:53 UTC (permalink / raw)
To: Yoshinori Sato; +Cc: devicetree, linux-pci, linux-sh, linux-kernel
On Mon, Jul 04, 2016 at 01:46:32AM +0900, Yoshinori Sato wrote:
> This is an alternative SH7751 PCI driver.
> Existing driver (arch/sh/drivers/pci/pci-sh7751) uses SH specific interface.
> But this driver uses common PCI interface. It is more modern and generic.
>
> Signed-off-by: Yoshinori Sato <ysato@users.sourceforge.jp>
> ---
> .../devicetree/bindings/pci/sh7751-pci.txt | 37 +++
Please add acks when posting new versions.
> arch/sh/boards/Kconfig | 1 +
> arch/sh/drivers/Makefile | 2 +
> drivers/pci/host/Kconfig | 7 +
> drivers/pci/host/Makefile | 1 +
> drivers/pci/host/pci-sh7751.c | 327 +++++++++++++++++++++
> 6 files changed, 375 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/pci/sh7751-pci.txt
> create mode 100644 drivers/pci/host/pci-sh7751.c
^ permalink raw reply [flat|nested] 138+ messages in thread
* Re: [PATCH v6 12/22] sh: Add PCI host bridge driver for SH7751
@ 2016-07-05 15:53 ` Rob Herring
0 siblings, 0 replies; 138+ messages in thread
From: Rob Herring @ 2016-07-05 15:53 UTC (permalink / raw)
To: Yoshinori Sato; +Cc: devicetree, linux-pci, linux-sh, linux-kernel
On Mon, Jul 04, 2016 at 01:46:32AM +0900, Yoshinori Sato wrote:
> This is an alternative SH7751 PCI driver.
> Existing driver (arch/sh/drivers/pci/pci-sh7751) uses SH specific interface.
> But this driver uses common PCI interface. It is more modern and generic.
>
> Signed-off-by: Yoshinori Sato <ysato@users.sourceforge.jp>
> ---
> .../devicetree/bindings/pci/sh7751-pci.txt | 37 +++
Please add acks when posting new versions.
> arch/sh/boards/Kconfig | 1 +
> arch/sh/drivers/Makefile | 2 +
> drivers/pci/host/Kconfig | 7 +
> drivers/pci/host/Makefile | 1 +
> drivers/pci/host/pci-sh7751.c | 327 +++++++++++++++++++++
> 6 files changed, 375 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/pci/sh7751-pci.txt
> create mode 100644 drivers/pci/host/pci-sh7751.c
^ permalink raw reply [flat|nested] 138+ messages in thread
* Re: [PATCH v6 12/22] sh: Add PCI host bridge driver for SH7751
2016-07-05 15:53 ` Rob Herring
@ 2016-07-06 16:19 ` Yoshinori Sato
-1 siblings, 0 replies; 138+ messages in thread
From: Yoshinori Sato @ 2016-07-06 16:19 UTC (permalink / raw)
To: Rob Herring; +Cc: devicetree, linux-pci, linux-sh, linux-kernel
On Wed, 06 Jul 2016 00:53:06 +0900,
Rob Herring wrote:
>
> On Mon, Jul 04, 2016 at 01:46:32AM +0900, Yoshinori Sato wrote:
> > This is an alternative SH7751 PCI driver.
> > Existing driver (arch/sh/drivers/pci/pci-sh7751) uses SH specific interface.
> > But this driver uses common PCI interface. It is more modern and generic.
> >
> > Signed-off-by: Yoshinori Sato <ysato@users.sourceforge.jp>
> > ---
> > .../devicetree/bindings/pci/sh7751-pci.txt | 37 +++
>
> Please add acks when posting new versions.
>
> > arch/sh/boards/Kconfig | 1 +
> > arch/sh/drivers/Makefile | 2 +
> > drivers/pci/host/Kconfig | 7 +
> > drivers/pci/host/Makefile | 1 +
> > drivers/pci/host/pci-sh7751.c | 327 +++++++++++++++++++++
> > 6 files changed, 375 insertions(+)
> > create mode 100644 Documentation/devicetree/bindings/pci/sh7751-pci.txt
> > create mode 100644 drivers/pci/host/pci-sh7751.c
Oh. Sorry.
I forgot it.
--
Yoshinori Sato
<ysato@users.sourceforge.jp>
^ permalink raw reply [flat|nested] 138+ messages in thread
* Re: [PATCH v6 12/22] sh: Add PCI host bridge driver for SH7751
@ 2016-07-06 16:19 ` Yoshinori Sato
0 siblings, 0 replies; 138+ messages in thread
From: Yoshinori Sato @ 2016-07-06 16:19 UTC (permalink / raw)
To: Rob Herring; +Cc: devicetree, linux-pci, linux-sh, linux-kernel
On Wed, 06 Jul 2016 00:53:06 +0900,
Rob Herring wrote:
>
> On Mon, Jul 04, 2016 at 01:46:32AM +0900, Yoshinori Sato wrote:
> > This is an alternative SH7751 PCI driver.
> > Existing driver (arch/sh/drivers/pci/pci-sh7751) uses SH specific interface.
> > But this driver uses common PCI interface. It is more modern and generic.
> >
> > Signed-off-by: Yoshinori Sato <ysato@users.sourceforge.jp>
> > ---
> > .../devicetree/bindings/pci/sh7751-pci.txt | 37 +++
>
> Please add acks when posting new versions.
>
> > arch/sh/boards/Kconfig | 1 +
> > arch/sh/drivers/Makefile | 2 +
> > drivers/pci/host/Kconfig | 7 +
> > drivers/pci/host/Makefile | 1 +
> > drivers/pci/host/pci-sh7751.c | 327 +++++++++++++++++++++
> > 6 files changed, 375 insertions(+)
> > create mode 100644 Documentation/devicetree/bindings/pci/sh7751-pci.txt
> > create mode 100644 drivers/pci/host/pci-sh7751.c
Oh. Sorry.
I forgot it.
--
Yoshinori Sato
<ysato@users.sourceforge.jp>
^ permalink raw reply [flat|nested] 138+ messages in thread
[parent not found: <1467564402-2649-13-git-send-email-ysato-Rn4VEauK+AKRv+LV9MX5uooqe+aC9MnS@public.gmane.org>]
* Re: [PATCH v6 12/22] sh: Add PCI host bridge driver for SH7751
2016-07-03 16:46 ` Yoshinori Sato
(?)
@ 2016-07-22 22:59 ` Bjorn Helgaas
-1 siblings, 0 replies; 138+ messages in thread
From: Bjorn Helgaas @ 2016-07-22 22:59 UTC (permalink / raw)
To: Yoshinori Sato
Cc: devicetree-u79uwXL29TY76Z2rM5mHXA,
linux-pci-u79uwXL29TY76Z2rM5mHXA,
linux-sh-u79uwXL29TY76Z2rM5mHXA,
linux-kernel-u79uwXL29TY76Z2rM5mHXA
On Mon, Jul 04, 2016 at 01:46:32AM +0900, Yoshinori Sato wrote:
> This is an alternative SH7751 PCI driver.
> Existing driver (arch/sh/drivers/pci/pci-sh7751) uses SH specific interface.
> But this driver uses common PCI interface. It is more modern and generic.
I'd like some details here about why we want this new driver. Will
the old one be removed? How should a user choose which one to use?
> Signed-off-by: Yoshinori Sato <ysato@users.sourceforge.jp>
> ---
> .../devicetree/bindings/pci/sh7751-pci.txt | 37 +++
> arch/sh/boards/Kconfig | 1 +
> arch/sh/drivers/Makefile | 2 +
> drivers/pci/host/Kconfig | 7 +
> drivers/pci/host/Makefile | 1 +
> drivers/pci/host/pci-sh7751.c | 327 +++++++++++++++++++++
> 6 files changed, 375 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/pci/sh7751-pci.txt
> create mode 100644 drivers/pci/host/pci-sh7751.c
How do you plan to merge this? It looks like part of a large series,
and I've only seen a few pieces of it. The ones you've posted to
linux-pci seem mostly OK. I have a few minor comments below, but
after you fix those and write some text for the changelogs, I can ack
them and you can merge them along with the rest of the series.
Bjorn
> diff --git a/Documentation/devicetree/bindings/pci/sh7751-pci.txt b/Documentation/devicetree/bindings/pci/sh7751-pci.txt
> new file mode 100644
> index 0000000..2df9af6
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/pci/sh7751-pci.txt
> @@ -0,0 +1,37 @@
> +* Renesas SH7751 PCI host interfaces
> +
> +Required properties:
> + - compatible: "renesas,sh7751-pci" is required.
> + And board specific compatible if fixup required.
> + - reg: contain two entries.
> + first entry: PCI controller register base address and length.
> + second entry: BUS controller register base address and length.
> + - #address-cells: set to <2>
> + - #size-cells: set to <1>
> + - bus-range: PCI bus numbers covered
> + - device_type: set to "pci"
> + - ranges: ranges for the PCI memory and I/O regions.
> + - interrupt-map-mask and interrupt-map: standard PCI properties
> + to define the mapping of the PCI interface to interrupt
> + numbers.
> +
> +Example:
> + pci: pci-controller@fe200000 {
> + compatible = "renesas,sh7751-pci", "iodata,landisk";
> + device_type = "pci";
> + bus-range = <0 0>;
> + #address-cells = <2>;
> + #size-cells = <1>;
> + ranges = <0x02000000 0x00000000 0xfd000000 0xfd000000 0x00000000 0x01000000>,
> + <0x01000000 0x00000000 0xfe240000 0x00000000 0x00000000 0x00040000>;
> + reg = <0xfe200000 0x0400>,
> + <0xff800000 0x0030>;
> + #interrupt-cells = <1>;
> + interrupt-map-mask = <0x1800 0 7>;
> + interrupt-map = <0x0000 0 1 &cpldintc 0 0>,
> + <0x0800 0 1 &cpldintc 1 0>,
> + <0x1000 0 1 &cpldintc 2 0>,
> + <0x1800 0 1 &cpldintc 3 0>,
> + <0x1800 0 2 &cpldintc 0 0>;
> + };
> +};
> diff --git a/arch/sh/boards/Kconfig b/arch/sh/boards/Kconfig
> index b6ff9df..cfde921 100644
> --- a/arch/sh/boards/Kconfig
> +++ b/arch/sh/boards/Kconfig
> @@ -14,6 +14,7 @@ config SH_DEVICE_TREE
> select GENERIC_CALIBRATE_DELAY
> select GENERIC_IOMAP
> select COMMON_CLK
> + select SYS_SUPPORTS_PCI
> help
> Select Board Described by Device Tree to build a kernel that
> does not hard-code any board-specific knowledge but instead uses
> diff --git a/arch/sh/drivers/Makefile b/arch/sh/drivers/Makefile
> index e13f06b..382e86f 100644
> --- a/arch/sh/drivers/Makefile
> +++ b/arch/sh/drivers/Makefile
> @@ -4,7 +4,9 @@
>
> obj-y += dma/
>
> +ifndef CONFIG_SH_DEVICE_TREE
> obj-$(CONFIG_PCI) += pci/
> +endif
> obj-$(CONFIG_SUPERHYWAY) += superhyway/
> obj-$(CONFIG_PUSH_SWITCH) += push-switch.o
> obj-$(CONFIG_HEARTBEAT) += heartbeat.o
> diff --git a/drivers/pci/host/Kconfig b/drivers/pci/host/Kconfig
> index 5d2374e..df60505 100644
> --- a/drivers/pci/host/Kconfig
> +++ b/drivers/pci/host/Kconfig
> @@ -245,4 +245,11 @@ config PCIE_ARMADA_8K
> Designware hardware and therefore the driver re-uses the
> Designware core functions to implement the driver.
>
> +config PCI_SH7751
> + bool "Renesas SH7751 On-Chip PCI controller"
> + depends on OF && SUPERH
> + select PCI_HOST_COMMON
> + help
> + Say Y here if you want PCI support on SH7751.
> +
> endmenu
> diff --git a/drivers/pci/host/Makefile b/drivers/pci/host/Makefile
> index 9c8698e..4681e49 100644
> --- a/drivers/pci/host/Makefile
> +++ b/drivers/pci/host/Makefile
> @@ -29,3 +29,4 @@ obj-$(CONFIG_PCIE_QCOM) += pcie-qcom.o
> obj-$(CONFIG_PCI_HOST_THUNDER_ECAM) += pci-thunder-ecam.o
> obj-$(CONFIG_PCI_HOST_THUNDER_PEM) += pci-thunder-pem.o
> obj-$(CONFIG_PCIE_ARMADA_8K) += pcie-armada8k.o
> +obj-$(CONFIG_PCI_SH7751) += pci-sh7751.o
> diff --git a/drivers/pci/host/pci-sh7751.c b/drivers/pci/host/pci-sh7751.c
> new file mode 100644
> index 0000000..21601f1
> --- /dev/null
> +++ b/drivers/pci/host/pci-sh7751.c
> @@ -0,0 +1,327 @@
> +/*
> + * SH7751 PCI driver
> + * Copyright (C) 2016 Yoshinori Sato
> + */
> +
> +#include <linux/kernel.h>
> +#include <linux/module.h>
> +#include <linux/of_address.h>
> +#include <linux/of_pci.h>
> +#include <linux/of_platform.h>
> +#include <linux/pci.h>
> +#include <linux/platform_device.h>
> +#include <linux/io.h>
> +#include "../ecam.h"
> +
> +#define SH7751_PCICONF1 0x4 /* PCI Config Reg 1 */
> +#define SH7751_PCICONF4 0x10 /* PCI Config Reg 4 */
> +#define SH7751_PCICONF5 0x14 /* PCI Config Reg 5 */
> +#define SH7751_PCICONF6 0x18 /* PCI Config Reg 6 */
> +#define SH4_PCICR 0x100 /* PCI Control Register */
> + #define SH4_PCICR_PREFIX 0xA5000000 /* CR prefix for write */
Follow the indentation style of include/uapi/linux/pci_regs.h,
drivers/pci/host/pcie-rcar.c, drivers/pci/host/pci-mvebu.c, etc.:
#define SH4_PCICR 0x100
#define SH4_PCICR_PREFIX 0xA5000000
> + #define SH4_PCICR_FTO BIT(10) /* TRDY/IRDY Enable */
> + #define SH4_PCICR_TRSB BIT(9) /* Target Read Single */
> + #define SH4_PCICR_BSWP BIT(8) /* Target Byte Swap */
> + #define SH4_PCICR_PLUP BIT(7) /* Enable PCI Pullup */
The above are unused and can be omitted.
> + #define SH4_PCICR_ARBM BIT(6) /* PCI Arbitration Mode */
> +#define SH4_PCICR_MD (BIT(4) | BIT(5)) /* MD9 and MD10 status */
Indentation error (should match other fields above). Also, unused, so
can just be omitted.
> + #define SH4_PCICR_SERR BIT(3) /* SERR output assert */
> + #define SH4_PCICR_INTA BIT(2) /* INTA output assert */
> + #define SH4_PCICR_PRST BIT(1) /* PCI Reset Assert */
Above are unused.
> + #define SH4_PCICR_CFIN BIT(0) /* Central Fun. Init Done */
> +#define SH4_PCILSR0 0x104 /* PCI Local Space Register0 */
> +#define SH4_PCILSR1 0x108 /* PCI Local Space Register1 */
Unused.
> +#define SH4_PCILAR0 0x10C /* PCI Local Addr Register1 */
> +#define SH4_PCILAR1 0x110 /* PCI Local Addr Register1 */
> +#define SH4_PCIINTM 0x118 /* PCI Interrupt Mask */
> + #define SH4_PCIINTM_TTADIM BIT(14) /* Target-target abort interrupt */
> + #define SH4_PCIINTM_TMTOIM BIT(9) /* Target retry timeout */
> + #define SH4_PCIINTM_MDEIM BIT(8) /* Master function disable error */
> + #define SH4_PCIINTM_APEDIM BIT(7) /* Address parity error detection */
> + #define SH4_PCIINTM_SDIM BIT(6) /* SERR detection */
> + #define SH4_PCIINTM_DPEITWM BIT(5) /* Data parity error for target write */
> + #define SH4_PCIINTM_PEDITRM BIT(4) /* PERR detection for target read */
> + #define SH4_PCIINTM_TADIMM BIT(3) /* Target abort for master */
> + #define SH4_PCIINTM_MADIMM BIT(2) /* Master abort for master */
> + #define SH4_PCIINTM_MWPDIM BIT(1) /* Master write data parity error */
> + #define SH4_PCIINTM_MRDPEIM BIT(0) /* Master read data parity error */
Field names are unused. You do write 0xc3ff to SH4_PCIINTM, but it's
a pain to match that up with these definitions. Either write out the
masks here, e.g., "#define SH4_PCIINTM_MRDPEIM 0x00000001", or build
up the SH4_PCIINTM from these definitions, or both.
> +#define SH4_PCIAINTM 0x134 /* Arbiter Int. Mask Register */
> +#define SH4_PCIPAR 0x1C0 /* PIO Address Register */
> + #define SH4_PCIPAR_CFGEN 0x80000000 /* Configuration Enable */
> + #define SH4_PCIPAR_BUSNO 0x00FF0000 /* Config. Bus Number */
> + #define SH4_PCIPAR_DEVNO 0x0000FF00 /* Config. Device Number */
> + #define SH4_PCIPAR_REGAD 0x000000FC /* Register Address Number */
Field names unused. At least SH4_PCIPAR_CFGEN *could* be used in
CONFIG_CMD() below.
> +#define SH4_PCIPINT 0x1CC /* Power Mgmnt Int. Register */
> + #define SH4_PCIPINT_D3 0x00000002 /* D3 Pwr Mgmt. Interrupt */
> + #define SH4_PCIPINT_D0 0x00000001 /* D0 Pwr Mgmt. Interrupt */
> +#define SH4_PCICLKR 0x1D4 /* Clock Ctrl. Register */
> +/* For definitions of BCR, MCR see ... */
See ... what?
> +#define SH4_PCIBCR1 0x1E0 /* Memory BCR1 Register */
> + #define SH4_PCIMBR0 SH4_PCIBCR1
Unused.
> +#define SH4_PCIBCR2 0x1E4 /* Memory BCR2 Register */
> + #define SH4_PCIMBMR0 SH4_PCIBCR2
Unused.
> +#define SH4_PCIWCR1 0x1E8 /* Wait Control 1 Register */
> +#define SH4_PCIWCR2 0x1EC /* Wait Control 2 Register */
> +#define SH4_PCIWCR3 0x1F0 /* Wait Control 3 Register */
> + #define SH4_PCIMBR2 SH4_PCIWCR3
Unused.
> +#define SH4_PCIMCR 0x1F4 /* Memory Control Register */
> +#define SH4_PCIPDR 0x220 /* Port IO Data Register */
> +
> +/* Platform Specific Values */
> +#define SH7751_VENDOR_ID 0x1054
> +#define SH7751_DEVICE_ID 0x3505
> +#define SH7751R_DEVICE_ID 0x350e
> +
> +/* Memory Control Registers */
> +#define SH7751_BCR1 0x0000 /* Memory BCR1 Register */
> +#define SH7751_BCR2 0x0004 /* Memory BCR2 Register */
> +#define SH7751_BCR3 0x0050 /* Memory BCR3 Register */
Unused.
> +#define SH7751_WCR1 0x0008 /* Wait Control 1 Register */
> +#define SH7751_WCR2 0x000C /* Wait Control 2 Register */
> +#define SH7751_WCR3 0x0010 /* Wait Control 3 Register */
> +#define SH7751_MCR 0x0014 /* Memory Control Register */
> +
> +#define pcic_writel(val, reg) iowrite32(val, pci_reg_base + (reg))
> +#define pcic_readl(reg) ioread32(pci_reg_base + (reg))
> +
> +/*
> + * PCIC fixups
> + */
> +
> +#define PCIMCR_MRSET 0x40000000
> +#define PCIMCR_RFSH 0x00000004
> +
> +static void __init landisk_fixup(void __iomem *pci_reg_base, void __iomem *bcr)
> +{
> + unsigned long bcr1, mcr;
> +
> + bcr1 = ioread32(bcr + SH7751_BCR1);
> + bcr1 |= 0x00080000; /* Enable Bit 19 BREQEN, set PCIC to slave */
> + pcic_writel(bcr1, SH4_PCIBCR1);
> +
> + mcr = ioread32(bcr + SH7751_MCR);
> + mcr &= (~PCIMCR_MRSET) & (~PCIMCR_RFSH);
> + pcic_writel(mcr, SH4_PCIMCR);
> +
> + pcic_writel(0x0c000000, PCI_BASE_ADDRESS_1);
> + pcic_writel(0xd0000000, PCI_BASE_ADDRESS_2);
> + pcic_writel(0x0c000000, SH4_PCILAR0);
> + pcic_writel(0x00000000, SH4_PCILAR1);
> +}
> +
> +static void __init r2dplus_fixup(void __iomem *pci_reg_base, void __iomem *bcr)
> +{
> + unsigned long bcr1, mcr;
> +
> + bcr1 = ioread32(bcr + SH7751_BCR1);
> + bcr1 |= 0x40080000; /* Enable Bit 19 BREQEN, set PCIC to slave */
> + pcic_writel(bcr1, SH4_PCIBCR1);
> +
> + /* Enable all interrupts, so we known what to fix */
> + pcic_writel(0x0000c3ff, SH4_PCIINTM);
> + pcic_writel(0x0000380f, SH4_PCIAINTM);
> +
> + pcic_writel(0xfb900047, SH7751_PCICONF1);
> + pcic_writel(0xab000001, SH7751_PCICONF4);
> +
> + mcr = ioread32(bcr + SH7751_MCR);
> + mcr &= (~PCIMCR_MRSET) & (~PCIMCR_RFSH);
> + pcic_writel(mcr, SH4_PCIMCR);
> +
> + pcic_writel(0x0c000000, SH7751_PCICONF5);
> + pcic_writel(0xd0000000, SH7751_PCICONF6);
> + pcic_writel(0x0c000000, SH4_PCILAR0);
> + pcic_writel(0x00000000, SH4_PCILAR1);
> +}
> +
> +/*
> + * Direct access to PCI hardware...
> + */
> +#define CONFIG_CMD(bus, devfn, where) \
> + (0x80000000 | (bus->number << 16) | (devfn << 8) | (where & ~3))
> +
> +/*
> + * Functions for accessing PCI configuration space with type 1 accesses
> + */
> +static void __iomem *sh7751_map_bus(struct pci_bus *bus,
> + unsigned int devfn, int where)
> +{
> + struct pci_config_window *cfg = bus->sysdata;
> + void __iomem *pci_reg_base = (void __iomem *)cfg->res.start;
> +
> + pcic_writel(CONFIG_CMD(bus, devfn, where), SH4_PCIPAR);
> + return pci_reg_base + SH4_PCIPDR;
> +}
> +
> +static const struct of_device_id fixup_of_match[] = {
> + { .compatible = "iodata,landisk-pci", .data = landisk_fixup, },
> + { .compatible = "renesas,r2dplus-pci", .data = r2dplus_fixup, },
> + { },
> +};
> +
> +static const struct of_device_id sh7751_pci_of_match[] = {
> + { .compatible = "renesas,sh7751-pci", },
> + { },
> +};
> +MODULE_DEVICE_TABLE(of, sh7751_pci_of_match);
> +
> +static resource_size_t sh7751_align_resource(struct pci_dev *dev,
> + const struct resource *res,
> + resource_size_t start,
> + resource_size_t size,
> + resource_size_t align)
> +{
> + if (res->flags & IORESOURCE_IO) {
> + if (start < PCIBIOS_MIN_IO + 0x1000)
> + start = PCIBIOS_MIN_IO + 0x1000;
> +
> + /*
> + * Put everything into 0x00-0xff region modulo 0x400.
> + */
> + if (start & 0x300)
> + start = (start + 0x3ff) & ~0x3ff;
> + }
> +
> + return start;
> +}
> +
> +static void __init set_pci_bcr(void __iomem *pci_reg_base,
> + void __iomem *bcr,
> + unsigned int area)
> +{
> + unsigned long word;
> +
> + word = ioread32(bcr + SH7751_BCR1);
> + /* check BCR for SDRAM in area */
> + if (((word >> area) & 1) = 0) {
> + pr_info("PCI: Area %d is not configured for SDRAM. BCR1=0x%lx\n",
> + area, word);
Use dev_info() so we can associate the message with a device and driver.
> + return;
> + }
> + pcic_writel(word, SH4_PCIBCR1);
> +
> + word = ioread16(bcr + SH7751_BCR2);
> + /* check BCR2 for 32bit SDRAM interface*/
> + if (((word >> (area << 1)) & 0x3) != 0x3) {
> + pr_info("PCI: Area %d is not 32 bit SDRAM. BCR2=0x%lx\n",
> + area, word);
dev_info()
> + return;
> + }
> + pcic_writel(word, SH4_PCIBCR2);
> +}
> +
> +static __init int sh7751_cfg_init(struct device *dev,
> + struct pci_config_window *cfg)
> +{
> + cfg->priv = sh7751_align_resource;
> + return 0;
> +}
> +
> +static struct pci_ecam_ops ecm_ops __initdata = {
> + .init = sh7751_cfg_init,
> + .pci_ops = {
> + .read = pci_generic_config_read32,
> + .write = pci_generic_config_write32,
> + .map_bus = sh7751_map_bus,
> + }
> +};
> +
> +static __init int sh7751_pci_probe(struct platform_device *pdev)
> +{
> + struct resource *res;
> + u32 id;
> + u32 reg, word;
> + void __iomem *pci_reg_base;
> + void __iomem *bcr;
> + const struct of_device_id *match;
> + void (*fixup_fn)(void __iomem *pci_reg_base, void __iomem *bcr);
> +
> + res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
> + pci_reg_base = ioremap(res->start, resource_size(res));
> + if (IS_ERR(pci_reg_base))
> + return PTR_ERR(pci_reg_base);
> +
> + res = platform_get_resource(pdev, IORESOURCE_MEM, 1);
> + bcr = ioremap(res->start, resource_size(res));
> + if (IS_ERR(bcr))
> + return PTR_ERR(bcr);
> +
> + /* check for SH7751/SH7751R hardware */
> + id = pcic_readl(PCI_VENDOR_ID);
> + if (id != ((SH7751_DEVICE_ID << 16) | SH7751_VENDOR_ID) &&
> + id != ((SH7751R_DEVICE_ID << 16) | SH7751_VENDOR_ID)) {
> + pr_warn("PCI: This is not an SH7751(R)\n");
dev_warn()
> + return -ENODEV;
> + }
> + dev_info(&pdev->dev, "PCI core found at %pR\n",
> + pci_reg_base);
> +
> + /* Set the BCRs to enable PCI access */
> + reg = ioread32(bcr);
> + reg |= 0x80000;
> + iowrite32(reg, bcr);
> +
> + /* Turn the clocks back on (not done in reset)*/
> + pcic_writel(0, SH4_PCICLKR);
> + /* Clear Powerdown IRQs (not done in reset) */
> + word = SH4_PCIPINT_D3 | SH4_PCIPINT_D0;
> + pcic_writel(word, SH4_PCIPINT);
> +
> + /* set the command/status bits to:
> + * Wait Cycle Control + Parity Enable + Bus Master +
> + * Mem space enable
> + */
Multi-line comment style is:
/*
* set the command/...
* ...
*/
> + word = PCI_COMMAND_WAIT | PCI_COMMAND_PARITY |
> + PCI_COMMAND_MASTER | PCI_COMMAND_MEMORY;
> + pcic_writel(word, PCI_COMMAND);
> +
> + /* define this host as the host bridge */
> + word = PCI_BASE_CLASS_BRIDGE << 24;
> + pcic_writel(word, PCI_CLASS_REVISION);
> +
> + /* Set IO and Mem windows to local address
> + * Make PCI and local address the same for easy 1 to 1 mapping
> + */
> + word = memory_end - memory_start - 1;
> + pcic_writel(word, SH4_PCILSR0);
> + /* Set the values on window 0 PCI config registers */
> + word = P2SEGADDR(__pa(memory_start));
> + pcic_writel(word, SH4_PCILAR0);
> + pcic_writel(word, PCI_BASE_ADDRESS_1);
> +
> + set_pci_bcr(pci_reg_base, bcr, (__pa(memory_start) >> 27) & 0x07);
> +
> + /* configure the wait control registers */
> + word = ioread32(bcr + SH7751_WCR1);
> + pcic_writel(word, SH4_PCIWCR1);
> + word = ioread32(bcr + SH7751_WCR2);
> + pcic_writel(word, SH4_PCIWCR2);
> + word = ioread32(bcr + SH7751_WCR3);
> + pcic_writel(word, SH4_PCIWCR3);
> + word = ioread32(bcr + SH7751_MCR);
> + pcic_writel(word, SH4_PCIMCR);
> +
> + match = of_match_node(fixup_of_match, pdev->dev.of_node);
> + if (match) {
> + fixup_fn = match->data;
> + fixup_fn(pci_reg_base, bcr);
> + }
> + /*
> + * SH7751 init done, set central function init complete
> + * use round robin mode to stop a device starving/overruning
> + */
> + word = SH4_PCICR_PREFIX | SH4_PCICR_CFIN | SH4_PCICR_ARBM;
> + pcic_writel(word, SH4_PCICR);
> +
> + return pci_host_common_probe(pdev, &ecm_ops);
> +}
> +
> +static __refdata struct platform_driver sh7751_pci_driver = {
> + .driver = {
> + .name = "sh7751-pci",
> + .of_match_table = sh7751_pci_of_match,
> + .suppress_bind_attrs = true,
> + },
> + .probe = sh7751_pci_probe,
> +};
> +builtin_platform_driver(sh7751_pci_driver);
> --
> 2.7.0
>
^ permalink raw reply [flat|nested] 138+ messages in thread* Re: [PATCH v6 12/22] sh: Add PCI host bridge driver for SH7751
@ 2016-07-22 22:59 ` Bjorn Helgaas
0 siblings, 0 replies; 138+ messages in thread
From: Bjorn Helgaas @ 2016-07-22 22:59 UTC (permalink / raw)
To: Yoshinori Sato
Cc: devicetree-u79uwXL29TY76Z2rM5mHXA,
linux-pci-u79uwXL29TY76Z2rM5mHXA,
linux-sh-u79uwXL29TY76Z2rM5mHXA,
linux-kernel-u79uwXL29TY76Z2rM5mHXA
On Mon, Jul 04, 2016 at 01:46:32AM +0900, Yoshinori Sato wrote:
> This is an alternative SH7751 PCI driver.
> Existing driver (arch/sh/drivers/pci/pci-sh7751) uses SH specific interface.
> But this driver uses common PCI interface. It is more modern and generic.
I'd like some details here about why we want this new driver. Will
the old one be removed? How should a user choose which one to use?
> Signed-off-by: Yoshinori Sato <ysato-Rn4VEauK+AKRv+LV9MX5uooqe+aC9MnS@public.gmane.org>
> ---
> .../devicetree/bindings/pci/sh7751-pci.txt | 37 +++
> arch/sh/boards/Kconfig | 1 +
> arch/sh/drivers/Makefile | 2 +
> drivers/pci/host/Kconfig | 7 +
> drivers/pci/host/Makefile | 1 +
> drivers/pci/host/pci-sh7751.c | 327 +++++++++++++++++++++
> 6 files changed, 375 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/pci/sh7751-pci.txt
> create mode 100644 drivers/pci/host/pci-sh7751.c
How do you plan to merge this? It looks like part of a large series,
and I've only seen a few pieces of it. The ones you've posted to
linux-pci seem mostly OK. I have a few minor comments below, but
after you fix those and write some text for the changelogs, I can ack
them and you can merge them along with the rest of the series.
Bjorn
> diff --git a/Documentation/devicetree/bindings/pci/sh7751-pci.txt b/Documentation/devicetree/bindings/pci/sh7751-pci.txt
> new file mode 100644
> index 0000000..2df9af6
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/pci/sh7751-pci.txt
> @@ -0,0 +1,37 @@
> +* Renesas SH7751 PCI host interfaces
> +
> +Required properties:
> + - compatible: "renesas,sh7751-pci" is required.
> + And board specific compatible if fixup required.
> + - reg: contain two entries.
> + first entry: PCI controller register base address and length.
> + second entry: BUS controller register base address and length.
> + - #address-cells: set to <2>
> + - #size-cells: set to <1>
> + - bus-range: PCI bus numbers covered
> + - device_type: set to "pci"
> + - ranges: ranges for the PCI memory and I/O regions.
> + - interrupt-map-mask and interrupt-map: standard PCI properties
> + to define the mapping of the PCI interface to interrupt
> + numbers.
> +
> +Example:
> + pci: pci-controller@fe200000 {
> + compatible = "renesas,sh7751-pci", "iodata,landisk";
> + device_type = "pci";
> + bus-range = <0 0>;
> + #address-cells = <2>;
> + #size-cells = <1>;
> + ranges = <0x02000000 0x00000000 0xfd000000 0xfd000000 0x00000000 0x01000000>,
> + <0x01000000 0x00000000 0xfe240000 0x00000000 0x00000000 0x00040000>;
> + reg = <0xfe200000 0x0400>,
> + <0xff800000 0x0030>;
> + #interrupt-cells = <1>;
> + interrupt-map-mask = <0x1800 0 7>;
> + interrupt-map = <0x0000 0 1 &cpldintc 0 0>,
> + <0x0800 0 1 &cpldintc 1 0>,
> + <0x1000 0 1 &cpldintc 2 0>,
> + <0x1800 0 1 &cpldintc 3 0>,
> + <0x1800 0 2 &cpldintc 0 0>;
> + };
> +};
> diff --git a/arch/sh/boards/Kconfig b/arch/sh/boards/Kconfig
> index b6ff9df..cfde921 100644
> --- a/arch/sh/boards/Kconfig
> +++ b/arch/sh/boards/Kconfig
> @@ -14,6 +14,7 @@ config SH_DEVICE_TREE
> select GENERIC_CALIBRATE_DELAY
> select GENERIC_IOMAP
> select COMMON_CLK
> + select SYS_SUPPORTS_PCI
> help
> Select Board Described by Device Tree to build a kernel that
> does not hard-code any board-specific knowledge but instead uses
> diff --git a/arch/sh/drivers/Makefile b/arch/sh/drivers/Makefile
> index e13f06b..382e86f 100644
> --- a/arch/sh/drivers/Makefile
> +++ b/arch/sh/drivers/Makefile
> @@ -4,7 +4,9 @@
>
> obj-y += dma/
>
> +ifndef CONFIG_SH_DEVICE_TREE
> obj-$(CONFIG_PCI) += pci/
> +endif
> obj-$(CONFIG_SUPERHYWAY) += superhyway/
> obj-$(CONFIG_PUSH_SWITCH) += push-switch.o
> obj-$(CONFIG_HEARTBEAT) += heartbeat.o
> diff --git a/drivers/pci/host/Kconfig b/drivers/pci/host/Kconfig
> index 5d2374e..df60505 100644
> --- a/drivers/pci/host/Kconfig
> +++ b/drivers/pci/host/Kconfig
> @@ -245,4 +245,11 @@ config PCIE_ARMADA_8K
> Designware hardware and therefore the driver re-uses the
> Designware core functions to implement the driver.
>
> +config PCI_SH7751
> + bool "Renesas SH7751 On-Chip PCI controller"
> + depends on OF && SUPERH
> + select PCI_HOST_COMMON
> + help
> + Say Y here if you want PCI support on SH7751.
> +
> endmenu
> diff --git a/drivers/pci/host/Makefile b/drivers/pci/host/Makefile
> index 9c8698e..4681e49 100644
> --- a/drivers/pci/host/Makefile
> +++ b/drivers/pci/host/Makefile
> @@ -29,3 +29,4 @@ obj-$(CONFIG_PCIE_QCOM) += pcie-qcom.o
> obj-$(CONFIG_PCI_HOST_THUNDER_ECAM) += pci-thunder-ecam.o
> obj-$(CONFIG_PCI_HOST_THUNDER_PEM) += pci-thunder-pem.o
> obj-$(CONFIG_PCIE_ARMADA_8K) += pcie-armada8k.o
> +obj-$(CONFIG_PCI_SH7751) += pci-sh7751.o
> diff --git a/drivers/pci/host/pci-sh7751.c b/drivers/pci/host/pci-sh7751.c
> new file mode 100644
> index 0000000..21601f1
> --- /dev/null
> +++ b/drivers/pci/host/pci-sh7751.c
> @@ -0,0 +1,327 @@
> +/*
> + * SH7751 PCI driver
> + * Copyright (C) 2016 Yoshinori Sato
> + */
> +
> +#include <linux/kernel.h>
> +#include <linux/module.h>
> +#include <linux/of_address.h>
> +#include <linux/of_pci.h>
> +#include <linux/of_platform.h>
> +#include <linux/pci.h>
> +#include <linux/platform_device.h>
> +#include <linux/io.h>
> +#include "../ecam.h"
> +
> +#define SH7751_PCICONF1 0x4 /* PCI Config Reg 1 */
> +#define SH7751_PCICONF4 0x10 /* PCI Config Reg 4 */
> +#define SH7751_PCICONF5 0x14 /* PCI Config Reg 5 */
> +#define SH7751_PCICONF6 0x18 /* PCI Config Reg 6 */
> +#define SH4_PCICR 0x100 /* PCI Control Register */
> + #define SH4_PCICR_PREFIX 0xA5000000 /* CR prefix for write */
Follow the indentation style of include/uapi/linux/pci_regs.h,
drivers/pci/host/pcie-rcar.c, drivers/pci/host/pci-mvebu.c, etc.:
#define SH4_PCICR 0x100
#define SH4_PCICR_PREFIX 0xA5000000
> + #define SH4_PCICR_FTO BIT(10) /* TRDY/IRDY Enable */
> + #define SH4_PCICR_TRSB BIT(9) /* Target Read Single */
> + #define SH4_PCICR_BSWP BIT(8) /* Target Byte Swap */
> + #define SH4_PCICR_PLUP BIT(7) /* Enable PCI Pullup */
The above are unused and can be omitted.
> + #define SH4_PCICR_ARBM BIT(6) /* PCI Arbitration Mode */
> +#define SH4_PCICR_MD (BIT(4) | BIT(5)) /* MD9 and MD10 status */
Indentation error (should match other fields above). Also, unused, so
can just be omitted.
> + #define SH4_PCICR_SERR BIT(3) /* SERR output assert */
> + #define SH4_PCICR_INTA BIT(2) /* INTA output assert */
> + #define SH4_PCICR_PRST BIT(1) /* PCI Reset Assert */
Above are unused.
> + #define SH4_PCICR_CFIN BIT(0) /* Central Fun. Init Done */
> +#define SH4_PCILSR0 0x104 /* PCI Local Space Register0 */
> +#define SH4_PCILSR1 0x108 /* PCI Local Space Register1 */
Unused.
> +#define SH4_PCILAR0 0x10C /* PCI Local Addr Register1 */
> +#define SH4_PCILAR1 0x110 /* PCI Local Addr Register1 */
> +#define SH4_PCIINTM 0x118 /* PCI Interrupt Mask */
> + #define SH4_PCIINTM_TTADIM BIT(14) /* Target-target abort interrupt */
> + #define SH4_PCIINTM_TMTOIM BIT(9) /* Target retry timeout */
> + #define SH4_PCIINTM_MDEIM BIT(8) /* Master function disable error */
> + #define SH4_PCIINTM_APEDIM BIT(7) /* Address parity error detection */
> + #define SH4_PCIINTM_SDIM BIT(6) /* SERR detection */
> + #define SH4_PCIINTM_DPEITWM BIT(5) /* Data parity error for target write */
> + #define SH4_PCIINTM_PEDITRM BIT(4) /* PERR detection for target read */
> + #define SH4_PCIINTM_TADIMM BIT(3) /* Target abort for master */
> + #define SH4_PCIINTM_MADIMM BIT(2) /* Master abort for master */
> + #define SH4_PCIINTM_MWPDIM BIT(1) /* Master write data parity error */
> + #define SH4_PCIINTM_MRDPEIM BIT(0) /* Master read data parity error */
Field names are unused. You do write 0xc3ff to SH4_PCIINTM, but it's
a pain to match that up with these definitions. Either write out the
masks here, e.g., "#define SH4_PCIINTM_MRDPEIM 0x00000001", or build
up the SH4_PCIINTM from these definitions, or both.
> +#define SH4_PCIAINTM 0x134 /* Arbiter Int. Mask Register */
> +#define SH4_PCIPAR 0x1C0 /* PIO Address Register */
> + #define SH4_PCIPAR_CFGEN 0x80000000 /* Configuration Enable */
> + #define SH4_PCIPAR_BUSNO 0x00FF0000 /* Config. Bus Number */
> + #define SH4_PCIPAR_DEVNO 0x0000FF00 /* Config. Device Number */
> + #define SH4_PCIPAR_REGAD 0x000000FC /* Register Address Number */
Field names unused. At least SH4_PCIPAR_CFGEN *could* be used in
CONFIG_CMD() below.
> +#define SH4_PCIPINT 0x1CC /* Power Mgmnt Int. Register */
> + #define SH4_PCIPINT_D3 0x00000002 /* D3 Pwr Mgmt. Interrupt */
> + #define SH4_PCIPINT_D0 0x00000001 /* D0 Pwr Mgmt. Interrupt */
> +#define SH4_PCICLKR 0x1D4 /* Clock Ctrl. Register */
> +/* For definitions of BCR, MCR see ... */
See ... what?
> +#define SH4_PCIBCR1 0x1E0 /* Memory BCR1 Register */
> + #define SH4_PCIMBR0 SH4_PCIBCR1
Unused.
> +#define SH4_PCIBCR2 0x1E4 /* Memory BCR2 Register */
> + #define SH4_PCIMBMR0 SH4_PCIBCR2
Unused.
> +#define SH4_PCIWCR1 0x1E8 /* Wait Control 1 Register */
> +#define SH4_PCIWCR2 0x1EC /* Wait Control 2 Register */
> +#define SH4_PCIWCR3 0x1F0 /* Wait Control 3 Register */
> + #define SH4_PCIMBR2 SH4_PCIWCR3
Unused.
> +#define SH4_PCIMCR 0x1F4 /* Memory Control Register */
> +#define SH4_PCIPDR 0x220 /* Port IO Data Register */
> +
> +/* Platform Specific Values */
> +#define SH7751_VENDOR_ID 0x1054
> +#define SH7751_DEVICE_ID 0x3505
> +#define SH7751R_DEVICE_ID 0x350e
> +
> +/* Memory Control Registers */
> +#define SH7751_BCR1 0x0000 /* Memory BCR1 Register */
> +#define SH7751_BCR2 0x0004 /* Memory BCR2 Register */
> +#define SH7751_BCR3 0x0050 /* Memory BCR3 Register */
Unused.
> +#define SH7751_WCR1 0x0008 /* Wait Control 1 Register */
> +#define SH7751_WCR2 0x000C /* Wait Control 2 Register */
> +#define SH7751_WCR3 0x0010 /* Wait Control 3 Register */
> +#define SH7751_MCR 0x0014 /* Memory Control Register */
> +
> +#define pcic_writel(val, reg) iowrite32(val, pci_reg_base + (reg))
> +#define pcic_readl(reg) ioread32(pci_reg_base + (reg))
> +
> +/*
> + * PCIC fixups
> + */
> +
> +#define PCIMCR_MRSET 0x40000000
> +#define PCIMCR_RFSH 0x00000004
> +
> +static void __init landisk_fixup(void __iomem *pci_reg_base, void __iomem *bcr)
> +{
> + unsigned long bcr1, mcr;
> +
> + bcr1 = ioread32(bcr + SH7751_BCR1);
> + bcr1 |= 0x00080000; /* Enable Bit 19 BREQEN, set PCIC to slave */
> + pcic_writel(bcr1, SH4_PCIBCR1);
> +
> + mcr = ioread32(bcr + SH7751_MCR);
> + mcr &= (~PCIMCR_MRSET) & (~PCIMCR_RFSH);
> + pcic_writel(mcr, SH4_PCIMCR);
> +
> + pcic_writel(0x0c000000, PCI_BASE_ADDRESS_1);
> + pcic_writel(0xd0000000, PCI_BASE_ADDRESS_2);
> + pcic_writel(0x0c000000, SH4_PCILAR0);
> + pcic_writel(0x00000000, SH4_PCILAR1);
> +}
> +
> +static void __init r2dplus_fixup(void __iomem *pci_reg_base, void __iomem *bcr)
> +{
> + unsigned long bcr1, mcr;
> +
> + bcr1 = ioread32(bcr + SH7751_BCR1);
> + bcr1 |= 0x40080000; /* Enable Bit 19 BREQEN, set PCIC to slave */
> + pcic_writel(bcr1, SH4_PCIBCR1);
> +
> + /* Enable all interrupts, so we known what to fix */
> + pcic_writel(0x0000c3ff, SH4_PCIINTM);
> + pcic_writel(0x0000380f, SH4_PCIAINTM);
> +
> + pcic_writel(0xfb900047, SH7751_PCICONF1);
> + pcic_writel(0xab000001, SH7751_PCICONF4);
> +
> + mcr = ioread32(bcr + SH7751_MCR);
> + mcr &= (~PCIMCR_MRSET) & (~PCIMCR_RFSH);
> + pcic_writel(mcr, SH4_PCIMCR);
> +
> + pcic_writel(0x0c000000, SH7751_PCICONF5);
> + pcic_writel(0xd0000000, SH7751_PCICONF6);
> + pcic_writel(0x0c000000, SH4_PCILAR0);
> + pcic_writel(0x00000000, SH4_PCILAR1);
> +}
> +
> +/*
> + * Direct access to PCI hardware...
> + */
> +#define CONFIG_CMD(bus, devfn, where) \
> + (0x80000000 | (bus->number << 16) | (devfn << 8) | (where & ~3))
> +
> +/*
> + * Functions for accessing PCI configuration space with type 1 accesses
> + */
> +static void __iomem *sh7751_map_bus(struct pci_bus *bus,
> + unsigned int devfn, int where)
> +{
> + struct pci_config_window *cfg = bus->sysdata;
> + void __iomem *pci_reg_base = (void __iomem *)cfg->res.start;
> +
> + pcic_writel(CONFIG_CMD(bus, devfn, where), SH4_PCIPAR);
> + return pci_reg_base + SH4_PCIPDR;
> +}
> +
> +static const struct of_device_id fixup_of_match[] = {
> + { .compatible = "iodata,landisk-pci", .data = landisk_fixup, },
> + { .compatible = "renesas,r2dplus-pci", .data = r2dplus_fixup, },
> + { },
> +};
> +
> +static const struct of_device_id sh7751_pci_of_match[] = {
> + { .compatible = "renesas,sh7751-pci", },
> + { },
> +};
> +MODULE_DEVICE_TABLE(of, sh7751_pci_of_match);
> +
> +static resource_size_t sh7751_align_resource(struct pci_dev *dev,
> + const struct resource *res,
> + resource_size_t start,
> + resource_size_t size,
> + resource_size_t align)
> +{
> + if (res->flags & IORESOURCE_IO) {
> + if (start < PCIBIOS_MIN_IO + 0x1000)
> + start = PCIBIOS_MIN_IO + 0x1000;
> +
> + /*
> + * Put everything into 0x00-0xff region modulo 0x400.
> + */
> + if (start & 0x300)
> + start = (start + 0x3ff) & ~0x3ff;
> + }
> +
> + return start;
> +}
> +
> +static void __init set_pci_bcr(void __iomem *pci_reg_base,
> + void __iomem *bcr,
> + unsigned int area)
> +{
> + unsigned long word;
> +
> + word = ioread32(bcr + SH7751_BCR1);
> + /* check BCR for SDRAM in area */
> + if (((word >> area) & 1) == 0) {
> + pr_info("PCI: Area %d is not configured for SDRAM. BCR1=0x%lx\n",
> + area, word);
Use dev_info() so we can associate the message with a device and driver.
> + return;
> + }
> + pcic_writel(word, SH4_PCIBCR1);
> +
> + word = ioread16(bcr + SH7751_BCR2);
> + /* check BCR2 for 32bit SDRAM interface*/
> + if (((word >> (area << 1)) & 0x3) != 0x3) {
> + pr_info("PCI: Area %d is not 32 bit SDRAM. BCR2=0x%lx\n",
> + area, word);
dev_info()
> + return;
> + }
> + pcic_writel(word, SH4_PCIBCR2);
> +}
> +
> +static __init int sh7751_cfg_init(struct device *dev,
> + struct pci_config_window *cfg)
> +{
> + cfg->priv = sh7751_align_resource;
> + return 0;
> +}
> +
> +static struct pci_ecam_ops ecm_ops __initdata = {
> + .init = sh7751_cfg_init,
> + .pci_ops = {
> + .read = pci_generic_config_read32,
> + .write = pci_generic_config_write32,
> + .map_bus = sh7751_map_bus,
> + }
> +};
> +
> +static __init int sh7751_pci_probe(struct platform_device *pdev)
> +{
> + struct resource *res;
> + u32 id;
> + u32 reg, word;
> + void __iomem *pci_reg_base;
> + void __iomem *bcr;
> + const struct of_device_id *match;
> + void (*fixup_fn)(void __iomem *pci_reg_base, void __iomem *bcr);
> +
> + res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
> + pci_reg_base = ioremap(res->start, resource_size(res));
> + if (IS_ERR(pci_reg_base))
> + return PTR_ERR(pci_reg_base);
> +
> + res = platform_get_resource(pdev, IORESOURCE_MEM, 1);
> + bcr = ioremap(res->start, resource_size(res));
> + if (IS_ERR(bcr))
> + return PTR_ERR(bcr);
> +
> + /* check for SH7751/SH7751R hardware */
> + id = pcic_readl(PCI_VENDOR_ID);
> + if (id != ((SH7751_DEVICE_ID << 16) | SH7751_VENDOR_ID) &&
> + id != ((SH7751R_DEVICE_ID << 16) | SH7751_VENDOR_ID)) {
> + pr_warn("PCI: This is not an SH7751(R)\n");
dev_warn()
> + return -ENODEV;
> + }
> + dev_info(&pdev->dev, "PCI core found at %pR\n",
> + pci_reg_base);
> +
> + /* Set the BCRs to enable PCI access */
> + reg = ioread32(bcr);
> + reg |= 0x80000;
> + iowrite32(reg, bcr);
> +
> + /* Turn the clocks back on (not done in reset)*/
> + pcic_writel(0, SH4_PCICLKR);
> + /* Clear Powerdown IRQs (not done in reset) */
> + word = SH4_PCIPINT_D3 | SH4_PCIPINT_D0;
> + pcic_writel(word, SH4_PCIPINT);
> +
> + /* set the command/status bits to:
> + * Wait Cycle Control + Parity Enable + Bus Master +
> + * Mem space enable
> + */
Multi-line comment style is:
/*
* set the command/...
* ...
*/
> + word = PCI_COMMAND_WAIT | PCI_COMMAND_PARITY |
> + PCI_COMMAND_MASTER | PCI_COMMAND_MEMORY;
> + pcic_writel(word, PCI_COMMAND);
> +
> + /* define this host as the host bridge */
> + word = PCI_BASE_CLASS_BRIDGE << 24;
> + pcic_writel(word, PCI_CLASS_REVISION);
> +
> + /* Set IO and Mem windows to local address
> + * Make PCI and local address the same for easy 1 to 1 mapping
> + */
> + word = memory_end - memory_start - 1;
> + pcic_writel(word, SH4_PCILSR0);
> + /* Set the values on window 0 PCI config registers */
> + word = P2SEGADDR(__pa(memory_start));
> + pcic_writel(word, SH4_PCILAR0);
> + pcic_writel(word, PCI_BASE_ADDRESS_1);
> +
> + set_pci_bcr(pci_reg_base, bcr, (__pa(memory_start) >> 27) & 0x07);
> +
> + /* configure the wait control registers */
> + word = ioread32(bcr + SH7751_WCR1);
> + pcic_writel(word, SH4_PCIWCR1);
> + word = ioread32(bcr + SH7751_WCR2);
> + pcic_writel(word, SH4_PCIWCR2);
> + word = ioread32(bcr + SH7751_WCR3);
> + pcic_writel(word, SH4_PCIWCR3);
> + word = ioread32(bcr + SH7751_MCR);
> + pcic_writel(word, SH4_PCIMCR);
> +
> + match = of_match_node(fixup_of_match, pdev->dev.of_node);
> + if (match) {
> + fixup_fn = match->data;
> + fixup_fn(pci_reg_base, bcr);
> + }
> + /*
> + * SH7751 init done, set central function init complete
> + * use round robin mode to stop a device starving/overruning
> + */
> + word = SH4_PCICR_PREFIX | SH4_PCICR_CFIN | SH4_PCICR_ARBM;
> + pcic_writel(word, SH4_PCICR);
> +
> + return pci_host_common_probe(pdev, &ecm_ops);
> +}
> +
> +static __refdata struct platform_driver sh7751_pci_driver = {
> + .driver = {
> + .name = "sh7751-pci",
> + .of_match_table = sh7751_pci_of_match,
> + .suppress_bind_attrs = true,
> + },
> + .probe = sh7751_pci_probe,
> +};
> +builtin_platform_driver(sh7751_pci_driver);
> --
> 2.7.0
>
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^ permalink raw reply [flat|nested] 138+ messages in thread* Re: [PATCH v6 12/22] sh: Add PCI host bridge driver for SH7751
@ 2016-07-22 22:59 ` Bjorn Helgaas
0 siblings, 0 replies; 138+ messages in thread
From: Bjorn Helgaas @ 2016-07-22 22:59 UTC (permalink / raw)
To: Yoshinori Sato; +Cc: devicetree, linux-pci, linux-sh, linux-kernel
On Mon, Jul 04, 2016 at 01:46:32AM +0900, Yoshinori Sato wrote:
> This is an alternative SH7751 PCI driver.
> Existing driver (arch/sh/drivers/pci/pci-sh7751) uses SH specific interface.
> But this driver uses common PCI interface. It is more modern and generic.
I'd like some details here about why we want this new driver. Will
the old one be removed? How should a user choose which one to use?
> Signed-off-by: Yoshinori Sato <ysato@users.sourceforge.jp>
> ---
> .../devicetree/bindings/pci/sh7751-pci.txt | 37 +++
> arch/sh/boards/Kconfig | 1 +
> arch/sh/drivers/Makefile | 2 +
> drivers/pci/host/Kconfig | 7 +
> drivers/pci/host/Makefile | 1 +
> drivers/pci/host/pci-sh7751.c | 327 +++++++++++++++++++++
> 6 files changed, 375 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/pci/sh7751-pci.txt
> create mode 100644 drivers/pci/host/pci-sh7751.c
How do you plan to merge this? It looks like part of a large series,
and I've only seen a few pieces of it. The ones you've posted to
linux-pci seem mostly OK. I have a few minor comments below, but
after you fix those and write some text for the changelogs, I can ack
them and you can merge them along with the rest of the series.
Bjorn
> diff --git a/Documentation/devicetree/bindings/pci/sh7751-pci.txt b/Documentation/devicetree/bindings/pci/sh7751-pci.txt
> new file mode 100644
> index 0000000..2df9af6
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/pci/sh7751-pci.txt
> @@ -0,0 +1,37 @@
> +* Renesas SH7751 PCI host interfaces
> +
> +Required properties:
> + - compatible: "renesas,sh7751-pci" is required.
> + And board specific compatible if fixup required.
> + - reg: contain two entries.
> + first entry: PCI controller register base address and length.
> + second entry: BUS controller register base address and length.
> + - #address-cells: set to <2>
> + - #size-cells: set to <1>
> + - bus-range: PCI bus numbers covered
> + - device_type: set to "pci"
> + - ranges: ranges for the PCI memory and I/O regions.
> + - interrupt-map-mask and interrupt-map: standard PCI properties
> + to define the mapping of the PCI interface to interrupt
> + numbers.
> +
> +Example:
> + pci: pci-controller@fe200000 {
> + compatible = "renesas,sh7751-pci", "iodata,landisk";
> + device_type = "pci";
> + bus-range = <0 0>;
> + #address-cells = <2>;
> + #size-cells = <1>;
> + ranges = <0x02000000 0x00000000 0xfd000000 0xfd000000 0x00000000 0x01000000>,
> + <0x01000000 0x00000000 0xfe240000 0x00000000 0x00000000 0x00040000>;
> + reg = <0xfe200000 0x0400>,
> + <0xff800000 0x0030>;
> + #interrupt-cells = <1>;
> + interrupt-map-mask = <0x1800 0 7>;
> + interrupt-map = <0x0000 0 1 &cpldintc 0 0>,
> + <0x0800 0 1 &cpldintc 1 0>,
> + <0x1000 0 1 &cpldintc 2 0>,
> + <0x1800 0 1 &cpldintc 3 0>,
> + <0x1800 0 2 &cpldintc 0 0>;
> + };
> +};
> diff --git a/arch/sh/boards/Kconfig b/arch/sh/boards/Kconfig
> index b6ff9df..cfde921 100644
> --- a/arch/sh/boards/Kconfig
> +++ b/arch/sh/boards/Kconfig
> @@ -14,6 +14,7 @@ config SH_DEVICE_TREE
> select GENERIC_CALIBRATE_DELAY
> select GENERIC_IOMAP
> select COMMON_CLK
> + select SYS_SUPPORTS_PCI
> help
> Select Board Described by Device Tree to build a kernel that
> does not hard-code any board-specific knowledge but instead uses
> diff --git a/arch/sh/drivers/Makefile b/arch/sh/drivers/Makefile
> index e13f06b..382e86f 100644
> --- a/arch/sh/drivers/Makefile
> +++ b/arch/sh/drivers/Makefile
> @@ -4,7 +4,9 @@
>
> obj-y += dma/
>
> +ifndef CONFIG_SH_DEVICE_TREE
> obj-$(CONFIG_PCI) += pci/
> +endif
> obj-$(CONFIG_SUPERHYWAY) += superhyway/
> obj-$(CONFIG_PUSH_SWITCH) += push-switch.o
> obj-$(CONFIG_HEARTBEAT) += heartbeat.o
> diff --git a/drivers/pci/host/Kconfig b/drivers/pci/host/Kconfig
> index 5d2374e..df60505 100644
> --- a/drivers/pci/host/Kconfig
> +++ b/drivers/pci/host/Kconfig
> @@ -245,4 +245,11 @@ config PCIE_ARMADA_8K
> Designware hardware and therefore the driver re-uses the
> Designware core functions to implement the driver.
>
> +config PCI_SH7751
> + bool "Renesas SH7751 On-Chip PCI controller"
> + depends on OF && SUPERH
> + select PCI_HOST_COMMON
> + help
> + Say Y here if you want PCI support on SH7751.
> +
> endmenu
> diff --git a/drivers/pci/host/Makefile b/drivers/pci/host/Makefile
> index 9c8698e..4681e49 100644
> --- a/drivers/pci/host/Makefile
> +++ b/drivers/pci/host/Makefile
> @@ -29,3 +29,4 @@ obj-$(CONFIG_PCIE_QCOM) += pcie-qcom.o
> obj-$(CONFIG_PCI_HOST_THUNDER_ECAM) += pci-thunder-ecam.o
> obj-$(CONFIG_PCI_HOST_THUNDER_PEM) += pci-thunder-pem.o
> obj-$(CONFIG_PCIE_ARMADA_8K) += pcie-armada8k.o
> +obj-$(CONFIG_PCI_SH7751) += pci-sh7751.o
> diff --git a/drivers/pci/host/pci-sh7751.c b/drivers/pci/host/pci-sh7751.c
> new file mode 100644
> index 0000000..21601f1
> --- /dev/null
> +++ b/drivers/pci/host/pci-sh7751.c
> @@ -0,0 +1,327 @@
> +/*
> + * SH7751 PCI driver
> + * Copyright (C) 2016 Yoshinori Sato
> + */
> +
> +#include <linux/kernel.h>
> +#include <linux/module.h>
> +#include <linux/of_address.h>
> +#include <linux/of_pci.h>
> +#include <linux/of_platform.h>
> +#include <linux/pci.h>
> +#include <linux/platform_device.h>
> +#include <linux/io.h>
> +#include "../ecam.h"
> +
> +#define SH7751_PCICONF1 0x4 /* PCI Config Reg 1 */
> +#define SH7751_PCICONF4 0x10 /* PCI Config Reg 4 */
> +#define SH7751_PCICONF5 0x14 /* PCI Config Reg 5 */
> +#define SH7751_PCICONF6 0x18 /* PCI Config Reg 6 */
> +#define SH4_PCICR 0x100 /* PCI Control Register */
> + #define SH4_PCICR_PREFIX 0xA5000000 /* CR prefix for write */
Follow the indentation style of include/uapi/linux/pci_regs.h,
drivers/pci/host/pcie-rcar.c, drivers/pci/host/pci-mvebu.c, etc.:
#define SH4_PCICR 0x100
#define SH4_PCICR_PREFIX 0xA5000000
> + #define SH4_PCICR_FTO BIT(10) /* TRDY/IRDY Enable */
> + #define SH4_PCICR_TRSB BIT(9) /* Target Read Single */
> + #define SH4_PCICR_BSWP BIT(8) /* Target Byte Swap */
> + #define SH4_PCICR_PLUP BIT(7) /* Enable PCI Pullup */
The above are unused and can be omitted.
> + #define SH4_PCICR_ARBM BIT(6) /* PCI Arbitration Mode */
> +#define SH4_PCICR_MD (BIT(4) | BIT(5)) /* MD9 and MD10 status */
Indentation error (should match other fields above). Also, unused, so
can just be omitted.
> + #define SH4_PCICR_SERR BIT(3) /* SERR output assert */
> + #define SH4_PCICR_INTA BIT(2) /* INTA output assert */
> + #define SH4_PCICR_PRST BIT(1) /* PCI Reset Assert */
Above are unused.
> + #define SH4_PCICR_CFIN BIT(0) /* Central Fun. Init Done */
> +#define SH4_PCILSR0 0x104 /* PCI Local Space Register0 */
> +#define SH4_PCILSR1 0x108 /* PCI Local Space Register1 */
Unused.
> +#define SH4_PCILAR0 0x10C /* PCI Local Addr Register1 */
> +#define SH4_PCILAR1 0x110 /* PCI Local Addr Register1 */
> +#define SH4_PCIINTM 0x118 /* PCI Interrupt Mask */
> + #define SH4_PCIINTM_TTADIM BIT(14) /* Target-target abort interrupt */
> + #define SH4_PCIINTM_TMTOIM BIT(9) /* Target retry timeout */
> + #define SH4_PCIINTM_MDEIM BIT(8) /* Master function disable error */
> + #define SH4_PCIINTM_APEDIM BIT(7) /* Address parity error detection */
> + #define SH4_PCIINTM_SDIM BIT(6) /* SERR detection */
> + #define SH4_PCIINTM_DPEITWM BIT(5) /* Data parity error for target write */
> + #define SH4_PCIINTM_PEDITRM BIT(4) /* PERR detection for target read */
> + #define SH4_PCIINTM_TADIMM BIT(3) /* Target abort for master */
> + #define SH4_PCIINTM_MADIMM BIT(2) /* Master abort for master */
> + #define SH4_PCIINTM_MWPDIM BIT(1) /* Master write data parity error */
> + #define SH4_PCIINTM_MRDPEIM BIT(0) /* Master read data parity error */
Field names are unused. You do write 0xc3ff to SH4_PCIINTM, but it's
a pain to match that up with these definitions. Either write out the
masks here, e.g., "#define SH4_PCIINTM_MRDPEIM 0x00000001", or build
up the SH4_PCIINTM from these definitions, or both.
> +#define SH4_PCIAINTM 0x134 /* Arbiter Int. Mask Register */
> +#define SH4_PCIPAR 0x1C0 /* PIO Address Register */
> + #define SH4_PCIPAR_CFGEN 0x80000000 /* Configuration Enable */
> + #define SH4_PCIPAR_BUSNO 0x00FF0000 /* Config. Bus Number */
> + #define SH4_PCIPAR_DEVNO 0x0000FF00 /* Config. Device Number */
> + #define SH4_PCIPAR_REGAD 0x000000FC /* Register Address Number */
Field names unused. At least SH4_PCIPAR_CFGEN *could* be used in
CONFIG_CMD() below.
> +#define SH4_PCIPINT 0x1CC /* Power Mgmnt Int. Register */
> + #define SH4_PCIPINT_D3 0x00000002 /* D3 Pwr Mgmt. Interrupt */
> + #define SH4_PCIPINT_D0 0x00000001 /* D0 Pwr Mgmt. Interrupt */
> +#define SH4_PCICLKR 0x1D4 /* Clock Ctrl. Register */
> +/* For definitions of BCR, MCR see ... */
See ... what?
> +#define SH4_PCIBCR1 0x1E0 /* Memory BCR1 Register */
> + #define SH4_PCIMBR0 SH4_PCIBCR1
Unused.
> +#define SH4_PCIBCR2 0x1E4 /* Memory BCR2 Register */
> + #define SH4_PCIMBMR0 SH4_PCIBCR2
Unused.
> +#define SH4_PCIWCR1 0x1E8 /* Wait Control 1 Register */
> +#define SH4_PCIWCR2 0x1EC /* Wait Control 2 Register */
> +#define SH4_PCIWCR3 0x1F0 /* Wait Control 3 Register */
> + #define SH4_PCIMBR2 SH4_PCIWCR3
Unused.
> +#define SH4_PCIMCR 0x1F4 /* Memory Control Register */
> +#define SH4_PCIPDR 0x220 /* Port IO Data Register */
> +
> +/* Platform Specific Values */
> +#define SH7751_VENDOR_ID 0x1054
> +#define SH7751_DEVICE_ID 0x3505
> +#define SH7751R_DEVICE_ID 0x350e
> +
> +/* Memory Control Registers */
> +#define SH7751_BCR1 0x0000 /* Memory BCR1 Register */
> +#define SH7751_BCR2 0x0004 /* Memory BCR2 Register */
> +#define SH7751_BCR3 0x0050 /* Memory BCR3 Register */
Unused.
> +#define SH7751_WCR1 0x0008 /* Wait Control 1 Register */
> +#define SH7751_WCR2 0x000C /* Wait Control 2 Register */
> +#define SH7751_WCR3 0x0010 /* Wait Control 3 Register */
> +#define SH7751_MCR 0x0014 /* Memory Control Register */
> +
> +#define pcic_writel(val, reg) iowrite32(val, pci_reg_base + (reg))
> +#define pcic_readl(reg) ioread32(pci_reg_base + (reg))
> +
> +/*
> + * PCIC fixups
> + */
> +
> +#define PCIMCR_MRSET 0x40000000
> +#define PCIMCR_RFSH 0x00000004
> +
> +static void __init landisk_fixup(void __iomem *pci_reg_base, void __iomem *bcr)
> +{
> + unsigned long bcr1, mcr;
> +
> + bcr1 = ioread32(bcr + SH7751_BCR1);
> + bcr1 |= 0x00080000; /* Enable Bit 19 BREQEN, set PCIC to slave */
> + pcic_writel(bcr1, SH4_PCIBCR1);
> +
> + mcr = ioread32(bcr + SH7751_MCR);
> + mcr &= (~PCIMCR_MRSET) & (~PCIMCR_RFSH);
> + pcic_writel(mcr, SH4_PCIMCR);
> +
> + pcic_writel(0x0c000000, PCI_BASE_ADDRESS_1);
> + pcic_writel(0xd0000000, PCI_BASE_ADDRESS_2);
> + pcic_writel(0x0c000000, SH4_PCILAR0);
> + pcic_writel(0x00000000, SH4_PCILAR1);
> +}
> +
> +static void __init r2dplus_fixup(void __iomem *pci_reg_base, void __iomem *bcr)
> +{
> + unsigned long bcr1, mcr;
> +
> + bcr1 = ioread32(bcr + SH7751_BCR1);
> + bcr1 |= 0x40080000; /* Enable Bit 19 BREQEN, set PCIC to slave */
> + pcic_writel(bcr1, SH4_PCIBCR1);
> +
> + /* Enable all interrupts, so we known what to fix */
> + pcic_writel(0x0000c3ff, SH4_PCIINTM);
> + pcic_writel(0x0000380f, SH4_PCIAINTM);
> +
> + pcic_writel(0xfb900047, SH7751_PCICONF1);
> + pcic_writel(0xab000001, SH7751_PCICONF4);
> +
> + mcr = ioread32(bcr + SH7751_MCR);
> + mcr &= (~PCIMCR_MRSET) & (~PCIMCR_RFSH);
> + pcic_writel(mcr, SH4_PCIMCR);
> +
> + pcic_writel(0x0c000000, SH7751_PCICONF5);
> + pcic_writel(0xd0000000, SH7751_PCICONF6);
> + pcic_writel(0x0c000000, SH4_PCILAR0);
> + pcic_writel(0x00000000, SH4_PCILAR1);
> +}
> +
> +/*
> + * Direct access to PCI hardware...
> + */
> +#define CONFIG_CMD(bus, devfn, where) \
> + (0x80000000 | (bus->number << 16) | (devfn << 8) | (where & ~3))
> +
> +/*
> + * Functions for accessing PCI configuration space with type 1 accesses
> + */
> +static void __iomem *sh7751_map_bus(struct pci_bus *bus,
> + unsigned int devfn, int where)
> +{
> + struct pci_config_window *cfg = bus->sysdata;
> + void __iomem *pci_reg_base = (void __iomem *)cfg->res.start;
> +
> + pcic_writel(CONFIG_CMD(bus, devfn, where), SH4_PCIPAR);
> + return pci_reg_base + SH4_PCIPDR;
> +}
> +
> +static const struct of_device_id fixup_of_match[] = {
> + { .compatible = "iodata,landisk-pci", .data = landisk_fixup, },
> + { .compatible = "renesas,r2dplus-pci", .data = r2dplus_fixup, },
> + { },
> +};
> +
> +static const struct of_device_id sh7751_pci_of_match[] = {
> + { .compatible = "renesas,sh7751-pci", },
> + { },
> +};
> +MODULE_DEVICE_TABLE(of, sh7751_pci_of_match);
> +
> +static resource_size_t sh7751_align_resource(struct pci_dev *dev,
> + const struct resource *res,
> + resource_size_t start,
> + resource_size_t size,
> + resource_size_t align)
> +{
> + if (res->flags & IORESOURCE_IO) {
> + if (start < PCIBIOS_MIN_IO + 0x1000)
> + start = PCIBIOS_MIN_IO + 0x1000;
> +
> + /*
> + * Put everything into 0x00-0xff region modulo 0x400.
> + */
> + if (start & 0x300)
> + start = (start + 0x3ff) & ~0x3ff;
> + }
> +
> + return start;
> +}
> +
> +static void __init set_pci_bcr(void __iomem *pci_reg_base,
> + void __iomem *bcr,
> + unsigned int area)
> +{
> + unsigned long word;
> +
> + word = ioread32(bcr + SH7751_BCR1);
> + /* check BCR for SDRAM in area */
> + if (((word >> area) & 1) == 0) {
> + pr_info("PCI: Area %d is not configured for SDRAM. BCR1=0x%lx\n",
> + area, word);
Use dev_info() so we can associate the message with a device and driver.
> + return;
> + }
> + pcic_writel(word, SH4_PCIBCR1);
> +
> + word = ioread16(bcr + SH7751_BCR2);
> + /* check BCR2 for 32bit SDRAM interface*/
> + if (((word >> (area << 1)) & 0x3) != 0x3) {
> + pr_info("PCI: Area %d is not 32 bit SDRAM. BCR2=0x%lx\n",
> + area, word);
dev_info()
> + return;
> + }
> + pcic_writel(word, SH4_PCIBCR2);
> +}
> +
> +static __init int sh7751_cfg_init(struct device *dev,
> + struct pci_config_window *cfg)
> +{
> + cfg->priv = sh7751_align_resource;
> + return 0;
> +}
> +
> +static struct pci_ecam_ops ecm_ops __initdata = {
> + .init = sh7751_cfg_init,
> + .pci_ops = {
> + .read = pci_generic_config_read32,
> + .write = pci_generic_config_write32,
> + .map_bus = sh7751_map_bus,
> + }
> +};
> +
> +static __init int sh7751_pci_probe(struct platform_device *pdev)
> +{
> + struct resource *res;
> + u32 id;
> + u32 reg, word;
> + void __iomem *pci_reg_base;
> + void __iomem *bcr;
> + const struct of_device_id *match;
> + void (*fixup_fn)(void __iomem *pci_reg_base, void __iomem *bcr);
> +
> + res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
> + pci_reg_base = ioremap(res->start, resource_size(res));
> + if (IS_ERR(pci_reg_base))
> + return PTR_ERR(pci_reg_base);
> +
> + res = platform_get_resource(pdev, IORESOURCE_MEM, 1);
> + bcr = ioremap(res->start, resource_size(res));
> + if (IS_ERR(bcr))
> + return PTR_ERR(bcr);
> +
> + /* check for SH7751/SH7751R hardware */
> + id = pcic_readl(PCI_VENDOR_ID);
> + if (id != ((SH7751_DEVICE_ID << 16) | SH7751_VENDOR_ID) &&
> + id != ((SH7751R_DEVICE_ID << 16) | SH7751_VENDOR_ID)) {
> + pr_warn("PCI: This is not an SH7751(R)\n");
dev_warn()
> + return -ENODEV;
> + }
> + dev_info(&pdev->dev, "PCI core found at %pR\n",
> + pci_reg_base);
> +
> + /* Set the BCRs to enable PCI access */
> + reg = ioread32(bcr);
> + reg |= 0x80000;
> + iowrite32(reg, bcr);
> +
> + /* Turn the clocks back on (not done in reset)*/
> + pcic_writel(0, SH4_PCICLKR);
> + /* Clear Powerdown IRQs (not done in reset) */
> + word = SH4_PCIPINT_D3 | SH4_PCIPINT_D0;
> + pcic_writel(word, SH4_PCIPINT);
> +
> + /* set the command/status bits to:
> + * Wait Cycle Control + Parity Enable + Bus Master +
> + * Mem space enable
> + */
Multi-line comment style is:
/*
* set the command/...
* ...
*/
> + word = PCI_COMMAND_WAIT | PCI_COMMAND_PARITY |
> + PCI_COMMAND_MASTER | PCI_COMMAND_MEMORY;
> + pcic_writel(word, PCI_COMMAND);
> +
> + /* define this host as the host bridge */
> + word = PCI_BASE_CLASS_BRIDGE << 24;
> + pcic_writel(word, PCI_CLASS_REVISION);
> +
> + /* Set IO and Mem windows to local address
> + * Make PCI and local address the same for easy 1 to 1 mapping
> + */
> + word = memory_end - memory_start - 1;
> + pcic_writel(word, SH4_PCILSR0);
> + /* Set the values on window 0 PCI config registers */
> + word = P2SEGADDR(__pa(memory_start));
> + pcic_writel(word, SH4_PCILAR0);
> + pcic_writel(word, PCI_BASE_ADDRESS_1);
> +
> + set_pci_bcr(pci_reg_base, bcr, (__pa(memory_start) >> 27) & 0x07);
> +
> + /* configure the wait control registers */
> + word = ioread32(bcr + SH7751_WCR1);
> + pcic_writel(word, SH4_PCIWCR1);
> + word = ioread32(bcr + SH7751_WCR2);
> + pcic_writel(word, SH4_PCIWCR2);
> + word = ioread32(bcr + SH7751_WCR3);
> + pcic_writel(word, SH4_PCIWCR3);
> + word = ioread32(bcr + SH7751_MCR);
> + pcic_writel(word, SH4_PCIMCR);
> +
> + match = of_match_node(fixup_of_match, pdev->dev.of_node);
> + if (match) {
> + fixup_fn = match->data;
> + fixup_fn(pci_reg_base, bcr);
> + }
> + /*
> + * SH7751 init done, set central function init complete
> + * use round robin mode to stop a device starving/overruning
> + */
> + word = SH4_PCICR_PREFIX | SH4_PCICR_CFIN | SH4_PCICR_ARBM;
> + pcic_writel(word, SH4_PCICR);
> +
> + return pci_host_common_probe(pdev, &ecm_ops);
> +}
> +
> +static __refdata struct platform_driver sh7751_pci_driver = {
> + .driver = {
> + .name = "sh7751-pci",
> + .of_match_table = sh7751_pci_of_match,
> + .suppress_bind_attrs = true,
> + },
> + .probe = sh7751_pci_probe,
> +};
> +builtin_platform_driver(sh7751_pci_driver);
> --
> 2.7.0
>
^ permalink raw reply [flat|nested] 138+ messages in thread
* [PATCH v5 13/22] sh: irqchip: SH7751 IRQCHIP Driver
2016-07-03 16:46 ` Yoshinori Sato
(?)
@ 2016-07-03 16:46 ` Yoshinori Sato
-1 siblings, 0 replies; 138+ messages in thread
From: Yoshinori Sato @ 2016-07-03 16:46 UTC (permalink / raw)
To: devicetree-u79uwXL29TY76Z2rM5mHXA,
linux-sh-u79uwXL29TY76Z2rM5mHXA,
linux-kernel-u79uwXL29TY76Z2rM5mHXA
Cc: Yoshinori Sato
Signed-off-by: Yoshinori Sato <ysato@users.sourceforge.jp>
Acked-by: Rob Herring <robh@kernel.org>
---
.../interrupt-controller/renesas,sh7751-intc.txt | 25 ++++
arch/sh/Kconfig | 6 +-
arch/sh/boards/Kconfig | 1 +
drivers/irqchip/Kconfig | 5 +
drivers/irqchip/Makefile | 1 +
drivers/irqchip/irq-renesas-sh7751.c | 141 +++++++++++++++++++++
6 files changed, 176 insertions(+), 3 deletions(-)
create mode 100644 Documentation/devicetree/bindings/interrupt-controller/renesas,sh7751-intc.txt
create mode 100644 drivers/irqchip/irq-renesas-sh7751.c
diff --git a/Documentation/devicetree/bindings/interrupt-controller/renesas,sh7751-intc.txt b/Documentation/devicetree/bindings/interrupt-controller/renesas,sh7751-intc.txt
new file mode 100644
index 0000000..2bc6f22f
--- /dev/null
+++ b/Documentation/devicetree/bindings/interrupt-controller/renesas,sh7751-intc.txt
@@ -0,0 +1,25 @@
+DT bindings for the SH7751 interrupt controller
+
+Required properties:
+
+ - compatible: has to be "renesas,sh7751-intc".
+
+ - reg: Base address and length of interrupt controller register
+ and extend register.
+
+ - interrupt-controller: Identifies the node as an interrupt controller.
+
+ - #interrupt-cells: has to be <2>: an interrupt index and flags, as defined
+ in interrupts.txt in this directory.
+
+Example
+-------
+
+ shintc: interrupt-controller@ffd00000 {
+ compatible = "renesas,sh7751-intc";
+ #interrupt-cells = <2>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ interrupt-controller;
+ reg = <0xffd00000 14>, <0xfe080000 128>;
+ };
diff --git a/arch/sh/Kconfig b/arch/sh/Kconfig
index d06cac1..fee4333 100644
--- a/arch/sh/Kconfig
+++ b/arch/sh/Kconfig
@@ -29,7 +29,7 @@ config SUPERH
select ARCH_WANT_IPC_PARSE_VERSION
select HAVE_SYSCALL_TRACEPOINTS
select HAVE_REGS_AND_STACK_ACCESS_API
- select MAY_HAVE_SPARSE_IRQ
+ select MAY_HAVE_SPARSE_IRQ if !SH_DEVICE_TREE
select IRQ_FORCED_THREADING
select RTC_LIB
select GENERIC_ATOMIC64
@@ -69,7 +69,7 @@ config SUPERH32
select HAVE_MIXED_BREAKPOINTS_REGS
select PERF_EVENTS
select ARCH_HIBERNATION_POSSIBLE if MMU
- select SPARSE_IRQ
+ select SPARSE_IRQ if !SH_DEVICE_TREE
select HAVE_CC_STACKPROTECTOR
config SUPERH64
@@ -863,7 +863,7 @@ config PCI
depends on SYS_SUPPORTS_PCI
select PCI_DOMAINS
select GENERIC_PCI_IOMAP
- select NO_GENERIC_PCI_IOPORT_MAP
+ select NO_GENERIC_PCI_IOPORT_MAP if !SH_DEVICE_TREE
help
Find out whether you have a PCI motherboard. PCI is the name of a
bus system, i.e. the way the CPU talks to the other stuff inside
diff --git a/arch/sh/boards/Kconfig b/arch/sh/boards/Kconfig
index cfde921..d33ae46 100644
--- a/arch/sh/boards/Kconfig
+++ b/arch/sh/boards/Kconfig
@@ -15,6 +15,7 @@ config SH_DEVICE_TREE
select GENERIC_IOMAP
select COMMON_CLK
select SYS_SUPPORTS_PCI
+ select GENERIC_IRQ_CHIP
help
Select Board Described by Device Tree to build a kernel that
does not hard-code any board-specific knowledge but instead uses
diff --git a/drivers/irqchip/Kconfig b/drivers/irqchip/Kconfig
index fa33c50..fd7f842 100644
--- a/drivers/irqchip/Kconfig
+++ b/drivers/irqchip/Kconfig
@@ -251,6 +251,11 @@ config LS_SCFG_MSI
depends on PCI && PCI_MSI
select PCI_MSI_IRQ_DOMAIN
+config RENESAS_SH_INTC
+ def_bool y if SH_DEVICE_TREE
+ select IRQ_DOMAIN
+ select IRQ_DOMAIN_HIERARCHY
+
config PARTITION_PERCPU
bool
diff --git a/drivers/irqchip/Makefile b/drivers/irqchip/Makefile
index 38853a1..2ab5735 100644
--- a/drivers/irqchip/Makefile
+++ b/drivers/irqchip/Makefile
@@ -69,3 +69,4 @@ obj-$(CONFIG_PIC32_EVIC) += irq-pic32-evic.o
obj-$(CONFIG_MVEBU_ODMI) += irq-mvebu-odmi.o
obj-$(CONFIG_LS_SCFG_MSI) += irq-ls-scfg-msi.o
obj-$(CONFIG_EZNPS_GIC) += irq-eznps.o
+obj-$(CONFIG_RENESAS_SH_INTC) += irq-renesas-sh7751.o
diff --git a/drivers/irqchip/irq-renesas-sh7751.c b/drivers/irqchip/irq-renesas-sh7751.c
new file mode 100644
index 0000000..1710978
--- /dev/null
+++ b/drivers/irqchip/irq-renesas-sh7751.c
@@ -0,0 +1,141 @@
+/*
+ * SH7751 interrupt contoller driver
+ *
+ * Copyright 2016 Yoshinori Sato <ysato@users.sourceforge.jp>
+ */
+
+#include <linux/irq.h>
+#include <linux/irqchip.h>
+#include <linux/of_address.h>
+#include <linux/of_irq.h>
+#include <linux/of.h>
+#include <linux/io.h>
+
+static struct sh7751_intc_regs {
+ void *icr;
+ void *ipr;
+ void *intpri00;
+ void *intreq00;
+ void *intmsk00;
+ void *intmskclr00;
+} sh7751_regs;
+
+static const unsigned int ipr_table[] = {
+ 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 0 - 7 */
+ 0x41, 0xff, 0xff, 0x40, 0xff, 0xff, 0xff, 0xff, /* 8 - 15 */
+ 0x03, 0x02, 0x01, 0x01, 0x00, 0x00, 0x00, 0x11, /* 16 - 23 */
+ 0x11, 0x11, 0x11, 0x13, 0x12, 0x12, 0xff, 0xff, /* 24 - 31 */
+ 0x30, 0x33, 0x32, 0x32, 0x32, 0x32, 0x32, 0x21, /* 32 - 39 */
+ 0x21, 0x21, 0x21, 0x21, 0x32, 0x32, 0x32, 0x32, /* 40 - 47 */
+ 0xff, 0xff, 0xff, 0x40, 0xff, 0xff, 0xff, 0xff, /* 48 - 55 */
+ 0xff, 0xff, 0xff, 0x40, 0xff, 0xff, 0xff, 0xff, /* 56 - 63 */
+};
+
+static const unsigned int pri_table[] = {
+ 0, 4, 4, 4, 4, 4, 4, 4,
+ 8, 32, 32, 32, 12, 32, 32, 32,
+};
+
+static void sh_disable_irq(struct irq_data *data)
+{
+ int pos;
+ unsigned int addr;
+ unsigned long pri;
+ int irq = data->irq;
+ struct sh7751_intc_regs *reg = data->chip_data;
+
+ if (irq < 64) {
+ if (ipr_table[irq] != 0xff) {
+ addr = (ipr_table[irq] & 0xf0) >> 2;
+ pos = (ipr_table[irq] & 0x0f) << 4;
+ pri = ~(0x000f << pos);
+ pri &= __raw_readw(reg->ipr + addr);
+ __raw_writew(pri, reg->ipr + addr);
+ }
+ } else {
+ if (pri_table[irq - 64] < 32) {
+ pos = pri_table[irq - 64];
+ pri = ~(0x000f << pos);
+ pri &= __raw_readw(reg->intpri00);
+ __raw_writew(pri, reg->intpri00);
+ }
+ }
+}
+
+static void sh_enable_irq(struct irq_data *data)
+{
+ int pos;
+ unsigned int addr;
+ unsigned long pri;
+ int irq = data->irq;
+ struct sh7751_intc_regs *reg = data->chip_data;
+
+ if (irq < 64) {
+ if (ipr_table[irq] != 0xff) {
+ addr = (ipr_table[irq] & 0xf0) >> 2;
+ pos = (ipr_table[irq] & 0x0f) * 4;
+ pri = ~(0x000f << pos);
+ pri &= __raw_readw(reg->ipr + addr);
+ pri |= 1 << pos;
+ __raw_writew(pri, reg->ipr + addr);
+ }
+ } else {
+ if (pri_table[irq - 64] < 32) {
+ pos = pri_table[irq - 64];
+ pri = ~(0x000f << pos);
+ pri &= __raw_readw(reg->intpri00);
+ pri |= 1 << pos;
+ __raw_writew(pri, reg->intpri00);
+ }
+ }
+}
+
+static struct irq_chip sh_irq_chip = {
+ .name = "SH-IPR",
+ .irq_unmask = sh_enable_irq,
+ .irq_mask = sh_disable_irq,
+};
+
+static __init int irq_map(struct irq_domain *h, unsigned int virq,
+ irq_hw_number_t hw_irq_num)
+{
+ irq_set_chip_and_handler(virq, &sh_irq_chip, handle_level_irq);
+ irq_get_irq_data(virq)->chip_data = h->host_data;
+ irq_modify_status(virq, IRQ_NOREQUEST, IRQ_NOPROBE);
+
+ return 0;
+}
+
+static struct irq_domain_ops irq_ops = {
+ .map = irq_map,
+ .xlate = irq_domain_xlate_onecell,
+};
+
+static int __init sh_intc_7751_init(struct device_node *intc,
+ struct device_node *parent)
+{
+ struct irq_domain *domain;
+ void *intc_baseaddr;
+ void *intc_baseaddr2;
+
+ intc_baseaddr = of_iomap(intc, 0);
+ intc_baseaddr2 = of_iomap(intc, 1);
+ if (!intc_baseaddr || !intc_baseaddr2)
+ panic("INTC regsiter not defined");
+
+ sh7751_regs.icr = intc_baseaddr;
+ sh7751_regs.ipr = intc_baseaddr + 4;
+ sh7751_regs.intpri00 = intc_baseaddr2;
+ sh7751_regs.intreq00 = intc_baseaddr2 + 0x20;
+ sh7751_regs.intmsk00 = intc_baseaddr2 + 0x40;
+ sh7751_regs.intmskclr00 = intc_baseaddr2 + 0x60;
+
+ domain = irq_domain_add_linear(intc, NR_IRQS, &irq_ops, &sh7751_regs);
+ if (!domain)
+ panic("%s: unable to create IRQ domain\n", intc->full_name);
+
+ irq_set_default_host(domain);
+ return 0;
+}
+
+IRQCHIP_DECLARE(sh_7751_intc, "renesas,sh7751-intc", sh_intc_7751_init);
--
2.7.0
^ permalink raw reply related [flat|nested] 138+ messages in thread* [PATCH v5 13/22] sh: irqchip: SH7751 IRQCHIP Driver
@ 2016-07-03 16:46 ` Yoshinori Sato
0 siblings, 0 replies; 138+ messages in thread
From: Yoshinori Sato @ 2016-07-03 16:46 UTC (permalink / raw)
To: devicetree-u79uwXL29TY76Z2rM5mHXA,
linux-sh-u79uwXL29TY76Z2rM5mHXA,
linux-kernel-u79uwXL29TY76Z2rM5mHXA
Cc: Yoshinori Sato
Signed-off-by: Yoshinori Sato <ysato-Rn4VEauK+AKRv+LV9MX5uooqe+aC9MnS@public.gmane.org>
Acked-by: Rob Herring <robh-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>
---
.../interrupt-controller/renesas,sh7751-intc.txt | 25 ++++
arch/sh/Kconfig | 6 +-
arch/sh/boards/Kconfig | 1 +
drivers/irqchip/Kconfig | 5 +
drivers/irqchip/Makefile | 1 +
drivers/irqchip/irq-renesas-sh7751.c | 141 +++++++++++++++++++++
6 files changed, 176 insertions(+), 3 deletions(-)
create mode 100644 Documentation/devicetree/bindings/interrupt-controller/renesas,sh7751-intc.txt
create mode 100644 drivers/irqchip/irq-renesas-sh7751.c
diff --git a/Documentation/devicetree/bindings/interrupt-controller/renesas,sh7751-intc.txt b/Documentation/devicetree/bindings/interrupt-controller/renesas,sh7751-intc.txt
new file mode 100644
index 0000000..2bc6f22f
--- /dev/null
+++ b/Documentation/devicetree/bindings/interrupt-controller/renesas,sh7751-intc.txt
@@ -0,0 +1,25 @@
+DT bindings for the SH7751 interrupt controller
+
+Required properties:
+
+ - compatible: has to be "renesas,sh7751-intc".
+
+ - reg: Base address and length of interrupt controller register
+ and extend register.
+
+ - interrupt-controller: Identifies the node as an interrupt controller.
+
+ - #interrupt-cells: has to be <2>: an interrupt index and flags, as defined
+ in interrupts.txt in this directory.
+
+Example
+-------
+
+ shintc: interrupt-controller@ffd00000 {
+ compatible = "renesas,sh7751-intc";
+ #interrupt-cells = <2>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ interrupt-controller;
+ reg = <0xffd00000 14>, <0xfe080000 128>;
+ };
diff --git a/arch/sh/Kconfig b/arch/sh/Kconfig
index d06cac1..fee4333 100644
--- a/arch/sh/Kconfig
+++ b/arch/sh/Kconfig
@@ -29,7 +29,7 @@ config SUPERH
select ARCH_WANT_IPC_PARSE_VERSION
select HAVE_SYSCALL_TRACEPOINTS
select HAVE_REGS_AND_STACK_ACCESS_API
- select MAY_HAVE_SPARSE_IRQ
+ select MAY_HAVE_SPARSE_IRQ if !SH_DEVICE_TREE
select IRQ_FORCED_THREADING
select RTC_LIB
select GENERIC_ATOMIC64
@@ -69,7 +69,7 @@ config SUPERH32
select HAVE_MIXED_BREAKPOINTS_REGS
select PERF_EVENTS
select ARCH_HIBERNATION_POSSIBLE if MMU
- select SPARSE_IRQ
+ select SPARSE_IRQ if !SH_DEVICE_TREE
select HAVE_CC_STACKPROTECTOR
config SUPERH64
@@ -863,7 +863,7 @@ config PCI
depends on SYS_SUPPORTS_PCI
select PCI_DOMAINS
select GENERIC_PCI_IOMAP
- select NO_GENERIC_PCI_IOPORT_MAP
+ select NO_GENERIC_PCI_IOPORT_MAP if !SH_DEVICE_TREE
help
Find out whether you have a PCI motherboard. PCI is the name of a
bus system, i.e. the way the CPU talks to the other stuff inside
diff --git a/arch/sh/boards/Kconfig b/arch/sh/boards/Kconfig
index cfde921..d33ae46 100644
--- a/arch/sh/boards/Kconfig
+++ b/arch/sh/boards/Kconfig
@@ -15,6 +15,7 @@ config SH_DEVICE_TREE
select GENERIC_IOMAP
select COMMON_CLK
select SYS_SUPPORTS_PCI
+ select GENERIC_IRQ_CHIP
help
Select Board Described by Device Tree to build a kernel that
does not hard-code any board-specific knowledge but instead uses
diff --git a/drivers/irqchip/Kconfig b/drivers/irqchip/Kconfig
index fa33c50..fd7f842 100644
--- a/drivers/irqchip/Kconfig
+++ b/drivers/irqchip/Kconfig
@@ -251,6 +251,11 @@ config LS_SCFG_MSI
depends on PCI && PCI_MSI
select PCI_MSI_IRQ_DOMAIN
+config RENESAS_SH_INTC
+ def_bool y if SH_DEVICE_TREE
+ select IRQ_DOMAIN
+ select IRQ_DOMAIN_HIERARCHY
+
config PARTITION_PERCPU
bool
diff --git a/drivers/irqchip/Makefile b/drivers/irqchip/Makefile
index 38853a1..2ab5735 100644
--- a/drivers/irqchip/Makefile
+++ b/drivers/irqchip/Makefile
@@ -69,3 +69,4 @@ obj-$(CONFIG_PIC32_EVIC) += irq-pic32-evic.o
obj-$(CONFIG_MVEBU_ODMI) += irq-mvebu-odmi.o
obj-$(CONFIG_LS_SCFG_MSI) += irq-ls-scfg-msi.o
obj-$(CONFIG_EZNPS_GIC) += irq-eznps.o
+obj-$(CONFIG_RENESAS_SH_INTC) += irq-renesas-sh7751.o
diff --git a/drivers/irqchip/irq-renesas-sh7751.c b/drivers/irqchip/irq-renesas-sh7751.c
new file mode 100644
index 0000000..1710978
--- /dev/null
+++ b/drivers/irqchip/irq-renesas-sh7751.c
@@ -0,0 +1,141 @@
+/*
+ * SH7751 interrupt contoller driver
+ *
+ * Copyright 2016 Yoshinori Sato <ysato-Rn4VEauK+AKRv+LV9MX5uooqe+aC9MnS@public.gmane.org>
+ */
+
+#include <linux/irq.h>
+#include <linux/irqchip.h>
+#include <linux/of_address.h>
+#include <linux/of_irq.h>
+#include <linux/of.h>
+#include <linux/io.h>
+
+static struct sh7751_intc_regs {
+ void *icr;
+ void *ipr;
+ void *intpri00;
+ void *intreq00;
+ void *intmsk00;
+ void *intmskclr00;
+} sh7751_regs;
+
+static const unsigned int ipr_table[] = {
+ 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 0 - 7 */
+ 0x41, 0xff, 0xff, 0x40, 0xff, 0xff, 0xff, 0xff, /* 8 - 15 */
+ 0x03, 0x02, 0x01, 0x01, 0x00, 0x00, 0x00, 0x11, /* 16 - 23 */
+ 0x11, 0x11, 0x11, 0x13, 0x12, 0x12, 0xff, 0xff, /* 24 - 31 */
+ 0x30, 0x33, 0x32, 0x32, 0x32, 0x32, 0x32, 0x21, /* 32 - 39 */
+ 0x21, 0x21, 0x21, 0x21, 0x32, 0x32, 0x32, 0x32, /* 40 - 47 */
+ 0xff, 0xff, 0xff, 0x40, 0xff, 0xff, 0xff, 0xff, /* 48 - 55 */
+ 0xff, 0xff, 0xff, 0x40, 0xff, 0xff, 0xff, 0xff, /* 56 - 63 */
+};
+
+static const unsigned int pri_table[] = {
+ 0, 4, 4, 4, 4, 4, 4, 4,
+ 8, 32, 32, 32, 12, 32, 32, 32,
+};
+
+static void sh_disable_irq(struct irq_data *data)
+{
+ int pos;
+ unsigned int addr;
+ unsigned long pri;
+ int irq = data->irq;
+ struct sh7751_intc_regs *reg = data->chip_data;
+
+ if (irq < 64) {
+ if (ipr_table[irq] != 0xff) {
+ addr = (ipr_table[irq] & 0xf0) >> 2;
+ pos = (ipr_table[irq] & 0x0f) << 4;
+ pri = ~(0x000f << pos);
+ pri &= __raw_readw(reg->ipr + addr);
+ __raw_writew(pri, reg->ipr + addr);
+ }
+ } else {
+ if (pri_table[irq - 64] < 32) {
+ pos = pri_table[irq - 64];
+ pri = ~(0x000f << pos);
+ pri &= __raw_readw(reg->intpri00);
+ __raw_writew(pri, reg->intpri00);
+ }
+ }
+}
+
+static void sh_enable_irq(struct irq_data *data)
+{
+ int pos;
+ unsigned int addr;
+ unsigned long pri;
+ int irq = data->irq;
+ struct sh7751_intc_regs *reg = data->chip_data;
+
+ if (irq < 64) {
+ if (ipr_table[irq] != 0xff) {
+ addr = (ipr_table[irq] & 0xf0) >> 2;
+ pos = (ipr_table[irq] & 0x0f) * 4;
+ pri = ~(0x000f << pos);
+ pri &= __raw_readw(reg->ipr + addr);
+ pri |= 1 << pos;
+ __raw_writew(pri, reg->ipr + addr);
+ }
+ } else {
+ if (pri_table[irq - 64] < 32) {
+ pos = pri_table[irq - 64];
+ pri = ~(0x000f << pos);
+ pri &= __raw_readw(reg->intpri00);
+ pri |= 1 << pos;
+ __raw_writew(pri, reg->intpri00);
+ }
+ }
+}
+
+static struct irq_chip sh_irq_chip = {
+ .name = "SH-IPR",
+ .irq_unmask = sh_enable_irq,
+ .irq_mask = sh_disable_irq,
+};
+
+static __init int irq_map(struct irq_domain *h, unsigned int virq,
+ irq_hw_number_t hw_irq_num)
+{
+ irq_set_chip_and_handler(virq, &sh_irq_chip, handle_level_irq);
+ irq_get_irq_data(virq)->chip_data = h->host_data;
+ irq_modify_status(virq, IRQ_NOREQUEST, IRQ_NOPROBE);
+
+ return 0;
+}
+
+static struct irq_domain_ops irq_ops = {
+ .map = irq_map,
+ .xlate = irq_domain_xlate_onecell,
+};
+
+static int __init sh_intc_7751_init(struct device_node *intc,
+ struct device_node *parent)
+{
+ struct irq_domain *domain;
+ void *intc_baseaddr;
+ void *intc_baseaddr2;
+
+ intc_baseaddr = of_iomap(intc, 0);
+ intc_baseaddr2 = of_iomap(intc, 1);
+ if (!intc_baseaddr || !intc_baseaddr2)
+ panic("INTC regsiter not defined");
+
+ sh7751_regs.icr = intc_baseaddr;
+ sh7751_regs.ipr = intc_baseaddr + 4;
+ sh7751_regs.intpri00 = intc_baseaddr2;
+ sh7751_regs.intreq00 = intc_baseaddr2 + 0x20;
+ sh7751_regs.intmsk00 = intc_baseaddr2 + 0x40;
+ sh7751_regs.intmskclr00 = intc_baseaddr2 + 0x60;
+
+ domain = irq_domain_add_linear(intc, NR_IRQS, &irq_ops, &sh7751_regs);
+ if (!domain)
+ panic("%s: unable to create IRQ domain\n", intc->full_name);
+
+ irq_set_default_host(domain);
+ return 0;
+}
+
+IRQCHIP_DECLARE(sh_7751_intc, "renesas,sh7751-intc", sh_intc_7751_init);
--
2.7.0
--
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^ permalink raw reply related [flat|nested] 138+ messages in thread* [PATCH v5 13/22] sh: irqchip: SH7751 IRQCHIP Driver
@ 2016-07-03 16:46 ` Yoshinori Sato
0 siblings, 0 replies; 138+ messages in thread
From: Yoshinori Sato @ 2016-07-03 16:46 UTC (permalink / raw)
To: devicetree, linux-sh, linux-kernel; +Cc: Yoshinori Sato
Signed-off-by: Yoshinori Sato <ysato@users.sourceforge.jp>
Acked-by: Rob Herring <robh@kernel.org>
---
.../interrupt-controller/renesas,sh7751-intc.txt | 25 ++++
arch/sh/Kconfig | 6 +-
arch/sh/boards/Kconfig | 1 +
drivers/irqchip/Kconfig | 5 +
drivers/irqchip/Makefile | 1 +
drivers/irqchip/irq-renesas-sh7751.c | 141 +++++++++++++++++++++
6 files changed, 176 insertions(+), 3 deletions(-)
create mode 100644 Documentation/devicetree/bindings/interrupt-controller/renesas,sh7751-intc.txt
create mode 100644 drivers/irqchip/irq-renesas-sh7751.c
diff --git a/Documentation/devicetree/bindings/interrupt-controller/renesas,sh7751-intc.txt b/Documentation/devicetree/bindings/interrupt-controller/renesas,sh7751-intc.txt
new file mode 100644
index 0000000..2bc6f22f
--- /dev/null
+++ b/Documentation/devicetree/bindings/interrupt-controller/renesas,sh7751-intc.txt
@@ -0,0 +1,25 @@
+DT bindings for the SH7751 interrupt controller
+
+Required properties:
+
+ - compatible: has to be "renesas,sh7751-intc".
+
+ - reg: Base address and length of interrupt controller register
+ and extend register.
+
+ - interrupt-controller: Identifies the node as an interrupt controller.
+
+ - #interrupt-cells: has to be <2>: an interrupt index and flags, as defined
+ in interrupts.txt in this directory.
+
+Example
+-------
+
+ shintc: interrupt-controller@ffd00000 {
+ compatible = "renesas,sh7751-intc";
+ #interrupt-cells = <2>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ interrupt-controller;
+ reg = <0xffd00000 14>, <0xfe080000 128>;
+ };
diff --git a/arch/sh/Kconfig b/arch/sh/Kconfig
index d06cac1..fee4333 100644
--- a/arch/sh/Kconfig
+++ b/arch/sh/Kconfig
@@ -29,7 +29,7 @@ config SUPERH
select ARCH_WANT_IPC_PARSE_VERSION
select HAVE_SYSCALL_TRACEPOINTS
select HAVE_REGS_AND_STACK_ACCESS_API
- select MAY_HAVE_SPARSE_IRQ
+ select MAY_HAVE_SPARSE_IRQ if !SH_DEVICE_TREE
select IRQ_FORCED_THREADING
select RTC_LIB
select GENERIC_ATOMIC64
@@ -69,7 +69,7 @@ config SUPERH32
select HAVE_MIXED_BREAKPOINTS_REGS
select PERF_EVENTS
select ARCH_HIBERNATION_POSSIBLE if MMU
- select SPARSE_IRQ
+ select SPARSE_IRQ if !SH_DEVICE_TREE
select HAVE_CC_STACKPROTECTOR
config SUPERH64
@@ -863,7 +863,7 @@ config PCI
depends on SYS_SUPPORTS_PCI
select PCI_DOMAINS
select GENERIC_PCI_IOMAP
- select NO_GENERIC_PCI_IOPORT_MAP
+ select NO_GENERIC_PCI_IOPORT_MAP if !SH_DEVICE_TREE
help
Find out whether you have a PCI motherboard. PCI is the name of a
bus system, i.e. the way the CPU talks to the other stuff inside
diff --git a/arch/sh/boards/Kconfig b/arch/sh/boards/Kconfig
index cfde921..d33ae46 100644
--- a/arch/sh/boards/Kconfig
+++ b/arch/sh/boards/Kconfig
@@ -15,6 +15,7 @@ config SH_DEVICE_TREE
select GENERIC_IOMAP
select COMMON_CLK
select SYS_SUPPORTS_PCI
+ select GENERIC_IRQ_CHIP
help
Select Board Described by Device Tree to build a kernel that
does not hard-code any board-specific knowledge but instead uses
diff --git a/drivers/irqchip/Kconfig b/drivers/irqchip/Kconfig
index fa33c50..fd7f842 100644
--- a/drivers/irqchip/Kconfig
+++ b/drivers/irqchip/Kconfig
@@ -251,6 +251,11 @@ config LS_SCFG_MSI
depends on PCI && PCI_MSI
select PCI_MSI_IRQ_DOMAIN
+config RENESAS_SH_INTC
+ def_bool y if SH_DEVICE_TREE
+ select IRQ_DOMAIN
+ select IRQ_DOMAIN_HIERARCHY
+
config PARTITION_PERCPU
bool
diff --git a/drivers/irqchip/Makefile b/drivers/irqchip/Makefile
index 38853a1..2ab5735 100644
--- a/drivers/irqchip/Makefile
+++ b/drivers/irqchip/Makefile
@@ -69,3 +69,4 @@ obj-$(CONFIG_PIC32_EVIC) += irq-pic32-evic.o
obj-$(CONFIG_MVEBU_ODMI) += irq-mvebu-odmi.o
obj-$(CONFIG_LS_SCFG_MSI) += irq-ls-scfg-msi.o
obj-$(CONFIG_EZNPS_GIC) += irq-eznps.o
+obj-$(CONFIG_RENESAS_SH_INTC) += irq-renesas-sh7751.o
diff --git a/drivers/irqchip/irq-renesas-sh7751.c b/drivers/irqchip/irq-renesas-sh7751.c
new file mode 100644
index 0000000..1710978
--- /dev/null
+++ b/drivers/irqchip/irq-renesas-sh7751.c
@@ -0,0 +1,141 @@
+/*
+ * SH7751 interrupt contoller driver
+ *
+ * Copyright 2016 Yoshinori Sato <ysato@users.sourceforge.jp>
+ */
+
+#include <linux/irq.h>
+#include <linux/irqchip.h>
+#include <linux/of_address.h>
+#include <linux/of_irq.h>
+#include <linux/of.h>
+#include <linux/io.h>
+
+static struct sh7751_intc_regs {
+ void *icr;
+ void *ipr;
+ void *intpri00;
+ void *intreq00;
+ void *intmsk00;
+ void *intmskclr00;
+} sh7751_regs;
+
+static const unsigned int ipr_table[] = {
+ 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 0 - 7 */
+ 0x41, 0xff, 0xff, 0x40, 0xff, 0xff, 0xff, 0xff, /* 8 - 15 */
+ 0x03, 0x02, 0x01, 0x01, 0x00, 0x00, 0x00, 0x11, /* 16 - 23 */
+ 0x11, 0x11, 0x11, 0x13, 0x12, 0x12, 0xff, 0xff, /* 24 - 31 */
+ 0x30, 0x33, 0x32, 0x32, 0x32, 0x32, 0x32, 0x21, /* 32 - 39 */
+ 0x21, 0x21, 0x21, 0x21, 0x32, 0x32, 0x32, 0x32, /* 40 - 47 */
+ 0xff, 0xff, 0xff, 0x40, 0xff, 0xff, 0xff, 0xff, /* 48 - 55 */
+ 0xff, 0xff, 0xff, 0x40, 0xff, 0xff, 0xff, 0xff, /* 56 - 63 */
+};
+
+static const unsigned int pri_table[] = {
+ 0, 4, 4, 4, 4, 4, 4, 4,
+ 8, 32, 32, 32, 12, 32, 32, 32,
+};
+
+static void sh_disable_irq(struct irq_data *data)
+{
+ int pos;
+ unsigned int addr;
+ unsigned long pri;
+ int irq = data->irq;
+ struct sh7751_intc_regs *reg = data->chip_data;
+
+ if (irq < 64) {
+ if (ipr_table[irq] != 0xff) {
+ addr = (ipr_table[irq] & 0xf0) >> 2;
+ pos = (ipr_table[irq] & 0x0f) << 4;
+ pri = ~(0x000f << pos);
+ pri &= __raw_readw(reg->ipr + addr);
+ __raw_writew(pri, reg->ipr + addr);
+ }
+ } else {
+ if (pri_table[irq - 64] < 32) {
+ pos = pri_table[irq - 64];
+ pri = ~(0x000f << pos);
+ pri &= __raw_readw(reg->intpri00);
+ __raw_writew(pri, reg->intpri00);
+ }
+ }
+}
+
+static void sh_enable_irq(struct irq_data *data)
+{
+ int pos;
+ unsigned int addr;
+ unsigned long pri;
+ int irq = data->irq;
+ struct sh7751_intc_regs *reg = data->chip_data;
+
+ if (irq < 64) {
+ if (ipr_table[irq] != 0xff) {
+ addr = (ipr_table[irq] & 0xf0) >> 2;
+ pos = (ipr_table[irq] & 0x0f) * 4;
+ pri = ~(0x000f << pos);
+ pri &= __raw_readw(reg->ipr + addr);
+ pri |= 1 << pos;
+ __raw_writew(pri, reg->ipr + addr);
+ }
+ } else {
+ if (pri_table[irq - 64] < 32) {
+ pos = pri_table[irq - 64];
+ pri = ~(0x000f << pos);
+ pri &= __raw_readw(reg->intpri00);
+ pri |= 1 << pos;
+ __raw_writew(pri, reg->intpri00);
+ }
+ }
+}
+
+static struct irq_chip sh_irq_chip = {
+ .name = "SH-IPR",
+ .irq_unmask = sh_enable_irq,
+ .irq_mask = sh_disable_irq,
+};
+
+static __init int irq_map(struct irq_domain *h, unsigned int virq,
+ irq_hw_number_t hw_irq_num)
+{
+ irq_set_chip_and_handler(virq, &sh_irq_chip, handle_level_irq);
+ irq_get_irq_data(virq)->chip_data = h->host_data;
+ irq_modify_status(virq, IRQ_NOREQUEST, IRQ_NOPROBE);
+
+ return 0;
+}
+
+static struct irq_domain_ops irq_ops = {
+ .map = irq_map,
+ .xlate = irq_domain_xlate_onecell,
+};
+
+static int __init sh_intc_7751_init(struct device_node *intc,
+ struct device_node *parent)
+{
+ struct irq_domain *domain;
+ void *intc_baseaddr;
+ void *intc_baseaddr2;
+
+ intc_baseaddr = of_iomap(intc, 0);
+ intc_baseaddr2 = of_iomap(intc, 1);
+ if (!intc_baseaddr || !intc_baseaddr2)
+ panic("INTC regsiter not defined");
+
+ sh7751_regs.icr = intc_baseaddr;
+ sh7751_regs.ipr = intc_baseaddr + 4;
+ sh7751_regs.intpri00 = intc_baseaddr2;
+ sh7751_regs.intreq00 = intc_baseaddr2 + 0x20;
+ sh7751_regs.intmsk00 = intc_baseaddr2 + 0x40;
+ sh7751_regs.intmskclr00 = intc_baseaddr2 + 0x60;
+
+ domain = irq_domain_add_linear(intc, NR_IRQS, &irq_ops, &sh7751_regs);
+ if (!domain)
+ panic("%s: unable to create IRQ domain\n", intc->full_name);
+
+ irq_set_default_host(domain);
+ return 0;
+}
+
+IRQCHIP_DECLARE(sh_7751_intc, "renesas,sh7751-intc", sh_intc_7751_init);
--
2.7.0
^ permalink raw reply related [flat|nested] 138+ messages in thread
* [PATCH v5 14/22] sh: SH7751 core dtsi
2016-07-03 16:46 ` Yoshinori Sato
@ 2016-07-03 16:46 ` Yoshinori Sato
-1 siblings, 0 replies; 138+ messages in thread
From: Yoshinori Sato @ 2016-07-03 16:46 UTC (permalink / raw)
To: devicetree, linux-sh, linux-kernel; +Cc: Yoshinori Sato
SH7751 core and internal peripheral define.
Signed-off-by: Yoshinori Sato <ysato@users.sourceforge.jp>
---
arch/sh/boot/dts/include/dt-bindings | 1 +
arch/sh/boot/dts/sh7751.dtsi | 83 ++++++++++++++++++++++
include/dt-bindings/clock/renesas-sh7750.h | 26 +++++++
include/dt-bindings/interrupt-controller/sh_intc.h | 2 +
4 files changed, 112 insertions(+)
create mode 120000 arch/sh/boot/dts/include/dt-bindings
create mode 100644 arch/sh/boot/dts/sh7751.dtsi
create mode 100644 include/dt-bindings/clock/renesas-sh7750.h
create mode 100644 include/dt-bindings/interrupt-controller/sh_intc.h
diff --git a/arch/sh/boot/dts/include/dt-bindings b/arch/sh/boot/dts/include/dt-bindings
new file mode 120000
index 0000000..08c00e4
--- /dev/null
+++ b/arch/sh/boot/dts/include/dt-bindings
@@ -0,0 +1 @@
+../../../../../include/dt-bindings
\ No newline at end of file
diff --git a/arch/sh/boot/dts/sh7751.dtsi b/arch/sh/boot/dts/sh7751.dtsi
new file mode 100644
index 0000000..713e72e
--- /dev/null
+++ b/arch/sh/boot/dts/sh7751.dtsi
@@ -0,0 +1,83 @@
+/*
+ * Device Tree Source for the SH7751
+ *
+ * Copyright (C) 2016 Yoshinori Sato
+ */
+
+#include <dt-bindings/interrupt-controller/sh_intc.h>
+#include <dt-bindings/clock/renesas-sh7750.h>
+
+/ {
+ oclk: oscillator {
+ #clock-cells = <0>;
+ compatible = "fixed-clock";
+ clock-frequency = <0>;
+ };
+ cpg: clock-controller@ffc00000 {
+ compatible = "renesas,sh7750-cpg";
+ clocks = <&oclk>;
+ #clock-cells = <1>;
+ renesas,mult = <12>;
+ reg = <0xffc00000 32>, <0xfe0a0000 16>;
+ };
+ cpus {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ cpu@0 {
+ compatible = "renesas,sh4", "renesas,sh";
+ clock-frequency = <266666666>;
+ };
+ };
+ shintc: interrupt-controller@ffd00000 {
+ compatible = "renesas,sh7751-intc";
+ #interrupt-cells = <2>;
+ interrupt-controller;
+ reg = <0xffd00000 14>, <0xfe080000 128>;
+
+ };
+ sci0: serial@ffe00000 {
+ compatible = "renesas,sci";
+ reg = <0xffe00000 0x20>;
+ interrupts = <evt2irq(0x4e0) 0>,
+ <evt2irq(0x500) 0>,
+ <evt2irq(0x540) 0>,
+ <evt2irq(0x520) 0>;
+ clocks = <&cpg SH7750_CLK_SCI>;
+ clock-names = "fck";
+ status = "disabled";
+ };
+ sci1: serial@ffe80000 {
+ compatible = "renesas,scif";
+ reg = <0xffe80000 0x100>;
+ interrupts = <evt2irq(0x700) 0>,
+ <evt2irq(0x720) 0>,
+ <evt2irq(0x760) 0>,
+ <evt2irq(0x740) 0>;
+ clocks = <&cpg SH7750_CLK_SCIF>;
+ clock-names = "fck";
+ status = "disabled";
+ };
+ tmu: timer@ffd80000 {
+ compatible = "renesas,tmu";
+ reg = <0xffd80000 12>;
+ interrupts = <evt2irq(0x400) 0>,
+ <evt2irq(0x420) 0>,
+ <evt2irq(0x440) 0>;
+ clocks = <&cpg SH7750_CLK_TMU0>;
+ clock-names = "fck";
+ renesas,channels-mask = <0x03>;
+ };
+ pci: pci-controller@fe200000 {
+ compatible = "renesas,sh7751-pci";
+ device_type = "pci";
+ bus-range = <0 0>;
+ #address-cells = <2>;
+ #size-cells = <1>;
+ ranges = <0x02000000 0x00000000 0xfd000000 0xfd000000 0x00000000 0x01000000>,
+ <0x01000000 0x00000000 0xfe240000 0x00000000 0x00000000 0x00040000>;
+ reg = <0xfe200000 0x0400>, <0xff800000 0x0030>;
+ #interrupt-cells = <1>;
+ interrupt-map-mask = <0x1800 0 7>;
+ status = "disabled";
+ };
+};
diff --git a/include/dt-bindings/clock/renesas-sh7750.h b/include/dt-bindings/clock/renesas-sh7750.h
new file mode 100644
index 0000000..546c0b1
--- /dev/null
+++ b/include/dt-bindings/clock/renesas-sh7750.h
@@ -0,0 +1,26 @@
+/*
+ * Copyright (C) 2016 Yoshinori Sato
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ */
+#ifndef __DT_BINDINGS_CLOCK_RENESAS_SH7750_H__
+#define __DT_BINDINGS_CLOCK_RENESAS_SH7750_H__
+
+#define SH7750_CLK_SCI 0
+#define SH7750_CLK_RTC 1
+#define SH7750_CLK_TMU0 2
+#define SH7750_CLK_TMU1 3
+#define SH7750_CLK_TMU2 4
+#define SH7750_CLK_SCIF 5
+#define SH7750_CLK_DMAC 6
+#define SH7750_CLK_UBC 7
+#define SH7750_CLK_SQ 8
+#define SH7750_CLK_INTC 9
+#define SH7750_CLK_TMU3 10
+#define SH7750_CLK_TMU4 11
+#define SH7750_CLK_PCIC 12
+
+#endif /* __DT_BINDINGS_CLOCK_RENESAS_CPG_MSSR_H__ */
diff --git a/include/dt-bindings/interrupt-controller/sh_intc.h b/include/dt-bindings/interrupt-controller/sh_intc.h
new file mode 100644
index 0000000..8c9dcdc
--- /dev/null
+++ b/include/dt-bindings/interrupt-controller/sh_intc.h
@@ -0,0 +1,2 @@
+#define evt2irq(evt) (((evt) >> 5) - 16)
+#define irq2evt(irq) (((irq) + 16) << 5)
--
2.7.0
^ permalink raw reply related [flat|nested] 138+ messages in thread* [PATCH v5 14/22] sh: SH7751 core dtsi
@ 2016-07-03 16:46 ` Yoshinori Sato
0 siblings, 0 replies; 138+ messages in thread
From: Yoshinori Sato @ 2016-07-03 16:46 UTC (permalink / raw)
To: devicetree, linux-sh, linux-kernel; +Cc: Yoshinori Sato
SH7751 core and internal peripheral define.
Signed-off-by: Yoshinori Sato <ysato@users.sourceforge.jp>
---
arch/sh/boot/dts/include/dt-bindings | 1 +
arch/sh/boot/dts/sh7751.dtsi | 83 ++++++++++++++++++++++
include/dt-bindings/clock/renesas-sh7750.h | 26 +++++++
include/dt-bindings/interrupt-controller/sh_intc.h | 2 +
4 files changed, 112 insertions(+)
create mode 120000 arch/sh/boot/dts/include/dt-bindings
create mode 100644 arch/sh/boot/dts/sh7751.dtsi
create mode 100644 include/dt-bindings/clock/renesas-sh7750.h
create mode 100644 include/dt-bindings/interrupt-controller/sh_intc.h
diff --git a/arch/sh/boot/dts/include/dt-bindings b/arch/sh/boot/dts/include/dt-bindings
new file mode 120000
index 0000000..08c00e4
--- /dev/null
+++ b/arch/sh/boot/dts/include/dt-bindings
@@ -0,0 +1 @@
+../../../../../include/dt-bindings
\ No newline at end of file
diff --git a/arch/sh/boot/dts/sh7751.dtsi b/arch/sh/boot/dts/sh7751.dtsi
new file mode 100644
index 0000000..713e72e
--- /dev/null
+++ b/arch/sh/boot/dts/sh7751.dtsi
@@ -0,0 +1,83 @@
+/*
+ * Device Tree Source for the SH7751
+ *
+ * Copyright (C) 2016 Yoshinori Sato
+ */
+
+#include <dt-bindings/interrupt-controller/sh_intc.h>
+#include <dt-bindings/clock/renesas-sh7750.h>
+
+/ {
+ oclk: oscillator {
+ #clock-cells = <0>;
+ compatible = "fixed-clock";
+ clock-frequency = <0>;
+ };
+ cpg: clock-controller@ffc00000 {
+ compatible = "renesas,sh7750-cpg";
+ clocks = <&oclk>;
+ #clock-cells = <1>;
+ renesas,mult = <12>;
+ reg = <0xffc00000 32>, <0xfe0a0000 16>;
+ };
+ cpus {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ cpu@0 {
+ compatible = "renesas,sh4", "renesas,sh";
+ clock-frequency = <266666666>;
+ };
+ };
+ shintc: interrupt-controller@ffd00000 {
+ compatible = "renesas,sh7751-intc";
+ #interrupt-cells = <2>;
+ interrupt-controller;
+ reg = <0xffd00000 14>, <0xfe080000 128>;
+
+ };
+ sci0: serial@ffe00000 {
+ compatible = "renesas,sci";
+ reg = <0xffe00000 0x20>;
+ interrupts = <evt2irq(0x4e0) 0>,
+ <evt2irq(0x500) 0>,
+ <evt2irq(0x540) 0>,
+ <evt2irq(0x520) 0>;
+ clocks = <&cpg SH7750_CLK_SCI>;
+ clock-names = "fck";
+ status = "disabled";
+ };
+ sci1: serial@ffe80000 {
+ compatible = "renesas,scif";
+ reg = <0xffe80000 0x100>;
+ interrupts = <evt2irq(0x700) 0>,
+ <evt2irq(0x720) 0>,
+ <evt2irq(0x760) 0>,
+ <evt2irq(0x740) 0>;
+ clocks = <&cpg SH7750_CLK_SCIF>;
+ clock-names = "fck";
+ status = "disabled";
+ };
+ tmu: timer@ffd80000 {
+ compatible = "renesas,tmu";
+ reg = <0xffd80000 12>;
+ interrupts = <evt2irq(0x400) 0>,
+ <evt2irq(0x420) 0>,
+ <evt2irq(0x440) 0>;
+ clocks = <&cpg SH7750_CLK_TMU0>;
+ clock-names = "fck";
+ renesas,channels-mask = <0x03>;
+ };
+ pci: pci-controller@fe200000 {
+ compatible = "renesas,sh7751-pci";
+ device_type = "pci";
+ bus-range = <0 0>;
+ #address-cells = <2>;
+ #size-cells = <1>;
+ ranges = <0x02000000 0x00000000 0xfd000000 0xfd000000 0x00000000 0x01000000>,
+ <0x01000000 0x00000000 0xfe240000 0x00000000 0x00000000 0x00040000>;
+ reg = <0xfe200000 0x0400>, <0xff800000 0x0030>;
+ #interrupt-cells = <1>;
+ interrupt-map-mask = <0x1800 0 7>;
+ status = "disabled";
+ };
+};
diff --git a/include/dt-bindings/clock/renesas-sh7750.h b/include/dt-bindings/clock/renesas-sh7750.h
new file mode 100644
index 0000000..546c0b1
--- /dev/null
+++ b/include/dt-bindings/clock/renesas-sh7750.h
@@ -0,0 +1,26 @@
+/*
+ * Copyright (C) 2016 Yoshinori Sato
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ */
+#ifndef __DT_BINDINGS_CLOCK_RENESAS_SH7750_H__
+#define __DT_BINDINGS_CLOCK_RENESAS_SH7750_H__
+
+#define SH7750_CLK_SCI 0
+#define SH7750_CLK_RTC 1
+#define SH7750_CLK_TMU0 2
+#define SH7750_CLK_TMU1 3
+#define SH7750_CLK_TMU2 4
+#define SH7750_CLK_SCIF 5
+#define SH7750_CLK_DMAC 6
+#define SH7750_CLK_UBC 7
+#define SH7750_CLK_SQ 8
+#define SH7750_CLK_INTC 9
+#define SH7750_CLK_TMU3 10
+#define SH7750_CLK_TMU4 11
+#define SH7750_CLK_PCIC 12
+
+#endif /* __DT_BINDINGS_CLOCK_RENESAS_CPG_MSSR_H__ */
diff --git a/include/dt-bindings/interrupt-controller/sh_intc.h b/include/dt-bindings/interrupt-controller/sh_intc.h
new file mode 100644
index 0000000..8c9dcdc
--- /dev/null
+++ b/include/dt-bindings/interrupt-controller/sh_intc.h
@@ -0,0 +1,2 @@
+#define evt2irq(evt) (((evt) >> 5) - 16)
+#define irq2evt(irq) (((irq) + 16) << 5)
--
2.7.0
^ permalink raw reply related [flat|nested] 138+ messages in thread
* [PATCH v5 15/22] sh: Move common PCI stuff to arch/sh/kernel
2016-07-03 16:46 ` Yoshinori Sato
@ 2016-07-03 16:46 ` Yoshinori Sato
-1 siblings, 0 replies; 138+ messages in thread
From: Yoshinori Sato @ 2016-07-03 16:46 UTC (permalink / raw)
To: linux-sh, linux-kernel; +Cc: Yoshinori Sato
Signed-off-by: Yoshinori Sato <ysato@users.sourceforge.jp>
---
arch/sh/drivers/pci/Makefile | 2 -
arch/sh/drivers/pci/common.c | 162 --------------------
arch/sh/drivers/pci/pci.c | 320 ----------------------------------------
arch/sh/kernel/Makefile | 2 +
arch/sh/kernel/pci-common.c | 162 ++++++++++++++++++++
arch/sh/kernel/pci.c | 342 +++++++++++++++++++++++++++++++++++++++++++
6 files changed, 506 insertions(+), 484 deletions(-)
delete mode 100644 arch/sh/drivers/pci/common.c
delete mode 100644 arch/sh/drivers/pci/pci.c
create mode 100644 arch/sh/kernel/pci-common.c
create mode 100644 arch/sh/kernel/pci.c
diff --git a/arch/sh/drivers/pci/Makefile b/arch/sh/drivers/pci/Makefile
index 82f0a33..fffbede 100644
--- a/arch/sh/drivers/pci/Makefile
+++ b/arch/sh/drivers/pci/Makefile
@@ -1,8 +1,6 @@
#
# Makefile for the PCI specific kernel interface routines under Linux.
#
-obj-y += common.o pci.o
-
obj-$(CONFIG_CPU_SUBTYPE_SH7751) += pci-sh7751.o ops-sh4.o
obj-$(CONFIG_CPU_SUBTYPE_SH7751R) += pci-sh7751.o ops-sh4.o
obj-$(CONFIG_CPU_SUBTYPE_SH7763) += pci-sh7780.o ops-sh4.o
diff --git a/arch/sh/drivers/pci/common.c b/arch/sh/drivers/pci/common.c
deleted file mode 100644
index dbf1381..0000000
--- a/arch/sh/drivers/pci/common.c
+++ /dev/null
@@ -1,162 +0,0 @@
-#include <linux/pci.h>
-#include <linux/interrupt.h>
-#include <linux/timer.h>
-#include <linux/kernel.h>
-
-/*
- * These functions are used early on before PCI scanning is done
- * and all of the pci_dev and pci_bus structures have been created.
- */
-static struct pci_dev *fake_pci_dev(struct pci_channel *hose,
- int top_bus, int busnr, int devfn)
-{
- static struct pci_dev dev;
- static struct pci_bus bus;
-
- dev.bus = &bus;
- dev.sysdata = hose;
- dev.devfn = devfn;
- bus.number = busnr;
- bus.sysdata = hose;
- bus.ops = hose->pci_ops;
-
- if(busnr != top_bus)
- /* Fake a parent bus structure. */
- bus.parent = &bus;
- else
- bus.parent = NULL;
-
- return &dev;
-}
-
-#define EARLY_PCI_OP(rw, size, type) \
-int __init early_##rw##_config_##size(struct pci_channel *hose, \
- int top_bus, int bus, int devfn, int offset, type value) \
-{ \
- return pci_##rw##_config_##size( \
- fake_pci_dev(hose, top_bus, bus, devfn), \
- offset, value); \
-}
-
-EARLY_PCI_OP(read, byte, u8 *)
-EARLY_PCI_OP(read, word, u16 *)
-EARLY_PCI_OP(read, dword, u32 *)
-EARLY_PCI_OP(write, byte, u8)
-EARLY_PCI_OP(write, word, u16)
-EARLY_PCI_OP(write, dword, u32)
-
-int __init pci_is_66mhz_capable(struct pci_channel *hose,
- int top_bus, int current_bus)
-{
- u32 pci_devfn;
- unsigned short vid;
- int cap66 = -1;
- u16 stat;
-
- printk(KERN_INFO "PCI: Checking 66MHz capabilities...\n");
-
- for (pci_devfn = 0; pci_devfn < 0xff; pci_devfn++) {
- if (PCI_FUNC(pci_devfn))
- continue;
- if (early_read_config_word(hose, top_bus, current_bus,
- pci_devfn, PCI_VENDOR_ID, &vid) !- PCIBIOS_SUCCESSFUL)
- continue;
- if (vid = 0xffff)
- continue;
-
- /* check 66MHz capability */
- if (cap66 < 0)
- cap66 = 1;
- if (cap66) {
- early_read_config_word(hose, top_bus, current_bus,
- pci_devfn, PCI_STATUS, &stat);
- if (!(stat & PCI_STATUS_66MHZ)) {
- printk(KERN_DEBUG
- "PCI: %02x:%02x not 66MHz capable.\n",
- current_bus, pci_devfn);
- cap66 = 0;
- break;
- }
- }
- }
-
- return cap66 > 0;
-}
-
-static void pcibios_enable_err(unsigned long __data)
-{
- struct pci_channel *hose = (struct pci_channel *)__data;
-
- del_timer(&hose->err_timer);
- printk(KERN_DEBUG "PCI: re-enabling error IRQ.\n");
- enable_irq(hose->err_irq);
-}
-
-static void pcibios_enable_serr(unsigned long __data)
-{
- struct pci_channel *hose = (struct pci_channel *)__data;
-
- del_timer(&hose->serr_timer);
- printk(KERN_DEBUG "PCI: re-enabling system error IRQ.\n");
- enable_irq(hose->serr_irq);
-}
-
-void pcibios_enable_timers(struct pci_channel *hose)
-{
- if (hose->err_irq) {
- init_timer(&hose->err_timer);
- hose->err_timer.data = (unsigned long)hose;
- hose->err_timer.function = pcibios_enable_err;
- }
-
- if (hose->serr_irq) {
- init_timer(&hose->serr_timer);
- hose->serr_timer.data = (unsigned long)hose;
- hose->serr_timer.function = pcibios_enable_serr;
- }
-}
-
-/*
- * A simple handler for the regular PCI status errors, called from IRQ
- * context.
- */
-unsigned int pcibios_handle_status_errors(unsigned long addr,
- unsigned int status,
- struct pci_channel *hose)
-{
- unsigned int cmd = 0;
-
- if (status & PCI_STATUS_REC_MASTER_ABORT) {
- printk(KERN_DEBUG "PCI: master abort, pc=0x%08lx\n", addr);
- cmd |= PCI_STATUS_REC_MASTER_ABORT;
- }
-
- if (status & PCI_STATUS_REC_TARGET_ABORT) {
- printk(KERN_DEBUG "PCI: target abort: ");
- pcibios_report_status(PCI_STATUS_REC_TARGET_ABORT |
- PCI_STATUS_SIG_TARGET_ABORT |
- PCI_STATUS_REC_MASTER_ABORT, 1);
- printk("\n");
-
- cmd |= PCI_STATUS_REC_TARGET_ABORT;
- }
-
- if (status & (PCI_STATUS_PARITY | PCI_STATUS_DETECTED_PARITY)) {
- printk(KERN_DEBUG "PCI: parity error detected: ");
- pcibios_report_status(PCI_STATUS_PARITY |
- PCI_STATUS_DETECTED_PARITY, 1);
- printk("\n");
-
- cmd |= PCI_STATUS_PARITY | PCI_STATUS_DETECTED_PARITY;
-
- /* Now back off of the IRQ for awhile */
- if (hose->err_irq) {
- disable_irq_nosync(hose->err_irq);
- hose->err_timer.expires = jiffies + HZ;
- add_timer(&hose->err_timer);
- }
- }
-
- return cmd;
-}
diff --git a/arch/sh/drivers/pci/pci.c b/arch/sh/drivers/pci/pci.c
deleted file mode 100644
index d5462b7..0000000
--- a/arch/sh/drivers/pci/pci.c
+++ /dev/null
@@ -1,320 +0,0 @@
-/*
- * New-style PCI core.
- *
- * Copyright (c) 2004 - 2009 Paul Mundt
- * Copyright (c) 2002 M. R. Brown
- *
- * Modelled after arch/mips/pci/pci.c:
- * Copyright (C) 2003, 04 Ralf Baechle (ralf@linux-mips.org)
- *
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- */
-#include <linux/kernel.h>
-#include <linux/mm.h>
-#include <linux/pci.h>
-#include <linux/init.h>
-#include <linux/types.h>
-#include <linux/dma-debug.h>
-#include <linux/io.h>
-#include <linux/mutex.h>
-#include <linux/spinlock.h>
-#include <linux/export.h>
-
-unsigned long PCIBIOS_MIN_IO = 0x0000;
-unsigned long PCIBIOS_MIN_MEM = 0;
-
-/*
- * The PCI controller list.
- */
-static struct pci_channel *hose_head, **hose_tail = &hose_head;
-
-static int pci_initialized;
-
-static void pcibios_scanbus(struct pci_channel *hose)
-{
- static int next_busno;
- static int need_domain_info;
- LIST_HEAD(resources);
- struct resource *res;
- resource_size_t offset;
- int i;
- struct pci_bus *bus;
-
- for (i = 0; i < hose->nr_resources; i++) {
- res = hose->resources + i;
- offset = 0;
- if (res->flags & IORESOURCE_IO)
- offset = hose->io_offset;
- else if (res->flags & IORESOURCE_MEM)
- offset = hose->mem_offset;
- pci_add_resource_offset(&resources, res, offset);
- }
-
- bus = pci_scan_root_bus(NULL, next_busno, hose->pci_ops, hose,
- &resources);
- hose->bus = bus;
-
- need_domain_info = need_domain_info || hose->index;
- hose->need_domain_info = need_domain_info;
-
- if (!bus) {
- pci_free_resource_list(&resources);
- return;
- }
-
- next_busno = bus->busn_res.end + 1;
- /* Don't allow 8-bit bus number overflow inside the hose -
- reserve some space for bridges. */
- if (next_busno > 224) {
- next_busno = 0;
- need_domain_info = 1;
- }
-
- pci_bus_size_bridges(bus);
- pci_bus_assign_resources(bus);
- pci_bus_add_devices(bus);
-}
-
-/*
- * This interrupt-safe spinlock protects all accesses to PCI
- * configuration space.
- */
-DEFINE_RAW_SPINLOCK(pci_config_lock);
-static DEFINE_MUTEX(pci_scan_mutex);
-
-int register_pci_controller(struct pci_channel *hose)
-{
- int i;
-
- for (i = 0; i < hose->nr_resources; i++) {
- struct resource *res = hose->resources + i;
-
- if (res->flags & IORESOURCE_IO) {
- if (request_resource(&ioport_resource, res) < 0)
- goto out;
- } else {
- if (request_resource(&iomem_resource, res) < 0)
- goto out;
- }
- }
-
- *hose_tail = hose;
- hose_tail = &hose->next;
-
- /*
- * Do not panic here but later - this might happen before console init.
- */
- if (!hose->io_map_base) {
- printk(KERN_WARNING
- "registering PCI controller with io_map_base unset\n");
- }
-
- /*
- * Setup the ERR/PERR and SERR timers, if available.
- */
- pcibios_enable_timers(hose);
-
- /*
- * Scan the bus if it is register after the PCI subsystem
- * initialization.
- */
- if (pci_initialized) {
- mutex_lock(&pci_scan_mutex);
- pcibios_scanbus(hose);
- mutex_unlock(&pci_scan_mutex);
- }
-
- return 0;
-
-out:
- for (--i; i >= 0; i--)
- release_resource(&hose->resources[i]);
-
- printk(KERN_WARNING "Skipping PCI bus scan due to resource conflict\n");
- return -1;
-}
-
-static int __init pcibios_init(void)
-{
- struct pci_channel *hose;
-
- /* Scan all of the recorded PCI controllers. */
- for (hose = hose_head; hose; hose = hose->next)
- pcibios_scanbus(hose);
-
- pci_fixup_irqs(pci_common_swizzle, pcibios_map_platform_irq);
-
- dma_debug_add_bus(&pci_bus_type);
-
- pci_initialized = 1;
-
- return 0;
-}
-subsys_initcall(pcibios_init);
-
-/*
- * Called after each bus is probed, but before its children
- * are examined.
- */
-void pcibios_fixup_bus(struct pci_bus *bus)
-{
-}
-
-/*
- * We need to avoid collisions with `mirrored' VGA ports
- * and other strange ISA hardware, so we always want the
- * addresses to be allocated in the 0x000-0x0ff region
- * modulo 0x400.
- */
-resource_size_t pcibios_align_resource(void *data, const struct resource *res,
- resource_size_t size, resource_size_t align)
-{
- struct pci_dev *dev = data;
- struct pci_channel *hose = dev->sysdata;
- resource_size_t start = res->start;
-
- if (res->flags & IORESOURCE_IO) {
- if (start < PCIBIOS_MIN_IO + hose->resources[0].start)
- start = PCIBIOS_MIN_IO + hose->resources[0].start;
-
- /*
- * Put everything into 0x00-0xff region modulo 0x400.
- */
- if (start & 0x300)
- start = (start + 0x3ff) & ~0x3ff;
- }
-
- return start;
-}
-
-static void __init
-pcibios_bus_report_status_early(struct pci_channel *hose,
- int top_bus, int current_bus,
- unsigned int status_mask, int warn)
-{
- unsigned int pci_devfn;
- u16 status;
- int ret;
-
- for (pci_devfn = 0; pci_devfn < 0xff; pci_devfn++) {
- if (PCI_FUNC(pci_devfn))
- continue;
- ret = early_read_config_word(hose, top_bus, current_bus,
- pci_devfn, PCI_STATUS, &status);
- if (ret != PCIBIOS_SUCCESSFUL)
- continue;
- if (status = 0xffff)
- continue;
-
- early_write_config_word(hose, top_bus, current_bus,
- pci_devfn, PCI_STATUS,
- status & status_mask);
- if (warn)
- printk("(%02x:%02x: %04X) ", current_bus,
- pci_devfn, status);
- }
-}
-
-/*
- * We can't use pci_find_device() here since we are
- * called from interrupt context.
- */
-static void __init_refok
-pcibios_bus_report_status(struct pci_bus *bus, unsigned int status_mask,
- int warn)
-{
- struct pci_dev *dev;
-
- list_for_each_entry(dev, &bus->devices, bus_list) {
- u16 status;
-
- /*
- * ignore host bridge - we handle
- * that separately
- */
- if (dev->bus->number = 0 && dev->devfn = 0)
- continue;
-
- pci_read_config_word(dev, PCI_STATUS, &status);
- if (status = 0xffff)
- continue;
-
- if ((status & status_mask) = 0)
- continue;
-
- /* clear the status errors */
- pci_write_config_word(dev, PCI_STATUS, status & status_mask);
-
- if (warn)
- printk("(%s: %04X) ", pci_name(dev), status);
- }
-
- list_for_each_entry(dev, &bus->devices, bus_list)
- if (dev->subordinate)
- pcibios_bus_report_status(dev->subordinate, status_mask, warn);
-}
-
-void __init_refok pcibios_report_status(unsigned int status_mask, int warn)
-{
- struct pci_channel *hose;
-
- for (hose = hose_head; hose; hose = hose->next) {
- if (unlikely(!hose->bus))
- pcibios_bus_report_status_early(hose, hose_head->index,
- hose->index, status_mask, warn);
- else
- pcibios_bus_report_status(hose->bus, status_mask, warn);
- }
-}
-
-int pci_mmap_page_range(struct pci_dev *dev, struct vm_area_struct *vma,
- enum pci_mmap_state mmap_state, int write_combine)
-{
- /*
- * I/O space can be accessed via normal processor loads and stores on
- * this platform but for now we elect not to do this and portable
- * drivers should not do this anyway.
- */
- if (mmap_state = pci_mmap_io)
- return -EINVAL;
-
- /*
- * Ignore write-combine; for now only return uncached mappings.
- */
- vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot);
-
- return remap_pfn_range(vma, vma->vm_start, vma->vm_pgoff,
- vma->vm_end - vma->vm_start,
- vma->vm_page_prot);
-}
-
-#ifndef CONFIG_GENERIC_IOMAP
-
-void __iomem *__pci_ioport_map(struct pci_dev *dev,
- unsigned long port, unsigned int nr)
-{
- struct pci_channel *chan = dev->sysdata;
-
- if (unlikely(!chan->io_map_base)) {
- chan->io_map_base = sh_io_port_base;
-
- if (pci_domains_supported)
- panic("To avoid data corruption io_map_base MUST be "
- "set with multiple PCI domains.");
- }
-
- return (void __iomem *)(chan->io_map_base + port);
-}
-
-void pci_iounmap(struct pci_dev *dev, void __iomem *addr)
-{
- iounmap(addr);
-}
-EXPORT_SYMBOL(pci_iounmap);
-
-#endif /* CONFIG_GENERIC_IOMAP */
-
-EXPORT_SYMBOL(PCIBIOS_MIN_IO);
-EXPORT_SYMBOL(PCIBIOS_MIN_MEM);
diff --git a/arch/sh/kernel/Makefile b/arch/sh/kernel/Makefile
index 09040fd..a9a54c2 100644
--- a/arch/sh/kernel/Makefile
+++ b/arch/sh/kernel/Makefile
@@ -46,5 +46,7 @@ obj-$(CONFIG_DWARF_UNWINDER) += dwarf.o
obj-$(CONFIG_PERF_EVENTS) += perf_event.o perf_callchain.o
obj-$(CONFIG_HAVE_HW_BREAKPOINT) += hw_breakpoint.o
+obj-$(CONFIG_PCI) += pci.o pci-common.o
ccflags-y := -Werror
+CFLAGS_pci.o := -O0
diff --git a/arch/sh/kernel/pci-common.c b/arch/sh/kernel/pci-common.c
new file mode 100644
index 0000000..dbf1381
--- /dev/null
+++ b/arch/sh/kernel/pci-common.c
@@ -0,0 +1,162 @@
+#include <linux/pci.h>
+#include <linux/interrupt.h>
+#include <linux/timer.h>
+#include <linux/kernel.h>
+
+/*
+ * These functions are used early on before PCI scanning is done
+ * and all of the pci_dev and pci_bus structures have been created.
+ */
+static struct pci_dev *fake_pci_dev(struct pci_channel *hose,
+ int top_bus, int busnr, int devfn)
+{
+ static struct pci_dev dev;
+ static struct pci_bus bus;
+
+ dev.bus = &bus;
+ dev.sysdata = hose;
+ dev.devfn = devfn;
+ bus.number = busnr;
+ bus.sysdata = hose;
+ bus.ops = hose->pci_ops;
+
+ if(busnr != top_bus)
+ /* Fake a parent bus structure. */
+ bus.parent = &bus;
+ else
+ bus.parent = NULL;
+
+ return &dev;
+}
+
+#define EARLY_PCI_OP(rw, size, type) \
+int __init early_##rw##_config_##size(struct pci_channel *hose, \
+ int top_bus, int bus, int devfn, int offset, type value) \
+{ \
+ return pci_##rw##_config_##size( \
+ fake_pci_dev(hose, top_bus, bus, devfn), \
+ offset, value); \
+}
+
+EARLY_PCI_OP(read, byte, u8 *)
+EARLY_PCI_OP(read, word, u16 *)
+EARLY_PCI_OP(read, dword, u32 *)
+EARLY_PCI_OP(write, byte, u8)
+EARLY_PCI_OP(write, word, u16)
+EARLY_PCI_OP(write, dword, u32)
+
+int __init pci_is_66mhz_capable(struct pci_channel *hose,
+ int top_bus, int current_bus)
+{
+ u32 pci_devfn;
+ unsigned short vid;
+ int cap66 = -1;
+ u16 stat;
+
+ printk(KERN_INFO "PCI: Checking 66MHz capabilities...\n");
+
+ for (pci_devfn = 0; pci_devfn < 0xff; pci_devfn++) {
+ if (PCI_FUNC(pci_devfn))
+ continue;
+ if (early_read_config_word(hose, top_bus, current_bus,
+ pci_devfn, PCI_VENDOR_ID, &vid) !+ PCIBIOS_SUCCESSFUL)
+ continue;
+ if (vid = 0xffff)
+ continue;
+
+ /* check 66MHz capability */
+ if (cap66 < 0)
+ cap66 = 1;
+ if (cap66) {
+ early_read_config_word(hose, top_bus, current_bus,
+ pci_devfn, PCI_STATUS, &stat);
+ if (!(stat & PCI_STATUS_66MHZ)) {
+ printk(KERN_DEBUG
+ "PCI: %02x:%02x not 66MHz capable.\n",
+ current_bus, pci_devfn);
+ cap66 = 0;
+ break;
+ }
+ }
+ }
+
+ return cap66 > 0;
+}
+
+static void pcibios_enable_err(unsigned long __data)
+{
+ struct pci_channel *hose = (struct pci_channel *)__data;
+
+ del_timer(&hose->err_timer);
+ printk(KERN_DEBUG "PCI: re-enabling error IRQ.\n");
+ enable_irq(hose->err_irq);
+}
+
+static void pcibios_enable_serr(unsigned long __data)
+{
+ struct pci_channel *hose = (struct pci_channel *)__data;
+
+ del_timer(&hose->serr_timer);
+ printk(KERN_DEBUG "PCI: re-enabling system error IRQ.\n");
+ enable_irq(hose->serr_irq);
+}
+
+void pcibios_enable_timers(struct pci_channel *hose)
+{
+ if (hose->err_irq) {
+ init_timer(&hose->err_timer);
+ hose->err_timer.data = (unsigned long)hose;
+ hose->err_timer.function = pcibios_enable_err;
+ }
+
+ if (hose->serr_irq) {
+ init_timer(&hose->serr_timer);
+ hose->serr_timer.data = (unsigned long)hose;
+ hose->serr_timer.function = pcibios_enable_serr;
+ }
+}
+
+/*
+ * A simple handler for the regular PCI status errors, called from IRQ
+ * context.
+ */
+unsigned int pcibios_handle_status_errors(unsigned long addr,
+ unsigned int status,
+ struct pci_channel *hose)
+{
+ unsigned int cmd = 0;
+
+ if (status & PCI_STATUS_REC_MASTER_ABORT) {
+ printk(KERN_DEBUG "PCI: master abort, pc=0x%08lx\n", addr);
+ cmd |= PCI_STATUS_REC_MASTER_ABORT;
+ }
+
+ if (status & PCI_STATUS_REC_TARGET_ABORT) {
+ printk(KERN_DEBUG "PCI: target abort: ");
+ pcibios_report_status(PCI_STATUS_REC_TARGET_ABORT |
+ PCI_STATUS_SIG_TARGET_ABORT |
+ PCI_STATUS_REC_MASTER_ABORT, 1);
+ printk("\n");
+
+ cmd |= PCI_STATUS_REC_TARGET_ABORT;
+ }
+
+ if (status & (PCI_STATUS_PARITY | PCI_STATUS_DETECTED_PARITY)) {
+ printk(KERN_DEBUG "PCI: parity error detected: ");
+ pcibios_report_status(PCI_STATUS_PARITY |
+ PCI_STATUS_DETECTED_PARITY, 1);
+ printk("\n");
+
+ cmd |= PCI_STATUS_PARITY | PCI_STATUS_DETECTED_PARITY;
+
+ /* Now back off of the IRQ for awhile */
+ if (hose->err_irq) {
+ disable_irq_nosync(hose->err_irq);
+ hose->err_timer.expires = jiffies + HZ;
+ add_timer(&hose->err_timer);
+ }
+ }
+
+ return cmd;
+}
diff --git a/arch/sh/kernel/pci.c b/arch/sh/kernel/pci.c
new file mode 100644
index 0000000..9cf0ba4
--- /dev/null
+++ b/arch/sh/kernel/pci.c
@@ -0,0 +1,342 @@
+/*
+ * New-style PCI core.
+ *
+ * Copyright (c) 2004 - 2009 Paul Mundt
+ * Copyright (c) 2002 M. R. Brown
+ *
+ * Modelled after arch/mips/pci/pci.c:
+ * Copyright (C) 2003, 04 Ralf Baechle (ralf@linux-mips.org)
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License. See the file "COPYING" in the main directory of this archive
+ * for more details.
+ */
+#include <linux/kernel.h>
+#include <linux/mm.h>
+#include <linux/pci.h>
+#include <linux/init.h>
+#include <linux/types.h>
+#include <linux/dma-debug.h>
+#include <linux/io.h>
+#include <linux/mutex.h>
+#include <linux/spinlock.h>
+#include <linux/export.h>
+
+unsigned long PCIBIOS_MIN_IO = 0x0000;
+unsigned long PCIBIOS_MIN_MEM = 0;
+
+/*
+ * The PCI controller list.
+ */
+static struct pci_channel *hose_head, **hose_tail = &hose_head;
+
+static int pci_initialized;
+
+static void pcibios_scanbus(struct pci_channel *hose)
+{
+ static int next_busno;
+ static int need_domain_info;
+ LIST_HEAD(resources);
+ struct resource *res;
+ resource_size_t offset;
+ int i;
+ struct pci_bus *bus;
+
+ for (i = 0; i < hose->nr_resources; i++) {
+ res = hose->resources + i;
+ offset = 0;
+ if (res->flags & IORESOURCE_IO)
+ offset = hose->io_offset;
+ else if (res->flags & IORESOURCE_MEM)
+ offset = hose->mem_offset;
+ pci_add_resource_offset(&resources, res, offset);
+ }
+
+ bus = pci_scan_root_bus(NULL, next_busno, hose->pci_ops, hose,
+ &resources);
+ hose->bus = bus;
+
+ need_domain_info = need_domain_info || hose->index;
+ hose->need_domain_info = need_domain_info;
+
+ if (!bus) {
+ pci_free_resource_list(&resources);
+ return;
+ }
+
+ next_busno = bus->busn_res.end + 1;
+ /* Don't allow 8-bit bus number overflow inside the hose -
+ reserve some space for bridges. */
+ if (next_busno > 224) {
+ next_busno = 0;
+ need_domain_info = 1;
+ }
+
+ pci_bus_size_bridges(bus);
+ pci_bus_assign_resources(bus);
+ pci_bus_add_devices(bus);
+}
+
+/*
+ * This interrupt-safe spinlock protects all accesses to PCI
+ * configuration space.
+ */
+DEFINE_RAW_SPINLOCK(pci_config_lock);
+static DEFINE_MUTEX(pci_scan_mutex);
+
+int register_pci_controller(struct pci_channel *hose)
+{
+ int i;
+
+ for (i = 0; i < hose->nr_resources; i++) {
+ struct resource *res = hose->resources + i;
+
+ if (res->flags & IORESOURCE_IO) {
+ if (request_resource(&ioport_resource, res) < 0)
+ goto out;
+ } else {
+ if (request_resource(&iomem_resource, res) < 0)
+ goto out;
+ }
+ }
+
+ *hose_tail = hose;
+ hose_tail = &hose->next;
+
+ /*
+ * Do not panic here but later - this might happen before console init.
+ */
+ if (!hose->io_map_base) {
+ printk(KERN_WARNING
+ "registering PCI controller with io_map_base unset\n");
+ }
+
+ /*
+ * Setup the ERR/PERR and SERR timers, if available.
+ */
+ pcibios_enable_timers(hose);
+
+ /*
+ * Scan the bus if it is register after the PCI subsystem
+ * initialization.
+ */
+ if (pci_initialized) {
+ mutex_lock(&pci_scan_mutex);
+ pcibios_scanbus(hose);
+ mutex_unlock(&pci_scan_mutex);
+ }
+
+ return 0;
+
+out:
+ for (--i; i >= 0; i--)
+ release_resource(&hose->resources[i]);
+
+ printk(KERN_WARNING "Skipping PCI bus scan due to resource conflict\n");
+ return -1;
+}
+
+#ifndef CONFIG_SH_DEVICE_TREE
+static int __init pcibios_init(void)
+{
+ struct pci_channel *hose;
+
+ /* Scan all of the recorded PCI controllers. */
+ for (hose = hose_head; hose; hose = hose->next)
+ pcibios_scanbus(hose);
+
+ pci_fixup_irqs(pci_common_swizzle, pcibios_map_platform_irq);
+
+ dma_debug_add_bus(&pci_bus_type);
+
+ pci_initialized = 1;
+
+ return 0;
+}
+subsys_initcall(pcibios_init);
+#endif
+
+/*
+ * Called after each bus is probed, but before its children
+ * are examined.
+ */
+void pcibios_fixup_bus(struct pci_bus *bus)
+{
+}
+
+#ifndef CONFIG_SH_DEVICE_TREE
+/*
+ * We need to avoid collisions with `mirrored' VGA ports
+ * and other strange ISA hardware, so we always want the
+ * addresses to be allocated in the 0x000-0x0ff region
+ * modulo 0x400.
+ */
+resource_size_t pcibios_align_resource(void *data, const struct resource *res,
+ resource_size_t size, resource_size_t align)
+{
+ struct pci_dev *dev = data;
+ struct pci_channel *hose = dev->sysdata;
+ resource_size_t start = res->start;
+
+ if (res->flags & IORESOURCE_IO) {
+ if (start < PCIBIOS_MIN_IO + hose->resources[0].start)
+ start = PCIBIOS_MIN_IO + hose->resources[0].start;
+
+ /*
+ * Put everything into 0x00-0xff region modulo 0x400.
+ */
+ if (start & 0x300)
+ start = (start + 0x3ff) & ~0x3ff;
+ }
+
+ return start;
+}
+#else
+typedef resource_size_t (*align_resource_fn)(struct pci_dev *dev,
+ const struct resource *res,
+ resource_size_t start,
+ resource_size_t size,
+ resource_size_t align);
+
+resource_size_t pcibios_align_resource(void *data, const struct resource *res,
+ resource_size_t size, resource_size_t align)
+{
+ resource_size_t start = res->start;
+ struct pci_dev *dev = data;
+ struct pci_config_window *cfg = dev->sysdata;
+ align_resource_fn fn;
+
+ fn = (align_resource_fn)(cfg->priv);
+ return fn(dev, res, start, size, align);
+}
+#endif
+
+static void __init
+pcibios_bus_report_status_early(struct pci_channel *hose,
+ int top_bus, int current_bus,
+ unsigned int status_mask, int warn)
+{
+ unsigned int pci_devfn;
+ u16 status;
+ int ret;
+
+ for (pci_devfn = 0; pci_devfn < 0xff; pci_devfn++) {
+ if (PCI_FUNC(pci_devfn))
+ continue;
+ ret = early_read_config_word(hose, top_bus, current_bus,
+ pci_devfn, PCI_STATUS, &status);
+ if (ret != PCIBIOS_SUCCESSFUL)
+ continue;
+ if (status = 0xffff)
+ continue;
+
+ early_write_config_word(hose, top_bus, current_bus,
+ pci_devfn, PCI_STATUS,
+ status & status_mask);
+ if (warn)
+ printk("(%02x:%02x: %04X) ", current_bus,
+ pci_devfn, status);
+ }
+}
+
+/*
+ * We can't use pci_find_device() here since we are
+ * called from interrupt context.
+ */
+static void __init_refok
+pcibios_bus_report_status(struct pci_bus *bus, unsigned int status_mask,
+ int warn)
+{
+ struct pci_dev *dev;
+
+ list_for_each_entry(dev, &bus->devices, bus_list) {
+ u16 status;
+
+ /*
+ * ignore host bridge - we handle
+ * that separately
+ */
+ if (dev->bus->number = 0 && dev->devfn = 0)
+ continue;
+
+ pci_read_config_word(dev, PCI_STATUS, &status);
+ if (status = 0xffff)
+ continue;
+
+ if ((status & status_mask) = 0)
+ continue;
+
+ /* clear the status errors */
+ pci_write_config_word(dev, PCI_STATUS, status & status_mask);
+
+ if (warn)
+ printk("(%s: %04X) ", pci_name(dev), status);
+ }
+
+ list_for_each_entry(dev, &bus->devices, bus_list)
+ if (dev->subordinate)
+ pcibios_bus_report_status(dev->subordinate, status_mask, warn);
+}
+
+void __init_refok pcibios_report_status(unsigned int status_mask, int warn)
+{
+ struct pci_channel *hose;
+
+ for (hose = hose_head; hose; hose = hose->next) {
+ if (unlikely(!hose->bus))
+ pcibios_bus_report_status_early(hose, hose_head->index,
+ hose->index, status_mask, warn);
+ else
+ pcibios_bus_report_status(hose->bus, status_mask, warn);
+ }
+}
+
+int pci_mmap_page_range(struct pci_dev *dev, struct vm_area_struct *vma,
+ enum pci_mmap_state mmap_state, int write_combine)
+{
+ /*
+ * I/O space can be accessed via normal processor loads and stores on
+ * this platform but for now we elect not to do this and portable
+ * drivers should not do this anyway.
+ */
+ if (mmap_state = pci_mmap_io)
+ return -EINVAL;
+
+ /*
+ * Ignore write-combine; for now only return uncached mappings.
+ */
+ vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot);
+
+ return remap_pfn_range(vma, vma->vm_start, vma->vm_pgoff,
+ vma->vm_end - vma->vm_start,
+ vma->vm_page_prot);
+}
+
+#ifndef CONFIG_GENERIC_IOMAP
+
+void __iomem *__pci_ioport_map(struct pci_dev *dev,
+ unsigned long port, unsigned int nr)
+{
+ struct pci_channel *chan = dev->sysdata;
+
+ if (unlikely(!chan->io_map_base)) {
+ chan->io_map_base = sh_io_port_base;
+
+ if (pci_domains_supported)
+ panic("To avoid data corruption io_map_base MUST be "
+ "set with multiple PCI domains.");
+ }
+
+ return (void __iomem *)(chan->io_map_base + port);
+}
+
+void pci_iounmap(struct pci_dev *dev, void __iomem *addr)
+{
+ iounmap(addr);
+}
+EXPORT_SYMBOL(pci_iounmap);
+
+#endif /* CONFIG_GENERIC_IOMAP */
+
+EXPORT_SYMBOL(PCIBIOS_MIN_IO);
+EXPORT_SYMBOL(PCIBIOS_MIN_MEM);
--
2.7.0
^ permalink raw reply related [flat|nested] 138+ messages in thread* [PATCH v5 15/22] sh: Move common PCI stuff to arch/sh/kernel
@ 2016-07-03 16:46 ` Yoshinori Sato
0 siblings, 0 replies; 138+ messages in thread
From: Yoshinori Sato @ 2016-07-03 16:46 UTC (permalink / raw)
To: linux-sh, linux-kernel; +Cc: Yoshinori Sato
Signed-off-by: Yoshinori Sato <ysato@users.sourceforge.jp>
---
arch/sh/drivers/pci/Makefile | 2 -
arch/sh/drivers/pci/common.c | 162 --------------------
arch/sh/drivers/pci/pci.c | 320 ----------------------------------------
arch/sh/kernel/Makefile | 2 +
arch/sh/kernel/pci-common.c | 162 ++++++++++++++++++++
arch/sh/kernel/pci.c | 342 +++++++++++++++++++++++++++++++++++++++++++
6 files changed, 506 insertions(+), 484 deletions(-)
delete mode 100644 arch/sh/drivers/pci/common.c
delete mode 100644 arch/sh/drivers/pci/pci.c
create mode 100644 arch/sh/kernel/pci-common.c
create mode 100644 arch/sh/kernel/pci.c
diff --git a/arch/sh/drivers/pci/Makefile b/arch/sh/drivers/pci/Makefile
index 82f0a33..fffbede 100644
--- a/arch/sh/drivers/pci/Makefile
+++ b/arch/sh/drivers/pci/Makefile
@@ -1,8 +1,6 @@
#
# Makefile for the PCI specific kernel interface routines under Linux.
#
-obj-y += common.o pci.o
-
obj-$(CONFIG_CPU_SUBTYPE_SH7751) += pci-sh7751.o ops-sh4.o
obj-$(CONFIG_CPU_SUBTYPE_SH7751R) += pci-sh7751.o ops-sh4.o
obj-$(CONFIG_CPU_SUBTYPE_SH7763) += pci-sh7780.o ops-sh4.o
diff --git a/arch/sh/drivers/pci/common.c b/arch/sh/drivers/pci/common.c
deleted file mode 100644
index dbf1381..0000000
--- a/arch/sh/drivers/pci/common.c
+++ /dev/null
@@ -1,162 +0,0 @@
-#include <linux/pci.h>
-#include <linux/interrupt.h>
-#include <linux/timer.h>
-#include <linux/kernel.h>
-
-/*
- * These functions are used early on before PCI scanning is done
- * and all of the pci_dev and pci_bus structures have been created.
- */
-static struct pci_dev *fake_pci_dev(struct pci_channel *hose,
- int top_bus, int busnr, int devfn)
-{
- static struct pci_dev dev;
- static struct pci_bus bus;
-
- dev.bus = &bus;
- dev.sysdata = hose;
- dev.devfn = devfn;
- bus.number = busnr;
- bus.sysdata = hose;
- bus.ops = hose->pci_ops;
-
- if(busnr != top_bus)
- /* Fake a parent bus structure. */
- bus.parent = &bus;
- else
- bus.parent = NULL;
-
- return &dev;
-}
-
-#define EARLY_PCI_OP(rw, size, type) \
-int __init early_##rw##_config_##size(struct pci_channel *hose, \
- int top_bus, int bus, int devfn, int offset, type value) \
-{ \
- return pci_##rw##_config_##size( \
- fake_pci_dev(hose, top_bus, bus, devfn), \
- offset, value); \
-}
-
-EARLY_PCI_OP(read, byte, u8 *)
-EARLY_PCI_OP(read, word, u16 *)
-EARLY_PCI_OP(read, dword, u32 *)
-EARLY_PCI_OP(write, byte, u8)
-EARLY_PCI_OP(write, word, u16)
-EARLY_PCI_OP(write, dword, u32)
-
-int __init pci_is_66mhz_capable(struct pci_channel *hose,
- int top_bus, int current_bus)
-{
- u32 pci_devfn;
- unsigned short vid;
- int cap66 = -1;
- u16 stat;
-
- printk(KERN_INFO "PCI: Checking 66MHz capabilities...\n");
-
- for (pci_devfn = 0; pci_devfn < 0xff; pci_devfn++) {
- if (PCI_FUNC(pci_devfn))
- continue;
- if (early_read_config_word(hose, top_bus, current_bus,
- pci_devfn, PCI_VENDOR_ID, &vid) !=
- PCIBIOS_SUCCESSFUL)
- continue;
- if (vid == 0xffff)
- continue;
-
- /* check 66MHz capability */
- if (cap66 < 0)
- cap66 = 1;
- if (cap66) {
- early_read_config_word(hose, top_bus, current_bus,
- pci_devfn, PCI_STATUS, &stat);
- if (!(stat & PCI_STATUS_66MHZ)) {
- printk(KERN_DEBUG
- "PCI: %02x:%02x not 66MHz capable.\n",
- current_bus, pci_devfn);
- cap66 = 0;
- break;
- }
- }
- }
-
- return cap66 > 0;
-}
-
-static void pcibios_enable_err(unsigned long __data)
-{
- struct pci_channel *hose = (struct pci_channel *)__data;
-
- del_timer(&hose->err_timer);
- printk(KERN_DEBUG "PCI: re-enabling error IRQ.\n");
- enable_irq(hose->err_irq);
-}
-
-static void pcibios_enable_serr(unsigned long __data)
-{
- struct pci_channel *hose = (struct pci_channel *)__data;
-
- del_timer(&hose->serr_timer);
- printk(KERN_DEBUG "PCI: re-enabling system error IRQ.\n");
- enable_irq(hose->serr_irq);
-}
-
-void pcibios_enable_timers(struct pci_channel *hose)
-{
- if (hose->err_irq) {
- init_timer(&hose->err_timer);
- hose->err_timer.data = (unsigned long)hose;
- hose->err_timer.function = pcibios_enable_err;
- }
-
- if (hose->serr_irq) {
- init_timer(&hose->serr_timer);
- hose->serr_timer.data = (unsigned long)hose;
- hose->serr_timer.function = pcibios_enable_serr;
- }
-}
-
-/*
- * A simple handler for the regular PCI status errors, called from IRQ
- * context.
- */
-unsigned int pcibios_handle_status_errors(unsigned long addr,
- unsigned int status,
- struct pci_channel *hose)
-{
- unsigned int cmd = 0;
-
- if (status & PCI_STATUS_REC_MASTER_ABORT) {
- printk(KERN_DEBUG "PCI: master abort, pc=0x%08lx\n", addr);
- cmd |= PCI_STATUS_REC_MASTER_ABORT;
- }
-
- if (status & PCI_STATUS_REC_TARGET_ABORT) {
- printk(KERN_DEBUG "PCI: target abort: ");
- pcibios_report_status(PCI_STATUS_REC_TARGET_ABORT |
- PCI_STATUS_SIG_TARGET_ABORT |
- PCI_STATUS_REC_MASTER_ABORT, 1);
- printk("\n");
-
- cmd |= PCI_STATUS_REC_TARGET_ABORT;
- }
-
- if (status & (PCI_STATUS_PARITY | PCI_STATUS_DETECTED_PARITY)) {
- printk(KERN_DEBUG "PCI: parity error detected: ");
- pcibios_report_status(PCI_STATUS_PARITY |
- PCI_STATUS_DETECTED_PARITY, 1);
- printk("\n");
-
- cmd |= PCI_STATUS_PARITY | PCI_STATUS_DETECTED_PARITY;
-
- /* Now back off of the IRQ for awhile */
- if (hose->err_irq) {
- disable_irq_nosync(hose->err_irq);
- hose->err_timer.expires = jiffies + HZ;
- add_timer(&hose->err_timer);
- }
- }
-
- return cmd;
-}
diff --git a/arch/sh/drivers/pci/pci.c b/arch/sh/drivers/pci/pci.c
deleted file mode 100644
index d5462b7..0000000
--- a/arch/sh/drivers/pci/pci.c
+++ /dev/null
@@ -1,320 +0,0 @@
-/*
- * New-style PCI core.
- *
- * Copyright (c) 2004 - 2009 Paul Mundt
- * Copyright (c) 2002 M. R. Brown
- *
- * Modelled after arch/mips/pci/pci.c:
- * Copyright (C) 2003, 04 Ralf Baechle (ralf@linux-mips.org)
- *
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- */
-#include <linux/kernel.h>
-#include <linux/mm.h>
-#include <linux/pci.h>
-#include <linux/init.h>
-#include <linux/types.h>
-#include <linux/dma-debug.h>
-#include <linux/io.h>
-#include <linux/mutex.h>
-#include <linux/spinlock.h>
-#include <linux/export.h>
-
-unsigned long PCIBIOS_MIN_IO = 0x0000;
-unsigned long PCIBIOS_MIN_MEM = 0;
-
-/*
- * The PCI controller list.
- */
-static struct pci_channel *hose_head, **hose_tail = &hose_head;
-
-static int pci_initialized;
-
-static void pcibios_scanbus(struct pci_channel *hose)
-{
- static int next_busno;
- static int need_domain_info;
- LIST_HEAD(resources);
- struct resource *res;
- resource_size_t offset;
- int i;
- struct pci_bus *bus;
-
- for (i = 0; i < hose->nr_resources; i++) {
- res = hose->resources + i;
- offset = 0;
- if (res->flags & IORESOURCE_IO)
- offset = hose->io_offset;
- else if (res->flags & IORESOURCE_MEM)
- offset = hose->mem_offset;
- pci_add_resource_offset(&resources, res, offset);
- }
-
- bus = pci_scan_root_bus(NULL, next_busno, hose->pci_ops, hose,
- &resources);
- hose->bus = bus;
-
- need_domain_info = need_domain_info || hose->index;
- hose->need_domain_info = need_domain_info;
-
- if (!bus) {
- pci_free_resource_list(&resources);
- return;
- }
-
- next_busno = bus->busn_res.end + 1;
- /* Don't allow 8-bit bus number overflow inside the hose -
- reserve some space for bridges. */
- if (next_busno > 224) {
- next_busno = 0;
- need_domain_info = 1;
- }
-
- pci_bus_size_bridges(bus);
- pci_bus_assign_resources(bus);
- pci_bus_add_devices(bus);
-}
-
-/*
- * This interrupt-safe spinlock protects all accesses to PCI
- * configuration space.
- */
-DEFINE_RAW_SPINLOCK(pci_config_lock);
-static DEFINE_MUTEX(pci_scan_mutex);
-
-int register_pci_controller(struct pci_channel *hose)
-{
- int i;
-
- for (i = 0; i < hose->nr_resources; i++) {
- struct resource *res = hose->resources + i;
-
- if (res->flags & IORESOURCE_IO) {
- if (request_resource(&ioport_resource, res) < 0)
- goto out;
- } else {
- if (request_resource(&iomem_resource, res) < 0)
- goto out;
- }
- }
-
- *hose_tail = hose;
- hose_tail = &hose->next;
-
- /*
- * Do not panic here but later - this might happen before console init.
- */
- if (!hose->io_map_base) {
- printk(KERN_WARNING
- "registering PCI controller with io_map_base unset\n");
- }
-
- /*
- * Setup the ERR/PERR and SERR timers, if available.
- */
- pcibios_enable_timers(hose);
-
- /*
- * Scan the bus if it is register after the PCI subsystem
- * initialization.
- */
- if (pci_initialized) {
- mutex_lock(&pci_scan_mutex);
- pcibios_scanbus(hose);
- mutex_unlock(&pci_scan_mutex);
- }
-
- return 0;
-
-out:
- for (--i; i >= 0; i--)
- release_resource(&hose->resources[i]);
-
- printk(KERN_WARNING "Skipping PCI bus scan due to resource conflict\n");
- return -1;
-}
-
-static int __init pcibios_init(void)
-{
- struct pci_channel *hose;
-
- /* Scan all of the recorded PCI controllers. */
- for (hose = hose_head; hose; hose = hose->next)
- pcibios_scanbus(hose);
-
- pci_fixup_irqs(pci_common_swizzle, pcibios_map_platform_irq);
-
- dma_debug_add_bus(&pci_bus_type);
-
- pci_initialized = 1;
-
- return 0;
-}
-subsys_initcall(pcibios_init);
-
-/*
- * Called after each bus is probed, but before its children
- * are examined.
- */
-void pcibios_fixup_bus(struct pci_bus *bus)
-{
-}
-
-/*
- * We need to avoid collisions with `mirrored' VGA ports
- * and other strange ISA hardware, so we always want the
- * addresses to be allocated in the 0x000-0x0ff region
- * modulo 0x400.
- */
-resource_size_t pcibios_align_resource(void *data, const struct resource *res,
- resource_size_t size, resource_size_t align)
-{
- struct pci_dev *dev = data;
- struct pci_channel *hose = dev->sysdata;
- resource_size_t start = res->start;
-
- if (res->flags & IORESOURCE_IO) {
- if (start < PCIBIOS_MIN_IO + hose->resources[0].start)
- start = PCIBIOS_MIN_IO + hose->resources[0].start;
-
- /*
- * Put everything into 0x00-0xff region modulo 0x400.
- */
- if (start & 0x300)
- start = (start + 0x3ff) & ~0x3ff;
- }
-
- return start;
-}
-
-static void __init
-pcibios_bus_report_status_early(struct pci_channel *hose,
- int top_bus, int current_bus,
- unsigned int status_mask, int warn)
-{
- unsigned int pci_devfn;
- u16 status;
- int ret;
-
- for (pci_devfn = 0; pci_devfn < 0xff; pci_devfn++) {
- if (PCI_FUNC(pci_devfn))
- continue;
- ret = early_read_config_word(hose, top_bus, current_bus,
- pci_devfn, PCI_STATUS, &status);
- if (ret != PCIBIOS_SUCCESSFUL)
- continue;
- if (status == 0xffff)
- continue;
-
- early_write_config_word(hose, top_bus, current_bus,
- pci_devfn, PCI_STATUS,
- status & status_mask);
- if (warn)
- printk("(%02x:%02x: %04X) ", current_bus,
- pci_devfn, status);
- }
-}
-
-/*
- * We can't use pci_find_device() here since we are
- * called from interrupt context.
- */
-static void __init_refok
-pcibios_bus_report_status(struct pci_bus *bus, unsigned int status_mask,
- int warn)
-{
- struct pci_dev *dev;
-
- list_for_each_entry(dev, &bus->devices, bus_list) {
- u16 status;
-
- /*
- * ignore host bridge - we handle
- * that separately
- */
- if (dev->bus->number == 0 && dev->devfn == 0)
- continue;
-
- pci_read_config_word(dev, PCI_STATUS, &status);
- if (status == 0xffff)
- continue;
-
- if ((status & status_mask) == 0)
- continue;
-
- /* clear the status errors */
- pci_write_config_word(dev, PCI_STATUS, status & status_mask);
-
- if (warn)
- printk("(%s: %04X) ", pci_name(dev), status);
- }
-
- list_for_each_entry(dev, &bus->devices, bus_list)
- if (dev->subordinate)
- pcibios_bus_report_status(dev->subordinate, status_mask, warn);
-}
-
-void __init_refok pcibios_report_status(unsigned int status_mask, int warn)
-{
- struct pci_channel *hose;
-
- for (hose = hose_head; hose; hose = hose->next) {
- if (unlikely(!hose->bus))
- pcibios_bus_report_status_early(hose, hose_head->index,
- hose->index, status_mask, warn);
- else
- pcibios_bus_report_status(hose->bus, status_mask, warn);
- }
-}
-
-int pci_mmap_page_range(struct pci_dev *dev, struct vm_area_struct *vma,
- enum pci_mmap_state mmap_state, int write_combine)
-{
- /*
- * I/O space can be accessed via normal processor loads and stores on
- * this platform but for now we elect not to do this and portable
- * drivers should not do this anyway.
- */
- if (mmap_state == pci_mmap_io)
- return -EINVAL;
-
- /*
- * Ignore write-combine; for now only return uncached mappings.
- */
- vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot);
-
- return remap_pfn_range(vma, vma->vm_start, vma->vm_pgoff,
- vma->vm_end - vma->vm_start,
- vma->vm_page_prot);
-}
-
-#ifndef CONFIG_GENERIC_IOMAP
-
-void __iomem *__pci_ioport_map(struct pci_dev *dev,
- unsigned long port, unsigned int nr)
-{
- struct pci_channel *chan = dev->sysdata;
-
- if (unlikely(!chan->io_map_base)) {
- chan->io_map_base = sh_io_port_base;
-
- if (pci_domains_supported)
- panic("To avoid data corruption io_map_base MUST be "
- "set with multiple PCI domains.");
- }
-
- return (void __iomem *)(chan->io_map_base + port);
-}
-
-void pci_iounmap(struct pci_dev *dev, void __iomem *addr)
-{
- iounmap(addr);
-}
-EXPORT_SYMBOL(pci_iounmap);
-
-#endif /* CONFIG_GENERIC_IOMAP */
-
-EXPORT_SYMBOL(PCIBIOS_MIN_IO);
-EXPORT_SYMBOL(PCIBIOS_MIN_MEM);
diff --git a/arch/sh/kernel/Makefile b/arch/sh/kernel/Makefile
index 09040fd..a9a54c2 100644
--- a/arch/sh/kernel/Makefile
+++ b/arch/sh/kernel/Makefile
@@ -46,5 +46,7 @@ obj-$(CONFIG_DWARF_UNWINDER) += dwarf.o
obj-$(CONFIG_PERF_EVENTS) += perf_event.o perf_callchain.o
obj-$(CONFIG_HAVE_HW_BREAKPOINT) += hw_breakpoint.o
+obj-$(CONFIG_PCI) += pci.o pci-common.o
ccflags-y := -Werror
+CFLAGS_pci.o := -O0
diff --git a/arch/sh/kernel/pci-common.c b/arch/sh/kernel/pci-common.c
new file mode 100644
index 0000000..dbf1381
--- /dev/null
+++ b/arch/sh/kernel/pci-common.c
@@ -0,0 +1,162 @@
+#include <linux/pci.h>
+#include <linux/interrupt.h>
+#include <linux/timer.h>
+#include <linux/kernel.h>
+
+/*
+ * These functions are used early on before PCI scanning is done
+ * and all of the pci_dev and pci_bus structures have been created.
+ */
+static struct pci_dev *fake_pci_dev(struct pci_channel *hose,
+ int top_bus, int busnr, int devfn)
+{
+ static struct pci_dev dev;
+ static struct pci_bus bus;
+
+ dev.bus = &bus;
+ dev.sysdata = hose;
+ dev.devfn = devfn;
+ bus.number = busnr;
+ bus.sysdata = hose;
+ bus.ops = hose->pci_ops;
+
+ if(busnr != top_bus)
+ /* Fake a parent bus structure. */
+ bus.parent = &bus;
+ else
+ bus.parent = NULL;
+
+ return &dev;
+}
+
+#define EARLY_PCI_OP(rw, size, type) \
+int __init early_##rw##_config_##size(struct pci_channel *hose, \
+ int top_bus, int bus, int devfn, int offset, type value) \
+{ \
+ return pci_##rw##_config_##size( \
+ fake_pci_dev(hose, top_bus, bus, devfn), \
+ offset, value); \
+}
+
+EARLY_PCI_OP(read, byte, u8 *)
+EARLY_PCI_OP(read, word, u16 *)
+EARLY_PCI_OP(read, dword, u32 *)
+EARLY_PCI_OP(write, byte, u8)
+EARLY_PCI_OP(write, word, u16)
+EARLY_PCI_OP(write, dword, u32)
+
+int __init pci_is_66mhz_capable(struct pci_channel *hose,
+ int top_bus, int current_bus)
+{
+ u32 pci_devfn;
+ unsigned short vid;
+ int cap66 = -1;
+ u16 stat;
+
+ printk(KERN_INFO "PCI: Checking 66MHz capabilities...\n");
+
+ for (pci_devfn = 0; pci_devfn < 0xff; pci_devfn++) {
+ if (PCI_FUNC(pci_devfn))
+ continue;
+ if (early_read_config_word(hose, top_bus, current_bus,
+ pci_devfn, PCI_VENDOR_ID, &vid) !=
+ PCIBIOS_SUCCESSFUL)
+ continue;
+ if (vid == 0xffff)
+ continue;
+
+ /* check 66MHz capability */
+ if (cap66 < 0)
+ cap66 = 1;
+ if (cap66) {
+ early_read_config_word(hose, top_bus, current_bus,
+ pci_devfn, PCI_STATUS, &stat);
+ if (!(stat & PCI_STATUS_66MHZ)) {
+ printk(KERN_DEBUG
+ "PCI: %02x:%02x not 66MHz capable.\n",
+ current_bus, pci_devfn);
+ cap66 = 0;
+ break;
+ }
+ }
+ }
+
+ return cap66 > 0;
+}
+
+static void pcibios_enable_err(unsigned long __data)
+{
+ struct pci_channel *hose = (struct pci_channel *)__data;
+
+ del_timer(&hose->err_timer);
+ printk(KERN_DEBUG "PCI: re-enabling error IRQ.\n");
+ enable_irq(hose->err_irq);
+}
+
+static void pcibios_enable_serr(unsigned long __data)
+{
+ struct pci_channel *hose = (struct pci_channel *)__data;
+
+ del_timer(&hose->serr_timer);
+ printk(KERN_DEBUG "PCI: re-enabling system error IRQ.\n");
+ enable_irq(hose->serr_irq);
+}
+
+void pcibios_enable_timers(struct pci_channel *hose)
+{
+ if (hose->err_irq) {
+ init_timer(&hose->err_timer);
+ hose->err_timer.data = (unsigned long)hose;
+ hose->err_timer.function = pcibios_enable_err;
+ }
+
+ if (hose->serr_irq) {
+ init_timer(&hose->serr_timer);
+ hose->serr_timer.data = (unsigned long)hose;
+ hose->serr_timer.function = pcibios_enable_serr;
+ }
+}
+
+/*
+ * A simple handler for the regular PCI status errors, called from IRQ
+ * context.
+ */
+unsigned int pcibios_handle_status_errors(unsigned long addr,
+ unsigned int status,
+ struct pci_channel *hose)
+{
+ unsigned int cmd = 0;
+
+ if (status & PCI_STATUS_REC_MASTER_ABORT) {
+ printk(KERN_DEBUG "PCI: master abort, pc=0x%08lx\n", addr);
+ cmd |= PCI_STATUS_REC_MASTER_ABORT;
+ }
+
+ if (status & PCI_STATUS_REC_TARGET_ABORT) {
+ printk(KERN_DEBUG "PCI: target abort: ");
+ pcibios_report_status(PCI_STATUS_REC_TARGET_ABORT |
+ PCI_STATUS_SIG_TARGET_ABORT |
+ PCI_STATUS_REC_MASTER_ABORT, 1);
+ printk("\n");
+
+ cmd |= PCI_STATUS_REC_TARGET_ABORT;
+ }
+
+ if (status & (PCI_STATUS_PARITY | PCI_STATUS_DETECTED_PARITY)) {
+ printk(KERN_DEBUG "PCI: parity error detected: ");
+ pcibios_report_status(PCI_STATUS_PARITY |
+ PCI_STATUS_DETECTED_PARITY, 1);
+ printk("\n");
+
+ cmd |= PCI_STATUS_PARITY | PCI_STATUS_DETECTED_PARITY;
+
+ /* Now back off of the IRQ for awhile */
+ if (hose->err_irq) {
+ disable_irq_nosync(hose->err_irq);
+ hose->err_timer.expires = jiffies + HZ;
+ add_timer(&hose->err_timer);
+ }
+ }
+
+ return cmd;
+}
diff --git a/arch/sh/kernel/pci.c b/arch/sh/kernel/pci.c
new file mode 100644
index 0000000..9cf0ba4
--- /dev/null
+++ b/arch/sh/kernel/pci.c
@@ -0,0 +1,342 @@
+/*
+ * New-style PCI core.
+ *
+ * Copyright (c) 2004 - 2009 Paul Mundt
+ * Copyright (c) 2002 M. R. Brown
+ *
+ * Modelled after arch/mips/pci/pci.c:
+ * Copyright (C) 2003, 04 Ralf Baechle (ralf@linux-mips.org)
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License. See the file "COPYING" in the main directory of this archive
+ * for more details.
+ */
+#include <linux/kernel.h>
+#include <linux/mm.h>
+#include <linux/pci.h>
+#include <linux/init.h>
+#include <linux/types.h>
+#include <linux/dma-debug.h>
+#include <linux/io.h>
+#include <linux/mutex.h>
+#include <linux/spinlock.h>
+#include <linux/export.h>
+
+unsigned long PCIBIOS_MIN_IO = 0x0000;
+unsigned long PCIBIOS_MIN_MEM = 0;
+
+/*
+ * The PCI controller list.
+ */
+static struct pci_channel *hose_head, **hose_tail = &hose_head;
+
+static int pci_initialized;
+
+static void pcibios_scanbus(struct pci_channel *hose)
+{
+ static int next_busno;
+ static int need_domain_info;
+ LIST_HEAD(resources);
+ struct resource *res;
+ resource_size_t offset;
+ int i;
+ struct pci_bus *bus;
+
+ for (i = 0; i < hose->nr_resources; i++) {
+ res = hose->resources + i;
+ offset = 0;
+ if (res->flags & IORESOURCE_IO)
+ offset = hose->io_offset;
+ else if (res->flags & IORESOURCE_MEM)
+ offset = hose->mem_offset;
+ pci_add_resource_offset(&resources, res, offset);
+ }
+
+ bus = pci_scan_root_bus(NULL, next_busno, hose->pci_ops, hose,
+ &resources);
+ hose->bus = bus;
+
+ need_domain_info = need_domain_info || hose->index;
+ hose->need_domain_info = need_domain_info;
+
+ if (!bus) {
+ pci_free_resource_list(&resources);
+ return;
+ }
+
+ next_busno = bus->busn_res.end + 1;
+ /* Don't allow 8-bit bus number overflow inside the hose -
+ reserve some space for bridges. */
+ if (next_busno > 224) {
+ next_busno = 0;
+ need_domain_info = 1;
+ }
+
+ pci_bus_size_bridges(bus);
+ pci_bus_assign_resources(bus);
+ pci_bus_add_devices(bus);
+}
+
+/*
+ * This interrupt-safe spinlock protects all accesses to PCI
+ * configuration space.
+ */
+DEFINE_RAW_SPINLOCK(pci_config_lock);
+static DEFINE_MUTEX(pci_scan_mutex);
+
+int register_pci_controller(struct pci_channel *hose)
+{
+ int i;
+
+ for (i = 0; i < hose->nr_resources; i++) {
+ struct resource *res = hose->resources + i;
+
+ if (res->flags & IORESOURCE_IO) {
+ if (request_resource(&ioport_resource, res) < 0)
+ goto out;
+ } else {
+ if (request_resource(&iomem_resource, res) < 0)
+ goto out;
+ }
+ }
+
+ *hose_tail = hose;
+ hose_tail = &hose->next;
+
+ /*
+ * Do not panic here but later - this might happen before console init.
+ */
+ if (!hose->io_map_base) {
+ printk(KERN_WARNING
+ "registering PCI controller with io_map_base unset\n");
+ }
+
+ /*
+ * Setup the ERR/PERR and SERR timers, if available.
+ */
+ pcibios_enable_timers(hose);
+
+ /*
+ * Scan the bus if it is register after the PCI subsystem
+ * initialization.
+ */
+ if (pci_initialized) {
+ mutex_lock(&pci_scan_mutex);
+ pcibios_scanbus(hose);
+ mutex_unlock(&pci_scan_mutex);
+ }
+
+ return 0;
+
+out:
+ for (--i; i >= 0; i--)
+ release_resource(&hose->resources[i]);
+
+ printk(KERN_WARNING "Skipping PCI bus scan due to resource conflict\n");
+ return -1;
+}
+
+#ifndef CONFIG_SH_DEVICE_TREE
+static int __init pcibios_init(void)
+{
+ struct pci_channel *hose;
+
+ /* Scan all of the recorded PCI controllers. */
+ for (hose = hose_head; hose; hose = hose->next)
+ pcibios_scanbus(hose);
+
+ pci_fixup_irqs(pci_common_swizzle, pcibios_map_platform_irq);
+
+ dma_debug_add_bus(&pci_bus_type);
+
+ pci_initialized = 1;
+
+ return 0;
+}
+subsys_initcall(pcibios_init);
+#endif
+
+/*
+ * Called after each bus is probed, but before its children
+ * are examined.
+ */
+void pcibios_fixup_bus(struct pci_bus *bus)
+{
+}
+
+#ifndef CONFIG_SH_DEVICE_TREE
+/*
+ * We need to avoid collisions with `mirrored' VGA ports
+ * and other strange ISA hardware, so we always want the
+ * addresses to be allocated in the 0x000-0x0ff region
+ * modulo 0x400.
+ */
+resource_size_t pcibios_align_resource(void *data, const struct resource *res,
+ resource_size_t size, resource_size_t align)
+{
+ struct pci_dev *dev = data;
+ struct pci_channel *hose = dev->sysdata;
+ resource_size_t start = res->start;
+
+ if (res->flags & IORESOURCE_IO) {
+ if (start < PCIBIOS_MIN_IO + hose->resources[0].start)
+ start = PCIBIOS_MIN_IO + hose->resources[0].start;
+
+ /*
+ * Put everything into 0x00-0xff region modulo 0x400.
+ */
+ if (start & 0x300)
+ start = (start + 0x3ff) & ~0x3ff;
+ }
+
+ return start;
+}
+#else
+typedef resource_size_t (*align_resource_fn)(struct pci_dev *dev,
+ const struct resource *res,
+ resource_size_t start,
+ resource_size_t size,
+ resource_size_t align);
+
+resource_size_t pcibios_align_resource(void *data, const struct resource *res,
+ resource_size_t size, resource_size_t align)
+{
+ resource_size_t start = res->start;
+ struct pci_dev *dev = data;
+ struct pci_config_window *cfg = dev->sysdata;
+ align_resource_fn fn;
+
+ fn = (align_resource_fn)(cfg->priv);
+ return fn(dev, res, start, size, align);
+}
+#endif
+
+static void __init
+pcibios_bus_report_status_early(struct pci_channel *hose,
+ int top_bus, int current_bus,
+ unsigned int status_mask, int warn)
+{
+ unsigned int pci_devfn;
+ u16 status;
+ int ret;
+
+ for (pci_devfn = 0; pci_devfn < 0xff; pci_devfn++) {
+ if (PCI_FUNC(pci_devfn))
+ continue;
+ ret = early_read_config_word(hose, top_bus, current_bus,
+ pci_devfn, PCI_STATUS, &status);
+ if (ret != PCIBIOS_SUCCESSFUL)
+ continue;
+ if (status == 0xffff)
+ continue;
+
+ early_write_config_word(hose, top_bus, current_bus,
+ pci_devfn, PCI_STATUS,
+ status & status_mask);
+ if (warn)
+ printk("(%02x:%02x: %04X) ", current_bus,
+ pci_devfn, status);
+ }
+}
+
+/*
+ * We can't use pci_find_device() here since we are
+ * called from interrupt context.
+ */
+static void __init_refok
+pcibios_bus_report_status(struct pci_bus *bus, unsigned int status_mask,
+ int warn)
+{
+ struct pci_dev *dev;
+
+ list_for_each_entry(dev, &bus->devices, bus_list) {
+ u16 status;
+
+ /*
+ * ignore host bridge - we handle
+ * that separately
+ */
+ if (dev->bus->number == 0 && dev->devfn == 0)
+ continue;
+
+ pci_read_config_word(dev, PCI_STATUS, &status);
+ if (status == 0xffff)
+ continue;
+
+ if ((status & status_mask) == 0)
+ continue;
+
+ /* clear the status errors */
+ pci_write_config_word(dev, PCI_STATUS, status & status_mask);
+
+ if (warn)
+ printk("(%s: %04X) ", pci_name(dev), status);
+ }
+
+ list_for_each_entry(dev, &bus->devices, bus_list)
+ if (dev->subordinate)
+ pcibios_bus_report_status(dev->subordinate, status_mask, warn);
+}
+
+void __init_refok pcibios_report_status(unsigned int status_mask, int warn)
+{
+ struct pci_channel *hose;
+
+ for (hose = hose_head; hose; hose = hose->next) {
+ if (unlikely(!hose->bus))
+ pcibios_bus_report_status_early(hose, hose_head->index,
+ hose->index, status_mask, warn);
+ else
+ pcibios_bus_report_status(hose->bus, status_mask, warn);
+ }
+}
+
+int pci_mmap_page_range(struct pci_dev *dev, struct vm_area_struct *vma,
+ enum pci_mmap_state mmap_state, int write_combine)
+{
+ /*
+ * I/O space can be accessed via normal processor loads and stores on
+ * this platform but for now we elect not to do this and portable
+ * drivers should not do this anyway.
+ */
+ if (mmap_state == pci_mmap_io)
+ return -EINVAL;
+
+ /*
+ * Ignore write-combine; for now only return uncached mappings.
+ */
+ vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot);
+
+ return remap_pfn_range(vma, vma->vm_start, vma->vm_pgoff,
+ vma->vm_end - vma->vm_start,
+ vma->vm_page_prot);
+}
+
+#ifndef CONFIG_GENERIC_IOMAP
+
+void __iomem *__pci_ioport_map(struct pci_dev *dev,
+ unsigned long port, unsigned int nr)
+{
+ struct pci_channel *chan = dev->sysdata;
+
+ if (unlikely(!chan->io_map_base)) {
+ chan->io_map_base = sh_io_port_base;
+
+ if (pci_domains_supported)
+ panic("To avoid data corruption io_map_base MUST be "
+ "set with multiple PCI domains.");
+ }
+
+ return (void __iomem *)(chan->io_map_base + port);
+}
+
+void pci_iounmap(struct pci_dev *dev, void __iomem *addr)
+{
+ iounmap(addr);
+}
+EXPORT_SYMBOL(pci_iounmap);
+
+#endif /* CONFIG_GENERIC_IOMAP */
+
+EXPORT_SYMBOL(PCIBIOS_MIN_IO);
+EXPORT_SYMBOL(PCIBIOS_MIN_MEM);
--
2.7.0
^ permalink raw reply related [flat|nested] 138+ messages in thread* Re: [PATCH v5 15/22] sh: Move common PCI stuff to arch/sh/kernel
2016-07-03 16:46 ` Yoshinori Sato
@ 2016-07-04 1:55 ` Rich Felker
-1 siblings, 0 replies; 138+ messages in thread
From: Rich Felker @ 2016-07-04 1:55 UTC (permalink / raw)
To: Yoshinori Sato; +Cc: linux-sh, linux-kernel
On Mon, Jul 04, 2016 at 01:46:35AM +0900, Yoshinori Sato wrote:
> Signed-off-by: Yoshinori Sato <ysato@users.sourceforge.jp>
> ---
> arch/sh/drivers/pci/Makefile | 2 -
> arch/sh/drivers/pci/common.c | 162 --------------------
> arch/sh/drivers/pci/pci.c | 320 ----------------------------------------
> arch/sh/kernel/Makefile | 2 +
> arch/sh/kernel/pci-common.c | 162 ++++++++++++++++++++
> arch/sh/kernel/pci.c | 342 +++++++++++++++++++++++++++++++++++++++++++
> 6 files changed, 506 insertions(+), 484 deletions(-)
> delete mode 100644 arch/sh/drivers/pci/common.c
> delete mode 100644 arch/sh/drivers/pci/pci.c
> create mode 100644 arch/sh/kernel/pci-common.c
> create mode 100644 arch/sh/kernel/pci.c
>
> diff --git a/arch/sh/drivers/pci/Makefile b/arch/sh/drivers/pci/Makefile
> index 82f0a33..fffbede 100644
> --- a/arch/sh/drivers/pci/Makefile
> +++ b/arch/sh/drivers/pci/Makefile
> @@ -1,8 +1,6 @@
> #
> # Makefile for the PCI specific kernel interface routines under Linux.
> #
> -obj-y += common.o pci.o
> -
> obj-$(CONFIG_CPU_SUBTYPE_SH7751) += pci-sh7751.o ops-sh4.o
> obj-$(CONFIG_CPU_SUBTYPE_SH7751R) += pci-sh7751.o ops-sh4.o
> obj-$(CONFIG_CPU_SUBTYPE_SH7763) += pci-sh7780.o ops-sh4.o
> diff --git a/arch/sh/drivers/pci/common.c b/arch/sh/drivers/pci/common.c
> deleted file mode 100644
> index dbf1381..0000000
> --- a/arch/sh/drivers/pci/common.c
> +++ /dev/null
> @@ -1,162 +0,0 @@
> -#include <linux/pci.h>
> -#include <linux/interrupt.h>
> -#include <linux/timer.h>
> -#include <linux/kernel.h>
> -
> -/*
> - * These functions are used early on before PCI scanning is done
> - * and all of the pci_dev and pci_bus structures have been created.
> - */
> -static struct pci_dev *fake_pci_dev(struct pci_channel *hose,
> - int top_bus, int busnr, int devfn)
> -{
> - static struct pci_dev dev;
> - static struct pci_bus bus;
> -
> - dev.bus = &bus;
> - dev.sysdata = hose;
> - dev.devfn = devfn;
> - bus.number = busnr;
> - bus.sysdata = hose;
> - bus.ops = hose->pci_ops;
> -
> - if(busnr != top_bus)
> - /* Fake a parent bus structure. */
> - bus.parent = &bus;
> - else
> - bus.parent = NULL;
> -
> - return &dev;
> -}
> -
> -#define EARLY_PCI_OP(rw, size, type) \
> -int __init early_##rw##_config_##size(struct pci_channel *hose, \
> - int top_bus, int bus, int devfn, int offset, type value) \
> -{ \
> - return pci_##rw##_config_##size( \
> - fake_pci_dev(hose, top_bus, bus, devfn), \
> - offset, value); \
> -}
> -
> -EARLY_PCI_OP(read, byte, u8 *)
> -EARLY_PCI_OP(read, word, u16 *)
> -EARLY_PCI_OP(read, dword, u32 *)
> -EARLY_PCI_OP(write, byte, u8)
> -EARLY_PCI_OP(write, word, u16)
> -EARLY_PCI_OP(write, dword, u32)
> -
> -int __init pci_is_66mhz_capable(struct pci_channel *hose,
> - int top_bus, int current_bus)
> -{
> - u32 pci_devfn;
> - unsigned short vid;
> - int cap66 = -1;
> - u16 stat;
> -
> - printk(KERN_INFO "PCI: Checking 66MHz capabilities...\n");
> -
> - for (pci_devfn = 0; pci_devfn < 0xff; pci_devfn++) {
> - if (PCI_FUNC(pci_devfn))
> - continue;
> - if (early_read_config_word(hose, top_bus, current_bus,
> - pci_devfn, PCI_VENDOR_ID, &vid) !> - PCIBIOS_SUCCESSFUL)
> - continue;
> - if (vid = 0xffff)
> - continue;
> -
> - /* check 66MHz capability */
> - if (cap66 < 0)
> - cap66 = 1;
> - if (cap66) {
> - early_read_config_word(hose, top_bus, current_bus,
> - pci_devfn, PCI_STATUS, &stat);
> - if (!(stat & PCI_STATUS_66MHZ)) {
> - printk(KERN_DEBUG
> - "PCI: %02x:%02x not 66MHz capable.\n",
> - current_bus, pci_devfn);
> - cap66 = 0;
> - break;
> - }
> - }
> - }
> -
> - return cap66 > 0;
> -}
> -
> -static void pcibios_enable_err(unsigned long __data)
> -{
> - struct pci_channel *hose = (struct pci_channel *)__data;
> -
> - del_timer(&hose->err_timer);
> - printk(KERN_DEBUG "PCI: re-enabling error IRQ.\n");
> - enable_irq(hose->err_irq);
> -}
> -
> -static void pcibios_enable_serr(unsigned long __data)
> -{
> - struct pci_channel *hose = (struct pci_channel *)__data;
> -
> - del_timer(&hose->serr_timer);
> - printk(KERN_DEBUG "PCI: re-enabling system error IRQ.\n");
> - enable_irq(hose->serr_irq);
> -}
> -
> -void pcibios_enable_timers(struct pci_channel *hose)
> -{
> - if (hose->err_irq) {
> - init_timer(&hose->err_timer);
> - hose->err_timer.data = (unsigned long)hose;
> - hose->err_timer.function = pcibios_enable_err;
> - }
> -
> - if (hose->serr_irq) {
> - init_timer(&hose->serr_timer);
> - hose->serr_timer.data = (unsigned long)hose;
> - hose->serr_timer.function = pcibios_enable_serr;
> - }
> -}
> -
> -/*
> - * A simple handler for the regular PCI status errors, called from IRQ
> - * context.
> - */
> -unsigned int pcibios_handle_status_errors(unsigned long addr,
> - unsigned int status,
> - struct pci_channel *hose)
> -{
> - unsigned int cmd = 0;
> -
> - if (status & PCI_STATUS_REC_MASTER_ABORT) {
> - printk(KERN_DEBUG "PCI: master abort, pc=0x%08lx\n", addr);
> - cmd |= PCI_STATUS_REC_MASTER_ABORT;
> - }
> -
> - if (status & PCI_STATUS_REC_TARGET_ABORT) {
> - printk(KERN_DEBUG "PCI: target abort: ");
> - pcibios_report_status(PCI_STATUS_REC_TARGET_ABORT |
> - PCI_STATUS_SIG_TARGET_ABORT |
> - PCI_STATUS_REC_MASTER_ABORT, 1);
> - printk("\n");
> -
> - cmd |= PCI_STATUS_REC_TARGET_ABORT;
> - }
> -
> - if (status & (PCI_STATUS_PARITY | PCI_STATUS_DETECTED_PARITY)) {
> - printk(KERN_DEBUG "PCI: parity error detected: ");
> - pcibios_report_status(PCI_STATUS_PARITY |
> - PCI_STATUS_DETECTED_PARITY, 1);
> - printk("\n");
> -
> - cmd |= PCI_STATUS_PARITY | PCI_STATUS_DETECTED_PARITY;
> -
> - /* Now back off of the IRQ for awhile */
> - if (hose->err_irq) {
> - disable_irq_nosync(hose->err_irq);
> - hose->err_timer.expires = jiffies + HZ;
> - add_timer(&hose->err_timer);
> - }
> - }
> -
> - return cmd;
> -}
> diff --git a/arch/sh/drivers/pci/pci.c b/arch/sh/drivers/pci/pci.c
> deleted file mode 100644
> index d5462b7..0000000
> --- a/arch/sh/drivers/pci/pci.c
> +++ /dev/null
> @@ -1,320 +0,0 @@
> -/*
> - * New-style PCI core.
> - *
> - * Copyright (c) 2004 - 2009 Paul Mundt
> - * Copyright (c) 2002 M. R. Brown
> - *
> - * Modelled after arch/mips/pci/pci.c:
> - * Copyright (C) 2003, 04 Ralf Baechle (ralf@linux-mips.org)
> - *
> - * This file is subject to the terms and conditions of the GNU General Public
> - * License. See the file "COPYING" in the main directory of this archive
> - * for more details.
> - */
> -#include <linux/kernel.h>
> -#include <linux/mm.h>
> -#include <linux/pci.h>
> -#include <linux/init.h>
> -#include <linux/types.h>
> -#include <linux/dma-debug.h>
> -#include <linux/io.h>
> -#include <linux/mutex.h>
> -#include <linux/spinlock.h>
> -#include <linux/export.h>
> -
> -unsigned long PCIBIOS_MIN_IO = 0x0000;
> -unsigned long PCIBIOS_MIN_MEM = 0;
> -
> -/*
> - * The PCI controller list.
> - */
> -static struct pci_channel *hose_head, **hose_tail = &hose_head;
> -
> -static int pci_initialized;
> -
> -static void pcibios_scanbus(struct pci_channel *hose)
> -{
> - static int next_busno;
> - static int need_domain_info;
> - LIST_HEAD(resources);
> - struct resource *res;
> - resource_size_t offset;
> - int i;
> - struct pci_bus *bus;
> -
> - for (i = 0; i < hose->nr_resources; i++) {
> - res = hose->resources + i;
> - offset = 0;
> - if (res->flags & IORESOURCE_IO)
> - offset = hose->io_offset;
> - else if (res->flags & IORESOURCE_MEM)
> - offset = hose->mem_offset;
> - pci_add_resource_offset(&resources, res, offset);
> - }
> -
> - bus = pci_scan_root_bus(NULL, next_busno, hose->pci_ops, hose,
> - &resources);
> - hose->bus = bus;
> -
> - need_domain_info = need_domain_info || hose->index;
> - hose->need_domain_info = need_domain_info;
> -
> - if (!bus) {
> - pci_free_resource_list(&resources);
> - return;
> - }
> -
> - next_busno = bus->busn_res.end + 1;
> - /* Don't allow 8-bit bus number overflow inside the hose -
> - reserve some space for bridges. */
> - if (next_busno > 224) {
> - next_busno = 0;
> - need_domain_info = 1;
> - }
> -
> - pci_bus_size_bridges(bus);
> - pci_bus_assign_resources(bus);
> - pci_bus_add_devices(bus);
> -}
> -
> -/*
> - * This interrupt-safe spinlock protects all accesses to PCI
> - * configuration space.
> - */
> -DEFINE_RAW_SPINLOCK(pci_config_lock);
> -static DEFINE_MUTEX(pci_scan_mutex);
> -
> -int register_pci_controller(struct pci_channel *hose)
> -{
> - int i;
> -
> - for (i = 0; i < hose->nr_resources; i++) {
> - struct resource *res = hose->resources + i;
> -
> - if (res->flags & IORESOURCE_IO) {
> - if (request_resource(&ioport_resource, res) < 0)
> - goto out;
> - } else {
> - if (request_resource(&iomem_resource, res) < 0)
> - goto out;
> - }
> - }
> -
> - *hose_tail = hose;
> - hose_tail = &hose->next;
> -
> - /*
> - * Do not panic here but later - this might happen before console init.
> - */
> - if (!hose->io_map_base) {
> - printk(KERN_WARNING
> - "registering PCI controller with io_map_base unset\n");
> - }
> -
> - /*
> - * Setup the ERR/PERR and SERR timers, if available.
> - */
> - pcibios_enable_timers(hose);
> -
> - /*
> - * Scan the bus if it is register after the PCI subsystem
> - * initialization.
> - */
> - if (pci_initialized) {
> - mutex_lock(&pci_scan_mutex);
> - pcibios_scanbus(hose);
> - mutex_unlock(&pci_scan_mutex);
> - }
> -
> - return 0;
> -
> -out:
> - for (--i; i >= 0; i--)
> - release_resource(&hose->resources[i]);
> -
> - printk(KERN_WARNING "Skipping PCI bus scan due to resource conflict\n");
> - return -1;
> -}
> -
> -static int __init pcibios_init(void)
> -{
> - struct pci_channel *hose;
> -
> - /* Scan all of the recorded PCI controllers. */
> - for (hose = hose_head; hose; hose = hose->next)
> - pcibios_scanbus(hose);
> -
> - pci_fixup_irqs(pci_common_swizzle, pcibios_map_platform_irq);
> -
> - dma_debug_add_bus(&pci_bus_type);
> -
> - pci_initialized = 1;
> -
> - return 0;
> -}
> -subsys_initcall(pcibios_init);
> -
> -/*
> - * Called after each bus is probed, but before its children
> - * are examined.
> - */
> -void pcibios_fixup_bus(struct pci_bus *bus)
> -{
> -}
> -
> -/*
> - * We need to avoid collisions with `mirrored' VGA ports
> - * and other strange ISA hardware, so we always want the
> - * addresses to be allocated in the 0x000-0x0ff region
> - * modulo 0x400.
> - */
> -resource_size_t pcibios_align_resource(void *data, const struct resource *res,
> - resource_size_t size, resource_size_t align)
> -{
> - struct pci_dev *dev = data;
> - struct pci_channel *hose = dev->sysdata;
> - resource_size_t start = res->start;
> -
> - if (res->flags & IORESOURCE_IO) {
> - if (start < PCIBIOS_MIN_IO + hose->resources[0].start)
> - start = PCIBIOS_MIN_IO + hose->resources[0].start;
> -
> - /*
> - * Put everything into 0x00-0xff region modulo 0x400.
> - */
> - if (start & 0x300)
> - start = (start + 0x3ff) & ~0x3ff;
> - }
> -
> - return start;
> -}
> -
> -static void __init
> -pcibios_bus_report_status_early(struct pci_channel *hose,
> - int top_bus, int current_bus,
> - unsigned int status_mask, int warn)
> -{
> - unsigned int pci_devfn;
> - u16 status;
> - int ret;
> -
> - for (pci_devfn = 0; pci_devfn < 0xff; pci_devfn++) {
> - if (PCI_FUNC(pci_devfn))
> - continue;
> - ret = early_read_config_word(hose, top_bus, current_bus,
> - pci_devfn, PCI_STATUS, &status);
> - if (ret != PCIBIOS_SUCCESSFUL)
> - continue;
> - if (status = 0xffff)
> - continue;
> -
> - early_write_config_word(hose, top_bus, current_bus,
> - pci_devfn, PCI_STATUS,
> - status & status_mask);
> - if (warn)
> - printk("(%02x:%02x: %04X) ", current_bus,
> - pci_devfn, status);
> - }
> -}
> -
> -/*
> - * We can't use pci_find_device() here since we are
> - * called from interrupt context.
> - */
> -static void __init_refok
> -pcibios_bus_report_status(struct pci_bus *bus, unsigned int status_mask,
> - int warn)
> -{
> - struct pci_dev *dev;
> -
> - list_for_each_entry(dev, &bus->devices, bus_list) {
> - u16 status;
> -
> - /*
> - * ignore host bridge - we handle
> - * that separately
> - */
> - if (dev->bus->number = 0 && dev->devfn = 0)
> - continue;
> -
> - pci_read_config_word(dev, PCI_STATUS, &status);
> - if (status = 0xffff)
> - continue;
> -
> - if ((status & status_mask) = 0)
> - continue;
> -
> - /* clear the status errors */
> - pci_write_config_word(dev, PCI_STATUS, status & status_mask);
> -
> - if (warn)
> - printk("(%s: %04X) ", pci_name(dev), status);
> - }
> -
> - list_for_each_entry(dev, &bus->devices, bus_list)
> - if (dev->subordinate)
> - pcibios_bus_report_status(dev->subordinate, status_mask, warn);
> -}
> -
> -void __init_refok pcibios_report_status(unsigned int status_mask, int warn)
> -{
> - struct pci_channel *hose;
> -
> - for (hose = hose_head; hose; hose = hose->next) {
> - if (unlikely(!hose->bus))
> - pcibios_bus_report_status_early(hose, hose_head->index,
> - hose->index, status_mask, warn);
> - else
> - pcibios_bus_report_status(hose->bus, status_mask, warn);
> - }
> -}
> -
> -int pci_mmap_page_range(struct pci_dev *dev, struct vm_area_struct *vma,
> - enum pci_mmap_state mmap_state, int write_combine)
> -{
> - /*
> - * I/O space can be accessed via normal processor loads and stores on
> - * this platform but for now we elect not to do this and portable
> - * drivers should not do this anyway.
> - */
> - if (mmap_state = pci_mmap_io)
> - return -EINVAL;
> -
> - /*
> - * Ignore write-combine; for now only return uncached mappings.
> - */
> - vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot);
> -
> - return remap_pfn_range(vma, vma->vm_start, vma->vm_pgoff,
> - vma->vm_end - vma->vm_start,
> - vma->vm_page_prot);
> -}
> -
> -#ifndef CONFIG_GENERIC_IOMAP
> -
> -void __iomem *__pci_ioport_map(struct pci_dev *dev,
> - unsigned long port, unsigned int nr)
> -{
> - struct pci_channel *chan = dev->sysdata;
> -
> - if (unlikely(!chan->io_map_base)) {
> - chan->io_map_base = sh_io_port_base;
> -
> - if (pci_domains_supported)
> - panic("To avoid data corruption io_map_base MUST be "
> - "set with multiple PCI domains.");
> - }
> -
> - return (void __iomem *)(chan->io_map_base + port);
> -}
> -
> -void pci_iounmap(struct pci_dev *dev, void __iomem *addr)
> -{
> - iounmap(addr);
> -}
> -EXPORT_SYMBOL(pci_iounmap);
> -
> -#endif /* CONFIG_GENERIC_IOMAP */
> -
> -EXPORT_SYMBOL(PCIBIOS_MIN_IO);
> -EXPORT_SYMBOL(PCIBIOS_MIN_MEM);
> diff --git a/arch/sh/kernel/Makefile b/arch/sh/kernel/Makefile
> index 09040fd..a9a54c2 100644
> --- a/arch/sh/kernel/Makefile
> +++ b/arch/sh/kernel/Makefile
> @@ -46,5 +46,7 @@ obj-$(CONFIG_DWARF_UNWINDER) += dwarf.o
> obj-$(CONFIG_PERF_EVENTS) += perf_event.o perf_callchain.o
>
> obj-$(CONFIG_HAVE_HW_BREAKPOINT) += hw_breakpoint.o
> +obj-$(CONFIG_PCI) += pci.o pci-common.o
>
> ccflags-y := -Werror
> +CFLAGS_pci.o := -O0
> diff --git a/arch/sh/kernel/pci-common.c b/arch/sh/kernel/pci-common.c
> new file mode 100644
> index 0000000..dbf1381
> --- /dev/null
> +++ b/arch/sh/kernel/pci-common.c
> @@ -0,0 +1,162 @@
> +#include <linux/pci.h>
> +#include <linux/interrupt.h>
> +#include <linux/timer.h>
> +#include <linux/kernel.h>
> +
> +/*
> + * These functions are used early on before PCI scanning is done
> + * and all of the pci_dev and pci_bus structures have been created.
> + */
> +static struct pci_dev *fake_pci_dev(struct pci_channel *hose,
> + int top_bus, int busnr, int devfn)
> +{
> + static struct pci_dev dev;
> + static struct pci_bus bus;
> +
> + dev.bus = &bus;
> + dev.sysdata = hose;
> + dev.devfn = devfn;
> + bus.number = busnr;
> + bus.sysdata = hose;
> + bus.ops = hose->pci_ops;
> +
> + if(busnr != top_bus)
> + /* Fake a parent bus structure. */
> + bus.parent = &bus;
> + else
> + bus.parent = NULL;
> +
> + return &dev;
> +}
> +
> +#define EARLY_PCI_OP(rw, size, type) \
> +int __init early_##rw##_config_##size(struct pci_channel *hose, \
> + int top_bus, int bus, int devfn, int offset, type value) \
> +{ \
> + return pci_##rw##_config_##size( \
> + fake_pci_dev(hose, top_bus, bus, devfn), \
> + offset, value); \
> +}
> +
> +EARLY_PCI_OP(read, byte, u8 *)
> +EARLY_PCI_OP(read, word, u16 *)
> +EARLY_PCI_OP(read, dword, u32 *)
> +EARLY_PCI_OP(write, byte, u8)
> +EARLY_PCI_OP(write, word, u16)
> +EARLY_PCI_OP(write, dword, u32)
> +
> +int __init pci_is_66mhz_capable(struct pci_channel *hose,
> + int top_bus, int current_bus)
> +{
> + u32 pci_devfn;
> + unsigned short vid;
> + int cap66 = -1;
> + u16 stat;
> +
> + printk(KERN_INFO "PCI: Checking 66MHz capabilities...\n");
> +
> + for (pci_devfn = 0; pci_devfn < 0xff; pci_devfn++) {
> + if (PCI_FUNC(pci_devfn))
> + continue;
> + if (early_read_config_word(hose, top_bus, current_bus,
> + pci_devfn, PCI_VENDOR_ID, &vid) !> + PCIBIOS_SUCCESSFUL)
> + continue;
> + if (vid = 0xffff)
> + continue;
> +
> + /* check 66MHz capability */
> + if (cap66 < 0)
> + cap66 = 1;
> + if (cap66) {
> + early_read_config_word(hose, top_bus, current_bus,
> + pci_devfn, PCI_STATUS, &stat);
> + if (!(stat & PCI_STATUS_66MHZ)) {
> + printk(KERN_DEBUG
> + "PCI: %02x:%02x not 66MHz capable.\n",
> + current_bus, pci_devfn);
> + cap66 = 0;
> + break;
> + }
> + }
> + }
> +
> + return cap66 > 0;
> +}
> +
> +static void pcibios_enable_err(unsigned long __data)
> +{
> + struct pci_channel *hose = (struct pci_channel *)__data;
> +
> + del_timer(&hose->err_timer);
> + printk(KERN_DEBUG "PCI: re-enabling error IRQ.\n");
> + enable_irq(hose->err_irq);
> +}
> +
> +static void pcibios_enable_serr(unsigned long __data)
> +{
> + struct pci_channel *hose = (struct pci_channel *)__data;
> +
> + del_timer(&hose->serr_timer);
> + printk(KERN_DEBUG "PCI: re-enabling system error IRQ.\n");
> + enable_irq(hose->serr_irq);
> +}
> +
> +void pcibios_enable_timers(struct pci_channel *hose)
> +{
> + if (hose->err_irq) {
> + init_timer(&hose->err_timer);
> + hose->err_timer.data = (unsigned long)hose;
> + hose->err_timer.function = pcibios_enable_err;
> + }
> +
> + if (hose->serr_irq) {
> + init_timer(&hose->serr_timer);
> + hose->serr_timer.data = (unsigned long)hose;
> + hose->serr_timer.function = pcibios_enable_serr;
> + }
> +}
> +
> +/*
> + * A simple handler for the regular PCI status errors, called from IRQ
> + * context.
> + */
> +unsigned int pcibios_handle_status_errors(unsigned long addr,
> + unsigned int status,
> + struct pci_channel *hose)
> +{
> + unsigned int cmd = 0;
> +
> + if (status & PCI_STATUS_REC_MASTER_ABORT) {
> + printk(KERN_DEBUG "PCI: master abort, pc=0x%08lx\n", addr);
> + cmd |= PCI_STATUS_REC_MASTER_ABORT;
> + }
> +
> + if (status & PCI_STATUS_REC_TARGET_ABORT) {
> + printk(KERN_DEBUG "PCI: target abort: ");
> + pcibios_report_status(PCI_STATUS_REC_TARGET_ABORT |
> + PCI_STATUS_SIG_TARGET_ABORT |
> + PCI_STATUS_REC_MASTER_ABORT, 1);
> + printk("\n");
> +
> + cmd |= PCI_STATUS_REC_TARGET_ABORT;
> + }
> +
> + if (status & (PCI_STATUS_PARITY | PCI_STATUS_DETECTED_PARITY)) {
> + printk(KERN_DEBUG "PCI: parity error detected: ");
> + pcibios_report_status(PCI_STATUS_PARITY |
> + PCI_STATUS_DETECTED_PARITY, 1);
> + printk("\n");
> +
> + cmd |= PCI_STATUS_PARITY | PCI_STATUS_DETECTED_PARITY;
> +
> + /* Now back off of the IRQ for awhile */
> + if (hose->err_irq) {
> + disable_irq_nosync(hose->err_irq);
> + hose->err_timer.expires = jiffies + HZ;
> + add_timer(&hose->err_timer);
> + }
> + }
> +
> + return cmd;
> +}
> diff --git a/arch/sh/kernel/pci.c b/arch/sh/kernel/pci.c
> new file mode 100644
> index 0000000..9cf0ba4
> --- /dev/null
> +++ b/arch/sh/kernel/pci.c
> @@ -0,0 +1,342 @@
> +/*
> + * New-style PCI core.
> + *
> + * Copyright (c) 2004 - 2009 Paul Mundt
> + * Copyright (c) 2002 M. R. Brown
> + *
> + * Modelled after arch/mips/pci/pci.c:
> + * Copyright (C) 2003, 04 Ralf Baechle (ralf@linux-mips.org)
> + *
> + * This file is subject to the terms and conditions of the GNU General Public
> + * License. See the file "COPYING" in the main directory of this archive
> + * for more details.
> + */
> +#include <linux/kernel.h>
> +#include <linux/mm.h>
> +#include <linux/pci.h>
> +#include <linux/init.h>
> +#include <linux/types.h>
> +#include <linux/dma-debug.h>
> +#include <linux/io.h>
> +#include <linux/mutex.h>
> +#include <linux/spinlock.h>
> +#include <linux/export.h>
> +
> +unsigned long PCIBIOS_MIN_IO = 0x0000;
> +unsigned long PCIBIOS_MIN_MEM = 0;
> +
> +/*
> + * The PCI controller list.
> + */
> +static struct pci_channel *hose_head, **hose_tail = &hose_head;
> +
> +static int pci_initialized;
> +
> +static void pcibios_scanbus(struct pci_channel *hose)
> +{
> + static int next_busno;
> + static int need_domain_info;
> + LIST_HEAD(resources);
> + struct resource *res;
> + resource_size_t offset;
> + int i;
> + struct pci_bus *bus;
> +
> + for (i = 0; i < hose->nr_resources; i++) {
> + res = hose->resources + i;
> + offset = 0;
> + if (res->flags & IORESOURCE_IO)
> + offset = hose->io_offset;
> + else if (res->flags & IORESOURCE_MEM)
> + offset = hose->mem_offset;
> + pci_add_resource_offset(&resources, res, offset);
> + }
> +
> + bus = pci_scan_root_bus(NULL, next_busno, hose->pci_ops, hose,
> + &resources);
> + hose->bus = bus;
> +
> + need_domain_info = need_domain_info || hose->index;
> + hose->need_domain_info = need_domain_info;
> +
> + if (!bus) {
> + pci_free_resource_list(&resources);
> + return;
> + }
> +
> + next_busno = bus->busn_res.end + 1;
> + /* Don't allow 8-bit bus number overflow inside the hose -
> + reserve some space for bridges. */
> + if (next_busno > 224) {
> + next_busno = 0;
> + need_domain_info = 1;
> + }
> +
> + pci_bus_size_bridges(bus);
> + pci_bus_assign_resources(bus);
> + pci_bus_add_devices(bus);
> +}
> +
> +/*
> + * This interrupt-safe spinlock protects all accesses to PCI
> + * configuration space.
> + */
> +DEFINE_RAW_SPINLOCK(pci_config_lock);
> +static DEFINE_MUTEX(pci_scan_mutex);
> +
> +int register_pci_controller(struct pci_channel *hose)
> +{
> + int i;
> +
> + for (i = 0; i < hose->nr_resources; i++) {
> + struct resource *res = hose->resources + i;
> +
> + if (res->flags & IORESOURCE_IO) {
> + if (request_resource(&ioport_resource, res) < 0)
> + goto out;
> + } else {
> + if (request_resource(&iomem_resource, res) < 0)
> + goto out;
> + }
> + }
> +
> + *hose_tail = hose;
> + hose_tail = &hose->next;
> +
> + /*
> + * Do not panic here but later - this might happen before console init.
> + */
> + if (!hose->io_map_base) {
> + printk(KERN_WARNING
> + "registering PCI controller with io_map_base unset\n");
> + }
> +
> + /*
> + * Setup the ERR/PERR and SERR timers, if available.
> + */
> + pcibios_enable_timers(hose);
> +
> + /*
> + * Scan the bus if it is register after the PCI subsystem
> + * initialization.
> + */
> + if (pci_initialized) {
> + mutex_lock(&pci_scan_mutex);
> + pcibios_scanbus(hose);
> + mutex_unlock(&pci_scan_mutex);
> + }
> +
> + return 0;
> +
> +out:
> + for (--i; i >= 0; i--)
> + release_resource(&hose->resources[i]);
> +
> + printk(KERN_WARNING "Skipping PCI bus scan due to resource conflict\n");
> + return -1;
> +}
> +
> +#ifndef CONFIG_SH_DEVICE_TREE
> +static int __init pcibios_init(void)
> +{
> + struct pci_channel *hose;
> +
> + /* Scan all of the recorded PCI controllers. */
> + for (hose = hose_head; hose; hose = hose->next)
> + pcibios_scanbus(hose);
> +
> + pci_fixup_irqs(pci_common_swizzle, pcibios_map_platform_irq);
> +
> + dma_debug_add_bus(&pci_bus_type);
> +
> + pci_initialized = 1;
> +
> + return 0;
> +}
> +subsys_initcall(pcibios_init);
> +#endif
> +
> +/*
> + * Called after each bus is probed, but before its children
> + * are examined.
> + */
> +void pcibios_fixup_bus(struct pci_bus *bus)
> +{
> +}
> +
> +#ifndef CONFIG_SH_DEVICE_TREE
> +/*
> + * We need to avoid collisions with `mirrored' VGA ports
> + * and other strange ISA hardware, so we always want the
> + * addresses to be allocated in the 0x000-0x0ff region
> + * modulo 0x400.
> + */
> +resource_size_t pcibios_align_resource(void *data, const struct resource *res,
> + resource_size_t size, resource_size_t align)
> +{
> + struct pci_dev *dev = data;
> + struct pci_channel *hose = dev->sysdata;
> + resource_size_t start = res->start;
> +
> + if (res->flags & IORESOURCE_IO) {
> + if (start < PCIBIOS_MIN_IO + hose->resources[0].start)
> + start = PCIBIOS_MIN_IO + hose->resources[0].start;
> +
> + /*
> + * Put everything into 0x00-0xff region modulo 0x400.
> + */
> + if (start & 0x300)
> + start = (start + 0x3ff) & ~0x3ff;
> + }
> +
> + return start;
> +}
> +#else
> +typedef resource_size_t (*align_resource_fn)(struct pci_dev *dev,
> + const struct resource *res,
> + resource_size_t start,
> + resource_size_t size,
> + resource_size_t align);
> +
> +resource_size_t pcibios_align_resource(void *data, const struct resource *res,
> + resource_size_t size, resource_size_t align)
> +{
> + resource_size_t start = res->start;
> + struct pci_dev *dev = data;
> + struct pci_config_window *cfg = dev->sysdata;
> + align_resource_fn fn;
> +
> + fn = (align_resource_fn)(cfg->priv);
> + return fn(dev, res, start, size, align);
> +}
> +#endif
> +
> +static void __init
> +pcibios_bus_report_status_early(struct pci_channel *hose,
> + int top_bus, int current_bus,
> + unsigned int status_mask, int warn)
> +{
> + unsigned int pci_devfn;
> + u16 status;
> + int ret;
> +
> + for (pci_devfn = 0; pci_devfn < 0xff; pci_devfn++) {
> + if (PCI_FUNC(pci_devfn))
> + continue;
> + ret = early_read_config_word(hose, top_bus, current_bus,
> + pci_devfn, PCI_STATUS, &status);
> + if (ret != PCIBIOS_SUCCESSFUL)
> + continue;
> + if (status = 0xffff)
> + continue;
> +
> + early_write_config_word(hose, top_bus, current_bus,
> + pci_devfn, PCI_STATUS,
> + status & status_mask);
> + if (warn)
> + printk("(%02x:%02x: %04X) ", current_bus,
> + pci_devfn, status);
> + }
> +}
> +
> +/*
> + * We can't use pci_find_device() here since we are
> + * called from interrupt context.
> + */
> +static void __init_refok
> +pcibios_bus_report_status(struct pci_bus *bus, unsigned int status_mask,
> + int warn)
> +{
> + struct pci_dev *dev;
> +
> + list_for_each_entry(dev, &bus->devices, bus_list) {
> + u16 status;
> +
> + /*
> + * ignore host bridge - we handle
> + * that separately
> + */
> + if (dev->bus->number = 0 && dev->devfn = 0)
> + continue;
> +
> + pci_read_config_word(dev, PCI_STATUS, &status);
> + if (status = 0xffff)
> + continue;
> +
> + if ((status & status_mask) = 0)
> + continue;
> +
> + /* clear the status errors */
> + pci_write_config_word(dev, PCI_STATUS, status & status_mask);
> +
> + if (warn)
> + printk("(%s: %04X) ", pci_name(dev), status);
> + }
> +
> + list_for_each_entry(dev, &bus->devices, bus_list)
> + if (dev->subordinate)
> + pcibios_bus_report_status(dev->subordinate, status_mask, warn);
> +}
> +
> +void __init_refok pcibios_report_status(unsigned int status_mask, int warn)
> +{
> + struct pci_channel *hose;
> +
> + for (hose = hose_head; hose; hose = hose->next) {
> + if (unlikely(!hose->bus))
> + pcibios_bus_report_status_early(hose, hose_head->index,
> + hose->index, status_mask, warn);
> + else
> + pcibios_bus_report_status(hose->bus, status_mask, warn);
> + }
> +}
> +
> +int pci_mmap_page_range(struct pci_dev *dev, struct vm_area_struct *vma,
> + enum pci_mmap_state mmap_state, int write_combine)
> +{
> + /*
> + * I/O space can be accessed via normal processor loads and stores on
> + * this platform but for now we elect not to do this and portable
> + * drivers should not do this anyway.
> + */
> + if (mmap_state = pci_mmap_io)
> + return -EINVAL;
> +
> + /*
> + * Ignore write-combine; for now only return uncached mappings.
> + */
> + vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot);
> +
> + return remap_pfn_range(vma, vma->vm_start, vma->vm_pgoff,
> + vma->vm_end - vma->vm_start,
> + vma->vm_page_prot);
> +}
> +
> +#ifndef CONFIG_GENERIC_IOMAP
> +
> +void __iomem *__pci_ioport_map(struct pci_dev *dev,
> + unsigned long port, unsigned int nr)
> +{
> + struct pci_channel *chan = dev->sysdata;
> +
> + if (unlikely(!chan->io_map_base)) {
> + chan->io_map_base = sh_io_port_base;
> +
> + if (pci_domains_supported)
> + panic("To avoid data corruption io_map_base MUST be "
> + "set with multiple PCI domains.");
> + }
> +
> + return (void __iomem *)(chan->io_map_base + port);
> +}
> +
> +void pci_iounmap(struct pci_dev *dev, void __iomem *addr)
> +{
> + iounmap(addr);
> +}
> +EXPORT_SYMBOL(pci_iounmap);
> +
> +#endif /* CONFIG_GENERIC_IOMAP */
> +
> +EXPORT_SYMBOL(PCIBIOS_MIN_IO);
> +EXPORT_SYMBOL(PCIBIOS_MIN_MEM);
> --
> 2.7.0
>
> --
Is this code specific to particular PCI bus hardware on Renesas SH
systems? If so it probably should be kept as a driver file rather than
in arch/sh/kernel core, but I don't actually see a lot of code that
looks hardware-specific. If there's not actually much or anything
hardware-specific about it, could we perhaps unify it with other PCI
bus support code outside or arch/sh?
Rich
^ permalink raw reply [flat|nested] 138+ messages in thread* Re: [PATCH v5 15/22] sh: Move common PCI stuff to arch/sh/kernel
@ 2016-07-04 1:55 ` Rich Felker
0 siblings, 0 replies; 138+ messages in thread
From: Rich Felker @ 2016-07-04 1:55 UTC (permalink / raw)
To: Yoshinori Sato; +Cc: linux-sh, linux-kernel
On Mon, Jul 04, 2016 at 01:46:35AM +0900, Yoshinori Sato wrote:
> Signed-off-by: Yoshinori Sato <ysato@users.sourceforge.jp>
> ---
> arch/sh/drivers/pci/Makefile | 2 -
> arch/sh/drivers/pci/common.c | 162 --------------------
> arch/sh/drivers/pci/pci.c | 320 ----------------------------------------
> arch/sh/kernel/Makefile | 2 +
> arch/sh/kernel/pci-common.c | 162 ++++++++++++++++++++
> arch/sh/kernel/pci.c | 342 +++++++++++++++++++++++++++++++++++++++++++
> 6 files changed, 506 insertions(+), 484 deletions(-)
> delete mode 100644 arch/sh/drivers/pci/common.c
> delete mode 100644 arch/sh/drivers/pci/pci.c
> create mode 100644 arch/sh/kernel/pci-common.c
> create mode 100644 arch/sh/kernel/pci.c
>
> diff --git a/arch/sh/drivers/pci/Makefile b/arch/sh/drivers/pci/Makefile
> index 82f0a33..fffbede 100644
> --- a/arch/sh/drivers/pci/Makefile
> +++ b/arch/sh/drivers/pci/Makefile
> @@ -1,8 +1,6 @@
> #
> # Makefile for the PCI specific kernel interface routines under Linux.
> #
> -obj-y += common.o pci.o
> -
> obj-$(CONFIG_CPU_SUBTYPE_SH7751) += pci-sh7751.o ops-sh4.o
> obj-$(CONFIG_CPU_SUBTYPE_SH7751R) += pci-sh7751.o ops-sh4.o
> obj-$(CONFIG_CPU_SUBTYPE_SH7763) += pci-sh7780.o ops-sh4.o
> diff --git a/arch/sh/drivers/pci/common.c b/arch/sh/drivers/pci/common.c
> deleted file mode 100644
> index dbf1381..0000000
> --- a/arch/sh/drivers/pci/common.c
> +++ /dev/null
> @@ -1,162 +0,0 @@
> -#include <linux/pci.h>
> -#include <linux/interrupt.h>
> -#include <linux/timer.h>
> -#include <linux/kernel.h>
> -
> -/*
> - * These functions are used early on before PCI scanning is done
> - * and all of the pci_dev and pci_bus structures have been created.
> - */
> -static struct pci_dev *fake_pci_dev(struct pci_channel *hose,
> - int top_bus, int busnr, int devfn)
> -{
> - static struct pci_dev dev;
> - static struct pci_bus bus;
> -
> - dev.bus = &bus;
> - dev.sysdata = hose;
> - dev.devfn = devfn;
> - bus.number = busnr;
> - bus.sysdata = hose;
> - bus.ops = hose->pci_ops;
> -
> - if(busnr != top_bus)
> - /* Fake a parent bus structure. */
> - bus.parent = &bus;
> - else
> - bus.parent = NULL;
> -
> - return &dev;
> -}
> -
> -#define EARLY_PCI_OP(rw, size, type) \
> -int __init early_##rw##_config_##size(struct pci_channel *hose, \
> - int top_bus, int bus, int devfn, int offset, type value) \
> -{ \
> - return pci_##rw##_config_##size( \
> - fake_pci_dev(hose, top_bus, bus, devfn), \
> - offset, value); \
> -}
> -
> -EARLY_PCI_OP(read, byte, u8 *)
> -EARLY_PCI_OP(read, word, u16 *)
> -EARLY_PCI_OP(read, dword, u32 *)
> -EARLY_PCI_OP(write, byte, u8)
> -EARLY_PCI_OP(write, word, u16)
> -EARLY_PCI_OP(write, dword, u32)
> -
> -int __init pci_is_66mhz_capable(struct pci_channel *hose,
> - int top_bus, int current_bus)
> -{
> - u32 pci_devfn;
> - unsigned short vid;
> - int cap66 = -1;
> - u16 stat;
> -
> - printk(KERN_INFO "PCI: Checking 66MHz capabilities...\n");
> -
> - for (pci_devfn = 0; pci_devfn < 0xff; pci_devfn++) {
> - if (PCI_FUNC(pci_devfn))
> - continue;
> - if (early_read_config_word(hose, top_bus, current_bus,
> - pci_devfn, PCI_VENDOR_ID, &vid) !=
> - PCIBIOS_SUCCESSFUL)
> - continue;
> - if (vid == 0xffff)
> - continue;
> -
> - /* check 66MHz capability */
> - if (cap66 < 0)
> - cap66 = 1;
> - if (cap66) {
> - early_read_config_word(hose, top_bus, current_bus,
> - pci_devfn, PCI_STATUS, &stat);
> - if (!(stat & PCI_STATUS_66MHZ)) {
> - printk(KERN_DEBUG
> - "PCI: %02x:%02x not 66MHz capable.\n",
> - current_bus, pci_devfn);
> - cap66 = 0;
> - break;
> - }
> - }
> - }
> -
> - return cap66 > 0;
> -}
> -
> -static void pcibios_enable_err(unsigned long __data)
> -{
> - struct pci_channel *hose = (struct pci_channel *)__data;
> -
> - del_timer(&hose->err_timer);
> - printk(KERN_DEBUG "PCI: re-enabling error IRQ.\n");
> - enable_irq(hose->err_irq);
> -}
> -
> -static void pcibios_enable_serr(unsigned long __data)
> -{
> - struct pci_channel *hose = (struct pci_channel *)__data;
> -
> - del_timer(&hose->serr_timer);
> - printk(KERN_DEBUG "PCI: re-enabling system error IRQ.\n");
> - enable_irq(hose->serr_irq);
> -}
> -
> -void pcibios_enable_timers(struct pci_channel *hose)
> -{
> - if (hose->err_irq) {
> - init_timer(&hose->err_timer);
> - hose->err_timer.data = (unsigned long)hose;
> - hose->err_timer.function = pcibios_enable_err;
> - }
> -
> - if (hose->serr_irq) {
> - init_timer(&hose->serr_timer);
> - hose->serr_timer.data = (unsigned long)hose;
> - hose->serr_timer.function = pcibios_enable_serr;
> - }
> -}
> -
> -/*
> - * A simple handler for the regular PCI status errors, called from IRQ
> - * context.
> - */
> -unsigned int pcibios_handle_status_errors(unsigned long addr,
> - unsigned int status,
> - struct pci_channel *hose)
> -{
> - unsigned int cmd = 0;
> -
> - if (status & PCI_STATUS_REC_MASTER_ABORT) {
> - printk(KERN_DEBUG "PCI: master abort, pc=0x%08lx\n", addr);
> - cmd |= PCI_STATUS_REC_MASTER_ABORT;
> - }
> -
> - if (status & PCI_STATUS_REC_TARGET_ABORT) {
> - printk(KERN_DEBUG "PCI: target abort: ");
> - pcibios_report_status(PCI_STATUS_REC_TARGET_ABORT |
> - PCI_STATUS_SIG_TARGET_ABORT |
> - PCI_STATUS_REC_MASTER_ABORT, 1);
> - printk("\n");
> -
> - cmd |= PCI_STATUS_REC_TARGET_ABORT;
> - }
> -
> - if (status & (PCI_STATUS_PARITY | PCI_STATUS_DETECTED_PARITY)) {
> - printk(KERN_DEBUG "PCI: parity error detected: ");
> - pcibios_report_status(PCI_STATUS_PARITY |
> - PCI_STATUS_DETECTED_PARITY, 1);
> - printk("\n");
> -
> - cmd |= PCI_STATUS_PARITY | PCI_STATUS_DETECTED_PARITY;
> -
> - /* Now back off of the IRQ for awhile */
> - if (hose->err_irq) {
> - disable_irq_nosync(hose->err_irq);
> - hose->err_timer.expires = jiffies + HZ;
> - add_timer(&hose->err_timer);
> - }
> - }
> -
> - return cmd;
> -}
> diff --git a/arch/sh/drivers/pci/pci.c b/arch/sh/drivers/pci/pci.c
> deleted file mode 100644
> index d5462b7..0000000
> --- a/arch/sh/drivers/pci/pci.c
> +++ /dev/null
> @@ -1,320 +0,0 @@
> -/*
> - * New-style PCI core.
> - *
> - * Copyright (c) 2004 - 2009 Paul Mundt
> - * Copyright (c) 2002 M. R. Brown
> - *
> - * Modelled after arch/mips/pci/pci.c:
> - * Copyright (C) 2003, 04 Ralf Baechle (ralf@linux-mips.org)
> - *
> - * This file is subject to the terms and conditions of the GNU General Public
> - * License. See the file "COPYING" in the main directory of this archive
> - * for more details.
> - */
> -#include <linux/kernel.h>
> -#include <linux/mm.h>
> -#include <linux/pci.h>
> -#include <linux/init.h>
> -#include <linux/types.h>
> -#include <linux/dma-debug.h>
> -#include <linux/io.h>
> -#include <linux/mutex.h>
> -#include <linux/spinlock.h>
> -#include <linux/export.h>
> -
> -unsigned long PCIBIOS_MIN_IO = 0x0000;
> -unsigned long PCIBIOS_MIN_MEM = 0;
> -
> -/*
> - * The PCI controller list.
> - */
> -static struct pci_channel *hose_head, **hose_tail = &hose_head;
> -
> -static int pci_initialized;
> -
> -static void pcibios_scanbus(struct pci_channel *hose)
> -{
> - static int next_busno;
> - static int need_domain_info;
> - LIST_HEAD(resources);
> - struct resource *res;
> - resource_size_t offset;
> - int i;
> - struct pci_bus *bus;
> -
> - for (i = 0; i < hose->nr_resources; i++) {
> - res = hose->resources + i;
> - offset = 0;
> - if (res->flags & IORESOURCE_IO)
> - offset = hose->io_offset;
> - else if (res->flags & IORESOURCE_MEM)
> - offset = hose->mem_offset;
> - pci_add_resource_offset(&resources, res, offset);
> - }
> -
> - bus = pci_scan_root_bus(NULL, next_busno, hose->pci_ops, hose,
> - &resources);
> - hose->bus = bus;
> -
> - need_domain_info = need_domain_info || hose->index;
> - hose->need_domain_info = need_domain_info;
> -
> - if (!bus) {
> - pci_free_resource_list(&resources);
> - return;
> - }
> -
> - next_busno = bus->busn_res.end + 1;
> - /* Don't allow 8-bit bus number overflow inside the hose -
> - reserve some space for bridges. */
> - if (next_busno > 224) {
> - next_busno = 0;
> - need_domain_info = 1;
> - }
> -
> - pci_bus_size_bridges(bus);
> - pci_bus_assign_resources(bus);
> - pci_bus_add_devices(bus);
> -}
> -
> -/*
> - * This interrupt-safe spinlock protects all accesses to PCI
> - * configuration space.
> - */
> -DEFINE_RAW_SPINLOCK(pci_config_lock);
> -static DEFINE_MUTEX(pci_scan_mutex);
> -
> -int register_pci_controller(struct pci_channel *hose)
> -{
> - int i;
> -
> - for (i = 0; i < hose->nr_resources; i++) {
> - struct resource *res = hose->resources + i;
> -
> - if (res->flags & IORESOURCE_IO) {
> - if (request_resource(&ioport_resource, res) < 0)
> - goto out;
> - } else {
> - if (request_resource(&iomem_resource, res) < 0)
> - goto out;
> - }
> - }
> -
> - *hose_tail = hose;
> - hose_tail = &hose->next;
> -
> - /*
> - * Do not panic here but later - this might happen before console init.
> - */
> - if (!hose->io_map_base) {
> - printk(KERN_WARNING
> - "registering PCI controller with io_map_base unset\n");
> - }
> -
> - /*
> - * Setup the ERR/PERR and SERR timers, if available.
> - */
> - pcibios_enable_timers(hose);
> -
> - /*
> - * Scan the bus if it is register after the PCI subsystem
> - * initialization.
> - */
> - if (pci_initialized) {
> - mutex_lock(&pci_scan_mutex);
> - pcibios_scanbus(hose);
> - mutex_unlock(&pci_scan_mutex);
> - }
> -
> - return 0;
> -
> -out:
> - for (--i; i >= 0; i--)
> - release_resource(&hose->resources[i]);
> -
> - printk(KERN_WARNING "Skipping PCI bus scan due to resource conflict\n");
> - return -1;
> -}
> -
> -static int __init pcibios_init(void)
> -{
> - struct pci_channel *hose;
> -
> - /* Scan all of the recorded PCI controllers. */
> - for (hose = hose_head; hose; hose = hose->next)
> - pcibios_scanbus(hose);
> -
> - pci_fixup_irqs(pci_common_swizzle, pcibios_map_platform_irq);
> -
> - dma_debug_add_bus(&pci_bus_type);
> -
> - pci_initialized = 1;
> -
> - return 0;
> -}
> -subsys_initcall(pcibios_init);
> -
> -/*
> - * Called after each bus is probed, but before its children
> - * are examined.
> - */
> -void pcibios_fixup_bus(struct pci_bus *bus)
> -{
> -}
> -
> -/*
> - * We need to avoid collisions with `mirrored' VGA ports
> - * and other strange ISA hardware, so we always want the
> - * addresses to be allocated in the 0x000-0x0ff region
> - * modulo 0x400.
> - */
> -resource_size_t pcibios_align_resource(void *data, const struct resource *res,
> - resource_size_t size, resource_size_t align)
> -{
> - struct pci_dev *dev = data;
> - struct pci_channel *hose = dev->sysdata;
> - resource_size_t start = res->start;
> -
> - if (res->flags & IORESOURCE_IO) {
> - if (start < PCIBIOS_MIN_IO + hose->resources[0].start)
> - start = PCIBIOS_MIN_IO + hose->resources[0].start;
> -
> - /*
> - * Put everything into 0x00-0xff region modulo 0x400.
> - */
> - if (start & 0x300)
> - start = (start + 0x3ff) & ~0x3ff;
> - }
> -
> - return start;
> -}
> -
> -static void __init
> -pcibios_bus_report_status_early(struct pci_channel *hose,
> - int top_bus, int current_bus,
> - unsigned int status_mask, int warn)
> -{
> - unsigned int pci_devfn;
> - u16 status;
> - int ret;
> -
> - for (pci_devfn = 0; pci_devfn < 0xff; pci_devfn++) {
> - if (PCI_FUNC(pci_devfn))
> - continue;
> - ret = early_read_config_word(hose, top_bus, current_bus,
> - pci_devfn, PCI_STATUS, &status);
> - if (ret != PCIBIOS_SUCCESSFUL)
> - continue;
> - if (status == 0xffff)
> - continue;
> -
> - early_write_config_word(hose, top_bus, current_bus,
> - pci_devfn, PCI_STATUS,
> - status & status_mask);
> - if (warn)
> - printk("(%02x:%02x: %04X) ", current_bus,
> - pci_devfn, status);
> - }
> -}
> -
> -/*
> - * We can't use pci_find_device() here since we are
> - * called from interrupt context.
> - */
> -static void __init_refok
> -pcibios_bus_report_status(struct pci_bus *bus, unsigned int status_mask,
> - int warn)
> -{
> - struct pci_dev *dev;
> -
> - list_for_each_entry(dev, &bus->devices, bus_list) {
> - u16 status;
> -
> - /*
> - * ignore host bridge - we handle
> - * that separately
> - */
> - if (dev->bus->number == 0 && dev->devfn == 0)
> - continue;
> -
> - pci_read_config_word(dev, PCI_STATUS, &status);
> - if (status == 0xffff)
> - continue;
> -
> - if ((status & status_mask) == 0)
> - continue;
> -
> - /* clear the status errors */
> - pci_write_config_word(dev, PCI_STATUS, status & status_mask);
> -
> - if (warn)
> - printk("(%s: %04X) ", pci_name(dev), status);
> - }
> -
> - list_for_each_entry(dev, &bus->devices, bus_list)
> - if (dev->subordinate)
> - pcibios_bus_report_status(dev->subordinate, status_mask, warn);
> -}
> -
> -void __init_refok pcibios_report_status(unsigned int status_mask, int warn)
> -{
> - struct pci_channel *hose;
> -
> - for (hose = hose_head; hose; hose = hose->next) {
> - if (unlikely(!hose->bus))
> - pcibios_bus_report_status_early(hose, hose_head->index,
> - hose->index, status_mask, warn);
> - else
> - pcibios_bus_report_status(hose->bus, status_mask, warn);
> - }
> -}
> -
> -int pci_mmap_page_range(struct pci_dev *dev, struct vm_area_struct *vma,
> - enum pci_mmap_state mmap_state, int write_combine)
> -{
> - /*
> - * I/O space can be accessed via normal processor loads and stores on
> - * this platform but for now we elect not to do this and portable
> - * drivers should not do this anyway.
> - */
> - if (mmap_state == pci_mmap_io)
> - return -EINVAL;
> -
> - /*
> - * Ignore write-combine; for now only return uncached mappings.
> - */
> - vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot);
> -
> - return remap_pfn_range(vma, vma->vm_start, vma->vm_pgoff,
> - vma->vm_end - vma->vm_start,
> - vma->vm_page_prot);
> -}
> -
> -#ifndef CONFIG_GENERIC_IOMAP
> -
> -void __iomem *__pci_ioport_map(struct pci_dev *dev,
> - unsigned long port, unsigned int nr)
> -{
> - struct pci_channel *chan = dev->sysdata;
> -
> - if (unlikely(!chan->io_map_base)) {
> - chan->io_map_base = sh_io_port_base;
> -
> - if (pci_domains_supported)
> - panic("To avoid data corruption io_map_base MUST be "
> - "set with multiple PCI domains.");
> - }
> -
> - return (void __iomem *)(chan->io_map_base + port);
> -}
> -
> -void pci_iounmap(struct pci_dev *dev, void __iomem *addr)
> -{
> - iounmap(addr);
> -}
> -EXPORT_SYMBOL(pci_iounmap);
> -
> -#endif /* CONFIG_GENERIC_IOMAP */
> -
> -EXPORT_SYMBOL(PCIBIOS_MIN_IO);
> -EXPORT_SYMBOL(PCIBIOS_MIN_MEM);
> diff --git a/arch/sh/kernel/Makefile b/arch/sh/kernel/Makefile
> index 09040fd..a9a54c2 100644
> --- a/arch/sh/kernel/Makefile
> +++ b/arch/sh/kernel/Makefile
> @@ -46,5 +46,7 @@ obj-$(CONFIG_DWARF_UNWINDER) += dwarf.o
> obj-$(CONFIG_PERF_EVENTS) += perf_event.o perf_callchain.o
>
> obj-$(CONFIG_HAVE_HW_BREAKPOINT) += hw_breakpoint.o
> +obj-$(CONFIG_PCI) += pci.o pci-common.o
>
> ccflags-y := -Werror
> +CFLAGS_pci.o := -O0
> diff --git a/arch/sh/kernel/pci-common.c b/arch/sh/kernel/pci-common.c
> new file mode 100644
> index 0000000..dbf1381
> --- /dev/null
> +++ b/arch/sh/kernel/pci-common.c
> @@ -0,0 +1,162 @@
> +#include <linux/pci.h>
> +#include <linux/interrupt.h>
> +#include <linux/timer.h>
> +#include <linux/kernel.h>
> +
> +/*
> + * These functions are used early on before PCI scanning is done
> + * and all of the pci_dev and pci_bus structures have been created.
> + */
> +static struct pci_dev *fake_pci_dev(struct pci_channel *hose,
> + int top_bus, int busnr, int devfn)
> +{
> + static struct pci_dev dev;
> + static struct pci_bus bus;
> +
> + dev.bus = &bus;
> + dev.sysdata = hose;
> + dev.devfn = devfn;
> + bus.number = busnr;
> + bus.sysdata = hose;
> + bus.ops = hose->pci_ops;
> +
> + if(busnr != top_bus)
> + /* Fake a parent bus structure. */
> + bus.parent = &bus;
> + else
> + bus.parent = NULL;
> +
> + return &dev;
> +}
> +
> +#define EARLY_PCI_OP(rw, size, type) \
> +int __init early_##rw##_config_##size(struct pci_channel *hose, \
> + int top_bus, int bus, int devfn, int offset, type value) \
> +{ \
> + return pci_##rw##_config_##size( \
> + fake_pci_dev(hose, top_bus, bus, devfn), \
> + offset, value); \
> +}
> +
> +EARLY_PCI_OP(read, byte, u8 *)
> +EARLY_PCI_OP(read, word, u16 *)
> +EARLY_PCI_OP(read, dword, u32 *)
> +EARLY_PCI_OP(write, byte, u8)
> +EARLY_PCI_OP(write, word, u16)
> +EARLY_PCI_OP(write, dword, u32)
> +
> +int __init pci_is_66mhz_capable(struct pci_channel *hose,
> + int top_bus, int current_bus)
> +{
> + u32 pci_devfn;
> + unsigned short vid;
> + int cap66 = -1;
> + u16 stat;
> +
> + printk(KERN_INFO "PCI: Checking 66MHz capabilities...\n");
> +
> + for (pci_devfn = 0; pci_devfn < 0xff; pci_devfn++) {
> + if (PCI_FUNC(pci_devfn))
> + continue;
> + if (early_read_config_word(hose, top_bus, current_bus,
> + pci_devfn, PCI_VENDOR_ID, &vid) !=
> + PCIBIOS_SUCCESSFUL)
> + continue;
> + if (vid == 0xffff)
> + continue;
> +
> + /* check 66MHz capability */
> + if (cap66 < 0)
> + cap66 = 1;
> + if (cap66) {
> + early_read_config_word(hose, top_bus, current_bus,
> + pci_devfn, PCI_STATUS, &stat);
> + if (!(stat & PCI_STATUS_66MHZ)) {
> + printk(KERN_DEBUG
> + "PCI: %02x:%02x not 66MHz capable.\n",
> + current_bus, pci_devfn);
> + cap66 = 0;
> + break;
> + }
> + }
> + }
> +
> + return cap66 > 0;
> +}
> +
> +static void pcibios_enable_err(unsigned long __data)
> +{
> + struct pci_channel *hose = (struct pci_channel *)__data;
> +
> + del_timer(&hose->err_timer);
> + printk(KERN_DEBUG "PCI: re-enabling error IRQ.\n");
> + enable_irq(hose->err_irq);
> +}
> +
> +static void pcibios_enable_serr(unsigned long __data)
> +{
> + struct pci_channel *hose = (struct pci_channel *)__data;
> +
> + del_timer(&hose->serr_timer);
> + printk(KERN_DEBUG "PCI: re-enabling system error IRQ.\n");
> + enable_irq(hose->serr_irq);
> +}
> +
> +void pcibios_enable_timers(struct pci_channel *hose)
> +{
> + if (hose->err_irq) {
> + init_timer(&hose->err_timer);
> + hose->err_timer.data = (unsigned long)hose;
> + hose->err_timer.function = pcibios_enable_err;
> + }
> +
> + if (hose->serr_irq) {
> + init_timer(&hose->serr_timer);
> + hose->serr_timer.data = (unsigned long)hose;
> + hose->serr_timer.function = pcibios_enable_serr;
> + }
> +}
> +
> +/*
> + * A simple handler for the regular PCI status errors, called from IRQ
> + * context.
> + */
> +unsigned int pcibios_handle_status_errors(unsigned long addr,
> + unsigned int status,
> + struct pci_channel *hose)
> +{
> + unsigned int cmd = 0;
> +
> + if (status & PCI_STATUS_REC_MASTER_ABORT) {
> + printk(KERN_DEBUG "PCI: master abort, pc=0x%08lx\n", addr);
> + cmd |= PCI_STATUS_REC_MASTER_ABORT;
> + }
> +
> + if (status & PCI_STATUS_REC_TARGET_ABORT) {
> + printk(KERN_DEBUG "PCI: target abort: ");
> + pcibios_report_status(PCI_STATUS_REC_TARGET_ABORT |
> + PCI_STATUS_SIG_TARGET_ABORT |
> + PCI_STATUS_REC_MASTER_ABORT, 1);
> + printk("\n");
> +
> + cmd |= PCI_STATUS_REC_TARGET_ABORT;
> + }
> +
> + if (status & (PCI_STATUS_PARITY | PCI_STATUS_DETECTED_PARITY)) {
> + printk(KERN_DEBUG "PCI: parity error detected: ");
> + pcibios_report_status(PCI_STATUS_PARITY |
> + PCI_STATUS_DETECTED_PARITY, 1);
> + printk("\n");
> +
> + cmd |= PCI_STATUS_PARITY | PCI_STATUS_DETECTED_PARITY;
> +
> + /* Now back off of the IRQ for awhile */
> + if (hose->err_irq) {
> + disable_irq_nosync(hose->err_irq);
> + hose->err_timer.expires = jiffies + HZ;
> + add_timer(&hose->err_timer);
> + }
> + }
> +
> + return cmd;
> +}
> diff --git a/arch/sh/kernel/pci.c b/arch/sh/kernel/pci.c
> new file mode 100644
> index 0000000..9cf0ba4
> --- /dev/null
> +++ b/arch/sh/kernel/pci.c
> @@ -0,0 +1,342 @@
> +/*
> + * New-style PCI core.
> + *
> + * Copyright (c) 2004 - 2009 Paul Mundt
> + * Copyright (c) 2002 M. R. Brown
> + *
> + * Modelled after arch/mips/pci/pci.c:
> + * Copyright (C) 2003, 04 Ralf Baechle (ralf@linux-mips.org)
> + *
> + * This file is subject to the terms and conditions of the GNU General Public
> + * License. See the file "COPYING" in the main directory of this archive
> + * for more details.
> + */
> +#include <linux/kernel.h>
> +#include <linux/mm.h>
> +#include <linux/pci.h>
> +#include <linux/init.h>
> +#include <linux/types.h>
> +#include <linux/dma-debug.h>
> +#include <linux/io.h>
> +#include <linux/mutex.h>
> +#include <linux/spinlock.h>
> +#include <linux/export.h>
> +
> +unsigned long PCIBIOS_MIN_IO = 0x0000;
> +unsigned long PCIBIOS_MIN_MEM = 0;
> +
> +/*
> + * The PCI controller list.
> + */
> +static struct pci_channel *hose_head, **hose_tail = &hose_head;
> +
> +static int pci_initialized;
> +
> +static void pcibios_scanbus(struct pci_channel *hose)
> +{
> + static int next_busno;
> + static int need_domain_info;
> + LIST_HEAD(resources);
> + struct resource *res;
> + resource_size_t offset;
> + int i;
> + struct pci_bus *bus;
> +
> + for (i = 0; i < hose->nr_resources; i++) {
> + res = hose->resources + i;
> + offset = 0;
> + if (res->flags & IORESOURCE_IO)
> + offset = hose->io_offset;
> + else if (res->flags & IORESOURCE_MEM)
> + offset = hose->mem_offset;
> + pci_add_resource_offset(&resources, res, offset);
> + }
> +
> + bus = pci_scan_root_bus(NULL, next_busno, hose->pci_ops, hose,
> + &resources);
> + hose->bus = bus;
> +
> + need_domain_info = need_domain_info || hose->index;
> + hose->need_domain_info = need_domain_info;
> +
> + if (!bus) {
> + pci_free_resource_list(&resources);
> + return;
> + }
> +
> + next_busno = bus->busn_res.end + 1;
> + /* Don't allow 8-bit bus number overflow inside the hose -
> + reserve some space for bridges. */
> + if (next_busno > 224) {
> + next_busno = 0;
> + need_domain_info = 1;
> + }
> +
> + pci_bus_size_bridges(bus);
> + pci_bus_assign_resources(bus);
> + pci_bus_add_devices(bus);
> +}
> +
> +/*
> + * This interrupt-safe spinlock protects all accesses to PCI
> + * configuration space.
> + */
> +DEFINE_RAW_SPINLOCK(pci_config_lock);
> +static DEFINE_MUTEX(pci_scan_mutex);
> +
> +int register_pci_controller(struct pci_channel *hose)
> +{
> + int i;
> +
> + for (i = 0; i < hose->nr_resources; i++) {
> + struct resource *res = hose->resources + i;
> +
> + if (res->flags & IORESOURCE_IO) {
> + if (request_resource(&ioport_resource, res) < 0)
> + goto out;
> + } else {
> + if (request_resource(&iomem_resource, res) < 0)
> + goto out;
> + }
> + }
> +
> + *hose_tail = hose;
> + hose_tail = &hose->next;
> +
> + /*
> + * Do not panic here but later - this might happen before console init.
> + */
> + if (!hose->io_map_base) {
> + printk(KERN_WARNING
> + "registering PCI controller with io_map_base unset\n");
> + }
> +
> + /*
> + * Setup the ERR/PERR and SERR timers, if available.
> + */
> + pcibios_enable_timers(hose);
> +
> + /*
> + * Scan the bus if it is register after the PCI subsystem
> + * initialization.
> + */
> + if (pci_initialized) {
> + mutex_lock(&pci_scan_mutex);
> + pcibios_scanbus(hose);
> + mutex_unlock(&pci_scan_mutex);
> + }
> +
> + return 0;
> +
> +out:
> + for (--i; i >= 0; i--)
> + release_resource(&hose->resources[i]);
> +
> + printk(KERN_WARNING "Skipping PCI bus scan due to resource conflict\n");
> + return -1;
> +}
> +
> +#ifndef CONFIG_SH_DEVICE_TREE
> +static int __init pcibios_init(void)
> +{
> + struct pci_channel *hose;
> +
> + /* Scan all of the recorded PCI controllers. */
> + for (hose = hose_head; hose; hose = hose->next)
> + pcibios_scanbus(hose);
> +
> + pci_fixup_irqs(pci_common_swizzle, pcibios_map_platform_irq);
> +
> + dma_debug_add_bus(&pci_bus_type);
> +
> + pci_initialized = 1;
> +
> + return 0;
> +}
> +subsys_initcall(pcibios_init);
> +#endif
> +
> +/*
> + * Called after each bus is probed, but before its children
> + * are examined.
> + */
> +void pcibios_fixup_bus(struct pci_bus *bus)
> +{
> +}
> +
> +#ifndef CONFIG_SH_DEVICE_TREE
> +/*
> + * We need to avoid collisions with `mirrored' VGA ports
> + * and other strange ISA hardware, so we always want the
> + * addresses to be allocated in the 0x000-0x0ff region
> + * modulo 0x400.
> + */
> +resource_size_t pcibios_align_resource(void *data, const struct resource *res,
> + resource_size_t size, resource_size_t align)
> +{
> + struct pci_dev *dev = data;
> + struct pci_channel *hose = dev->sysdata;
> + resource_size_t start = res->start;
> +
> + if (res->flags & IORESOURCE_IO) {
> + if (start < PCIBIOS_MIN_IO + hose->resources[0].start)
> + start = PCIBIOS_MIN_IO + hose->resources[0].start;
> +
> + /*
> + * Put everything into 0x00-0xff region modulo 0x400.
> + */
> + if (start & 0x300)
> + start = (start + 0x3ff) & ~0x3ff;
> + }
> +
> + return start;
> +}
> +#else
> +typedef resource_size_t (*align_resource_fn)(struct pci_dev *dev,
> + const struct resource *res,
> + resource_size_t start,
> + resource_size_t size,
> + resource_size_t align);
> +
> +resource_size_t pcibios_align_resource(void *data, const struct resource *res,
> + resource_size_t size, resource_size_t align)
> +{
> + resource_size_t start = res->start;
> + struct pci_dev *dev = data;
> + struct pci_config_window *cfg = dev->sysdata;
> + align_resource_fn fn;
> +
> + fn = (align_resource_fn)(cfg->priv);
> + return fn(dev, res, start, size, align);
> +}
> +#endif
> +
> +static void __init
> +pcibios_bus_report_status_early(struct pci_channel *hose,
> + int top_bus, int current_bus,
> + unsigned int status_mask, int warn)
> +{
> + unsigned int pci_devfn;
> + u16 status;
> + int ret;
> +
> + for (pci_devfn = 0; pci_devfn < 0xff; pci_devfn++) {
> + if (PCI_FUNC(pci_devfn))
> + continue;
> + ret = early_read_config_word(hose, top_bus, current_bus,
> + pci_devfn, PCI_STATUS, &status);
> + if (ret != PCIBIOS_SUCCESSFUL)
> + continue;
> + if (status == 0xffff)
> + continue;
> +
> + early_write_config_word(hose, top_bus, current_bus,
> + pci_devfn, PCI_STATUS,
> + status & status_mask);
> + if (warn)
> + printk("(%02x:%02x: %04X) ", current_bus,
> + pci_devfn, status);
> + }
> +}
> +
> +/*
> + * We can't use pci_find_device() here since we are
> + * called from interrupt context.
> + */
> +static void __init_refok
> +pcibios_bus_report_status(struct pci_bus *bus, unsigned int status_mask,
> + int warn)
> +{
> + struct pci_dev *dev;
> +
> + list_for_each_entry(dev, &bus->devices, bus_list) {
> + u16 status;
> +
> + /*
> + * ignore host bridge - we handle
> + * that separately
> + */
> + if (dev->bus->number == 0 && dev->devfn == 0)
> + continue;
> +
> + pci_read_config_word(dev, PCI_STATUS, &status);
> + if (status == 0xffff)
> + continue;
> +
> + if ((status & status_mask) == 0)
> + continue;
> +
> + /* clear the status errors */
> + pci_write_config_word(dev, PCI_STATUS, status & status_mask);
> +
> + if (warn)
> + printk("(%s: %04X) ", pci_name(dev), status);
> + }
> +
> + list_for_each_entry(dev, &bus->devices, bus_list)
> + if (dev->subordinate)
> + pcibios_bus_report_status(dev->subordinate, status_mask, warn);
> +}
> +
> +void __init_refok pcibios_report_status(unsigned int status_mask, int warn)
> +{
> + struct pci_channel *hose;
> +
> + for (hose = hose_head; hose; hose = hose->next) {
> + if (unlikely(!hose->bus))
> + pcibios_bus_report_status_early(hose, hose_head->index,
> + hose->index, status_mask, warn);
> + else
> + pcibios_bus_report_status(hose->bus, status_mask, warn);
> + }
> +}
> +
> +int pci_mmap_page_range(struct pci_dev *dev, struct vm_area_struct *vma,
> + enum pci_mmap_state mmap_state, int write_combine)
> +{
> + /*
> + * I/O space can be accessed via normal processor loads and stores on
> + * this platform but for now we elect not to do this and portable
> + * drivers should not do this anyway.
> + */
> + if (mmap_state == pci_mmap_io)
> + return -EINVAL;
> +
> + /*
> + * Ignore write-combine; for now only return uncached mappings.
> + */
> + vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot);
> +
> + return remap_pfn_range(vma, vma->vm_start, vma->vm_pgoff,
> + vma->vm_end - vma->vm_start,
> + vma->vm_page_prot);
> +}
> +
> +#ifndef CONFIG_GENERIC_IOMAP
> +
> +void __iomem *__pci_ioport_map(struct pci_dev *dev,
> + unsigned long port, unsigned int nr)
> +{
> + struct pci_channel *chan = dev->sysdata;
> +
> + if (unlikely(!chan->io_map_base)) {
> + chan->io_map_base = sh_io_port_base;
> +
> + if (pci_domains_supported)
> + panic("To avoid data corruption io_map_base MUST be "
> + "set with multiple PCI domains.");
> + }
> +
> + return (void __iomem *)(chan->io_map_base + port);
> +}
> +
> +void pci_iounmap(struct pci_dev *dev, void __iomem *addr)
> +{
> + iounmap(addr);
> +}
> +EXPORT_SYMBOL(pci_iounmap);
> +
> +#endif /* CONFIG_GENERIC_IOMAP */
> +
> +EXPORT_SYMBOL(PCIBIOS_MIN_IO);
> +EXPORT_SYMBOL(PCIBIOS_MIN_MEM);
> --
> 2.7.0
>
> --
Is this code specific to particular PCI bus hardware on Renesas SH
systems? If so it probably should be kept as a driver file rather than
in arch/sh/kernel core, but I don't actually see a lot of code that
looks hardware-specific. If there's not actually much or anything
hardware-specific about it, could we perhaps unify it with other PCI
bus support code outside or arch/sh?
Rich
^ permalink raw reply [flat|nested] 138+ messages in thread* Re: [PATCH v5 15/22] sh: Move common PCI stuff to arch/sh/kernel
2016-07-04 1:55 ` Rich Felker
@ 2016-07-06 16:17 ` Yoshinori Sato
-1 siblings, 0 replies; 138+ messages in thread
From: Yoshinori Sato @ 2016-07-06 16:17 UTC (permalink / raw)
To: Rich Felker; +Cc: linux-sh, linux-kernel
On Mon, 04 Jul 2016 10:55:12 +0900,
Rich Felker wrote:
>
> On Mon, Jul 04, 2016 at 01:46:35AM +0900, Yoshinori Sato wrote:
> > Signed-off-by: Yoshinori Sato <ysato@users.sourceforge.jp>
> > ---
> > arch/sh/drivers/pci/Makefile | 2 -
> > arch/sh/drivers/pci/common.c | 162 --------------------
> > arch/sh/drivers/pci/pci.c | 320 ----------------------------------------
> > arch/sh/kernel/Makefile | 2 +
> > arch/sh/kernel/pci-common.c | 162 ++++++++++++++++++++
> > arch/sh/kernel/pci.c | 342 +++++++++++++++++++++++++++++++++++++++++++
> > 6 files changed, 506 insertions(+), 484 deletions(-)
> > delete mode 100644 arch/sh/drivers/pci/common.c
> > delete mode 100644 arch/sh/drivers/pci/pci.c
> > create mode 100644 arch/sh/kernel/pci-common.c
> > create mode 100644 arch/sh/kernel/pci.c
> >
> > diff --git a/arch/sh/drivers/pci/Makefile b/arch/sh/drivers/pci/Makefile
> > index 82f0a33..fffbede 100644
> > --- a/arch/sh/drivers/pci/Makefile
> > +++ b/arch/sh/drivers/pci/Makefile
> > @@ -1,8 +1,6 @@
> > #
> > # Makefile for the PCI specific kernel interface routines under Linux.
> > #
> > -obj-y += common.o pci.o
> > -
> > obj-$(CONFIG_CPU_SUBTYPE_SH7751) += pci-sh7751.o ops-sh4.o
> > obj-$(CONFIG_CPU_SUBTYPE_SH7751R) += pci-sh7751.o ops-sh4.o
> > obj-$(CONFIG_CPU_SUBTYPE_SH7763) += pci-sh7780.o ops-sh4.o
> > diff --git a/arch/sh/drivers/pci/common.c b/arch/sh/drivers/pci/common.c
> > deleted file mode 100644
> > index dbf1381..0000000
> > --- a/arch/sh/drivers/pci/common.c
> > +++ /dev/null
> > @@ -1,162 +0,0 @@
> > -#include <linux/pci.h>
> > -#include <linux/interrupt.h>
> > -#include <linux/timer.h>
> > -#include <linux/kernel.h>
> > -
> > -/*
> > - * These functions are used early on before PCI scanning is done
> > - * and all of the pci_dev and pci_bus structures have been created.
> > - */
> > -static struct pci_dev *fake_pci_dev(struct pci_channel *hose,
> > - int top_bus, int busnr, int devfn)
> > -{
> > - static struct pci_dev dev;
> > - static struct pci_bus bus;
> > -
> > - dev.bus = &bus;
> > - dev.sysdata = hose;
> > - dev.devfn = devfn;
> > - bus.number = busnr;
> > - bus.sysdata = hose;
> > - bus.ops = hose->pci_ops;
> > -
> > - if(busnr != top_bus)
> > - /* Fake a parent bus structure. */
> > - bus.parent = &bus;
> > - else
> > - bus.parent = NULL;
> > -
> > - return &dev;
> > -}
> > -
> > -#define EARLY_PCI_OP(rw, size, type) \
> > -int __init early_##rw##_config_##size(struct pci_channel *hose, \
> > - int top_bus, int bus, int devfn, int offset, type value) \
> > -{ \
> > - return pci_##rw##_config_##size( \
> > - fake_pci_dev(hose, top_bus, bus, devfn), \
> > - offset, value); \
> > -}
> > -
> > -EARLY_PCI_OP(read, byte, u8 *)
> > -EARLY_PCI_OP(read, word, u16 *)
> > -EARLY_PCI_OP(read, dword, u32 *)
> > -EARLY_PCI_OP(write, byte, u8)
> > -EARLY_PCI_OP(write, word, u16)
> > -EARLY_PCI_OP(write, dword, u32)
> > -
> > -int __init pci_is_66mhz_capable(struct pci_channel *hose,
> > - int top_bus, int current_bus)
> > -{
> > - u32 pci_devfn;
> > - unsigned short vid;
> > - int cap66 = -1;
> > - u16 stat;
> > -
> > - printk(KERN_INFO "PCI: Checking 66MHz capabilities...\n");
> > -
> > - for (pci_devfn = 0; pci_devfn < 0xff; pci_devfn++) {
> > - if (PCI_FUNC(pci_devfn))
> > - continue;
> > - if (early_read_config_word(hose, top_bus, current_bus,
> > - pci_devfn, PCI_VENDOR_ID, &vid) !> > - PCIBIOS_SUCCESSFUL)
> > - continue;
> > - if (vid = 0xffff)
> > - continue;
> > -
> > - /* check 66MHz capability */
> > - if (cap66 < 0)
> > - cap66 = 1;
> > - if (cap66) {
> > - early_read_config_word(hose, top_bus, current_bus,
> > - pci_devfn, PCI_STATUS, &stat);
> > - if (!(stat & PCI_STATUS_66MHZ)) {
> > - printk(KERN_DEBUG
> > - "PCI: %02x:%02x not 66MHz capable.\n",
> > - current_bus, pci_devfn);
> > - cap66 = 0;
> > - break;
> > - }
> > - }
> > - }
> > -
> > - return cap66 > 0;
> > -}
> > -
> > -static void pcibios_enable_err(unsigned long __data)
> > -{
> > - struct pci_channel *hose = (struct pci_channel *)__data;
> > -
> > - del_timer(&hose->err_timer);
> > - printk(KERN_DEBUG "PCI: re-enabling error IRQ.\n");
> > - enable_irq(hose->err_irq);
> > -}
> > -
> > -static void pcibios_enable_serr(unsigned long __data)
> > -{
> > - struct pci_channel *hose = (struct pci_channel *)__data;
> > -
> > - del_timer(&hose->serr_timer);
> > - printk(KERN_DEBUG "PCI: re-enabling system error IRQ.\n");
> > - enable_irq(hose->serr_irq);
> > -}
> > -
> > -void pcibios_enable_timers(struct pci_channel *hose)
> > -{
> > - if (hose->err_irq) {
> > - init_timer(&hose->err_timer);
> > - hose->err_timer.data = (unsigned long)hose;
> > - hose->err_timer.function = pcibios_enable_err;
> > - }
> > -
> > - if (hose->serr_irq) {
> > - init_timer(&hose->serr_timer);
> > - hose->serr_timer.data = (unsigned long)hose;
> > - hose->serr_timer.function = pcibios_enable_serr;
> > - }
> > -}
> > -
> > -/*
> > - * A simple handler for the regular PCI status errors, called from IRQ
> > - * context.
> > - */
> > -unsigned int pcibios_handle_status_errors(unsigned long addr,
> > - unsigned int status,
> > - struct pci_channel *hose)
> > -{
> > - unsigned int cmd = 0;
> > -
> > - if (status & PCI_STATUS_REC_MASTER_ABORT) {
> > - printk(KERN_DEBUG "PCI: master abort, pc=0x%08lx\n", addr);
> > - cmd |= PCI_STATUS_REC_MASTER_ABORT;
> > - }
> > -
> > - if (status & PCI_STATUS_REC_TARGET_ABORT) {
> > - printk(KERN_DEBUG "PCI: target abort: ");
> > - pcibios_report_status(PCI_STATUS_REC_TARGET_ABORT |
> > - PCI_STATUS_SIG_TARGET_ABORT |
> > - PCI_STATUS_REC_MASTER_ABORT, 1);
> > - printk("\n");
> > -
> > - cmd |= PCI_STATUS_REC_TARGET_ABORT;
> > - }
> > -
> > - if (status & (PCI_STATUS_PARITY | PCI_STATUS_DETECTED_PARITY)) {
> > - printk(KERN_DEBUG "PCI: parity error detected: ");
> > - pcibios_report_status(PCI_STATUS_PARITY |
> > - PCI_STATUS_DETECTED_PARITY, 1);
> > - printk("\n");
> > -
> > - cmd |= PCI_STATUS_PARITY | PCI_STATUS_DETECTED_PARITY;
> > -
> > - /* Now back off of the IRQ for awhile */
> > - if (hose->err_irq) {
> > - disable_irq_nosync(hose->err_irq);
> > - hose->err_timer.expires = jiffies + HZ;
> > - add_timer(&hose->err_timer);
> > - }
> > - }
> > -
> > - return cmd;
> > -}
> > diff --git a/arch/sh/drivers/pci/pci.c b/arch/sh/drivers/pci/pci.c
> > deleted file mode 100644
> > index d5462b7..0000000
> > --- a/arch/sh/drivers/pci/pci.c
> > +++ /dev/null
> > @@ -1,320 +0,0 @@
> > -/*
> > - * New-style PCI core.
> > - *
> > - * Copyright (c) 2004 - 2009 Paul Mundt
> > - * Copyright (c) 2002 M. R. Brown
> > - *
> > - * Modelled after arch/mips/pci/pci.c:
> > - * Copyright (C) 2003, 04 Ralf Baechle (ralf@linux-mips.org)
> > - *
> > - * This file is subject to the terms and conditions of the GNU General Public
> > - * License. See the file "COPYING" in the main directory of this archive
> > - * for more details.
> > - */
> > -#include <linux/kernel.h>
> > -#include <linux/mm.h>
> > -#include <linux/pci.h>
> > -#include <linux/init.h>
> > -#include <linux/types.h>
> > -#include <linux/dma-debug.h>
> > -#include <linux/io.h>
> > -#include <linux/mutex.h>
> > -#include <linux/spinlock.h>
> > -#include <linux/export.h>
> > -
> > -unsigned long PCIBIOS_MIN_IO = 0x0000;
> > -unsigned long PCIBIOS_MIN_MEM = 0;
> > -
> > -/*
> > - * The PCI controller list.
> > - */
> > -static struct pci_channel *hose_head, **hose_tail = &hose_head;
> > -
> > -static int pci_initialized;
> > -
> > -static void pcibios_scanbus(struct pci_channel *hose)
> > -{
> > - static int next_busno;
> > - static int need_domain_info;
> > - LIST_HEAD(resources);
> > - struct resource *res;
> > - resource_size_t offset;
> > - int i;
> > - struct pci_bus *bus;
> > -
> > - for (i = 0; i < hose->nr_resources; i++) {
> > - res = hose->resources + i;
> > - offset = 0;
> > - if (res->flags & IORESOURCE_IO)
> > - offset = hose->io_offset;
> > - else if (res->flags & IORESOURCE_MEM)
> > - offset = hose->mem_offset;
> > - pci_add_resource_offset(&resources, res, offset);
> > - }
> > -
> > - bus = pci_scan_root_bus(NULL, next_busno, hose->pci_ops, hose,
> > - &resources);
> > - hose->bus = bus;
> > -
> > - need_domain_info = need_domain_info || hose->index;
> > - hose->need_domain_info = need_domain_info;
> > -
> > - if (!bus) {
> > - pci_free_resource_list(&resources);
> > - return;
> > - }
> > -
> > - next_busno = bus->busn_res.end + 1;
> > - /* Don't allow 8-bit bus number overflow inside the hose -
> > - reserve some space for bridges. */
> > - if (next_busno > 224) {
> > - next_busno = 0;
> > - need_domain_info = 1;
> > - }
> > -
> > - pci_bus_size_bridges(bus);
> > - pci_bus_assign_resources(bus);
> > - pci_bus_add_devices(bus);
> > -}
> > -
> > -/*
> > - * This interrupt-safe spinlock protects all accesses to PCI
> > - * configuration space.
> > - */
> > -DEFINE_RAW_SPINLOCK(pci_config_lock);
> > -static DEFINE_MUTEX(pci_scan_mutex);
> > -
> > -int register_pci_controller(struct pci_channel *hose)
> > -{
> > - int i;
> > -
> > - for (i = 0; i < hose->nr_resources; i++) {
> > - struct resource *res = hose->resources + i;
> > -
> > - if (res->flags & IORESOURCE_IO) {
> > - if (request_resource(&ioport_resource, res) < 0)
> > - goto out;
> > - } else {
> > - if (request_resource(&iomem_resource, res) < 0)
> > - goto out;
> > - }
> > - }
> > -
> > - *hose_tail = hose;
> > - hose_tail = &hose->next;
> > -
> > - /*
> > - * Do not panic here but later - this might happen before console init.
> > - */
> > - if (!hose->io_map_base) {
> > - printk(KERN_WARNING
> > - "registering PCI controller with io_map_base unset\n");
> > - }
> > -
> > - /*
> > - * Setup the ERR/PERR and SERR timers, if available.
> > - */
> > - pcibios_enable_timers(hose);
> > -
> > - /*
> > - * Scan the bus if it is register after the PCI subsystem
> > - * initialization.
> > - */
> > - if (pci_initialized) {
> > - mutex_lock(&pci_scan_mutex);
> > - pcibios_scanbus(hose);
> > - mutex_unlock(&pci_scan_mutex);
> > - }
> > -
> > - return 0;
> > -
> > -out:
> > - for (--i; i >= 0; i--)
> > - release_resource(&hose->resources[i]);
> > -
> > - printk(KERN_WARNING "Skipping PCI bus scan due to resource conflict\n");
> > - return -1;
> > -}
> > -
> > -static int __init pcibios_init(void)
> > -{
> > - struct pci_channel *hose;
> > -
> > - /* Scan all of the recorded PCI controllers. */
> > - for (hose = hose_head; hose; hose = hose->next)
> > - pcibios_scanbus(hose);
> > -
> > - pci_fixup_irqs(pci_common_swizzle, pcibios_map_platform_irq);
> > -
> > - dma_debug_add_bus(&pci_bus_type);
> > -
> > - pci_initialized = 1;
> > -
> > - return 0;
> > -}
> > -subsys_initcall(pcibios_init);
> > -
> > -/*
> > - * Called after each bus is probed, but before its children
> > - * are examined.
> > - */
> > -void pcibios_fixup_bus(struct pci_bus *bus)
> > -{
> > -}
> > -
> > -/*
> > - * We need to avoid collisions with `mirrored' VGA ports
> > - * and other strange ISA hardware, so we always want the
> > - * addresses to be allocated in the 0x000-0x0ff region
> > - * modulo 0x400.
> > - */
> > -resource_size_t pcibios_align_resource(void *data, const struct resource *res,
> > - resource_size_t size, resource_size_t align)
> > -{
> > - struct pci_dev *dev = data;
> > - struct pci_channel *hose = dev->sysdata;
> > - resource_size_t start = res->start;
> > -
> > - if (res->flags & IORESOURCE_IO) {
> > - if (start < PCIBIOS_MIN_IO + hose->resources[0].start)
> > - start = PCIBIOS_MIN_IO + hose->resources[0].start;
> > -
> > - /*
> > - * Put everything into 0x00-0xff region modulo 0x400.
> > - */
> > - if (start & 0x300)
> > - start = (start + 0x3ff) & ~0x3ff;
> > - }
> > -
> > - return start;
> > -}
> > -
> > -static void __init
> > -pcibios_bus_report_status_early(struct pci_channel *hose,
> > - int top_bus, int current_bus,
> > - unsigned int status_mask, int warn)
> > -{
> > - unsigned int pci_devfn;
> > - u16 status;
> > - int ret;
> > -
> > - for (pci_devfn = 0; pci_devfn < 0xff; pci_devfn++) {
> > - if (PCI_FUNC(pci_devfn))
> > - continue;
> > - ret = early_read_config_word(hose, top_bus, current_bus,
> > - pci_devfn, PCI_STATUS, &status);
> > - if (ret != PCIBIOS_SUCCESSFUL)
> > - continue;
> > - if (status = 0xffff)
> > - continue;
> > -
> > - early_write_config_word(hose, top_bus, current_bus,
> > - pci_devfn, PCI_STATUS,
> > - status & status_mask);
> > - if (warn)
> > - printk("(%02x:%02x: %04X) ", current_bus,
> > - pci_devfn, status);
> > - }
> > -}
> > -
> > -/*
> > - * We can't use pci_find_device() here since we are
> > - * called from interrupt context.
> > - */
> > -static void __init_refok
> > -pcibios_bus_report_status(struct pci_bus *bus, unsigned int status_mask,
> > - int warn)
> > -{
> > - struct pci_dev *dev;
> > -
> > - list_for_each_entry(dev, &bus->devices, bus_list) {
> > - u16 status;
> > -
> > - /*
> > - * ignore host bridge - we handle
> > - * that separately
> > - */
> > - if (dev->bus->number = 0 && dev->devfn = 0)
> > - continue;
> > -
> > - pci_read_config_word(dev, PCI_STATUS, &status);
> > - if (status = 0xffff)
> > - continue;
> > -
> > - if ((status & status_mask) = 0)
> > - continue;
> > -
> > - /* clear the status errors */
> > - pci_write_config_word(dev, PCI_STATUS, status & status_mask);
> > -
> > - if (warn)
> > - printk("(%s: %04X) ", pci_name(dev), status);
> > - }
> > -
> > - list_for_each_entry(dev, &bus->devices, bus_list)
> > - if (dev->subordinate)
> > - pcibios_bus_report_status(dev->subordinate, status_mask, warn);
> > -}
> > -
> > -void __init_refok pcibios_report_status(unsigned int status_mask, int warn)
> > -{
> > - struct pci_channel *hose;
> > -
> > - for (hose = hose_head; hose; hose = hose->next) {
> > - if (unlikely(!hose->bus))
> > - pcibios_bus_report_status_early(hose, hose_head->index,
> > - hose->index, status_mask, warn);
> > - else
> > - pcibios_bus_report_status(hose->bus, status_mask, warn);
> > - }
> > -}
> > -
> > -int pci_mmap_page_range(struct pci_dev *dev, struct vm_area_struct *vma,
> > - enum pci_mmap_state mmap_state, int write_combine)
> > -{
> > - /*
> > - * I/O space can be accessed via normal processor loads and stores on
> > - * this platform but for now we elect not to do this and portable
> > - * drivers should not do this anyway.
> > - */
> > - if (mmap_state = pci_mmap_io)
> > - return -EINVAL;
> > -
> > - /*
> > - * Ignore write-combine; for now only return uncached mappings.
> > - */
> > - vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot);
> > -
> > - return remap_pfn_range(vma, vma->vm_start, vma->vm_pgoff,
> > - vma->vm_end - vma->vm_start,
> > - vma->vm_page_prot);
> > -}
> > -
> > -#ifndef CONFIG_GENERIC_IOMAP
> > -
> > -void __iomem *__pci_ioport_map(struct pci_dev *dev,
> > - unsigned long port, unsigned int nr)
> > -{
> > - struct pci_channel *chan = dev->sysdata;
> > -
> > - if (unlikely(!chan->io_map_base)) {
> > - chan->io_map_base = sh_io_port_base;
> > -
> > - if (pci_domains_supported)
> > - panic("To avoid data corruption io_map_base MUST be "
> > - "set with multiple PCI domains.");
> > - }
> > -
> > - return (void __iomem *)(chan->io_map_base + port);
> > -}
> > -
> > -void pci_iounmap(struct pci_dev *dev, void __iomem *addr)
> > -{
> > - iounmap(addr);
> > -}
> > -EXPORT_SYMBOL(pci_iounmap);
> > -
> > -#endif /* CONFIG_GENERIC_IOMAP */
> > -
> > -EXPORT_SYMBOL(PCIBIOS_MIN_IO);
> > -EXPORT_SYMBOL(PCIBIOS_MIN_MEM);
> > diff --git a/arch/sh/kernel/Makefile b/arch/sh/kernel/Makefile
> > index 09040fd..a9a54c2 100644
> > --- a/arch/sh/kernel/Makefile
> > +++ b/arch/sh/kernel/Makefile
> > @@ -46,5 +46,7 @@ obj-$(CONFIG_DWARF_UNWINDER) += dwarf.o
> > obj-$(CONFIG_PERF_EVENTS) += perf_event.o perf_callchain.o
> >
> > obj-$(CONFIG_HAVE_HW_BREAKPOINT) += hw_breakpoint.o
> > +obj-$(CONFIG_PCI) += pci.o pci-common.o
> >
> > ccflags-y := -Werror
> > +CFLAGS_pci.o := -O0
> > diff --git a/arch/sh/kernel/pci-common.c b/arch/sh/kernel/pci-common.c
> > new file mode 100644
> > index 0000000..dbf1381
> > --- /dev/null
> > +++ b/arch/sh/kernel/pci-common.c
> > @@ -0,0 +1,162 @@
> > +#include <linux/pci.h>
> > +#include <linux/interrupt.h>
> > +#include <linux/timer.h>
> > +#include <linux/kernel.h>
> > +
> > +/*
> > + * These functions are used early on before PCI scanning is done
> > + * and all of the pci_dev and pci_bus structures have been created.
> > + */
> > +static struct pci_dev *fake_pci_dev(struct pci_channel *hose,
> > + int top_bus, int busnr, int devfn)
> > +{
> > + static struct pci_dev dev;
> > + static struct pci_bus bus;
> > +
> > + dev.bus = &bus;
> > + dev.sysdata = hose;
> > + dev.devfn = devfn;
> > + bus.number = busnr;
> > + bus.sysdata = hose;
> > + bus.ops = hose->pci_ops;
> > +
> > + if(busnr != top_bus)
> > + /* Fake a parent bus structure. */
> > + bus.parent = &bus;
> > + else
> > + bus.parent = NULL;
> > +
> > + return &dev;
> > +}
> > +
> > +#define EARLY_PCI_OP(rw, size, type) \
> > +int __init early_##rw##_config_##size(struct pci_channel *hose, \
> > + int top_bus, int bus, int devfn, int offset, type value) \
> > +{ \
> > + return pci_##rw##_config_##size( \
> > + fake_pci_dev(hose, top_bus, bus, devfn), \
> > + offset, value); \
> > +}
> > +
> > +EARLY_PCI_OP(read, byte, u8 *)
> > +EARLY_PCI_OP(read, word, u16 *)
> > +EARLY_PCI_OP(read, dword, u32 *)
> > +EARLY_PCI_OP(write, byte, u8)
> > +EARLY_PCI_OP(write, word, u16)
> > +EARLY_PCI_OP(write, dword, u32)
> > +
> > +int __init pci_is_66mhz_capable(struct pci_channel *hose,
> > + int top_bus, int current_bus)
> > +{
> > + u32 pci_devfn;
> > + unsigned short vid;
> > + int cap66 = -1;
> > + u16 stat;
> > +
> > + printk(KERN_INFO "PCI: Checking 66MHz capabilities...\n");
> > +
> > + for (pci_devfn = 0; pci_devfn < 0xff; pci_devfn++) {
> > + if (PCI_FUNC(pci_devfn))
> > + continue;
> > + if (early_read_config_word(hose, top_bus, current_bus,
> > + pci_devfn, PCI_VENDOR_ID, &vid) !> > + PCIBIOS_SUCCESSFUL)
> > + continue;
> > + if (vid = 0xffff)
> > + continue;
> > +
> > + /* check 66MHz capability */
> > + if (cap66 < 0)
> > + cap66 = 1;
> > + if (cap66) {
> > + early_read_config_word(hose, top_bus, current_bus,
> > + pci_devfn, PCI_STATUS, &stat);
> > + if (!(stat & PCI_STATUS_66MHZ)) {
> > + printk(KERN_DEBUG
> > + "PCI: %02x:%02x not 66MHz capable.\n",
> > + current_bus, pci_devfn);
> > + cap66 = 0;
> > + break;
> > + }
> > + }
> > + }
> > +
> > + return cap66 > 0;
> > +}
> > +
> > +static void pcibios_enable_err(unsigned long __data)
> > +{
> > + struct pci_channel *hose = (struct pci_channel *)__data;
> > +
> > + del_timer(&hose->err_timer);
> > + printk(KERN_DEBUG "PCI: re-enabling error IRQ.\n");
> > + enable_irq(hose->err_irq);
> > +}
> > +
> > +static void pcibios_enable_serr(unsigned long __data)
> > +{
> > + struct pci_channel *hose = (struct pci_channel *)__data;
> > +
> > + del_timer(&hose->serr_timer);
> > + printk(KERN_DEBUG "PCI: re-enabling system error IRQ.\n");
> > + enable_irq(hose->serr_irq);
> > +}
> > +
> > +void pcibios_enable_timers(struct pci_channel *hose)
> > +{
> > + if (hose->err_irq) {
> > + init_timer(&hose->err_timer);
> > + hose->err_timer.data = (unsigned long)hose;
> > + hose->err_timer.function = pcibios_enable_err;
> > + }
> > +
> > + if (hose->serr_irq) {
> > + init_timer(&hose->serr_timer);
> > + hose->serr_timer.data = (unsigned long)hose;
> > + hose->serr_timer.function = pcibios_enable_serr;
> > + }
> > +}
> > +
> > +/*
> > + * A simple handler for the regular PCI status errors, called from IRQ
> > + * context.
> > + */
> > +unsigned int pcibios_handle_status_errors(unsigned long addr,
> > + unsigned int status,
> > + struct pci_channel *hose)
> > +{
> > + unsigned int cmd = 0;
> > +
> > + if (status & PCI_STATUS_REC_MASTER_ABORT) {
> > + printk(KERN_DEBUG "PCI: master abort, pc=0x%08lx\n", addr);
> > + cmd |= PCI_STATUS_REC_MASTER_ABORT;
> > + }
> > +
> > + if (status & PCI_STATUS_REC_TARGET_ABORT) {
> > + printk(KERN_DEBUG "PCI: target abort: ");
> > + pcibios_report_status(PCI_STATUS_REC_TARGET_ABORT |
> > + PCI_STATUS_SIG_TARGET_ABORT |
> > + PCI_STATUS_REC_MASTER_ABORT, 1);
> > + printk("\n");
> > +
> > + cmd |= PCI_STATUS_REC_TARGET_ABORT;
> > + }
> > +
> > + if (status & (PCI_STATUS_PARITY | PCI_STATUS_DETECTED_PARITY)) {
> > + printk(KERN_DEBUG "PCI: parity error detected: ");
> > + pcibios_report_status(PCI_STATUS_PARITY |
> > + PCI_STATUS_DETECTED_PARITY, 1);
> > + printk("\n");
> > +
> > + cmd |= PCI_STATUS_PARITY | PCI_STATUS_DETECTED_PARITY;
> > +
> > + /* Now back off of the IRQ for awhile */
> > + if (hose->err_irq) {
> > + disable_irq_nosync(hose->err_irq);
> > + hose->err_timer.expires = jiffies + HZ;
> > + add_timer(&hose->err_timer);
> > + }
> > + }
> > +
> > + return cmd;
> > +}
> > diff --git a/arch/sh/kernel/pci.c b/arch/sh/kernel/pci.c
> > new file mode 100644
> > index 0000000..9cf0ba4
> > --- /dev/null
> > +++ b/arch/sh/kernel/pci.c
> > @@ -0,0 +1,342 @@
> > +/*
> > + * New-style PCI core.
> > + *
> > + * Copyright (c) 2004 - 2009 Paul Mundt
> > + * Copyright (c) 2002 M. R. Brown
> > + *
> > + * Modelled after arch/mips/pci/pci.c:
> > + * Copyright (C) 2003, 04 Ralf Baechle (ralf@linux-mips.org)
> > + *
> > + * This file is subject to the terms and conditions of the GNU General Public
> > + * License. See the file "COPYING" in the main directory of this archive
> > + * for more details.
> > + */
> > +#include <linux/kernel.h>
> > +#include <linux/mm.h>
> > +#include <linux/pci.h>
> > +#include <linux/init.h>
> > +#include <linux/types.h>
> > +#include <linux/dma-debug.h>
> > +#include <linux/io.h>
> > +#include <linux/mutex.h>
> > +#include <linux/spinlock.h>
> > +#include <linux/export.h>
> > +
> > +unsigned long PCIBIOS_MIN_IO = 0x0000;
> > +unsigned long PCIBIOS_MIN_MEM = 0;
> > +
> > +/*
> > + * The PCI controller list.
> > + */
> > +static struct pci_channel *hose_head, **hose_tail = &hose_head;
> > +
> > +static int pci_initialized;
> > +
> > +static void pcibios_scanbus(struct pci_channel *hose)
> > +{
> > + static int next_busno;
> > + static int need_domain_info;
> > + LIST_HEAD(resources);
> > + struct resource *res;
> > + resource_size_t offset;
> > + int i;
> > + struct pci_bus *bus;
> > +
> > + for (i = 0; i < hose->nr_resources; i++) {
> > + res = hose->resources + i;
> > + offset = 0;
> > + if (res->flags & IORESOURCE_IO)
> > + offset = hose->io_offset;
> > + else if (res->flags & IORESOURCE_MEM)
> > + offset = hose->mem_offset;
> > + pci_add_resource_offset(&resources, res, offset);
> > + }
> > +
> > + bus = pci_scan_root_bus(NULL, next_busno, hose->pci_ops, hose,
> > + &resources);
> > + hose->bus = bus;
> > +
> > + need_domain_info = need_domain_info || hose->index;
> > + hose->need_domain_info = need_domain_info;
> > +
> > + if (!bus) {
> > + pci_free_resource_list(&resources);
> > + return;
> > + }
> > +
> > + next_busno = bus->busn_res.end + 1;
> > + /* Don't allow 8-bit bus number overflow inside the hose -
> > + reserve some space for bridges. */
> > + if (next_busno > 224) {
> > + next_busno = 0;
> > + need_domain_info = 1;
> > + }
> > +
> > + pci_bus_size_bridges(bus);
> > + pci_bus_assign_resources(bus);
> > + pci_bus_add_devices(bus);
> > +}
> > +
> > +/*
> > + * This interrupt-safe spinlock protects all accesses to PCI
> > + * configuration space.
> > + */
> > +DEFINE_RAW_SPINLOCK(pci_config_lock);
> > +static DEFINE_MUTEX(pci_scan_mutex);
> > +
> > +int register_pci_controller(struct pci_channel *hose)
> > +{
> > + int i;
> > +
> > + for (i = 0; i < hose->nr_resources; i++) {
> > + struct resource *res = hose->resources + i;
> > +
> > + if (res->flags & IORESOURCE_IO) {
> > + if (request_resource(&ioport_resource, res) < 0)
> > + goto out;
> > + } else {
> > + if (request_resource(&iomem_resource, res) < 0)
> > + goto out;
> > + }
> > + }
> > +
> > + *hose_tail = hose;
> > + hose_tail = &hose->next;
> > +
> > + /*
> > + * Do not panic here but later - this might happen before console init.
> > + */
> > + if (!hose->io_map_base) {
> > + printk(KERN_WARNING
> > + "registering PCI controller with io_map_base unset\n");
> > + }
> > +
> > + /*
> > + * Setup the ERR/PERR and SERR timers, if available.
> > + */
> > + pcibios_enable_timers(hose);
> > +
> > + /*
> > + * Scan the bus if it is register after the PCI subsystem
> > + * initialization.
> > + */
> > + if (pci_initialized) {
> > + mutex_lock(&pci_scan_mutex);
> > + pcibios_scanbus(hose);
> > + mutex_unlock(&pci_scan_mutex);
> > + }
> > +
> > + return 0;
> > +
> > +out:
> > + for (--i; i >= 0; i--)
> > + release_resource(&hose->resources[i]);
> > +
> > + printk(KERN_WARNING "Skipping PCI bus scan due to resource conflict\n");
> > + return -1;
> > +}
> > +
> > +#ifndef CONFIG_SH_DEVICE_TREE
> > +static int __init pcibios_init(void)
> > +{
> > + struct pci_channel *hose;
> > +
> > + /* Scan all of the recorded PCI controllers. */
> > + for (hose = hose_head; hose; hose = hose->next)
> > + pcibios_scanbus(hose);
> > +
> > + pci_fixup_irqs(pci_common_swizzle, pcibios_map_platform_irq);
> > +
> > + dma_debug_add_bus(&pci_bus_type);
> > +
> > + pci_initialized = 1;
> > +
> > + return 0;
> > +}
> > +subsys_initcall(pcibios_init);
> > +#endif
> > +
> > +/*
> > + * Called after each bus is probed, but before its children
> > + * are examined.
> > + */
> > +void pcibios_fixup_bus(struct pci_bus *bus)
> > +{
> > +}
> > +
> > +#ifndef CONFIG_SH_DEVICE_TREE
> > +/*
> > + * We need to avoid collisions with `mirrored' VGA ports
> > + * and other strange ISA hardware, so we always want the
> > + * addresses to be allocated in the 0x000-0x0ff region
> > + * modulo 0x400.
> > + */
> > +resource_size_t pcibios_align_resource(void *data, const struct resource *res,
> > + resource_size_t size, resource_size_t align)
> > +{
> > + struct pci_dev *dev = data;
> > + struct pci_channel *hose = dev->sysdata;
> > + resource_size_t start = res->start;
> > +
> > + if (res->flags & IORESOURCE_IO) {
> > + if (start < PCIBIOS_MIN_IO + hose->resources[0].start)
> > + start = PCIBIOS_MIN_IO + hose->resources[0].start;
> > +
> > + /*
> > + * Put everything into 0x00-0xff region modulo 0x400.
> > + */
> > + if (start & 0x300)
> > + start = (start + 0x3ff) & ~0x3ff;
> > + }
> > +
> > + return start;
> > +}
> > +#else
> > +typedef resource_size_t (*align_resource_fn)(struct pci_dev *dev,
> > + const struct resource *res,
> > + resource_size_t start,
> > + resource_size_t size,
> > + resource_size_t align);
> > +
> > +resource_size_t pcibios_align_resource(void *data, const struct resource *res,
> > + resource_size_t size, resource_size_t align)
> > +{
> > + resource_size_t start = res->start;
> > + struct pci_dev *dev = data;
> > + struct pci_config_window *cfg = dev->sysdata;
> > + align_resource_fn fn;
> > +
> > + fn = (align_resource_fn)(cfg->priv);
> > + return fn(dev, res, start, size, align);
> > +}
> > +#endif
> > +
> > +static void __init
> > +pcibios_bus_report_status_early(struct pci_channel *hose,
> > + int top_bus, int current_bus,
> > + unsigned int status_mask, int warn)
> > +{
> > + unsigned int pci_devfn;
> > + u16 status;
> > + int ret;
> > +
> > + for (pci_devfn = 0; pci_devfn < 0xff; pci_devfn++) {
> > + if (PCI_FUNC(pci_devfn))
> > + continue;
> > + ret = early_read_config_word(hose, top_bus, current_bus,
> > + pci_devfn, PCI_STATUS, &status);
> > + if (ret != PCIBIOS_SUCCESSFUL)
> > + continue;
> > + if (status = 0xffff)
> > + continue;
> > +
> > + early_write_config_word(hose, top_bus, current_bus,
> > + pci_devfn, PCI_STATUS,
> > + status & status_mask);
> > + if (warn)
> > + printk("(%02x:%02x: %04X) ", current_bus,
> > + pci_devfn, status);
> > + }
> > +}
> > +
> > +/*
> > + * We can't use pci_find_device() here since we are
> > + * called from interrupt context.
> > + */
> > +static void __init_refok
> > +pcibios_bus_report_status(struct pci_bus *bus, unsigned int status_mask,
> > + int warn)
> > +{
> > + struct pci_dev *dev;
> > +
> > + list_for_each_entry(dev, &bus->devices, bus_list) {
> > + u16 status;
> > +
> > + /*
> > + * ignore host bridge - we handle
> > + * that separately
> > + */
> > + if (dev->bus->number = 0 && dev->devfn = 0)
> > + continue;
> > +
> > + pci_read_config_word(dev, PCI_STATUS, &status);
> > + if (status = 0xffff)
> > + continue;
> > +
> > + if ((status & status_mask) = 0)
> > + continue;
> > +
> > + /* clear the status errors */
> > + pci_write_config_word(dev, PCI_STATUS, status & status_mask);
> > +
> > + if (warn)
> > + printk("(%s: %04X) ", pci_name(dev), status);
> > + }
> > +
> > + list_for_each_entry(dev, &bus->devices, bus_list)
> > + if (dev->subordinate)
> > + pcibios_bus_report_status(dev->subordinate, status_mask, warn);
> > +}
> > +
> > +void __init_refok pcibios_report_status(unsigned int status_mask, int warn)
> > +{
> > + struct pci_channel *hose;
> > +
> > + for (hose = hose_head; hose; hose = hose->next) {
> > + if (unlikely(!hose->bus))
> > + pcibios_bus_report_status_early(hose, hose_head->index,
> > + hose->index, status_mask, warn);
> > + else
> > + pcibios_bus_report_status(hose->bus, status_mask, warn);
> > + }
> > +}
> > +
> > +int pci_mmap_page_range(struct pci_dev *dev, struct vm_area_struct *vma,
> > + enum pci_mmap_state mmap_state, int write_combine)
> > +{
> > + /*
> > + * I/O space can be accessed via normal processor loads and stores on
> > + * this platform but for now we elect not to do this and portable
> > + * drivers should not do this anyway.
> > + */
> > + if (mmap_state = pci_mmap_io)
> > + return -EINVAL;
> > +
> > + /*
> > + * Ignore write-combine; for now only return uncached mappings.
> > + */
> > + vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot);
> > +
> > + return remap_pfn_range(vma, vma->vm_start, vma->vm_pgoff,
> > + vma->vm_end - vma->vm_start,
> > + vma->vm_page_prot);
> > +}
> > +
> > +#ifndef CONFIG_GENERIC_IOMAP
> > +
> > +void __iomem *__pci_ioport_map(struct pci_dev *dev,
> > + unsigned long port, unsigned int nr)
> > +{
> > + struct pci_channel *chan = dev->sysdata;
> > +
> > + if (unlikely(!chan->io_map_base)) {
> > + chan->io_map_base = sh_io_port_base;
> > +
> > + if (pci_domains_supported)
> > + panic("To avoid data corruption io_map_base MUST be "
> > + "set with multiple PCI domains.");
> > + }
> > +
> > + return (void __iomem *)(chan->io_map_base + port);
> > +}
> > +
> > +void pci_iounmap(struct pci_dev *dev, void __iomem *addr)
> > +{
> > + iounmap(addr);
> > +}
> > +EXPORT_SYMBOL(pci_iounmap);
> > +
> > +#endif /* CONFIG_GENERIC_IOMAP */
> > +
> > +EXPORT_SYMBOL(PCIBIOS_MIN_IO);
> > +EXPORT_SYMBOL(PCIBIOS_MIN_MEM);
> > --
> > 2.7.0
> >
> > --
>
> Is this code specific to particular PCI bus hardware on Renesas SH
> systems? If so it probably should be kept as a driver file rather than
> in arch/sh/kernel core, but I don't actually see a lot of code that
> looks hardware-specific. If there's not actually much or anything
> hardware-specific about it, could we perhaps unify it with other PCI
> bus support code outside or arch/sh?
>
> Rich
Yes. Common PCI framework required this functions.
I think put arch/sh/kernel is more better.
--
Yoshinori Sato
<ysato@users.sourceforge.jp>
^ permalink raw reply [flat|nested] 138+ messages in thread* Re: [PATCH v5 15/22] sh: Move common PCI stuff to arch/sh/kernel
@ 2016-07-06 16:17 ` Yoshinori Sato
0 siblings, 0 replies; 138+ messages in thread
From: Yoshinori Sato @ 2016-07-06 16:17 UTC (permalink / raw)
To: Rich Felker; +Cc: linux-sh, linux-kernel
On Mon, 04 Jul 2016 10:55:12 +0900,
Rich Felker wrote:
>
> On Mon, Jul 04, 2016 at 01:46:35AM +0900, Yoshinori Sato wrote:
> > Signed-off-by: Yoshinori Sato <ysato@users.sourceforge.jp>
> > ---
> > arch/sh/drivers/pci/Makefile | 2 -
> > arch/sh/drivers/pci/common.c | 162 --------------------
> > arch/sh/drivers/pci/pci.c | 320 ----------------------------------------
> > arch/sh/kernel/Makefile | 2 +
> > arch/sh/kernel/pci-common.c | 162 ++++++++++++++++++++
> > arch/sh/kernel/pci.c | 342 +++++++++++++++++++++++++++++++++++++++++++
> > 6 files changed, 506 insertions(+), 484 deletions(-)
> > delete mode 100644 arch/sh/drivers/pci/common.c
> > delete mode 100644 arch/sh/drivers/pci/pci.c
> > create mode 100644 arch/sh/kernel/pci-common.c
> > create mode 100644 arch/sh/kernel/pci.c
> >
> > diff --git a/arch/sh/drivers/pci/Makefile b/arch/sh/drivers/pci/Makefile
> > index 82f0a33..fffbede 100644
> > --- a/arch/sh/drivers/pci/Makefile
> > +++ b/arch/sh/drivers/pci/Makefile
> > @@ -1,8 +1,6 @@
> > #
> > # Makefile for the PCI specific kernel interface routines under Linux.
> > #
> > -obj-y += common.o pci.o
> > -
> > obj-$(CONFIG_CPU_SUBTYPE_SH7751) += pci-sh7751.o ops-sh4.o
> > obj-$(CONFIG_CPU_SUBTYPE_SH7751R) += pci-sh7751.o ops-sh4.o
> > obj-$(CONFIG_CPU_SUBTYPE_SH7763) += pci-sh7780.o ops-sh4.o
> > diff --git a/arch/sh/drivers/pci/common.c b/arch/sh/drivers/pci/common.c
> > deleted file mode 100644
> > index dbf1381..0000000
> > --- a/arch/sh/drivers/pci/common.c
> > +++ /dev/null
> > @@ -1,162 +0,0 @@
> > -#include <linux/pci.h>
> > -#include <linux/interrupt.h>
> > -#include <linux/timer.h>
> > -#include <linux/kernel.h>
> > -
> > -/*
> > - * These functions are used early on before PCI scanning is done
> > - * and all of the pci_dev and pci_bus structures have been created.
> > - */
> > -static struct pci_dev *fake_pci_dev(struct pci_channel *hose,
> > - int top_bus, int busnr, int devfn)
> > -{
> > - static struct pci_dev dev;
> > - static struct pci_bus bus;
> > -
> > - dev.bus = &bus;
> > - dev.sysdata = hose;
> > - dev.devfn = devfn;
> > - bus.number = busnr;
> > - bus.sysdata = hose;
> > - bus.ops = hose->pci_ops;
> > -
> > - if(busnr != top_bus)
> > - /* Fake a parent bus structure. */
> > - bus.parent = &bus;
> > - else
> > - bus.parent = NULL;
> > -
> > - return &dev;
> > -}
> > -
> > -#define EARLY_PCI_OP(rw, size, type) \
> > -int __init early_##rw##_config_##size(struct pci_channel *hose, \
> > - int top_bus, int bus, int devfn, int offset, type value) \
> > -{ \
> > - return pci_##rw##_config_##size( \
> > - fake_pci_dev(hose, top_bus, bus, devfn), \
> > - offset, value); \
> > -}
> > -
> > -EARLY_PCI_OP(read, byte, u8 *)
> > -EARLY_PCI_OP(read, word, u16 *)
> > -EARLY_PCI_OP(read, dword, u32 *)
> > -EARLY_PCI_OP(write, byte, u8)
> > -EARLY_PCI_OP(write, word, u16)
> > -EARLY_PCI_OP(write, dword, u32)
> > -
> > -int __init pci_is_66mhz_capable(struct pci_channel *hose,
> > - int top_bus, int current_bus)
> > -{
> > - u32 pci_devfn;
> > - unsigned short vid;
> > - int cap66 = -1;
> > - u16 stat;
> > -
> > - printk(KERN_INFO "PCI: Checking 66MHz capabilities...\n");
> > -
> > - for (pci_devfn = 0; pci_devfn < 0xff; pci_devfn++) {
> > - if (PCI_FUNC(pci_devfn))
> > - continue;
> > - if (early_read_config_word(hose, top_bus, current_bus,
> > - pci_devfn, PCI_VENDOR_ID, &vid) !=
> > - PCIBIOS_SUCCESSFUL)
> > - continue;
> > - if (vid == 0xffff)
> > - continue;
> > -
> > - /* check 66MHz capability */
> > - if (cap66 < 0)
> > - cap66 = 1;
> > - if (cap66) {
> > - early_read_config_word(hose, top_bus, current_bus,
> > - pci_devfn, PCI_STATUS, &stat);
> > - if (!(stat & PCI_STATUS_66MHZ)) {
> > - printk(KERN_DEBUG
> > - "PCI: %02x:%02x not 66MHz capable.\n",
> > - current_bus, pci_devfn);
> > - cap66 = 0;
> > - break;
> > - }
> > - }
> > - }
> > -
> > - return cap66 > 0;
> > -}
> > -
> > -static void pcibios_enable_err(unsigned long __data)
> > -{
> > - struct pci_channel *hose = (struct pci_channel *)__data;
> > -
> > - del_timer(&hose->err_timer);
> > - printk(KERN_DEBUG "PCI: re-enabling error IRQ.\n");
> > - enable_irq(hose->err_irq);
> > -}
> > -
> > -static void pcibios_enable_serr(unsigned long __data)
> > -{
> > - struct pci_channel *hose = (struct pci_channel *)__data;
> > -
> > - del_timer(&hose->serr_timer);
> > - printk(KERN_DEBUG "PCI: re-enabling system error IRQ.\n");
> > - enable_irq(hose->serr_irq);
> > -}
> > -
> > -void pcibios_enable_timers(struct pci_channel *hose)
> > -{
> > - if (hose->err_irq) {
> > - init_timer(&hose->err_timer);
> > - hose->err_timer.data = (unsigned long)hose;
> > - hose->err_timer.function = pcibios_enable_err;
> > - }
> > -
> > - if (hose->serr_irq) {
> > - init_timer(&hose->serr_timer);
> > - hose->serr_timer.data = (unsigned long)hose;
> > - hose->serr_timer.function = pcibios_enable_serr;
> > - }
> > -}
> > -
> > -/*
> > - * A simple handler for the regular PCI status errors, called from IRQ
> > - * context.
> > - */
> > -unsigned int pcibios_handle_status_errors(unsigned long addr,
> > - unsigned int status,
> > - struct pci_channel *hose)
> > -{
> > - unsigned int cmd = 0;
> > -
> > - if (status & PCI_STATUS_REC_MASTER_ABORT) {
> > - printk(KERN_DEBUG "PCI: master abort, pc=0x%08lx\n", addr);
> > - cmd |= PCI_STATUS_REC_MASTER_ABORT;
> > - }
> > -
> > - if (status & PCI_STATUS_REC_TARGET_ABORT) {
> > - printk(KERN_DEBUG "PCI: target abort: ");
> > - pcibios_report_status(PCI_STATUS_REC_TARGET_ABORT |
> > - PCI_STATUS_SIG_TARGET_ABORT |
> > - PCI_STATUS_REC_MASTER_ABORT, 1);
> > - printk("\n");
> > -
> > - cmd |= PCI_STATUS_REC_TARGET_ABORT;
> > - }
> > -
> > - if (status & (PCI_STATUS_PARITY | PCI_STATUS_DETECTED_PARITY)) {
> > - printk(KERN_DEBUG "PCI: parity error detected: ");
> > - pcibios_report_status(PCI_STATUS_PARITY |
> > - PCI_STATUS_DETECTED_PARITY, 1);
> > - printk("\n");
> > -
> > - cmd |= PCI_STATUS_PARITY | PCI_STATUS_DETECTED_PARITY;
> > -
> > - /* Now back off of the IRQ for awhile */
> > - if (hose->err_irq) {
> > - disable_irq_nosync(hose->err_irq);
> > - hose->err_timer.expires = jiffies + HZ;
> > - add_timer(&hose->err_timer);
> > - }
> > - }
> > -
> > - return cmd;
> > -}
> > diff --git a/arch/sh/drivers/pci/pci.c b/arch/sh/drivers/pci/pci.c
> > deleted file mode 100644
> > index d5462b7..0000000
> > --- a/arch/sh/drivers/pci/pci.c
> > +++ /dev/null
> > @@ -1,320 +0,0 @@
> > -/*
> > - * New-style PCI core.
> > - *
> > - * Copyright (c) 2004 - 2009 Paul Mundt
> > - * Copyright (c) 2002 M. R. Brown
> > - *
> > - * Modelled after arch/mips/pci/pci.c:
> > - * Copyright (C) 2003, 04 Ralf Baechle (ralf@linux-mips.org)
> > - *
> > - * This file is subject to the terms and conditions of the GNU General Public
> > - * License. See the file "COPYING" in the main directory of this archive
> > - * for more details.
> > - */
> > -#include <linux/kernel.h>
> > -#include <linux/mm.h>
> > -#include <linux/pci.h>
> > -#include <linux/init.h>
> > -#include <linux/types.h>
> > -#include <linux/dma-debug.h>
> > -#include <linux/io.h>
> > -#include <linux/mutex.h>
> > -#include <linux/spinlock.h>
> > -#include <linux/export.h>
> > -
> > -unsigned long PCIBIOS_MIN_IO = 0x0000;
> > -unsigned long PCIBIOS_MIN_MEM = 0;
> > -
> > -/*
> > - * The PCI controller list.
> > - */
> > -static struct pci_channel *hose_head, **hose_tail = &hose_head;
> > -
> > -static int pci_initialized;
> > -
> > -static void pcibios_scanbus(struct pci_channel *hose)
> > -{
> > - static int next_busno;
> > - static int need_domain_info;
> > - LIST_HEAD(resources);
> > - struct resource *res;
> > - resource_size_t offset;
> > - int i;
> > - struct pci_bus *bus;
> > -
> > - for (i = 0; i < hose->nr_resources; i++) {
> > - res = hose->resources + i;
> > - offset = 0;
> > - if (res->flags & IORESOURCE_IO)
> > - offset = hose->io_offset;
> > - else if (res->flags & IORESOURCE_MEM)
> > - offset = hose->mem_offset;
> > - pci_add_resource_offset(&resources, res, offset);
> > - }
> > -
> > - bus = pci_scan_root_bus(NULL, next_busno, hose->pci_ops, hose,
> > - &resources);
> > - hose->bus = bus;
> > -
> > - need_domain_info = need_domain_info || hose->index;
> > - hose->need_domain_info = need_domain_info;
> > -
> > - if (!bus) {
> > - pci_free_resource_list(&resources);
> > - return;
> > - }
> > -
> > - next_busno = bus->busn_res.end + 1;
> > - /* Don't allow 8-bit bus number overflow inside the hose -
> > - reserve some space for bridges. */
> > - if (next_busno > 224) {
> > - next_busno = 0;
> > - need_domain_info = 1;
> > - }
> > -
> > - pci_bus_size_bridges(bus);
> > - pci_bus_assign_resources(bus);
> > - pci_bus_add_devices(bus);
> > -}
> > -
> > -/*
> > - * This interrupt-safe spinlock protects all accesses to PCI
> > - * configuration space.
> > - */
> > -DEFINE_RAW_SPINLOCK(pci_config_lock);
> > -static DEFINE_MUTEX(pci_scan_mutex);
> > -
> > -int register_pci_controller(struct pci_channel *hose)
> > -{
> > - int i;
> > -
> > - for (i = 0; i < hose->nr_resources; i++) {
> > - struct resource *res = hose->resources + i;
> > -
> > - if (res->flags & IORESOURCE_IO) {
> > - if (request_resource(&ioport_resource, res) < 0)
> > - goto out;
> > - } else {
> > - if (request_resource(&iomem_resource, res) < 0)
> > - goto out;
> > - }
> > - }
> > -
> > - *hose_tail = hose;
> > - hose_tail = &hose->next;
> > -
> > - /*
> > - * Do not panic here but later - this might happen before console init.
> > - */
> > - if (!hose->io_map_base) {
> > - printk(KERN_WARNING
> > - "registering PCI controller with io_map_base unset\n");
> > - }
> > -
> > - /*
> > - * Setup the ERR/PERR and SERR timers, if available.
> > - */
> > - pcibios_enable_timers(hose);
> > -
> > - /*
> > - * Scan the bus if it is register after the PCI subsystem
> > - * initialization.
> > - */
> > - if (pci_initialized) {
> > - mutex_lock(&pci_scan_mutex);
> > - pcibios_scanbus(hose);
> > - mutex_unlock(&pci_scan_mutex);
> > - }
> > -
> > - return 0;
> > -
> > -out:
> > - for (--i; i >= 0; i--)
> > - release_resource(&hose->resources[i]);
> > -
> > - printk(KERN_WARNING "Skipping PCI bus scan due to resource conflict\n");
> > - return -1;
> > -}
> > -
> > -static int __init pcibios_init(void)
> > -{
> > - struct pci_channel *hose;
> > -
> > - /* Scan all of the recorded PCI controllers. */
> > - for (hose = hose_head; hose; hose = hose->next)
> > - pcibios_scanbus(hose);
> > -
> > - pci_fixup_irqs(pci_common_swizzle, pcibios_map_platform_irq);
> > -
> > - dma_debug_add_bus(&pci_bus_type);
> > -
> > - pci_initialized = 1;
> > -
> > - return 0;
> > -}
> > -subsys_initcall(pcibios_init);
> > -
> > -/*
> > - * Called after each bus is probed, but before its children
> > - * are examined.
> > - */
> > -void pcibios_fixup_bus(struct pci_bus *bus)
> > -{
> > -}
> > -
> > -/*
> > - * We need to avoid collisions with `mirrored' VGA ports
> > - * and other strange ISA hardware, so we always want the
> > - * addresses to be allocated in the 0x000-0x0ff region
> > - * modulo 0x400.
> > - */
> > -resource_size_t pcibios_align_resource(void *data, const struct resource *res,
> > - resource_size_t size, resource_size_t align)
> > -{
> > - struct pci_dev *dev = data;
> > - struct pci_channel *hose = dev->sysdata;
> > - resource_size_t start = res->start;
> > -
> > - if (res->flags & IORESOURCE_IO) {
> > - if (start < PCIBIOS_MIN_IO + hose->resources[0].start)
> > - start = PCIBIOS_MIN_IO + hose->resources[0].start;
> > -
> > - /*
> > - * Put everything into 0x00-0xff region modulo 0x400.
> > - */
> > - if (start & 0x300)
> > - start = (start + 0x3ff) & ~0x3ff;
> > - }
> > -
> > - return start;
> > -}
> > -
> > -static void __init
> > -pcibios_bus_report_status_early(struct pci_channel *hose,
> > - int top_bus, int current_bus,
> > - unsigned int status_mask, int warn)
> > -{
> > - unsigned int pci_devfn;
> > - u16 status;
> > - int ret;
> > -
> > - for (pci_devfn = 0; pci_devfn < 0xff; pci_devfn++) {
> > - if (PCI_FUNC(pci_devfn))
> > - continue;
> > - ret = early_read_config_word(hose, top_bus, current_bus,
> > - pci_devfn, PCI_STATUS, &status);
> > - if (ret != PCIBIOS_SUCCESSFUL)
> > - continue;
> > - if (status == 0xffff)
> > - continue;
> > -
> > - early_write_config_word(hose, top_bus, current_bus,
> > - pci_devfn, PCI_STATUS,
> > - status & status_mask);
> > - if (warn)
> > - printk("(%02x:%02x: %04X) ", current_bus,
> > - pci_devfn, status);
> > - }
> > -}
> > -
> > -/*
> > - * We can't use pci_find_device() here since we are
> > - * called from interrupt context.
> > - */
> > -static void __init_refok
> > -pcibios_bus_report_status(struct pci_bus *bus, unsigned int status_mask,
> > - int warn)
> > -{
> > - struct pci_dev *dev;
> > -
> > - list_for_each_entry(dev, &bus->devices, bus_list) {
> > - u16 status;
> > -
> > - /*
> > - * ignore host bridge - we handle
> > - * that separately
> > - */
> > - if (dev->bus->number == 0 && dev->devfn == 0)
> > - continue;
> > -
> > - pci_read_config_word(dev, PCI_STATUS, &status);
> > - if (status == 0xffff)
> > - continue;
> > -
> > - if ((status & status_mask) == 0)
> > - continue;
> > -
> > - /* clear the status errors */
> > - pci_write_config_word(dev, PCI_STATUS, status & status_mask);
> > -
> > - if (warn)
> > - printk("(%s: %04X) ", pci_name(dev), status);
> > - }
> > -
> > - list_for_each_entry(dev, &bus->devices, bus_list)
> > - if (dev->subordinate)
> > - pcibios_bus_report_status(dev->subordinate, status_mask, warn);
> > -}
> > -
> > -void __init_refok pcibios_report_status(unsigned int status_mask, int warn)
> > -{
> > - struct pci_channel *hose;
> > -
> > - for (hose = hose_head; hose; hose = hose->next) {
> > - if (unlikely(!hose->bus))
> > - pcibios_bus_report_status_early(hose, hose_head->index,
> > - hose->index, status_mask, warn);
> > - else
> > - pcibios_bus_report_status(hose->bus, status_mask, warn);
> > - }
> > -}
> > -
> > -int pci_mmap_page_range(struct pci_dev *dev, struct vm_area_struct *vma,
> > - enum pci_mmap_state mmap_state, int write_combine)
> > -{
> > - /*
> > - * I/O space can be accessed via normal processor loads and stores on
> > - * this platform but for now we elect not to do this and portable
> > - * drivers should not do this anyway.
> > - */
> > - if (mmap_state == pci_mmap_io)
> > - return -EINVAL;
> > -
> > - /*
> > - * Ignore write-combine; for now only return uncached mappings.
> > - */
> > - vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot);
> > -
> > - return remap_pfn_range(vma, vma->vm_start, vma->vm_pgoff,
> > - vma->vm_end - vma->vm_start,
> > - vma->vm_page_prot);
> > -}
> > -
> > -#ifndef CONFIG_GENERIC_IOMAP
> > -
> > -void __iomem *__pci_ioport_map(struct pci_dev *dev,
> > - unsigned long port, unsigned int nr)
> > -{
> > - struct pci_channel *chan = dev->sysdata;
> > -
> > - if (unlikely(!chan->io_map_base)) {
> > - chan->io_map_base = sh_io_port_base;
> > -
> > - if (pci_domains_supported)
> > - panic("To avoid data corruption io_map_base MUST be "
> > - "set with multiple PCI domains.");
> > - }
> > -
> > - return (void __iomem *)(chan->io_map_base + port);
> > -}
> > -
> > -void pci_iounmap(struct pci_dev *dev, void __iomem *addr)
> > -{
> > - iounmap(addr);
> > -}
> > -EXPORT_SYMBOL(pci_iounmap);
> > -
> > -#endif /* CONFIG_GENERIC_IOMAP */
> > -
> > -EXPORT_SYMBOL(PCIBIOS_MIN_IO);
> > -EXPORT_SYMBOL(PCIBIOS_MIN_MEM);
> > diff --git a/arch/sh/kernel/Makefile b/arch/sh/kernel/Makefile
> > index 09040fd..a9a54c2 100644
> > --- a/arch/sh/kernel/Makefile
> > +++ b/arch/sh/kernel/Makefile
> > @@ -46,5 +46,7 @@ obj-$(CONFIG_DWARF_UNWINDER) += dwarf.o
> > obj-$(CONFIG_PERF_EVENTS) += perf_event.o perf_callchain.o
> >
> > obj-$(CONFIG_HAVE_HW_BREAKPOINT) += hw_breakpoint.o
> > +obj-$(CONFIG_PCI) += pci.o pci-common.o
> >
> > ccflags-y := -Werror
> > +CFLAGS_pci.o := -O0
> > diff --git a/arch/sh/kernel/pci-common.c b/arch/sh/kernel/pci-common.c
> > new file mode 100644
> > index 0000000..dbf1381
> > --- /dev/null
> > +++ b/arch/sh/kernel/pci-common.c
> > @@ -0,0 +1,162 @@
> > +#include <linux/pci.h>
> > +#include <linux/interrupt.h>
> > +#include <linux/timer.h>
> > +#include <linux/kernel.h>
> > +
> > +/*
> > + * These functions are used early on before PCI scanning is done
> > + * and all of the pci_dev and pci_bus structures have been created.
> > + */
> > +static struct pci_dev *fake_pci_dev(struct pci_channel *hose,
> > + int top_bus, int busnr, int devfn)
> > +{
> > + static struct pci_dev dev;
> > + static struct pci_bus bus;
> > +
> > + dev.bus = &bus;
> > + dev.sysdata = hose;
> > + dev.devfn = devfn;
> > + bus.number = busnr;
> > + bus.sysdata = hose;
> > + bus.ops = hose->pci_ops;
> > +
> > + if(busnr != top_bus)
> > + /* Fake a parent bus structure. */
> > + bus.parent = &bus;
> > + else
> > + bus.parent = NULL;
> > +
> > + return &dev;
> > +}
> > +
> > +#define EARLY_PCI_OP(rw, size, type) \
> > +int __init early_##rw##_config_##size(struct pci_channel *hose, \
> > + int top_bus, int bus, int devfn, int offset, type value) \
> > +{ \
> > + return pci_##rw##_config_##size( \
> > + fake_pci_dev(hose, top_bus, bus, devfn), \
> > + offset, value); \
> > +}
> > +
> > +EARLY_PCI_OP(read, byte, u8 *)
> > +EARLY_PCI_OP(read, word, u16 *)
> > +EARLY_PCI_OP(read, dword, u32 *)
> > +EARLY_PCI_OP(write, byte, u8)
> > +EARLY_PCI_OP(write, word, u16)
> > +EARLY_PCI_OP(write, dword, u32)
> > +
> > +int __init pci_is_66mhz_capable(struct pci_channel *hose,
> > + int top_bus, int current_bus)
> > +{
> > + u32 pci_devfn;
> > + unsigned short vid;
> > + int cap66 = -1;
> > + u16 stat;
> > +
> > + printk(KERN_INFO "PCI: Checking 66MHz capabilities...\n");
> > +
> > + for (pci_devfn = 0; pci_devfn < 0xff; pci_devfn++) {
> > + if (PCI_FUNC(pci_devfn))
> > + continue;
> > + if (early_read_config_word(hose, top_bus, current_bus,
> > + pci_devfn, PCI_VENDOR_ID, &vid) !=
> > + PCIBIOS_SUCCESSFUL)
> > + continue;
> > + if (vid == 0xffff)
> > + continue;
> > +
> > + /* check 66MHz capability */
> > + if (cap66 < 0)
> > + cap66 = 1;
> > + if (cap66) {
> > + early_read_config_word(hose, top_bus, current_bus,
> > + pci_devfn, PCI_STATUS, &stat);
> > + if (!(stat & PCI_STATUS_66MHZ)) {
> > + printk(KERN_DEBUG
> > + "PCI: %02x:%02x not 66MHz capable.\n",
> > + current_bus, pci_devfn);
> > + cap66 = 0;
> > + break;
> > + }
> > + }
> > + }
> > +
> > + return cap66 > 0;
> > +}
> > +
> > +static void pcibios_enable_err(unsigned long __data)
> > +{
> > + struct pci_channel *hose = (struct pci_channel *)__data;
> > +
> > + del_timer(&hose->err_timer);
> > + printk(KERN_DEBUG "PCI: re-enabling error IRQ.\n");
> > + enable_irq(hose->err_irq);
> > +}
> > +
> > +static void pcibios_enable_serr(unsigned long __data)
> > +{
> > + struct pci_channel *hose = (struct pci_channel *)__data;
> > +
> > + del_timer(&hose->serr_timer);
> > + printk(KERN_DEBUG "PCI: re-enabling system error IRQ.\n");
> > + enable_irq(hose->serr_irq);
> > +}
> > +
> > +void pcibios_enable_timers(struct pci_channel *hose)
> > +{
> > + if (hose->err_irq) {
> > + init_timer(&hose->err_timer);
> > + hose->err_timer.data = (unsigned long)hose;
> > + hose->err_timer.function = pcibios_enable_err;
> > + }
> > +
> > + if (hose->serr_irq) {
> > + init_timer(&hose->serr_timer);
> > + hose->serr_timer.data = (unsigned long)hose;
> > + hose->serr_timer.function = pcibios_enable_serr;
> > + }
> > +}
> > +
> > +/*
> > + * A simple handler for the regular PCI status errors, called from IRQ
> > + * context.
> > + */
> > +unsigned int pcibios_handle_status_errors(unsigned long addr,
> > + unsigned int status,
> > + struct pci_channel *hose)
> > +{
> > + unsigned int cmd = 0;
> > +
> > + if (status & PCI_STATUS_REC_MASTER_ABORT) {
> > + printk(KERN_DEBUG "PCI: master abort, pc=0x%08lx\n", addr);
> > + cmd |= PCI_STATUS_REC_MASTER_ABORT;
> > + }
> > +
> > + if (status & PCI_STATUS_REC_TARGET_ABORT) {
> > + printk(KERN_DEBUG "PCI: target abort: ");
> > + pcibios_report_status(PCI_STATUS_REC_TARGET_ABORT |
> > + PCI_STATUS_SIG_TARGET_ABORT |
> > + PCI_STATUS_REC_MASTER_ABORT, 1);
> > + printk("\n");
> > +
> > + cmd |= PCI_STATUS_REC_TARGET_ABORT;
> > + }
> > +
> > + if (status & (PCI_STATUS_PARITY | PCI_STATUS_DETECTED_PARITY)) {
> > + printk(KERN_DEBUG "PCI: parity error detected: ");
> > + pcibios_report_status(PCI_STATUS_PARITY |
> > + PCI_STATUS_DETECTED_PARITY, 1);
> > + printk("\n");
> > +
> > + cmd |= PCI_STATUS_PARITY | PCI_STATUS_DETECTED_PARITY;
> > +
> > + /* Now back off of the IRQ for awhile */
> > + if (hose->err_irq) {
> > + disable_irq_nosync(hose->err_irq);
> > + hose->err_timer.expires = jiffies + HZ;
> > + add_timer(&hose->err_timer);
> > + }
> > + }
> > +
> > + return cmd;
> > +}
> > diff --git a/arch/sh/kernel/pci.c b/arch/sh/kernel/pci.c
> > new file mode 100644
> > index 0000000..9cf0ba4
> > --- /dev/null
> > +++ b/arch/sh/kernel/pci.c
> > @@ -0,0 +1,342 @@
> > +/*
> > + * New-style PCI core.
> > + *
> > + * Copyright (c) 2004 - 2009 Paul Mundt
> > + * Copyright (c) 2002 M. R. Brown
> > + *
> > + * Modelled after arch/mips/pci/pci.c:
> > + * Copyright (C) 2003, 04 Ralf Baechle (ralf@linux-mips.org)
> > + *
> > + * This file is subject to the terms and conditions of the GNU General Public
> > + * License. See the file "COPYING" in the main directory of this archive
> > + * for more details.
> > + */
> > +#include <linux/kernel.h>
> > +#include <linux/mm.h>
> > +#include <linux/pci.h>
> > +#include <linux/init.h>
> > +#include <linux/types.h>
> > +#include <linux/dma-debug.h>
> > +#include <linux/io.h>
> > +#include <linux/mutex.h>
> > +#include <linux/spinlock.h>
> > +#include <linux/export.h>
> > +
> > +unsigned long PCIBIOS_MIN_IO = 0x0000;
> > +unsigned long PCIBIOS_MIN_MEM = 0;
> > +
> > +/*
> > + * The PCI controller list.
> > + */
> > +static struct pci_channel *hose_head, **hose_tail = &hose_head;
> > +
> > +static int pci_initialized;
> > +
> > +static void pcibios_scanbus(struct pci_channel *hose)
> > +{
> > + static int next_busno;
> > + static int need_domain_info;
> > + LIST_HEAD(resources);
> > + struct resource *res;
> > + resource_size_t offset;
> > + int i;
> > + struct pci_bus *bus;
> > +
> > + for (i = 0; i < hose->nr_resources; i++) {
> > + res = hose->resources + i;
> > + offset = 0;
> > + if (res->flags & IORESOURCE_IO)
> > + offset = hose->io_offset;
> > + else if (res->flags & IORESOURCE_MEM)
> > + offset = hose->mem_offset;
> > + pci_add_resource_offset(&resources, res, offset);
> > + }
> > +
> > + bus = pci_scan_root_bus(NULL, next_busno, hose->pci_ops, hose,
> > + &resources);
> > + hose->bus = bus;
> > +
> > + need_domain_info = need_domain_info || hose->index;
> > + hose->need_domain_info = need_domain_info;
> > +
> > + if (!bus) {
> > + pci_free_resource_list(&resources);
> > + return;
> > + }
> > +
> > + next_busno = bus->busn_res.end + 1;
> > + /* Don't allow 8-bit bus number overflow inside the hose -
> > + reserve some space for bridges. */
> > + if (next_busno > 224) {
> > + next_busno = 0;
> > + need_domain_info = 1;
> > + }
> > +
> > + pci_bus_size_bridges(bus);
> > + pci_bus_assign_resources(bus);
> > + pci_bus_add_devices(bus);
> > +}
> > +
> > +/*
> > + * This interrupt-safe spinlock protects all accesses to PCI
> > + * configuration space.
> > + */
> > +DEFINE_RAW_SPINLOCK(pci_config_lock);
> > +static DEFINE_MUTEX(pci_scan_mutex);
> > +
> > +int register_pci_controller(struct pci_channel *hose)
> > +{
> > + int i;
> > +
> > + for (i = 0; i < hose->nr_resources; i++) {
> > + struct resource *res = hose->resources + i;
> > +
> > + if (res->flags & IORESOURCE_IO) {
> > + if (request_resource(&ioport_resource, res) < 0)
> > + goto out;
> > + } else {
> > + if (request_resource(&iomem_resource, res) < 0)
> > + goto out;
> > + }
> > + }
> > +
> > + *hose_tail = hose;
> > + hose_tail = &hose->next;
> > +
> > + /*
> > + * Do not panic here but later - this might happen before console init.
> > + */
> > + if (!hose->io_map_base) {
> > + printk(KERN_WARNING
> > + "registering PCI controller with io_map_base unset\n");
> > + }
> > +
> > + /*
> > + * Setup the ERR/PERR and SERR timers, if available.
> > + */
> > + pcibios_enable_timers(hose);
> > +
> > + /*
> > + * Scan the bus if it is register after the PCI subsystem
> > + * initialization.
> > + */
> > + if (pci_initialized) {
> > + mutex_lock(&pci_scan_mutex);
> > + pcibios_scanbus(hose);
> > + mutex_unlock(&pci_scan_mutex);
> > + }
> > +
> > + return 0;
> > +
> > +out:
> > + for (--i; i >= 0; i--)
> > + release_resource(&hose->resources[i]);
> > +
> > + printk(KERN_WARNING "Skipping PCI bus scan due to resource conflict\n");
> > + return -1;
> > +}
> > +
> > +#ifndef CONFIG_SH_DEVICE_TREE
> > +static int __init pcibios_init(void)
> > +{
> > + struct pci_channel *hose;
> > +
> > + /* Scan all of the recorded PCI controllers. */
> > + for (hose = hose_head; hose; hose = hose->next)
> > + pcibios_scanbus(hose);
> > +
> > + pci_fixup_irqs(pci_common_swizzle, pcibios_map_platform_irq);
> > +
> > + dma_debug_add_bus(&pci_bus_type);
> > +
> > + pci_initialized = 1;
> > +
> > + return 0;
> > +}
> > +subsys_initcall(pcibios_init);
> > +#endif
> > +
> > +/*
> > + * Called after each bus is probed, but before its children
> > + * are examined.
> > + */
> > +void pcibios_fixup_bus(struct pci_bus *bus)
> > +{
> > +}
> > +
> > +#ifndef CONFIG_SH_DEVICE_TREE
> > +/*
> > + * We need to avoid collisions with `mirrored' VGA ports
> > + * and other strange ISA hardware, so we always want the
> > + * addresses to be allocated in the 0x000-0x0ff region
> > + * modulo 0x400.
> > + */
> > +resource_size_t pcibios_align_resource(void *data, const struct resource *res,
> > + resource_size_t size, resource_size_t align)
> > +{
> > + struct pci_dev *dev = data;
> > + struct pci_channel *hose = dev->sysdata;
> > + resource_size_t start = res->start;
> > +
> > + if (res->flags & IORESOURCE_IO) {
> > + if (start < PCIBIOS_MIN_IO + hose->resources[0].start)
> > + start = PCIBIOS_MIN_IO + hose->resources[0].start;
> > +
> > + /*
> > + * Put everything into 0x00-0xff region modulo 0x400.
> > + */
> > + if (start & 0x300)
> > + start = (start + 0x3ff) & ~0x3ff;
> > + }
> > +
> > + return start;
> > +}
> > +#else
> > +typedef resource_size_t (*align_resource_fn)(struct pci_dev *dev,
> > + const struct resource *res,
> > + resource_size_t start,
> > + resource_size_t size,
> > + resource_size_t align);
> > +
> > +resource_size_t pcibios_align_resource(void *data, const struct resource *res,
> > + resource_size_t size, resource_size_t align)
> > +{
> > + resource_size_t start = res->start;
> > + struct pci_dev *dev = data;
> > + struct pci_config_window *cfg = dev->sysdata;
> > + align_resource_fn fn;
> > +
> > + fn = (align_resource_fn)(cfg->priv);
> > + return fn(dev, res, start, size, align);
> > +}
> > +#endif
> > +
> > +static void __init
> > +pcibios_bus_report_status_early(struct pci_channel *hose,
> > + int top_bus, int current_bus,
> > + unsigned int status_mask, int warn)
> > +{
> > + unsigned int pci_devfn;
> > + u16 status;
> > + int ret;
> > +
> > + for (pci_devfn = 0; pci_devfn < 0xff; pci_devfn++) {
> > + if (PCI_FUNC(pci_devfn))
> > + continue;
> > + ret = early_read_config_word(hose, top_bus, current_bus,
> > + pci_devfn, PCI_STATUS, &status);
> > + if (ret != PCIBIOS_SUCCESSFUL)
> > + continue;
> > + if (status == 0xffff)
> > + continue;
> > +
> > + early_write_config_word(hose, top_bus, current_bus,
> > + pci_devfn, PCI_STATUS,
> > + status & status_mask);
> > + if (warn)
> > + printk("(%02x:%02x: %04X) ", current_bus,
> > + pci_devfn, status);
> > + }
> > +}
> > +
> > +/*
> > + * We can't use pci_find_device() here since we are
> > + * called from interrupt context.
> > + */
> > +static void __init_refok
> > +pcibios_bus_report_status(struct pci_bus *bus, unsigned int status_mask,
> > + int warn)
> > +{
> > + struct pci_dev *dev;
> > +
> > + list_for_each_entry(dev, &bus->devices, bus_list) {
> > + u16 status;
> > +
> > + /*
> > + * ignore host bridge - we handle
> > + * that separately
> > + */
> > + if (dev->bus->number == 0 && dev->devfn == 0)
> > + continue;
> > +
> > + pci_read_config_word(dev, PCI_STATUS, &status);
> > + if (status == 0xffff)
> > + continue;
> > +
> > + if ((status & status_mask) == 0)
> > + continue;
> > +
> > + /* clear the status errors */
> > + pci_write_config_word(dev, PCI_STATUS, status & status_mask);
> > +
> > + if (warn)
> > + printk("(%s: %04X) ", pci_name(dev), status);
> > + }
> > +
> > + list_for_each_entry(dev, &bus->devices, bus_list)
> > + if (dev->subordinate)
> > + pcibios_bus_report_status(dev->subordinate, status_mask, warn);
> > +}
> > +
> > +void __init_refok pcibios_report_status(unsigned int status_mask, int warn)
> > +{
> > + struct pci_channel *hose;
> > +
> > + for (hose = hose_head; hose; hose = hose->next) {
> > + if (unlikely(!hose->bus))
> > + pcibios_bus_report_status_early(hose, hose_head->index,
> > + hose->index, status_mask, warn);
> > + else
> > + pcibios_bus_report_status(hose->bus, status_mask, warn);
> > + }
> > +}
> > +
> > +int pci_mmap_page_range(struct pci_dev *dev, struct vm_area_struct *vma,
> > + enum pci_mmap_state mmap_state, int write_combine)
> > +{
> > + /*
> > + * I/O space can be accessed via normal processor loads and stores on
> > + * this platform but for now we elect not to do this and portable
> > + * drivers should not do this anyway.
> > + */
> > + if (mmap_state == pci_mmap_io)
> > + return -EINVAL;
> > +
> > + /*
> > + * Ignore write-combine; for now only return uncached mappings.
> > + */
> > + vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot);
> > +
> > + return remap_pfn_range(vma, vma->vm_start, vma->vm_pgoff,
> > + vma->vm_end - vma->vm_start,
> > + vma->vm_page_prot);
> > +}
> > +
> > +#ifndef CONFIG_GENERIC_IOMAP
> > +
> > +void __iomem *__pci_ioport_map(struct pci_dev *dev,
> > + unsigned long port, unsigned int nr)
> > +{
> > + struct pci_channel *chan = dev->sysdata;
> > +
> > + if (unlikely(!chan->io_map_base)) {
> > + chan->io_map_base = sh_io_port_base;
> > +
> > + if (pci_domains_supported)
> > + panic("To avoid data corruption io_map_base MUST be "
> > + "set with multiple PCI domains.");
> > + }
> > +
> > + return (void __iomem *)(chan->io_map_base + port);
> > +}
> > +
> > +void pci_iounmap(struct pci_dev *dev, void __iomem *addr)
> > +{
> > + iounmap(addr);
> > +}
> > +EXPORT_SYMBOL(pci_iounmap);
> > +
> > +#endif /* CONFIG_GENERIC_IOMAP */
> > +
> > +EXPORT_SYMBOL(PCIBIOS_MIN_IO);
> > +EXPORT_SYMBOL(PCIBIOS_MIN_MEM);
> > --
> > 2.7.0
> >
> > --
>
> Is this code specific to particular PCI bus hardware on Renesas SH
> systems? If so it probably should be kept as a driver file rather than
> in arch/sh/kernel core, but I don't actually see a lot of code that
> looks hardware-specific. If there's not actually much or anything
> hardware-specific about it, could we perhaps unify it with other PCI
> bus support code outside or arch/sh?
>
> Rich
Yes. Common PCI framework required this functions.
I think put arch/sh/kernel is more better.
--
Yoshinori Sato
<ysato@users.sourceforge.jp>
^ permalink raw reply [flat|nested] 138+ messages in thread
* [PATCH v5 16/22] pci: pci_config_window move to linux/pci.h
2016-07-03 16:46 ` Yoshinori Sato
@ 2016-07-03 16:46 ` Yoshinori Sato
-1 siblings, 0 replies; 138+ messages in thread
From: Yoshinori Sato @ 2016-07-03 16:46 UTC (permalink / raw)
To: linux-pci, linux-sh, linux-kernel; +Cc: Yoshinori Sato
Chanegs v4
none
Signed-off-by: Yoshinori Sato <ysato@users.sourceforge.jp>
---
drivers/pci/ecam.h | 17 +----------------
include/linux/pci.h | 18 ++++++++++++++++++
2 files changed, 19 insertions(+), 16 deletions(-)
diff --git a/drivers/pci/ecam.h b/drivers/pci/ecam.h
index 9878beb..f110091 100644
--- a/drivers/pci/ecam.h
+++ b/drivers/pci/ecam.h
@@ -18,6 +18,7 @@
#include <linux/kernel.h>
#include <linux/platform_device.h>
+#include <linux/pci.h>
/*
* struct to hold pci ops and bus shift of the config window
@@ -31,22 +32,6 @@ struct pci_ecam_ops {
struct pci_config_window *);
};
-/*
- * struct to hold the mappings of a config space window. This
- * is expected to be used as sysdata for PCI controllers that
- * use ECAM.
- */
-struct pci_config_window {
- struct resource res;
- struct resource busr;
- void *priv;
- struct pci_ecam_ops *ops;
- union {
- void __iomem *win; /* 64-bit single mapping */
- void __iomem **winp; /* 32-bit per-bus mapping */
- };
-};
-
/* create and free pci_config_window */
struct pci_config_window *pci_ecam_create(struct device *dev,
struct resource *cfgres, struct resource *busr,
diff --git a/include/linux/pci.h b/include/linux/pci.h
index b67e4df..398896f 100644
--- a/include/linux/pci.h
+++ b/include/linux/pci.h
@@ -2026,6 +2026,24 @@ static inline bool pci_ari_enabled(struct pci_bus *bus)
return bus->self && bus->self->ari_enabled;
}
+/*
+ * struct to hold the mappings of a config space window. This
+ * is expected to be used as sysdata for PCI controllers that
+ * use ECAM.
+ */
+struct pci_ecam_ops;
+
+struct pci_config_window {
+ struct resource res;
+ struct resource busr;
+ void *priv;
+ struct pci_ecam_ops *ops;
+ union {
+ void __iomem *win; /* 64-bit single mapping */
+ void __iomem **winp; /* 32-bit per-bus mapping */
+ };
+};
+
/* provide the legacy pci_dma_* API */
#include <linux/pci-dma-compat.h>
--
2.7.0
^ permalink raw reply related [flat|nested] 138+ messages in thread* [PATCH v5 16/22] pci: pci_config_window move to linux/pci.h
@ 2016-07-03 16:46 ` Yoshinori Sato
0 siblings, 0 replies; 138+ messages in thread
From: Yoshinori Sato @ 2016-07-03 16:46 UTC (permalink / raw)
To: linux-pci, linux-sh, linux-kernel; +Cc: Yoshinori Sato
Chanegs v4
none
Signed-off-by: Yoshinori Sato <ysato@users.sourceforge.jp>
---
drivers/pci/ecam.h | 17 +----------------
include/linux/pci.h | 18 ++++++++++++++++++
2 files changed, 19 insertions(+), 16 deletions(-)
diff --git a/drivers/pci/ecam.h b/drivers/pci/ecam.h
index 9878beb..f110091 100644
--- a/drivers/pci/ecam.h
+++ b/drivers/pci/ecam.h
@@ -18,6 +18,7 @@
#include <linux/kernel.h>
#include <linux/platform_device.h>
+#include <linux/pci.h>
/*
* struct to hold pci ops and bus shift of the config window
@@ -31,22 +32,6 @@ struct pci_ecam_ops {
struct pci_config_window *);
};
-/*
- * struct to hold the mappings of a config space window. This
- * is expected to be used as sysdata for PCI controllers that
- * use ECAM.
- */
-struct pci_config_window {
- struct resource res;
- struct resource busr;
- void *priv;
- struct pci_ecam_ops *ops;
- union {
- void __iomem *win; /* 64-bit single mapping */
- void __iomem **winp; /* 32-bit per-bus mapping */
- };
-};
-
/* create and free pci_config_window */
struct pci_config_window *pci_ecam_create(struct device *dev,
struct resource *cfgres, struct resource *busr,
diff --git a/include/linux/pci.h b/include/linux/pci.h
index b67e4df..398896f 100644
--- a/include/linux/pci.h
+++ b/include/linux/pci.h
@@ -2026,6 +2026,24 @@ static inline bool pci_ari_enabled(struct pci_bus *bus)
return bus->self && bus->self->ari_enabled;
}
+/*
+ * struct to hold the mappings of a config space window. This
+ * is expected to be used as sysdata for PCI controllers that
+ * use ECAM.
+ */
+struct pci_ecam_ops;
+
+struct pci_config_window {
+ struct resource res;
+ struct resource busr;
+ void *priv;
+ struct pci_ecam_ops *ops;
+ union {
+ void __iomem *win; /* 64-bit single mapping */
+ void __iomem **winp; /* 32-bit per-bus mapping */
+ };
+};
+
/* provide the legacy pci_dma_* API */
#include <linux/pci-dma-compat.h>
--
2.7.0
^ permalink raw reply related [flat|nested] 138+ messages in thread
* [PATCH v5 17/22] pci: PCI_HOST_GENERIC enable for SH
2016-07-03 16:46 ` Yoshinori Sato
@ 2016-07-03 16:46 ` Yoshinori Sato
-1 siblings, 0 replies; 138+ messages in thread
From: Yoshinori Sato @ 2016-07-03 16:46 UTC (permalink / raw)
To: linux-pci, linux-sh, linux-kernel; +Cc: Yoshinori Sato
Changes v4
none
Signed-off-by: Yoshinori Sato <ysato@users.sourceforge.jp>
---
drivers/pci/host/Kconfig | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/pci/host/Kconfig b/drivers/pci/host/Kconfig
index df60505..83184eb 100644
--- a/drivers/pci/host/Kconfig
+++ b/drivers/pci/host/Kconfig
@@ -83,7 +83,7 @@ config PCI_HOST_COMMON
config PCI_HOST_GENERIC
bool "Generic PCI host controller"
- depends on (ARM || ARM64) && OF
+ depends on (ARM || ARM64 || SUPERH) && OF
select PCI_HOST_COMMON
help
Say Y here if you want to support a simple generic PCI host
--
2.7.0
^ permalink raw reply related [flat|nested] 138+ messages in thread
* [PATCH v5 17/22] pci: PCI_HOST_GENERIC enable for SH
@ 2016-07-03 16:46 ` Yoshinori Sato
0 siblings, 0 replies; 138+ messages in thread
From: Yoshinori Sato @ 2016-07-03 16:46 UTC (permalink / raw)
To: linux-pci, linux-sh, linux-kernel; +Cc: Yoshinori Sato
Changes v4
none
Signed-off-by: Yoshinori Sato <ysato@users.sourceforge.jp>
---
drivers/pci/host/Kconfig | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/pci/host/Kconfig b/drivers/pci/host/Kconfig
index df60505..83184eb 100644
--- a/drivers/pci/host/Kconfig
+++ b/drivers/pci/host/Kconfig
@@ -83,7 +83,7 @@ config PCI_HOST_COMMON
config PCI_HOST_GENERIC
bool "Generic PCI host controller"
- depends on (ARM || ARM64) && OF
+ depends on (ARM || ARM64 || SUPERH) && OF
select PCI_HOST_COMMON
help
Say Y here if you want to support a simple generic PCI host
--
2.7.0
^ permalink raw reply related [flat|nested] 138+ messages in thread
* [PATCH v5 18/22] sh: Add separate DTB build rule
2016-07-03 16:46 ` Yoshinori Sato
@ 2016-07-03 16:46 ` Yoshinori Sato
-1 siblings, 0 replies; 138+ messages in thread
From: Yoshinori Sato @ 2016-07-03 16:46 UTC (permalink / raw)
To: linux-sh, linux-kernel; +Cc: Yoshinori Sato
Signed-off-by: Yoshinori Sato <ysato@users.sourceforge.jp>
---
arch/sh/Makefile | 7 +++++++
arch/sh/boot/dts/Makefile | 2 ++
2 files changed, 9 insertions(+)
diff --git a/arch/sh/Makefile b/arch/sh/Makefile
index 8adffa8..a44e630 100644
--- a/arch/sh/Makefile
+++ b/arch/sh/Makefile
@@ -189,6 +189,13 @@ drivers-$(CONFIG_OPROFILE) += arch/sh/oprofile/
boot := arch/sh/boot
+%.dtb %.dtb.S %.dtb.o: | scripts
+ $(Q)$(MAKE) $(build)=arch/sh/boot/dts arch/sh/boot/dts/$@
+
+PHONY += dtbs
+dtbs: scripts
+ $(Q)$(MAKE) $(build)=arch/sh/boot/dts
+
cflags-y += $(foreach d, $(cpuincdir-y), -Iarch/sh/include/$(d)) \
$(foreach d, $(machdir-y), -Iarch/sh/include/$(d))
diff --git a/arch/sh/boot/dts/Makefile b/arch/sh/boot/dts/Makefile
index e5ce3a0..38fdc38 100644
--- a/arch/sh/boot/dts/Makefile
+++ b/arch/sh/boot/dts/Makefile
@@ -1,3 +1,5 @@
obj-$(CONFIG_USE_BUILTIN_DTB) += $(patsubst "%",%,$(CONFIG_BUILTIN_DTB_SOURCE)).dtb.o
+dtstree := $(srctree)/$(src)
clean-files := *.dtb.S
+always := $(dtb-y)
--
2.7.0
^ permalink raw reply related [flat|nested] 138+ messages in thread
* [PATCH v5 18/22] sh: Add separate DTB build rule
@ 2016-07-03 16:46 ` Yoshinori Sato
0 siblings, 0 replies; 138+ messages in thread
From: Yoshinori Sato @ 2016-07-03 16:46 UTC (permalink / raw)
To: linux-sh, linux-kernel; +Cc: Yoshinori Sato
Signed-off-by: Yoshinori Sato <ysato@users.sourceforge.jp>
---
arch/sh/Makefile | 7 +++++++
arch/sh/boot/dts/Makefile | 2 ++
2 files changed, 9 insertions(+)
diff --git a/arch/sh/Makefile b/arch/sh/Makefile
index 8adffa8..a44e630 100644
--- a/arch/sh/Makefile
+++ b/arch/sh/Makefile
@@ -189,6 +189,13 @@ drivers-$(CONFIG_OPROFILE) += arch/sh/oprofile/
boot := arch/sh/boot
+%.dtb %.dtb.S %.dtb.o: | scripts
+ $(Q)$(MAKE) $(build)=arch/sh/boot/dts arch/sh/boot/dts/$@
+
+PHONY += dtbs
+dtbs: scripts
+ $(Q)$(MAKE) $(build)=arch/sh/boot/dts
+
cflags-y += $(foreach d, $(cpuincdir-y), -Iarch/sh/include/$(d)) \
$(foreach d, $(machdir-y), -Iarch/sh/include/$(d))
diff --git a/arch/sh/boot/dts/Makefile b/arch/sh/boot/dts/Makefile
index e5ce3a0..38fdc38 100644
--- a/arch/sh/boot/dts/Makefile
+++ b/arch/sh/boot/dts/Makefile
@@ -1,3 +1,5 @@
obj-$(CONFIG_USE_BUILTIN_DTB) += $(patsubst "%",%,$(CONFIG_BUILTIN_DTB_SOURCE)).dtb.o
+dtstree := $(srctree)/$(src)
clean-files := *.dtb.S
+always := $(dtb-y)
--
2.7.0
^ permalink raw reply related [flat|nested] 138+ messages in thread
* [PATCH v5 19/22] sh: IO-DATA HDL-U (a.k.a landisk) IRQCHIP driver
2016-07-03 16:46 ` Yoshinori Sato
@ 2016-07-03 16:46 ` Yoshinori Sato
-1 siblings, 0 replies; 138+ messages in thread
From: Yoshinori Sato @ 2016-07-03 16:46 UTC (permalink / raw)
To: devicetree, linux-sh, linux-kernel; +Cc: Yoshinori Sato
Signed-off-by: Yoshinori Sato <ysato@users.sourceforge.jp>
---
.../interrupt-controller/iodata-landisk.txt | 31 ++++++++++
drivers/irqchip/Makefile | 2 +-
drivers/irqchip/irq-io-landisk.c | 72 ++++++++++++++++++++++
3 files changed, 104 insertions(+), 1 deletion(-)
create mode 100644 Documentation/devicetree/bindings/interrupt-controller/iodata-landisk.txt
create mode 100644 drivers/irqchip/irq-io-landisk.c
diff --git a/Documentation/devicetree/bindings/interrupt-controller/iodata-landisk.txt b/Documentation/devicetree/bindings/interrupt-controller/iodata-landisk.txt
new file mode 100644
index 0000000..cf461dc
--- /dev/null
+++ b/Documentation/devicetree/bindings/interrupt-controller/iodata-landisk.txt
@@ -0,0 +1,31 @@
+DT bindings for the I/O DATA HDL-U interrupt controller
+
+Required properties:
+
+ - compatible: has to be "iodata,landisk-intc".
+
+ - reg: Base address and length of interrupt controller register.
+
+ - #interrupt-cells: has to be <1>: an interrupt index.
+
+ - #address-cells: has to be <0>
+
+ - interrupt-map: Interrupt mapping on parent controller.
+
+Example
+-------
+
+ cpldintc: cpld@b0000000 {
+ compatible = "iodata,landisk-intc";
+ #interrupt-cells = <1>;
+ #address-cells = <0>;
+ reg = <0xb0000000 8>;
+ interrupt-map=<0 &shintc evt2irq(0x2a0)>,
+ <1 &shintc evt2irq(0x2c0)>,
+ <2 &shintc evt2irq(0x2e0)>,
+ <3 &shintc evt2irq(0x300)>,
+ <4 &shintc evt2irq(0x320)>,
+ <5 &shintc evt2irq(0x340)>,
+ <6 &shintc evt2irq(0x360)>,
+ <7 &shintc evt2irq(0x380)>;
+ };
diff --git a/drivers/irqchip/Makefile b/drivers/irqchip/Makefile
index 2ab5735..5e225cf 100644
--- a/drivers/irqchip/Makefile
+++ b/drivers/irqchip/Makefile
@@ -69,4 +69,4 @@ obj-$(CONFIG_PIC32_EVIC) += irq-pic32-evic.o
obj-$(CONFIG_MVEBU_ODMI) += irq-mvebu-odmi.o
obj-$(CONFIG_LS_SCFG_MSI) += irq-ls-scfg-msi.o
obj-$(CONFIG_EZNPS_GIC) += irq-eznps.o
-obj-$(CONFIG_RENESAS_SH_INTC) += irq-renesas-sh7751.o
+obj-$(CONFIG_RENESAS_SH_INTC) += irq-renesas-sh7751.o irq-io-landisk.o
diff --git a/drivers/irqchip/irq-io-landisk.c b/drivers/irqchip/irq-io-landisk.c
new file mode 100644
index 0000000..b7f3b41
--- /dev/null
+++ b/drivers/irqchip/irq-io-landisk.c
@@ -0,0 +1,72 @@
+/*
+ * IO-DATA LANDISK CPLD IRQ driver
+ *
+ * Copyright 2016 Yoshinori Sato <ysato@users.sourceforge.jp>
+ */
+
+#include <linux/init.h>
+#include <linux/irq.h>
+#include <linux/irqchip.h>
+#include <linux/irqdomain.h>
+#include <linux/of_address.h>
+#include <linux/of_irq.h>
+#include <linux/io.h>
+
+static void landisk_mask_irq(struct irq_data *data)
+{
+ u8 mask = __raw_readb(data->chip_data + 5);
+
+ mask &= ~(1 << (data->irq - 5));
+ __raw_writeb(mask, data->chip_data + 5);
+}
+
+static void landisk_unmask_irq(struct irq_data *data)
+{
+ u8 mask = __raw_readb(data->chip_data + 5);
+
+ mask |= (1 << (data->irq - 5));
+ __raw_writeb(mask, data->chip_data + 5);
+}
+
+static struct irq_chip cpld_irq_chip = {
+ .name = "LANDISK-CPLD",
+ .irq_unmask = landisk_unmask_irq,
+ .irq_mask = landisk_mask_irq,
+};
+
+static int cpld_map(struct irq_domain *d, unsigned int virq,
+ irq_hw_number_t hw_irq_num)
+{
+ irq_set_chip_and_handler(virq, &cpld_irq_chip,
+ handle_simple_irq);
+ irq_set_chip_data(virq, d->host_data);
+
+ return 0;
+}
+
+static struct irq_domain_ops irq_ops = {
+ .xlate = irq_domain_xlate_onecell,
+ .map = cpld_map,
+};
+
+static int __init landisk_intc_of_init(struct device_node *intc,
+ struct device_node *parent)
+{
+ struct irq_domain *domain, *pdomain;
+ int num_irqpin;
+ void *baseaddr;
+
+ baseaddr = of_iomap(intc, 0);
+ pdomain = irq_find_host(parent);
+ of_get_property(intc, "interrupt-map", &num_irqpin);
+ num_irqpin /= sizeof(u32) * 3;
+ domain = irq_domain_create_hierarchy(pdomain, 0, num_irqpin,
+ of_node_to_fwnode(intc),
+ &irq_ops, baseaddr);
+ if (!domain)
+ panic("%s: unable to create IRQ domain\n", intc->full_name);
+ irq_domain_associate_many(domain, 5, 0, 8);
+ return 0;
+}
+
+IRQCHIP_DECLARE(cpld_intc, "iodata,landisk-intc", landisk_intc_of_init);
--
2.7.0
^ permalink raw reply related [flat|nested] 138+ messages in thread* [PATCH v5 19/22] sh: IO-DATA HDL-U (a.k.a landisk) IRQCHIP driver
@ 2016-07-03 16:46 ` Yoshinori Sato
0 siblings, 0 replies; 138+ messages in thread
From: Yoshinori Sato @ 2016-07-03 16:46 UTC (permalink / raw)
To: devicetree, linux-sh, linux-kernel; +Cc: Yoshinori Sato
Signed-off-by: Yoshinori Sato <ysato@users.sourceforge.jp>
---
.../interrupt-controller/iodata-landisk.txt | 31 ++++++++++
drivers/irqchip/Makefile | 2 +-
drivers/irqchip/irq-io-landisk.c | 72 ++++++++++++++++++++++
3 files changed, 104 insertions(+), 1 deletion(-)
create mode 100644 Documentation/devicetree/bindings/interrupt-controller/iodata-landisk.txt
create mode 100644 drivers/irqchip/irq-io-landisk.c
diff --git a/Documentation/devicetree/bindings/interrupt-controller/iodata-landisk.txt b/Documentation/devicetree/bindings/interrupt-controller/iodata-landisk.txt
new file mode 100644
index 0000000..cf461dc
--- /dev/null
+++ b/Documentation/devicetree/bindings/interrupt-controller/iodata-landisk.txt
@@ -0,0 +1,31 @@
+DT bindings for the I/O DATA HDL-U interrupt controller
+
+Required properties:
+
+ - compatible: has to be "iodata,landisk-intc".
+
+ - reg: Base address and length of interrupt controller register.
+
+ - #interrupt-cells: has to be <1>: an interrupt index.
+
+ - #address-cells: has to be <0>
+
+ - interrupt-map: Interrupt mapping on parent controller.
+
+Example
+-------
+
+ cpldintc: cpld@b0000000 {
+ compatible = "iodata,landisk-intc";
+ #interrupt-cells = <1>;
+ #address-cells = <0>;
+ reg = <0xb0000000 8>;
+ interrupt-map=<0 &shintc evt2irq(0x2a0)>,
+ <1 &shintc evt2irq(0x2c0)>,
+ <2 &shintc evt2irq(0x2e0)>,
+ <3 &shintc evt2irq(0x300)>,
+ <4 &shintc evt2irq(0x320)>,
+ <5 &shintc evt2irq(0x340)>,
+ <6 &shintc evt2irq(0x360)>,
+ <7 &shintc evt2irq(0x380)>;
+ };
diff --git a/drivers/irqchip/Makefile b/drivers/irqchip/Makefile
index 2ab5735..5e225cf 100644
--- a/drivers/irqchip/Makefile
+++ b/drivers/irqchip/Makefile
@@ -69,4 +69,4 @@ obj-$(CONFIG_PIC32_EVIC) += irq-pic32-evic.o
obj-$(CONFIG_MVEBU_ODMI) += irq-mvebu-odmi.o
obj-$(CONFIG_LS_SCFG_MSI) += irq-ls-scfg-msi.o
obj-$(CONFIG_EZNPS_GIC) += irq-eznps.o
-obj-$(CONFIG_RENESAS_SH_INTC) += irq-renesas-sh7751.o
+obj-$(CONFIG_RENESAS_SH_INTC) += irq-renesas-sh7751.o irq-io-landisk.o
diff --git a/drivers/irqchip/irq-io-landisk.c b/drivers/irqchip/irq-io-landisk.c
new file mode 100644
index 0000000..b7f3b41
--- /dev/null
+++ b/drivers/irqchip/irq-io-landisk.c
@@ -0,0 +1,72 @@
+/*
+ * IO-DATA LANDISK CPLD IRQ driver
+ *
+ * Copyright 2016 Yoshinori Sato <ysato@users.sourceforge.jp>
+ */
+
+#include <linux/init.h>
+#include <linux/irq.h>
+#include <linux/irqchip.h>
+#include <linux/irqdomain.h>
+#include <linux/of_address.h>
+#include <linux/of_irq.h>
+#include <linux/io.h>
+
+static void landisk_mask_irq(struct irq_data *data)
+{
+ u8 mask = __raw_readb(data->chip_data + 5);
+
+ mask &= ~(1 << (data->irq - 5));
+ __raw_writeb(mask, data->chip_data + 5);
+}
+
+static void landisk_unmask_irq(struct irq_data *data)
+{
+ u8 mask = __raw_readb(data->chip_data + 5);
+
+ mask |= (1 << (data->irq - 5));
+ __raw_writeb(mask, data->chip_data + 5);
+}
+
+static struct irq_chip cpld_irq_chip = {
+ .name = "LANDISK-CPLD",
+ .irq_unmask = landisk_unmask_irq,
+ .irq_mask = landisk_mask_irq,
+};
+
+static int cpld_map(struct irq_domain *d, unsigned int virq,
+ irq_hw_number_t hw_irq_num)
+{
+ irq_set_chip_and_handler(virq, &cpld_irq_chip,
+ handle_simple_irq);
+ irq_set_chip_data(virq, d->host_data);
+
+ return 0;
+}
+
+static struct irq_domain_ops irq_ops = {
+ .xlate = irq_domain_xlate_onecell,
+ .map = cpld_map,
+};
+
+static int __init landisk_intc_of_init(struct device_node *intc,
+ struct device_node *parent)
+{
+ struct irq_domain *domain, *pdomain;
+ int num_irqpin;
+ void *baseaddr;
+
+ baseaddr = of_iomap(intc, 0);
+ pdomain = irq_find_host(parent);
+ of_get_property(intc, "interrupt-map", &num_irqpin);
+ num_irqpin /= sizeof(u32) * 3;
+ domain = irq_domain_create_hierarchy(pdomain, 0, num_irqpin,
+ of_node_to_fwnode(intc),
+ &irq_ops, baseaddr);
+ if (!domain)
+ panic("%s: unable to create IRQ domain\n", intc->full_name);
+ irq_domain_associate_many(domain, 5, 0, 8);
+ return 0;
+}
+
+IRQCHIP_DECLARE(cpld_intc, "iodata,landisk-intc", landisk_intc_of_init);
--
2.7.0
^ permalink raw reply related [flat|nested] 138+ messages in thread* Re: [PATCH v5 19/22] sh: IO-DATA HDL-U (a.k.a landisk) IRQCHIP driver
2016-07-03 16:46 ` Yoshinori Sato
@ 2016-07-11 14:02 ` Rob Herring
-1 siblings, 0 replies; 138+ messages in thread
From: Rob Herring @ 2016-07-11 14:02 UTC (permalink / raw)
To: Yoshinori Sato; +Cc: devicetree, linux-sh, linux-kernel
On Mon, Jul 04, 2016 at 01:46:39AM +0900, Yoshinori Sato wrote:
> Signed-off-by: Yoshinori Sato <ysato@users.sourceforge.jp>
> ---
> .../interrupt-controller/iodata-landisk.txt | 31 ++++++++++
> drivers/irqchip/Makefile | 2 +-
> drivers/irqchip/irq-io-landisk.c | 72 ++++++++++++++++++++++
> 3 files changed, 104 insertions(+), 1 deletion(-)
> create mode 100644 Documentation/devicetree/bindings/interrupt-controller/iodata-landisk.txt
> create mode 100644 drivers/irqchip/irq-io-landisk.c
>
> diff --git a/Documentation/devicetree/bindings/interrupt-controller/iodata-landisk.txt b/Documentation/devicetree/bindings/interrupt-controller/iodata-landisk.txt
> new file mode 100644
> index 0000000..cf461dc
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/interrupt-controller/iodata-landisk.txt
> @@ -0,0 +1,31 @@
> +DT bindings for the I/O DATA HDL-U interrupt controller
> +
> +Required properties:
> +
> + - compatible: has to be "iodata,landisk-intc".
> +
> + - reg: Base address and length of interrupt controller register.
> +
> + - #interrupt-cells: has to be <1>: an interrupt index.
> +
> + - #address-cells: has to be <0>
> +
> + - interrupt-map: Interrupt mapping on parent controller.
> +
> +Example
> +-------
> +
> + cpldintc: cpld@b0000000 {
> + compatible = "iodata,landisk-intc";
> + #interrupt-cells = <1>;
> + #address-cells = <0>;
> + reg = <0xb0000000 8>;
> + interrupt-map=<0 &shintc evt2irq(0x2a0)>,
What is evt2irq? We only allow simple defines for DT files, not complex
macros.
Spaces around the '=' also needed.
> + <1 &shintc evt2irq(0x2c0)>,
> + <2 &shintc evt2irq(0x2e0)>,
> + <3 &shintc evt2irq(0x300)>,
> + <4 &shintc evt2irq(0x320)>,
> + <5 &shintc evt2irq(0x340)>,
> + <6 &shintc evt2irq(0x360)>,
> + <7 &shintc evt2irq(0x380)>;
> + };
^ permalink raw reply [flat|nested] 138+ messages in thread* Re: [PATCH v5 19/22] sh: IO-DATA HDL-U (a.k.a landisk) IRQCHIP driver
@ 2016-07-11 14:02 ` Rob Herring
0 siblings, 0 replies; 138+ messages in thread
From: Rob Herring @ 2016-07-11 14:02 UTC (permalink / raw)
To: Yoshinori Sato; +Cc: devicetree, linux-sh, linux-kernel
On Mon, Jul 04, 2016 at 01:46:39AM +0900, Yoshinori Sato wrote:
> Signed-off-by: Yoshinori Sato <ysato@users.sourceforge.jp>
> ---
> .../interrupt-controller/iodata-landisk.txt | 31 ++++++++++
> drivers/irqchip/Makefile | 2 +-
> drivers/irqchip/irq-io-landisk.c | 72 ++++++++++++++++++++++
> 3 files changed, 104 insertions(+), 1 deletion(-)
> create mode 100644 Documentation/devicetree/bindings/interrupt-controller/iodata-landisk.txt
> create mode 100644 drivers/irqchip/irq-io-landisk.c
>
> diff --git a/Documentation/devicetree/bindings/interrupt-controller/iodata-landisk.txt b/Documentation/devicetree/bindings/interrupt-controller/iodata-landisk.txt
> new file mode 100644
> index 0000000..cf461dc
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/interrupt-controller/iodata-landisk.txt
> @@ -0,0 +1,31 @@
> +DT bindings for the I/O DATA HDL-U interrupt controller
> +
> +Required properties:
> +
> + - compatible: has to be "iodata,landisk-intc".
> +
> + - reg: Base address and length of interrupt controller register.
> +
> + - #interrupt-cells: has to be <1>: an interrupt index.
> +
> + - #address-cells: has to be <0>
> +
> + - interrupt-map: Interrupt mapping on parent controller.
> +
> +Example
> +-------
> +
> + cpldintc: cpld@b0000000 {
> + compatible = "iodata,landisk-intc";
> + #interrupt-cells = <1>;
> + #address-cells = <0>;
> + reg = <0xb0000000 8>;
> + interrupt-map=<0 &shintc evt2irq(0x2a0)>,
What is evt2irq? We only allow simple defines for DT files, not complex
macros.
Spaces around the '=' also needed.
> + <1 &shintc evt2irq(0x2c0)>,
> + <2 &shintc evt2irq(0x2e0)>,
> + <3 &shintc evt2irq(0x300)>,
> + <4 &shintc evt2irq(0x320)>,
> + <5 &shintc evt2irq(0x340)>,
> + <6 &shintc evt2irq(0x360)>,
> + <7 &shintc evt2irq(0x380)>;
> + };
^ permalink raw reply [flat|nested] 138+ messages in thread
* [PATCH v5 20/22] sh: IO-DATA HDL-U (a.k.a landisk) DeviceTree
2016-07-03 16:46 ` Yoshinori Sato
@ 2016-07-03 16:46 ` Yoshinori Sato
-1 siblings, 0 replies; 138+ messages in thread
From: Yoshinori Sato @ 2016-07-03 16:46 UTC (permalink / raw)
To: devicetree, linux-sh, linux-kernel; +Cc: Yoshinori Sato
Signed-off-by: Yoshinori Sato <ysato@users.sourceforge.jp>
---
arch/sh/boot/dts/Makefile | 2 ++
arch/sh/boot/dts/landisk.dts | 61 ++++++++++++++++++++++++++++++++++++++++++++
2 files changed, 63 insertions(+)
create mode 100644 arch/sh/boot/dts/landisk.dts
diff --git a/arch/sh/boot/dts/Makefile b/arch/sh/boot/dts/Makefile
index 38fdc38..cf5aec4 100644
--- a/arch/sh/boot/dts/Makefile
+++ b/arch/sh/boot/dts/Makefile
@@ -1,5 +1,7 @@
obj-$(CONFIG_USE_BUILTIN_DTB) += $(patsubst "%",%,$(CONFIG_BUILTIN_DTB_SOURCE)).dtb.o
+dtb-y += landisk.dtb
+
dtstree := $(srctree)/$(src)
clean-files := *.dtb.S
always := $(dtb-y)
diff --git a/arch/sh/boot/dts/landisk.dts b/arch/sh/boot/dts/landisk.dts
new file mode 100644
index 0000000..3745ae0
--- /dev/null
+++ b/arch/sh/boot/dts/landisk.dts
@@ -0,0 +1,61 @@
+/dts-v1/;
+
+#include "sh7751.dtsi"
+
+/ {
+ model = "iodata,HDL-U";
+ compatible = "iodata,hdl-u";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ interrupt-parent = <&shintc>;
+ chosen {
+ stdout-path = "serial1:115200n8";
+ };
+ aliases {
+ serial0 = &sci0;
+ serial1 = &sci1;
+ };
+
+ memory@0c000000 {
+ device_type = "memory";
+ reg = <0x0c000000 0x4000000>;
+ };
+
+ cpldintc: cpld@b0000000 {
+ compatible = "iodata,landisk-intc";
+ #interrupt-cells = <1>;
+ #address-cells = <0>;
+ reg = <0xb0000000 8>;
+ interrupt-map=<0 &shintc evt2irq(0x2a0)>,
+ <1 &shintc evt2irq(0x2c0)>,
+ <2 &shintc evt2irq(0x2e0)>,
+ <3 &shintc evt2irq(0x300)>,
+ <4 &shintc evt2irq(0x320)>,
+ <5 &shintc evt2irq(0x340)>,
+ <6 &shintc evt2irq(0x360)>,
+ <7 &shintc evt2irq(0x380)>;
+ };
+};
+
+&oclk {
+ clock-frequency = <22222222>;
+};
+
+&sci0 {
+ status = "ok";
+};
+
+&sci1 {
+ status = "ok";
+};
+
+&pci {
+ compatible = "renesas,sh7751-pci", "iodata,landisk-pci";
+ interrupt-map-mask = <0x1800 0 7>;
+ interrupt-map = <0x0000 0 1 &cpldintc 0>,
+ <0x0800 0 1 &cpldintc 1>,
+ <0x1000 0 1 &cpldintc 2>,
+ <0x1000 0 2 &cpldintc 3>,
+ <0x1000 0 3 &cpldintc 0>;
+ status = "ok";
+};
--
2.7.0
^ permalink raw reply related [flat|nested] 138+ messages in thread* [PATCH v5 20/22] sh: IO-DATA HDL-U (a.k.a landisk) DeviceTree
@ 2016-07-03 16:46 ` Yoshinori Sato
0 siblings, 0 replies; 138+ messages in thread
From: Yoshinori Sato @ 2016-07-03 16:46 UTC (permalink / raw)
To: devicetree, linux-sh, linux-kernel; +Cc: Yoshinori Sato
Signed-off-by: Yoshinori Sato <ysato@users.sourceforge.jp>
---
arch/sh/boot/dts/Makefile | 2 ++
arch/sh/boot/dts/landisk.dts | 61 ++++++++++++++++++++++++++++++++++++++++++++
2 files changed, 63 insertions(+)
create mode 100644 arch/sh/boot/dts/landisk.dts
diff --git a/arch/sh/boot/dts/Makefile b/arch/sh/boot/dts/Makefile
index 38fdc38..cf5aec4 100644
--- a/arch/sh/boot/dts/Makefile
+++ b/arch/sh/boot/dts/Makefile
@@ -1,5 +1,7 @@
obj-$(CONFIG_USE_BUILTIN_DTB) += $(patsubst "%",%,$(CONFIG_BUILTIN_DTB_SOURCE)).dtb.o
+dtb-y += landisk.dtb
+
dtstree := $(srctree)/$(src)
clean-files := *.dtb.S
always := $(dtb-y)
diff --git a/arch/sh/boot/dts/landisk.dts b/arch/sh/boot/dts/landisk.dts
new file mode 100644
index 0000000..3745ae0
--- /dev/null
+++ b/arch/sh/boot/dts/landisk.dts
@@ -0,0 +1,61 @@
+/dts-v1/;
+
+#include "sh7751.dtsi"
+
+/ {
+ model = "iodata,HDL-U";
+ compatible = "iodata,hdl-u";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ interrupt-parent = <&shintc>;
+ chosen {
+ stdout-path = "serial1:115200n8";
+ };
+ aliases {
+ serial0 = &sci0;
+ serial1 = &sci1;
+ };
+
+ memory@0c000000 {
+ device_type = "memory";
+ reg = <0x0c000000 0x4000000>;
+ };
+
+ cpldintc: cpld@b0000000 {
+ compatible = "iodata,landisk-intc";
+ #interrupt-cells = <1>;
+ #address-cells = <0>;
+ reg = <0xb0000000 8>;
+ interrupt-map=<0 &shintc evt2irq(0x2a0)>,
+ <1 &shintc evt2irq(0x2c0)>,
+ <2 &shintc evt2irq(0x2e0)>,
+ <3 &shintc evt2irq(0x300)>,
+ <4 &shintc evt2irq(0x320)>,
+ <5 &shintc evt2irq(0x340)>,
+ <6 &shintc evt2irq(0x360)>,
+ <7 &shintc evt2irq(0x380)>;
+ };
+};
+
+&oclk {
+ clock-frequency = <22222222>;
+};
+
+&sci0 {
+ status = "ok";
+};
+
+&sci1 {
+ status = "ok";
+};
+
+&pci {
+ compatible = "renesas,sh7751-pci", "iodata,landisk-pci";
+ interrupt-map-mask = <0x1800 0 7>;
+ interrupt-map = <0x0000 0 1 &cpldintc 0>,
+ <0x0800 0 1 &cpldintc 1>,
+ <0x1000 0 1 &cpldintc 2>,
+ <0x1000 0 2 &cpldintc 3>,
+ <0x1000 0 3 &cpldintc 0>;
+ status = "ok";
+};
--
2.7.0
^ permalink raw reply related [flat|nested] 138+ messages in thread* Re: [PATCH v5 20/22] sh: IO-DATA HDL-U (a.k.a landisk) DeviceTree
2016-07-03 16:46 ` Yoshinori Sato
@ 2016-07-03 19:00 ` Sergei Shtylyov
-1 siblings, 0 replies; 138+ messages in thread
From: Sergei Shtylyov @ 2016-07-03 19:00 UTC (permalink / raw)
To: Yoshinori Sato, devicetree, linux-sh, linux-kernel
Hello.
On 07/03/2016 07:46 PM, Yoshinori Sato wrote:
> Signed-off-by: Yoshinori Sato <ysato@users.sourceforge.jp>
[...]
> diff --git a/arch/sh/boot/dts/landisk.dts b/arch/sh/boot/dts/landisk.dts
> new file mode 100644
> index 0000000..3745ae0
> --- /dev/null
> +++ b/arch/sh/boot/dts/landisk.dts
> @@ -0,0 +1,61 @@
[...]
> +&oclk {
> + clock-frequency = <22222222>;
> +};
> +
> +&sci0 {
> + status = "ok";
Should be "okay". Sorry for overlooking it.
> +};
> +
> +&sci1 {
> + status = "ok";
Likewise.
[...]
MBR, Sergei
^ permalink raw reply [flat|nested] 138+ messages in thread* Re: [PATCH v5 20/22] sh: IO-DATA HDL-U (a.k.a landisk) DeviceTree
@ 2016-07-03 19:00 ` Sergei Shtylyov
0 siblings, 0 replies; 138+ messages in thread
From: Sergei Shtylyov @ 2016-07-03 19:00 UTC (permalink / raw)
To: Yoshinori Sato, devicetree, linux-sh, linux-kernel
Hello.
On 07/03/2016 07:46 PM, Yoshinori Sato wrote:
> Signed-off-by: Yoshinori Sato <ysato@users.sourceforge.jp>
[...]
> diff --git a/arch/sh/boot/dts/landisk.dts b/arch/sh/boot/dts/landisk.dts
> new file mode 100644
> index 0000000..3745ae0
> --- /dev/null
> +++ b/arch/sh/boot/dts/landisk.dts
> @@ -0,0 +1,61 @@
[...]
> +&oclk {
> + clock-frequency = <22222222>;
> +};
> +
> +&sci0 {
> + status = "ok";
Should be "okay". Sorry for overlooking it.
> +};
> +
> +&sci1 {
> + status = "ok";
Likewise.
[...]
MBR, Sergei
^ permalink raw reply [flat|nested] 138+ messages in thread* Re: [PATCH v5 20/22] sh: IO-DATA HDL-U (a.k.a landisk) DeviceTree
2016-07-03 19:00 ` Sergei Shtylyov
@ 2016-07-06 16:18 ` Yoshinori Sato
-1 siblings, 0 replies; 138+ messages in thread
From: Yoshinori Sato @ 2016-07-06 16:18 UTC (permalink / raw)
To: Sergei Shtylyov; +Cc: devicetree, linux-sh, linux-kernel
On Mon, 04 Jul 2016 04:00:59 +0900,
Sergei Shtylyov wrote:
>
> Hello.
>
> On 07/03/2016 07:46 PM, Yoshinori Sato wrote:
>
> > Signed-off-by: Yoshinori Sato <ysato@users.sourceforge.jp>
>
> [...]
>
> > diff --git a/arch/sh/boot/dts/landisk.dts b/arch/sh/boot/dts/landisk.dts
> > new file mode 100644
> > index 0000000..3745ae0
> > --- /dev/null
> > +++ b/arch/sh/boot/dts/landisk.dts
> > @@ -0,0 +1,61 @@
> [...]
> > +&oclk {
> > + clock-frequency = <22222222>;
> > +};
> > +
> > +&sci0 {
> > + status = "ok";
>
> Should be "okay". Sorry for overlooking it.
>
> > +};
> > +
> > +&sci1 {
> > + status = "ok";
>
> Likewise.
>
> [...]
>
> MBR, Sergei
>
Updated.
Thanks.
> --
> To unsubscribe from this list: send the line "unsubscribe linux-sh" in
> the body of a message to majordomo@vger.kernel.org
> More majordomo info at http://vger.kernel.org/majordomo-info.html
--
Yoshinori Sato
<ysato@users.sourceforge.jp>
^ permalink raw reply [flat|nested] 138+ messages in thread* Re: [PATCH v5 20/22] sh: IO-DATA HDL-U (a.k.a landisk) DeviceTree
@ 2016-07-06 16:18 ` Yoshinori Sato
0 siblings, 0 replies; 138+ messages in thread
From: Yoshinori Sato @ 2016-07-06 16:18 UTC (permalink / raw)
To: Sergei Shtylyov; +Cc: devicetree, linux-sh, linux-kernel
On Mon, 04 Jul 2016 04:00:59 +0900,
Sergei Shtylyov wrote:
>
> Hello.
>
> On 07/03/2016 07:46 PM, Yoshinori Sato wrote:
>
> > Signed-off-by: Yoshinori Sato <ysato@users.sourceforge.jp>
>
> [...]
>
> > diff --git a/arch/sh/boot/dts/landisk.dts b/arch/sh/boot/dts/landisk.dts
> > new file mode 100644
> > index 0000000..3745ae0
> > --- /dev/null
> > +++ b/arch/sh/boot/dts/landisk.dts
> > @@ -0,0 +1,61 @@
> [...]
> > +&oclk {
> > + clock-frequency = <22222222>;
> > +};
> > +
> > +&sci0 {
> > + status = "ok";
>
> Should be "okay". Sorry for overlooking it.
>
> > +};
> > +
> > +&sci1 {
> > + status = "ok";
>
> Likewise.
>
> [...]
>
> MBR, Sergei
>
Updated.
Thanks.
> --
> To unsubscribe from this list: send the line "unsubscribe linux-sh" in
> the body of a message to majordomo@vger.kernel.org
> More majordomo info at http://vger.kernel.org/majordomo-info.html
--
Yoshinori Sato
<ysato@users.sourceforge.jp>
^ permalink raw reply [flat|nested] 138+ messages in thread
* [PATCH v5 21/22] sh: Renesas RTS7751R2Dplus (a.k.a R2Dplus) IRQCHIP Driver
2016-07-03 16:46 ` Yoshinori Sato
@ 2016-07-03 16:46 ` Yoshinori Sato
-1 siblings, 0 replies; 138+ messages in thread
From: Yoshinori Sato @ 2016-07-03 16:46 UTC (permalink / raw)
To: devicetree, linux-sh, linux-kernel; +Cc: Yoshinori Sato
Signed-off-by: Yoshinori Sato <ysato@users.sourceforge.jp>
---
.../interrupt-controller/renesas-r2dplus.txt | 38 ++++++++++
drivers/irqchip/Makefile | 2 +-
drivers/irqchip/irq-renesas-r2dplus.c | 88 ++++++++++++++++++++++
3 files changed, 127 insertions(+), 1 deletion(-)
create mode 100644 Documentation/devicetree/bindings/interrupt-controller/renesas-r2dplus.txt
create mode 100644 drivers/irqchip/irq-renesas-r2dplus.c
diff --git a/Documentation/devicetree/bindings/interrupt-controller/renesas-r2dplus.txt b/Documentation/devicetree/bindings/interrupt-controller/renesas-r2dplus.txt
new file mode 100644
index 0000000..5b74da4
--- /dev/null
+++ b/Documentation/devicetree/bindings/interrupt-controller/renesas-r2dplus.txt
@@ -0,0 +1,38 @@
+DT bindings for the Renesas R0P751RLC0011RL (R2Dplus) interrupt controller
+
+Required properties:
+
+ - compatible: has to be "renesas,r2dplus-intc".
+
+ - reg: Base address and length of interrupt controller register.
+
+ - #interrupt-cells: has to be <1>: an interrupt index.
+
+ - #address-cells: has to be <0>
+
+ - interrupt-map: Interrupt mapping on parent controller.
+
+Example
+-------
+
+ fpgaintc: fpga@a4000000 {
+ compatible = "renesas,r2dplus-intc";
+ #interrupt-cells = <1>;
+ #address-cells = <0>;
+ reg = <0xa4000000 0x40>;
+ interrupt-map=<0 &shintc evt2irq(0x200)>,
+ <1 &shintc evt2irq(0x220)>,
+ <2 &shintc evt2irq(0x240)>,
+ <3 &shintc evt2irq(0x260)>,
+ <4 &shintc evt2irq(0x280)>,
+ <5 &shintc evt2irq(0x2a0)>,
+ <6 &shintc evt2irq(0x2c0)>,
+ <7 &shintc evt2irq(0x2e0)>,
+ <8 &shintc evt2irq(0x300)>,
+ <9 &shintc evt2irq(0x320)>,
+ <10 &shintc evt2irq(0x340)>,
+ <11 &shintc evt2irq(0x360)>,
+ <12 &shintc evt2irq(0x380)>,
+ <13 &shintc evt2irq(0x3a0)>,
+ <14 &shintc evt2irq(0x3c0)>,
+ };
diff --git a/drivers/irqchip/Makefile b/drivers/irqchip/Makefile
index 5e225cf..1e0f1c3 100644
--- a/drivers/irqchip/Makefile
+++ b/drivers/irqchip/Makefile
@@ -69,4 +69,4 @@ obj-$(CONFIG_PIC32_EVIC) += irq-pic32-evic.o
obj-$(CONFIG_MVEBU_ODMI) += irq-mvebu-odmi.o
obj-$(CONFIG_LS_SCFG_MSI) += irq-ls-scfg-msi.o
obj-$(CONFIG_EZNPS_GIC) += irq-eznps.o
-obj-$(CONFIG_RENESAS_SH_INTC) += irq-renesas-sh7751.o irq-io-landisk.o
+obj-$(CONFIG_RENESAS_SH_INTC) += irq-renesas-sh7751.o irq-io-landisk.o irq-renesas-r2dplus.o
diff --git a/drivers/irqchip/irq-renesas-r2dplus.c b/drivers/irqchip/irq-renesas-r2dplus.c
new file mode 100644
index 0000000..3f80775
--- /dev/null
+++ b/drivers/irqchip/irq-renesas-r2dplus.c
@@ -0,0 +1,88 @@
+/*
+ * Renesas RTS7751R2D+ FPGA IRQ driver
+ *
+ * Copyright 2016 Yoshinori Sato <ysato@users.sourceforge.jp>
+ */
+
+#include <linux/init.h>
+#include <linux/irq.h>
+#include <linux/irqchip.h>
+#include <linux/irqdomain.h>
+#include <linux/of_address.h>
+#include <linux/of_irq.h>
+#include <linux/io.h>
+
+static const u16 mask_bit[] = {
+ BIT(11),
+ BIT(9),
+ BIT(8),
+ BIT(12),
+ BIT(10),
+ BIT(6),
+ BIT(5),
+ BIT(4),
+ BIT(7),
+ BIT(14),
+ BIT(13),
+ BIT(0),
+ BIT(15),
+};
+
+static void r2dplus_mask_irq(struct irq_data *data)
+{
+ u16 mask = __raw_readw(data->chip_data);
+
+ mask &= ~mask_bit[data->irq];
+ __raw_writew(mask, data->chip_data);
+}
+
+static void r2dplus_unmask_irq(struct irq_data *data)
+{
+ u16 mask = __raw_readw(data->chip_data);
+
+ mask |= mask_bit[data->irq];
+ __raw_writew(mask, data->chip_data);
+}
+
+static struct irq_chip fpga_irq_chip = {
+ .name = "R2DPLUS-FPGA",
+ .irq_unmask = r2dplus_unmask_irq,
+ .irq_mask = r2dplus_mask_irq,
+};
+
+static int fpga_map(struct irq_domain *d, unsigned int virq,
+ irq_hw_number_t hw_irq_num)
+{
+ irq_set_chip_and_handler(virq, &fpga_irq_chip,
+ handle_simple_irq);
+ irq_set_chip_data(virq, d->host_data);
+
+ return 0;
+}
+
+static struct irq_domain_ops irq_ops = {
+ .xlate = irq_domain_xlate_onecell,
+ .map = fpga_map,
+};
+
+static int __init r2dplus_intc_of_init(struct device_node *intc,
+ struct device_node *parent)
+{
+ struct irq_domain *domain, *pdomain;
+ int num_irqpin;
+ void *baseaddr;
+
+ baseaddr = of_iomap(intc, 0);
+ pdomain = irq_find_host(parent);
+ of_get_property(intc, "interrupt-map", &num_irqpin);
+ num_irqpin /= sizeof(u32) * 3;
+ domain = irq_domain_create_hierarchy(pdomain, 0, num_irqpin,
+ of_node_to_fwnode(intc),
+ &irq_ops, baseaddr);
+ if (!domain)
+ panic("%s: unable to create IRQ domain\n", intc->full_name);
+ irq_domain_associate_many(domain, 0, 0, 16);
+ return 0;
+}
+
+IRQCHIP_DECLARE(cpld_intc, "renesas,r2dplus-intc", r2dplus_intc_of_init);
--
2.7.0
^ permalink raw reply related [flat|nested] 138+ messages in thread* [PATCH v5 21/22] sh: Renesas RTS7751R2Dplus (a.k.a R2Dplus) IRQCHIP Driver
@ 2016-07-03 16:46 ` Yoshinori Sato
0 siblings, 0 replies; 138+ messages in thread
From: Yoshinori Sato @ 2016-07-03 16:46 UTC (permalink / raw)
To: devicetree, linux-sh, linux-kernel; +Cc: Yoshinori Sato
Signed-off-by: Yoshinori Sato <ysato@users.sourceforge.jp>
---
.../interrupt-controller/renesas-r2dplus.txt | 38 ++++++++++
drivers/irqchip/Makefile | 2 +-
drivers/irqchip/irq-renesas-r2dplus.c | 88 ++++++++++++++++++++++
3 files changed, 127 insertions(+), 1 deletion(-)
create mode 100644 Documentation/devicetree/bindings/interrupt-controller/renesas-r2dplus.txt
create mode 100644 drivers/irqchip/irq-renesas-r2dplus.c
diff --git a/Documentation/devicetree/bindings/interrupt-controller/renesas-r2dplus.txt b/Documentation/devicetree/bindings/interrupt-controller/renesas-r2dplus.txt
new file mode 100644
index 0000000..5b74da4
--- /dev/null
+++ b/Documentation/devicetree/bindings/interrupt-controller/renesas-r2dplus.txt
@@ -0,0 +1,38 @@
+DT bindings for the Renesas R0P751RLC0011RL (R2Dplus) interrupt controller
+
+Required properties:
+
+ - compatible: has to be "renesas,r2dplus-intc".
+
+ - reg: Base address and length of interrupt controller register.
+
+ - #interrupt-cells: has to be <1>: an interrupt index.
+
+ - #address-cells: has to be <0>
+
+ - interrupt-map: Interrupt mapping on parent controller.
+
+Example
+-------
+
+ fpgaintc: fpga@a4000000 {
+ compatible = "renesas,r2dplus-intc";
+ #interrupt-cells = <1>;
+ #address-cells = <0>;
+ reg = <0xa4000000 0x40>;
+ interrupt-map=<0 &shintc evt2irq(0x200)>,
+ <1 &shintc evt2irq(0x220)>,
+ <2 &shintc evt2irq(0x240)>,
+ <3 &shintc evt2irq(0x260)>,
+ <4 &shintc evt2irq(0x280)>,
+ <5 &shintc evt2irq(0x2a0)>,
+ <6 &shintc evt2irq(0x2c0)>,
+ <7 &shintc evt2irq(0x2e0)>,
+ <8 &shintc evt2irq(0x300)>,
+ <9 &shintc evt2irq(0x320)>,
+ <10 &shintc evt2irq(0x340)>,
+ <11 &shintc evt2irq(0x360)>,
+ <12 &shintc evt2irq(0x380)>,
+ <13 &shintc evt2irq(0x3a0)>,
+ <14 &shintc evt2irq(0x3c0)>,
+ };
diff --git a/drivers/irqchip/Makefile b/drivers/irqchip/Makefile
index 5e225cf..1e0f1c3 100644
--- a/drivers/irqchip/Makefile
+++ b/drivers/irqchip/Makefile
@@ -69,4 +69,4 @@ obj-$(CONFIG_PIC32_EVIC) += irq-pic32-evic.o
obj-$(CONFIG_MVEBU_ODMI) += irq-mvebu-odmi.o
obj-$(CONFIG_LS_SCFG_MSI) += irq-ls-scfg-msi.o
obj-$(CONFIG_EZNPS_GIC) += irq-eznps.o
-obj-$(CONFIG_RENESAS_SH_INTC) += irq-renesas-sh7751.o irq-io-landisk.o
+obj-$(CONFIG_RENESAS_SH_INTC) += irq-renesas-sh7751.o irq-io-landisk.o irq-renesas-r2dplus.o
diff --git a/drivers/irqchip/irq-renesas-r2dplus.c b/drivers/irqchip/irq-renesas-r2dplus.c
new file mode 100644
index 0000000..3f80775
--- /dev/null
+++ b/drivers/irqchip/irq-renesas-r2dplus.c
@@ -0,0 +1,88 @@
+/*
+ * Renesas RTS7751R2D+ FPGA IRQ driver
+ *
+ * Copyright 2016 Yoshinori Sato <ysato@users.sourceforge.jp>
+ */
+
+#include <linux/init.h>
+#include <linux/irq.h>
+#include <linux/irqchip.h>
+#include <linux/irqdomain.h>
+#include <linux/of_address.h>
+#include <linux/of_irq.h>
+#include <linux/io.h>
+
+static const u16 mask_bit[] = {
+ BIT(11),
+ BIT(9),
+ BIT(8),
+ BIT(12),
+ BIT(10),
+ BIT(6),
+ BIT(5),
+ BIT(4),
+ BIT(7),
+ BIT(14),
+ BIT(13),
+ BIT(0),
+ BIT(15),
+};
+
+static void r2dplus_mask_irq(struct irq_data *data)
+{
+ u16 mask = __raw_readw(data->chip_data);
+
+ mask &= ~mask_bit[data->irq];
+ __raw_writew(mask, data->chip_data);
+}
+
+static void r2dplus_unmask_irq(struct irq_data *data)
+{
+ u16 mask = __raw_readw(data->chip_data);
+
+ mask |= mask_bit[data->irq];
+ __raw_writew(mask, data->chip_data);
+}
+
+static struct irq_chip fpga_irq_chip = {
+ .name = "R2DPLUS-FPGA",
+ .irq_unmask = r2dplus_unmask_irq,
+ .irq_mask = r2dplus_mask_irq,
+};
+
+static int fpga_map(struct irq_domain *d, unsigned int virq,
+ irq_hw_number_t hw_irq_num)
+{
+ irq_set_chip_and_handler(virq, &fpga_irq_chip,
+ handle_simple_irq);
+ irq_set_chip_data(virq, d->host_data);
+
+ return 0;
+}
+
+static struct irq_domain_ops irq_ops = {
+ .xlate = irq_domain_xlate_onecell,
+ .map = fpga_map,
+};
+
+static int __init r2dplus_intc_of_init(struct device_node *intc,
+ struct device_node *parent)
+{
+ struct irq_domain *domain, *pdomain;
+ int num_irqpin;
+ void *baseaddr;
+
+ baseaddr = of_iomap(intc, 0);
+ pdomain = irq_find_host(parent);
+ of_get_property(intc, "interrupt-map", &num_irqpin);
+ num_irqpin /= sizeof(u32) * 3;
+ domain = irq_domain_create_hierarchy(pdomain, 0, num_irqpin,
+ of_node_to_fwnode(intc),
+ &irq_ops, baseaddr);
+ if (!domain)
+ panic("%s: unable to create IRQ domain\n", intc->full_name);
+ irq_domain_associate_many(domain, 0, 0, 16);
+ return 0;
+}
+
+IRQCHIP_DECLARE(cpld_intc, "renesas,r2dplus-intc", r2dplus_intc_of_init);
--
2.7.0
^ permalink raw reply related [flat|nested] 138+ messages in thread
* [PATCH v5 22/22] sh: Renesas RTS7751R2Dplus (a,k.a R2Dplus) DeviceTree
2016-07-03 16:46 ` Yoshinori Sato
@ 2016-07-03 16:46 ` Yoshinori Sato
-1 siblings, 0 replies; 138+ messages in thread
From: Yoshinori Sato @ 2016-07-03 16:46 UTC (permalink / raw)
To: devicetree, linux-sh, linux-kernel; +Cc: Yoshinori Sato
Signed-off-by: Yoshinori Sato <ysato@users.sourceforge.jp>
---
arch/sh/boot/dts/Makefile | 1 +
arch/sh/boot/dts/r2dplus.dts | 85 ++++++++++++++++++++++++++++++++++++++++++++
2 files changed, 86 insertions(+)
create mode 100644 arch/sh/boot/dts/r2dplus.dts
diff --git a/arch/sh/boot/dts/Makefile b/arch/sh/boot/dts/Makefile
index cf5aec4..e059ce2b 100644
--- a/arch/sh/boot/dts/Makefile
+++ b/arch/sh/boot/dts/Makefile
@@ -1,6 +1,7 @@
obj-$(CONFIG_USE_BUILTIN_DTB) += $(patsubst "%",%,$(CONFIG_BUILTIN_DTB_SOURCE)).dtb.o
dtb-y += landisk.dtb
+otb-y += r2dplus.dtb
dtstree := $(srctree)/$(src)
clean-files := *.dtb.S
diff --git a/arch/sh/boot/dts/r2dplus.dts b/arch/sh/boot/dts/r2dplus.dts
new file mode 100644
index 0000000..f9c01f9
--- /dev/null
+++ b/arch/sh/boot/dts/r2dplus.dts
@@ -0,0 +1,85 @@
+/dts-v1/;
+
+#include "sh7751.dtsi"
+
+/ {
+ model = "renesas,RTS7751R2D+";
+ compatible = "renesas,r2dplus";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ interrupt-parent = <&shintc>;
+ chosen {
+ stdout-path = "serial1:115200n8";
+ };
+ aliases {
+ serial1 = &sci1;
+ };
+
+ memory@0c000000 {
+ device_type = "memory";
+ reg = <0x0c000000 0x4000000>;
+ };
+
+ fpgaintc: fpga@a4000000 {
+ compatible = "renesas,r2dplus-intc";
+ #interrupt-cells = <1>;
+ #address-cells = <0>;
+ reg = <0xa4000000 0x40>;
+ interrupt-map=<0 &shintc evt2irq(0x200)>,
+ <1 &shintc evt2irq(0x220)>,
+ <2 &shintc evt2irq(0x240)>,
+ <3 &shintc evt2irq(0x260)>,
+ <4 &shintc evt2irq(0x280)>,
+ <5 &shintc evt2irq(0x2a0)>,
+ <6 &shintc evt2irq(0x2c0)>,
+ <7 &shintc evt2irq(0x2e0)>,
+ <8 &shintc evt2irq(0x300)>,
+ <9 &shintc evt2irq(0x320)>,
+ <10 &shintc evt2irq(0x340)>,
+ <11 &shintc evt2irq(0x360)>,
+ <12 &shintc evt2irq(0x380)>,
+ <13 &shintc evt2irq(0x3a0)>,
+ <14 &shintc evt2irq(0x3c0)>;
+ };
+
+ ide: ide@b4001000 {
+ compatible = "ata-generic";
+ reg = <0xb4001000 0x10>, <0xb400080c 0x02>;
+ interrupt-parent = <&fpgaintc>;
+ interrupts = <1 0>;
+ reg-shift = <1>;
+ pio-mode = <0>;
+ };
+
+ sm501: display@13e00000 {
+ compatible = "smi,sm501";
+ reg = <0x10000000 0x13dfffff>, <0x13e00000 0x13ffffff>;
+ interrupt-parent = <&fpgaintc>;
+ interrupts = <4 0>;
+ mode = "640x480-16@60";
+ edid = [00 ff ff ff ff ff ff 00 04 21 00 00 00 00 00 00
+ 01 00 01 04 00 00 00 00 08 00 00 00 00 00 00 00
+ 00 00 00 20 00 00 01 40 01 00 01 00 01 00 01 00
+ 01 00 01 00 01 00 d6 09 80 a0 20 e0 2d 10 10 60
+ a2 00 00 00 00 00 00 00 00 00 00 10 00 00 00 00
+ 00 00 00 00 00 00 00 00 00 00 00 00 00 10 00 00
+ 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+ 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 fd];
+ smi,devices = <1>;
+ };
+};
+
+&oclk {
+ clock-frequency = <60000000>;
+};
+
+&sci1 {
+ status = "ok";
+};
+
+&pci {
+ compatible = "renesas,sh7751-pci", "renesas.r2dplus-pci";
+ interrupt-map-mask = <0x1800 0 7>;
+ interrupt-map = <0x1000 0 1 &fpgaintc 3 0>;
+ status = "ok";
+};
--
2.7.0
^ permalink raw reply related [flat|nested] 138+ messages in thread* [PATCH v5 22/22] sh: Renesas RTS7751R2Dplus (a,k.a R2Dplus) DeviceTree
@ 2016-07-03 16:46 ` Yoshinori Sato
0 siblings, 0 replies; 138+ messages in thread
From: Yoshinori Sato @ 2016-07-03 16:46 UTC (permalink / raw)
To: devicetree, linux-sh, linux-kernel; +Cc: Yoshinori Sato
Signed-off-by: Yoshinori Sato <ysato@users.sourceforge.jp>
---
arch/sh/boot/dts/Makefile | 1 +
arch/sh/boot/dts/r2dplus.dts | 85 ++++++++++++++++++++++++++++++++++++++++++++
2 files changed, 86 insertions(+)
create mode 100644 arch/sh/boot/dts/r2dplus.dts
diff --git a/arch/sh/boot/dts/Makefile b/arch/sh/boot/dts/Makefile
index cf5aec4..e059ce2b 100644
--- a/arch/sh/boot/dts/Makefile
+++ b/arch/sh/boot/dts/Makefile
@@ -1,6 +1,7 @@
obj-$(CONFIG_USE_BUILTIN_DTB) += $(patsubst "%",%,$(CONFIG_BUILTIN_DTB_SOURCE)).dtb.o
dtb-y += landisk.dtb
+otb-y += r2dplus.dtb
dtstree := $(srctree)/$(src)
clean-files := *.dtb.S
diff --git a/arch/sh/boot/dts/r2dplus.dts b/arch/sh/boot/dts/r2dplus.dts
new file mode 100644
index 0000000..f9c01f9
--- /dev/null
+++ b/arch/sh/boot/dts/r2dplus.dts
@@ -0,0 +1,85 @@
+/dts-v1/;
+
+#include "sh7751.dtsi"
+
+/ {
+ model = "renesas,RTS7751R2D+";
+ compatible = "renesas,r2dplus";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ interrupt-parent = <&shintc>;
+ chosen {
+ stdout-path = "serial1:115200n8";
+ };
+ aliases {
+ serial1 = &sci1;
+ };
+
+ memory@0c000000 {
+ device_type = "memory";
+ reg = <0x0c000000 0x4000000>;
+ };
+
+ fpgaintc: fpga@a4000000 {
+ compatible = "renesas,r2dplus-intc";
+ #interrupt-cells = <1>;
+ #address-cells = <0>;
+ reg = <0xa4000000 0x40>;
+ interrupt-map=<0 &shintc evt2irq(0x200)>,
+ <1 &shintc evt2irq(0x220)>,
+ <2 &shintc evt2irq(0x240)>,
+ <3 &shintc evt2irq(0x260)>,
+ <4 &shintc evt2irq(0x280)>,
+ <5 &shintc evt2irq(0x2a0)>,
+ <6 &shintc evt2irq(0x2c0)>,
+ <7 &shintc evt2irq(0x2e0)>,
+ <8 &shintc evt2irq(0x300)>,
+ <9 &shintc evt2irq(0x320)>,
+ <10 &shintc evt2irq(0x340)>,
+ <11 &shintc evt2irq(0x360)>,
+ <12 &shintc evt2irq(0x380)>,
+ <13 &shintc evt2irq(0x3a0)>,
+ <14 &shintc evt2irq(0x3c0)>;
+ };
+
+ ide: ide@b4001000 {
+ compatible = "ata-generic";
+ reg = <0xb4001000 0x10>, <0xb400080c 0x02>;
+ interrupt-parent = <&fpgaintc>;
+ interrupts = <1 0>;
+ reg-shift = <1>;
+ pio-mode = <0>;
+ };
+
+ sm501: display@13e00000 {
+ compatible = "smi,sm501";
+ reg = <0x10000000 0x13dfffff>, <0x13e00000 0x13ffffff>;
+ interrupt-parent = <&fpgaintc>;
+ interrupts = <4 0>;
+ mode = "640x480-16@60";
+ edid = [00 ff ff ff ff ff ff 00 04 21 00 00 00 00 00 00
+ 01 00 01 04 00 00 00 00 08 00 00 00 00 00 00 00
+ 00 00 00 20 00 00 01 40 01 00 01 00 01 00 01 00
+ 01 00 01 00 01 00 d6 09 80 a0 20 e0 2d 10 10 60
+ a2 00 00 00 00 00 00 00 00 00 00 10 00 00 00 00
+ 00 00 00 00 00 00 00 00 00 00 00 00 00 10 00 00
+ 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+ 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 fd];
+ smi,devices = <1>;
+ };
+};
+
+&oclk {
+ clock-frequency = <60000000>;
+};
+
+&sci1 {
+ status = "ok";
+};
+
+&pci {
+ compatible = "renesas,sh7751-pci", "renesas.r2dplus-pci";
+ interrupt-map-mask = <0x1800 0 7>;
+ interrupt-map = <0x1000 0 1 &fpgaintc 3 0>;
+ status = "ok";
+};
--
2.7.0
^ permalink raw reply related [flat|nested] 138+ messages in thread
* Re: [PATCH v5 00/22] sh: LANDISK and R2Dplus convert to device tree
2016-07-03 16:46 ` Yoshinori Sato
@ 2017-11-17 10:37 ` John Paul Adrian Glaubitz
-1 siblings, 0 replies; 138+ messages in thread
From: John Paul Adrian Glaubitz @ 2017-11-17 10:37 UTC (permalink / raw)
To: Yoshinori Sato, linux-sh, linux-kernel, j-core
Hi there!
On 07/03/2016 06:46 PM, Yoshinori Sato wrote:
> SH get devicetree support. But it not working on existing H/W.
>
> IO-DATA HDL-U (aka landisk) currentry supported.
> This H/W like SH7751 evalution board. It's a best to use this as a
> change base H/W.
> RTS7751R2Dplus is QEMU-SH4 target. So easy trying.
This patch series - which would make a huge improvement - is still not
applied. It would be very useful to be able to test the device tree
implementation with QEMU.
Any of the SH maintainers can apply this?
Adrian
--
.''`. John Paul Adrian Glaubitz
: :' : Debian Developer - glaubitz@debian.org
`. `' Freie Universitaet Berlin - glaubitz@physik.fu-berlin.de
`- GPG: 62FF 8A75 84E0 2956 9546 0006 7426 3B37 F5B5 F913
^ permalink raw reply [flat|nested] 138+ messages in thread
* Re: [PATCH v5 00/22] sh: LANDISK and R2Dplus convert to device tree
@ 2017-11-17 10:37 ` John Paul Adrian Glaubitz
0 siblings, 0 replies; 138+ messages in thread
From: John Paul Adrian Glaubitz @ 2017-11-17 10:37 UTC (permalink / raw)
To: Yoshinori Sato, linux-sh, linux-kernel, j-core
Hi there!
On 07/03/2016 06:46 PM, Yoshinori Sato wrote:
> SH get devicetree support. But it not working on existing H/W.
>
> IO-DATA HDL-U (aka landisk) currentry supported.
> This H/W like SH7751 evalution board. It's a best to use this as a
> change base H/W.
> RTS7751R2Dplus is QEMU-SH4 target. So easy trying.
This patch series - which would make a huge improvement - is still not
applied. It would be very useful to be able to test the device tree
implementation with QEMU.
Any of the SH maintainers can apply this?
Adrian
--
.''`. John Paul Adrian Glaubitz
: :' : Debian Developer - glaubitz@debian.org
`. `' Freie Universitaet Berlin - glaubitz@physik.fu-berlin.de
`- GPG: 62FF 8A75 84E0 2956 9546 0006 7426 3B37 F5B5 F913
^ permalink raw reply [flat|nested] 138+ messages in thread
* Re: [J-core] [PATCH v5 00/22] sh: LANDISK and R2Dplus convert to device tree
2017-11-17 10:37 ` John Paul Adrian Glaubitz
@ 2017-11-17 17:39 ` Rob Landley
-1 siblings, 0 replies; 138+ messages in thread
From: Rob Landley @ 2017-11-17 17:39 UTC (permalink / raw)
To: John Paul Adrian Glaubitz, Yoshinori Sato, linux-sh,
linux-kernel, Rich Felker
On 11/17/2017 04:37 AM, John Paul Adrian Glaubitz wrote:
> Hi there!
>
> On 07/03/2016 06:46 PM, Yoshinori Sato wrote:
>> SH get devicetree support. But it not working on existing H/W.
>>
>> IO-DATA HDL-U (aka landisk) currentry supported.
>> This H/W like SH7751 evalution board. It's a best to use this as a
>> change base H/W.
>> RTS7751R2Dplus is QEMU-SH4 target. So easy trying.
>
> This patch series - which would make a huge improvement - is still not
> applied. It would be very useful to be able to test the device tree
> implementation with QEMU.
>
> Any of the SH maintainers can apply this?
It's Rich's call, but given that it's _from_ one of the sh maintainers,
sounds to me like it can just go in if it still applies? (If there's
bugfixes needed they can go in -rc2 or so, after this merge window.)
Given that qemu serial's been broken for 9 months now, I doubt this
would make anything worse. (I should really check Cedric's qemu fork to
see if he fixed that...)
Rob
^ permalink raw reply [flat|nested] 138+ messages in thread
* Re: [J-core] [PATCH v5 00/22] sh: LANDISK and R2Dplus convert to device tree
@ 2017-11-17 17:39 ` Rob Landley
0 siblings, 0 replies; 138+ messages in thread
From: Rob Landley @ 2017-11-17 17:39 UTC (permalink / raw)
To: John Paul Adrian Glaubitz, Yoshinori Sato, linux-sh,
linux-kernel, Rich Felker
On 11/17/2017 04:37 AM, John Paul Adrian Glaubitz wrote:
> Hi there!
>
> On 07/03/2016 06:46 PM, Yoshinori Sato wrote:
>> SH get devicetree support. But it not working on existing H/W.
>>
>> IO-DATA HDL-U (aka landisk) currentry supported.
>> This H/W like SH7751 evalution board. It's a best to use this as a
>> change base H/W.
>> RTS7751R2Dplus is QEMU-SH4 target. So easy trying.
>
> This patch series - which would make a huge improvement - is still not
> applied. It would be very useful to be able to test the device tree
> implementation with QEMU.
>
> Any of the SH maintainers can apply this?
It's Rich's call, but given that it's _from_ one of the sh maintainers,
sounds to me like it can just go in if it still applies? (If there's
bugfixes needed they can go in -rc2 or so, after this merge window.)
Given that qemu serial's been broken for 9 months now, I doubt this
would make anything worse. (I should really check Cedric's qemu fork to
see if he fixed that...)
Rob
^ permalink raw reply [flat|nested] 138+ messages in thread
* Re: [J-core] [PATCH v5 00/22] sh: LANDISK and R2Dplus convert to device tree
2017-11-17 17:39 ` Rob Landley
@ 2017-11-17 17:49 ` John Paul Adrian Glaubitz
-1 siblings, 0 replies; 138+ messages in thread
From: John Paul Adrian Glaubitz @ 2017-11-17 17:49 UTC (permalink / raw)
To: Rob Landley; +Cc: Yoshinori Sato, linux-sh, linux-kernel, Rich Felker
I’ll have a go at this tonight and if the patches still apply fine, I’d just say go for it.
> On Nov 17, 2017, at 6:39 PM, Rob Landley <rob@landley.net> wrote:
>
>> On 11/17/2017 04:37 AM, John Paul Adrian Glaubitz wrote:
>> Hi there!
>>
>>> On 07/03/2016 06:46 PM, Yoshinori Sato wrote:
>>> SH get devicetree support. But it not working on existing H/W.
>>>
>>> IO-DATA HDL-U (aka landisk) currentry supported.
>>> This H/W like SH7751 evalution board. It's a best to use this as a
>>> change base H/W.
>>> RTS7751R2Dplus is QEMU-SH4 target. So easy trying.
>>
>> This patch series - which would make a huge improvement - is still not
>> applied. It would be very useful to be able to test the device tree
>> implementation with QEMU.
>>
>> Any of the SH maintainers can apply this?
>
> It's Rich's call, but given that it's _from_ one of the sh maintainers,
> sounds to me like it can just go in if it still applies? (If there's
> bugfixes needed they can go in -rc2 or so, after this merge window.)
>
> Given that qemu serial's been broken for 9 months now, I doubt this
> would make anything worse. (I should really check Cedric's qemu fork to
> see if he fixed that...)
>
> Rob
^ permalink raw reply [flat|nested] 138+ messages in thread
* Re: [J-core] [PATCH v5 00/22] sh: LANDISK and R2Dplus convert to device tree
@ 2017-11-17 17:49 ` John Paul Adrian Glaubitz
0 siblings, 0 replies; 138+ messages in thread
From: John Paul Adrian Glaubitz @ 2017-11-17 17:49 UTC (permalink / raw)
To: Rob Landley; +Cc: Yoshinori Sato, linux-sh, linux-kernel, Rich Felker
I’ll have a go at this tonight and if the patches still apply fine, I’d just say go for it.
> On Nov 17, 2017, at 6:39 PM, Rob Landley <rob@landley.net> wrote:
>
>> On 11/17/2017 04:37 AM, John Paul Adrian Glaubitz wrote:
>> Hi there!
>>
>>> On 07/03/2016 06:46 PM, Yoshinori Sato wrote:
>>> SH get devicetree support. But it not working on existing H/W.
>>>
>>> IO-DATA HDL-U (aka landisk) currentry supported.
>>> This H/W like SH7751 evalution board. It's a best to use this as a
>>> change base H/W.
>>> RTS7751R2Dplus is QEMU-SH4 target. So easy trying.
>>
>> This patch series - which would make a huge improvement - is still not
>> applied. It would be very useful to be able to test the device tree
>> implementation with QEMU.
>>
>> Any of the SH maintainers can apply this?
>
> It's Rich's call, but given that it's _from_ one of the sh maintainers,
> sounds to me like it can just go in if it still applies? (If there's
> bugfixes needed they can go in -rc2 or so, after this merge window.)
>
> Given that qemu serial's been broken for 9 months now, I doubt this
> would make anything worse. (I should really check Cedric's qemu fork to
> see if he fixed that...)
>
> Rob
^ permalink raw reply [flat|nested] 138+ messages in thread
* Re: [J-core] [PATCH v5 00/22] sh: LANDISK and R2Dplus convert to device tree
2017-11-17 17:49 ` John Paul Adrian Glaubitz
@ 2017-11-17 19:17 ` Rich Felker
-1 siblings, 0 replies; 138+ messages in thread
From: Rich Felker @ 2017-11-17 19:17 UTC (permalink / raw)
To: John Paul Adrian Glaubitz
Cc: Rob Landley, Yoshinori Sato, linux-sh, linux-kernel
On Fri, Nov 17, 2017 at 06:49:39PM +0100, John Paul Adrian Glaubitz wrote:
> I’ll have a go at this tonight and if the patches still apply fine, I’d just say go for it.
There were significant problems that I don't think were ever
addressed, including incompatible changes in how boot command line was
handled and possibly ambiguity about what a physical address means
(zero based vs based in the zone SH3/4 excludes from MMU mapping) in
the contract for how the bootloader passes a DTB pointer in to the
kernel, or something similar.
This is a large part of why I want to get to the point where I can
build and boot a kernel on the LANDISK -- not being able to test any
of this is a blocker for moving everything to device tree.
Rich
> > On Nov 17, 2017, at 6:39 PM, Rob Landley <rob@landley.net> wrote:
> >
> >> On 11/17/2017 04:37 AM, John Paul Adrian Glaubitz wrote:
> >> Hi there!
> >>
> >>> On 07/03/2016 06:46 PM, Yoshinori Sato wrote:
> >>> SH get devicetree support. But it not working on existing H/W.
> >>>
> >>> IO-DATA HDL-U (aka landisk) currentry supported.
> >>> This H/W like SH7751 evalution board. It's a best to use this as a
> >>> change base H/W.
> >>> RTS7751R2Dplus is QEMU-SH4 target. So easy trying.
> >>
> >> This patch series - which would make a huge improvement - is still not
> >> applied. It would be very useful to be able to test the device tree
> >> implementation with QEMU.
> >>
> >> Any of the SH maintainers can apply this?
> >
> > It's Rich's call, but given that it's _from_ one of the sh maintainers,
> > sounds to me like it can just go in if it still applies? (If there's
> > bugfixes needed they can go in -rc2 or so, after this merge window.)
> >
> > Given that qemu serial's been broken for 9 months now, I doubt this
> > would make anything worse. (I should really check Cedric's qemu fork to
> > see if he fixed that...)
> >
> > Rob
^ permalink raw reply [flat|nested] 138+ messages in thread
* Re: [J-core] [PATCH v5 00/22] sh: LANDISK and R2Dplus convert to device tree
@ 2017-11-17 19:17 ` Rich Felker
0 siblings, 0 replies; 138+ messages in thread
From: Rich Felker @ 2017-11-17 19:17 UTC (permalink / raw)
To: John Paul Adrian Glaubitz
Cc: Rob Landley, Yoshinori Sato, linux-sh, linux-kernel
On Fri, Nov 17, 2017 at 06:49:39PM +0100, John Paul Adrian Glaubitz wrote:
> I’ll have a go at this tonight and if the patches still apply fine, I’d just say go for it.
There were significant problems that I don't think were ever
addressed, including incompatible changes in how boot command line was
handled and possibly ambiguity about what a physical address means
(zero based vs based in the zone SH3/4 excludes from MMU mapping) in
the contract for how the bootloader passes a DTB pointer in to the
kernel, or something similar.
This is a large part of why I want to get to the point where I can
build and boot a kernel on the LANDISK -- not being able to test any
of this is a blocker for moving everything to device tree.
Rich
> > On Nov 17, 2017, at 6:39 PM, Rob Landley <rob@landley.net> wrote:
> >
> >> On 11/17/2017 04:37 AM, John Paul Adrian Glaubitz wrote:
> >> Hi there!
> >>
> >>> On 07/03/2016 06:46 PM, Yoshinori Sato wrote:
> >>> SH get devicetree support. But it not working on existing H/W.
> >>>
> >>> IO-DATA HDL-U (aka landisk) currentry supported.
> >>> This H/W like SH7751 evalution board. It's a best to use this as a
> >>> change base H/W.
> >>> RTS7751R2Dplus is QEMU-SH4 target. So easy trying.
> >>
> >> This patch series - which would make a huge improvement - is still not
> >> applied. It would be very useful to be able to test the device tree
> >> implementation with QEMU.
> >>
> >> Any of the SH maintainers can apply this?
> >
> > It's Rich's call, but given that it's _from_ one of the sh maintainers,
> > sounds to me like it can just go in if it still applies? (If there's
> > bugfixes needed they can go in -rc2 or so, after this merge window.)
> >
> > Given that qemu serial's been broken for 9 months now, I doubt this
> > would make anything worse. (I should really check Cedric's qemu fork to
> > see if he fixed that...)
> >
> > Rob
^ permalink raw reply [flat|nested] 138+ messages in thread
* Re: [J-core] [PATCH v5 00/22] sh: LANDISK and R2Dplus convert to device tree
2017-11-17 19:17 ` Rich Felker
(?)
@ 2017-11-17 19:54 ` John Paul Adrian Glaubitz
2018-01-05 21:28 ` Rich Felker
-1 siblings, 1 reply; 138+ messages in thread
From: John Paul Adrian Glaubitz @ 2017-11-17 19:54 UTC (permalink / raw)
To: Rich Felker; +Cc: Rob Landley, Yoshinori Sato, linux-sh, linux-kernel
[-- Attachment #1: Type: text/plain, Size: 1697 bytes --]
On 11/17/2017 08:17 PM, Rich Felker wrote:
> There were significant problems that I don't think were ever
> addressed, including incompatible changes in how boot command line was
> handled and possibly ambiguity about what a physical address means
> (zero based vs based in the zone SH3/4 excludes from MMU mapping) in
> the contract for how the bootloader passes a DTB pointer in to the
> kernel, or something similar.
I see, thanks for the heads-up.
> This is a large part of why I want to get to the point where I can
> build and boot a kernel on the LANDISK -- not being able to test any
> of this is a blocker for moving everything to device tree.
I can actually help you with that. I know what to do to get the kernel
to boot on the LANDISK device. I've got everything working except
being unable to detect the IDE controller. The attached config builds
a kernel which boots with the attached output.
Furthermore, in order to install the kernel, you need to use the
cross-LILO version from [1] which allows to install the bootloader
on an x86 machine into the SuperH LANDISK image.
Instructions can be found in [2]. A base filesystem can be found in [3].
And I could also send you an USL-5P which is also a LANDISK device,
just in a different form-factor.
Adrian
> [1]http://iohack.osdn.jp/kogiidena/debian26/base/landisk-tools-20070612.tgz
> [2] https://www.with.de/fw/pub/Computing/PlextorPX-EH/LANDISKdebian.pdf
> [3] http://iohack.osdn.jp/kogiidena/debian26/base/
--
.''`. John Paul Adrian Glaubitz
: :' : Debian Developer - glaubitz@debian.org
`. `' Freie Universitaet Berlin - glaubitz@physik.fu-berlin.de
`- GPG: 62FF 8A75 84E0 2956 9546 0006 7426 3B37 F5B5 F913
[-- Attachment #2: dmesg-usl-5p-4.8.12.txt --]
[-- Type: text/plain, Size: 16617 bytes --]
Welcome to minicom 2.7
OPTIONS: I18n
Compiled on Nov 30 2015, 11:52:37.
Port /dev/ttyUSB0, 12:30:01
Press CTRL-A Z for help on special keys
SH IPL+g version 0.9, Copyright (C) 2000 Free Software Foundation, Inc.
This software comes with ABSOLUTELY NO WARRANTY; for details type `w'.
This is free software, and you are welcome to redistribute it under
certain conditions; type `l' for details.
2002/09/09 Making. 2004/09/08 I-O DATA NSU Update.
266:133:33 on base clock 22.22MHz and SDRAM 4 burst. CF boot.
PCIC initialization done.
MASTER:48bit LBA mode support
Disk drive detected: SDCFHS-032G HDX13.04 EAZ081716150404
LBA: 03BA3E70
DiskSize: 32GByte
PIO MODE1
Set Transfer Mode result: 50
> b
Set Transfer Mode result: 50
Initialize Device Parameters result: 50
IDLE result: 50
LILO boot:
Loading rouge.............................................................................done.
m� 0.000000] Linux version 4.8.12 (glaubitz@ikarus) (gcc version 6.2.1 20161119 (Debian 6.2.1-4) ) #4 PREEMPT Sat Dec 3 12:34:20 CET 2016
[ 0.000000] Boot params:
[ 0.000000] ... MOUNT_ROOT_RDONLY - 00000001
[ 0.000000] ... RAMDISK_FLAGS - 00000000
[ 0.000000] ... ORIG_ROOT_DEV - 00000301
[ 0.000000] ... LOADER_TYPE - 00000001
[ 0.000000] ... INITRD_START - 00000000
[ 0.000000] ... INITRD_SIZE - 00000000
[ 0.000000] Memory limited to 64MB
[ 0.000000] Booting machvec: LANDISK
[ 0.000000] Node 0: start_pfn = 0xc000, low = 0x10000
[ 0.000000] Zone ranges:
[ 0.000000] Normal [mem 0x000000000c000000-0x000000000fffffff]
[ 0.000000] Movable zone start for each node
[ 0.000000] Early memory node ranges
[ 0.000000] node 0: [mem 0x000000000c000000-0x000000000fffffff]
[ 0.000000] Initmem setup node 0 [mem 0x000000000c000000-0x000000000fffffff]
[ 0.000000] I-O DATA DEVICE, INC. "LANDISK Series" support.
[ 0.000000] Built 1 zonelists in Zone order, mobility grouping on. Total pages: 16256
[ 0.000000] Kernel command line: ro BOOT_FILE=/boot/zImage mem=64M console=ttySC1,9600 ide0=0x1f0,0x3f6,10 root=/dev/hda2 init=/bin/bash
[ 0.000000] PID hash table entries: 256 (order: -2, 1024 bytes)
[ 0.000000] Dentry cache hash table entries: 8192 (order: 3, 32768 bytes)
[ 0.000000] Inode-cache hash table entries: 4096 (order: 2, 16384 bytes)
[ 0.000000] Sorting __ex_table...
[ 0.000000] PVR=04050005 CVR=20480000 PRR=00000113
[ 0.000000] I-cache : n_ways=2 n_sets=256 way_incr=8192
[ 0.000000] I-cache : entry_mask=0x00001fe0 alias_mask=0x00001000 n_aliases=2
[ 0.000000] D-cache : n_ways=2 n_sets=512 way_incr=16384
[ 0.000000] D-cache : entry_mask=0x00003fe0 alias_mask=0x00003000 n_aliases=4
[ 0.000000] Memory: 58284K/65536K available (4540K kernel code, 212K rwdata, 1468K rodata, 184K init, 210K bss, 7248K reserved, 0K cma-reserved)
[ 0.000000] virtual kernel memory layout:
[ 0.000000] fixmap : 0xdfff7000 - 0xdffff000 ( 32 kB)
[ 0.000000] vmalloc : 0xc0000000 - 0xdfff5000 ( 511 MB)
[ 0.000000] lowmem : 0x8c000000 - 0x90000000 ( 64 MB) (cached)
[ 0.000000] : 0xa0000000 - 0xc0000000 ( 512 MB) (uncached)
[ 0.000000] .init : 0x8c617000 - 0x8c645000 ( 184 kB)
[ 0.000000] .data : 0x8c4713c0 - 0x8c616c00 (1686 kB)
[ 0.000000] .text : 0x8c001000 - 0x8c4713c0 (4544 kB)
[ 0.000000] Preemptible hierarchical RCU implementation.
[ 0.000000] Build-time adjustment of leaf fanout to 32.
[ 0.000000] NR_IRQS:8 nr_irqs:8 0
[ 0.000000] intc: Registered controller 'sh7750' with 20 IRQs
[ 0.000000] intc: Registered controller 'sh7750_dma8' with 9 IRQs
[ 0.000000] intc: Registered controller 'sh7750_tmu34' with 2 IRQs
[ 0.000000] intc: Registered controller 'sh7750_pci' with 8 IRQs
[ 0.000000] intc: Registered controller 'landisk' with 8 IRQs
[ 0.000000] sched_clock: 32 bits at 250 Hz, resolution 4000000ns, wraps every 8589934590000000ns
[ 0.000000] Console: colour dummy device 80x25
[ 0.000000] sh-tmu.0: ch0: used for clock events
[ 0.000000] sh-tmu.0: ch0: used for periodic clock events
[ 0.000000] sh-tmu.0: ch1: used as clock source
[ 0.000000] clocksource: sh-tmu.0: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 1911260446275000000 ns
[ 0.000000] sh-tmu.1: ch0: used for clock events
[ 0.000000] sh-tmu.1: ch1: used as clock source
[ 0.000000] clocksource: sh-tmu.1: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 1911260446275000000 ns
[ 0.000000] Calibrating delay loop (skipped)... 266.00 BogoMIPS PRESET (lpj=532000)
[ 0.000000] pid_max: default: 32768 minimum: 301
[ 0.000000] Security Framework initialized
[ 0.000000] Yama: becoming mindful.
[ 0.000000] AppArmor: AppArmor disabled by boot time parameter
[ 0.004000] Mount-cache hash table entries: 1024 (order: 0, 4096 bytes)
[ 0.004000] Mountpoint-cache hash table entries: 1024 (order: 0, 4096 bytes)
[ 0.024000] CPU: SH7751R
[ 0.052000] devtmpfs: initialized
[ 0.104000] clocksource: jiffies: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 7645041785100000 ns
[ 0.120000] NET: Registered protocol family 16
[ 0.168000] cpuidle: using governor ladder
[ 0.180000] cpuidle: using governor menu
[ 0.212000] PCI: Starting initialization.
[ 1.024000] random: fast init done
[ 1.068000] HugeTLB registered 1 MB page size, pre-allocated 0 pages
[ 1.120000] SCSI subsystem initialized
[ 1.152000] usbcore: registered new interface driver usbfs
[ 1.160000] usbcore: registered new interface driver hub
[ 1.164000] usbcore: registered new device driver usb
[ 1.176000] sh_tmu sh-tmu.0: kept as earlytimer
[ 1.176000] sh_tmu sh-tmu.1: kept as earlytimer
[ 1.180000] DMA: Registering sh_dmac handler (8 channels).
[ 1.252000] DMA: Registering DMA API.
[ 1.264000] PCI host bridge to bus 0000:00
[ 1.264000] pci_bus 0000:00: root bus resource [io 0x1000-0x3fffff]
[ 1.264000] pci_bus 0000:00: root bus resource [mem 0xfd000000-0xfdffffff]
[ 1.264000] pci_bus 0000:00: No busn resource found for root bus, will use [bus 00-ff]
[ 1.328000] pci 0000:00:02.0: BAR 0: assigned [mem 0xfd000000-0xfd000fff]
[ 1.328000] pci 0000:00:02.1: BAR 0: assigned [mem 0xfd001000-0xfd001fff]
[ 1.328000] pci 0000:00:00.0: BAR 0: assigned [io 0x1000-0x10ff]
[ 1.328000] pci 0000:00:00.0: BAR 1: assigned [mem 0xfd002000-0xfd0020ff]
[ 1.328000] pci 0000:00:02.2: BAR 0: assigned [mem 0xfd002100-0xfd0021ff]
[ 1.380000] clocksource: sh-tmu.0: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 229926068810 ns
[ 1.380000] clocksource: Switched to clocksource sh-tmu.0
[ 1.384000] sh_tmu sh-tmu.0: ch0: used for oneshot clock events
[ 2.016000] NET: Registered protocol family 2
[ 2.032000] TCP established hash table entries: 1024 (order: 0, 4096 bytes)
[ 2.032000] TCP bind hash table entries: 1024 (order: 2, 20480 bytes)
[ 2.032000] TCP: Hash tables configured (established 1024 bind 1024)
[ 2.036000] UDP hash table entries: 256 (order: 1, 12288 bytes)
[ 2.036000] UDP-Lite hash table entries: 256 (order: 1, 12288 bytes)
[ 2.040000] NET: Registered protocol family 1
[ 2.052000] RPC: Registered named UNIX socket transport module.
[ 2.052000] RPC: Registered udp transport module.
[ 2.052000] RPC: Registered tcp transport module.
[ 2.052000] RPC: Registered tcp NFSv4.1 backchannel transport module.
[ 2.052000] pci 0000:00:02.0: enabling device (0000 -> 0002)
[ 2.052000] pci 0000:00:02.1: enabling device (0000 -> 0002)
[ 2.052000] pci 0000:00:02.2: enabling device (0000 -> 0002)
[ 2.056000] sq: Registering store queue API.
[ 2.084000] gio: driver initialized
[ 2.132000] futex hash table entries: 256 (order: 0, 7168 bytes)
[ 2.136000] audit: initializing netlink subsys (disabled)
[ 2.136000] audit: type=2000 audit(946684802.135:1): initialized
[ 2.156000] workingset: timestamp_bits=30 max_order=14 bucket_order=0
[ 2.184000] NFS: Registering the id_resolver key type
[ 2.184000] Key type id_resolver registered
[ 2.184000] Key type id_legacy registered
[ 2.184000] nfs4filelayout_init: NFSv4 File Layout Driver Registering...
[ 2.184000] ntfs: driver 2.1.32 [Flags: R/W].
[ 2.208000] Block layer SCSI generic (bsg) driver version 0.4 loaded (major 251)
[ 2.208000] io scheduler noop registered
[ 2.208000] io scheduler deadline registered
[ 2.208000] io scheduler cfq registered (default)
[ 2.224000] SuperH (H)SCI(F) driver initialized
[ 2.228000] sh-sci.0: ttySC0 at MMIO 0xffe00000 (irq = 23, base_baud = 0) is a sci
[ 2.248000] sh-sci.1: ttySC1 at MMIO 0xffe80000 (irq = 40, base_baud = 0) is a scif
[ 10.560000] console [ttySC1] enabled
[ 11.252000] brd: module loaded
[ 11.668000] loop: module loaded
[ 11.704000] Uniform Multi-Platform E-IDE driver
[ 11.788000] ide-gd driver 1.18
[ 47.556000] hda: probing with STATUS(0xe0) instead of ALTSTATUS(0x0a)
[ 52.672000] hda: timeout in ide_busy_sleep
[ 52.780000] hda: probing with STATUS(0xa1) instead of ALTSTATUS(0x0a)
[ 57.896000] hda: timeout in ide_busy_sleep
[ 57.944000] hda: no response (status = 0xa1), resetting drive
[ 88.132000] hda: timeout in ide_busy_sleep
[ 88.240000] hda: probing with STATUS(0xa8) instead of ALTSTATUS(0x0a)
[ 93.356000] hda: timeout in ide_busy_sleep
[ 93.404000] hda: no response (status = 0xa1)
[ 93.816000] hdb: probing with STATUS(0xa1) instead of ALTSTATUS(0x0a)
[ 98.932000] hdb: timeout in ide_busy_sleep
[ 99.040000] hdb: probing with STATUS(0xa1) instead of ALTSTATUS(0x0a)
[ 99.116000] random: crng init done
[ 104.196000] hdb: timeout in ide_busy_sleep
[ 104.244000] hdb: no response (status = 0xa1), resetting drive
[ 134.432000] hdb: timeout in ide_busy_sleep
[ 134.540000] hdb: probing with STATUS(0xa8) instead of ALTSTATUS(0x0a)
[ 139.656000] hdb: timeout in ide_busy_sleep
[ 139.704000] hdb: no response (status = 0xa1)
[ 139.824000] ide0 at 0xc000003f-0xc000004d,0xc000002b on irq 10
[ 139.932000] 8139too: 8139too Fast Ethernet driver 0.9.28
[ 139.996000] 8139too 0000:00:00.0: This (id 10ec:8139 rev 20) is an enhanced 8139C+ chip, use 8139cp
[ 140.112000] ehci_hcd: USB 2.0 'Enhanced' Host Controller (EHCI) Driver
[ 140.200000] ehci-pci: EHCI PCI platform driver
[ 140.256000] ehci-pci 0000:00:02.2: EHCI Host Controller
[ 140.320000] ehci-pci 0000:00:02.2: new USB bus registered, assigned bus number 1
[ 140.412000] ehci-pci 0000:00:02.2: irq 5, io mem 0xfd002100
[ 140.496000] ehci-pci 0000:00:02.2: USB 2.0 started, EHCI 1.00
[ 140.616000] hub 1-0:1.0: USB hub found
[ 140.664000] hub 1-0:1.0: 5 ports detected
[ 140.764000] ehci-platform: EHCI generic platform driver
[ 140.832000] ohci_hcd: USB 1.1 'Open' Host Controller (OHCI) Driver
[ 140.908000] ohci-pci: OHCI PCI platform driver
[ 140.964000] ohci-pci 0000:00:02.0: OHCI PCI host controller
[ 141.032000] ohci-pci 0000:00:02.0: new USB bus registered, assigned bus number 2
[ 141.124000] ohci-pci 0000:00:02.0: irq 7, io mem 0xfd000000
[ 141.332000] hub 2-0:1.0: USB hub found
[ 141.380000] hub 2-0:1.0: 3 ports detected
[ 141.464000] ohci-pci 0000:00:02.1: OHCI PCI host controller
[ 141.532000] ohci-pci 0000:00:02.1: new USB bus registered, assigned bus number 3
[ 141.624000] ohci-pci 0000:00:02.1: irq 8, io mem 0xfd001000
[ 141.832000] hub 3-0:1.0: USB hub found
[ 141.880000] hub 3-0:1.0: 2 ports detected
[ 141.960000] ohci-platform: OHCI generic platform driver
[ 142.036000] usbcore: registered new interface driver usb-storage
[ 142.124000] mousedev: PS/2 mouse device common for all mice
[ 142.224000] rs5c313 rs5c313: rs5c313_rtc_read_time: timeout error
[ 142.312000] rs5c313 rs5c313: rtc core: registered rs5c313 as rtc0
[ 142.388000] rtc_rs5c313: invalid value, resetting to 1 Jan 2000
[ 142.476000] sh-rtc sh-rtc: rtc core: registered sh as rtc1
[ 142.556000] cpufreq: SuperH CPU frequency driver.
[ 142.616000] cpu cpu0: no frequency table found, falling back to rate rounding.
[ 142.704000] cpu cpu0: CPU Frequencies - Minimum 266.000 MHz, Maximum 266.000 MHz.
[ 142.792000] cpufreq: cpufreq_online: ->get() failed
[ 142.904000] usbcore: registered new interface driver usbhid
[ 142.972000] usbhid: USB HID core driver
[ 143.016000] push-switch: version 0.1.1 loaded
[ 143.080000] heartbeat: version 0.1.2 loaded
[ 143.140000] NET: Registered protocol family 10
[ 143.216000] sit: IPv6, IPv4 and MPLS over IPv4 tunneling driver
[ 143.332000] NET: Registered protocol family 17
[ 143.388000] Key type dns_resolver registered
[ 143.472000] kmemleak: Kernel memory leak detector initialized
[ 143.540000] kmemleak: Automatic memory scanning thread started
[ 143.620000] rs5c313 rs5c313: setting system clock to 2000-01-01 00:00:01 UTC (946684801)
�[ 143.724000] VFS: Cannot open root device "hda2" or unknown-block(0,0): error -6
[ 143.812000] Please append a correct "root=" boot option; here are the available partitions:
[ 143.912000] 0100 4096 ram0 (driver?)
[ 143.968000] 0101 4096 ram1 (driver?)
[ 144.024000] 0102 4096 ram2 (driver?)
[ 144.080000] 0103 4096 ram3 (driver?)
[ 144.136000] 0104 4096 ram4 (driver?)
[ 144.188000] 0105 4096 ram5 (driver?)
[ 144.244000] 0106 4096 ram6 (driver?)
[ 144.300000] 0107 4096 ram7 (driver?)
[ 144.356000] 0108 4096 ram8 (driver?)
[ 144.412000] 0109 4096 ram9 (driver?)
[ 144.468000] 010a 4096 ram10 (driver?)
[ 144.524000] 010b 4096 ram11 (driver?)
[ 144.580000] 010c 4096 ram12 (driver?)
[ 144.636000] 010d 4096 ram13 (driver?)
[ 144.692000] 010e 4096 ram14 (driver?)
[ 144.748000] 010f 4096 ram15 (driver?)
[ 144.804000] Kernel panic - not syncing: VFS: Unable to mount root fs on unknown-block(0,0)
[ 144.804000] CPU: 0 PID: 1 Comm: swapper Not tainted 4.8.12 #4
[ 144.804000] Stack: (0x8fc45e78 to 0x8fc46000)
[ 144.804000] 5e60: 8c27266c 8fc45e88
[ 144.804000] 5e80: 00000000 8c0037e8 8c08f25e 8fc45e90 8c041688 8fc45eb8 8c618046 8fc45ec4
[ 144.804000] 5ea0: 8c0f2dec 8c6352a8 00008001 8f44e000 8c6e49c0 8c08f3fc 8fc45ed0 8fe6a864
[ 144.804000] 5ec0: 00000001 00000000 fffffffa 8c55f814 6e6b6e75 2d6e776f 636f6c62 2c30286b
[ 144.804000] 5ee0: 8f002930 8f8097e0 8c0e1f7e 8fc45f08 8c61829c 8fc45f10 8c634e78 8c64501c
[ 144.804000] 5f00: 8c645008 8c5e6ad4 8c002144 00000000 8fc45f14 00000000 fffffffe 8c618428
[ 144.804000] 5f20: 8fc45f3c 8c634e78 8c64501c 8c645008 8c634e38 8c002144 8c645024 8c634e78
[ 144.804000] 5f40: 8c617bf0 8fc45f5c 8c64501c 8c645008 8c634e38 8c002144 8c645014 00000007
[ 144.804000] 5f60: 00000007 00000000 8c617234 8c642804 000000b5 8c468b6c 8fc45f94 00000000
[ 144.804000] 5f80: 8fc4221c 8c0037d8 000000f0 8fc42cc0 8c08f3fc 8c008224 8fc4df2c 8fc42cc0
[ 144.804000] 5fa0: 8c031804 00000000 00000000 00000000 00000000 00000000 8c468b5c 00000000
[ 144.804000] 5fc0: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000
[ 144.804000] 5fe0: 00000000 00000000 00000000 40008000 00000000 00000000 00000000 00000000
[ 144.804000]
[ 144.804000] Call trace:
[ 144.804000] [<8c27266c>] dump_stack+0x14/0x28
[ 144.804000] [<8c0037e8>] arch_local_irq_restore+0x0/0x2c
[ 144.804000] [<8c08f25e>] panic+0x9e/0x1e0
[ 144.804000] [<8c041688>] vprintk_default+0x0/0x28
[ 144.804000] [<8c618046>] mount_block_root+0x186/0x240
[ 144.804000] [<8c0f2dec>] SyS_mount+0x0/0xc4
[ 144.804000] [<8c08f3fc>] printk+0x0/0x6c
[ 144.804000] [<8c0e1f7e>] SyS_mknod+0x12/0x20
[ 144.804000] [<8c61829c>] mount_root+0xc0/0x120
[ 144.804000] [<8c002144>] do_one_initcall+0x0/0x128
[ 144.804000] [<8c618428>] prepare_namespace+0x12c/0x1d4
[ 144.804000] [<8c002144>] do_one_initcall+0x0/0x128
[ 144.804000] [<8c617bf0>] kernel_init_freeable+0x188/0x264
[ 144.804000] [<8c002144>] do_one_initcall+0x0/0x128
[ 144.804000] [<8c617234>] repair_env_string+0x0/0x70
[ 144.804000] [<8c468b6c>] kernel_init+0x10/0x104
[ 144.804000] [<8c0037d8>] arch_local_save_flags+0x0/0x10
[ 144.804000] [<8c08f3fc>] printk+0x0/0x6c
[ 144.804000] [<8c008224>] ret_from_kernel_thread+0xc/0x14
[ 144.804000] [<8c031804>] schedule_tail+0x0/0x84
[ 144.804000] [<8c468b5c>] kernel_init+0x0/0x104
[ 144.804000]
[ 144.804000] ---[ end Kernel panic - not syncing: VFS: Unable to mount root fs on unknown-block(0,0)
[-- Attachment #3: config-usl-5p-4.8.12.txt --]
[-- Type: text/plain, Size: 61584 bytes --]
#
# Automatically generated file; DO NOT EDIT.
# Linux/sh 4.8.12 Kernel Configuration
#
CONFIG_SUPERH=y
CONFIG_SUPERH32=y
# CONFIG_SUPERH64 is not set
CONFIG_ARCH_DEFCONFIG="arch/sh/configs/shx3_defconfig"
CONFIG_RWSEM_GENERIC_SPINLOCK=y
CONFIG_GENERIC_BUG=y
CONFIG_GENERIC_HWEIGHT=y
# CONFIG_ARCH_SUSPEND_POSSIBLE is not set
CONFIG_ARCH_HIBERNATION_POSSIBLE=y
CONFIG_SYS_SUPPORTS_HUGETLBFS=y
CONFIG_SYS_SUPPORTS_PCI=y
CONFIG_STACKTRACE_SUPPORT=y
CONFIG_LOCKDEP_SUPPORT=y
# CONFIG_ARCH_HAS_ILOG2_U32 is not set
# CONFIG_ARCH_HAS_ILOG2_U64 is not set
# CONFIG_NO_IOPORT_MAP is not set
CONFIG_DMA_NONCOHERENT=y
CONFIG_NEED_DMA_MAP_STATE=y
CONFIG_NEED_SG_DMA_LENGTH=y
CONFIG_PGTABLE_LEVELS=2
CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
CONFIG_CONSTRUCTORS=y
CONFIG_IRQ_WORK=y
#
# General setup
#
CONFIG_BROKEN_ON_SMP=y
CONFIG_INIT_ENV_ARG_LIMIT=32
CONFIG_CROSS_COMPILE=""
# CONFIG_COMPILE_TEST is not set
CONFIG_LOCALVERSION=""
CONFIG_LOCALVERSION_AUTO=y
CONFIG_HAVE_KERNEL_GZIP=y
CONFIG_HAVE_KERNEL_BZIP2=y
CONFIG_HAVE_KERNEL_LZMA=y
CONFIG_HAVE_KERNEL_XZ=y
CONFIG_HAVE_KERNEL_LZO=y
CONFIG_KERNEL_GZIP=y
# CONFIG_KERNEL_BZIP2 is not set
# CONFIG_KERNEL_LZMA is not set
# CONFIG_KERNEL_XZ is not set
# CONFIG_KERNEL_LZO is not set
CONFIG_DEFAULT_HOSTNAME="(none)"
CONFIG_SWAP=y
CONFIG_SYSVIPC=y
CONFIG_SYSVIPC_SYSCTL=y
CONFIG_POSIX_MQUEUE=y
CONFIG_POSIX_MQUEUE_SYSCTL=y
CONFIG_CROSS_MEMORY_ATTACH=y
CONFIG_FHANDLE=y
CONFIG_USELIB=y
CONFIG_AUDIT=y
CONFIG_HAVE_ARCH_AUDITSYSCALL=y
CONFIG_AUDITSYSCALL=y
CONFIG_AUDIT_WATCH=y
CONFIG_AUDIT_TREE=y
#
# IRQ subsystem
#
CONFIG_MAY_HAVE_SPARSE_IRQ=y
CONFIG_GENERIC_IRQ_SHOW=y
CONFIG_IRQ_DOMAIN=y
# CONFIG_IRQ_DOMAIN_DEBUG is not set
CONFIG_IRQ_FORCED_THREADING=y
CONFIG_SPARSE_IRQ=y
CONFIG_GENERIC_CLOCKEVENTS=y
#
# Timers subsystem
#
CONFIG_TICK_ONESHOT=y
CONFIG_NO_HZ_COMMON=y
# CONFIG_HZ_PERIODIC is not set
CONFIG_NO_HZ_IDLE=y
CONFIG_NO_HZ=y
CONFIG_HIGH_RES_TIMERS=y
#
# CPU/Task time and stats accounting
#
CONFIG_TICK_CPU_ACCOUNTING=y
CONFIG_BSD_PROCESS_ACCT=y
# CONFIG_BSD_PROCESS_ACCT_V3 is not set
# CONFIG_TASKSTATS is not set
#
# RCU Subsystem
#
CONFIG_PREEMPT_RCU=y
# CONFIG_RCU_EXPERT is not set
CONFIG_SRCU=y
# CONFIG_TASKS_RCU is not set
CONFIG_RCU_STALL_COMMON=y
# CONFIG_TREE_RCU_TRACE is not set
# CONFIG_RCU_EXPEDITE_BOOT is not set
CONFIG_BUILD_BIN2C=y
CONFIG_IKCONFIG=y
CONFIG_IKCONFIG_PROC=y
CONFIG_LOG_BUF_SHIFT=16
CONFIG_NMI_LOG_BUF_SHIFT=13
CONFIG_GENERIC_SCHED_CLOCK=y
CONFIG_CGROUPS=y
# CONFIG_MEMCG is not set
# CONFIG_BLK_CGROUP is not set
CONFIG_CGROUP_SCHED=y
CONFIG_FAIR_GROUP_SCHED=y
# CONFIG_CFS_BANDWIDTH is not set
# CONFIG_RT_GROUP_SCHED is not set
# CONFIG_CGROUP_PIDS is not set
CONFIG_CGROUP_FREEZER=y
# CONFIG_CGROUP_HUGETLB is not set
CONFIG_CPUSETS=y
CONFIG_PROC_PID_CPUSET=y
CONFIG_CGROUP_DEVICE=y
CONFIG_CGROUP_CPUACCT=y
CONFIG_CGROUP_PERF=y
# CONFIG_CGROUP_DEBUG is not set
# CONFIG_CHECKPOINT_RESTORE is not set
# CONFIG_NAMESPACES is not set
# CONFIG_SCHED_AUTOGROUP is not set
# CONFIG_SYSFS_DEPRECATED is not set
# CONFIG_RELAY is not set
# CONFIG_BLK_DEV_INITRD is not set
CONFIG_CC_OPTIMIZE_FOR_PERFORMANCE=y
# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
CONFIG_SYSCTL=y
CONFIG_ANON_INODES=y
CONFIG_HAVE_UID16=y
CONFIG_BPF=y
CONFIG_EXPERT=y
CONFIG_UID16=y
CONFIG_MULTIUSER=y
CONFIG_SGETMASK_SYSCALL=y
CONFIG_SYSFS_SYSCALL=y
# CONFIG_SYSCTL_SYSCALL is not set
CONFIG_KALLSYMS=y
CONFIG_KALLSYMS_ALL=y
# CONFIG_KALLSYMS_ABSOLUTE_PERCPU is not set
CONFIG_KALLSYMS_BASE_RELATIVE=y
CONFIG_PRINTK=y
CONFIG_PRINTK_NMI=y
CONFIG_BUG=y
CONFIG_ELF_CORE=y
CONFIG_BASE_FULL=y
CONFIG_FUTEX=y
CONFIG_HAVE_FUTEX_CMPXCHG=y
CONFIG_EPOLL=y
CONFIG_SIGNALFD=y
CONFIG_TIMERFD=y
CONFIG_EVENTFD=y
# CONFIG_BPF_SYSCALL is not set
CONFIG_SHMEM=y
CONFIG_AIO=y
CONFIG_ADVISE_SYSCALLS=y
# CONFIG_USERFAULTFD is not set
CONFIG_PCI_QUIRKS=y
CONFIG_MEMBARRIER=y
# CONFIG_EMBEDDED is not set
CONFIG_HAVE_PERF_EVENTS=y
CONFIG_PERF_USE_VMALLOC=y
#
# Kernel Performance Events And Counters
#
CONFIG_PERF_EVENTS=y
# CONFIG_DEBUG_PERF_USE_VMALLOC is not set
CONFIG_VM_EVENT_COUNTERS=y
# CONFIG_COMPAT_BRK is not set
CONFIG_SLAB=y
# CONFIG_SLUB is not set
# CONFIG_SLOB is not set
# CONFIG_SLAB_FREELIST_RANDOM is not set
# CONFIG_SYSTEM_DATA_VERIFICATION is not set
CONFIG_PROFILING=y
# CONFIG_OPROFILE is not set
CONFIG_HAVE_OPROFILE=y
# CONFIG_KPROBES is not set
# CONFIG_UPROBES is not set
# CONFIG_HAVE_64BIT_ALIGNED_ACCESS is not set
CONFIG_HAVE_IOREMAP_PROT=y
CONFIG_HAVE_KPROBES=y
CONFIG_HAVE_KRETPROBES=y
CONFIG_HAVE_NMI=y
CONFIG_HAVE_ARCH_TRACEHOOK=y
CONFIG_GENERIC_SMP_IDLE_THREAD=y
CONFIG_GENERIC_IDLE_POLL_SETUP=y
CONFIG_HAVE_REGS_AND_STACK_ACCESS_API=y
CONFIG_HAVE_CLK=y
CONFIG_HAVE_DMA_API_DEBUG=y
CONFIG_HAVE_HW_BREAKPOINT=y
CONFIG_HAVE_MIXED_BREAKPOINTS_REGS=y
CONFIG_ARCH_WANT_IPC_PARSE_VERSION=y
CONFIG_HAVE_CC_STACKPROTECTOR=y
# CONFIG_CC_STACKPROTECTOR is not set
CONFIG_CC_STACKPROTECTOR_NONE=y
# CONFIG_CC_STACKPROTECTOR_REGULAR is not set
# CONFIG_CC_STACKPROTECTOR_STRONG is not set
CONFIG_MODULES_USE_ELF_RELA=y
# CONFIG_HAVE_ARCH_HASH is not set
# CONFIG_ISA_BUS_API is not set
CONFIG_OLD_SIGSUSPEND=y
CONFIG_OLD_SIGACTION=y
CONFIG_CPU_NO_EFFICIENT_FFS=y
#
# GCOV-based kernel profiling
#
CONFIG_GCOV_KERNEL=y
CONFIG_ARCH_HAS_GCOV_PROFILE_ALL=y
# CONFIG_GCOV_PROFILE_ALL is not set
CONFIG_GCOV_FORMAT_AUTODETECT=y
# CONFIG_GCOV_FORMAT_3_4 is not set
# CONFIG_GCOV_FORMAT_4_7 is not set
CONFIG_HAVE_GENERIC_DMA_COHERENT=y
CONFIG_SLABINFO=y
CONFIG_RT_MUTEXES=y
CONFIG_BASE_SMALL=0
CONFIG_MODULES=y
# CONFIG_MODULE_FORCE_LOAD is not set
CONFIG_MODULE_UNLOAD=y
# CONFIG_MODULE_FORCE_UNLOAD is not set
# CONFIG_MODVERSIONS is not set
# CONFIG_MODULE_SRCVERSION_ALL is not set
# CONFIG_MODULE_SIG is not set
# CONFIG_MODULE_COMPRESS is not set
# CONFIG_TRIM_UNUSED_KSYMS is not set
CONFIG_MODULES_TREE_LOOKUP=y
CONFIG_BLOCK=y
CONFIG_LBDAF=y
CONFIG_BLK_DEV_BSG=y
# CONFIG_BLK_DEV_BSGLIB is not set
# CONFIG_BLK_DEV_INTEGRITY is not set
# CONFIG_BLK_CMDLINE_PARSER is not set
#
# Partition Types
#
CONFIG_PARTITION_ADVANCED=y
# CONFIG_ACORN_PARTITION is not set
# CONFIG_AIX_PARTITION is not set
# CONFIG_OSF_PARTITION is not set
# CONFIG_AMIGA_PARTITION is not set
# CONFIG_ATARI_PARTITION is not set
# CONFIG_MAC_PARTITION is not set
CONFIG_MSDOS_PARTITION=y
# CONFIG_BSD_DISKLABEL is not set
# CONFIG_MINIX_SUBPARTITION is not set
# CONFIG_SOLARIS_X86_PARTITION is not set
# CONFIG_UNIXWARE_DISKLABEL is not set
# CONFIG_LDM_PARTITION is not set
# CONFIG_SGI_PARTITION is not set
# CONFIG_ULTRIX_PARTITION is not set
# CONFIG_SUN_PARTITION is not set
# CONFIG_KARMA_PARTITION is not set
CONFIG_EFI_PARTITION=y
# CONFIG_SYSV68_PARTITION is not set
# CONFIG_CMDLINE_PARTITION is not set
#
# IO Schedulers
#
CONFIG_IOSCHED_NOOP=y
CONFIG_IOSCHED_DEADLINE=y
CONFIG_IOSCHED_CFQ=y
# CONFIG_DEFAULT_DEADLINE is not set
CONFIG_DEFAULT_CFQ=y
# CONFIG_DEFAULT_NOOP is not set
CONFIG_DEFAULT_IOSCHED="cfq"
CONFIG_UNINLINE_SPIN_UNLOCK=y
CONFIG_FREEZER=y
#
# System type
#
CONFIG_CPU_SH4=y
CONFIG_CPU_HAS_PMU=y
# CONFIG_CPU_SUBTYPE_SH7619 is not set
# CONFIG_CPU_SUBTYPE_J2 is not set
# CONFIG_CPU_SUBTYPE_SH7201 is not set
# CONFIG_CPU_SUBTYPE_SH7203 is not set
# CONFIG_CPU_SUBTYPE_SH7206 is not set
# CONFIG_CPU_SUBTYPE_SH7263 is not set
# CONFIG_CPU_SUBTYPE_SH7264 is not set
# CONFIG_CPU_SUBTYPE_SH7269 is not set
# CONFIG_CPU_SUBTYPE_MXG is not set
# CONFIG_CPU_SUBTYPE_SH7705 is not set
# CONFIG_CPU_SUBTYPE_SH7706 is not set
# CONFIG_CPU_SUBTYPE_SH7707 is not set
# CONFIG_CPU_SUBTYPE_SH7708 is not set
# CONFIG_CPU_SUBTYPE_SH7709 is not set
# CONFIG_CPU_SUBTYPE_SH7710 is not set
# CONFIG_CPU_SUBTYPE_SH7712 is not set
# CONFIG_CPU_SUBTYPE_SH7720 is not set
# CONFIG_CPU_SUBTYPE_SH7721 is not set
# CONFIG_CPU_SUBTYPE_SH7750 is not set
# CONFIG_CPU_SUBTYPE_SH7091 is not set
# CONFIG_CPU_SUBTYPE_SH7750R is not set
# CONFIG_CPU_SUBTYPE_SH7750S is not set
# CONFIG_CPU_SUBTYPE_SH7751 is not set
CONFIG_CPU_SUBTYPE_SH7751R=y
# CONFIG_CPU_SUBTYPE_SH7760 is not set
# CONFIG_CPU_SUBTYPE_SH4_202 is not set
# CONFIG_CPU_SUBTYPE_SH7723 is not set
# CONFIG_CPU_SUBTYPE_SH7724 is not set
# CONFIG_CPU_SUBTYPE_SH7734 is not set
# CONFIG_CPU_SUBTYPE_SH7757 is not set
# CONFIG_CPU_SUBTYPE_SH7763 is not set
# CONFIG_CPU_SUBTYPE_SH7770 is not set
# CONFIG_CPU_SUBTYPE_SH7780 is not set
# CONFIG_CPU_SUBTYPE_SH7785 is not set
# CONFIG_CPU_SUBTYPE_SH7786 is not set
# CONFIG_CPU_SUBTYPE_SHX3 is not set
# CONFIG_CPU_SUBTYPE_SH7343 is not set
# CONFIG_CPU_SUBTYPE_SH7722 is not set
# CONFIG_CPU_SUBTYPE_SH7366 is not set
#
# Memory management options
#
CONFIG_QUICKLIST=y
CONFIG_MMU=y
CONFIG_PAGE_OFFSET=0x80000000
CONFIG_FORCE_MAX_ZONEORDER=11
CONFIG_MEMORY_START=0xc000000
CONFIG_MEMORY_SIZE=0x4000000
CONFIG_29BIT=y
CONFIG_VSYSCALL=y
CONFIG_ARCH_FLATMEM_ENABLE=y
CONFIG_ARCH_SPARSEMEM_ENABLE=y
CONFIG_ARCH_SPARSEMEM_DEFAULT=y
CONFIG_ARCH_SELECT_MEMORY_MODEL=y
CONFIG_ARCH_ENABLE_MEMORY_HOTPLUG=y
CONFIG_ARCH_ENABLE_MEMORY_HOTREMOVE=y
CONFIG_UNCACHED_MAPPING=y
CONFIG_PAGE_SIZE_4KB=y
# CONFIG_PAGE_SIZE_64KB is not set
# CONFIG_HUGETLB_PAGE_SIZE_64K is not set
CONFIG_HUGETLB_PAGE_SIZE_1MB=y
CONFIG_SELECT_MEMORY_MODEL=y
# CONFIG_FLATMEM_MANUAL is not set
CONFIG_SPARSEMEM_MANUAL=y
CONFIG_SPARSEMEM=y
CONFIG_HAVE_MEMORY_PRESENT=y
CONFIG_SPARSEMEM_STATIC=y
CONFIG_HAVE_MEMBLOCK=y
CONFIG_HAVE_MEMBLOCK_NODE_MAP=y
CONFIG_ARCH_DISCARD_MEMBLOCK=y
# CONFIG_HAVE_BOOTMEM_INFO_NODE is not set
# CONFIG_MEMORY_HOTPLUG is not set
CONFIG_SPLIT_PTLOCK_CPUS=4
# CONFIG_COMPACTION is not set
CONFIG_MIGRATION=y
# CONFIG_PHYS_ADDR_T_64BIT is not set
CONFIG_NR_QUICK=1
# CONFIG_KSM is not set
CONFIG_DEFAULT_MMAP_MIN_ADDR=4096
CONFIG_NEED_PER_CPU_KM=y
# CONFIG_CLEANCACHE is not set
# CONFIG_FRONTSWAP is not set
# CONFIG_CMA is not set
# CONFIG_ZPOOL is not set
# CONFIG_ZBUD is not set
# CONFIG_ZSMALLOC is not set
# CONFIG_IDLE_PAGE_TRACKING is not set
#
# Cache configuration
#
CONFIG_CACHE_WRITEBACK=y
# CONFIG_CACHE_WRITETHROUGH is not set
# CONFIG_CACHE_OFF is not set
#
# Processor features
#
CONFIG_CPU_LITTLE_ENDIAN=y
# CONFIG_CPU_BIG_ENDIAN is not set
CONFIG_SH_FPU=y
CONFIG_SH_STORE_QUEUES=y
CONFIG_CPU_HAS_INTEVT=y
CONFIG_CPU_HAS_SR_RB=y
CONFIG_CPU_HAS_FPU=y
#
# Board support
#
# CONFIG_SH_DEVICE_TREE is not set
# CONFIG_SH_SECUREEDGE5410 is not set
# CONFIG_SH_RTS7751R2D is not set
CONFIG_SH_LANDISK=y
# CONFIG_SH_TITAN is not set
# CONFIG_SH_LBOX_RE2 is not set
#
# Timer and clock configuration
#
CONFIG_SH_PCLK_FREQ=33250000
CONFIG_SH_CLK_CPG=y
CONFIG_SH_CLK_CPG_LEGACY=y
#
# CPU Frequency scaling
#
#
# CPU Frequency scaling
#
CONFIG_CPU_FREQ=y
CONFIG_CPU_FREQ_GOV_ATTR_SET=y
CONFIG_CPU_FREQ_GOV_COMMON=y
CONFIG_CPU_FREQ_STAT=y
CONFIG_CPU_FREQ_STAT_DETAILS=y
# CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE is not set
# CONFIG_CPU_FREQ_DEFAULT_GOV_POWERSAVE is not set
# CONFIG_CPU_FREQ_DEFAULT_GOV_USERSPACE is not set
CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND=y
# CONFIG_CPU_FREQ_DEFAULT_GOV_CONSERVATIVE is not set
CONFIG_CPU_FREQ_GOV_PERFORMANCE=y
# CONFIG_CPU_FREQ_GOV_POWERSAVE is not set
# CONFIG_CPU_FREQ_GOV_USERSPACE is not set
CONFIG_CPU_FREQ_GOV_ONDEMAND=y
# CONFIG_CPU_FREQ_GOV_CONSERVATIVE is not set
#
# CPU frequency scaling drivers
#
CONFIG_SH_CPU_FREQ=y
#
# DMA support
#
CONFIG_SH_DMA=y
CONFIG_SH_DMA_IRQ_MULTI=y
CONFIG_SH_DMA_API=y
CONFIG_NR_ONCHIP_DMA_CHANNELS=8
#
# Companion Chips
#
#
# Additional SuperH Device Drivers
#
CONFIG_HEARTBEAT=y
CONFIG_PUSH_SWITCH=y
#
# Kernel features
#
# CONFIG_HZ_100 is not set
CONFIG_HZ_250=y
# CONFIG_HZ_300 is not set
# CONFIG_HZ_1000 is not set
CONFIG_HZ=250
CONFIG_SCHED_HRTICK=y
# CONFIG_KEXEC is not set
# CONFIG_CRASH_DUMP is not set
CONFIG_PHYSICAL_START=0xc000000
CONFIG_SECCOMP=y
# CONFIG_PREEMPT_NONE is not set
# CONFIG_PREEMPT_VOLUNTARY is not set
CONFIG_PREEMPT=y
CONFIG_PREEMPT_COUNT=y
CONFIG_GUSA=y
# CONFIG_GUSA_RB is not set
CONFIG_HW_PERF_EVENTS=y
#
# SuperH / SH-Mobile Driver Options
#
CONFIG_SH_INTC=y
#
# Interrupt controller options
#
# CONFIG_INTC_MAPPING_DEBUG is not set
#
# Boot options
#
CONFIG_ZERO_PAGE_OFFSET=0x00001000
CONFIG_BOOT_LINK_OFFSET=0x00800000
CONFIG_ENTRY_OFFSET=0x00001000
#
# Bus options
#
CONFIG_PCI=y
CONFIG_PCI_DOMAINS=y
# CONFIG_PCIEPORTBUS is not set
# CONFIG_PCI_MSI is not set
CONFIG_PCI_DEBUG=y
# CONFIG_PCI_REALLOC_ENABLE_AUTO is not set
# CONFIG_PCI_STUB is not set
# CONFIG_PCI_IOV is not set
# CONFIG_PCI_PRI is not set
# CONFIG_PCI_PASID is not set
# CONFIG_HOTPLUG_PCI is not set
#
# PCI host controller drivers
#
# CONFIG_PCCARD is not set
#
# Executable file formats
#
CONFIG_BINFMT_ELF=y
CONFIG_ELFCORE=y
CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS=y
CONFIG_BINFMT_SCRIPT=y
# CONFIG_HAVE_AOUT is not set
# CONFIG_BINFMT_MISC is not set
CONFIG_COREDUMP=y
#
# Power management options (EXPERIMENTAL)
#
# CONFIG_HIBERNATION is not set
# CONFIG_PM is not set
#
# CPU Idle
#
CONFIG_CPU_IDLE=y
CONFIG_CPU_IDLE_GOV_LADDER=y
CONFIG_CPU_IDLE_GOV_MENU=y
# CONFIG_ARCH_NEEDS_CPU_IDLE_COUPLED is not set
CONFIG_NET=y
#
# Networking options
#
CONFIG_PACKET=y
# CONFIG_PACKET_DIAG is not set
CONFIG_UNIX=y
# CONFIG_UNIX_DIAG is not set
CONFIG_XFRM=y
# CONFIG_XFRM_USER is not set
# CONFIG_XFRM_SUB_POLICY is not set
# CONFIG_XFRM_MIGRATE is not set
# CONFIG_XFRM_STATISTICS is not set
# CONFIG_NET_KEY is not set
CONFIG_INET=y
# CONFIG_IP_MULTICAST is not set
CONFIG_IP_ADVANCED_ROUTER=y
# CONFIG_IP_FIB_TRIE_STATS is not set
# CONFIG_IP_MULTIPLE_TABLES is not set
# CONFIG_IP_ROUTE_MULTIPATH is not set
# CONFIG_IP_ROUTE_VERBOSE is not set
CONFIG_IP_PNP=y
CONFIG_IP_PNP_DHCP=y
CONFIG_IP_PNP_BOOTP=y
# CONFIG_IP_PNP_RARP is not set
CONFIG_NET_IPIP=m
CONFIG_NET_IPGRE_DEMUX=m
CONFIG_NET_IP_TUNNEL=y
CONFIG_NET_IPGRE=m
# CONFIG_SYN_COOKIES is not set
# CONFIG_NET_IPVTI is not set
# CONFIG_NET_UDP_TUNNEL is not set
# CONFIG_NET_FOU is not set
# CONFIG_NET_FOU_IP_TUNNELS is not set
# CONFIG_INET_AH is not set
# CONFIG_INET_ESP is not set
# CONFIG_INET_IPCOMP is not set
# CONFIG_INET_XFRM_TUNNEL is not set
CONFIG_INET_TUNNEL=y
CONFIG_INET_XFRM_MODE_TRANSPORT=y
CONFIG_INET_XFRM_MODE_TUNNEL=y
CONFIG_INET_XFRM_MODE_BEET=y
CONFIG_INET_DIAG=y
CONFIG_INET_TCP_DIAG=y
# CONFIG_INET_UDP_DIAG is not set
# CONFIG_INET_DIAG_DESTROY is not set
# CONFIG_TCP_CONG_ADVANCED is not set
CONFIG_TCP_CONG_CUBIC=y
CONFIG_DEFAULT_TCP_CONG="cubic"
# CONFIG_TCP_MD5SIG is not set
CONFIG_IPV6=y
CONFIG_IPV6_ROUTER_PREF=y
CONFIG_IPV6_ROUTE_INFO=y
CONFIG_IPV6_OPTIMISTIC_DAD=y
# CONFIG_INET6_AH is not set
# CONFIG_INET6_ESP is not set
# CONFIG_INET6_IPCOMP is not set
# CONFIG_IPV6_MIP6 is not set
# CONFIG_INET6_XFRM_TUNNEL is not set
# CONFIG_INET6_TUNNEL is not set
CONFIG_INET6_XFRM_MODE_TRANSPORT=y
CONFIG_INET6_XFRM_MODE_TUNNEL=y
CONFIG_INET6_XFRM_MODE_BEET=y
# CONFIG_INET6_XFRM_MODE_ROUTEOPTIMIZATION is not set
# CONFIG_IPV6_VTI is not set
CONFIG_IPV6_SIT=y
# CONFIG_IPV6_SIT_6RD is not set
CONFIG_IPV6_NDISC_NODETYPE=y
# CONFIG_IPV6_TUNNEL is not set
# CONFIG_IPV6_GRE is not set
# CONFIG_IPV6_FOU is not set
# CONFIG_IPV6_FOU_TUNNEL is not set
# CONFIG_IPV6_MULTIPLE_TABLES is not set
# CONFIG_IPV6_MROUTE is not set
# CONFIG_NETLABEL is not set
# CONFIG_NETWORK_SECMARK is not set
# CONFIG_NET_PTP_CLASSIFY is not set
# CONFIG_NETWORK_PHY_TIMESTAMPING is not set
# CONFIG_NETFILTER is not set
# CONFIG_IP_DCCP is not set
# CONFIG_IP_SCTP is not set
# CONFIG_RDS is not set
# CONFIG_TIPC is not set
# CONFIG_ATM is not set
# CONFIG_L2TP is not set
# CONFIG_BRIDGE is not set
CONFIG_HAVE_NET_DSA=y
# CONFIG_VLAN_8021Q is not set
# CONFIG_DECNET is not set
# CONFIG_LLC2 is not set
# CONFIG_IPX is not set
# CONFIG_ATALK is not set
# CONFIG_X25 is not set
# CONFIG_LAPB is not set
# CONFIG_PHONET is not set
# CONFIG_6LOWPAN is not set
# CONFIG_IEEE802154 is not set
# CONFIG_NET_SCHED is not set
# CONFIG_DCB is not set
CONFIG_DNS_RESOLVER=y
# CONFIG_BATMAN_ADV is not set
# CONFIG_OPENVSWITCH is not set
# CONFIG_VSOCKETS is not set
# CONFIG_NETLINK_DIAG is not set
# CONFIG_MPLS is not set
# CONFIG_HSR is not set
# CONFIG_NET_SWITCHDEV is not set
# CONFIG_NET_L3_MASTER_DEV is not set
# CONFIG_NET_NCSI is not set
# CONFIG_SOCK_CGROUP_DATA is not set
# CONFIG_CGROUP_NET_PRIO is not set
# CONFIG_CGROUP_NET_CLASSID is not set
CONFIG_NET_RX_BUSY_POLL=y
CONFIG_BQL=y
#
# Network testing
#
# CONFIG_NET_PKTGEN is not set
# CONFIG_HAMRADIO is not set
# CONFIG_CAN is not set
# CONFIG_IRDA is not set
# CONFIG_BT is not set
# CONFIG_AF_RXRPC is not set
# CONFIG_AF_KCM is not set
# CONFIG_WIRELESS is not set
# CONFIG_WIMAX is not set
# CONFIG_RFKILL is not set
# CONFIG_NET_9P is not set
# CONFIG_CAIF is not set
# CONFIG_CEPH_LIB is not set
# CONFIG_NFC is not set
# CONFIG_LWTUNNEL is not set
CONFIG_DST_CACHE=y
# CONFIG_NET_DEVLINK is not set
CONFIG_MAY_USE_DEVLINK=y
#
# Device Drivers
#
#
# Generic Driver Options
#
CONFIG_UEVENT_HELPER=y
CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
CONFIG_DEVTMPFS=y
CONFIG_DEVTMPFS_MOUNT=y
CONFIG_STANDALONE=y
CONFIG_PREVENT_FIRMWARE_BUILD=y
CONFIG_FW_LOADER=y
CONFIG_FIRMWARE_IN_KERNEL=y
CONFIG_EXTRA_FIRMWARE=""
# CONFIG_FW_LOADER_USER_HELPER_FALLBACK is not set
CONFIG_ALLOW_DEV_COREDUMP=y
# CONFIG_DEBUG_DRIVER is not set
# CONFIG_DEBUG_DEVRES is not set
# CONFIG_SYS_HYPERVISOR is not set
# CONFIG_GENERIC_CPU_DEVICES is not set
CONFIG_REGMAP=y
CONFIG_REGMAP_I2C=y
# CONFIG_DMA_SHARED_BUFFER is not set
#
# Bus devices
#
# CONFIG_CONNECTOR is not set
CONFIG_MTD=y
# CONFIG_MTD_TESTS is not set
# CONFIG_MTD_REDBOOT_PARTS is not set
# CONFIG_MTD_CMDLINE_PARTS is not set
# CONFIG_MTD_AR7_PARTS is not set
#
# User Modules And Translation Layers
#
CONFIG_MTD_BLKDEVS=y
CONFIG_MTD_BLOCK=y
# CONFIG_FTL is not set
# CONFIG_NFTL is not set
# CONFIG_INFTL is not set
# CONFIG_RFD_FTL is not set
# CONFIG_SSFDC is not set
# CONFIG_SM_FTL is not set
# CONFIG_MTD_OOPS is not set
# CONFIG_MTD_SWAP is not set
# CONFIG_MTD_PARTITIONED_MASTER is not set
#
# RAM/ROM/Flash chip drivers
#
CONFIG_MTD_CFI=y
# CONFIG_MTD_JEDECPROBE is not set
CONFIG_MTD_GEN_PROBE=y
# CONFIG_MTD_CFI_ADV_OPTIONS is not set
CONFIG_MTD_MAP_BANK_WIDTH_1=y
CONFIG_MTD_MAP_BANK_WIDTH_2=y
CONFIG_MTD_MAP_BANK_WIDTH_4=y
# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set
# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set
# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set
CONFIG_MTD_CFI_I1=y
CONFIG_MTD_CFI_I2=y
# CONFIG_MTD_CFI_I4 is not set
# CONFIG_MTD_CFI_I8 is not set
# CONFIG_MTD_CFI_INTELEXT is not set
CONFIG_MTD_CFI_AMDSTD=y
# CONFIG_MTD_CFI_STAA is not set
CONFIG_MTD_CFI_UTIL=y
# CONFIG_MTD_RAM is not set
# CONFIG_MTD_ROM is not set
# CONFIG_MTD_ABSENT is not set
#
# Mapping drivers for chip access
#
# CONFIG_MTD_COMPLEX_MAPPINGS is not set
CONFIG_MTD_PHYSMAP=y
# CONFIG_MTD_PHYSMAP_COMPAT is not set
# CONFIG_MTD_INTEL_VR_NOR is not set
# CONFIG_MTD_PLATRAM is not set
#
# Self-contained MTD device drivers
#
# CONFIG_MTD_PMC551 is not set
# CONFIG_MTD_SLRAM is not set
# CONFIG_MTD_PHRAM is not set
# CONFIG_MTD_MTDRAM is not set
# CONFIG_MTD_BLOCK2MTD is not set
#
# Disk-On-Chip Device Drivers
#
# CONFIG_MTD_DOCG3 is not set
# CONFIG_MTD_NAND is not set
# CONFIG_MTD_ONENAND is not set
#
# LPDDR & LPDDR2 PCM memory drivers
#
# CONFIG_MTD_LPDDR is not set
# CONFIG_MTD_SPI_NOR is not set
# CONFIG_MTD_UBI is not set
# CONFIG_OF is not set
CONFIG_ARCH_MIGHT_HAVE_PC_PARPORT=y
# CONFIG_PARPORT is not set
CONFIG_BLK_DEV=y
# CONFIG_BLK_DEV_NULL_BLK is not set
# CONFIG_BLK_DEV_PCIESSD_MTIP32XX is not set
# CONFIG_BLK_CPQ_CISS_DA is not set
# CONFIG_BLK_DEV_DAC960 is not set
# CONFIG_BLK_DEV_UMEM is not set
# CONFIG_BLK_DEV_COW_COMMON is not set
CONFIG_BLK_DEV_LOOP=y
CONFIG_BLK_DEV_LOOP_MIN_COUNT=8
CONFIG_BLK_DEV_CRYPTOLOOP=m
# CONFIG_BLK_DEV_DRBD is not set
# CONFIG_BLK_DEV_NBD is not set
# CONFIG_BLK_DEV_SX8 is not set
CONFIG_BLK_DEV_RAM=y
CONFIG_BLK_DEV_RAM_COUNT=16
CONFIG_BLK_DEV_RAM_SIZE=4096
# CONFIG_CDROM_PKTCDVD is not set
# CONFIG_ATA_OVER_ETH is not set
# CONFIG_BLK_DEV_HD is not set
# CONFIG_BLK_DEV_RBD is not set
# CONFIG_BLK_DEV_RSXX is not set
# CONFIG_BLK_DEV_NVME is not set
# CONFIG_NVME_TARGET is not set
#
# Misc devices
#
# CONFIG_SENSORS_LIS3LV02D is not set
# CONFIG_AD525X_DPOT is not set
# CONFIG_DUMMY_IRQ is not set
# CONFIG_PHANTOM is not set
# CONFIG_SGI_IOC4 is not set
# CONFIG_TIFM_CORE is not set
# CONFIG_ICS932S401 is not set
# CONFIG_ENCLOSURE_SERVICES is not set
# CONFIG_HP_ILO is not set
# CONFIG_APDS9802ALS is not set
# CONFIG_ISL29003 is not set
# CONFIG_ISL29020 is not set
# CONFIG_SENSORS_TSL2550 is not set
# CONFIG_SENSORS_BH1770 is not set
# CONFIG_SENSORS_APDS990X is not set
# CONFIG_HMC6352 is not set
# CONFIG_DS1682 is not set
# CONFIG_BMP085_I2C is not set
# CONFIG_USB_SWITCH_FSA9480 is not set
# CONFIG_SRAM is not set
# CONFIG_C2PORT is not set
#
# EEPROM support
#
# CONFIG_EEPROM_AT24 is not set
# CONFIG_EEPROM_LEGACY is not set
# CONFIG_EEPROM_MAX6875 is not set
# CONFIG_EEPROM_93CX6 is not set
# CONFIG_CB710_CORE is not set
#
# Texas Instruments shared transport line discipline
#
# CONFIG_SENSORS_LIS3_I2C is not set
#
# Altera FPGA firmware download module
#
# CONFIG_ALTERA_STAPL is not set
#
# Intel MIC Bus Driver
#
#
# SCIF Bus Driver
#
#
# VOP Bus Driver
#
#
# Intel MIC Host Driver
#
#
# Intel MIC Card Driver
#
#
# SCIF Driver
#
#
# Intel MIC Coprocessor State Management (COSM) Drivers
#
#
# VOP Driver
#
# CONFIG_ECHO is not set
# CONFIG_CXL_BASE is not set
# CONFIG_CXL_AFU_DRIVER_OPS is not set
CONFIG_HAVE_IDE=y
CONFIG_IDE=y
#
# Please see Documentation/ide/ide.txt for help/info on IDE drives
#
CONFIG_IDE_XFER_MODE=y
CONFIG_IDE_ATAPI=y
# CONFIG_BLK_DEV_IDE_SATA is not set
CONFIG_IDE_GD=y
CONFIG_IDE_GD_ATA=y
CONFIG_IDE_GD_ATAPI=y
# CONFIG_BLK_DEV_IDECD is not set
# CONFIG_BLK_DEV_IDETAPE is not set
# CONFIG_IDE_TASK_IOCTL is not set
CONFIG_IDE_PROC_FS=y
#
# IDE chipset support/bugfixes
#
CONFIG_BLK_DEV_PLATFORM=y
CONFIG_BLK_DEV_IDEDMA_SFF=y
#
# PCI IDE chipsets support
#
CONFIG_BLK_DEV_IDEPCI=y
CONFIG_IDEPCI_PCIBUS_ORDER=y
# CONFIG_BLK_DEV_OFFBOARD is not set
CONFIG_BLK_DEV_GENERIC=y
# CONFIG_BLK_DEV_OPTI621 is not set
CONFIG_BLK_DEV_IDEDMA_PCI=y
CONFIG_BLK_DEV_AEC62XX=y
# CONFIG_BLK_DEV_ALI15X3 is not set
# CONFIG_BLK_DEV_AMD74XX is not set
# CONFIG_BLK_DEV_CMD64X is not set
# CONFIG_BLK_DEV_TRIFLEX is not set
# CONFIG_BLK_DEV_HPT366 is not set
# CONFIG_BLK_DEV_JMICRON is not set
# CONFIG_BLK_DEV_PIIX is not set
# CONFIG_BLK_DEV_IT8172 is not set
# CONFIG_BLK_DEV_IT8213 is not set
# CONFIG_BLK_DEV_IT821X is not set
# CONFIG_BLK_DEV_NS87415 is not set
CONFIG_BLK_DEV_PDC202XX_OLD=y
CONFIG_BLK_DEV_PDC202XX_NEW=y
# CONFIG_BLK_DEV_SVWKS is not set
# CONFIG_BLK_DEV_SIIMAGE is not set
# CONFIG_BLK_DEV_SLC90E66 is not set
# CONFIG_BLK_DEV_TRM290 is not set
# CONFIG_BLK_DEV_VIA82CXXX is not set
# CONFIG_BLK_DEV_TC86C001 is not set
CONFIG_BLK_DEV_IDEDMA=y
#
# SCSI device support
#
CONFIG_SCSI_MOD=y
# CONFIG_RAID_ATTRS is not set
CONFIG_SCSI=y
CONFIG_SCSI_DMA=y
# CONFIG_SCSI_NETLINK is not set
# CONFIG_SCSI_MQ_DEFAULT is not set
# CONFIG_SCSI_PROC_FS is not set
#
# SCSI support type (disk, tape, CD-ROM)
#
CONFIG_BLK_DEV_SD=y
# CONFIG_CHR_DEV_ST is not set
# CONFIG_CHR_DEV_OSST is not set
# CONFIG_BLK_DEV_SR is not set
# CONFIG_CHR_DEV_SG is not set
# CONFIG_CHR_DEV_SCH is not set
# CONFIG_SCSI_CONSTANTS is not set
# CONFIG_SCSI_LOGGING is not set
# CONFIG_SCSI_SCAN_ASYNC is not set
#
# SCSI Transports
#
# CONFIG_SCSI_SPI_ATTRS is not set
# CONFIG_SCSI_FC_ATTRS is not set
# CONFIG_SCSI_ISCSI_ATTRS is not set
# CONFIG_SCSI_SAS_ATTRS is not set
# CONFIG_SCSI_SAS_LIBSAS is not set
# CONFIG_SCSI_SRP_ATTRS is not set
# CONFIG_SCSI_LOWLEVEL is not set
# CONFIG_SCSI_DH is not set
# CONFIG_SCSI_OSD_INITIATOR is not set
CONFIG_HAVE_PATA_PLATFORM=y
# CONFIG_ATA is not set
# CONFIG_MD is not set
# CONFIG_TARGET_CORE is not set
# CONFIG_FUSION is not set
#
# IEEE 1394 (FireWire) support
#
# CONFIG_FIREWIRE is not set
# CONFIG_FIREWIRE_NOSY is not set
CONFIG_NETDEVICES=y
CONFIG_MII=y
CONFIG_NET_CORE=y
# CONFIG_BONDING is not set
# CONFIG_DUMMY is not set
# CONFIG_EQUALIZER is not set
# CONFIG_NET_FC is not set
# CONFIG_NET_TEAM is not set
# CONFIG_MACVLAN is not set
# CONFIG_IPVLAN is not set
# CONFIG_VXLAN is not set
# CONFIG_MACSEC is not set
# CONFIG_NETCONSOLE is not set
# CONFIG_NETPOLL is not set
# CONFIG_NET_POLL_CONTROLLER is not set
# CONFIG_TUN is not set
# CONFIG_TUN_VNET_CROSS_LE is not set
# CONFIG_VETH is not set
# CONFIG_NLMON is not set
# CONFIG_ARCNET is not set
#
# CAIF transport drivers
#
#
# Distributed Switch Architecture drivers
#
CONFIG_ETHERNET=y
# CONFIG_NET_VENDOR_3COM is not set
# CONFIG_NET_VENDOR_ADAPTEC is not set
# CONFIG_NET_VENDOR_AGERE is not set
# CONFIG_NET_VENDOR_ALTEON is not set
# CONFIG_ALTERA_TSE is not set
# CONFIG_NET_VENDOR_AMD is not set
# CONFIG_NET_VENDOR_ARC is not set
# CONFIG_NET_VENDOR_ATHEROS is not set
# CONFIG_NET_VENDOR_AURORA is not set
# CONFIG_NET_CADENCE is not set
# CONFIG_NET_VENDOR_BROADCOM is not set
# CONFIG_NET_VENDOR_BROCADE is not set
# CONFIG_NET_VENDOR_CAVIUM is not set
# CONFIG_NET_VENDOR_CHELSIO is not set
# CONFIG_NET_VENDOR_CISCO is not set
# CONFIG_DNET is not set
# CONFIG_NET_VENDOR_DEC is not set
# CONFIG_NET_VENDOR_DLINK is not set
# CONFIG_NET_VENDOR_EMULEX is not set
# CONFIG_NET_VENDOR_EZCHIP is not set
# CONFIG_NET_VENDOR_EXAR is not set
# CONFIG_NET_VENDOR_HP is not set
# CONFIG_NET_VENDOR_INTEL is not set
# CONFIG_JME is not set
# CONFIG_NET_VENDOR_MARVELL is not set
# CONFIG_NET_VENDOR_MELLANOX is not set
# CONFIG_NET_VENDOR_MICREL is not set
# CONFIG_NET_VENDOR_MYRI is not set
# CONFIG_FEALNX is not set
# CONFIG_NET_VENDOR_NATSEMI is not set
# CONFIG_NET_VENDOR_NETRONOME is not set
# CONFIG_NET_VENDOR_NVIDIA is not set
# CONFIG_NET_VENDOR_OKI is not set
# CONFIG_ETHOC is not set
# CONFIG_NET_PACKET_ENGINE is not set
# CONFIG_NET_VENDOR_QLOGIC is not set
# CONFIG_NET_VENDOR_QUALCOMM is not set
CONFIG_NET_VENDOR_REALTEK=y
# CONFIG_8139CP is not set
CONFIG_8139TOO=y
# CONFIG_8139TOO_PIO is not set
# CONFIG_8139TOO_TUNE_TWISTER is not set
# CONFIG_8139TOO_8129 is not set
# CONFIG_8139_OLD_RX_RESET is not set
# CONFIG_R8169 is not set
CONFIG_NET_VENDOR_RENESAS=y
CONFIG_SH_ETH=y
# CONFIG_NET_VENDOR_RDC is not set
# CONFIG_NET_VENDOR_ROCKER is not set
# CONFIG_NET_VENDOR_SAMSUNG is not set
# CONFIG_NET_VENDOR_SEEQ is not set
# CONFIG_NET_VENDOR_SILAN is not set
# CONFIG_NET_VENDOR_SIS is not set
# CONFIG_SFC is not set
# CONFIG_NET_VENDOR_SMSC is not set
# CONFIG_NET_VENDOR_STMICRO is not set
# CONFIG_NET_VENDOR_SUN is not set
# CONFIG_NET_VENDOR_SYNOPSYS is not set
# CONFIG_NET_VENDOR_TEHUTI is not set
# CONFIG_NET_VENDOR_TI is not set
# CONFIG_NET_VENDOR_VIA is not set
# CONFIG_NET_VENDOR_WIZNET is not set
# CONFIG_FDDI is not set
# CONFIG_HIPPI is not set
CONFIG_PHYLIB=y
#
# MII PHY device drivers
#
# CONFIG_AQUANTIA_PHY is not set
# CONFIG_AT803X_PHY is not set
# CONFIG_AMD_PHY is not set
# CONFIG_MARVELL_PHY is not set
# CONFIG_DAVICOM_PHY is not set
# CONFIG_QSEMI_PHY is not set
# CONFIG_LXT_PHY is not set
# CONFIG_CICADA_PHY is not set
# CONFIG_VITESSE_PHY is not set
# CONFIG_TERANETICS_PHY is not set
# CONFIG_SMSC_PHY is not set
# CONFIG_BROADCOM_PHY is not set
# CONFIG_BCM7XXX_PHY is not set
# CONFIG_BCM87XX_PHY is not set
# CONFIG_ICPLUS_PHY is not set
# CONFIG_REALTEK_PHY is not set
# CONFIG_NATIONAL_PHY is not set
# CONFIG_STE10XP is not set
# CONFIG_LSI_ET1011C_PHY is not set
# CONFIG_MICREL_PHY is not set
# CONFIG_DP83848_PHY is not set
# CONFIG_DP83867_PHY is not set
# CONFIG_MICROCHIP_PHY is not set
# CONFIG_FIXED_PHY is not set
CONFIG_MDIO_BITBANG=y
# CONFIG_MDIO_BCM_UNIMAC is not set
# CONFIG_INTEL_XWAY_PHY is not set
CONFIG_PPP=m
CONFIG_PPP_BSDCOMP=m
CONFIG_PPP_DEFLATE=m
CONFIG_PPP_FILTER=y
CONFIG_PPP_MPPE=m
CONFIG_PPP_MULTILINK=y
# CONFIG_PPPOE is not set
CONFIG_PPTP=m
CONFIG_PPP_ASYNC=m
CONFIG_PPP_SYNC_TTY=m
# CONFIG_SLIP is not set
CONFIG_SLHC=m
# CONFIG_USB_NET_DRIVERS is not set
# CONFIG_WLAN is not set
#
# Enable WiMAX (Networking options) to see the WiMAX drivers
#
# CONFIG_WAN is not set
# CONFIG_VMXNET3 is not set
# CONFIG_ISDN is not set
# CONFIG_NVM is not set
#
# Input device support
#
CONFIG_INPUT=y
CONFIG_INPUT_FF_MEMLESS=m
# CONFIG_INPUT_POLLDEV is not set
# CONFIG_INPUT_SPARSEKMAP is not set
# CONFIG_INPUT_MATRIXKMAP is not set
#
# Userland interfaces
#
CONFIG_INPUT_MOUSEDEV=y
CONFIG_INPUT_MOUSEDEV_PSAUX=y
CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
# CONFIG_INPUT_JOYDEV is not set
CONFIG_INPUT_EVDEV=y
CONFIG_INPUT_EVBUG=m
#
# Input Device Drivers
#
CONFIG_INPUT_KEYBOARD=y
# CONFIG_KEYBOARD_ADP5588 is not set
# CONFIG_KEYBOARD_ADP5589 is not set
CONFIG_KEYBOARD_ATKBD=y
# CONFIG_KEYBOARD_QT1070 is not set
# CONFIG_KEYBOARD_QT2160 is not set
# CONFIG_KEYBOARD_LKKBD is not set
# CONFIG_KEYBOARD_TCA6416 is not set
# CONFIG_KEYBOARD_TCA8418 is not set
# CONFIG_KEYBOARD_LM8333 is not set
# CONFIG_KEYBOARD_MAX7359 is not set
# CONFIG_KEYBOARD_MCS is not set
# CONFIG_KEYBOARD_MPR121 is not set
# CONFIG_KEYBOARD_NEWTON is not set
# CONFIG_KEYBOARD_OPENCORES is not set
# CONFIG_KEYBOARD_SAMSUNG is not set
# CONFIG_KEYBOARD_STOWAWAY is not set
# CONFIG_KEYBOARD_SUNKBD is not set
# CONFIG_KEYBOARD_XTKBD is not set
CONFIG_INPUT_MOUSE=y
CONFIG_MOUSE_PS2=y
CONFIG_MOUSE_PS2_ALPS=y
CONFIG_MOUSE_PS2_BYD=y
CONFIG_MOUSE_PS2_LOGIPS2PP=y
CONFIG_MOUSE_PS2_SYNAPTICS=y
CONFIG_MOUSE_PS2_CYPRESS=y
CONFIG_MOUSE_PS2_TRACKPOINT=y
# CONFIG_MOUSE_PS2_ELANTECH is not set
# CONFIG_MOUSE_PS2_SENTELIC is not set
# CONFIG_MOUSE_PS2_TOUCHKIT is not set
CONFIG_MOUSE_PS2_FOCALTECH=y
# CONFIG_MOUSE_SERIAL is not set
# CONFIG_MOUSE_APPLETOUCH is not set
# CONFIG_MOUSE_BCM5974 is not set
# CONFIG_MOUSE_CYAPA is not set
# CONFIG_MOUSE_ELAN_I2C is not set
# CONFIG_MOUSE_VSXXXAA is not set
# CONFIG_MOUSE_SYNAPTICS_I2C is not set
# CONFIG_MOUSE_SYNAPTICS_USB is not set
# CONFIG_INPUT_JOYSTICK is not set
# CONFIG_INPUT_TABLET is not set
# CONFIG_INPUT_TOUCHSCREEN is not set
# CONFIG_INPUT_MISC is not set
# CONFIG_RMI4_CORE is not set
#
# Hardware I/O ports
#
CONFIG_SERIO=y
CONFIG_SERIO_SERPORT=y
# CONFIG_SERIO_PCIPS2 is not set
CONFIG_SERIO_LIBPS2=y
# CONFIG_SERIO_RAW is not set
# CONFIG_SERIO_ALTERA_PS2 is not set
# CONFIG_SERIO_PS2MULT is not set
# CONFIG_SERIO_ARC_PS2 is not set
# CONFIG_USERIO is not set
# CONFIG_GAMEPORT is not set
#
# Character devices
#
CONFIG_TTY=y
CONFIG_VT=y
CONFIG_CONSOLE_TRANSLATIONS=y
CONFIG_VT_CONSOLE=y
CONFIG_HW_CONSOLE=y
CONFIG_VT_HW_CONSOLE_BINDING=y
CONFIG_UNIX98_PTYS=y
# CONFIG_LEGACY_PTYS is not set
# CONFIG_SERIAL_NONSTANDARD is not set
# CONFIG_NOZOMI is not set
# CONFIG_N_GSM is not set
# CONFIG_TRACE_SINK is not set
CONFIG_DEVMEM=y
# CONFIG_DEVKMEM is not set
#
# Serial drivers
#
# CONFIG_SERIAL_8250 is not set
#
# Non-8250 serial port support
#
# CONFIG_SERIAL_UARTLITE is not set
CONFIG_SERIAL_SH_SCI=y
CONFIG_SERIAL_SH_SCI_NR_UARTS=6
CONFIG_SERIAL_SH_SCI_CONSOLE=y
# CONFIG_SERIAL_SH_SCI_EARLYCON is not set
CONFIG_SERIAL_CORE=y
CONFIG_SERIAL_CORE_CONSOLE=y
# CONFIG_SERIAL_JSM is not set
# CONFIG_SERIAL_SCCNXP is not set
# CONFIG_SERIAL_SC16IS7XX is not set
# CONFIG_SERIAL_ALTERA_JTAGUART is not set
# CONFIG_SERIAL_ALTERA_UART is not set
# CONFIG_SERIAL_ARC is not set
# CONFIG_SERIAL_RP2 is not set
# CONFIG_SERIAL_FSL_LPUART is not set
# CONFIG_TTY_PRINTK is not set
# CONFIG_IPMI_HANDLER is not set
# CONFIG_HW_RANDOM is not set
# CONFIG_R3964 is not set
# CONFIG_APPLICOM is not set
# CONFIG_RAW_DRIVER is not set
# CONFIG_TCG_TPM is not set
CONFIG_DEVPORT=y
# CONFIG_XILLYBUS is not set
#
# I2C support
#
CONFIG_I2C=y
CONFIG_I2C_BOARDINFO=y
CONFIG_I2C_COMPAT=y
# CONFIG_I2C_CHARDEV is not set
# CONFIG_I2C_MUX is not set
CONFIG_I2C_HELPER_AUTO=y
CONFIG_I2C_ALGOPCA=y
#
# I2C Hardware Bus support
#
#
# PC SMBus host controller drivers
#
# CONFIG_I2C_ALI1535 is not set
# CONFIG_I2C_ALI1563 is not set
# CONFIG_I2C_ALI15X3 is not set
# CONFIG_I2C_AMD756 is not set
# CONFIG_I2C_AMD8111 is not set
# CONFIG_I2C_I801 is not set
# CONFIG_I2C_ISCH is not set
# CONFIG_I2C_PIIX4 is not set
# CONFIG_I2C_NFORCE2 is not set
# CONFIG_I2C_SIS5595 is not set
# CONFIG_I2C_SIS630 is not set
# CONFIG_I2C_SIS96X is not set
# CONFIG_I2C_VIA is not set
# CONFIG_I2C_VIAPRO is not set
#
# I2C system bus drivers (mostly embedded / system-on-chip)
#
# CONFIG_I2C_DESIGNWARE_PLATFORM is not set
# CONFIG_I2C_DESIGNWARE_PCI is not set
# CONFIG_I2C_EMEV2 is not set
# CONFIG_I2C_OCORES is not set
CONFIG_I2C_PCA_PLATFORM=y
# CONFIG_I2C_PXA_PCI is not set
# CONFIG_I2C_SH_MOBILE is not set
# CONFIG_I2C_SIMTEC is not set
# CONFIG_I2C_XILINX is not set
#
# External I2C/SMBus adapter drivers
#
# CONFIG_I2C_DIOLAN_U2C is not set
# CONFIG_I2C_PARPORT_LIGHT is not set
# CONFIG_I2C_ROBOTFUZZ_OSIF is not set
# CONFIG_I2C_TAOS_EVM is not set
# CONFIG_I2C_TINY_USB is not set
#
# Other I2C/SMBus bus drivers
#
# CONFIG_I2C_STUB is not set
# CONFIG_I2C_SLAVE is not set
# CONFIG_I2C_DEBUG_CORE is not set
# CONFIG_I2C_DEBUG_ALGO is not set
# CONFIG_I2C_DEBUG_BUS is not set
# CONFIG_SPI is not set
# CONFIG_SPMI is not set
# CONFIG_HSI is not set
#
# PPS support
#
# CONFIG_PPS is not set
#
# PPS generators support
#
#
# PTP clock support
#
# CONFIG_PTP_1588_CLOCK is not set
#
# Enable PHYLIB and NETWORK_PHY_TIMESTAMPING to see the additional clocks.
#
CONFIG_ARCH_HAVE_CUSTOM_GPIO_H=y
# CONFIG_GPIOLIB is not set
# CONFIG_W1 is not set
# CONFIG_POWER_SUPPLY is not set
# CONFIG_POWER_RESET is not set
# CONFIG_POWER_AVS is not set
# CONFIG_HWMON is not set
# CONFIG_THERMAL is not set
CONFIG_WATCHDOG=y
CONFIG_WATCHDOG_CORE=y
# CONFIG_WATCHDOG_NOWAYOUT is not set
# CONFIG_WATCHDOG_SYSFS is not set
#
# Watchdog Device Drivers
#
# CONFIG_SOFT_WATCHDOG is not set
# CONFIG_XILINX_WATCHDOG is not set
# CONFIG_ZIIRAVE_WATCHDOG is not set
# CONFIG_CADENCE_WATCHDOG is not set
# CONFIG_DW_WATCHDOG is not set
# CONFIG_MAX63XX_WATCHDOG is not set
# CONFIG_ALIM7101_WDT is not set
# CONFIG_I6300ESB_WDT is not set
CONFIG_SH_WDT=y
#
# PCI-based Watchdog Cards
#
# CONFIG_PCIPCWATCHDOG is not set
# CONFIG_WDTPCI is not set
#
# USB-based Watchdog Cards
#
# CONFIG_USBPCWATCHDOG is not set
CONFIG_SSB_POSSIBLE=y
#
# Sonics Silicon Backplane
#
# CONFIG_SSB is not set
CONFIG_BCMA_POSSIBLE=y
#
# Broadcom specific AMBA
#
# CONFIG_BCMA is not set
#
# Multifunction device drivers
#
# CONFIG_MFD_CORE is not set
# CONFIG_MFD_AS3711 is not set
# CONFIG_PMIC_ADP5520 is not set
# CONFIG_MFD_BCM590XX is not set
# CONFIG_MFD_AXP20X_I2C is not set
# CONFIG_PMIC_DA903X is not set
# CONFIG_MFD_DA9052_I2C is not set
# CONFIG_MFD_DA9055 is not set
# CONFIG_MFD_DA9062 is not set
# CONFIG_MFD_DA9063 is not set
# CONFIG_MFD_DA9150 is not set
# CONFIG_MFD_DLN2 is not set
# CONFIG_MFD_MC13XXX_I2C is not set
# CONFIG_HTC_PASIC3 is not set
# CONFIG_LPC_ICH is not set
# CONFIG_LPC_SCH is not set
# CONFIG_MFD_JANZ_CMODIO is not set
# CONFIG_MFD_KEMPLD is not set
# CONFIG_MFD_88PM800 is not set
# CONFIG_MFD_88PM805 is not set
# CONFIG_MFD_88PM860X is not set
# CONFIG_MFD_MAX14577 is not set
# CONFIG_MFD_MAX77693 is not set
# CONFIG_MFD_MAX77843 is not set
# CONFIG_MFD_MAX8907 is not set
# CONFIG_MFD_MAX8925 is not set
# CONFIG_MFD_MAX8997 is not set
# CONFIG_MFD_MAX8998 is not set
# CONFIG_MFD_MT6397 is not set
# CONFIG_MFD_MENF21BMC is not set
# CONFIG_MFD_VIPERBOARD is not set
# CONFIG_MFD_RETU is not set
# CONFIG_MFD_PCF50633 is not set
# CONFIG_MFD_RDC321X is not set
# CONFIG_MFD_RTSX_PCI is not set
# CONFIG_MFD_RT5033 is not set
# CONFIG_MFD_RTSX_USB is not set
# CONFIG_MFD_RC5T583 is not set
# CONFIG_MFD_SEC_CORE is not set
# CONFIG_MFD_SI476X_CORE is not set
# CONFIG_MFD_SM501 is not set
# CONFIG_MFD_SKY81452 is not set
# CONFIG_MFD_SMSC is not set
# CONFIG_ABX500_CORE is not set
# CONFIG_MFD_SYSCON is not set
# CONFIG_MFD_TI_AM335X_TSCADC is not set
# CONFIG_MFD_LP3943 is not set
# CONFIG_MFD_LP8788 is not set
# CONFIG_MFD_PALMAS is not set
# CONFIG_TPS6105X is not set
# CONFIG_TPS6507X is not set
# CONFIG_MFD_TPS65086 is not set
# CONFIG_MFD_TPS65090 is not set
# CONFIG_MFD_TPS65217 is not set
# CONFIG_MFD_TPS65218 is not set
# CONFIG_MFD_TPS6586X is not set
# CONFIG_MFD_TPS65912_I2C is not set
# CONFIG_MFD_TPS80031 is not set
# CONFIG_TWL4030_CORE is not set
# CONFIG_TWL6040_CORE is not set
# CONFIG_MFD_WL1273_CORE is not set
# CONFIG_MFD_LM3533 is not set
# CONFIG_MFD_TMIO is not set
# CONFIG_MFD_VX855 is not set
# CONFIG_MFD_ARIZONA_I2C is not set
# CONFIG_MFD_WM8400 is not set
# CONFIG_MFD_WM831X_I2C is not set
# CONFIG_MFD_WM8350_I2C is not set
# CONFIG_MFD_WM8994 is not set
# CONFIG_REGULATOR is not set
# CONFIG_MEDIA_SUPPORT is not set
#
# Graphics support
#
# CONFIG_VGA_ARB is not set
# CONFIG_DRM is not set
#
# ACP (Audio CoProcessor) Configuration
#
#
# Frame buffer Devices
#
# CONFIG_FB is not set
# CONFIG_FB_SH_MOBILE_MERAM is not set
# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
# CONFIG_VGASTATE is not set
#
# Console display driver support
#
CONFIG_DUMMY_CONSOLE=y
CONFIG_DUMMY_CONSOLE_COLUMNS=80
CONFIG_DUMMY_CONSOLE_ROWS=25
# CONFIG_SOUND is not set
#
# HID support
#
CONFIG_HID=y
# CONFIG_HID_BATTERY_STRENGTH is not set
# CONFIG_HIDRAW is not set
# CONFIG_UHID is not set
CONFIG_HID_GENERIC=y
#
# Special HID drivers
#
# CONFIG_HID_A4TECH is not set
# CONFIG_HID_ACRUX is not set
# CONFIG_HID_APPLE is not set
# CONFIG_HID_APPLEIR is not set
# CONFIG_HID_AUREAL is not set
# CONFIG_HID_BELKIN is not set
# CONFIG_HID_BETOP_FF is not set
# CONFIG_HID_CHERRY is not set
# CONFIG_HID_CHICONY is not set
# CONFIG_HID_CMEDIA is not set
# CONFIG_HID_CYPRESS is not set
# CONFIG_HID_DRAGONRISE is not set
# CONFIG_HID_EMS_FF is not set
# CONFIG_HID_ELECOM is not set
# CONFIG_HID_ELO is not set
# CONFIG_HID_EZKEY is not set
# CONFIG_HID_GEMBIRD is not set
# CONFIG_HID_GFRM is not set
# CONFIG_HID_HOLTEK is not set
# CONFIG_HID_KEYTOUCH is not set
# CONFIG_HID_KYE is not set
# CONFIG_HID_UCLOGIC is not set
# CONFIG_HID_WALTOP is not set
# CONFIG_HID_GYRATION is not set
# CONFIG_HID_ICADE is not set
# CONFIG_HID_TWINHAN is not set
# CONFIG_HID_KENSINGTON is not set
# CONFIG_HID_LCPOWER is not set
# CONFIG_HID_LENOVO is not set
# CONFIG_HID_LOGITECH is not set
# CONFIG_HID_MAGICMOUSE is not set
# CONFIG_HID_MICROSOFT is not set
# CONFIG_HID_MONTEREY is not set
# CONFIG_HID_MULTITOUCH is not set
# CONFIG_HID_NTRIG is not set
# CONFIG_HID_ORTEK is not set
# CONFIG_HID_PANTHERLORD is not set
# CONFIG_HID_PENMOUNT is not set
# CONFIG_HID_PETALYNX is not set
# CONFIG_HID_PICOLCD is not set
# CONFIG_HID_PLANTRONICS is not set
# CONFIG_HID_PRIMAX is not set
# CONFIG_HID_ROCCAT is not set
# CONFIG_HID_SAITEK is not set
# CONFIG_HID_SAMSUNG is not set
# CONFIG_HID_SPEEDLINK is not set
# CONFIG_HID_STEELSERIES is not set
# CONFIG_HID_SUNPLUS is not set
# CONFIG_HID_RMI is not set
# CONFIG_HID_GREENASIA is not set
# CONFIG_HID_SMARTJOYPLUS is not set
# CONFIG_HID_TIVO is not set
# CONFIG_HID_TOPSEED is not set
# CONFIG_HID_THRUSTMASTER is not set
# CONFIG_HID_WACOM is not set
# CONFIG_HID_XINMO is not set
# CONFIG_HID_ZEROPLUS is not set
# CONFIG_HID_ZYDACRON is not set
# CONFIG_HID_SENSOR_HUB is not set
# CONFIG_HID_ALPS is not set
#
# USB HID support
#
CONFIG_USB_HID=y
# CONFIG_HID_PID is not set
# CONFIG_USB_HIDDEV is not set
#
# I2C HID support
#
# CONFIG_I2C_HID is not set
CONFIG_USB_OHCI_LITTLE_ENDIAN=y
CONFIG_USB_SUPPORT=y
CONFIG_USB_COMMON=y
CONFIG_USB_ARCH_HAS_HCD=y
CONFIG_USB=y
# CONFIG_USB_ANNOUNCE_NEW_DEVICES is not set
#
# Miscellaneous USB options
#
CONFIG_USB_DEFAULT_PERSIST=y
# CONFIG_USB_DYNAMIC_MINORS is not set
# CONFIG_USB_OTG_WHITELIST is not set
# CONFIG_USB_OTG_BLACKLIST_HUB is not set
# CONFIG_USB_ULPI_BUS is not set
# CONFIG_USB_MON is not set
# CONFIG_USB_WUSB_CBAF is not set
#
# USB Host Controller Drivers
#
# CONFIG_USB_C67X00_HCD is not set
# CONFIG_USB_XHCI_HCD is not set
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_EHCI_ROOT_HUB_TT=y
CONFIG_USB_EHCI_TT_NEWSCHED=y
CONFIG_USB_EHCI_PCI=y
CONFIG_USB_EHCI_SH=y
CONFIG_USB_EHCI_HCD_PLATFORM=y
# CONFIG_USB_OXU210HP_HCD is not set
# CONFIG_USB_ISP116X_HCD is not set
# CONFIG_USB_ISP1362_HCD is not set
# CONFIG_USB_FOTG210_HCD is not set
CONFIG_USB_OHCI_HCD=y
CONFIG_USB_OHCI_HCD_PCI=y
# CONFIG_USB_OHCI_SH is not set
CONFIG_USB_OHCI_HCD_PLATFORM=y
# CONFIG_USB_UHCI_HCD is not set
# CONFIG_USB_SL811_HCD is not set
# CONFIG_USB_R8A66597_HCD is not set
# CONFIG_USB_HCD_TEST_MODE is not set
#
# USB Device Class drivers
#
# CONFIG_USB_ACM is not set
# CONFIG_USB_PRINTER is not set
# CONFIG_USB_WDM is not set
# CONFIG_USB_TMC is not set
#
# NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may
#
#
# also be needed; see USB_STORAGE Help for more info
#
CONFIG_USB_STORAGE=y
# CONFIG_USB_STORAGE_DEBUG is not set
# CONFIG_USB_STORAGE_REALTEK is not set
# CONFIG_USB_STORAGE_DATAFAB is not set
# CONFIG_USB_STORAGE_FREECOM is not set
# CONFIG_USB_STORAGE_ISD200 is not set
# CONFIG_USB_STORAGE_USBAT is not set
# CONFIG_USB_STORAGE_SDDR09 is not set
# CONFIG_USB_STORAGE_SDDR55 is not set
# CONFIG_USB_STORAGE_JUMPSHOT is not set
# CONFIG_USB_STORAGE_ALAUDA is not set
# CONFIG_USB_STORAGE_ONETOUCH is not set
# CONFIG_USB_STORAGE_KARMA is not set
# CONFIG_USB_STORAGE_CYPRESS_ATACB is not set
# CONFIG_USB_STORAGE_ENE_UB6250 is not set
# CONFIG_USB_UAS is not set
#
# USB Imaging devices
#
# CONFIG_USB_MDC800 is not set
# CONFIG_USB_MICROTEK is not set
# CONFIG_USBIP_CORE is not set
# CONFIG_USB_MUSB_HDRC is not set
# CONFIG_USB_DWC3 is not set
# CONFIG_USB_DWC2 is not set
# CONFIG_USB_CHIPIDEA is not set
# CONFIG_USB_ISP1760 is not set
#
# USB port drivers
#
# CONFIG_USB_SERIAL is not set
#
# USB Miscellaneous drivers
#
# CONFIG_USB_EMI62 is not set
# CONFIG_USB_EMI26 is not set
# CONFIG_USB_ADUTUX is not set
# CONFIG_USB_SEVSEG is not set
# CONFIG_USB_RIO500 is not set
# CONFIG_USB_LEGOTOWER is not set
# CONFIG_USB_LCD is not set
# CONFIG_USB_CYPRESS_CY7C63 is not set
# CONFIG_USB_CYTHERM is not set
# CONFIG_USB_IDMOUSE is not set
# CONFIG_USB_FTDI_ELAN is not set
# CONFIG_USB_APPLEDISPLAY is not set
# CONFIG_USB_SISUSBVGA is not set
# CONFIG_USB_LD is not set
# CONFIG_USB_TRANCEVIBRATOR is not set
# CONFIG_USB_IOWARRIOR is not set
# CONFIG_USB_TEST is not set
# CONFIG_USB_EHSET_TEST_FIXTURE is not set
# CONFIG_USB_ISIGHTFW is not set
# CONFIG_USB_YUREX is not set
# CONFIG_USB_EZUSB_FX2 is not set
# CONFIG_USB_HSIC_USB3503 is not set
# CONFIG_USB_LINK_LAYER_TEST is not set
#
# USB Physical Layer drivers
#
# CONFIG_USB_PHY is not set
# CONFIG_NOP_USB_XCEIV is not set
# CONFIG_USB_ISP1301 is not set
# CONFIG_USB_GADGET is not set
# CONFIG_UWB is not set
# CONFIG_MMC is not set
# CONFIG_MEMSTICK is not set
# CONFIG_NEW_LEDS is not set
# CONFIG_ACCESSIBILITY is not set
# CONFIG_INFINIBAND is not set
CONFIG_RTC_LIB=y
CONFIG_RTC_CLASS=y
CONFIG_RTC_HCTOSYS=y
CONFIG_RTC_HCTOSYS_DEVICE="rtc0"
CONFIG_RTC_SYSTOHC=y
CONFIG_RTC_SYSTOHC_DEVICE="rtc0"
# CONFIG_RTC_DEBUG is not set
#
# RTC interfaces
#
CONFIG_RTC_INTF_SYSFS=y
CONFIG_RTC_INTF_PROC=y
CONFIG_RTC_INTF_DEV=y
# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set
# CONFIG_RTC_DRV_TEST is not set
#
# I2C RTC drivers
#
# CONFIG_RTC_DRV_ABB5ZES3 is not set
# CONFIG_RTC_DRV_ABX80X is not set
# CONFIG_RTC_DRV_DS1307 is not set
# CONFIG_RTC_DRV_DS1374 is not set
# CONFIG_RTC_DRV_DS1672 is not set
# CONFIG_RTC_DRV_MAX6900 is not set
# CONFIG_RTC_DRV_RS5C372 is not set
# CONFIG_RTC_DRV_ISL1208 is not set
# CONFIG_RTC_DRV_ISL12022 is not set
# CONFIG_RTC_DRV_ISL12057 is not set
# CONFIG_RTC_DRV_X1205 is not set
# CONFIG_RTC_DRV_PCF8523 is not set
# CONFIG_RTC_DRV_PCF85063 is not set
# CONFIG_RTC_DRV_PCF8563 is not set
# CONFIG_RTC_DRV_PCF8583 is not set
# CONFIG_RTC_DRV_M41T80 is not set
# CONFIG_RTC_DRV_BQ32K is not set
# CONFIG_RTC_DRV_S35390A is not set
# CONFIG_RTC_DRV_FM3130 is not set
# CONFIG_RTC_DRV_RX8010 is not set
# CONFIG_RTC_DRV_RX8581 is not set
# CONFIG_RTC_DRV_RX8025 is not set
# CONFIG_RTC_DRV_EM3027 is not set
# CONFIG_RTC_DRV_RV8803 is not set
#
# SPI RTC drivers
#
CONFIG_RTC_I2C_AND_SPI=y
#
# SPI and I2C RTC drivers
#
# CONFIG_RTC_DRV_DS3232 is not set
# CONFIG_RTC_DRV_PCF2127 is not set
# CONFIG_RTC_DRV_RV3029C2 is not set
#
# Platform RTC drivers
#
# CONFIG_RTC_DRV_DS1286 is not set
# CONFIG_RTC_DRV_DS1511 is not set
# CONFIG_RTC_DRV_DS1553 is not set
# CONFIG_RTC_DRV_DS1685_FAMILY is not set
# CONFIG_RTC_DRV_DS1742 is not set
# CONFIG_RTC_DRV_DS2404 is not set
# CONFIG_RTC_DRV_STK17TA8 is not set
# CONFIG_RTC_DRV_M48T86 is not set
# CONFIG_RTC_DRV_M48T35 is not set
# CONFIG_RTC_DRV_M48T59 is not set
# CONFIG_RTC_DRV_MSM6242 is not set
# CONFIG_RTC_DRV_BQ4802 is not set
# CONFIG_RTC_DRV_RP5C01 is not set
# CONFIG_RTC_DRV_V3020 is not set
#
# on-CPU RTC drivers
#
CONFIG_RTC_DRV_SH=y
CONFIG_RTC_DRV_RS5C313=y
CONFIG_RTC_DRV_GENERIC=y
#
# HID Sensor RTC drivers
#
# CONFIG_RTC_DRV_HID_SENSOR_TIME is not set
CONFIG_DMADEVICES=y
# CONFIG_DMADEVICES_DEBUG is not set
#
# DMA Devices
#
# CONFIG_INTEL_IDMA64 is not set
# CONFIG_QCOM_HIDMA_MGMT is not set
# CONFIG_QCOM_HIDMA is not set
# CONFIG_DW_DMAC is not set
# CONFIG_DW_DMAC_PCI is not set
#
# DMABUF options
#
# CONFIG_SYNC_FILE is not set
# CONFIG_AUXDISPLAY is not set
# CONFIG_UIO is not set
# CONFIG_VIRT_DRIVERS is not set
#
# Virtio drivers
#
# CONFIG_VIRTIO_PCI is not set
# CONFIG_VIRTIO_MMIO is not set
#
# Microsoft Hyper-V guest support
#
# CONFIG_STAGING is not set
CONFIG_CLKDEV_LOOKUP=y
#
# Hardware Spinlock drivers
#
#
# Clock Source drivers
#
# CONFIG_ARM_TIMER_SP804 is not set
# CONFIG_ATMEL_PIT is not set
CONFIG_SYS_SUPPORTS_SH_TMU=y
# CONFIG_SH_TIMER_CMT is not set
# CONFIG_SH_TIMER_MTU2 is not set
CONFIG_SH_TIMER_TMU=y
# CONFIG_EM_TIMER_STI is not set
# CONFIG_MAILBOX is not set
# CONFIG_IOMMU_SUPPORT is not set
#
# Remoteproc drivers
#
# CONFIG_STE_MODEM_RPROC is not set
#
# Rpmsg drivers
#
#
# SOC (System On Chip) specific Drivers
#
#
# Broadcom SoC drivers
#
# CONFIG_SUNXI_SRAM is not set
# CONFIG_SOC_TI is not set
# CONFIG_PM_DEVFREQ is not set
# CONFIG_EXTCON is not set
# CONFIG_MEMORY is not set
# CONFIG_IIO is not set
# CONFIG_NTB is not set
# CONFIG_VME_BUS is not set
# CONFIG_PWM is not set
CONFIG_ARM_GIC_MAX_NR=1
# CONFIG_IPACK_BUS is not set
# CONFIG_RESET_CONTROLLER is not set
# CONFIG_FMC is not set
#
# PHY Subsystem
#
# CONFIG_GENERIC_PHY is not set
# CONFIG_PHY_PXA_28NM_HSIC is not set
# CONFIG_PHY_PXA_28NM_USB2 is not set
# CONFIG_BCM_KONA_USB2_PHY is not set
# CONFIG_POWERCAP is not set
# CONFIG_MCB is not set
#
# Performance monitor support
#
# CONFIG_RAS is not set
# CONFIG_THUNDERBOLT is not set
#
# Android
#
# CONFIG_ANDROID is not set
# CONFIG_NVMEM is not set
# CONFIG_STM is not set
# CONFIG_INTEL_TH is not set
#
# FPGA Configuration Support
#
# CONFIG_FPGA is not set
#
# File systems
#
CONFIG_EXT2_FS=y
CONFIG_EXT2_FS_XATTR=y
CONFIG_EXT2_FS_POSIX_ACL=y
CONFIG_EXT2_FS_SECURITY=y
CONFIG_EXT3_FS=y
CONFIG_EXT3_FS_POSIX_ACL=y
CONFIG_EXT3_FS_SECURITY=y
CONFIG_EXT4_FS=y
CONFIG_EXT4_FS_POSIX_ACL=y
CONFIG_EXT4_FS_SECURITY=y
# CONFIG_EXT4_ENCRYPTION is not set
CONFIG_EXT4_DEBUG=y
CONFIG_JBD2=y
# CONFIG_JBD2_DEBUG is not set
CONFIG_FS_MBCACHE=y
# CONFIG_REISERFS_FS is not set
# CONFIG_JFS_FS is not set
# CONFIG_XFS_FS is not set
# CONFIG_GFS2_FS is not set
# CONFIG_OCFS2_FS is not set
# CONFIG_BTRFS_FS is not set
# CONFIG_NILFS2_FS is not set
# CONFIG_F2FS_FS is not set
# CONFIG_FS_DAX is not set
CONFIG_FS_POSIX_ACL=y
CONFIG_EXPORTFS=y
# CONFIG_EXPORTFS_BLOCK_OPS is not set
CONFIG_FILE_LOCKING=y
CONFIG_MANDATORY_FILE_LOCKING=y
# CONFIG_FS_ENCRYPTION is not set
CONFIG_FSNOTIFY=y
CONFIG_DNOTIFY=y
CONFIG_INOTIFY_USER=y
# CONFIG_FANOTIFY is not set
# CONFIG_QUOTA is not set
# CONFIG_QUOTACTL is not set
# CONFIG_AUTOFS4_FS is not set
# CONFIG_FUSE_FS is not set
# CONFIG_OVERLAY_FS is not set
#
# Caches
#
# CONFIG_FSCACHE is not set
#
# CD-ROM/DVD Filesystems
#
# CONFIG_ISO9660_FS is not set
# CONFIG_UDF_FS is not set
#
# DOS/FAT/NT Filesystems
#
CONFIG_FAT_FS=y
CONFIG_MSDOS_FS=y
CONFIG_VFAT_FS=y
CONFIG_FAT_DEFAULT_CODEPAGE=437
CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1"
# CONFIG_FAT_DEFAULT_UTF8 is not set
CONFIG_NTFS_FS=y
# CONFIG_NTFS_DEBUG is not set
CONFIG_NTFS_RW=y
#
# Pseudo filesystems
#
CONFIG_PROC_FS=y
CONFIG_PROC_KCORE=y
CONFIG_PROC_SYSCTL=y
CONFIG_PROC_PAGE_MONITOR=y
# CONFIG_PROC_CHILDREN is not set
CONFIG_KERNFS=y
CONFIG_SYSFS=y
CONFIG_TMPFS=y
# CONFIG_TMPFS_POSIX_ACL is not set
# CONFIG_TMPFS_XATTR is not set
CONFIG_HUGETLBFS=y
CONFIG_HUGETLB_PAGE=y
CONFIG_CONFIGFS_FS=y
CONFIG_MISC_FILESYSTEMS=y
# CONFIG_ORANGEFS_FS is not set
# CONFIG_ADFS_FS is not set
# CONFIG_AFFS_FS is not set
# CONFIG_ECRYPT_FS is not set
# CONFIG_HFS_FS is not set
# CONFIG_HFSPLUS_FS is not set
# CONFIG_BEFS_FS is not set
# CONFIG_BFS_FS is not set
# CONFIG_EFS_FS is not set
# CONFIG_JFFS2_FS is not set
# CONFIG_LOGFS is not set
# CONFIG_CRAMFS is not set
# CONFIG_SQUASHFS is not set
# CONFIG_VXFS_FS is not set
CONFIG_MINIX_FS=y
CONFIG_MINIX_FS_NATIVE_ENDIAN=y
# CONFIG_OMFS_FS is not set
# CONFIG_HPFS_FS is not set
# CONFIG_QNX4FS_FS is not set
# CONFIG_QNX6FS_FS is not set
# CONFIG_ROMFS_FS is not set
# CONFIG_PSTORE is not set
# CONFIG_SYSV_FS is not set
# CONFIG_UFS_FS is not set
CONFIG_NETWORK_FILESYSTEMS=y
CONFIG_NFS_FS=y
CONFIG_NFS_V2=y
CONFIG_NFS_V3=y
CONFIG_NFS_V3_ACL=y
CONFIG_NFS_V4=y
# CONFIG_NFS_SWAP is not set
CONFIG_NFS_V4_1=y
# CONFIG_NFS_V4_2 is not set
CONFIG_PNFS_FILE_LAYOUT=y
CONFIG_PNFS_FLEXFILE_LAYOUT=m
CONFIG_NFS_V4_1_IMPLEMENTATION_ID_DOMAIN="kernel.org"
# CONFIG_NFS_V4_1_MIGRATION is not set
CONFIG_ROOT_NFS=y
# CONFIG_NFS_USE_LEGACY_DNS is not set
CONFIG_NFS_USE_KERNEL_DNS=y
# CONFIG_NFSD is not set
CONFIG_GRACE_PERIOD=y
CONFIG_LOCKD=y
CONFIG_LOCKD_V4=y
CONFIG_NFS_ACL_SUPPORT=y
CONFIG_NFS_COMMON=y
CONFIG_SUNRPC=y
CONFIG_SUNRPC_GSS=y
CONFIG_SUNRPC_BACKCHANNEL=y
# CONFIG_SUNRPC_DEBUG is not set
# CONFIG_CEPH_FS is not set
# CONFIG_CIFS is not set
# CONFIG_NCP_FS is not set
# CONFIG_CODA_FS is not set
# CONFIG_AFS_FS is not set
CONFIG_NLS=y
CONFIG_NLS_DEFAULT="iso8859-1"
CONFIG_NLS_CODEPAGE_437=y
# CONFIG_NLS_CODEPAGE_737 is not set
# CONFIG_NLS_CODEPAGE_775 is not set
# CONFIG_NLS_CODEPAGE_850 is not set
# CONFIG_NLS_CODEPAGE_852 is not set
# CONFIG_NLS_CODEPAGE_855 is not set
# CONFIG_NLS_CODEPAGE_857 is not set
# CONFIG_NLS_CODEPAGE_860 is not set
# CONFIG_NLS_CODEPAGE_861 is not set
# CONFIG_NLS_CODEPAGE_862 is not set
# CONFIG_NLS_CODEPAGE_863 is not set
# CONFIG_NLS_CODEPAGE_864 is not set
# CONFIG_NLS_CODEPAGE_865 is not set
# CONFIG_NLS_CODEPAGE_866 is not set
# CONFIG_NLS_CODEPAGE_869 is not set
# CONFIG_NLS_CODEPAGE_936 is not set
# CONFIG_NLS_CODEPAGE_950 is not set
CONFIG_NLS_CODEPAGE_932=y
# CONFIG_NLS_CODEPAGE_949 is not set
# CONFIG_NLS_CODEPAGE_874 is not set
# CONFIG_NLS_ISO8859_8 is not set
# CONFIG_NLS_CODEPAGE_1250 is not set
# CONFIG_NLS_CODEPAGE_1251 is not set
# CONFIG_NLS_ASCII is not set
CONFIG_NLS_ISO8859_1=y
# CONFIG_NLS_ISO8859_2 is not set
# CONFIG_NLS_ISO8859_3 is not set
# CONFIG_NLS_ISO8859_4 is not set
# CONFIG_NLS_ISO8859_5 is not set
# CONFIG_NLS_ISO8859_6 is not set
# CONFIG_NLS_ISO8859_7 is not set
# CONFIG_NLS_ISO8859_9 is not set
# CONFIG_NLS_ISO8859_13 is not set
# CONFIG_NLS_ISO8859_14 is not set
# CONFIG_NLS_ISO8859_15 is not set
# CONFIG_NLS_KOI8_R is not set
# CONFIG_NLS_KOI8_U is not set
# CONFIG_NLS_MAC_ROMAN is not set
# CONFIG_NLS_MAC_CELTIC is not set
# CONFIG_NLS_MAC_CENTEURO is not set
# CONFIG_NLS_MAC_CROATIAN is not set
# CONFIG_NLS_MAC_CYRILLIC is not set
# CONFIG_NLS_MAC_GAELIC is not set
# CONFIG_NLS_MAC_GREEK is not set
# CONFIG_NLS_MAC_ICELAND is not set
# CONFIG_NLS_MAC_INUIT is not set
# CONFIG_NLS_MAC_ROMANIAN is not set
# CONFIG_NLS_MAC_TURKISH is not set
# CONFIG_NLS_UTF8 is not set
# CONFIG_DLM is not set
#
# Kernel hacking
#
CONFIG_TRACE_IRQFLAGS_SUPPORT=y
#
# printk and dmesg options
#
CONFIG_PRINTK_TIME=y
CONFIG_MESSAGE_LOGLEVEL_DEFAULT=4
# CONFIG_DYNAMIC_DEBUG is not set
#
# Compile-time checks and compiler options
#
CONFIG_DEBUG_INFO=y
# CONFIG_DEBUG_INFO_REDUCED is not set
# CONFIG_DEBUG_INFO_SPLIT is not set
# CONFIG_DEBUG_INFO_DWARF4 is not set
# CONFIG_GDB_SCRIPTS is not set
CONFIG_ENABLE_WARN_DEPRECATED=y
# CONFIG_ENABLE_MUST_CHECK is not set
CONFIG_FRAME_WARN=1024
# CONFIG_STRIP_ASM_SYMS is not set
# CONFIG_READABLE_ASM is not set
# CONFIG_UNUSED_SYMBOLS is not set
# CONFIG_PAGE_OWNER is not set
CONFIG_DEBUG_FS=y
# CONFIG_HEADERS_CHECK is not set
# CONFIG_DEBUG_SECTION_MISMATCH is not set
CONFIG_SECTION_MISMATCH_WARN_ONLY=y
CONFIG_FRAME_POINTER=y
# CONFIG_DEBUG_FORCE_WEAK_PER_CPU is not set
CONFIG_MAGIC_SYSRQ=y
CONFIG_MAGIC_SYSRQ_DEFAULT_ENABLE=0x1
CONFIG_DEBUG_KERNEL=y
#
# Memory Debugging
#
# CONFIG_PAGE_EXTENSION is not set
# CONFIG_DEBUG_PAGEALLOC is not set
# CONFIG_PAGE_POISONING is not set
# CONFIG_DEBUG_OBJECTS is not set
# CONFIG_DEBUG_SLAB is not set
CONFIG_HAVE_DEBUG_KMEMLEAK=y
CONFIG_DEBUG_KMEMLEAK=y
CONFIG_DEBUG_KMEMLEAK_EARLY_LOG_SIZE=400
# CONFIG_DEBUG_KMEMLEAK_TEST is not set
# CONFIG_DEBUG_KMEMLEAK_DEFAULT_OFF is not set
# CONFIG_DEBUG_STACK_USAGE is not set
# CONFIG_DEBUG_VM is not set
# CONFIG_DEBUG_MEMORY_INIT is not set
# CONFIG_DEBUG_SHIRQ is not set
#
# Debug Lockups and Hangs
#
# CONFIG_LOCKUP_DETECTOR is not set
CONFIG_DETECT_HUNG_TASK=y
CONFIG_DEFAULT_HUNG_TASK_TIMEOUT=120
# CONFIG_BOOTPARAM_HUNG_TASK_PANIC is not set
CONFIG_BOOTPARAM_HUNG_TASK_PANIC_VALUE=0
# CONFIG_WQ_WATCHDOG is not set
# CONFIG_PANIC_ON_OOPS is not set
CONFIG_PANIC_ON_OOPS_VALUE=0
CONFIG_PANIC_TIMEOUT=0
CONFIG_SCHED_DEBUG=y
CONFIG_SCHED_INFO=y
CONFIG_SCHEDSTATS=y
# CONFIG_SCHED_STACK_END_CHECK is not set
# CONFIG_DEBUG_TIMEKEEPING is not set
# CONFIG_TIMER_STATS is not set
CONFIG_DEBUG_PREEMPT=y
#
# Lock Debugging (spinlocks, mutexes, etc...)
#
# CONFIG_DEBUG_RT_MUTEXES is not set
CONFIG_DEBUG_SPINLOCK=y
CONFIG_DEBUG_MUTEXES=y
# CONFIG_DEBUG_WW_MUTEX_SLOWPATH is not set
# CONFIG_DEBUG_LOCK_ALLOC is not set
# CONFIG_PROVE_LOCKING is not set
# CONFIG_LOCK_STAT is not set
# CONFIG_DEBUG_ATOMIC_SLEEP is not set
# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set
# CONFIG_LOCK_TORTURE_TEST is not set
CONFIG_STACKTRACE=y
# CONFIG_DEBUG_KOBJECT is not set
CONFIG_HAVE_DEBUG_BUGVERBOSE=y
CONFIG_DEBUG_BUGVERBOSE=y
# CONFIG_DEBUG_LIST is not set
# CONFIG_DEBUG_PI_LIST is not set
# CONFIG_DEBUG_SG is not set
# CONFIG_DEBUG_NOTIFIERS is not set
# CONFIG_DEBUG_CREDENTIALS is not set
#
# RCU Debugging
#
# CONFIG_PROVE_RCU is not set
# CONFIG_SPARSE_RCU_POINTER is not set
# CONFIG_TORTURE_TEST is not set
# CONFIG_RCU_PERF_TEST is not set
# CONFIG_RCU_TORTURE_TEST is not set
CONFIG_RCU_CPU_STALL_TIMEOUT=21
# CONFIG_RCU_TRACE is not set
# CONFIG_RCU_EQS_DEBUG is not set
# CONFIG_DEBUG_WQ_FORCE_RR_CPU is not set
# CONFIG_DEBUG_BLOCK_EXT_DEVT is not set
# CONFIG_NOTIFIER_ERROR_INJECTION is not set
# CONFIG_FAULT_INJECTION is not set
CONFIG_LATENCYTOP=y
CONFIG_HAVE_FUNCTION_TRACER=y
CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y
CONFIG_HAVE_DYNAMIC_FTRACE=y
CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y
CONFIG_HAVE_SYSCALL_TRACEPOINTS=y
CONFIG_TRACING_SUPPORT=y
# CONFIG_FTRACE is not set
#
# Runtime Testing
#
# CONFIG_LKDTM is not set
# CONFIG_TEST_LIST_SORT is not set
# CONFIG_BACKTRACE_SELF_TEST is not set
# CONFIG_RBTREE_TEST is not set
# CONFIG_INTERVAL_TREE_TEST is not set
# CONFIG_PERCPU_TEST is not set
# CONFIG_ATOMIC64_SELFTEST is not set
# CONFIG_TEST_HEXDUMP is not set
# CONFIG_TEST_STRING_HELPERS is not set
# CONFIG_TEST_KSTRTOX is not set
# CONFIG_TEST_PRINTF is not set
# CONFIG_TEST_BITMAP is not set
# CONFIG_TEST_UUID is not set
# CONFIG_TEST_RHASHTABLE is not set
# CONFIG_TEST_HASH is not set
# CONFIG_DMA_API_DEBUG is not set
# CONFIG_TEST_LKM is not set
# CONFIG_TEST_USER_COPY is not set
# CONFIG_TEST_BPF is not set
# CONFIG_TEST_FIRMWARE is not set
# CONFIG_TEST_UDELAY is not set
# CONFIG_MEMTEST is not set
# CONFIG_TEST_STATIC_KEYS is not set
# CONFIG_SAMPLES is not set
CONFIG_HAVE_ARCH_KGDB=y
# CONFIG_KGDB is not set
# CONFIG_UBSAN is not set
# CONFIG_SH_STANDARD_BIOS is not set
# CONFIG_STACK_DEBUG is not set
# CONFIG_4KSTACKS is not set
CONFIG_DUMP_CODE=y
# CONFIG_DWARF_UNWINDER is not set
# CONFIG_SH_NO_BSS_INIT is not set
#
# Security options
#
CONFIG_KEYS=y
# CONFIG_PERSISTENT_KEYRINGS is not set
# CONFIG_ENCRYPTED_KEYS is not set
# CONFIG_KEY_DH_OPERATIONS is not set
# CONFIG_SECURITY_DMESG_RESTRICT is not set
CONFIG_SECURITY=y
CONFIG_SECURITYFS=y
CONFIG_SECURITY_NETWORK=y
CONFIG_SECURITY_NETWORK_XFRM=y
CONFIG_SECURITY_PATH=y
CONFIG_HAVE_HARDENED_USERCOPY_ALLOCATOR=y
# CONFIG_SECURITY_SELINUX is not set
# CONFIG_SECURITY_SMACK is not set
CONFIG_SECURITY_TOMOYO=y
CONFIG_SECURITY_TOMOYO_MAX_ACCEPT_ENTRY=2048
CONFIG_SECURITY_TOMOYO_MAX_AUDIT_LOG=1024
# CONFIG_SECURITY_TOMOYO_OMIT_USERSPACE_LOADER is not set
CONFIG_SECURITY_TOMOYO_POLICY_LOADER="/sbin/tomoyo-init"
CONFIG_SECURITY_TOMOYO_ACTIVATION_TRIGGER="/sbin/init"
CONFIG_SECURITY_APPARMOR=y
CONFIG_SECURITY_APPARMOR_BOOTPARAM_VALUE=1
CONFIG_SECURITY_APPARMOR_HASH=y
CONFIG_SECURITY_APPARMOR_HASH_DEFAULT=y
# CONFIG_SECURITY_LOADPIN is not set
CONFIG_SECURITY_YAMA=y
CONFIG_INTEGRITY=y
# CONFIG_INTEGRITY_SIGNATURE is not set
CONFIG_INTEGRITY_AUDIT=y
# CONFIG_IMA is not set
# CONFIG_EVM is not set
# CONFIG_DEFAULT_SECURITY_TOMOYO is not set
# CONFIG_DEFAULT_SECURITY_APPARMOR is not set
CONFIG_DEFAULT_SECURITY_DAC=y
CONFIG_DEFAULT_SECURITY=""
CONFIG_CRYPTO=y
#
# Crypto core or helper
#
CONFIG_CRYPTO_ALGAPI=y
CONFIG_CRYPTO_ALGAPI2=y
CONFIG_CRYPTO_AEAD=m
CONFIG_CRYPTO_AEAD2=y
CONFIG_CRYPTO_BLKCIPHER=m
CONFIG_CRYPTO_BLKCIPHER2=y
CONFIG_CRYPTO_HASH=y
CONFIG_CRYPTO_HASH2=y
CONFIG_CRYPTO_RNG=m
CONFIG_CRYPTO_RNG2=y
CONFIG_CRYPTO_RNG_DEFAULT=m
CONFIG_CRYPTO_AKCIPHER2=y
CONFIG_CRYPTO_KPP2=y
# CONFIG_CRYPTO_RSA is not set
# CONFIG_CRYPTO_DH is not set
# CONFIG_CRYPTO_ECDH is not set
CONFIG_CRYPTO_MANAGER=y
CONFIG_CRYPTO_MANAGER2=y
# CONFIG_CRYPTO_USER is not set
CONFIG_CRYPTO_MANAGER_DISABLE_TESTS=y
# CONFIG_CRYPTO_GF128MUL is not set
CONFIG_CRYPTO_NULL=m
CONFIG_CRYPTO_NULL2=y
CONFIG_CRYPTO_WORKQUEUE=y
# CONFIG_CRYPTO_CRYPTD is not set
# CONFIG_CRYPTO_MCRYPTD is not set
# CONFIG_CRYPTO_AUTHENC is not set
# CONFIG_CRYPTO_TEST is not set
#
# Authenticated Encryption with Associated Data
#
# CONFIG_CRYPTO_CCM is not set
# CONFIG_CRYPTO_GCM is not set
# CONFIG_CRYPTO_CHACHA20POLY1305 is not set
# CONFIG_CRYPTO_SEQIV is not set
CONFIG_CRYPTO_ECHAINIV=m
#
# Block modes
#
CONFIG_CRYPTO_CBC=m
# CONFIG_CRYPTO_CTR is not set
# CONFIG_CRYPTO_CTS is not set
CONFIG_CRYPTO_ECB=m
# CONFIG_CRYPTO_LRW is not set
# CONFIG_CRYPTO_PCBC is not set
# CONFIG_CRYPTO_XTS is not set
# CONFIG_CRYPTO_KEYWRAP is not set
#
# Hash modes
#
# CONFIG_CRYPTO_CMAC is not set
CONFIG_CRYPTO_HMAC=y
# CONFIG_CRYPTO_XCBC is not set
# CONFIG_CRYPTO_VMAC is not set
#
# Digest
#
CONFIG_CRYPTO_CRC32C=y
# CONFIG_CRYPTO_CRC32 is not set
# CONFIG_CRYPTO_CRCT10DIF is not set
# CONFIG_CRYPTO_GHASH is not set
# CONFIG_CRYPTO_POLY1305 is not set
# CONFIG_CRYPTO_MD4 is not set
# CONFIG_CRYPTO_MD5 is not set
# CONFIG_CRYPTO_MICHAEL_MIC is not set
# CONFIG_CRYPTO_RMD128 is not set
# CONFIG_CRYPTO_RMD160 is not set
# CONFIG_CRYPTO_RMD256 is not set
# CONFIG_CRYPTO_RMD320 is not set
CONFIG_CRYPTO_SHA1=y
CONFIG_CRYPTO_SHA256=m
# CONFIG_CRYPTO_SHA512 is not set
# CONFIG_CRYPTO_SHA3 is not set
# CONFIG_CRYPTO_TGR192 is not set
# CONFIG_CRYPTO_WP512 is not set
#
# Ciphers
#
CONFIG_CRYPTO_AES=y
# CONFIG_CRYPTO_ANUBIS is not set
CONFIG_CRYPTO_ARC4=m
# CONFIG_CRYPTO_BLOWFISH is not set
# CONFIG_CRYPTO_CAMELLIA is not set
# CONFIG_CRYPTO_CAST5 is not set
# CONFIG_CRYPTO_CAST6 is not set
# CONFIG_CRYPTO_DES is not set
# CONFIG_CRYPTO_FCRYPT is not set
# CONFIG_CRYPTO_KHAZAD is not set
# CONFIG_CRYPTO_SALSA20 is not set
# CONFIG_CRYPTO_CHACHA20 is not set
# CONFIG_CRYPTO_SEED is not set
# CONFIG_CRYPTO_SERPENT is not set
# CONFIG_CRYPTO_TEA is not set
# CONFIG_CRYPTO_TWOFISH is not set
#
# Compression
#
# CONFIG_CRYPTO_DEFLATE is not set
CONFIG_CRYPTO_LZO=y
# CONFIG_CRYPTO_842 is not set
# CONFIG_CRYPTO_LZ4 is not set
# CONFIG_CRYPTO_LZ4HC is not set
#
# Random Number Generation
#
# CONFIG_CRYPTO_ANSI_CPRNG is not set
CONFIG_CRYPTO_DRBG_MENU=m
CONFIG_CRYPTO_DRBG_HMAC=y
# CONFIG_CRYPTO_DRBG_HASH is not set
CONFIG_CRYPTO_DRBG=m
CONFIG_CRYPTO_JITTERENTROPY=m
CONFIG_CRYPTO_USER_API=m
CONFIG_CRYPTO_USER_API_HASH=m
CONFIG_CRYPTO_USER_API_SKCIPHER=m
# CONFIG_CRYPTO_USER_API_RNG is not set
# CONFIG_CRYPTO_USER_API_AEAD is not set
# CONFIG_CRYPTO_HW is not set
# CONFIG_ASYMMETRIC_KEY_TYPE is not set
#
# Certificates for signature checking
#
# CONFIG_BINARY_PRINTF is not set
#
# Library routines
#
CONFIG_BITREVERSE=y
# CONFIG_HAVE_ARCH_BITREVERSE is not set
CONFIG_GENERIC_STRNCPY_FROM_USER=y
CONFIG_GENERIC_STRNLEN_USER=y
CONFIG_GENERIC_NET_UTILS=y
CONFIG_NO_GENERIC_PCI_IOPORT_MAP=y
CONFIG_GENERIC_PCI_IOMAP=y
CONFIG_GENERIC_IO=y
CONFIG_CRC_CCITT=m
CONFIG_CRC16=y
# CONFIG_CRC_T10DIF is not set
# CONFIG_CRC_ITU_T is not set
CONFIG_CRC32=y
# CONFIG_CRC32_SELFTEST is not set
CONFIG_CRC32_SLICEBY8=y
# CONFIG_CRC32_SLICEBY4 is not set
# CONFIG_CRC32_SARWATE is not set
# CONFIG_CRC32_BIT is not set
# CONFIG_CRC7 is not set
# CONFIG_LIBCRC32C is not set
# CONFIG_CRC8 is not set
CONFIG_AUDIT_GENERIC=y
# CONFIG_AUDIT_ARCH_COMPAT_GENERIC is not set
# CONFIG_RANDOM32_SELFTEST is not set
CONFIG_ZLIB_INFLATE=m
CONFIG_ZLIB_DEFLATE=m
CONFIG_LZO_COMPRESS=y
CONFIG_LZO_DECOMPRESS=y
# CONFIG_XZ_DEC is not set
# CONFIG_XZ_DEC_BCJ is not set
CONFIG_ASSOCIATIVE_ARRAY=y
CONFIG_HAS_IOMEM=y
CONFIG_HAS_IOPORT_MAP=y
CONFIG_HAS_DMA=y
CONFIG_DQL=y
CONFIG_NLATTR=y
CONFIG_GENERIC_ATOMIC64=y
CONFIG_ARCH_HAS_ATOMIC64_DEC_IF_POSITIVE=y
# CONFIG_CORDIC is not set
# CONFIG_DDR is not set
# CONFIG_IRQ_POLL is not set
CONFIG_OID_REGISTRY=y
# CONFIG_SG_SPLIT is not set
CONFIG_SG_POOL=y
# CONFIG_ARCH_HAS_SG_CHAIN is not set
^ permalink raw reply [flat|nested] 138+ messages in thread
* Re: [J-core] [PATCH v5 00/22] sh: LANDISK and R2Dplus convert to device tree
2017-11-17 19:54 ` John Paul Adrian Glaubitz
@ 2018-01-05 21:28 ` Rich Felker
0 siblings, 0 replies; 138+ messages in thread
From: Rich Felker @ 2018-01-05 21:28 UTC (permalink / raw)
To: John Paul Adrian Glaubitz
Cc: Rob Landley, Yoshinori Sato, linux-sh, linux-kernel
On Fri, Nov 17, 2017 at 08:54:47PM +0100, John Paul Adrian Glaubitz wrote:
> On 11/17/2017 08:17 PM, Rich Felker wrote:
> > There were significant problems that I don't think were ever
> > addressed, including incompatible changes in how boot command line was
> > handled and possibly ambiguity about what a physical address means
> > (zero based vs based in the zone SH3/4 excludes from MMU mapping) in
> > the contract for how the bootloader passes a DTB pointer in to the
> > kernel, or something similar.
>
> I see, thanks for the heads-up.
>
> > This is a large part of why I want to get to the point where I can
> > build and boot a kernel on the LANDISK -- not being able to test any
> > of this is a blocker for moving everything to device tree.
>
> I can actually help you with that. I know what to do to get the kernel
> to boot on the LANDISK device. I've got everything working except
> being unable to detect the IDE controller. The attached config builds
> a kernel which boots with the attached output.
>
> Furthermore, in order to install the kernel, you need to use the
> cross-LILO version from [1] which allows to install the bootloader
> on an x86 machine into the SuperH LANDISK image.
>
> Instructions can be found in [2]. A base filesystem can be found in [3].
>
> And I could also send you an USL-5P which is also a LANDISK device,
> just in a different form-factor.
>
> Adrian
>
> > [1]http://iohack.osdn.jp/kogiidena/debian26/base/landisk-tools-20070612.tgz
> > [2] https://www.with.de/fw/pub/Computing/PlextorPX-EH/LANDISKdebian.pdf
> > [3] http://iohack.osdn.jp/kogiidena/debian26/base/
I'm trying to reproduce this but can't find any documentation for
cross-LILO in [2], much less any code except possibly the binary
"lilo.x86" in [1]. Googling cross-lilo isn't finding anything
meaningful except this thread. Is there anywhere to find source and
information on what it's doing, or is this going to be something I
have to reverse-engineer?
Rich
^ permalink raw reply [flat|nested] 138+ messages in thread
* Re: [J-core] [PATCH v5 00/22] sh: LANDISK and R2Dplus convert to device tree
@ 2018-01-05 21:28 ` Rich Felker
0 siblings, 0 replies; 138+ messages in thread
From: Rich Felker @ 2018-01-05 21:28 UTC (permalink / raw)
To: John Paul Adrian Glaubitz
Cc: Rob Landley, Yoshinori Sato, linux-sh, linux-kernel
On Fri, Nov 17, 2017 at 08:54:47PM +0100, John Paul Adrian Glaubitz wrote:
> On 11/17/2017 08:17 PM, Rich Felker wrote:
> > There were significant problems that I don't think were ever
> > addressed, including incompatible changes in how boot command line was
> > handled and possibly ambiguity about what a physical address means
> > (zero based vs based in the zone SH3/4 excludes from MMU mapping) in
> > the contract for how the bootloader passes a DTB pointer in to the
> > kernel, or something similar.
>
> I see, thanks for the heads-up.
>
> > This is a large part of why I want to get to the point where I can
> > build and boot a kernel on the LANDISK -- not being able to test any
> > of this is a blocker for moving everything to device tree.
>
> I can actually help you with that. I know what to do to get the kernel
> to boot on the LANDISK device. I've got everything working except
> being unable to detect the IDE controller. The attached config builds
> a kernel which boots with the attached output.
>
> Furthermore, in order to install the kernel, you need to use the
> cross-LILO version from [1] which allows to install the bootloader
> on an x86 machine into the SuperH LANDISK image.
>
> Instructions can be found in [2]. A base filesystem can be found in [3].
>
> And I could also send you an USL-5P which is also a LANDISK device,
> just in a different form-factor.
>
> Adrian
>
> > [1]http://iohack.osdn.jp/kogiidena/debian26/base/landisk-tools-20070612.tgz
> > [2] https://www.with.de/fw/pub/Computing/PlextorPX-EH/LANDISKdebian.pdf
> > [3] http://iohack.osdn.jp/kogiidena/debian26/base/
I'm trying to reproduce this but can't find any documentation for
cross-LILO in [2], much less any code except possibly the binary
"lilo.x86" in [1]. Googling cross-lilo isn't finding anything
meaningful except this thread. Is there anywhere to find source and
information on what it's doing, or is this going to be something I
have to reverse-engineer?
Rich
^ permalink raw reply [flat|nested] 138+ messages in thread
* Re: [J-core] [PATCH v5 00/22] sh: LANDISK and R2Dplus convert to device tree
2018-01-05 21:28 ` Rich Felker
@ 2018-01-05 21:47 ` John Paul Adrian Glaubitz
-1 siblings, 0 replies; 138+ messages in thread
From: John Paul Adrian Glaubitz @ 2018-01-05 21:47 UTC (permalink / raw)
To: Rich Felker; +Cc: Rob Landley, Yoshinori Sato, linux-sh, linux-kernel
On 01/05/2018 10:28 PM, Rich Felker wrote:
> I'm trying to reproduce this but can't find any documentation for
> cross-LILO in [2], much less any code except possibly the binary
> "lilo.x86" in [1]. Googling cross-lilo isn't finding anything
> meaningful except this thread. Is there anywhere to find source and
> information on what it's doing, or is this going to be something I
> have to reverse-engineer?
It's just LILO for x86, nothing fancy. You could as well just download
LILO, build it for x86 and then use it to install the bootloader onto
the harddisk/CF medium you are using on the LANDISK.
Source code for LILO can be found here: https://lilo.alioth.debian.org/
It's a simple bootloader which works with blocklists.
Adrian
--
.''`. John Paul Adrian Glaubitz
: :' : Debian Developer - glaubitz@debian.org
`. `' Freie Universitaet Berlin - glaubitz@physik.fu-berlin.de
`- GPG: 62FF 8A75 84E0 2956 9546 0006 7426 3B37 F5B5 F913
^ permalink raw reply [flat|nested] 138+ messages in thread
* Re: [J-core] [PATCH v5 00/22] sh: LANDISK and R2Dplus convert to device tree
@ 2018-01-05 21:47 ` John Paul Adrian Glaubitz
0 siblings, 0 replies; 138+ messages in thread
From: John Paul Adrian Glaubitz @ 2018-01-05 21:47 UTC (permalink / raw)
To: Rich Felker; +Cc: Rob Landley, Yoshinori Sato, linux-sh, linux-kernel
On 01/05/2018 10:28 PM, Rich Felker wrote:
> I'm trying to reproduce this but can't find any documentation for
> cross-LILO in [2], much less any code except possibly the binary
> "lilo.x86" in [1]. Googling cross-lilo isn't finding anything
> meaningful except this thread. Is there anywhere to find source and
> information on what it's doing, or is this going to be something I
> have to reverse-engineer?
It's just LILO for x86, nothing fancy. You could as well just download
LILO, build it for x86 and then use it to install the bootloader onto
the harddisk/CF medium you are using on the LANDISK.
Source code for LILO can be found here: https://lilo.alioth.debian.org/
It's a simple bootloader which works with blocklists.
Adrian
--
.''`. John Paul Adrian Glaubitz
: :' : Debian Developer - glaubitz@debian.org
`. `' Freie Universitaet Berlin - glaubitz@physik.fu-berlin.de
`- GPG: 62FF 8A75 84E0 2956 9546 0006 7426 3B37 F5B5 F913
^ permalink raw reply [flat|nested] 138+ messages in thread
* Re: [J-core] [PATCH v5 00/22] sh: LANDISK and R2Dplus convert to device tree
2018-01-05 21:47 ` John Paul Adrian Glaubitz
@ 2018-01-05 22:00 ` Rich Felker
-1 siblings, 0 replies; 138+ messages in thread
From: Rich Felker @ 2018-01-05 22:00 UTC (permalink / raw)
To: John Paul Adrian Glaubitz
Cc: Rob Landley, Yoshinori Sato, linux-sh, linux-kernel
On Fri, Jan 05, 2018 at 10:47:34PM +0100, John Paul Adrian Glaubitz wrote:
> On 01/05/2018 10:28 PM, Rich Felker wrote:
> > I'm trying to reproduce this but can't find any documentation for
> > cross-LILO in [2], much less any code except possibly the binary
> > "lilo.x86" in [1]. Googling cross-lilo isn't finding anything
> > meaningful except this thread. Is there anywhere to find source and
> > information on what it's doing, or is this going to be something I
> > have to reverse-engineer?
>
> It's just LILO for x86, nothing fancy. You could as well just download
> LILO, build it for x86 and then use it to install the bootloader onto
> the harddisk/CF medium you are using on the LANDISK.
>
> Source code for LILO can be found here: https://lilo.alioth.debian.org/
>
> It's a simple bootloader which works with blocklists.
OK, it's good to know that the lilo program is just stock lilo. So
is the provided boot.b-selk file (and an appropriate lilo.conf) all
you need to get it installed on a disk?
Rich
^ permalink raw reply [flat|nested] 138+ messages in thread
* Re: [J-core] [PATCH v5 00/22] sh: LANDISK and R2Dplus convert to device tree
@ 2018-01-05 22:00 ` Rich Felker
0 siblings, 0 replies; 138+ messages in thread
From: Rich Felker @ 2018-01-05 22:00 UTC (permalink / raw)
To: John Paul Adrian Glaubitz
Cc: Rob Landley, Yoshinori Sato, linux-sh, linux-kernel
On Fri, Jan 05, 2018 at 10:47:34PM +0100, John Paul Adrian Glaubitz wrote:
> On 01/05/2018 10:28 PM, Rich Felker wrote:
> > I'm trying to reproduce this but can't find any documentation for
> > cross-LILO in [2], much less any code except possibly the binary
> > "lilo.x86" in [1]. Googling cross-lilo isn't finding anything
> > meaningful except this thread. Is there anywhere to find source and
> > information on what it's doing, or is this going to be something I
> > have to reverse-engineer?
>
> It's just LILO for x86, nothing fancy. You could as well just download
> LILO, build it for x86 and then use it to install the bootloader onto
> the harddisk/CF medium you are using on the LANDISK.
>
> Source code for LILO can be found here: https://lilo.alioth.debian.org/
>
> It's a simple bootloader which works with blocklists.
OK, it's good to know that the lilo program is just stock lilo. So
is the provided boot.b-selk file (and an appropriate lilo.conf) all
you need to get it installed on a disk?
Rich
^ permalink raw reply [flat|nested] 138+ messages in thread
* Re: [J-core] [PATCH v5 00/22] sh: LANDISK and R2Dplus convert to device tree
2018-01-05 22:00 ` Rich Felker
@ 2018-01-05 22:10 ` John Paul Adrian Glaubitz
-1 siblings, 0 replies; 138+ messages in thread
From: John Paul Adrian Glaubitz @ 2018-01-05 22:10 UTC (permalink / raw)
To: Rich Felker; +Cc: Rob Landley, Yoshinori Sato, linux-sh, linux-kernel
On 01/05/2018 11:00 PM, Rich Felker wrote:
>> It's a simple bootloader which works with blocklists.
>
> OK, it's good to know that the lilo program is just stock lilo. So
> is the provided boot.b-selk file (and an appropriate lilo.conf) all
> you need to get it installed on a disk?
If I remember correctly, yes. What you need should be obvious from
the supplied lilo.conf. In order to get LILO to install from my normal
x86 machine, I just bind-mounted the /boot folder of the target hard
disk (CF medium in the case of the USL-5P) and ran the lilo command
with the block device of the target hard disk as a parameter.
It's a bit hacky and it took me some trial and error to get it working,
but I was eventually able to boot a self-compiled kernel on one of
my USL-5Ps. Only issue I initially had was that the bus clock(?) was
set to an incorrect value in the kernel config. With the bus clock
set incorrectly, the kernel would just freeze up.
Oh, and I never managed to get the kernel detect the pseudo-IDE
controller of my USL-5P device. It might work better with your
HDL-160U.
Adrian
--
.''`. John Paul Adrian Glaubitz
: :' : Debian Developer - glaubitz@debian.org
`. `' Freie Universitaet Berlin - glaubitz@physik.fu-berlin.de
`- GPG: 62FF 8A75 84E0 2956 9546 0006 7426 3B37 F5B5 F913
^ permalink raw reply [flat|nested] 138+ messages in thread
* Re: [J-core] [PATCH v5 00/22] sh: LANDISK and R2Dplus convert to device tree
@ 2018-01-05 22:10 ` John Paul Adrian Glaubitz
0 siblings, 0 replies; 138+ messages in thread
From: John Paul Adrian Glaubitz @ 2018-01-05 22:10 UTC (permalink / raw)
To: Rich Felker; +Cc: Rob Landley, Yoshinori Sato, linux-sh, linux-kernel
On 01/05/2018 11:00 PM, Rich Felker wrote:
>> It's a simple bootloader which works with blocklists.
>
> OK, it's good to know that the lilo program is just stock lilo. So
> is the provided boot.b-selk file (and an appropriate lilo.conf) all
> you need to get it installed on a disk?
If I remember correctly, yes. What you need should be obvious from
the supplied lilo.conf. In order to get LILO to install from my normal
x86 machine, I just bind-mounted the /boot folder of the target hard
disk (CF medium in the case of the USL-5P) and ran the lilo command
with the block device of the target hard disk as a parameter.
It's a bit hacky and it took me some trial and error to get it working,
but I was eventually able to boot a self-compiled kernel on one of
my USL-5Ps. Only issue I initially had was that the bus clock(?) was
set to an incorrect value in the kernel config. With the bus clock
set incorrectly, the kernel would just freeze up.
Oh, and I never managed to get the kernel detect the pseudo-IDE
controller of my USL-5P device. It might work better with your
HDL-160U.
Adrian
--
.''`. John Paul Adrian Glaubitz
: :' : Debian Developer - glaubitz@debian.org
`. `' Freie Universitaet Berlin - glaubitz@physik.fu-berlin.de
`- GPG: 62FF 8A75 84E0 2956 9546 0006 7426 3B37 F5B5 F913
^ permalink raw reply [flat|nested] 138+ messages in thread
* Re: [J-core] [PATCH v5 00/22] sh: LANDISK and R2Dplus convert to device tree
2018-01-05 21:28 ` Rich Felker
@ 2018-05-03 1:37 ` Rich Felker
-1 siblings, 0 replies; 138+ messages in thread
From: Rich Felker @ 2018-05-03 1:37 UTC (permalink / raw)
To: John Paul Adrian Glaubitz
Cc: Rob Landley, Yoshinori Sato, linux-sh, linux-kernel
On Fri, Jan 05, 2018 at 04:28:57PM -0500, Rich Felker wrote:
> On Fri, Nov 17, 2017 at 08:54:47PM +0100, John Paul Adrian Glaubitz wrote:
> > On 11/17/2017 08:17 PM, Rich Felker wrote:
> > > There were significant problems that I don't think were ever
> > > addressed, including incompatible changes in how boot command line was
> > > handled and possibly ambiguity about what a physical address means
> > > (zero based vs based in the zone SH3/4 excludes from MMU mapping) in
> > > the contract for how the bootloader passes a DTB pointer in to the
> > > kernel, or something similar.
> >
> > I see, thanks for the heads-up.
> >
> > > This is a large part of why I want to get to the point where I can
> > > build and boot a kernel on the LANDISK -- not being able to test any
> > > of this is a blocker for moving everything to device tree.
> >
> > I can actually help you with that. I know what to do to get the kernel
> > to boot on the LANDISK device. I've got everything working except
> > being unable to detect the IDE controller. The attached config builds
> > a kernel which boots with the attached output.
> >
> > Furthermore, in order to install the kernel, you need to use the
> > cross-LILO version from [1] which allows to install the bootloader
> > on an x86 machine into the SuperH LANDISK image.
> >
> > Instructions can be found in [2]. A base filesystem can be found in [3].
> >
> > And I could also send you an USL-5P which is also a LANDISK device,
> > just in a different form-factor.
> >
> > Adrian
> >
> > > [1]http://iohack.osdn.jp/kogiidena/debian26/base/landisk-tools-20070612.tgz
> > > [2] https://www.with.de/fw/pub/Computing/PlextorPX-EH/LANDISKdebian.pdf
> > > [3] http://iohack.osdn.jp/kogiidena/debian26/base/
>
> I'm trying to reproduce this but can't find any documentation for
> cross-LILO in [2], much less any code except possibly the binary
> "lilo.x86" in [1]. Googling cross-lilo isn't finding anything
> meaningful except this thread. Is there anywhere to find source and
> information on what it's doing, or is this going to be something I
> have to reverse-engineer?
Progress on all this! I've got my LANDISK working again, but with the
disk image Sato-san provided me, which is using (a patched?) U-Boot
and a kernel based on this patch series. I don't know how to recreate
the U-Boot setup from scratch, but I might be able to figure out how
to replace the kernel image it's using. It's possible I may be able to
get lilo working too -- I tried building it but I'm still not sure how
to use it, and in any case I need to image the existing system before
I clobber it since I'm not sure I have the original image.
On a better note, I've reviewed this patch series in more depth and
understand it pretty well now, and have classified the patches as
follows:
01-04 -- about P1 vs absolute interpretation of "physical addresses",
and can be completely dropped if we just use the latter. The former
does not work with full-32-bit address space.
05 -- change in command line interpretation. Something like this might
be desired at some point, if we make it non-conflicting with current
use, but it's independent and not needed.
06-09 -- extending arch/sh device tree support with functionality
needed to get traditional sh systems using it. These look roughly ok,
but might need minor cleanup. Just applying these and linking in a
minimal DTB, I should be able to get a non-board-specific kernel that
boots and shows console messages until it gets stuck with no interrupt
controller or devices. This is the milestone I'm looking to get to
first.
10 -- LANDISK board-specific init stuff, moved into of-generic.c. This
is not where it belongs, but I don't know where it should be, or if we
can get it to book without this. If not, it can be applied as a hack
for testing.
11-13,19 -- new style device tree drivers for clock, pci bus, and irq
controller. They'll have to go through subsystem maintainers unless we
want to move them into arch/sh/drivers. Without these the system is
not going to be usable to the point of reaching userspace.
14,20 -- device trees. The evt2irq/irq2evt macros probably don't make
sense and should be either irqdomain mappings or just removed. But
these can be used out-of-tree anyway to make a DTB while testing.
15-17 -- might also be needed for PCI to work. Not sure about them.
Rich
^ permalink raw reply [flat|nested] 138+ messages in thread
* Re: [J-core] [PATCH v5 00/22] sh: LANDISK and R2Dplus convert to device tree
@ 2018-05-03 1:37 ` Rich Felker
0 siblings, 0 replies; 138+ messages in thread
From: Rich Felker @ 2018-05-03 1:37 UTC (permalink / raw)
To: John Paul Adrian Glaubitz
Cc: Rob Landley, Yoshinori Sato, linux-sh, linux-kernel
On Fri, Jan 05, 2018 at 04:28:57PM -0500, Rich Felker wrote:
> On Fri, Nov 17, 2017 at 08:54:47PM +0100, John Paul Adrian Glaubitz wrote:
> > On 11/17/2017 08:17 PM, Rich Felker wrote:
> > > There were significant problems that I don't think were ever
> > > addressed, including incompatible changes in how boot command line was
> > > handled and possibly ambiguity about what a physical address means
> > > (zero based vs based in the zone SH3/4 excludes from MMU mapping) in
> > > the contract for how the bootloader passes a DTB pointer in to the
> > > kernel, or something similar.
> >
> > I see, thanks for the heads-up.
> >
> > > This is a large part of why I want to get to the point where I can
> > > build and boot a kernel on the LANDISK -- not being able to test any
> > > of this is a blocker for moving everything to device tree.
> >
> > I can actually help you with that. I know what to do to get the kernel
> > to boot on the LANDISK device. I've got everything working except
> > being unable to detect the IDE controller. The attached config builds
> > a kernel which boots with the attached output.
> >
> > Furthermore, in order to install the kernel, you need to use the
> > cross-LILO version from [1] which allows to install the bootloader
> > on an x86 machine into the SuperH LANDISK image.
> >
> > Instructions can be found in [2]. A base filesystem can be found in [3].
> >
> > And I could also send you an USL-5P which is also a LANDISK device,
> > just in a different form-factor.
> >
> > Adrian
> >
> > > [1]http://iohack.osdn.jp/kogiidena/debian26/base/landisk-tools-20070612.tgz
> > > [2] https://www.with.de/fw/pub/Computing/PlextorPX-EH/LANDISKdebian.pdf
> > > [3] http://iohack.osdn.jp/kogiidena/debian26/base/
>
> I'm trying to reproduce this but can't find any documentation for
> cross-LILO in [2], much less any code except possibly the binary
> "lilo.x86" in [1]. Googling cross-lilo isn't finding anything
> meaningful except this thread. Is there anywhere to find source and
> information on what it's doing, or is this going to be something I
> have to reverse-engineer?
Progress on all this! I've got my LANDISK working again, but with the
disk image Sato-san provided me, which is using (a patched?) U-Boot
and a kernel based on this patch series. I don't know how to recreate
the U-Boot setup from scratch, but I might be able to figure out how
to replace the kernel image it's using. It's possible I may be able to
get lilo working too -- I tried building it but I'm still not sure how
to use it, and in any case I need to image the existing system before
I clobber it since I'm not sure I have the original image.
On a better note, I've reviewed this patch series in more depth and
understand it pretty well now, and have classified the patches as
follows:
01-04 -- about P1 vs absolute interpretation of "physical addresses",
and can be completely dropped if we just use the latter. The former
does not work with full-32-bit address space.
05 -- change in command line interpretation. Something like this might
be desired at some point, if we make it non-conflicting with current
use, but it's independent and not needed.
06-09 -- extending arch/sh device tree support with functionality
needed to get traditional sh systems using it. These look roughly ok,
but might need minor cleanup. Just applying these and linking in a
minimal DTB, I should be able to get a non-board-specific kernel that
boots and shows console messages until it gets stuck with no interrupt
controller or devices. This is the milestone I'm looking to get to
first.
10 -- LANDISK board-specific init stuff, moved into of-generic.c. This
is not where it belongs, but I don't know where it should be, or if we
can get it to book without this. If not, it can be applied as a hack
for testing.
11-13,19 -- new style device tree drivers for clock, pci bus, and irq
controller. They'll have to go through subsystem maintainers unless we
want to move them into arch/sh/drivers. Without these the system is
not going to be usable to the point of reaching userspace.
14,20 -- device trees. The evt2irq/irq2evt macros probably don't make
sense and should be either irqdomain mappings or just removed. But
these can be used out-of-tree anyway to make a DTB while testing.
15-17 -- might also be needed for PCI to work. Not sure about them.
Rich
^ permalink raw reply [flat|nested] 138+ messages in thread
* Re: [J-core] [PATCH v5 00/22] sh: LANDISK and R2Dplus convert to device tree
2018-05-03 1:37 ` Rich Felker
@ 2018-05-03 2:33 ` Rich Felker
-1 siblings, 0 replies; 138+ messages in thread
From: Rich Felker @ 2018-05-03 2:33 UTC (permalink / raw)
To: John Paul Adrian Glaubitz
Cc: Rob Landley, Yoshinori Sato, linux-sh, linux-kernel
On Wed, May 02, 2018 at 09:37:08PM -0400, Rich Felker wrote:
> On Fri, Jan 05, 2018 at 04:28:57PM -0500, Rich Felker wrote:
> > On Fri, Nov 17, 2017 at 08:54:47PM +0100, John Paul Adrian Glaubitz wrote:
> > > On 11/17/2017 08:17 PM, Rich Felker wrote:
> > > > There were significant problems that I don't think were ever
> > > > addressed, including incompatible changes in how boot command line was
> > > > handled and possibly ambiguity about what a physical address means
> > > > (zero based vs based in the zone SH3/4 excludes from MMU mapping) in
> > > > the contract for how the bootloader passes a DTB pointer in to the
> > > > kernel, or something similar.
> > >
> > > I see, thanks for the heads-up.
> > >
> > > > This is a large part of why I want to get to the point where I can
> > > > build and boot a kernel on the LANDISK -- not being able to test any
> > > > of this is a blocker for moving everything to device tree.
> > >
> > > I can actually help you with that. I know what to do to get the kernel
> > > to boot on the LANDISK device. I've got everything working except
> > > being unable to detect the IDE controller. The attached config builds
> > > a kernel which boots with the attached output.
> > >
> > > Furthermore, in order to install the kernel, you need to use the
> > > cross-LILO version from [1] which allows to install the bootloader
> > > on an x86 machine into the SuperH LANDISK image.
> > >
> > > Instructions can be found in [2]. A base filesystem can be found in [3].
> > >
> > > And I could also send you an USL-5P which is also a LANDISK device,
> > > just in a different form-factor.
> > >
> > > Adrian
> > >
> > > > [1]http://iohack.osdn.jp/kogiidena/debian26/base/landisk-tools-20070612.tgz
> > > > [2] https://www.with.de/fw/pub/Computing/PlextorPX-EH/LANDISKdebian.pdf
> > > > [3] http://iohack.osdn.jp/kogiidena/debian26/base/
> >
> > I'm trying to reproduce this but can't find any documentation for
> > cross-LILO in [2], much less any code except possibly the binary
> > "lilo.x86" in [1]. Googling cross-lilo isn't finding anything
> > meaningful except this thread. Is there anywhere to find source and
> > information on what it's doing, or is this going to be something I
> > have to reverse-engineer?
>
> Progress on all this! I've got my LANDISK working again, but with the
> disk image Sato-san provided me, which is using (a patched?) U-Boot
> and a kernel based on this patch series. I don't know how to recreate
> the U-Boot setup from scratch, but I might be able to figure out how
> to replace the kernel image it's using. It's possible I may be able to
> get lilo working too -- I tried building it but I'm still not sure how
> to use it, and in any case I need to image the existing system before
> I clobber it since I'm not sure I have the original image.
I found the U-Boot stuff here:
https://ja.osdn.net/users/ysato/pf/uboot/wiki/FrontPage
but I'm not sure how to install it yet. Will try to figure it out.
Rich
^ permalink raw reply [flat|nested] 138+ messages in thread
* Re: [J-core] [PATCH v5 00/22] sh: LANDISK and R2Dplus convert to device tree
@ 2018-05-03 2:33 ` Rich Felker
0 siblings, 0 replies; 138+ messages in thread
From: Rich Felker @ 2018-05-03 2:33 UTC (permalink / raw)
To: John Paul Adrian Glaubitz
Cc: Rob Landley, Yoshinori Sato, linux-sh, linux-kernel
On Wed, May 02, 2018 at 09:37:08PM -0400, Rich Felker wrote:
> On Fri, Jan 05, 2018 at 04:28:57PM -0500, Rich Felker wrote:
> > On Fri, Nov 17, 2017 at 08:54:47PM +0100, John Paul Adrian Glaubitz wrote:
> > > On 11/17/2017 08:17 PM, Rich Felker wrote:
> > > > There were significant problems that I don't think were ever
> > > > addressed, including incompatible changes in how boot command line was
> > > > handled and possibly ambiguity about what a physical address means
> > > > (zero based vs based in the zone SH3/4 excludes from MMU mapping) in
> > > > the contract for how the bootloader passes a DTB pointer in to the
> > > > kernel, or something similar.
> > >
> > > I see, thanks for the heads-up.
> > >
> > > > This is a large part of why I want to get to the point where I can
> > > > build and boot a kernel on the LANDISK -- not being able to test any
> > > > of this is a blocker for moving everything to device tree.
> > >
> > > I can actually help you with that. I know what to do to get the kernel
> > > to boot on the LANDISK device. I've got everything working except
> > > being unable to detect the IDE controller. The attached config builds
> > > a kernel which boots with the attached output.
> > >
> > > Furthermore, in order to install the kernel, you need to use the
> > > cross-LILO version from [1] which allows to install the bootloader
> > > on an x86 machine into the SuperH LANDISK image.
> > >
> > > Instructions can be found in [2]. A base filesystem can be found in [3].
> > >
> > > And I could also send you an USL-5P which is also a LANDISK device,
> > > just in a different form-factor.
> > >
> > > Adrian
> > >
> > > > [1]http://iohack.osdn.jp/kogiidena/debian26/base/landisk-tools-20070612.tgz
> > > > [2] https://www.with.de/fw/pub/Computing/PlextorPX-EH/LANDISKdebian.pdf
> > > > [3] http://iohack.osdn.jp/kogiidena/debian26/base/
> >
> > I'm trying to reproduce this but can't find any documentation for
> > cross-LILO in [2], much less any code except possibly the binary
> > "lilo.x86" in [1]. Googling cross-lilo isn't finding anything
> > meaningful except this thread. Is there anywhere to find source and
> > information on what it's doing, or is this going to be something I
> > have to reverse-engineer?
>
> Progress on all this! I've got my LANDISK working again, but with the
> disk image Sato-san provided me, which is using (a patched?) U-Boot
> and a kernel based on this patch series. I don't know how to recreate
> the U-Boot setup from scratch, but I might be able to figure out how
> to replace the kernel image it's using. It's possible I may be able to
> get lilo working too -- I tried building it but I'm still not sure how
> to use it, and in any case I need to image the existing system before
> I clobber it since I'm not sure I have the original image.
I found the U-Boot stuff here:
https://ja.osdn.net/users/ysato/pf/uboot/wiki/FrontPage
but I'm not sure how to install it yet. Will try to figure it out.
Rich
^ permalink raw reply [flat|nested] 138+ messages in thread
* Re: [J-core] [PATCH v5 00/22] sh: LANDISK and R2Dplus convert to device tree
2018-05-03 2:33 ` Rich Felker
@ 2018-05-03 10:07 ` John Paul Adrian Glaubitz
-1 siblings, 0 replies; 138+ messages in thread
From: John Paul Adrian Glaubitz @ 2018-05-03 10:07 UTC (permalink / raw)
To: Rich Felker; +Cc: Rob Landley, Yoshinori Sato, linux-sh, linux-kernel
[-- Attachment #1: Type: text/plain, Size: 1228 bytes --]
Hi Rich!
On 05/03/2018 04:33 AM, Rich Felker wrote:
> I found the U-Boot stuff here:
>
> https://ja.osdn.net/users/ysato/pf/uboot/wiki/FrontPage
>
> but I'm not sure how to install it yet. Will try to figure it out.
Interesting. It seems the HDL-160U uses u-boot instead of lilo which
is used on my USL-5P. Both are based on the LANDISK platform though.
I wonder whether it is possible to convert the USL-5P to use u-boot
instead of the very limited lilo.
As for the kernel configuration, for USL-5P, I had to use the kernel
configuration attached to this mail. One important configuration setting
is CONFIG_SH_PCLK_FREQ which has to be set to "33250000" otherwise
the kernel won't boot properly.
I still have my USL-5P ready to be set up for testing a new kernel
image with the device tree patches merged. Although I still don't
know how to enable the internal (pseudo) IDE controller.
@Yoshinori:
Did the HDL-160U LANDISK device you have use u-boot by default or
did you convert it from lilo?
Adrian
--
.''`. John Paul Adrian Glaubitz
: :' : Debian Developer - glaubitz@debian.org
`. `' Freie Universitaet Berlin - glaubitz@physik.fu-berlin.de
`- GPG: 62FF 8A75 84E0 2956 9546 0006 7426 3B37 F5B5 F913
[-- Attachment #2: config-usl-5p-4.8.12.txt --]
[-- Type: text/plain, Size: 61584 bytes --]
#
# Automatically generated file; DO NOT EDIT.
# Linux/sh 4.8.12 Kernel Configuration
#
CONFIG_SUPERH=y
CONFIG_SUPERH32=y
# CONFIG_SUPERH64 is not set
CONFIG_ARCH_DEFCONFIG="arch/sh/configs/shx3_defconfig"
CONFIG_RWSEM_GENERIC_SPINLOCK=y
CONFIG_GENERIC_BUG=y
CONFIG_GENERIC_HWEIGHT=y
# CONFIG_ARCH_SUSPEND_POSSIBLE is not set
CONFIG_ARCH_HIBERNATION_POSSIBLE=y
CONFIG_SYS_SUPPORTS_HUGETLBFS=y
CONFIG_SYS_SUPPORTS_PCI=y
CONFIG_STACKTRACE_SUPPORT=y
CONFIG_LOCKDEP_SUPPORT=y
# CONFIG_ARCH_HAS_ILOG2_U32 is not set
# CONFIG_ARCH_HAS_ILOG2_U64 is not set
# CONFIG_NO_IOPORT_MAP is not set
CONFIG_DMA_NONCOHERENT=y
CONFIG_NEED_DMA_MAP_STATE=y
CONFIG_NEED_SG_DMA_LENGTH=y
CONFIG_PGTABLE_LEVELS=2
CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
CONFIG_CONSTRUCTORS=y
CONFIG_IRQ_WORK=y
#
# General setup
#
CONFIG_BROKEN_ON_SMP=y
CONFIG_INIT_ENV_ARG_LIMIT=32
CONFIG_CROSS_COMPILE=""
# CONFIG_COMPILE_TEST is not set
CONFIG_LOCALVERSION=""
CONFIG_LOCALVERSION_AUTO=y
CONFIG_HAVE_KERNEL_GZIP=y
CONFIG_HAVE_KERNEL_BZIP2=y
CONFIG_HAVE_KERNEL_LZMA=y
CONFIG_HAVE_KERNEL_XZ=y
CONFIG_HAVE_KERNEL_LZO=y
CONFIG_KERNEL_GZIP=y
# CONFIG_KERNEL_BZIP2 is not set
# CONFIG_KERNEL_LZMA is not set
# CONFIG_KERNEL_XZ is not set
# CONFIG_KERNEL_LZO is not set
CONFIG_DEFAULT_HOSTNAME="(none)"
CONFIG_SWAP=y
CONFIG_SYSVIPC=y
CONFIG_SYSVIPC_SYSCTL=y
CONFIG_POSIX_MQUEUE=y
CONFIG_POSIX_MQUEUE_SYSCTL=y
CONFIG_CROSS_MEMORY_ATTACH=y
CONFIG_FHANDLE=y
CONFIG_USELIB=y
CONFIG_AUDIT=y
CONFIG_HAVE_ARCH_AUDITSYSCALL=y
CONFIG_AUDITSYSCALL=y
CONFIG_AUDIT_WATCH=y
CONFIG_AUDIT_TREE=y
#
# IRQ subsystem
#
CONFIG_MAY_HAVE_SPARSE_IRQ=y
CONFIG_GENERIC_IRQ_SHOW=y
CONFIG_IRQ_DOMAIN=y
# CONFIG_IRQ_DOMAIN_DEBUG is not set
CONFIG_IRQ_FORCED_THREADING=y
CONFIG_SPARSE_IRQ=y
CONFIG_GENERIC_CLOCKEVENTS=y
#
# Timers subsystem
#
CONFIG_TICK_ONESHOT=y
CONFIG_NO_HZ_COMMON=y
# CONFIG_HZ_PERIODIC is not set
CONFIG_NO_HZ_IDLE=y
CONFIG_NO_HZ=y
CONFIG_HIGH_RES_TIMERS=y
#
# CPU/Task time and stats accounting
#
CONFIG_TICK_CPU_ACCOUNTING=y
CONFIG_BSD_PROCESS_ACCT=y
# CONFIG_BSD_PROCESS_ACCT_V3 is not set
# CONFIG_TASKSTATS is not set
#
# RCU Subsystem
#
CONFIG_PREEMPT_RCU=y
# CONFIG_RCU_EXPERT is not set
CONFIG_SRCU=y
# CONFIG_TASKS_RCU is not set
CONFIG_RCU_STALL_COMMON=y
# CONFIG_TREE_RCU_TRACE is not set
# CONFIG_RCU_EXPEDITE_BOOT is not set
CONFIG_BUILD_BIN2C=y
CONFIG_IKCONFIG=y
CONFIG_IKCONFIG_PROC=y
CONFIG_LOG_BUF_SHIFT=16
CONFIG_NMI_LOG_BUF_SHIFT=13
CONFIG_GENERIC_SCHED_CLOCK=y
CONFIG_CGROUPS=y
# CONFIG_MEMCG is not set
# CONFIG_BLK_CGROUP is not set
CONFIG_CGROUP_SCHED=y
CONFIG_FAIR_GROUP_SCHED=y
# CONFIG_CFS_BANDWIDTH is not set
# CONFIG_RT_GROUP_SCHED is not set
# CONFIG_CGROUP_PIDS is not set
CONFIG_CGROUP_FREEZER=y
# CONFIG_CGROUP_HUGETLB is not set
CONFIG_CPUSETS=y
CONFIG_PROC_PID_CPUSET=y
CONFIG_CGROUP_DEVICE=y
CONFIG_CGROUP_CPUACCT=y
CONFIG_CGROUP_PERF=y
# CONFIG_CGROUP_DEBUG is not set
# CONFIG_CHECKPOINT_RESTORE is not set
# CONFIG_NAMESPACES is not set
# CONFIG_SCHED_AUTOGROUP is not set
# CONFIG_SYSFS_DEPRECATED is not set
# CONFIG_RELAY is not set
# CONFIG_BLK_DEV_INITRD is not set
CONFIG_CC_OPTIMIZE_FOR_PERFORMANCE=y
# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
CONFIG_SYSCTL=y
CONFIG_ANON_INODES=y
CONFIG_HAVE_UID16=y
CONFIG_BPF=y
CONFIG_EXPERT=y
CONFIG_UID16=y
CONFIG_MULTIUSER=y
CONFIG_SGETMASK_SYSCALL=y
CONFIG_SYSFS_SYSCALL=y
# CONFIG_SYSCTL_SYSCALL is not set
CONFIG_KALLSYMS=y
CONFIG_KALLSYMS_ALL=y
# CONFIG_KALLSYMS_ABSOLUTE_PERCPU is not set
CONFIG_KALLSYMS_BASE_RELATIVE=y
CONFIG_PRINTK=y
CONFIG_PRINTK_NMI=y
CONFIG_BUG=y
CONFIG_ELF_CORE=y
CONFIG_BASE_FULL=y
CONFIG_FUTEX=y
CONFIG_HAVE_FUTEX_CMPXCHG=y
CONFIG_EPOLL=y
CONFIG_SIGNALFD=y
CONFIG_TIMERFD=y
CONFIG_EVENTFD=y
# CONFIG_BPF_SYSCALL is not set
CONFIG_SHMEM=y
CONFIG_AIO=y
CONFIG_ADVISE_SYSCALLS=y
# CONFIG_USERFAULTFD is not set
CONFIG_PCI_QUIRKS=y
CONFIG_MEMBARRIER=y
# CONFIG_EMBEDDED is not set
CONFIG_HAVE_PERF_EVENTS=y
CONFIG_PERF_USE_VMALLOC=y
#
# Kernel Performance Events And Counters
#
CONFIG_PERF_EVENTS=y
# CONFIG_DEBUG_PERF_USE_VMALLOC is not set
CONFIG_VM_EVENT_COUNTERS=y
# CONFIG_COMPAT_BRK is not set
CONFIG_SLAB=y
# CONFIG_SLUB is not set
# CONFIG_SLOB is not set
# CONFIG_SLAB_FREELIST_RANDOM is not set
# CONFIG_SYSTEM_DATA_VERIFICATION is not set
CONFIG_PROFILING=y
# CONFIG_OPROFILE is not set
CONFIG_HAVE_OPROFILE=y
# CONFIG_KPROBES is not set
# CONFIG_UPROBES is not set
# CONFIG_HAVE_64BIT_ALIGNED_ACCESS is not set
CONFIG_HAVE_IOREMAP_PROT=y
CONFIG_HAVE_KPROBES=y
CONFIG_HAVE_KRETPROBES=y
CONFIG_HAVE_NMI=y
CONFIG_HAVE_ARCH_TRACEHOOK=y
CONFIG_GENERIC_SMP_IDLE_THREAD=y
CONFIG_GENERIC_IDLE_POLL_SETUP=y
CONFIG_HAVE_REGS_AND_STACK_ACCESS_API=y
CONFIG_HAVE_CLK=y
CONFIG_HAVE_DMA_API_DEBUG=y
CONFIG_HAVE_HW_BREAKPOINT=y
CONFIG_HAVE_MIXED_BREAKPOINTS_REGS=y
CONFIG_ARCH_WANT_IPC_PARSE_VERSION=y
CONFIG_HAVE_CC_STACKPROTECTOR=y
# CONFIG_CC_STACKPROTECTOR is not set
CONFIG_CC_STACKPROTECTOR_NONE=y
# CONFIG_CC_STACKPROTECTOR_REGULAR is not set
# CONFIG_CC_STACKPROTECTOR_STRONG is not set
CONFIG_MODULES_USE_ELF_RELA=y
# CONFIG_HAVE_ARCH_HASH is not set
# CONFIG_ISA_BUS_API is not set
CONFIG_OLD_SIGSUSPEND=y
CONFIG_OLD_SIGACTION=y
CONFIG_CPU_NO_EFFICIENT_FFS=y
#
# GCOV-based kernel profiling
#
CONFIG_GCOV_KERNEL=y
CONFIG_ARCH_HAS_GCOV_PROFILE_ALL=y
# CONFIG_GCOV_PROFILE_ALL is not set
CONFIG_GCOV_FORMAT_AUTODETECT=y
# CONFIG_GCOV_FORMAT_3_4 is not set
# CONFIG_GCOV_FORMAT_4_7 is not set
CONFIG_HAVE_GENERIC_DMA_COHERENT=y
CONFIG_SLABINFO=y
CONFIG_RT_MUTEXES=y
CONFIG_BASE_SMALL=0
CONFIG_MODULES=y
# CONFIG_MODULE_FORCE_LOAD is not set
CONFIG_MODULE_UNLOAD=y
# CONFIG_MODULE_FORCE_UNLOAD is not set
# CONFIG_MODVERSIONS is not set
# CONFIG_MODULE_SRCVERSION_ALL is not set
# CONFIG_MODULE_SIG is not set
# CONFIG_MODULE_COMPRESS is not set
# CONFIG_TRIM_UNUSED_KSYMS is not set
CONFIG_MODULES_TREE_LOOKUP=y
CONFIG_BLOCK=y
CONFIG_LBDAF=y
CONFIG_BLK_DEV_BSG=y
# CONFIG_BLK_DEV_BSGLIB is not set
# CONFIG_BLK_DEV_INTEGRITY is not set
# CONFIG_BLK_CMDLINE_PARSER is not set
#
# Partition Types
#
CONFIG_PARTITION_ADVANCED=y
# CONFIG_ACORN_PARTITION is not set
# CONFIG_AIX_PARTITION is not set
# CONFIG_OSF_PARTITION is not set
# CONFIG_AMIGA_PARTITION is not set
# CONFIG_ATARI_PARTITION is not set
# CONFIG_MAC_PARTITION is not set
CONFIG_MSDOS_PARTITION=y
# CONFIG_BSD_DISKLABEL is not set
# CONFIG_MINIX_SUBPARTITION is not set
# CONFIG_SOLARIS_X86_PARTITION is not set
# CONFIG_UNIXWARE_DISKLABEL is not set
# CONFIG_LDM_PARTITION is not set
# CONFIG_SGI_PARTITION is not set
# CONFIG_ULTRIX_PARTITION is not set
# CONFIG_SUN_PARTITION is not set
# CONFIG_KARMA_PARTITION is not set
CONFIG_EFI_PARTITION=y
# CONFIG_SYSV68_PARTITION is not set
# CONFIG_CMDLINE_PARTITION is not set
#
# IO Schedulers
#
CONFIG_IOSCHED_NOOP=y
CONFIG_IOSCHED_DEADLINE=y
CONFIG_IOSCHED_CFQ=y
# CONFIG_DEFAULT_DEADLINE is not set
CONFIG_DEFAULT_CFQ=y
# CONFIG_DEFAULT_NOOP is not set
CONFIG_DEFAULT_IOSCHED="cfq"
CONFIG_UNINLINE_SPIN_UNLOCK=y
CONFIG_FREEZER=y
#
# System type
#
CONFIG_CPU_SH4=y
CONFIG_CPU_HAS_PMU=y
# CONFIG_CPU_SUBTYPE_SH7619 is not set
# CONFIG_CPU_SUBTYPE_J2 is not set
# CONFIG_CPU_SUBTYPE_SH7201 is not set
# CONFIG_CPU_SUBTYPE_SH7203 is not set
# CONFIG_CPU_SUBTYPE_SH7206 is not set
# CONFIG_CPU_SUBTYPE_SH7263 is not set
# CONFIG_CPU_SUBTYPE_SH7264 is not set
# CONFIG_CPU_SUBTYPE_SH7269 is not set
# CONFIG_CPU_SUBTYPE_MXG is not set
# CONFIG_CPU_SUBTYPE_SH7705 is not set
# CONFIG_CPU_SUBTYPE_SH7706 is not set
# CONFIG_CPU_SUBTYPE_SH7707 is not set
# CONFIG_CPU_SUBTYPE_SH7708 is not set
# CONFIG_CPU_SUBTYPE_SH7709 is not set
# CONFIG_CPU_SUBTYPE_SH7710 is not set
# CONFIG_CPU_SUBTYPE_SH7712 is not set
# CONFIG_CPU_SUBTYPE_SH7720 is not set
# CONFIG_CPU_SUBTYPE_SH7721 is not set
# CONFIG_CPU_SUBTYPE_SH7750 is not set
# CONFIG_CPU_SUBTYPE_SH7091 is not set
# CONFIG_CPU_SUBTYPE_SH7750R is not set
# CONFIG_CPU_SUBTYPE_SH7750S is not set
# CONFIG_CPU_SUBTYPE_SH7751 is not set
CONFIG_CPU_SUBTYPE_SH7751R=y
# CONFIG_CPU_SUBTYPE_SH7760 is not set
# CONFIG_CPU_SUBTYPE_SH4_202 is not set
# CONFIG_CPU_SUBTYPE_SH7723 is not set
# CONFIG_CPU_SUBTYPE_SH7724 is not set
# CONFIG_CPU_SUBTYPE_SH7734 is not set
# CONFIG_CPU_SUBTYPE_SH7757 is not set
# CONFIG_CPU_SUBTYPE_SH7763 is not set
# CONFIG_CPU_SUBTYPE_SH7770 is not set
# CONFIG_CPU_SUBTYPE_SH7780 is not set
# CONFIG_CPU_SUBTYPE_SH7785 is not set
# CONFIG_CPU_SUBTYPE_SH7786 is not set
# CONFIG_CPU_SUBTYPE_SHX3 is not set
# CONFIG_CPU_SUBTYPE_SH7343 is not set
# CONFIG_CPU_SUBTYPE_SH7722 is not set
# CONFIG_CPU_SUBTYPE_SH7366 is not set
#
# Memory management options
#
CONFIG_QUICKLIST=y
CONFIG_MMU=y
CONFIG_PAGE_OFFSET=0x80000000
CONFIG_FORCE_MAX_ZONEORDER=11
CONFIG_MEMORY_START=0xc000000
CONFIG_MEMORY_SIZE=0x4000000
CONFIG_29BIT=y
CONFIG_VSYSCALL=y
CONFIG_ARCH_FLATMEM_ENABLE=y
CONFIG_ARCH_SPARSEMEM_ENABLE=y
CONFIG_ARCH_SPARSEMEM_DEFAULT=y
CONFIG_ARCH_SELECT_MEMORY_MODEL=y
CONFIG_ARCH_ENABLE_MEMORY_HOTPLUG=y
CONFIG_ARCH_ENABLE_MEMORY_HOTREMOVE=y
CONFIG_UNCACHED_MAPPING=y
CONFIG_PAGE_SIZE_4KB=y
# CONFIG_PAGE_SIZE_64KB is not set
# CONFIG_HUGETLB_PAGE_SIZE_64K is not set
CONFIG_HUGETLB_PAGE_SIZE_1MB=y
CONFIG_SELECT_MEMORY_MODEL=y
# CONFIG_FLATMEM_MANUAL is not set
CONFIG_SPARSEMEM_MANUAL=y
CONFIG_SPARSEMEM=y
CONFIG_HAVE_MEMORY_PRESENT=y
CONFIG_SPARSEMEM_STATIC=y
CONFIG_HAVE_MEMBLOCK=y
CONFIG_HAVE_MEMBLOCK_NODE_MAP=y
CONFIG_ARCH_DISCARD_MEMBLOCK=y
# CONFIG_HAVE_BOOTMEM_INFO_NODE is not set
# CONFIG_MEMORY_HOTPLUG is not set
CONFIG_SPLIT_PTLOCK_CPUS=4
# CONFIG_COMPACTION is not set
CONFIG_MIGRATION=y
# CONFIG_PHYS_ADDR_T_64BIT is not set
CONFIG_NR_QUICK=1
# CONFIG_KSM is not set
CONFIG_DEFAULT_MMAP_MIN_ADDR=4096
CONFIG_NEED_PER_CPU_KM=y
# CONFIG_CLEANCACHE is not set
# CONFIG_FRONTSWAP is not set
# CONFIG_CMA is not set
# CONFIG_ZPOOL is not set
# CONFIG_ZBUD is not set
# CONFIG_ZSMALLOC is not set
# CONFIG_IDLE_PAGE_TRACKING is not set
#
# Cache configuration
#
CONFIG_CACHE_WRITEBACK=y
# CONFIG_CACHE_WRITETHROUGH is not set
# CONFIG_CACHE_OFF is not set
#
# Processor features
#
CONFIG_CPU_LITTLE_ENDIAN=y
# CONFIG_CPU_BIG_ENDIAN is not set
CONFIG_SH_FPU=y
CONFIG_SH_STORE_QUEUES=y
CONFIG_CPU_HAS_INTEVT=y
CONFIG_CPU_HAS_SR_RB=y
CONFIG_CPU_HAS_FPU=y
#
# Board support
#
# CONFIG_SH_DEVICE_TREE is not set
# CONFIG_SH_SECUREEDGE5410 is not set
# CONFIG_SH_RTS7751R2D is not set
CONFIG_SH_LANDISK=y
# CONFIG_SH_TITAN is not set
# CONFIG_SH_LBOX_RE2 is not set
#
# Timer and clock configuration
#
CONFIG_SH_PCLK_FREQ=33250000
CONFIG_SH_CLK_CPG=y
CONFIG_SH_CLK_CPG_LEGACY=y
#
# CPU Frequency scaling
#
#
# CPU Frequency scaling
#
CONFIG_CPU_FREQ=y
CONFIG_CPU_FREQ_GOV_ATTR_SET=y
CONFIG_CPU_FREQ_GOV_COMMON=y
CONFIG_CPU_FREQ_STAT=y
CONFIG_CPU_FREQ_STAT_DETAILS=y
# CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE is not set
# CONFIG_CPU_FREQ_DEFAULT_GOV_POWERSAVE is not set
# CONFIG_CPU_FREQ_DEFAULT_GOV_USERSPACE is not set
CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND=y
# CONFIG_CPU_FREQ_DEFAULT_GOV_CONSERVATIVE is not set
CONFIG_CPU_FREQ_GOV_PERFORMANCE=y
# CONFIG_CPU_FREQ_GOV_POWERSAVE is not set
# CONFIG_CPU_FREQ_GOV_USERSPACE is not set
CONFIG_CPU_FREQ_GOV_ONDEMAND=y
# CONFIG_CPU_FREQ_GOV_CONSERVATIVE is not set
#
# CPU frequency scaling drivers
#
CONFIG_SH_CPU_FREQ=y
#
# DMA support
#
CONFIG_SH_DMA=y
CONFIG_SH_DMA_IRQ_MULTI=y
CONFIG_SH_DMA_API=y
CONFIG_NR_ONCHIP_DMA_CHANNELS=8
#
# Companion Chips
#
#
# Additional SuperH Device Drivers
#
CONFIG_HEARTBEAT=y
CONFIG_PUSH_SWITCH=y
#
# Kernel features
#
# CONFIG_HZ_100 is not set
CONFIG_HZ_250=y
# CONFIG_HZ_300 is not set
# CONFIG_HZ_1000 is not set
CONFIG_HZ=250
CONFIG_SCHED_HRTICK=y
# CONFIG_KEXEC is not set
# CONFIG_CRASH_DUMP is not set
CONFIG_PHYSICAL_START=0xc000000
CONFIG_SECCOMP=y
# CONFIG_PREEMPT_NONE is not set
# CONFIG_PREEMPT_VOLUNTARY is not set
CONFIG_PREEMPT=y
CONFIG_PREEMPT_COUNT=y
CONFIG_GUSA=y
# CONFIG_GUSA_RB is not set
CONFIG_HW_PERF_EVENTS=y
#
# SuperH / SH-Mobile Driver Options
#
CONFIG_SH_INTC=y
#
# Interrupt controller options
#
# CONFIG_INTC_MAPPING_DEBUG is not set
#
# Boot options
#
CONFIG_ZERO_PAGE_OFFSET=0x00001000
CONFIG_BOOT_LINK_OFFSET=0x00800000
CONFIG_ENTRY_OFFSET=0x00001000
#
# Bus options
#
CONFIG_PCI=y
CONFIG_PCI_DOMAINS=y
# CONFIG_PCIEPORTBUS is not set
# CONFIG_PCI_MSI is not set
CONFIG_PCI_DEBUG=y
# CONFIG_PCI_REALLOC_ENABLE_AUTO is not set
# CONFIG_PCI_STUB is not set
# CONFIG_PCI_IOV is not set
# CONFIG_PCI_PRI is not set
# CONFIG_PCI_PASID is not set
# CONFIG_HOTPLUG_PCI is not set
#
# PCI host controller drivers
#
# CONFIG_PCCARD is not set
#
# Executable file formats
#
CONFIG_BINFMT_ELF=y
CONFIG_ELFCORE=y
CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS=y
CONFIG_BINFMT_SCRIPT=y
# CONFIG_HAVE_AOUT is not set
# CONFIG_BINFMT_MISC is not set
CONFIG_COREDUMP=y
#
# Power management options (EXPERIMENTAL)
#
# CONFIG_HIBERNATION is not set
# CONFIG_PM is not set
#
# CPU Idle
#
CONFIG_CPU_IDLE=y
CONFIG_CPU_IDLE_GOV_LADDER=y
CONFIG_CPU_IDLE_GOV_MENU=y
# CONFIG_ARCH_NEEDS_CPU_IDLE_COUPLED is not set
CONFIG_NET=y
#
# Networking options
#
CONFIG_PACKET=y
# CONFIG_PACKET_DIAG is not set
CONFIG_UNIX=y
# CONFIG_UNIX_DIAG is not set
CONFIG_XFRM=y
# CONFIG_XFRM_USER is not set
# CONFIG_XFRM_SUB_POLICY is not set
# CONFIG_XFRM_MIGRATE is not set
# CONFIG_XFRM_STATISTICS is not set
# CONFIG_NET_KEY is not set
CONFIG_INET=y
# CONFIG_IP_MULTICAST is not set
CONFIG_IP_ADVANCED_ROUTER=y
# CONFIG_IP_FIB_TRIE_STATS is not set
# CONFIG_IP_MULTIPLE_TABLES is not set
# CONFIG_IP_ROUTE_MULTIPATH is not set
# CONFIG_IP_ROUTE_VERBOSE is not set
CONFIG_IP_PNP=y
CONFIG_IP_PNP_DHCP=y
CONFIG_IP_PNP_BOOTP=y
# CONFIG_IP_PNP_RARP is not set
CONFIG_NET_IPIP=m
CONFIG_NET_IPGRE_DEMUX=m
CONFIG_NET_IP_TUNNEL=y
CONFIG_NET_IPGRE=m
# CONFIG_SYN_COOKIES is not set
# CONFIG_NET_IPVTI is not set
# CONFIG_NET_UDP_TUNNEL is not set
# CONFIG_NET_FOU is not set
# CONFIG_NET_FOU_IP_TUNNELS is not set
# CONFIG_INET_AH is not set
# CONFIG_INET_ESP is not set
# CONFIG_INET_IPCOMP is not set
# CONFIG_INET_XFRM_TUNNEL is not set
CONFIG_INET_TUNNEL=y
CONFIG_INET_XFRM_MODE_TRANSPORT=y
CONFIG_INET_XFRM_MODE_TUNNEL=y
CONFIG_INET_XFRM_MODE_BEET=y
CONFIG_INET_DIAG=y
CONFIG_INET_TCP_DIAG=y
# CONFIG_INET_UDP_DIAG is not set
# CONFIG_INET_DIAG_DESTROY is not set
# CONFIG_TCP_CONG_ADVANCED is not set
CONFIG_TCP_CONG_CUBIC=y
CONFIG_DEFAULT_TCP_CONG="cubic"
# CONFIG_TCP_MD5SIG is not set
CONFIG_IPV6=y
CONFIG_IPV6_ROUTER_PREF=y
CONFIG_IPV6_ROUTE_INFO=y
CONFIG_IPV6_OPTIMISTIC_DAD=y
# CONFIG_INET6_AH is not set
# CONFIG_INET6_ESP is not set
# CONFIG_INET6_IPCOMP is not set
# CONFIG_IPV6_MIP6 is not set
# CONFIG_INET6_XFRM_TUNNEL is not set
# CONFIG_INET6_TUNNEL is not set
CONFIG_INET6_XFRM_MODE_TRANSPORT=y
CONFIG_INET6_XFRM_MODE_TUNNEL=y
CONFIG_INET6_XFRM_MODE_BEET=y
# CONFIG_INET6_XFRM_MODE_ROUTEOPTIMIZATION is not set
# CONFIG_IPV6_VTI is not set
CONFIG_IPV6_SIT=y
# CONFIG_IPV6_SIT_6RD is not set
CONFIG_IPV6_NDISC_NODETYPE=y
# CONFIG_IPV6_TUNNEL is not set
# CONFIG_IPV6_GRE is not set
# CONFIG_IPV6_FOU is not set
# CONFIG_IPV6_FOU_TUNNEL is not set
# CONFIG_IPV6_MULTIPLE_TABLES is not set
# CONFIG_IPV6_MROUTE is not set
# CONFIG_NETLABEL is not set
# CONFIG_NETWORK_SECMARK is not set
# CONFIG_NET_PTP_CLASSIFY is not set
# CONFIG_NETWORK_PHY_TIMESTAMPING is not set
# CONFIG_NETFILTER is not set
# CONFIG_IP_DCCP is not set
# CONFIG_IP_SCTP is not set
# CONFIG_RDS is not set
# CONFIG_TIPC is not set
# CONFIG_ATM is not set
# CONFIG_L2TP is not set
# CONFIG_BRIDGE is not set
CONFIG_HAVE_NET_DSA=y
# CONFIG_VLAN_8021Q is not set
# CONFIG_DECNET is not set
# CONFIG_LLC2 is not set
# CONFIG_IPX is not set
# CONFIG_ATALK is not set
# CONFIG_X25 is not set
# CONFIG_LAPB is not set
# CONFIG_PHONET is not set
# CONFIG_6LOWPAN is not set
# CONFIG_IEEE802154 is not set
# CONFIG_NET_SCHED is not set
# CONFIG_DCB is not set
CONFIG_DNS_RESOLVER=y
# CONFIG_BATMAN_ADV is not set
# CONFIG_OPENVSWITCH is not set
# CONFIG_VSOCKETS is not set
# CONFIG_NETLINK_DIAG is not set
# CONFIG_MPLS is not set
# CONFIG_HSR is not set
# CONFIG_NET_SWITCHDEV is not set
# CONFIG_NET_L3_MASTER_DEV is not set
# CONFIG_NET_NCSI is not set
# CONFIG_SOCK_CGROUP_DATA is not set
# CONFIG_CGROUP_NET_PRIO is not set
# CONFIG_CGROUP_NET_CLASSID is not set
CONFIG_NET_RX_BUSY_POLL=y
CONFIG_BQL=y
#
# Network testing
#
# CONFIG_NET_PKTGEN is not set
# CONFIG_HAMRADIO is not set
# CONFIG_CAN is not set
# CONFIG_IRDA is not set
# CONFIG_BT is not set
# CONFIG_AF_RXRPC is not set
# CONFIG_AF_KCM is not set
# CONFIG_WIRELESS is not set
# CONFIG_WIMAX is not set
# CONFIG_RFKILL is not set
# CONFIG_NET_9P is not set
# CONFIG_CAIF is not set
# CONFIG_CEPH_LIB is not set
# CONFIG_NFC is not set
# CONFIG_LWTUNNEL is not set
CONFIG_DST_CACHE=y
# CONFIG_NET_DEVLINK is not set
CONFIG_MAY_USE_DEVLINK=y
#
# Device Drivers
#
#
# Generic Driver Options
#
CONFIG_UEVENT_HELPER=y
CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
CONFIG_DEVTMPFS=y
CONFIG_DEVTMPFS_MOUNT=y
CONFIG_STANDALONE=y
CONFIG_PREVENT_FIRMWARE_BUILD=y
CONFIG_FW_LOADER=y
CONFIG_FIRMWARE_IN_KERNEL=y
CONFIG_EXTRA_FIRMWARE=""
# CONFIG_FW_LOADER_USER_HELPER_FALLBACK is not set
CONFIG_ALLOW_DEV_COREDUMP=y
# CONFIG_DEBUG_DRIVER is not set
# CONFIG_DEBUG_DEVRES is not set
# CONFIG_SYS_HYPERVISOR is not set
# CONFIG_GENERIC_CPU_DEVICES is not set
CONFIG_REGMAP=y
CONFIG_REGMAP_I2C=y
# CONFIG_DMA_SHARED_BUFFER is not set
#
# Bus devices
#
# CONFIG_CONNECTOR is not set
CONFIG_MTD=y
# CONFIG_MTD_TESTS is not set
# CONFIG_MTD_REDBOOT_PARTS is not set
# CONFIG_MTD_CMDLINE_PARTS is not set
# CONFIG_MTD_AR7_PARTS is not set
#
# User Modules And Translation Layers
#
CONFIG_MTD_BLKDEVS=y
CONFIG_MTD_BLOCK=y
# CONFIG_FTL is not set
# CONFIG_NFTL is not set
# CONFIG_INFTL is not set
# CONFIG_RFD_FTL is not set
# CONFIG_SSFDC is not set
# CONFIG_SM_FTL is not set
# CONFIG_MTD_OOPS is not set
# CONFIG_MTD_SWAP is not set
# CONFIG_MTD_PARTITIONED_MASTER is not set
#
# RAM/ROM/Flash chip drivers
#
CONFIG_MTD_CFI=y
# CONFIG_MTD_JEDECPROBE is not set
CONFIG_MTD_GEN_PROBE=y
# CONFIG_MTD_CFI_ADV_OPTIONS is not set
CONFIG_MTD_MAP_BANK_WIDTH_1=y
CONFIG_MTD_MAP_BANK_WIDTH_2=y
CONFIG_MTD_MAP_BANK_WIDTH_4=y
# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set
# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set
# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set
CONFIG_MTD_CFI_I1=y
CONFIG_MTD_CFI_I2=y
# CONFIG_MTD_CFI_I4 is not set
# CONFIG_MTD_CFI_I8 is not set
# CONFIG_MTD_CFI_INTELEXT is not set
CONFIG_MTD_CFI_AMDSTD=y
# CONFIG_MTD_CFI_STAA is not set
CONFIG_MTD_CFI_UTIL=y
# CONFIG_MTD_RAM is not set
# CONFIG_MTD_ROM is not set
# CONFIG_MTD_ABSENT is not set
#
# Mapping drivers for chip access
#
# CONFIG_MTD_COMPLEX_MAPPINGS is not set
CONFIG_MTD_PHYSMAP=y
# CONFIG_MTD_PHYSMAP_COMPAT is not set
# CONFIG_MTD_INTEL_VR_NOR is not set
# CONFIG_MTD_PLATRAM is not set
#
# Self-contained MTD device drivers
#
# CONFIG_MTD_PMC551 is not set
# CONFIG_MTD_SLRAM is not set
# CONFIG_MTD_PHRAM is not set
# CONFIG_MTD_MTDRAM is not set
# CONFIG_MTD_BLOCK2MTD is not set
#
# Disk-On-Chip Device Drivers
#
# CONFIG_MTD_DOCG3 is not set
# CONFIG_MTD_NAND is not set
# CONFIG_MTD_ONENAND is not set
#
# LPDDR & LPDDR2 PCM memory drivers
#
# CONFIG_MTD_LPDDR is not set
# CONFIG_MTD_SPI_NOR is not set
# CONFIG_MTD_UBI is not set
# CONFIG_OF is not set
CONFIG_ARCH_MIGHT_HAVE_PC_PARPORT=y
# CONFIG_PARPORT is not set
CONFIG_BLK_DEV=y
# CONFIG_BLK_DEV_NULL_BLK is not set
# CONFIG_BLK_DEV_PCIESSD_MTIP32XX is not set
# CONFIG_BLK_CPQ_CISS_DA is not set
# CONFIG_BLK_DEV_DAC960 is not set
# CONFIG_BLK_DEV_UMEM is not set
# CONFIG_BLK_DEV_COW_COMMON is not set
CONFIG_BLK_DEV_LOOP=y
CONFIG_BLK_DEV_LOOP_MIN_COUNT=8
CONFIG_BLK_DEV_CRYPTOLOOP=m
# CONFIG_BLK_DEV_DRBD is not set
# CONFIG_BLK_DEV_NBD is not set
# CONFIG_BLK_DEV_SX8 is not set
CONFIG_BLK_DEV_RAM=y
CONFIG_BLK_DEV_RAM_COUNT=16
CONFIG_BLK_DEV_RAM_SIZE=4096
# CONFIG_CDROM_PKTCDVD is not set
# CONFIG_ATA_OVER_ETH is not set
# CONFIG_BLK_DEV_HD is not set
# CONFIG_BLK_DEV_RBD is not set
# CONFIG_BLK_DEV_RSXX is not set
# CONFIG_BLK_DEV_NVME is not set
# CONFIG_NVME_TARGET is not set
#
# Misc devices
#
# CONFIG_SENSORS_LIS3LV02D is not set
# CONFIG_AD525X_DPOT is not set
# CONFIG_DUMMY_IRQ is not set
# CONFIG_PHANTOM is not set
# CONFIG_SGI_IOC4 is not set
# CONFIG_TIFM_CORE is not set
# CONFIG_ICS932S401 is not set
# CONFIG_ENCLOSURE_SERVICES is not set
# CONFIG_HP_ILO is not set
# CONFIG_APDS9802ALS is not set
# CONFIG_ISL29003 is not set
# CONFIG_ISL29020 is not set
# CONFIG_SENSORS_TSL2550 is not set
# CONFIG_SENSORS_BH1770 is not set
# CONFIG_SENSORS_APDS990X is not set
# CONFIG_HMC6352 is not set
# CONFIG_DS1682 is not set
# CONFIG_BMP085_I2C is not set
# CONFIG_USB_SWITCH_FSA9480 is not set
# CONFIG_SRAM is not set
# CONFIG_C2PORT is not set
#
# EEPROM support
#
# CONFIG_EEPROM_AT24 is not set
# CONFIG_EEPROM_LEGACY is not set
# CONFIG_EEPROM_MAX6875 is not set
# CONFIG_EEPROM_93CX6 is not set
# CONFIG_CB710_CORE is not set
#
# Texas Instruments shared transport line discipline
#
# CONFIG_SENSORS_LIS3_I2C is not set
#
# Altera FPGA firmware download module
#
# CONFIG_ALTERA_STAPL is not set
#
# Intel MIC Bus Driver
#
#
# SCIF Bus Driver
#
#
# VOP Bus Driver
#
#
# Intel MIC Host Driver
#
#
# Intel MIC Card Driver
#
#
# SCIF Driver
#
#
# Intel MIC Coprocessor State Management (COSM) Drivers
#
#
# VOP Driver
#
# CONFIG_ECHO is not set
# CONFIG_CXL_BASE is not set
# CONFIG_CXL_AFU_DRIVER_OPS is not set
CONFIG_HAVE_IDE=y
CONFIG_IDE=y
#
# Please see Documentation/ide/ide.txt for help/info on IDE drives
#
CONFIG_IDE_XFER_MODE=y
CONFIG_IDE_ATAPI=y
# CONFIG_BLK_DEV_IDE_SATA is not set
CONFIG_IDE_GD=y
CONFIG_IDE_GD_ATA=y
CONFIG_IDE_GD_ATAPI=y
# CONFIG_BLK_DEV_IDECD is not set
# CONFIG_BLK_DEV_IDETAPE is not set
# CONFIG_IDE_TASK_IOCTL is not set
CONFIG_IDE_PROC_FS=y
#
# IDE chipset support/bugfixes
#
CONFIG_BLK_DEV_PLATFORM=y
CONFIG_BLK_DEV_IDEDMA_SFF=y
#
# PCI IDE chipsets support
#
CONFIG_BLK_DEV_IDEPCI=y
CONFIG_IDEPCI_PCIBUS_ORDER=y
# CONFIG_BLK_DEV_OFFBOARD is not set
CONFIG_BLK_DEV_GENERIC=y
# CONFIG_BLK_DEV_OPTI621 is not set
CONFIG_BLK_DEV_IDEDMA_PCI=y
CONFIG_BLK_DEV_AEC62XX=y
# CONFIG_BLK_DEV_ALI15X3 is not set
# CONFIG_BLK_DEV_AMD74XX is not set
# CONFIG_BLK_DEV_CMD64X is not set
# CONFIG_BLK_DEV_TRIFLEX is not set
# CONFIG_BLK_DEV_HPT366 is not set
# CONFIG_BLK_DEV_JMICRON is not set
# CONFIG_BLK_DEV_PIIX is not set
# CONFIG_BLK_DEV_IT8172 is not set
# CONFIG_BLK_DEV_IT8213 is not set
# CONFIG_BLK_DEV_IT821X is not set
# CONFIG_BLK_DEV_NS87415 is not set
CONFIG_BLK_DEV_PDC202XX_OLD=y
CONFIG_BLK_DEV_PDC202XX_NEW=y
# CONFIG_BLK_DEV_SVWKS is not set
# CONFIG_BLK_DEV_SIIMAGE is not set
# CONFIG_BLK_DEV_SLC90E66 is not set
# CONFIG_BLK_DEV_TRM290 is not set
# CONFIG_BLK_DEV_VIA82CXXX is not set
# CONFIG_BLK_DEV_TC86C001 is not set
CONFIG_BLK_DEV_IDEDMA=y
#
# SCSI device support
#
CONFIG_SCSI_MOD=y
# CONFIG_RAID_ATTRS is not set
CONFIG_SCSI=y
CONFIG_SCSI_DMA=y
# CONFIG_SCSI_NETLINK is not set
# CONFIG_SCSI_MQ_DEFAULT is not set
# CONFIG_SCSI_PROC_FS is not set
#
# SCSI support type (disk, tape, CD-ROM)
#
CONFIG_BLK_DEV_SD=y
# CONFIG_CHR_DEV_ST is not set
# CONFIG_CHR_DEV_OSST is not set
# CONFIG_BLK_DEV_SR is not set
# CONFIG_CHR_DEV_SG is not set
# CONFIG_CHR_DEV_SCH is not set
# CONFIG_SCSI_CONSTANTS is not set
# CONFIG_SCSI_LOGGING is not set
# CONFIG_SCSI_SCAN_ASYNC is not set
#
# SCSI Transports
#
# CONFIG_SCSI_SPI_ATTRS is not set
# CONFIG_SCSI_FC_ATTRS is not set
# CONFIG_SCSI_ISCSI_ATTRS is not set
# CONFIG_SCSI_SAS_ATTRS is not set
# CONFIG_SCSI_SAS_LIBSAS is not set
# CONFIG_SCSI_SRP_ATTRS is not set
# CONFIG_SCSI_LOWLEVEL is not set
# CONFIG_SCSI_DH is not set
# CONFIG_SCSI_OSD_INITIATOR is not set
CONFIG_HAVE_PATA_PLATFORM=y
# CONFIG_ATA is not set
# CONFIG_MD is not set
# CONFIG_TARGET_CORE is not set
# CONFIG_FUSION is not set
#
# IEEE 1394 (FireWire) support
#
# CONFIG_FIREWIRE is not set
# CONFIG_FIREWIRE_NOSY is not set
CONFIG_NETDEVICES=y
CONFIG_MII=y
CONFIG_NET_CORE=y
# CONFIG_BONDING is not set
# CONFIG_DUMMY is not set
# CONFIG_EQUALIZER is not set
# CONFIG_NET_FC is not set
# CONFIG_NET_TEAM is not set
# CONFIG_MACVLAN is not set
# CONFIG_IPVLAN is not set
# CONFIG_VXLAN is not set
# CONFIG_MACSEC is not set
# CONFIG_NETCONSOLE is not set
# CONFIG_NETPOLL is not set
# CONFIG_NET_POLL_CONTROLLER is not set
# CONFIG_TUN is not set
# CONFIG_TUN_VNET_CROSS_LE is not set
# CONFIG_VETH is not set
# CONFIG_NLMON is not set
# CONFIG_ARCNET is not set
#
# CAIF transport drivers
#
#
# Distributed Switch Architecture drivers
#
CONFIG_ETHERNET=y
# CONFIG_NET_VENDOR_3COM is not set
# CONFIG_NET_VENDOR_ADAPTEC is not set
# CONFIG_NET_VENDOR_AGERE is not set
# CONFIG_NET_VENDOR_ALTEON is not set
# CONFIG_ALTERA_TSE is not set
# CONFIG_NET_VENDOR_AMD is not set
# CONFIG_NET_VENDOR_ARC is not set
# CONFIG_NET_VENDOR_ATHEROS is not set
# CONFIG_NET_VENDOR_AURORA is not set
# CONFIG_NET_CADENCE is not set
# CONFIG_NET_VENDOR_BROADCOM is not set
# CONFIG_NET_VENDOR_BROCADE is not set
# CONFIG_NET_VENDOR_CAVIUM is not set
# CONFIG_NET_VENDOR_CHELSIO is not set
# CONFIG_NET_VENDOR_CISCO is not set
# CONFIG_DNET is not set
# CONFIG_NET_VENDOR_DEC is not set
# CONFIG_NET_VENDOR_DLINK is not set
# CONFIG_NET_VENDOR_EMULEX is not set
# CONFIG_NET_VENDOR_EZCHIP is not set
# CONFIG_NET_VENDOR_EXAR is not set
# CONFIG_NET_VENDOR_HP is not set
# CONFIG_NET_VENDOR_INTEL is not set
# CONFIG_JME is not set
# CONFIG_NET_VENDOR_MARVELL is not set
# CONFIG_NET_VENDOR_MELLANOX is not set
# CONFIG_NET_VENDOR_MICREL is not set
# CONFIG_NET_VENDOR_MYRI is not set
# CONFIG_FEALNX is not set
# CONFIG_NET_VENDOR_NATSEMI is not set
# CONFIG_NET_VENDOR_NETRONOME is not set
# CONFIG_NET_VENDOR_NVIDIA is not set
# CONFIG_NET_VENDOR_OKI is not set
# CONFIG_ETHOC is not set
# CONFIG_NET_PACKET_ENGINE is not set
# CONFIG_NET_VENDOR_QLOGIC is not set
# CONFIG_NET_VENDOR_QUALCOMM is not set
CONFIG_NET_VENDOR_REALTEK=y
# CONFIG_8139CP is not set
CONFIG_8139TOO=y
# CONFIG_8139TOO_PIO is not set
# CONFIG_8139TOO_TUNE_TWISTER is not set
# CONFIG_8139TOO_8129 is not set
# CONFIG_8139_OLD_RX_RESET is not set
# CONFIG_R8169 is not set
CONFIG_NET_VENDOR_RENESAS=y
CONFIG_SH_ETH=y
# CONFIG_NET_VENDOR_RDC is not set
# CONFIG_NET_VENDOR_ROCKER is not set
# CONFIG_NET_VENDOR_SAMSUNG is not set
# CONFIG_NET_VENDOR_SEEQ is not set
# CONFIG_NET_VENDOR_SILAN is not set
# CONFIG_NET_VENDOR_SIS is not set
# CONFIG_SFC is not set
# CONFIG_NET_VENDOR_SMSC is not set
# CONFIG_NET_VENDOR_STMICRO is not set
# CONFIG_NET_VENDOR_SUN is not set
# CONFIG_NET_VENDOR_SYNOPSYS is not set
# CONFIG_NET_VENDOR_TEHUTI is not set
# CONFIG_NET_VENDOR_TI is not set
# CONFIG_NET_VENDOR_VIA is not set
# CONFIG_NET_VENDOR_WIZNET is not set
# CONFIG_FDDI is not set
# CONFIG_HIPPI is not set
CONFIG_PHYLIB=y
#
# MII PHY device drivers
#
# CONFIG_AQUANTIA_PHY is not set
# CONFIG_AT803X_PHY is not set
# CONFIG_AMD_PHY is not set
# CONFIG_MARVELL_PHY is not set
# CONFIG_DAVICOM_PHY is not set
# CONFIG_QSEMI_PHY is not set
# CONFIG_LXT_PHY is not set
# CONFIG_CICADA_PHY is not set
# CONFIG_VITESSE_PHY is not set
# CONFIG_TERANETICS_PHY is not set
# CONFIG_SMSC_PHY is not set
# CONFIG_BROADCOM_PHY is not set
# CONFIG_BCM7XXX_PHY is not set
# CONFIG_BCM87XX_PHY is not set
# CONFIG_ICPLUS_PHY is not set
# CONFIG_REALTEK_PHY is not set
# CONFIG_NATIONAL_PHY is not set
# CONFIG_STE10XP is not set
# CONFIG_LSI_ET1011C_PHY is not set
# CONFIG_MICREL_PHY is not set
# CONFIG_DP83848_PHY is not set
# CONFIG_DP83867_PHY is not set
# CONFIG_MICROCHIP_PHY is not set
# CONFIG_FIXED_PHY is not set
CONFIG_MDIO_BITBANG=y
# CONFIG_MDIO_BCM_UNIMAC is not set
# CONFIG_INTEL_XWAY_PHY is not set
CONFIG_PPP=m
CONFIG_PPP_BSDCOMP=m
CONFIG_PPP_DEFLATE=m
CONFIG_PPP_FILTER=y
CONFIG_PPP_MPPE=m
CONFIG_PPP_MULTILINK=y
# CONFIG_PPPOE is not set
CONFIG_PPTP=m
CONFIG_PPP_ASYNC=m
CONFIG_PPP_SYNC_TTY=m
# CONFIG_SLIP is not set
CONFIG_SLHC=m
# CONFIG_USB_NET_DRIVERS is not set
# CONFIG_WLAN is not set
#
# Enable WiMAX (Networking options) to see the WiMAX drivers
#
# CONFIG_WAN is not set
# CONFIG_VMXNET3 is not set
# CONFIG_ISDN is not set
# CONFIG_NVM is not set
#
# Input device support
#
CONFIG_INPUT=y
CONFIG_INPUT_FF_MEMLESS=m
# CONFIG_INPUT_POLLDEV is not set
# CONFIG_INPUT_SPARSEKMAP is not set
# CONFIG_INPUT_MATRIXKMAP is not set
#
# Userland interfaces
#
CONFIG_INPUT_MOUSEDEV=y
CONFIG_INPUT_MOUSEDEV_PSAUX=y
CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
# CONFIG_INPUT_JOYDEV is not set
CONFIG_INPUT_EVDEV=y
CONFIG_INPUT_EVBUG=m
#
# Input Device Drivers
#
CONFIG_INPUT_KEYBOARD=y
# CONFIG_KEYBOARD_ADP5588 is not set
# CONFIG_KEYBOARD_ADP5589 is not set
CONFIG_KEYBOARD_ATKBD=y
# CONFIG_KEYBOARD_QT1070 is not set
# CONFIG_KEYBOARD_QT2160 is not set
# CONFIG_KEYBOARD_LKKBD is not set
# CONFIG_KEYBOARD_TCA6416 is not set
# CONFIG_KEYBOARD_TCA8418 is not set
# CONFIG_KEYBOARD_LM8333 is not set
# CONFIG_KEYBOARD_MAX7359 is not set
# CONFIG_KEYBOARD_MCS is not set
# CONFIG_KEYBOARD_MPR121 is not set
# CONFIG_KEYBOARD_NEWTON is not set
# CONFIG_KEYBOARD_OPENCORES is not set
# CONFIG_KEYBOARD_SAMSUNG is not set
# CONFIG_KEYBOARD_STOWAWAY is not set
# CONFIG_KEYBOARD_SUNKBD is not set
# CONFIG_KEYBOARD_XTKBD is not set
CONFIG_INPUT_MOUSE=y
CONFIG_MOUSE_PS2=y
CONFIG_MOUSE_PS2_ALPS=y
CONFIG_MOUSE_PS2_BYD=y
CONFIG_MOUSE_PS2_LOGIPS2PP=y
CONFIG_MOUSE_PS2_SYNAPTICS=y
CONFIG_MOUSE_PS2_CYPRESS=y
CONFIG_MOUSE_PS2_TRACKPOINT=y
# CONFIG_MOUSE_PS2_ELANTECH is not set
# CONFIG_MOUSE_PS2_SENTELIC is not set
# CONFIG_MOUSE_PS2_TOUCHKIT is not set
CONFIG_MOUSE_PS2_FOCALTECH=y
# CONFIG_MOUSE_SERIAL is not set
# CONFIG_MOUSE_APPLETOUCH is not set
# CONFIG_MOUSE_BCM5974 is not set
# CONFIG_MOUSE_CYAPA is not set
# CONFIG_MOUSE_ELAN_I2C is not set
# CONFIG_MOUSE_VSXXXAA is not set
# CONFIG_MOUSE_SYNAPTICS_I2C is not set
# CONFIG_MOUSE_SYNAPTICS_USB is not set
# CONFIG_INPUT_JOYSTICK is not set
# CONFIG_INPUT_TABLET is not set
# CONFIG_INPUT_TOUCHSCREEN is not set
# CONFIG_INPUT_MISC is not set
# CONFIG_RMI4_CORE is not set
#
# Hardware I/O ports
#
CONFIG_SERIO=y
CONFIG_SERIO_SERPORT=y
# CONFIG_SERIO_PCIPS2 is not set
CONFIG_SERIO_LIBPS2=y
# CONFIG_SERIO_RAW is not set
# CONFIG_SERIO_ALTERA_PS2 is not set
# CONFIG_SERIO_PS2MULT is not set
# CONFIG_SERIO_ARC_PS2 is not set
# CONFIG_USERIO is not set
# CONFIG_GAMEPORT is not set
#
# Character devices
#
CONFIG_TTY=y
CONFIG_VT=y
CONFIG_CONSOLE_TRANSLATIONS=y
CONFIG_VT_CONSOLE=y
CONFIG_HW_CONSOLE=y
CONFIG_VT_HW_CONSOLE_BINDING=y
CONFIG_UNIX98_PTYS=y
# CONFIG_LEGACY_PTYS is not set
# CONFIG_SERIAL_NONSTANDARD is not set
# CONFIG_NOZOMI is not set
# CONFIG_N_GSM is not set
# CONFIG_TRACE_SINK is not set
CONFIG_DEVMEM=y
# CONFIG_DEVKMEM is not set
#
# Serial drivers
#
# CONFIG_SERIAL_8250 is not set
#
# Non-8250 serial port support
#
# CONFIG_SERIAL_UARTLITE is not set
CONFIG_SERIAL_SH_SCI=y
CONFIG_SERIAL_SH_SCI_NR_UARTS=6
CONFIG_SERIAL_SH_SCI_CONSOLE=y
# CONFIG_SERIAL_SH_SCI_EARLYCON is not set
CONFIG_SERIAL_CORE=y
CONFIG_SERIAL_CORE_CONSOLE=y
# CONFIG_SERIAL_JSM is not set
# CONFIG_SERIAL_SCCNXP is not set
# CONFIG_SERIAL_SC16IS7XX is not set
# CONFIG_SERIAL_ALTERA_JTAGUART is not set
# CONFIG_SERIAL_ALTERA_UART is not set
# CONFIG_SERIAL_ARC is not set
# CONFIG_SERIAL_RP2 is not set
# CONFIG_SERIAL_FSL_LPUART is not set
# CONFIG_TTY_PRINTK is not set
# CONFIG_IPMI_HANDLER is not set
# CONFIG_HW_RANDOM is not set
# CONFIG_R3964 is not set
# CONFIG_APPLICOM is not set
# CONFIG_RAW_DRIVER is not set
# CONFIG_TCG_TPM is not set
CONFIG_DEVPORT=y
# CONFIG_XILLYBUS is not set
#
# I2C support
#
CONFIG_I2C=y
CONFIG_I2C_BOARDINFO=y
CONFIG_I2C_COMPAT=y
# CONFIG_I2C_CHARDEV is not set
# CONFIG_I2C_MUX is not set
CONFIG_I2C_HELPER_AUTO=y
CONFIG_I2C_ALGOPCA=y
#
# I2C Hardware Bus support
#
#
# PC SMBus host controller drivers
#
# CONFIG_I2C_ALI1535 is not set
# CONFIG_I2C_ALI1563 is not set
# CONFIG_I2C_ALI15X3 is not set
# CONFIG_I2C_AMD756 is not set
# CONFIG_I2C_AMD8111 is not set
# CONFIG_I2C_I801 is not set
# CONFIG_I2C_ISCH is not set
# CONFIG_I2C_PIIX4 is not set
# CONFIG_I2C_NFORCE2 is not set
# CONFIG_I2C_SIS5595 is not set
# CONFIG_I2C_SIS630 is not set
# CONFIG_I2C_SIS96X is not set
# CONFIG_I2C_VIA is not set
# CONFIG_I2C_VIAPRO is not set
#
# I2C system bus drivers (mostly embedded / system-on-chip)
#
# CONFIG_I2C_DESIGNWARE_PLATFORM is not set
# CONFIG_I2C_DESIGNWARE_PCI is not set
# CONFIG_I2C_EMEV2 is not set
# CONFIG_I2C_OCORES is not set
CONFIG_I2C_PCA_PLATFORM=y
# CONFIG_I2C_PXA_PCI is not set
# CONFIG_I2C_SH_MOBILE is not set
# CONFIG_I2C_SIMTEC is not set
# CONFIG_I2C_XILINX is not set
#
# External I2C/SMBus adapter drivers
#
# CONFIG_I2C_DIOLAN_U2C is not set
# CONFIG_I2C_PARPORT_LIGHT is not set
# CONFIG_I2C_ROBOTFUZZ_OSIF is not set
# CONFIG_I2C_TAOS_EVM is not set
# CONFIG_I2C_TINY_USB is not set
#
# Other I2C/SMBus bus drivers
#
# CONFIG_I2C_STUB is not set
# CONFIG_I2C_SLAVE is not set
# CONFIG_I2C_DEBUG_CORE is not set
# CONFIG_I2C_DEBUG_ALGO is not set
# CONFIG_I2C_DEBUG_BUS is not set
# CONFIG_SPI is not set
# CONFIG_SPMI is not set
# CONFIG_HSI is not set
#
# PPS support
#
# CONFIG_PPS is not set
#
# PPS generators support
#
#
# PTP clock support
#
# CONFIG_PTP_1588_CLOCK is not set
#
# Enable PHYLIB and NETWORK_PHY_TIMESTAMPING to see the additional clocks.
#
CONFIG_ARCH_HAVE_CUSTOM_GPIO_H=y
# CONFIG_GPIOLIB is not set
# CONFIG_W1 is not set
# CONFIG_POWER_SUPPLY is not set
# CONFIG_POWER_RESET is not set
# CONFIG_POWER_AVS is not set
# CONFIG_HWMON is not set
# CONFIG_THERMAL is not set
CONFIG_WATCHDOG=y
CONFIG_WATCHDOG_CORE=y
# CONFIG_WATCHDOG_NOWAYOUT is not set
# CONFIG_WATCHDOG_SYSFS is not set
#
# Watchdog Device Drivers
#
# CONFIG_SOFT_WATCHDOG is not set
# CONFIG_XILINX_WATCHDOG is not set
# CONFIG_ZIIRAVE_WATCHDOG is not set
# CONFIG_CADENCE_WATCHDOG is not set
# CONFIG_DW_WATCHDOG is not set
# CONFIG_MAX63XX_WATCHDOG is not set
# CONFIG_ALIM7101_WDT is not set
# CONFIG_I6300ESB_WDT is not set
CONFIG_SH_WDT=y
#
# PCI-based Watchdog Cards
#
# CONFIG_PCIPCWATCHDOG is not set
# CONFIG_WDTPCI is not set
#
# USB-based Watchdog Cards
#
# CONFIG_USBPCWATCHDOG is not set
CONFIG_SSB_POSSIBLE=y
#
# Sonics Silicon Backplane
#
# CONFIG_SSB is not set
CONFIG_BCMA_POSSIBLE=y
#
# Broadcom specific AMBA
#
# CONFIG_BCMA is not set
#
# Multifunction device drivers
#
# CONFIG_MFD_CORE is not set
# CONFIG_MFD_AS3711 is not set
# CONFIG_PMIC_ADP5520 is not set
# CONFIG_MFD_BCM590XX is not set
# CONFIG_MFD_AXP20X_I2C is not set
# CONFIG_PMIC_DA903X is not set
# CONFIG_MFD_DA9052_I2C is not set
# CONFIG_MFD_DA9055 is not set
# CONFIG_MFD_DA9062 is not set
# CONFIG_MFD_DA9063 is not set
# CONFIG_MFD_DA9150 is not set
# CONFIG_MFD_DLN2 is not set
# CONFIG_MFD_MC13XXX_I2C is not set
# CONFIG_HTC_PASIC3 is not set
# CONFIG_LPC_ICH is not set
# CONFIG_LPC_SCH is not set
# CONFIG_MFD_JANZ_CMODIO is not set
# CONFIG_MFD_KEMPLD is not set
# CONFIG_MFD_88PM800 is not set
# CONFIG_MFD_88PM805 is not set
# CONFIG_MFD_88PM860X is not set
# CONFIG_MFD_MAX14577 is not set
# CONFIG_MFD_MAX77693 is not set
# CONFIG_MFD_MAX77843 is not set
# CONFIG_MFD_MAX8907 is not set
# CONFIG_MFD_MAX8925 is not set
# CONFIG_MFD_MAX8997 is not set
# CONFIG_MFD_MAX8998 is not set
# CONFIG_MFD_MT6397 is not set
# CONFIG_MFD_MENF21BMC is not set
# CONFIG_MFD_VIPERBOARD is not set
# CONFIG_MFD_RETU is not set
# CONFIG_MFD_PCF50633 is not set
# CONFIG_MFD_RDC321X is not set
# CONFIG_MFD_RTSX_PCI is not set
# CONFIG_MFD_RT5033 is not set
# CONFIG_MFD_RTSX_USB is not set
# CONFIG_MFD_RC5T583 is not set
# CONFIG_MFD_SEC_CORE is not set
# CONFIG_MFD_SI476X_CORE is not set
# CONFIG_MFD_SM501 is not set
# CONFIG_MFD_SKY81452 is not set
# CONFIG_MFD_SMSC is not set
# CONFIG_ABX500_CORE is not set
# CONFIG_MFD_SYSCON is not set
# CONFIG_MFD_TI_AM335X_TSCADC is not set
# CONFIG_MFD_LP3943 is not set
# CONFIG_MFD_LP8788 is not set
# CONFIG_MFD_PALMAS is not set
# CONFIG_TPS6105X is not set
# CONFIG_TPS6507X is not set
# CONFIG_MFD_TPS65086 is not set
# CONFIG_MFD_TPS65090 is not set
# CONFIG_MFD_TPS65217 is not set
# CONFIG_MFD_TPS65218 is not set
# CONFIG_MFD_TPS6586X is not set
# CONFIG_MFD_TPS65912_I2C is not set
# CONFIG_MFD_TPS80031 is not set
# CONFIG_TWL4030_CORE is not set
# CONFIG_TWL6040_CORE is not set
# CONFIG_MFD_WL1273_CORE is not set
# CONFIG_MFD_LM3533 is not set
# CONFIG_MFD_TMIO is not set
# CONFIG_MFD_VX855 is not set
# CONFIG_MFD_ARIZONA_I2C is not set
# CONFIG_MFD_WM8400 is not set
# CONFIG_MFD_WM831X_I2C is not set
# CONFIG_MFD_WM8350_I2C is not set
# CONFIG_MFD_WM8994 is not set
# CONFIG_REGULATOR is not set
# CONFIG_MEDIA_SUPPORT is not set
#
# Graphics support
#
# CONFIG_VGA_ARB is not set
# CONFIG_DRM is not set
#
# ACP (Audio CoProcessor) Configuration
#
#
# Frame buffer Devices
#
# CONFIG_FB is not set
# CONFIG_FB_SH_MOBILE_MERAM is not set
# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
# CONFIG_VGASTATE is not set
#
# Console display driver support
#
CONFIG_DUMMY_CONSOLE=y
CONFIG_DUMMY_CONSOLE_COLUMNS=80
CONFIG_DUMMY_CONSOLE_ROWS=25
# CONFIG_SOUND is not set
#
# HID support
#
CONFIG_HID=y
# CONFIG_HID_BATTERY_STRENGTH is not set
# CONFIG_HIDRAW is not set
# CONFIG_UHID is not set
CONFIG_HID_GENERIC=y
#
# Special HID drivers
#
# CONFIG_HID_A4TECH is not set
# CONFIG_HID_ACRUX is not set
# CONFIG_HID_APPLE is not set
# CONFIG_HID_APPLEIR is not set
# CONFIG_HID_AUREAL is not set
# CONFIG_HID_BELKIN is not set
# CONFIG_HID_BETOP_FF is not set
# CONFIG_HID_CHERRY is not set
# CONFIG_HID_CHICONY is not set
# CONFIG_HID_CMEDIA is not set
# CONFIG_HID_CYPRESS is not set
# CONFIG_HID_DRAGONRISE is not set
# CONFIG_HID_EMS_FF is not set
# CONFIG_HID_ELECOM is not set
# CONFIG_HID_ELO is not set
# CONFIG_HID_EZKEY is not set
# CONFIG_HID_GEMBIRD is not set
# CONFIG_HID_GFRM is not set
# CONFIG_HID_HOLTEK is not set
# CONFIG_HID_KEYTOUCH is not set
# CONFIG_HID_KYE is not set
# CONFIG_HID_UCLOGIC is not set
# CONFIG_HID_WALTOP is not set
# CONFIG_HID_GYRATION is not set
# CONFIG_HID_ICADE is not set
# CONFIG_HID_TWINHAN is not set
# CONFIG_HID_KENSINGTON is not set
# CONFIG_HID_LCPOWER is not set
# CONFIG_HID_LENOVO is not set
# CONFIG_HID_LOGITECH is not set
# CONFIG_HID_MAGICMOUSE is not set
# CONFIG_HID_MICROSOFT is not set
# CONFIG_HID_MONTEREY is not set
# CONFIG_HID_MULTITOUCH is not set
# CONFIG_HID_NTRIG is not set
# CONFIG_HID_ORTEK is not set
# CONFIG_HID_PANTHERLORD is not set
# CONFIG_HID_PENMOUNT is not set
# CONFIG_HID_PETALYNX is not set
# CONFIG_HID_PICOLCD is not set
# CONFIG_HID_PLANTRONICS is not set
# CONFIG_HID_PRIMAX is not set
# CONFIG_HID_ROCCAT is not set
# CONFIG_HID_SAITEK is not set
# CONFIG_HID_SAMSUNG is not set
# CONFIG_HID_SPEEDLINK is not set
# CONFIG_HID_STEELSERIES is not set
# CONFIG_HID_SUNPLUS is not set
# CONFIG_HID_RMI is not set
# CONFIG_HID_GREENASIA is not set
# CONFIG_HID_SMARTJOYPLUS is not set
# CONFIG_HID_TIVO is not set
# CONFIG_HID_TOPSEED is not set
# CONFIG_HID_THRUSTMASTER is not set
# CONFIG_HID_WACOM is not set
# CONFIG_HID_XINMO is not set
# CONFIG_HID_ZEROPLUS is not set
# CONFIG_HID_ZYDACRON is not set
# CONFIG_HID_SENSOR_HUB is not set
# CONFIG_HID_ALPS is not set
#
# USB HID support
#
CONFIG_USB_HID=y
# CONFIG_HID_PID is not set
# CONFIG_USB_HIDDEV is not set
#
# I2C HID support
#
# CONFIG_I2C_HID is not set
CONFIG_USB_OHCI_LITTLE_ENDIAN=y
CONFIG_USB_SUPPORT=y
CONFIG_USB_COMMON=y
CONFIG_USB_ARCH_HAS_HCD=y
CONFIG_USB=y
# CONFIG_USB_ANNOUNCE_NEW_DEVICES is not set
#
# Miscellaneous USB options
#
CONFIG_USB_DEFAULT_PERSIST=y
# CONFIG_USB_DYNAMIC_MINORS is not set
# CONFIG_USB_OTG_WHITELIST is not set
# CONFIG_USB_OTG_BLACKLIST_HUB is not set
# CONFIG_USB_ULPI_BUS is not set
# CONFIG_USB_MON is not set
# CONFIG_USB_WUSB_CBAF is not set
#
# USB Host Controller Drivers
#
# CONFIG_USB_C67X00_HCD is not set
# CONFIG_USB_XHCI_HCD is not set
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_EHCI_ROOT_HUB_TT=y
CONFIG_USB_EHCI_TT_NEWSCHED=y
CONFIG_USB_EHCI_PCI=y
CONFIG_USB_EHCI_SH=y
CONFIG_USB_EHCI_HCD_PLATFORM=y
# CONFIG_USB_OXU210HP_HCD is not set
# CONFIG_USB_ISP116X_HCD is not set
# CONFIG_USB_ISP1362_HCD is not set
# CONFIG_USB_FOTG210_HCD is not set
CONFIG_USB_OHCI_HCD=y
CONFIG_USB_OHCI_HCD_PCI=y
# CONFIG_USB_OHCI_SH is not set
CONFIG_USB_OHCI_HCD_PLATFORM=y
# CONFIG_USB_UHCI_HCD is not set
# CONFIG_USB_SL811_HCD is not set
# CONFIG_USB_R8A66597_HCD is not set
# CONFIG_USB_HCD_TEST_MODE is not set
#
# USB Device Class drivers
#
# CONFIG_USB_ACM is not set
# CONFIG_USB_PRINTER is not set
# CONFIG_USB_WDM is not set
# CONFIG_USB_TMC is not set
#
# NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may
#
#
# also be needed; see USB_STORAGE Help for more info
#
CONFIG_USB_STORAGE=y
# CONFIG_USB_STORAGE_DEBUG is not set
# CONFIG_USB_STORAGE_REALTEK is not set
# CONFIG_USB_STORAGE_DATAFAB is not set
# CONFIG_USB_STORAGE_FREECOM is not set
# CONFIG_USB_STORAGE_ISD200 is not set
# CONFIG_USB_STORAGE_USBAT is not set
# CONFIG_USB_STORAGE_SDDR09 is not set
# CONFIG_USB_STORAGE_SDDR55 is not set
# CONFIG_USB_STORAGE_JUMPSHOT is not set
# CONFIG_USB_STORAGE_ALAUDA is not set
# CONFIG_USB_STORAGE_ONETOUCH is not set
# CONFIG_USB_STORAGE_KARMA is not set
# CONFIG_USB_STORAGE_CYPRESS_ATACB is not set
# CONFIG_USB_STORAGE_ENE_UB6250 is not set
# CONFIG_USB_UAS is not set
#
# USB Imaging devices
#
# CONFIG_USB_MDC800 is not set
# CONFIG_USB_MICROTEK is not set
# CONFIG_USBIP_CORE is not set
# CONFIG_USB_MUSB_HDRC is not set
# CONFIG_USB_DWC3 is not set
# CONFIG_USB_DWC2 is not set
# CONFIG_USB_CHIPIDEA is not set
# CONFIG_USB_ISP1760 is not set
#
# USB port drivers
#
# CONFIG_USB_SERIAL is not set
#
# USB Miscellaneous drivers
#
# CONFIG_USB_EMI62 is not set
# CONFIG_USB_EMI26 is not set
# CONFIG_USB_ADUTUX is not set
# CONFIG_USB_SEVSEG is not set
# CONFIG_USB_RIO500 is not set
# CONFIG_USB_LEGOTOWER is not set
# CONFIG_USB_LCD is not set
# CONFIG_USB_CYPRESS_CY7C63 is not set
# CONFIG_USB_CYTHERM is not set
# CONFIG_USB_IDMOUSE is not set
# CONFIG_USB_FTDI_ELAN is not set
# CONFIG_USB_APPLEDISPLAY is not set
# CONFIG_USB_SISUSBVGA is not set
# CONFIG_USB_LD is not set
# CONFIG_USB_TRANCEVIBRATOR is not set
# CONFIG_USB_IOWARRIOR is not set
# CONFIG_USB_TEST is not set
# CONFIG_USB_EHSET_TEST_FIXTURE is not set
# CONFIG_USB_ISIGHTFW is not set
# CONFIG_USB_YUREX is not set
# CONFIG_USB_EZUSB_FX2 is not set
# CONFIG_USB_HSIC_USB3503 is not set
# CONFIG_USB_LINK_LAYER_TEST is not set
#
# USB Physical Layer drivers
#
# CONFIG_USB_PHY is not set
# CONFIG_NOP_USB_XCEIV is not set
# CONFIG_USB_ISP1301 is not set
# CONFIG_USB_GADGET is not set
# CONFIG_UWB is not set
# CONFIG_MMC is not set
# CONFIG_MEMSTICK is not set
# CONFIG_NEW_LEDS is not set
# CONFIG_ACCESSIBILITY is not set
# CONFIG_INFINIBAND is not set
CONFIG_RTC_LIB=y
CONFIG_RTC_CLASS=y
CONFIG_RTC_HCTOSYS=y
CONFIG_RTC_HCTOSYS_DEVICE="rtc0"
CONFIG_RTC_SYSTOHC=y
CONFIG_RTC_SYSTOHC_DEVICE="rtc0"
# CONFIG_RTC_DEBUG is not set
#
# RTC interfaces
#
CONFIG_RTC_INTF_SYSFS=y
CONFIG_RTC_INTF_PROC=y
CONFIG_RTC_INTF_DEV=y
# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set
# CONFIG_RTC_DRV_TEST is not set
#
# I2C RTC drivers
#
# CONFIG_RTC_DRV_ABB5ZES3 is not set
# CONFIG_RTC_DRV_ABX80X is not set
# CONFIG_RTC_DRV_DS1307 is not set
# CONFIG_RTC_DRV_DS1374 is not set
# CONFIG_RTC_DRV_DS1672 is not set
# CONFIG_RTC_DRV_MAX6900 is not set
# CONFIG_RTC_DRV_RS5C372 is not set
# CONFIG_RTC_DRV_ISL1208 is not set
# CONFIG_RTC_DRV_ISL12022 is not set
# CONFIG_RTC_DRV_ISL12057 is not set
# CONFIG_RTC_DRV_X1205 is not set
# CONFIG_RTC_DRV_PCF8523 is not set
# CONFIG_RTC_DRV_PCF85063 is not set
# CONFIG_RTC_DRV_PCF8563 is not set
# CONFIG_RTC_DRV_PCF8583 is not set
# CONFIG_RTC_DRV_M41T80 is not set
# CONFIG_RTC_DRV_BQ32K is not set
# CONFIG_RTC_DRV_S35390A is not set
# CONFIG_RTC_DRV_FM3130 is not set
# CONFIG_RTC_DRV_RX8010 is not set
# CONFIG_RTC_DRV_RX8581 is not set
# CONFIG_RTC_DRV_RX8025 is not set
# CONFIG_RTC_DRV_EM3027 is not set
# CONFIG_RTC_DRV_RV8803 is not set
#
# SPI RTC drivers
#
CONFIG_RTC_I2C_AND_SPI=y
#
# SPI and I2C RTC drivers
#
# CONFIG_RTC_DRV_DS3232 is not set
# CONFIG_RTC_DRV_PCF2127 is not set
# CONFIG_RTC_DRV_RV3029C2 is not set
#
# Platform RTC drivers
#
# CONFIG_RTC_DRV_DS1286 is not set
# CONFIG_RTC_DRV_DS1511 is not set
# CONFIG_RTC_DRV_DS1553 is not set
# CONFIG_RTC_DRV_DS1685_FAMILY is not set
# CONFIG_RTC_DRV_DS1742 is not set
# CONFIG_RTC_DRV_DS2404 is not set
# CONFIG_RTC_DRV_STK17TA8 is not set
# CONFIG_RTC_DRV_M48T86 is not set
# CONFIG_RTC_DRV_M48T35 is not set
# CONFIG_RTC_DRV_M48T59 is not set
# CONFIG_RTC_DRV_MSM6242 is not set
# CONFIG_RTC_DRV_BQ4802 is not set
# CONFIG_RTC_DRV_RP5C01 is not set
# CONFIG_RTC_DRV_V3020 is not set
#
# on-CPU RTC drivers
#
CONFIG_RTC_DRV_SH=y
CONFIG_RTC_DRV_RS5C313=y
CONFIG_RTC_DRV_GENERIC=y
#
# HID Sensor RTC drivers
#
# CONFIG_RTC_DRV_HID_SENSOR_TIME is not set
CONFIG_DMADEVICES=y
# CONFIG_DMADEVICES_DEBUG is not set
#
# DMA Devices
#
# CONFIG_INTEL_IDMA64 is not set
# CONFIG_QCOM_HIDMA_MGMT is not set
# CONFIG_QCOM_HIDMA is not set
# CONFIG_DW_DMAC is not set
# CONFIG_DW_DMAC_PCI is not set
#
# DMABUF options
#
# CONFIG_SYNC_FILE is not set
# CONFIG_AUXDISPLAY is not set
# CONFIG_UIO is not set
# CONFIG_VIRT_DRIVERS is not set
#
# Virtio drivers
#
# CONFIG_VIRTIO_PCI is not set
# CONFIG_VIRTIO_MMIO is not set
#
# Microsoft Hyper-V guest support
#
# CONFIG_STAGING is not set
CONFIG_CLKDEV_LOOKUP=y
#
# Hardware Spinlock drivers
#
#
# Clock Source drivers
#
# CONFIG_ARM_TIMER_SP804 is not set
# CONFIG_ATMEL_PIT is not set
CONFIG_SYS_SUPPORTS_SH_TMU=y
# CONFIG_SH_TIMER_CMT is not set
# CONFIG_SH_TIMER_MTU2 is not set
CONFIG_SH_TIMER_TMU=y
# CONFIG_EM_TIMER_STI is not set
# CONFIG_MAILBOX is not set
# CONFIG_IOMMU_SUPPORT is not set
#
# Remoteproc drivers
#
# CONFIG_STE_MODEM_RPROC is not set
#
# Rpmsg drivers
#
#
# SOC (System On Chip) specific Drivers
#
#
# Broadcom SoC drivers
#
# CONFIG_SUNXI_SRAM is not set
# CONFIG_SOC_TI is not set
# CONFIG_PM_DEVFREQ is not set
# CONFIG_EXTCON is not set
# CONFIG_MEMORY is not set
# CONFIG_IIO is not set
# CONFIG_NTB is not set
# CONFIG_VME_BUS is not set
# CONFIG_PWM is not set
CONFIG_ARM_GIC_MAX_NR=1
# CONFIG_IPACK_BUS is not set
# CONFIG_RESET_CONTROLLER is not set
# CONFIG_FMC is not set
#
# PHY Subsystem
#
# CONFIG_GENERIC_PHY is not set
# CONFIG_PHY_PXA_28NM_HSIC is not set
# CONFIG_PHY_PXA_28NM_USB2 is not set
# CONFIG_BCM_KONA_USB2_PHY is not set
# CONFIG_POWERCAP is not set
# CONFIG_MCB is not set
#
# Performance monitor support
#
# CONFIG_RAS is not set
# CONFIG_THUNDERBOLT is not set
#
# Android
#
# CONFIG_ANDROID is not set
# CONFIG_NVMEM is not set
# CONFIG_STM is not set
# CONFIG_INTEL_TH is not set
#
# FPGA Configuration Support
#
# CONFIG_FPGA is not set
#
# File systems
#
CONFIG_EXT2_FS=y
CONFIG_EXT2_FS_XATTR=y
CONFIG_EXT2_FS_POSIX_ACL=y
CONFIG_EXT2_FS_SECURITY=y
CONFIG_EXT3_FS=y
CONFIG_EXT3_FS_POSIX_ACL=y
CONFIG_EXT3_FS_SECURITY=y
CONFIG_EXT4_FS=y
CONFIG_EXT4_FS_POSIX_ACL=y
CONFIG_EXT4_FS_SECURITY=y
# CONFIG_EXT4_ENCRYPTION is not set
CONFIG_EXT4_DEBUG=y
CONFIG_JBD2=y
# CONFIG_JBD2_DEBUG is not set
CONFIG_FS_MBCACHE=y
# CONFIG_REISERFS_FS is not set
# CONFIG_JFS_FS is not set
# CONFIG_XFS_FS is not set
# CONFIG_GFS2_FS is not set
# CONFIG_OCFS2_FS is not set
# CONFIG_BTRFS_FS is not set
# CONFIG_NILFS2_FS is not set
# CONFIG_F2FS_FS is not set
# CONFIG_FS_DAX is not set
CONFIG_FS_POSIX_ACL=y
CONFIG_EXPORTFS=y
# CONFIG_EXPORTFS_BLOCK_OPS is not set
CONFIG_FILE_LOCKING=y
CONFIG_MANDATORY_FILE_LOCKING=y
# CONFIG_FS_ENCRYPTION is not set
CONFIG_FSNOTIFY=y
CONFIG_DNOTIFY=y
CONFIG_INOTIFY_USER=y
# CONFIG_FANOTIFY is not set
# CONFIG_QUOTA is not set
# CONFIG_QUOTACTL is not set
# CONFIG_AUTOFS4_FS is not set
# CONFIG_FUSE_FS is not set
# CONFIG_OVERLAY_FS is not set
#
# Caches
#
# CONFIG_FSCACHE is not set
#
# CD-ROM/DVD Filesystems
#
# CONFIG_ISO9660_FS is not set
# CONFIG_UDF_FS is not set
#
# DOS/FAT/NT Filesystems
#
CONFIG_FAT_FS=y
CONFIG_MSDOS_FS=y
CONFIG_VFAT_FS=y
CONFIG_FAT_DEFAULT_CODEPAGE=437
CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1"
# CONFIG_FAT_DEFAULT_UTF8 is not set
CONFIG_NTFS_FS=y
# CONFIG_NTFS_DEBUG is not set
CONFIG_NTFS_RW=y
#
# Pseudo filesystems
#
CONFIG_PROC_FS=y
CONFIG_PROC_KCORE=y
CONFIG_PROC_SYSCTL=y
CONFIG_PROC_PAGE_MONITOR=y
# CONFIG_PROC_CHILDREN is not set
CONFIG_KERNFS=y
CONFIG_SYSFS=y
CONFIG_TMPFS=y
# CONFIG_TMPFS_POSIX_ACL is not set
# CONFIG_TMPFS_XATTR is not set
CONFIG_HUGETLBFS=y
CONFIG_HUGETLB_PAGE=y
CONFIG_CONFIGFS_FS=y
CONFIG_MISC_FILESYSTEMS=y
# CONFIG_ORANGEFS_FS is not set
# CONFIG_ADFS_FS is not set
# CONFIG_AFFS_FS is not set
# CONFIG_ECRYPT_FS is not set
# CONFIG_HFS_FS is not set
# CONFIG_HFSPLUS_FS is not set
# CONFIG_BEFS_FS is not set
# CONFIG_BFS_FS is not set
# CONFIG_EFS_FS is not set
# CONFIG_JFFS2_FS is not set
# CONFIG_LOGFS is not set
# CONFIG_CRAMFS is not set
# CONFIG_SQUASHFS is not set
# CONFIG_VXFS_FS is not set
CONFIG_MINIX_FS=y
CONFIG_MINIX_FS_NATIVE_ENDIAN=y
# CONFIG_OMFS_FS is not set
# CONFIG_HPFS_FS is not set
# CONFIG_QNX4FS_FS is not set
# CONFIG_QNX6FS_FS is not set
# CONFIG_ROMFS_FS is not set
# CONFIG_PSTORE is not set
# CONFIG_SYSV_FS is not set
# CONFIG_UFS_FS is not set
CONFIG_NETWORK_FILESYSTEMS=y
CONFIG_NFS_FS=y
CONFIG_NFS_V2=y
CONFIG_NFS_V3=y
CONFIG_NFS_V3_ACL=y
CONFIG_NFS_V4=y
# CONFIG_NFS_SWAP is not set
CONFIG_NFS_V4_1=y
# CONFIG_NFS_V4_2 is not set
CONFIG_PNFS_FILE_LAYOUT=y
CONFIG_PNFS_FLEXFILE_LAYOUT=m
CONFIG_NFS_V4_1_IMPLEMENTATION_ID_DOMAIN="kernel.org"
# CONFIG_NFS_V4_1_MIGRATION is not set
CONFIG_ROOT_NFS=y
# CONFIG_NFS_USE_LEGACY_DNS is not set
CONFIG_NFS_USE_KERNEL_DNS=y
# CONFIG_NFSD is not set
CONFIG_GRACE_PERIOD=y
CONFIG_LOCKD=y
CONFIG_LOCKD_V4=y
CONFIG_NFS_ACL_SUPPORT=y
CONFIG_NFS_COMMON=y
CONFIG_SUNRPC=y
CONFIG_SUNRPC_GSS=y
CONFIG_SUNRPC_BACKCHANNEL=y
# CONFIG_SUNRPC_DEBUG is not set
# CONFIG_CEPH_FS is not set
# CONFIG_CIFS is not set
# CONFIG_NCP_FS is not set
# CONFIG_CODA_FS is not set
# CONFIG_AFS_FS is not set
CONFIG_NLS=y
CONFIG_NLS_DEFAULT="iso8859-1"
CONFIG_NLS_CODEPAGE_437=y
# CONFIG_NLS_CODEPAGE_737 is not set
# CONFIG_NLS_CODEPAGE_775 is not set
# CONFIG_NLS_CODEPAGE_850 is not set
# CONFIG_NLS_CODEPAGE_852 is not set
# CONFIG_NLS_CODEPAGE_855 is not set
# CONFIG_NLS_CODEPAGE_857 is not set
# CONFIG_NLS_CODEPAGE_860 is not set
# CONFIG_NLS_CODEPAGE_861 is not set
# CONFIG_NLS_CODEPAGE_862 is not set
# CONFIG_NLS_CODEPAGE_863 is not set
# CONFIG_NLS_CODEPAGE_864 is not set
# CONFIG_NLS_CODEPAGE_865 is not set
# CONFIG_NLS_CODEPAGE_866 is not set
# CONFIG_NLS_CODEPAGE_869 is not set
# CONFIG_NLS_CODEPAGE_936 is not set
# CONFIG_NLS_CODEPAGE_950 is not set
CONFIG_NLS_CODEPAGE_932=y
# CONFIG_NLS_CODEPAGE_949 is not set
# CONFIG_NLS_CODEPAGE_874 is not set
# CONFIG_NLS_ISO8859_8 is not set
# CONFIG_NLS_CODEPAGE_1250 is not set
# CONFIG_NLS_CODEPAGE_1251 is not set
# CONFIG_NLS_ASCII is not set
CONFIG_NLS_ISO8859_1=y
# CONFIG_NLS_ISO8859_2 is not set
# CONFIG_NLS_ISO8859_3 is not set
# CONFIG_NLS_ISO8859_4 is not set
# CONFIG_NLS_ISO8859_5 is not set
# CONFIG_NLS_ISO8859_6 is not set
# CONFIG_NLS_ISO8859_7 is not set
# CONFIG_NLS_ISO8859_9 is not set
# CONFIG_NLS_ISO8859_13 is not set
# CONFIG_NLS_ISO8859_14 is not set
# CONFIG_NLS_ISO8859_15 is not set
# CONFIG_NLS_KOI8_R is not set
# CONFIG_NLS_KOI8_U is not set
# CONFIG_NLS_MAC_ROMAN is not set
# CONFIG_NLS_MAC_CELTIC is not set
# CONFIG_NLS_MAC_CENTEURO is not set
# CONFIG_NLS_MAC_CROATIAN is not set
# CONFIG_NLS_MAC_CYRILLIC is not set
# CONFIG_NLS_MAC_GAELIC is not set
# CONFIG_NLS_MAC_GREEK is not set
# CONFIG_NLS_MAC_ICELAND is not set
# CONFIG_NLS_MAC_INUIT is not set
# CONFIG_NLS_MAC_ROMANIAN is not set
# CONFIG_NLS_MAC_TURKISH is not set
# CONFIG_NLS_UTF8 is not set
# CONFIG_DLM is not set
#
# Kernel hacking
#
CONFIG_TRACE_IRQFLAGS_SUPPORT=y
#
# printk and dmesg options
#
CONFIG_PRINTK_TIME=y
CONFIG_MESSAGE_LOGLEVEL_DEFAULT=4
# CONFIG_DYNAMIC_DEBUG is not set
#
# Compile-time checks and compiler options
#
CONFIG_DEBUG_INFO=y
# CONFIG_DEBUG_INFO_REDUCED is not set
# CONFIG_DEBUG_INFO_SPLIT is not set
# CONFIG_DEBUG_INFO_DWARF4 is not set
# CONFIG_GDB_SCRIPTS is not set
CONFIG_ENABLE_WARN_DEPRECATED=y
# CONFIG_ENABLE_MUST_CHECK is not set
CONFIG_FRAME_WARN=1024
# CONFIG_STRIP_ASM_SYMS is not set
# CONFIG_READABLE_ASM is not set
# CONFIG_UNUSED_SYMBOLS is not set
# CONFIG_PAGE_OWNER is not set
CONFIG_DEBUG_FS=y
# CONFIG_HEADERS_CHECK is not set
# CONFIG_DEBUG_SECTION_MISMATCH is not set
CONFIG_SECTION_MISMATCH_WARN_ONLY=y
CONFIG_FRAME_POINTER=y
# CONFIG_DEBUG_FORCE_WEAK_PER_CPU is not set
CONFIG_MAGIC_SYSRQ=y
CONFIG_MAGIC_SYSRQ_DEFAULT_ENABLE=0x1
CONFIG_DEBUG_KERNEL=y
#
# Memory Debugging
#
# CONFIG_PAGE_EXTENSION is not set
# CONFIG_DEBUG_PAGEALLOC is not set
# CONFIG_PAGE_POISONING is not set
# CONFIG_DEBUG_OBJECTS is not set
# CONFIG_DEBUG_SLAB is not set
CONFIG_HAVE_DEBUG_KMEMLEAK=y
CONFIG_DEBUG_KMEMLEAK=y
CONFIG_DEBUG_KMEMLEAK_EARLY_LOG_SIZE=400
# CONFIG_DEBUG_KMEMLEAK_TEST is not set
# CONFIG_DEBUG_KMEMLEAK_DEFAULT_OFF is not set
# CONFIG_DEBUG_STACK_USAGE is not set
# CONFIG_DEBUG_VM is not set
# CONFIG_DEBUG_MEMORY_INIT is not set
# CONFIG_DEBUG_SHIRQ is not set
#
# Debug Lockups and Hangs
#
# CONFIG_LOCKUP_DETECTOR is not set
CONFIG_DETECT_HUNG_TASK=y
CONFIG_DEFAULT_HUNG_TASK_TIMEOUT=120
# CONFIG_BOOTPARAM_HUNG_TASK_PANIC is not set
CONFIG_BOOTPARAM_HUNG_TASK_PANIC_VALUE=0
# CONFIG_WQ_WATCHDOG is not set
# CONFIG_PANIC_ON_OOPS is not set
CONFIG_PANIC_ON_OOPS_VALUE=0
CONFIG_PANIC_TIMEOUT=0
CONFIG_SCHED_DEBUG=y
CONFIG_SCHED_INFO=y
CONFIG_SCHEDSTATS=y
# CONFIG_SCHED_STACK_END_CHECK is not set
# CONFIG_DEBUG_TIMEKEEPING is not set
# CONFIG_TIMER_STATS is not set
CONFIG_DEBUG_PREEMPT=y
#
# Lock Debugging (spinlocks, mutexes, etc...)
#
# CONFIG_DEBUG_RT_MUTEXES is not set
CONFIG_DEBUG_SPINLOCK=y
CONFIG_DEBUG_MUTEXES=y
# CONFIG_DEBUG_WW_MUTEX_SLOWPATH is not set
# CONFIG_DEBUG_LOCK_ALLOC is not set
# CONFIG_PROVE_LOCKING is not set
# CONFIG_LOCK_STAT is not set
# CONFIG_DEBUG_ATOMIC_SLEEP is not set
# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set
# CONFIG_LOCK_TORTURE_TEST is not set
CONFIG_STACKTRACE=y
# CONFIG_DEBUG_KOBJECT is not set
CONFIG_HAVE_DEBUG_BUGVERBOSE=y
CONFIG_DEBUG_BUGVERBOSE=y
# CONFIG_DEBUG_LIST is not set
# CONFIG_DEBUG_PI_LIST is not set
# CONFIG_DEBUG_SG is not set
# CONFIG_DEBUG_NOTIFIERS is not set
# CONFIG_DEBUG_CREDENTIALS is not set
#
# RCU Debugging
#
# CONFIG_PROVE_RCU is not set
# CONFIG_SPARSE_RCU_POINTER is not set
# CONFIG_TORTURE_TEST is not set
# CONFIG_RCU_PERF_TEST is not set
# CONFIG_RCU_TORTURE_TEST is not set
CONFIG_RCU_CPU_STALL_TIMEOUT=21
# CONFIG_RCU_TRACE is not set
# CONFIG_RCU_EQS_DEBUG is not set
# CONFIG_DEBUG_WQ_FORCE_RR_CPU is not set
# CONFIG_DEBUG_BLOCK_EXT_DEVT is not set
# CONFIG_NOTIFIER_ERROR_INJECTION is not set
# CONFIG_FAULT_INJECTION is not set
CONFIG_LATENCYTOP=y
CONFIG_HAVE_FUNCTION_TRACER=y
CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y
CONFIG_HAVE_DYNAMIC_FTRACE=y
CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y
CONFIG_HAVE_SYSCALL_TRACEPOINTS=y
CONFIG_TRACING_SUPPORT=y
# CONFIG_FTRACE is not set
#
# Runtime Testing
#
# CONFIG_LKDTM is not set
# CONFIG_TEST_LIST_SORT is not set
# CONFIG_BACKTRACE_SELF_TEST is not set
# CONFIG_RBTREE_TEST is not set
# CONFIG_INTERVAL_TREE_TEST is not set
# CONFIG_PERCPU_TEST is not set
# CONFIG_ATOMIC64_SELFTEST is not set
# CONFIG_TEST_HEXDUMP is not set
# CONFIG_TEST_STRING_HELPERS is not set
# CONFIG_TEST_KSTRTOX is not set
# CONFIG_TEST_PRINTF is not set
# CONFIG_TEST_BITMAP is not set
# CONFIG_TEST_UUID is not set
# CONFIG_TEST_RHASHTABLE is not set
# CONFIG_TEST_HASH is not set
# CONFIG_DMA_API_DEBUG is not set
# CONFIG_TEST_LKM is not set
# CONFIG_TEST_USER_COPY is not set
# CONFIG_TEST_BPF is not set
# CONFIG_TEST_FIRMWARE is not set
# CONFIG_TEST_UDELAY is not set
# CONFIG_MEMTEST is not set
# CONFIG_TEST_STATIC_KEYS is not set
# CONFIG_SAMPLES is not set
CONFIG_HAVE_ARCH_KGDB=y
# CONFIG_KGDB is not set
# CONFIG_UBSAN is not set
# CONFIG_SH_STANDARD_BIOS is not set
# CONFIG_STACK_DEBUG is not set
# CONFIG_4KSTACKS is not set
CONFIG_DUMP_CODE=y
# CONFIG_DWARF_UNWINDER is not set
# CONFIG_SH_NO_BSS_INIT is not set
#
# Security options
#
CONFIG_KEYS=y
# CONFIG_PERSISTENT_KEYRINGS is not set
# CONFIG_ENCRYPTED_KEYS is not set
# CONFIG_KEY_DH_OPERATIONS is not set
# CONFIG_SECURITY_DMESG_RESTRICT is not set
CONFIG_SECURITY=y
CONFIG_SECURITYFS=y
CONFIG_SECURITY_NETWORK=y
CONFIG_SECURITY_NETWORK_XFRM=y
CONFIG_SECURITY_PATH=y
CONFIG_HAVE_HARDENED_USERCOPY_ALLOCATOR=y
# CONFIG_SECURITY_SELINUX is not set
# CONFIG_SECURITY_SMACK is not set
CONFIG_SECURITY_TOMOYO=y
CONFIG_SECURITY_TOMOYO_MAX_ACCEPT_ENTRY=2048
CONFIG_SECURITY_TOMOYO_MAX_AUDIT_LOG=1024
# CONFIG_SECURITY_TOMOYO_OMIT_USERSPACE_LOADER is not set
CONFIG_SECURITY_TOMOYO_POLICY_LOADER="/sbin/tomoyo-init"
CONFIG_SECURITY_TOMOYO_ACTIVATION_TRIGGER="/sbin/init"
CONFIG_SECURITY_APPARMOR=y
CONFIG_SECURITY_APPARMOR_BOOTPARAM_VALUE=1
CONFIG_SECURITY_APPARMOR_HASH=y
CONFIG_SECURITY_APPARMOR_HASH_DEFAULT=y
# CONFIG_SECURITY_LOADPIN is not set
CONFIG_SECURITY_YAMA=y
CONFIG_INTEGRITY=y
# CONFIG_INTEGRITY_SIGNATURE is not set
CONFIG_INTEGRITY_AUDIT=y
# CONFIG_IMA is not set
# CONFIG_EVM is not set
# CONFIG_DEFAULT_SECURITY_TOMOYO is not set
# CONFIG_DEFAULT_SECURITY_APPARMOR is not set
CONFIG_DEFAULT_SECURITY_DAC=y
CONFIG_DEFAULT_SECURITY=""
CONFIG_CRYPTO=y
#
# Crypto core or helper
#
CONFIG_CRYPTO_ALGAPI=y
CONFIG_CRYPTO_ALGAPI2=y
CONFIG_CRYPTO_AEAD=m
CONFIG_CRYPTO_AEAD2=y
CONFIG_CRYPTO_BLKCIPHER=m
CONFIG_CRYPTO_BLKCIPHER2=y
CONFIG_CRYPTO_HASH=y
CONFIG_CRYPTO_HASH2=y
CONFIG_CRYPTO_RNG=m
CONFIG_CRYPTO_RNG2=y
CONFIG_CRYPTO_RNG_DEFAULT=m
CONFIG_CRYPTO_AKCIPHER2=y
CONFIG_CRYPTO_KPP2=y
# CONFIG_CRYPTO_RSA is not set
# CONFIG_CRYPTO_DH is not set
# CONFIG_CRYPTO_ECDH is not set
CONFIG_CRYPTO_MANAGER=y
CONFIG_CRYPTO_MANAGER2=y
# CONFIG_CRYPTO_USER is not set
CONFIG_CRYPTO_MANAGER_DISABLE_TESTS=y
# CONFIG_CRYPTO_GF128MUL is not set
CONFIG_CRYPTO_NULL=m
CONFIG_CRYPTO_NULL2=y
CONFIG_CRYPTO_WORKQUEUE=y
# CONFIG_CRYPTO_CRYPTD is not set
# CONFIG_CRYPTO_MCRYPTD is not set
# CONFIG_CRYPTO_AUTHENC is not set
# CONFIG_CRYPTO_TEST is not set
#
# Authenticated Encryption with Associated Data
#
# CONFIG_CRYPTO_CCM is not set
# CONFIG_CRYPTO_GCM is not set
# CONFIG_CRYPTO_CHACHA20POLY1305 is not set
# CONFIG_CRYPTO_SEQIV is not set
CONFIG_CRYPTO_ECHAINIV=m
#
# Block modes
#
CONFIG_CRYPTO_CBC=m
# CONFIG_CRYPTO_CTR is not set
# CONFIG_CRYPTO_CTS is not set
CONFIG_CRYPTO_ECB=m
# CONFIG_CRYPTO_LRW is not set
# CONFIG_CRYPTO_PCBC is not set
# CONFIG_CRYPTO_XTS is not set
# CONFIG_CRYPTO_KEYWRAP is not set
#
# Hash modes
#
# CONFIG_CRYPTO_CMAC is not set
CONFIG_CRYPTO_HMAC=y
# CONFIG_CRYPTO_XCBC is not set
# CONFIG_CRYPTO_VMAC is not set
#
# Digest
#
CONFIG_CRYPTO_CRC32C=y
# CONFIG_CRYPTO_CRC32 is not set
# CONFIG_CRYPTO_CRCT10DIF is not set
# CONFIG_CRYPTO_GHASH is not set
# CONFIG_CRYPTO_POLY1305 is not set
# CONFIG_CRYPTO_MD4 is not set
# CONFIG_CRYPTO_MD5 is not set
# CONFIG_CRYPTO_MICHAEL_MIC is not set
# CONFIG_CRYPTO_RMD128 is not set
# CONFIG_CRYPTO_RMD160 is not set
# CONFIG_CRYPTO_RMD256 is not set
# CONFIG_CRYPTO_RMD320 is not set
CONFIG_CRYPTO_SHA1=y
CONFIG_CRYPTO_SHA256=m
# CONFIG_CRYPTO_SHA512 is not set
# CONFIG_CRYPTO_SHA3 is not set
# CONFIG_CRYPTO_TGR192 is not set
# CONFIG_CRYPTO_WP512 is not set
#
# Ciphers
#
CONFIG_CRYPTO_AES=y
# CONFIG_CRYPTO_ANUBIS is not set
CONFIG_CRYPTO_ARC4=m
# CONFIG_CRYPTO_BLOWFISH is not set
# CONFIG_CRYPTO_CAMELLIA is not set
# CONFIG_CRYPTO_CAST5 is not set
# CONFIG_CRYPTO_CAST6 is not set
# CONFIG_CRYPTO_DES is not set
# CONFIG_CRYPTO_FCRYPT is not set
# CONFIG_CRYPTO_KHAZAD is not set
# CONFIG_CRYPTO_SALSA20 is not set
# CONFIG_CRYPTO_CHACHA20 is not set
# CONFIG_CRYPTO_SEED is not set
# CONFIG_CRYPTO_SERPENT is not set
# CONFIG_CRYPTO_TEA is not set
# CONFIG_CRYPTO_TWOFISH is not set
#
# Compression
#
# CONFIG_CRYPTO_DEFLATE is not set
CONFIG_CRYPTO_LZO=y
# CONFIG_CRYPTO_842 is not set
# CONFIG_CRYPTO_LZ4 is not set
# CONFIG_CRYPTO_LZ4HC is not set
#
# Random Number Generation
#
# CONFIG_CRYPTO_ANSI_CPRNG is not set
CONFIG_CRYPTO_DRBG_MENU=m
CONFIG_CRYPTO_DRBG_HMAC=y
# CONFIG_CRYPTO_DRBG_HASH is not set
CONFIG_CRYPTO_DRBG=m
CONFIG_CRYPTO_JITTERENTROPY=m
CONFIG_CRYPTO_USER_API=m
CONFIG_CRYPTO_USER_API_HASH=m
CONFIG_CRYPTO_USER_API_SKCIPHER=m
# CONFIG_CRYPTO_USER_API_RNG is not set
# CONFIG_CRYPTO_USER_API_AEAD is not set
# CONFIG_CRYPTO_HW is not set
# CONFIG_ASYMMETRIC_KEY_TYPE is not set
#
# Certificates for signature checking
#
# CONFIG_BINARY_PRINTF is not set
#
# Library routines
#
CONFIG_BITREVERSE=y
# CONFIG_HAVE_ARCH_BITREVERSE is not set
CONFIG_GENERIC_STRNCPY_FROM_USER=y
CONFIG_GENERIC_STRNLEN_USER=y
CONFIG_GENERIC_NET_UTILS=y
CONFIG_NO_GENERIC_PCI_IOPORT_MAP=y
CONFIG_GENERIC_PCI_IOMAP=y
CONFIG_GENERIC_IO=y
CONFIG_CRC_CCITT=m
CONFIG_CRC16=y
# CONFIG_CRC_T10DIF is not set
# CONFIG_CRC_ITU_T is not set
CONFIG_CRC32=y
# CONFIG_CRC32_SELFTEST is not set
CONFIG_CRC32_SLICEBY8=y
# CONFIG_CRC32_SLICEBY4 is not set
# CONFIG_CRC32_SARWATE is not set
# CONFIG_CRC32_BIT is not set
# CONFIG_CRC7 is not set
# CONFIG_LIBCRC32C is not set
# CONFIG_CRC8 is not set
CONFIG_AUDIT_GENERIC=y
# CONFIG_AUDIT_ARCH_COMPAT_GENERIC is not set
# CONFIG_RANDOM32_SELFTEST is not set
CONFIG_ZLIB_INFLATE=m
CONFIG_ZLIB_DEFLATE=m
CONFIG_LZO_COMPRESS=y
CONFIG_LZO_DECOMPRESS=y
# CONFIG_XZ_DEC is not set
# CONFIG_XZ_DEC_BCJ is not set
CONFIG_ASSOCIATIVE_ARRAY=y
CONFIG_HAS_IOMEM=y
CONFIG_HAS_IOPORT_MAP=y
CONFIG_HAS_DMA=y
CONFIG_DQL=y
CONFIG_NLATTR=y
CONFIG_GENERIC_ATOMIC64=y
CONFIG_ARCH_HAS_ATOMIC64_DEC_IF_POSITIVE=y
# CONFIG_CORDIC is not set
# CONFIG_DDR is not set
# CONFIG_IRQ_POLL is not set
CONFIG_OID_REGISTRY=y
# CONFIG_SG_SPLIT is not set
CONFIG_SG_POOL=y
# CONFIG_ARCH_HAS_SG_CHAIN is not set
^ permalink raw reply [flat|nested] 138+ messages in thread
* Re: [J-core] [PATCH v5 00/22] sh: LANDISK and R2Dplus convert to device tree
@ 2018-05-03 10:07 ` John Paul Adrian Glaubitz
0 siblings, 0 replies; 138+ messages in thread
From: John Paul Adrian Glaubitz @ 2018-05-03 10:07 UTC (permalink / raw)
To: Rich Felker; +Cc: Rob Landley, Yoshinori Sato, linux-sh, linux-kernel
[-- Attachment #1: Type: text/plain, Size: 1228 bytes --]
Hi Rich!
On 05/03/2018 04:33 AM, Rich Felker wrote:
> I found the U-Boot stuff here:
>
> https://ja.osdn.net/users/ysato/pf/uboot/wiki/FrontPage
>
> but I'm not sure how to install it yet. Will try to figure it out.
Interesting. It seems the HDL-160U uses u-boot instead of lilo which
is used on my USL-5P. Both are based on the LANDISK platform though.
I wonder whether it is possible to convert the USL-5P to use u-boot
instead of the very limited lilo.
As for the kernel configuration, for USL-5P, I had to use the kernel
configuration attached to this mail. One important configuration setting
is CONFIG_SH_PCLK_FREQ which has to be set to "33250000" otherwise
the kernel won't boot properly.
I still have my USL-5P ready to be set up for testing a new kernel
image with the device tree patches merged. Although I still don't
know how to enable the internal (pseudo) IDE controller.
@Yoshinori:
Did the HDL-160U LANDISK device you have use u-boot by default or
did you convert it from lilo?
Adrian
--
.''`. John Paul Adrian Glaubitz
: :' : Debian Developer - glaubitz@debian.org
`. `' Freie Universitaet Berlin - glaubitz@physik.fu-berlin.de
`- GPG: 62FF 8A75 84E0 2956 9546 0006 7426 3B37 F5B5 F913
[-- Attachment #2: config-usl-5p-4.8.12.txt --]
[-- Type: text/plain, Size: 61584 bytes --]
#
# Automatically generated file; DO NOT EDIT.
# Linux/sh 4.8.12 Kernel Configuration
#
CONFIG_SUPERH=y
CONFIG_SUPERH32=y
# CONFIG_SUPERH64 is not set
CONFIG_ARCH_DEFCONFIG="arch/sh/configs/shx3_defconfig"
CONFIG_RWSEM_GENERIC_SPINLOCK=y
CONFIG_GENERIC_BUG=y
CONFIG_GENERIC_HWEIGHT=y
# CONFIG_ARCH_SUSPEND_POSSIBLE is not set
CONFIG_ARCH_HIBERNATION_POSSIBLE=y
CONFIG_SYS_SUPPORTS_HUGETLBFS=y
CONFIG_SYS_SUPPORTS_PCI=y
CONFIG_STACKTRACE_SUPPORT=y
CONFIG_LOCKDEP_SUPPORT=y
# CONFIG_ARCH_HAS_ILOG2_U32 is not set
# CONFIG_ARCH_HAS_ILOG2_U64 is not set
# CONFIG_NO_IOPORT_MAP is not set
CONFIG_DMA_NONCOHERENT=y
CONFIG_NEED_DMA_MAP_STATE=y
CONFIG_NEED_SG_DMA_LENGTH=y
CONFIG_PGTABLE_LEVELS=2
CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
CONFIG_CONSTRUCTORS=y
CONFIG_IRQ_WORK=y
#
# General setup
#
CONFIG_BROKEN_ON_SMP=y
CONFIG_INIT_ENV_ARG_LIMIT=32
CONFIG_CROSS_COMPILE=""
# CONFIG_COMPILE_TEST is not set
CONFIG_LOCALVERSION=""
CONFIG_LOCALVERSION_AUTO=y
CONFIG_HAVE_KERNEL_GZIP=y
CONFIG_HAVE_KERNEL_BZIP2=y
CONFIG_HAVE_KERNEL_LZMA=y
CONFIG_HAVE_KERNEL_XZ=y
CONFIG_HAVE_KERNEL_LZO=y
CONFIG_KERNEL_GZIP=y
# CONFIG_KERNEL_BZIP2 is not set
# CONFIG_KERNEL_LZMA is not set
# CONFIG_KERNEL_XZ is not set
# CONFIG_KERNEL_LZO is not set
CONFIG_DEFAULT_HOSTNAME="(none)"
CONFIG_SWAP=y
CONFIG_SYSVIPC=y
CONFIG_SYSVIPC_SYSCTL=y
CONFIG_POSIX_MQUEUE=y
CONFIG_POSIX_MQUEUE_SYSCTL=y
CONFIG_CROSS_MEMORY_ATTACH=y
CONFIG_FHANDLE=y
CONFIG_USELIB=y
CONFIG_AUDIT=y
CONFIG_HAVE_ARCH_AUDITSYSCALL=y
CONFIG_AUDITSYSCALL=y
CONFIG_AUDIT_WATCH=y
CONFIG_AUDIT_TREE=y
#
# IRQ subsystem
#
CONFIG_MAY_HAVE_SPARSE_IRQ=y
CONFIG_GENERIC_IRQ_SHOW=y
CONFIG_IRQ_DOMAIN=y
# CONFIG_IRQ_DOMAIN_DEBUG is not set
CONFIG_IRQ_FORCED_THREADING=y
CONFIG_SPARSE_IRQ=y
CONFIG_GENERIC_CLOCKEVENTS=y
#
# Timers subsystem
#
CONFIG_TICK_ONESHOT=y
CONFIG_NO_HZ_COMMON=y
# CONFIG_HZ_PERIODIC is not set
CONFIG_NO_HZ_IDLE=y
CONFIG_NO_HZ=y
CONFIG_HIGH_RES_TIMERS=y
#
# CPU/Task time and stats accounting
#
CONFIG_TICK_CPU_ACCOUNTING=y
CONFIG_BSD_PROCESS_ACCT=y
# CONFIG_BSD_PROCESS_ACCT_V3 is not set
# CONFIG_TASKSTATS is not set
#
# RCU Subsystem
#
CONFIG_PREEMPT_RCU=y
# CONFIG_RCU_EXPERT is not set
CONFIG_SRCU=y
# CONFIG_TASKS_RCU is not set
CONFIG_RCU_STALL_COMMON=y
# CONFIG_TREE_RCU_TRACE is not set
# CONFIG_RCU_EXPEDITE_BOOT is not set
CONFIG_BUILD_BIN2C=y
CONFIG_IKCONFIG=y
CONFIG_IKCONFIG_PROC=y
CONFIG_LOG_BUF_SHIFT=16
CONFIG_NMI_LOG_BUF_SHIFT=13
CONFIG_GENERIC_SCHED_CLOCK=y
CONFIG_CGROUPS=y
# CONFIG_MEMCG is not set
# CONFIG_BLK_CGROUP is not set
CONFIG_CGROUP_SCHED=y
CONFIG_FAIR_GROUP_SCHED=y
# CONFIG_CFS_BANDWIDTH is not set
# CONFIG_RT_GROUP_SCHED is not set
# CONFIG_CGROUP_PIDS is not set
CONFIG_CGROUP_FREEZER=y
# CONFIG_CGROUP_HUGETLB is not set
CONFIG_CPUSETS=y
CONFIG_PROC_PID_CPUSET=y
CONFIG_CGROUP_DEVICE=y
CONFIG_CGROUP_CPUACCT=y
CONFIG_CGROUP_PERF=y
# CONFIG_CGROUP_DEBUG is not set
# CONFIG_CHECKPOINT_RESTORE is not set
# CONFIG_NAMESPACES is not set
# CONFIG_SCHED_AUTOGROUP is not set
# CONFIG_SYSFS_DEPRECATED is not set
# CONFIG_RELAY is not set
# CONFIG_BLK_DEV_INITRD is not set
CONFIG_CC_OPTIMIZE_FOR_PERFORMANCE=y
# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
CONFIG_SYSCTL=y
CONFIG_ANON_INODES=y
CONFIG_HAVE_UID16=y
CONFIG_BPF=y
CONFIG_EXPERT=y
CONFIG_UID16=y
CONFIG_MULTIUSER=y
CONFIG_SGETMASK_SYSCALL=y
CONFIG_SYSFS_SYSCALL=y
# CONFIG_SYSCTL_SYSCALL is not set
CONFIG_KALLSYMS=y
CONFIG_KALLSYMS_ALL=y
# CONFIG_KALLSYMS_ABSOLUTE_PERCPU is not set
CONFIG_KALLSYMS_BASE_RELATIVE=y
CONFIG_PRINTK=y
CONFIG_PRINTK_NMI=y
CONFIG_BUG=y
CONFIG_ELF_CORE=y
CONFIG_BASE_FULL=y
CONFIG_FUTEX=y
CONFIG_HAVE_FUTEX_CMPXCHG=y
CONFIG_EPOLL=y
CONFIG_SIGNALFD=y
CONFIG_TIMERFD=y
CONFIG_EVENTFD=y
# CONFIG_BPF_SYSCALL is not set
CONFIG_SHMEM=y
CONFIG_AIO=y
CONFIG_ADVISE_SYSCALLS=y
# CONFIG_USERFAULTFD is not set
CONFIG_PCI_QUIRKS=y
CONFIG_MEMBARRIER=y
# CONFIG_EMBEDDED is not set
CONFIG_HAVE_PERF_EVENTS=y
CONFIG_PERF_USE_VMALLOC=y
#
# Kernel Performance Events And Counters
#
CONFIG_PERF_EVENTS=y
# CONFIG_DEBUG_PERF_USE_VMALLOC is not set
CONFIG_VM_EVENT_COUNTERS=y
# CONFIG_COMPAT_BRK is not set
CONFIG_SLAB=y
# CONFIG_SLUB is not set
# CONFIG_SLOB is not set
# CONFIG_SLAB_FREELIST_RANDOM is not set
# CONFIG_SYSTEM_DATA_VERIFICATION is not set
CONFIG_PROFILING=y
# CONFIG_OPROFILE is not set
CONFIG_HAVE_OPROFILE=y
# CONFIG_KPROBES is not set
# CONFIG_UPROBES is not set
# CONFIG_HAVE_64BIT_ALIGNED_ACCESS is not set
CONFIG_HAVE_IOREMAP_PROT=y
CONFIG_HAVE_KPROBES=y
CONFIG_HAVE_KRETPROBES=y
CONFIG_HAVE_NMI=y
CONFIG_HAVE_ARCH_TRACEHOOK=y
CONFIG_GENERIC_SMP_IDLE_THREAD=y
CONFIG_GENERIC_IDLE_POLL_SETUP=y
CONFIG_HAVE_REGS_AND_STACK_ACCESS_API=y
CONFIG_HAVE_CLK=y
CONFIG_HAVE_DMA_API_DEBUG=y
CONFIG_HAVE_HW_BREAKPOINT=y
CONFIG_HAVE_MIXED_BREAKPOINTS_REGS=y
CONFIG_ARCH_WANT_IPC_PARSE_VERSION=y
CONFIG_HAVE_CC_STACKPROTECTOR=y
# CONFIG_CC_STACKPROTECTOR is not set
CONFIG_CC_STACKPROTECTOR_NONE=y
# CONFIG_CC_STACKPROTECTOR_REGULAR is not set
# CONFIG_CC_STACKPROTECTOR_STRONG is not set
CONFIG_MODULES_USE_ELF_RELA=y
# CONFIG_HAVE_ARCH_HASH is not set
# CONFIG_ISA_BUS_API is not set
CONFIG_OLD_SIGSUSPEND=y
CONFIG_OLD_SIGACTION=y
CONFIG_CPU_NO_EFFICIENT_FFS=y
#
# GCOV-based kernel profiling
#
CONFIG_GCOV_KERNEL=y
CONFIG_ARCH_HAS_GCOV_PROFILE_ALL=y
# CONFIG_GCOV_PROFILE_ALL is not set
CONFIG_GCOV_FORMAT_AUTODETECT=y
# CONFIG_GCOV_FORMAT_3_4 is not set
# CONFIG_GCOV_FORMAT_4_7 is not set
CONFIG_HAVE_GENERIC_DMA_COHERENT=y
CONFIG_SLABINFO=y
CONFIG_RT_MUTEXES=y
CONFIG_BASE_SMALL=0
CONFIG_MODULES=y
# CONFIG_MODULE_FORCE_LOAD is not set
CONFIG_MODULE_UNLOAD=y
# CONFIG_MODULE_FORCE_UNLOAD is not set
# CONFIG_MODVERSIONS is not set
# CONFIG_MODULE_SRCVERSION_ALL is not set
# CONFIG_MODULE_SIG is not set
# CONFIG_MODULE_COMPRESS is not set
# CONFIG_TRIM_UNUSED_KSYMS is not set
CONFIG_MODULES_TREE_LOOKUP=y
CONFIG_BLOCK=y
CONFIG_LBDAF=y
CONFIG_BLK_DEV_BSG=y
# CONFIG_BLK_DEV_BSGLIB is not set
# CONFIG_BLK_DEV_INTEGRITY is not set
# CONFIG_BLK_CMDLINE_PARSER is not set
#
# Partition Types
#
CONFIG_PARTITION_ADVANCED=y
# CONFIG_ACORN_PARTITION is not set
# CONFIG_AIX_PARTITION is not set
# CONFIG_OSF_PARTITION is not set
# CONFIG_AMIGA_PARTITION is not set
# CONFIG_ATARI_PARTITION is not set
# CONFIG_MAC_PARTITION is not set
CONFIG_MSDOS_PARTITION=y
# CONFIG_BSD_DISKLABEL is not set
# CONFIG_MINIX_SUBPARTITION is not set
# CONFIG_SOLARIS_X86_PARTITION is not set
# CONFIG_UNIXWARE_DISKLABEL is not set
# CONFIG_LDM_PARTITION is not set
# CONFIG_SGI_PARTITION is not set
# CONFIG_ULTRIX_PARTITION is not set
# CONFIG_SUN_PARTITION is not set
# CONFIG_KARMA_PARTITION is not set
CONFIG_EFI_PARTITION=y
# CONFIG_SYSV68_PARTITION is not set
# CONFIG_CMDLINE_PARTITION is not set
#
# IO Schedulers
#
CONFIG_IOSCHED_NOOP=y
CONFIG_IOSCHED_DEADLINE=y
CONFIG_IOSCHED_CFQ=y
# CONFIG_DEFAULT_DEADLINE is not set
CONFIG_DEFAULT_CFQ=y
# CONFIG_DEFAULT_NOOP is not set
CONFIG_DEFAULT_IOSCHED="cfq"
CONFIG_UNINLINE_SPIN_UNLOCK=y
CONFIG_FREEZER=y
#
# System type
#
CONFIG_CPU_SH4=y
CONFIG_CPU_HAS_PMU=y
# CONFIG_CPU_SUBTYPE_SH7619 is not set
# CONFIG_CPU_SUBTYPE_J2 is not set
# CONFIG_CPU_SUBTYPE_SH7201 is not set
# CONFIG_CPU_SUBTYPE_SH7203 is not set
# CONFIG_CPU_SUBTYPE_SH7206 is not set
# CONFIG_CPU_SUBTYPE_SH7263 is not set
# CONFIG_CPU_SUBTYPE_SH7264 is not set
# CONFIG_CPU_SUBTYPE_SH7269 is not set
# CONFIG_CPU_SUBTYPE_MXG is not set
# CONFIG_CPU_SUBTYPE_SH7705 is not set
# CONFIG_CPU_SUBTYPE_SH7706 is not set
# CONFIG_CPU_SUBTYPE_SH7707 is not set
# CONFIG_CPU_SUBTYPE_SH7708 is not set
# CONFIG_CPU_SUBTYPE_SH7709 is not set
# CONFIG_CPU_SUBTYPE_SH7710 is not set
# CONFIG_CPU_SUBTYPE_SH7712 is not set
# CONFIG_CPU_SUBTYPE_SH7720 is not set
# CONFIG_CPU_SUBTYPE_SH7721 is not set
# CONFIG_CPU_SUBTYPE_SH7750 is not set
# CONFIG_CPU_SUBTYPE_SH7091 is not set
# CONFIG_CPU_SUBTYPE_SH7750R is not set
# CONFIG_CPU_SUBTYPE_SH7750S is not set
# CONFIG_CPU_SUBTYPE_SH7751 is not set
CONFIG_CPU_SUBTYPE_SH7751R=y
# CONFIG_CPU_SUBTYPE_SH7760 is not set
# CONFIG_CPU_SUBTYPE_SH4_202 is not set
# CONFIG_CPU_SUBTYPE_SH7723 is not set
# CONFIG_CPU_SUBTYPE_SH7724 is not set
# CONFIG_CPU_SUBTYPE_SH7734 is not set
# CONFIG_CPU_SUBTYPE_SH7757 is not set
# CONFIG_CPU_SUBTYPE_SH7763 is not set
# CONFIG_CPU_SUBTYPE_SH7770 is not set
# CONFIG_CPU_SUBTYPE_SH7780 is not set
# CONFIG_CPU_SUBTYPE_SH7785 is not set
# CONFIG_CPU_SUBTYPE_SH7786 is not set
# CONFIG_CPU_SUBTYPE_SHX3 is not set
# CONFIG_CPU_SUBTYPE_SH7343 is not set
# CONFIG_CPU_SUBTYPE_SH7722 is not set
# CONFIG_CPU_SUBTYPE_SH7366 is not set
#
# Memory management options
#
CONFIG_QUICKLIST=y
CONFIG_MMU=y
CONFIG_PAGE_OFFSET=0x80000000
CONFIG_FORCE_MAX_ZONEORDER=11
CONFIG_MEMORY_START=0xc000000
CONFIG_MEMORY_SIZE=0x4000000
CONFIG_29BIT=y
CONFIG_VSYSCALL=y
CONFIG_ARCH_FLATMEM_ENABLE=y
CONFIG_ARCH_SPARSEMEM_ENABLE=y
CONFIG_ARCH_SPARSEMEM_DEFAULT=y
CONFIG_ARCH_SELECT_MEMORY_MODEL=y
CONFIG_ARCH_ENABLE_MEMORY_HOTPLUG=y
CONFIG_ARCH_ENABLE_MEMORY_HOTREMOVE=y
CONFIG_UNCACHED_MAPPING=y
CONFIG_PAGE_SIZE_4KB=y
# CONFIG_PAGE_SIZE_64KB is not set
# CONFIG_HUGETLB_PAGE_SIZE_64K is not set
CONFIG_HUGETLB_PAGE_SIZE_1MB=y
CONFIG_SELECT_MEMORY_MODEL=y
# CONFIG_FLATMEM_MANUAL is not set
CONFIG_SPARSEMEM_MANUAL=y
CONFIG_SPARSEMEM=y
CONFIG_HAVE_MEMORY_PRESENT=y
CONFIG_SPARSEMEM_STATIC=y
CONFIG_HAVE_MEMBLOCK=y
CONFIG_HAVE_MEMBLOCK_NODE_MAP=y
CONFIG_ARCH_DISCARD_MEMBLOCK=y
# CONFIG_HAVE_BOOTMEM_INFO_NODE is not set
# CONFIG_MEMORY_HOTPLUG is not set
CONFIG_SPLIT_PTLOCK_CPUS=4
# CONFIG_COMPACTION is not set
CONFIG_MIGRATION=y
# CONFIG_PHYS_ADDR_T_64BIT is not set
CONFIG_NR_QUICK=1
# CONFIG_KSM is not set
CONFIG_DEFAULT_MMAP_MIN_ADDR=4096
CONFIG_NEED_PER_CPU_KM=y
# CONFIG_CLEANCACHE is not set
# CONFIG_FRONTSWAP is not set
# CONFIG_CMA is not set
# CONFIG_ZPOOL is not set
# CONFIG_ZBUD is not set
# CONFIG_ZSMALLOC is not set
# CONFIG_IDLE_PAGE_TRACKING is not set
#
# Cache configuration
#
CONFIG_CACHE_WRITEBACK=y
# CONFIG_CACHE_WRITETHROUGH is not set
# CONFIG_CACHE_OFF is not set
#
# Processor features
#
CONFIG_CPU_LITTLE_ENDIAN=y
# CONFIG_CPU_BIG_ENDIAN is not set
CONFIG_SH_FPU=y
CONFIG_SH_STORE_QUEUES=y
CONFIG_CPU_HAS_INTEVT=y
CONFIG_CPU_HAS_SR_RB=y
CONFIG_CPU_HAS_FPU=y
#
# Board support
#
# CONFIG_SH_DEVICE_TREE is not set
# CONFIG_SH_SECUREEDGE5410 is not set
# CONFIG_SH_RTS7751R2D is not set
CONFIG_SH_LANDISK=y
# CONFIG_SH_TITAN is not set
# CONFIG_SH_LBOX_RE2 is not set
#
# Timer and clock configuration
#
CONFIG_SH_PCLK_FREQ=33250000
CONFIG_SH_CLK_CPG=y
CONFIG_SH_CLK_CPG_LEGACY=y
#
# CPU Frequency scaling
#
#
# CPU Frequency scaling
#
CONFIG_CPU_FREQ=y
CONFIG_CPU_FREQ_GOV_ATTR_SET=y
CONFIG_CPU_FREQ_GOV_COMMON=y
CONFIG_CPU_FREQ_STAT=y
CONFIG_CPU_FREQ_STAT_DETAILS=y
# CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE is not set
# CONFIG_CPU_FREQ_DEFAULT_GOV_POWERSAVE is not set
# CONFIG_CPU_FREQ_DEFAULT_GOV_USERSPACE is not set
CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND=y
# CONFIG_CPU_FREQ_DEFAULT_GOV_CONSERVATIVE is not set
CONFIG_CPU_FREQ_GOV_PERFORMANCE=y
# CONFIG_CPU_FREQ_GOV_POWERSAVE is not set
# CONFIG_CPU_FREQ_GOV_USERSPACE is not set
CONFIG_CPU_FREQ_GOV_ONDEMAND=y
# CONFIG_CPU_FREQ_GOV_CONSERVATIVE is not set
#
# CPU frequency scaling drivers
#
CONFIG_SH_CPU_FREQ=y
#
# DMA support
#
CONFIG_SH_DMA=y
CONFIG_SH_DMA_IRQ_MULTI=y
CONFIG_SH_DMA_API=y
CONFIG_NR_ONCHIP_DMA_CHANNELS=8
#
# Companion Chips
#
#
# Additional SuperH Device Drivers
#
CONFIG_HEARTBEAT=y
CONFIG_PUSH_SWITCH=y
#
# Kernel features
#
# CONFIG_HZ_100 is not set
CONFIG_HZ_250=y
# CONFIG_HZ_300 is not set
# CONFIG_HZ_1000 is not set
CONFIG_HZ=250
CONFIG_SCHED_HRTICK=y
# CONFIG_KEXEC is not set
# CONFIG_CRASH_DUMP is not set
CONFIG_PHYSICAL_START=0xc000000
CONFIG_SECCOMP=y
# CONFIG_PREEMPT_NONE is not set
# CONFIG_PREEMPT_VOLUNTARY is not set
CONFIG_PREEMPT=y
CONFIG_PREEMPT_COUNT=y
CONFIG_GUSA=y
# CONFIG_GUSA_RB is not set
CONFIG_HW_PERF_EVENTS=y
#
# SuperH / SH-Mobile Driver Options
#
CONFIG_SH_INTC=y
#
# Interrupt controller options
#
# CONFIG_INTC_MAPPING_DEBUG is not set
#
# Boot options
#
CONFIG_ZERO_PAGE_OFFSET=0x00001000
CONFIG_BOOT_LINK_OFFSET=0x00800000
CONFIG_ENTRY_OFFSET=0x00001000
#
# Bus options
#
CONFIG_PCI=y
CONFIG_PCI_DOMAINS=y
# CONFIG_PCIEPORTBUS is not set
# CONFIG_PCI_MSI is not set
CONFIG_PCI_DEBUG=y
# CONFIG_PCI_REALLOC_ENABLE_AUTO is not set
# CONFIG_PCI_STUB is not set
# CONFIG_PCI_IOV is not set
# CONFIG_PCI_PRI is not set
# CONFIG_PCI_PASID is not set
# CONFIG_HOTPLUG_PCI is not set
#
# PCI host controller drivers
#
# CONFIG_PCCARD is not set
#
# Executable file formats
#
CONFIG_BINFMT_ELF=y
CONFIG_ELFCORE=y
CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS=y
CONFIG_BINFMT_SCRIPT=y
# CONFIG_HAVE_AOUT is not set
# CONFIG_BINFMT_MISC is not set
CONFIG_COREDUMP=y
#
# Power management options (EXPERIMENTAL)
#
# CONFIG_HIBERNATION is not set
# CONFIG_PM is not set
#
# CPU Idle
#
CONFIG_CPU_IDLE=y
CONFIG_CPU_IDLE_GOV_LADDER=y
CONFIG_CPU_IDLE_GOV_MENU=y
# CONFIG_ARCH_NEEDS_CPU_IDLE_COUPLED is not set
CONFIG_NET=y
#
# Networking options
#
CONFIG_PACKET=y
# CONFIG_PACKET_DIAG is not set
CONFIG_UNIX=y
# CONFIG_UNIX_DIAG is not set
CONFIG_XFRM=y
# CONFIG_XFRM_USER is not set
# CONFIG_XFRM_SUB_POLICY is not set
# CONFIG_XFRM_MIGRATE is not set
# CONFIG_XFRM_STATISTICS is not set
# CONFIG_NET_KEY is not set
CONFIG_INET=y
# CONFIG_IP_MULTICAST is not set
CONFIG_IP_ADVANCED_ROUTER=y
# CONFIG_IP_FIB_TRIE_STATS is not set
# CONFIG_IP_MULTIPLE_TABLES is not set
# CONFIG_IP_ROUTE_MULTIPATH is not set
# CONFIG_IP_ROUTE_VERBOSE is not set
CONFIG_IP_PNP=y
CONFIG_IP_PNP_DHCP=y
CONFIG_IP_PNP_BOOTP=y
# CONFIG_IP_PNP_RARP is not set
CONFIG_NET_IPIP=m
CONFIG_NET_IPGRE_DEMUX=m
CONFIG_NET_IP_TUNNEL=y
CONFIG_NET_IPGRE=m
# CONFIG_SYN_COOKIES is not set
# CONFIG_NET_IPVTI is not set
# CONFIG_NET_UDP_TUNNEL is not set
# CONFIG_NET_FOU is not set
# CONFIG_NET_FOU_IP_TUNNELS is not set
# CONFIG_INET_AH is not set
# CONFIG_INET_ESP is not set
# CONFIG_INET_IPCOMP is not set
# CONFIG_INET_XFRM_TUNNEL is not set
CONFIG_INET_TUNNEL=y
CONFIG_INET_XFRM_MODE_TRANSPORT=y
CONFIG_INET_XFRM_MODE_TUNNEL=y
CONFIG_INET_XFRM_MODE_BEET=y
CONFIG_INET_DIAG=y
CONFIG_INET_TCP_DIAG=y
# CONFIG_INET_UDP_DIAG is not set
# CONFIG_INET_DIAG_DESTROY is not set
# CONFIG_TCP_CONG_ADVANCED is not set
CONFIG_TCP_CONG_CUBIC=y
CONFIG_DEFAULT_TCP_CONG="cubic"
# CONFIG_TCP_MD5SIG is not set
CONFIG_IPV6=y
CONFIG_IPV6_ROUTER_PREF=y
CONFIG_IPV6_ROUTE_INFO=y
CONFIG_IPV6_OPTIMISTIC_DAD=y
# CONFIG_INET6_AH is not set
# CONFIG_INET6_ESP is not set
# CONFIG_INET6_IPCOMP is not set
# CONFIG_IPV6_MIP6 is not set
# CONFIG_INET6_XFRM_TUNNEL is not set
# CONFIG_INET6_TUNNEL is not set
CONFIG_INET6_XFRM_MODE_TRANSPORT=y
CONFIG_INET6_XFRM_MODE_TUNNEL=y
CONFIG_INET6_XFRM_MODE_BEET=y
# CONFIG_INET6_XFRM_MODE_ROUTEOPTIMIZATION is not set
# CONFIG_IPV6_VTI is not set
CONFIG_IPV6_SIT=y
# CONFIG_IPV6_SIT_6RD is not set
CONFIG_IPV6_NDISC_NODETYPE=y
# CONFIG_IPV6_TUNNEL is not set
# CONFIG_IPV6_GRE is not set
# CONFIG_IPV6_FOU is not set
# CONFIG_IPV6_FOU_TUNNEL is not set
# CONFIG_IPV6_MULTIPLE_TABLES is not set
# CONFIG_IPV6_MROUTE is not set
# CONFIG_NETLABEL is not set
# CONFIG_NETWORK_SECMARK is not set
# CONFIG_NET_PTP_CLASSIFY is not set
# CONFIG_NETWORK_PHY_TIMESTAMPING is not set
# CONFIG_NETFILTER is not set
# CONFIG_IP_DCCP is not set
# CONFIG_IP_SCTP is not set
# CONFIG_RDS is not set
# CONFIG_TIPC is not set
# CONFIG_ATM is not set
# CONFIG_L2TP is not set
# CONFIG_BRIDGE is not set
CONFIG_HAVE_NET_DSA=y
# CONFIG_VLAN_8021Q is not set
# CONFIG_DECNET is not set
# CONFIG_LLC2 is not set
# CONFIG_IPX is not set
# CONFIG_ATALK is not set
# CONFIG_X25 is not set
# CONFIG_LAPB is not set
# CONFIG_PHONET is not set
# CONFIG_6LOWPAN is not set
# CONFIG_IEEE802154 is not set
# CONFIG_NET_SCHED is not set
# CONFIG_DCB is not set
CONFIG_DNS_RESOLVER=y
# CONFIG_BATMAN_ADV is not set
# CONFIG_OPENVSWITCH is not set
# CONFIG_VSOCKETS is not set
# CONFIG_NETLINK_DIAG is not set
# CONFIG_MPLS is not set
# CONFIG_HSR is not set
# CONFIG_NET_SWITCHDEV is not set
# CONFIG_NET_L3_MASTER_DEV is not set
# CONFIG_NET_NCSI is not set
# CONFIG_SOCK_CGROUP_DATA is not set
# CONFIG_CGROUP_NET_PRIO is not set
# CONFIG_CGROUP_NET_CLASSID is not set
CONFIG_NET_RX_BUSY_POLL=y
CONFIG_BQL=y
#
# Network testing
#
# CONFIG_NET_PKTGEN is not set
# CONFIG_HAMRADIO is not set
# CONFIG_CAN is not set
# CONFIG_IRDA is not set
# CONFIG_BT is not set
# CONFIG_AF_RXRPC is not set
# CONFIG_AF_KCM is not set
# CONFIG_WIRELESS is not set
# CONFIG_WIMAX is not set
# CONFIG_RFKILL is not set
# CONFIG_NET_9P is not set
# CONFIG_CAIF is not set
# CONFIG_CEPH_LIB is not set
# CONFIG_NFC is not set
# CONFIG_LWTUNNEL is not set
CONFIG_DST_CACHE=y
# CONFIG_NET_DEVLINK is not set
CONFIG_MAY_USE_DEVLINK=y
#
# Device Drivers
#
#
# Generic Driver Options
#
CONFIG_UEVENT_HELPER=y
CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
CONFIG_DEVTMPFS=y
CONFIG_DEVTMPFS_MOUNT=y
CONFIG_STANDALONE=y
CONFIG_PREVENT_FIRMWARE_BUILD=y
CONFIG_FW_LOADER=y
CONFIG_FIRMWARE_IN_KERNEL=y
CONFIG_EXTRA_FIRMWARE=""
# CONFIG_FW_LOADER_USER_HELPER_FALLBACK is not set
CONFIG_ALLOW_DEV_COREDUMP=y
# CONFIG_DEBUG_DRIVER is not set
# CONFIG_DEBUG_DEVRES is not set
# CONFIG_SYS_HYPERVISOR is not set
# CONFIG_GENERIC_CPU_DEVICES is not set
CONFIG_REGMAP=y
CONFIG_REGMAP_I2C=y
# CONFIG_DMA_SHARED_BUFFER is not set
#
# Bus devices
#
# CONFIG_CONNECTOR is not set
CONFIG_MTD=y
# CONFIG_MTD_TESTS is not set
# CONFIG_MTD_REDBOOT_PARTS is not set
# CONFIG_MTD_CMDLINE_PARTS is not set
# CONFIG_MTD_AR7_PARTS is not set
#
# User Modules And Translation Layers
#
CONFIG_MTD_BLKDEVS=y
CONFIG_MTD_BLOCK=y
# CONFIG_FTL is not set
# CONFIG_NFTL is not set
# CONFIG_INFTL is not set
# CONFIG_RFD_FTL is not set
# CONFIG_SSFDC is not set
# CONFIG_SM_FTL is not set
# CONFIG_MTD_OOPS is not set
# CONFIG_MTD_SWAP is not set
# CONFIG_MTD_PARTITIONED_MASTER is not set
#
# RAM/ROM/Flash chip drivers
#
CONFIG_MTD_CFI=y
# CONFIG_MTD_JEDECPROBE is not set
CONFIG_MTD_GEN_PROBE=y
# CONFIG_MTD_CFI_ADV_OPTIONS is not set
CONFIG_MTD_MAP_BANK_WIDTH_1=y
CONFIG_MTD_MAP_BANK_WIDTH_2=y
CONFIG_MTD_MAP_BANK_WIDTH_4=y
# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set
# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set
# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set
CONFIG_MTD_CFI_I1=y
CONFIG_MTD_CFI_I2=y
# CONFIG_MTD_CFI_I4 is not set
# CONFIG_MTD_CFI_I8 is not set
# CONFIG_MTD_CFI_INTELEXT is not set
CONFIG_MTD_CFI_AMDSTD=y
# CONFIG_MTD_CFI_STAA is not set
CONFIG_MTD_CFI_UTIL=y
# CONFIG_MTD_RAM is not set
# CONFIG_MTD_ROM is not set
# CONFIG_MTD_ABSENT is not set
#
# Mapping drivers for chip access
#
# CONFIG_MTD_COMPLEX_MAPPINGS is not set
CONFIG_MTD_PHYSMAP=y
# CONFIG_MTD_PHYSMAP_COMPAT is not set
# CONFIG_MTD_INTEL_VR_NOR is not set
# CONFIG_MTD_PLATRAM is not set
#
# Self-contained MTD device drivers
#
# CONFIG_MTD_PMC551 is not set
# CONFIG_MTD_SLRAM is not set
# CONFIG_MTD_PHRAM is not set
# CONFIG_MTD_MTDRAM is not set
# CONFIG_MTD_BLOCK2MTD is not set
#
# Disk-On-Chip Device Drivers
#
# CONFIG_MTD_DOCG3 is not set
# CONFIG_MTD_NAND is not set
# CONFIG_MTD_ONENAND is not set
#
# LPDDR & LPDDR2 PCM memory drivers
#
# CONFIG_MTD_LPDDR is not set
# CONFIG_MTD_SPI_NOR is not set
# CONFIG_MTD_UBI is not set
# CONFIG_OF is not set
CONFIG_ARCH_MIGHT_HAVE_PC_PARPORT=y
# CONFIG_PARPORT is not set
CONFIG_BLK_DEV=y
# CONFIG_BLK_DEV_NULL_BLK is not set
# CONFIG_BLK_DEV_PCIESSD_MTIP32XX is not set
# CONFIG_BLK_CPQ_CISS_DA is not set
# CONFIG_BLK_DEV_DAC960 is not set
# CONFIG_BLK_DEV_UMEM is not set
# CONFIG_BLK_DEV_COW_COMMON is not set
CONFIG_BLK_DEV_LOOP=y
CONFIG_BLK_DEV_LOOP_MIN_COUNT=8
CONFIG_BLK_DEV_CRYPTOLOOP=m
# CONFIG_BLK_DEV_DRBD is not set
# CONFIG_BLK_DEV_NBD is not set
# CONFIG_BLK_DEV_SX8 is not set
CONFIG_BLK_DEV_RAM=y
CONFIG_BLK_DEV_RAM_COUNT=16
CONFIG_BLK_DEV_RAM_SIZE=4096
# CONFIG_CDROM_PKTCDVD is not set
# CONFIG_ATA_OVER_ETH is not set
# CONFIG_BLK_DEV_HD is not set
# CONFIG_BLK_DEV_RBD is not set
# CONFIG_BLK_DEV_RSXX is not set
# CONFIG_BLK_DEV_NVME is not set
# CONFIG_NVME_TARGET is not set
#
# Misc devices
#
# CONFIG_SENSORS_LIS3LV02D is not set
# CONFIG_AD525X_DPOT is not set
# CONFIG_DUMMY_IRQ is not set
# CONFIG_PHANTOM is not set
# CONFIG_SGI_IOC4 is not set
# CONFIG_TIFM_CORE is not set
# CONFIG_ICS932S401 is not set
# CONFIG_ENCLOSURE_SERVICES is not set
# CONFIG_HP_ILO is not set
# CONFIG_APDS9802ALS is not set
# CONFIG_ISL29003 is not set
# CONFIG_ISL29020 is not set
# CONFIG_SENSORS_TSL2550 is not set
# CONFIG_SENSORS_BH1770 is not set
# CONFIG_SENSORS_APDS990X is not set
# CONFIG_HMC6352 is not set
# CONFIG_DS1682 is not set
# CONFIG_BMP085_I2C is not set
# CONFIG_USB_SWITCH_FSA9480 is not set
# CONFIG_SRAM is not set
# CONFIG_C2PORT is not set
#
# EEPROM support
#
# CONFIG_EEPROM_AT24 is not set
# CONFIG_EEPROM_LEGACY is not set
# CONFIG_EEPROM_MAX6875 is not set
# CONFIG_EEPROM_93CX6 is not set
# CONFIG_CB710_CORE is not set
#
# Texas Instruments shared transport line discipline
#
# CONFIG_SENSORS_LIS3_I2C is not set
#
# Altera FPGA firmware download module
#
# CONFIG_ALTERA_STAPL is not set
#
# Intel MIC Bus Driver
#
#
# SCIF Bus Driver
#
#
# VOP Bus Driver
#
#
# Intel MIC Host Driver
#
#
# Intel MIC Card Driver
#
#
# SCIF Driver
#
#
# Intel MIC Coprocessor State Management (COSM) Drivers
#
#
# VOP Driver
#
# CONFIG_ECHO is not set
# CONFIG_CXL_BASE is not set
# CONFIG_CXL_AFU_DRIVER_OPS is not set
CONFIG_HAVE_IDE=y
CONFIG_IDE=y
#
# Please see Documentation/ide/ide.txt for help/info on IDE drives
#
CONFIG_IDE_XFER_MODE=y
CONFIG_IDE_ATAPI=y
# CONFIG_BLK_DEV_IDE_SATA is not set
CONFIG_IDE_GD=y
CONFIG_IDE_GD_ATA=y
CONFIG_IDE_GD_ATAPI=y
# CONFIG_BLK_DEV_IDECD is not set
# CONFIG_BLK_DEV_IDETAPE is not set
# CONFIG_IDE_TASK_IOCTL is not set
CONFIG_IDE_PROC_FS=y
#
# IDE chipset support/bugfixes
#
CONFIG_BLK_DEV_PLATFORM=y
CONFIG_BLK_DEV_IDEDMA_SFF=y
#
# PCI IDE chipsets support
#
CONFIG_BLK_DEV_IDEPCI=y
CONFIG_IDEPCI_PCIBUS_ORDER=y
# CONFIG_BLK_DEV_OFFBOARD is not set
CONFIG_BLK_DEV_GENERIC=y
# CONFIG_BLK_DEV_OPTI621 is not set
CONFIG_BLK_DEV_IDEDMA_PCI=y
CONFIG_BLK_DEV_AEC62XX=y
# CONFIG_BLK_DEV_ALI15X3 is not set
# CONFIG_BLK_DEV_AMD74XX is not set
# CONFIG_BLK_DEV_CMD64X is not set
# CONFIG_BLK_DEV_TRIFLEX is not set
# CONFIG_BLK_DEV_HPT366 is not set
# CONFIG_BLK_DEV_JMICRON is not set
# CONFIG_BLK_DEV_PIIX is not set
# CONFIG_BLK_DEV_IT8172 is not set
# CONFIG_BLK_DEV_IT8213 is not set
# CONFIG_BLK_DEV_IT821X is not set
# CONFIG_BLK_DEV_NS87415 is not set
CONFIG_BLK_DEV_PDC202XX_OLD=y
CONFIG_BLK_DEV_PDC202XX_NEW=y
# CONFIG_BLK_DEV_SVWKS is not set
# CONFIG_BLK_DEV_SIIMAGE is not set
# CONFIG_BLK_DEV_SLC90E66 is not set
# CONFIG_BLK_DEV_TRM290 is not set
# CONFIG_BLK_DEV_VIA82CXXX is not set
# CONFIG_BLK_DEV_TC86C001 is not set
CONFIG_BLK_DEV_IDEDMA=y
#
# SCSI device support
#
CONFIG_SCSI_MOD=y
# CONFIG_RAID_ATTRS is not set
CONFIG_SCSI=y
CONFIG_SCSI_DMA=y
# CONFIG_SCSI_NETLINK is not set
# CONFIG_SCSI_MQ_DEFAULT is not set
# CONFIG_SCSI_PROC_FS is not set
#
# SCSI support type (disk, tape, CD-ROM)
#
CONFIG_BLK_DEV_SD=y
# CONFIG_CHR_DEV_ST is not set
# CONFIG_CHR_DEV_OSST is not set
# CONFIG_BLK_DEV_SR is not set
# CONFIG_CHR_DEV_SG is not set
# CONFIG_CHR_DEV_SCH is not set
# CONFIG_SCSI_CONSTANTS is not set
# CONFIG_SCSI_LOGGING is not set
# CONFIG_SCSI_SCAN_ASYNC is not set
#
# SCSI Transports
#
# CONFIG_SCSI_SPI_ATTRS is not set
# CONFIG_SCSI_FC_ATTRS is not set
# CONFIG_SCSI_ISCSI_ATTRS is not set
# CONFIG_SCSI_SAS_ATTRS is not set
# CONFIG_SCSI_SAS_LIBSAS is not set
# CONFIG_SCSI_SRP_ATTRS is not set
# CONFIG_SCSI_LOWLEVEL is not set
# CONFIG_SCSI_DH is not set
# CONFIG_SCSI_OSD_INITIATOR is not set
CONFIG_HAVE_PATA_PLATFORM=y
# CONFIG_ATA is not set
# CONFIG_MD is not set
# CONFIG_TARGET_CORE is not set
# CONFIG_FUSION is not set
#
# IEEE 1394 (FireWire) support
#
# CONFIG_FIREWIRE is not set
# CONFIG_FIREWIRE_NOSY is not set
CONFIG_NETDEVICES=y
CONFIG_MII=y
CONFIG_NET_CORE=y
# CONFIG_BONDING is not set
# CONFIG_DUMMY is not set
# CONFIG_EQUALIZER is not set
# CONFIG_NET_FC is not set
# CONFIG_NET_TEAM is not set
# CONFIG_MACVLAN is not set
# CONFIG_IPVLAN is not set
# CONFIG_VXLAN is not set
# CONFIG_MACSEC is not set
# CONFIG_NETCONSOLE is not set
# CONFIG_NETPOLL is not set
# CONFIG_NET_POLL_CONTROLLER is not set
# CONFIG_TUN is not set
# CONFIG_TUN_VNET_CROSS_LE is not set
# CONFIG_VETH is not set
# CONFIG_NLMON is not set
# CONFIG_ARCNET is not set
#
# CAIF transport drivers
#
#
# Distributed Switch Architecture drivers
#
CONFIG_ETHERNET=y
# CONFIG_NET_VENDOR_3COM is not set
# CONFIG_NET_VENDOR_ADAPTEC is not set
# CONFIG_NET_VENDOR_AGERE is not set
# CONFIG_NET_VENDOR_ALTEON is not set
# CONFIG_ALTERA_TSE is not set
# CONFIG_NET_VENDOR_AMD is not set
# CONFIG_NET_VENDOR_ARC is not set
# CONFIG_NET_VENDOR_ATHEROS is not set
# CONFIG_NET_VENDOR_AURORA is not set
# CONFIG_NET_CADENCE is not set
# CONFIG_NET_VENDOR_BROADCOM is not set
# CONFIG_NET_VENDOR_BROCADE is not set
# CONFIG_NET_VENDOR_CAVIUM is not set
# CONFIG_NET_VENDOR_CHELSIO is not set
# CONFIG_NET_VENDOR_CISCO is not set
# CONFIG_DNET is not set
# CONFIG_NET_VENDOR_DEC is not set
# CONFIG_NET_VENDOR_DLINK is not set
# CONFIG_NET_VENDOR_EMULEX is not set
# CONFIG_NET_VENDOR_EZCHIP is not set
# CONFIG_NET_VENDOR_EXAR is not set
# CONFIG_NET_VENDOR_HP is not set
# CONFIG_NET_VENDOR_INTEL is not set
# CONFIG_JME is not set
# CONFIG_NET_VENDOR_MARVELL is not set
# CONFIG_NET_VENDOR_MELLANOX is not set
# CONFIG_NET_VENDOR_MICREL is not set
# CONFIG_NET_VENDOR_MYRI is not set
# CONFIG_FEALNX is not set
# CONFIG_NET_VENDOR_NATSEMI is not set
# CONFIG_NET_VENDOR_NETRONOME is not set
# CONFIG_NET_VENDOR_NVIDIA is not set
# CONFIG_NET_VENDOR_OKI is not set
# CONFIG_ETHOC is not set
# CONFIG_NET_PACKET_ENGINE is not set
# CONFIG_NET_VENDOR_QLOGIC is not set
# CONFIG_NET_VENDOR_QUALCOMM is not set
CONFIG_NET_VENDOR_REALTEK=y
# CONFIG_8139CP is not set
CONFIG_8139TOO=y
# CONFIG_8139TOO_PIO is not set
# CONFIG_8139TOO_TUNE_TWISTER is not set
# CONFIG_8139TOO_8129 is not set
# CONFIG_8139_OLD_RX_RESET is not set
# CONFIG_R8169 is not set
CONFIG_NET_VENDOR_RENESAS=y
CONFIG_SH_ETH=y
# CONFIG_NET_VENDOR_RDC is not set
# CONFIG_NET_VENDOR_ROCKER is not set
# CONFIG_NET_VENDOR_SAMSUNG is not set
# CONFIG_NET_VENDOR_SEEQ is not set
# CONFIG_NET_VENDOR_SILAN is not set
# CONFIG_NET_VENDOR_SIS is not set
# CONFIG_SFC is not set
# CONFIG_NET_VENDOR_SMSC is not set
# CONFIG_NET_VENDOR_STMICRO is not set
# CONFIG_NET_VENDOR_SUN is not set
# CONFIG_NET_VENDOR_SYNOPSYS is not set
# CONFIG_NET_VENDOR_TEHUTI is not set
# CONFIG_NET_VENDOR_TI is not set
# CONFIG_NET_VENDOR_VIA is not set
# CONFIG_NET_VENDOR_WIZNET is not set
# CONFIG_FDDI is not set
# CONFIG_HIPPI is not set
CONFIG_PHYLIB=y
#
# MII PHY device drivers
#
# CONFIG_AQUANTIA_PHY is not set
# CONFIG_AT803X_PHY is not set
# CONFIG_AMD_PHY is not set
# CONFIG_MARVELL_PHY is not set
# CONFIG_DAVICOM_PHY is not set
# CONFIG_QSEMI_PHY is not set
# CONFIG_LXT_PHY is not set
# CONFIG_CICADA_PHY is not set
# CONFIG_VITESSE_PHY is not set
# CONFIG_TERANETICS_PHY is not set
# CONFIG_SMSC_PHY is not set
# CONFIG_BROADCOM_PHY is not set
# CONFIG_BCM7XXX_PHY is not set
# CONFIG_BCM87XX_PHY is not set
# CONFIG_ICPLUS_PHY is not set
# CONFIG_REALTEK_PHY is not set
# CONFIG_NATIONAL_PHY is not set
# CONFIG_STE10XP is not set
# CONFIG_LSI_ET1011C_PHY is not set
# CONFIG_MICREL_PHY is not set
# CONFIG_DP83848_PHY is not set
# CONFIG_DP83867_PHY is not set
# CONFIG_MICROCHIP_PHY is not set
# CONFIG_FIXED_PHY is not set
CONFIG_MDIO_BITBANG=y
# CONFIG_MDIO_BCM_UNIMAC is not set
# CONFIG_INTEL_XWAY_PHY is not set
CONFIG_PPP=m
CONFIG_PPP_BSDCOMP=m
CONFIG_PPP_DEFLATE=m
CONFIG_PPP_FILTER=y
CONFIG_PPP_MPPE=m
CONFIG_PPP_MULTILINK=y
# CONFIG_PPPOE is not set
CONFIG_PPTP=m
CONFIG_PPP_ASYNC=m
CONFIG_PPP_SYNC_TTY=m
# CONFIG_SLIP is not set
CONFIG_SLHC=m
# CONFIG_USB_NET_DRIVERS is not set
# CONFIG_WLAN is not set
#
# Enable WiMAX (Networking options) to see the WiMAX drivers
#
# CONFIG_WAN is not set
# CONFIG_VMXNET3 is not set
# CONFIG_ISDN is not set
# CONFIG_NVM is not set
#
# Input device support
#
CONFIG_INPUT=y
CONFIG_INPUT_FF_MEMLESS=m
# CONFIG_INPUT_POLLDEV is not set
# CONFIG_INPUT_SPARSEKMAP is not set
# CONFIG_INPUT_MATRIXKMAP is not set
#
# Userland interfaces
#
CONFIG_INPUT_MOUSEDEV=y
CONFIG_INPUT_MOUSEDEV_PSAUX=y
CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
# CONFIG_INPUT_JOYDEV is not set
CONFIG_INPUT_EVDEV=y
CONFIG_INPUT_EVBUG=m
#
# Input Device Drivers
#
CONFIG_INPUT_KEYBOARD=y
# CONFIG_KEYBOARD_ADP5588 is not set
# CONFIG_KEYBOARD_ADP5589 is not set
CONFIG_KEYBOARD_ATKBD=y
# CONFIG_KEYBOARD_QT1070 is not set
# CONFIG_KEYBOARD_QT2160 is not set
# CONFIG_KEYBOARD_LKKBD is not set
# CONFIG_KEYBOARD_TCA6416 is not set
# CONFIG_KEYBOARD_TCA8418 is not set
# CONFIG_KEYBOARD_LM8333 is not set
# CONFIG_KEYBOARD_MAX7359 is not set
# CONFIG_KEYBOARD_MCS is not set
# CONFIG_KEYBOARD_MPR121 is not set
# CONFIG_KEYBOARD_NEWTON is not set
# CONFIG_KEYBOARD_OPENCORES is not set
# CONFIG_KEYBOARD_SAMSUNG is not set
# CONFIG_KEYBOARD_STOWAWAY is not set
# CONFIG_KEYBOARD_SUNKBD is not set
# CONFIG_KEYBOARD_XTKBD is not set
CONFIG_INPUT_MOUSE=y
CONFIG_MOUSE_PS2=y
CONFIG_MOUSE_PS2_ALPS=y
CONFIG_MOUSE_PS2_BYD=y
CONFIG_MOUSE_PS2_LOGIPS2PP=y
CONFIG_MOUSE_PS2_SYNAPTICS=y
CONFIG_MOUSE_PS2_CYPRESS=y
CONFIG_MOUSE_PS2_TRACKPOINT=y
# CONFIG_MOUSE_PS2_ELANTECH is not set
# CONFIG_MOUSE_PS2_SENTELIC is not set
# CONFIG_MOUSE_PS2_TOUCHKIT is not set
CONFIG_MOUSE_PS2_FOCALTECH=y
# CONFIG_MOUSE_SERIAL is not set
# CONFIG_MOUSE_APPLETOUCH is not set
# CONFIG_MOUSE_BCM5974 is not set
# CONFIG_MOUSE_CYAPA is not set
# CONFIG_MOUSE_ELAN_I2C is not set
# CONFIG_MOUSE_VSXXXAA is not set
# CONFIG_MOUSE_SYNAPTICS_I2C is not set
# CONFIG_MOUSE_SYNAPTICS_USB is not set
# CONFIG_INPUT_JOYSTICK is not set
# CONFIG_INPUT_TABLET is not set
# CONFIG_INPUT_TOUCHSCREEN is not set
# CONFIG_INPUT_MISC is not set
# CONFIG_RMI4_CORE is not set
#
# Hardware I/O ports
#
CONFIG_SERIO=y
CONFIG_SERIO_SERPORT=y
# CONFIG_SERIO_PCIPS2 is not set
CONFIG_SERIO_LIBPS2=y
# CONFIG_SERIO_RAW is not set
# CONFIG_SERIO_ALTERA_PS2 is not set
# CONFIG_SERIO_PS2MULT is not set
# CONFIG_SERIO_ARC_PS2 is not set
# CONFIG_USERIO is not set
# CONFIG_GAMEPORT is not set
#
# Character devices
#
CONFIG_TTY=y
CONFIG_VT=y
CONFIG_CONSOLE_TRANSLATIONS=y
CONFIG_VT_CONSOLE=y
CONFIG_HW_CONSOLE=y
CONFIG_VT_HW_CONSOLE_BINDING=y
CONFIG_UNIX98_PTYS=y
# CONFIG_LEGACY_PTYS is not set
# CONFIG_SERIAL_NONSTANDARD is not set
# CONFIG_NOZOMI is not set
# CONFIG_N_GSM is not set
# CONFIG_TRACE_SINK is not set
CONFIG_DEVMEM=y
# CONFIG_DEVKMEM is not set
#
# Serial drivers
#
# CONFIG_SERIAL_8250 is not set
#
# Non-8250 serial port support
#
# CONFIG_SERIAL_UARTLITE is not set
CONFIG_SERIAL_SH_SCI=y
CONFIG_SERIAL_SH_SCI_NR_UARTS=6
CONFIG_SERIAL_SH_SCI_CONSOLE=y
# CONFIG_SERIAL_SH_SCI_EARLYCON is not set
CONFIG_SERIAL_CORE=y
CONFIG_SERIAL_CORE_CONSOLE=y
# CONFIG_SERIAL_JSM is not set
# CONFIG_SERIAL_SCCNXP is not set
# CONFIG_SERIAL_SC16IS7XX is not set
# CONFIG_SERIAL_ALTERA_JTAGUART is not set
# CONFIG_SERIAL_ALTERA_UART is not set
# CONFIG_SERIAL_ARC is not set
# CONFIG_SERIAL_RP2 is not set
# CONFIG_SERIAL_FSL_LPUART is not set
# CONFIG_TTY_PRINTK is not set
# CONFIG_IPMI_HANDLER is not set
# CONFIG_HW_RANDOM is not set
# CONFIG_R3964 is not set
# CONFIG_APPLICOM is not set
# CONFIG_RAW_DRIVER is not set
# CONFIG_TCG_TPM is not set
CONFIG_DEVPORT=y
# CONFIG_XILLYBUS is not set
#
# I2C support
#
CONFIG_I2C=y
CONFIG_I2C_BOARDINFO=y
CONFIG_I2C_COMPAT=y
# CONFIG_I2C_CHARDEV is not set
# CONFIG_I2C_MUX is not set
CONFIG_I2C_HELPER_AUTO=y
CONFIG_I2C_ALGOPCA=y
#
# I2C Hardware Bus support
#
#
# PC SMBus host controller drivers
#
# CONFIG_I2C_ALI1535 is not set
# CONFIG_I2C_ALI1563 is not set
# CONFIG_I2C_ALI15X3 is not set
# CONFIG_I2C_AMD756 is not set
# CONFIG_I2C_AMD8111 is not set
# CONFIG_I2C_I801 is not set
# CONFIG_I2C_ISCH is not set
# CONFIG_I2C_PIIX4 is not set
# CONFIG_I2C_NFORCE2 is not set
# CONFIG_I2C_SIS5595 is not set
# CONFIG_I2C_SIS630 is not set
# CONFIG_I2C_SIS96X is not set
# CONFIG_I2C_VIA is not set
# CONFIG_I2C_VIAPRO is not set
#
# I2C system bus drivers (mostly embedded / system-on-chip)
#
# CONFIG_I2C_DESIGNWARE_PLATFORM is not set
# CONFIG_I2C_DESIGNWARE_PCI is not set
# CONFIG_I2C_EMEV2 is not set
# CONFIG_I2C_OCORES is not set
CONFIG_I2C_PCA_PLATFORM=y
# CONFIG_I2C_PXA_PCI is not set
# CONFIG_I2C_SH_MOBILE is not set
# CONFIG_I2C_SIMTEC is not set
# CONFIG_I2C_XILINX is not set
#
# External I2C/SMBus adapter drivers
#
# CONFIG_I2C_DIOLAN_U2C is not set
# CONFIG_I2C_PARPORT_LIGHT is not set
# CONFIG_I2C_ROBOTFUZZ_OSIF is not set
# CONFIG_I2C_TAOS_EVM is not set
# CONFIG_I2C_TINY_USB is not set
#
# Other I2C/SMBus bus drivers
#
# CONFIG_I2C_STUB is not set
# CONFIG_I2C_SLAVE is not set
# CONFIG_I2C_DEBUG_CORE is not set
# CONFIG_I2C_DEBUG_ALGO is not set
# CONFIG_I2C_DEBUG_BUS is not set
# CONFIG_SPI is not set
# CONFIG_SPMI is not set
# CONFIG_HSI is not set
#
# PPS support
#
# CONFIG_PPS is not set
#
# PPS generators support
#
#
# PTP clock support
#
# CONFIG_PTP_1588_CLOCK is not set
#
# Enable PHYLIB and NETWORK_PHY_TIMESTAMPING to see the additional clocks.
#
CONFIG_ARCH_HAVE_CUSTOM_GPIO_H=y
# CONFIG_GPIOLIB is not set
# CONFIG_W1 is not set
# CONFIG_POWER_SUPPLY is not set
# CONFIG_POWER_RESET is not set
# CONFIG_POWER_AVS is not set
# CONFIG_HWMON is not set
# CONFIG_THERMAL is not set
CONFIG_WATCHDOG=y
CONFIG_WATCHDOG_CORE=y
# CONFIG_WATCHDOG_NOWAYOUT is not set
# CONFIG_WATCHDOG_SYSFS is not set
#
# Watchdog Device Drivers
#
# CONFIG_SOFT_WATCHDOG is not set
# CONFIG_XILINX_WATCHDOG is not set
# CONFIG_ZIIRAVE_WATCHDOG is not set
# CONFIG_CADENCE_WATCHDOG is not set
# CONFIG_DW_WATCHDOG is not set
# CONFIG_MAX63XX_WATCHDOG is not set
# CONFIG_ALIM7101_WDT is not set
# CONFIG_I6300ESB_WDT is not set
CONFIG_SH_WDT=y
#
# PCI-based Watchdog Cards
#
# CONFIG_PCIPCWATCHDOG is not set
# CONFIG_WDTPCI is not set
#
# USB-based Watchdog Cards
#
# CONFIG_USBPCWATCHDOG is not set
CONFIG_SSB_POSSIBLE=y
#
# Sonics Silicon Backplane
#
# CONFIG_SSB is not set
CONFIG_BCMA_POSSIBLE=y
#
# Broadcom specific AMBA
#
# CONFIG_BCMA is not set
#
# Multifunction device drivers
#
# CONFIG_MFD_CORE is not set
# CONFIG_MFD_AS3711 is not set
# CONFIG_PMIC_ADP5520 is not set
# CONFIG_MFD_BCM590XX is not set
# CONFIG_MFD_AXP20X_I2C is not set
# CONFIG_PMIC_DA903X is not set
# CONFIG_MFD_DA9052_I2C is not set
# CONFIG_MFD_DA9055 is not set
# CONFIG_MFD_DA9062 is not set
# CONFIG_MFD_DA9063 is not set
# CONFIG_MFD_DA9150 is not set
# CONFIG_MFD_DLN2 is not set
# CONFIG_MFD_MC13XXX_I2C is not set
# CONFIG_HTC_PASIC3 is not set
# CONFIG_LPC_ICH is not set
# CONFIG_LPC_SCH is not set
# CONFIG_MFD_JANZ_CMODIO is not set
# CONFIG_MFD_KEMPLD is not set
# CONFIG_MFD_88PM800 is not set
# CONFIG_MFD_88PM805 is not set
# CONFIG_MFD_88PM860X is not set
# CONFIG_MFD_MAX14577 is not set
# CONFIG_MFD_MAX77693 is not set
# CONFIG_MFD_MAX77843 is not set
# CONFIG_MFD_MAX8907 is not set
# CONFIG_MFD_MAX8925 is not set
# CONFIG_MFD_MAX8997 is not set
# CONFIG_MFD_MAX8998 is not set
# CONFIG_MFD_MT6397 is not set
# CONFIG_MFD_MENF21BMC is not set
# CONFIG_MFD_VIPERBOARD is not set
# CONFIG_MFD_RETU is not set
# CONFIG_MFD_PCF50633 is not set
# CONFIG_MFD_RDC321X is not set
# CONFIG_MFD_RTSX_PCI is not set
# CONFIG_MFD_RT5033 is not set
# CONFIG_MFD_RTSX_USB is not set
# CONFIG_MFD_RC5T583 is not set
# CONFIG_MFD_SEC_CORE is not set
# CONFIG_MFD_SI476X_CORE is not set
# CONFIG_MFD_SM501 is not set
# CONFIG_MFD_SKY81452 is not set
# CONFIG_MFD_SMSC is not set
# CONFIG_ABX500_CORE is not set
# CONFIG_MFD_SYSCON is not set
# CONFIG_MFD_TI_AM335X_TSCADC is not set
# CONFIG_MFD_LP3943 is not set
# CONFIG_MFD_LP8788 is not set
# CONFIG_MFD_PALMAS is not set
# CONFIG_TPS6105X is not set
# CONFIG_TPS6507X is not set
# CONFIG_MFD_TPS65086 is not set
# CONFIG_MFD_TPS65090 is not set
# CONFIG_MFD_TPS65217 is not set
# CONFIG_MFD_TPS65218 is not set
# CONFIG_MFD_TPS6586X is not set
# CONFIG_MFD_TPS65912_I2C is not set
# CONFIG_MFD_TPS80031 is not set
# CONFIG_TWL4030_CORE is not set
# CONFIG_TWL6040_CORE is not set
# CONFIG_MFD_WL1273_CORE is not set
# CONFIG_MFD_LM3533 is not set
# CONFIG_MFD_TMIO is not set
# CONFIG_MFD_VX855 is not set
# CONFIG_MFD_ARIZONA_I2C is not set
# CONFIG_MFD_WM8400 is not set
# CONFIG_MFD_WM831X_I2C is not set
# CONFIG_MFD_WM8350_I2C is not set
# CONFIG_MFD_WM8994 is not set
# CONFIG_REGULATOR is not set
# CONFIG_MEDIA_SUPPORT is not set
#
# Graphics support
#
# CONFIG_VGA_ARB is not set
# CONFIG_DRM is not set
#
# ACP (Audio CoProcessor) Configuration
#
#
# Frame buffer Devices
#
# CONFIG_FB is not set
# CONFIG_FB_SH_MOBILE_MERAM is not set
# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
# CONFIG_VGASTATE is not set
#
# Console display driver support
#
CONFIG_DUMMY_CONSOLE=y
CONFIG_DUMMY_CONSOLE_COLUMNS=80
CONFIG_DUMMY_CONSOLE_ROWS=25
# CONFIG_SOUND is not set
#
# HID support
#
CONFIG_HID=y
# CONFIG_HID_BATTERY_STRENGTH is not set
# CONFIG_HIDRAW is not set
# CONFIG_UHID is not set
CONFIG_HID_GENERIC=y
#
# Special HID drivers
#
# CONFIG_HID_A4TECH is not set
# CONFIG_HID_ACRUX is not set
# CONFIG_HID_APPLE is not set
# CONFIG_HID_APPLEIR is not set
# CONFIG_HID_AUREAL is not set
# CONFIG_HID_BELKIN is not set
# CONFIG_HID_BETOP_FF is not set
# CONFIG_HID_CHERRY is not set
# CONFIG_HID_CHICONY is not set
# CONFIG_HID_CMEDIA is not set
# CONFIG_HID_CYPRESS is not set
# CONFIG_HID_DRAGONRISE is not set
# CONFIG_HID_EMS_FF is not set
# CONFIG_HID_ELECOM is not set
# CONFIG_HID_ELO is not set
# CONFIG_HID_EZKEY is not set
# CONFIG_HID_GEMBIRD is not set
# CONFIG_HID_GFRM is not set
# CONFIG_HID_HOLTEK is not set
# CONFIG_HID_KEYTOUCH is not set
# CONFIG_HID_KYE is not set
# CONFIG_HID_UCLOGIC is not set
# CONFIG_HID_WALTOP is not set
# CONFIG_HID_GYRATION is not set
# CONFIG_HID_ICADE is not set
# CONFIG_HID_TWINHAN is not set
# CONFIG_HID_KENSINGTON is not set
# CONFIG_HID_LCPOWER is not set
# CONFIG_HID_LENOVO is not set
# CONFIG_HID_LOGITECH is not set
# CONFIG_HID_MAGICMOUSE is not set
# CONFIG_HID_MICROSOFT is not set
# CONFIG_HID_MONTEREY is not set
# CONFIG_HID_MULTITOUCH is not set
# CONFIG_HID_NTRIG is not set
# CONFIG_HID_ORTEK is not set
# CONFIG_HID_PANTHERLORD is not set
# CONFIG_HID_PENMOUNT is not set
# CONFIG_HID_PETALYNX is not set
# CONFIG_HID_PICOLCD is not set
# CONFIG_HID_PLANTRONICS is not set
# CONFIG_HID_PRIMAX is not set
# CONFIG_HID_ROCCAT is not set
# CONFIG_HID_SAITEK is not set
# CONFIG_HID_SAMSUNG is not set
# CONFIG_HID_SPEEDLINK is not set
# CONFIG_HID_STEELSERIES is not set
# CONFIG_HID_SUNPLUS is not set
# CONFIG_HID_RMI is not set
# CONFIG_HID_GREENASIA is not set
# CONFIG_HID_SMARTJOYPLUS is not set
# CONFIG_HID_TIVO is not set
# CONFIG_HID_TOPSEED is not set
# CONFIG_HID_THRUSTMASTER is not set
# CONFIG_HID_WACOM is not set
# CONFIG_HID_XINMO is not set
# CONFIG_HID_ZEROPLUS is not set
# CONFIG_HID_ZYDACRON is not set
# CONFIG_HID_SENSOR_HUB is not set
# CONFIG_HID_ALPS is not set
#
# USB HID support
#
CONFIG_USB_HID=y
# CONFIG_HID_PID is not set
# CONFIG_USB_HIDDEV is not set
#
# I2C HID support
#
# CONFIG_I2C_HID is not set
CONFIG_USB_OHCI_LITTLE_ENDIAN=y
CONFIG_USB_SUPPORT=y
CONFIG_USB_COMMON=y
CONFIG_USB_ARCH_HAS_HCD=y
CONFIG_USB=y
# CONFIG_USB_ANNOUNCE_NEW_DEVICES is not set
#
# Miscellaneous USB options
#
CONFIG_USB_DEFAULT_PERSIST=y
# CONFIG_USB_DYNAMIC_MINORS is not set
# CONFIG_USB_OTG_WHITELIST is not set
# CONFIG_USB_OTG_BLACKLIST_HUB is not set
# CONFIG_USB_ULPI_BUS is not set
# CONFIG_USB_MON is not set
# CONFIG_USB_WUSB_CBAF is not set
#
# USB Host Controller Drivers
#
# CONFIG_USB_C67X00_HCD is not set
# CONFIG_USB_XHCI_HCD is not set
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_EHCI_ROOT_HUB_TT=y
CONFIG_USB_EHCI_TT_NEWSCHED=y
CONFIG_USB_EHCI_PCI=y
CONFIG_USB_EHCI_SH=y
CONFIG_USB_EHCI_HCD_PLATFORM=y
# CONFIG_USB_OXU210HP_HCD is not set
# CONFIG_USB_ISP116X_HCD is not set
# CONFIG_USB_ISP1362_HCD is not set
# CONFIG_USB_FOTG210_HCD is not set
CONFIG_USB_OHCI_HCD=y
CONFIG_USB_OHCI_HCD_PCI=y
# CONFIG_USB_OHCI_SH is not set
CONFIG_USB_OHCI_HCD_PLATFORM=y
# CONFIG_USB_UHCI_HCD is not set
# CONFIG_USB_SL811_HCD is not set
# CONFIG_USB_R8A66597_HCD is not set
# CONFIG_USB_HCD_TEST_MODE is not set
#
# USB Device Class drivers
#
# CONFIG_USB_ACM is not set
# CONFIG_USB_PRINTER is not set
# CONFIG_USB_WDM is not set
# CONFIG_USB_TMC is not set
#
# NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may
#
#
# also be needed; see USB_STORAGE Help for more info
#
CONFIG_USB_STORAGE=y
# CONFIG_USB_STORAGE_DEBUG is not set
# CONFIG_USB_STORAGE_REALTEK is not set
# CONFIG_USB_STORAGE_DATAFAB is not set
# CONFIG_USB_STORAGE_FREECOM is not set
# CONFIG_USB_STORAGE_ISD200 is not set
# CONFIG_USB_STORAGE_USBAT is not set
# CONFIG_USB_STORAGE_SDDR09 is not set
# CONFIG_USB_STORAGE_SDDR55 is not set
# CONFIG_USB_STORAGE_JUMPSHOT is not set
# CONFIG_USB_STORAGE_ALAUDA is not set
# CONFIG_USB_STORAGE_ONETOUCH is not set
# CONFIG_USB_STORAGE_KARMA is not set
# CONFIG_USB_STORAGE_CYPRESS_ATACB is not set
# CONFIG_USB_STORAGE_ENE_UB6250 is not set
# CONFIG_USB_UAS is not set
#
# USB Imaging devices
#
# CONFIG_USB_MDC800 is not set
# CONFIG_USB_MICROTEK is not set
# CONFIG_USBIP_CORE is not set
# CONFIG_USB_MUSB_HDRC is not set
# CONFIG_USB_DWC3 is not set
# CONFIG_USB_DWC2 is not set
# CONFIG_USB_CHIPIDEA is not set
# CONFIG_USB_ISP1760 is not set
#
# USB port drivers
#
# CONFIG_USB_SERIAL is not set
#
# USB Miscellaneous drivers
#
# CONFIG_USB_EMI62 is not set
# CONFIG_USB_EMI26 is not set
# CONFIG_USB_ADUTUX is not set
# CONFIG_USB_SEVSEG is not set
# CONFIG_USB_RIO500 is not set
# CONFIG_USB_LEGOTOWER is not set
# CONFIG_USB_LCD is not set
# CONFIG_USB_CYPRESS_CY7C63 is not set
# CONFIG_USB_CYTHERM is not set
# CONFIG_USB_IDMOUSE is not set
# CONFIG_USB_FTDI_ELAN is not set
# CONFIG_USB_APPLEDISPLAY is not set
# CONFIG_USB_SISUSBVGA is not set
# CONFIG_USB_LD is not set
# CONFIG_USB_TRANCEVIBRATOR is not set
# CONFIG_USB_IOWARRIOR is not set
# CONFIG_USB_TEST is not set
# CONFIG_USB_EHSET_TEST_FIXTURE is not set
# CONFIG_USB_ISIGHTFW is not set
# CONFIG_USB_YUREX is not set
# CONFIG_USB_EZUSB_FX2 is not set
# CONFIG_USB_HSIC_USB3503 is not set
# CONFIG_USB_LINK_LAYER_TEST is not set
#
# USB Physical Layer drivers
#
# CONFIG_USB_PHY is not set
# CONFIG_NOP_USB_XCEIV is not set
# CONFIG_USB_ISP1301 is not set
# CONFIG_USB_GADGET is not set
# CONFIG_UWB is not set
# CONFIG_MMC is not set
# CONFIG_MEMSTICK is not set
# CONFIG_NEW_LEDS is not set
# CONFIG_ACCESSIBILITY is not set
# CONFIG_INFINIBAND is not set
CONFIG_RTC_LIB=y
CONFIG_RTC_CLASS=y
CONFIG_RTC_HCTOSYS=y
CONFIG_RTC_HCTOSYS_DEVICE="rtc0"
CONFIG_RTC_SYSTOHC=y
CONFIG_RTC_SYSTOHC_DEVICE="rtc0"
# CONFIG_RTC_DEBUG is not set
#
# RTC interfaces
#
CONFIG_RTC_INTF_SYSFS=y
CONFIG_RTC_INTF_PROC=y
CONFIG_RTC_INTF_DEV=y
# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set
# CONFIG_RTC_DRV_TEST is not set
#
# I2C RTC drivers
#
# CONFIG_RTC_DRV_ABB5ZES3 is not set
# CONFIG_RTC_DRV_ABX80X is not set
# CONFIG_RTC_DRV_DS1307 is not set
# CONFIG_RTC_DRV_DS1374 is not set
# CONFIG_RTC_DRV_DS1672 is not set
# CONFIG_RTC_DRV_MAX6900 is not set
# CONFIG_RTC_DRV_RS5C372 is not set
# CONFIG_RTC_DRV_ISL1208 is not set
# CONFIG_RTC_DRV_ISL12022 is not set
# CONFIG_RTC_DRV_ISL12057 is not set
# CONFIG_RTC_DRV_X1205 is not set
# CONFIG_RTC_DRV_PCF8523 is not set
# CONFIG_RTC_DRV_PCF85063 is not set
# CONFIG_RTC_DRV_PCF8563 is not set
# CONFIG_RTC_DRV_PCF8583 is not set
# CONFIG_RTC_DRV_M41T80 is not set
# CONFIG_RTC_DRV_BQ32K is not set
# CONFIG_RTC_DRV_S35390A is not set
# CONFIG_RTC_DRV_FM3130 is not set
# CONFIG_RTC_DRV_RX8010 is not set
# CONFIG_RTC_DRV_RX8581 is not set
# CONFIG_RTC_DRV_RX8025 is not set
# CONFIG_RTC_DRV_EM3027 is not set
# CONFIG_RTC_DRV_RV8803 is not set
#
# SPI RTC drivers
#
CONFIG_RTC_I2C_AND_SPI=y
#
# SPI and I2C RTC drivers
#
# CONFIG_RTC_DRV_DS3232 is not set
# CONFIG_RTC_DRV_PCF2127 is not set
# CONFIG_RTC_DRV_RV3029C2 is not set
#
# Platform RTC drivers
#
# CONFIG_RTC_DRV_DS1286 is not set
# CONFIG_RTC_DRV_DS1511 is not set
# CONFIG_RTC_DRV_DS1553 is not set
# CONFIG_RTC_DRV_DS1685_FAMILY is not set
# CONFIG_RTC_DRV_DS1742 is not set
# CONFIG_RTC_DRV_DS2404 is not set
# CONFIG_RTC_DRV_STK17TA8 is not set
# CONFIG_RTC_DRV_M48T86 is not set
# CONFIG_RTC_DRV_M48T35 is not set
# CONFIG_RTC_DRV_M48T59 is not set
# CONFIG_RTC_DRV_MSM6242 is not set
# CONFIG_RTC_DRV_BQ4802 is not set
# CONFIG_RTC_DRV_RP5C01 is not set
# CONFIG_RTC_DRV_V3020 is not set
#
# on-CPU RTC drivers
#
CONFIG_RTC_DRV_SH=y
CONFIG_RTC_DRV_RS5C313=y
CONFIG_RTC_DRV_GENERIC=y
#
# HID Sensor RTC drivers
#
# CONFIG_RTC_DRV_HID_SENSOR_TIME is not set
CONFIG_DMADEVICES=y
# CONFIG_DMADEVICES_DEBUG is not set
#
# DMA Devices
#
# CONFIG_INTEL_IDMA64 is not set
# CONFIG_QCOM_HIDMA_MGMT is not set
# CONFIG_QCOM_HIDMA is not set
# CONFIG_DW_DMAC is not set
# CONFIG_DW_DMAC_PCI is not set
#
# DMABUF options
#
# CONFIG_SYNC_FILE is not set
# CONFIG_AUXDISPLAY is not set
# CONFIG_UIO is not set
# CONFIG_VIRT_DRIVERS is not set
#
# Virtio drivers
#
# CONFIG_VIRTIO_PCI is not set
# CONFIG_VIRTIO_MMIO is not set
#
# Microsoft Hyper-V guest support
#
# CONFIG_STAGING is not set
CONFIG_CLKDEV_LOOKUP=y
#
# Hardware Spinlock drivers
#
#
# Clock Source drivers
#
# CONFIG_ARM_TIMER_SP804 is not set
# CONFIG_ATMEL_PIT is not set
CONFIG_SYS_SUPPORTS_SH_TMU=y
# CONFIG_SH_TIMER_CMT is not set
# CONFIG_SH_TIMER_MTU2 is not set
CONFIG_SH_TIMER_TMU=y
# CONFIG_EM_TIMER_STI is not set
# CONFIG_MAILBOX is not set
# CONFIG_IOMMU_SUPPORT is not set
#
# Remoteproc drivers
#
# CONFIG_STE_MODEM_RPROC is not set
#
# Rpmsg drivers
#
#
# SOC (System On Chip) specific Drivers
#
#
# Broadcom SoC drivers
#
# CONFIG_SUNXI_SRAM is not set
# CONFIG_SOC_TI is not set
# CONFIG_PM_DEVFREQ is not set
# CONFIG_EXTCON is not set
# CONFIG_MEMORY is not set
# CONFIG_IIO is not set
# CONFIG_NTB is not set
# CONFIG_VME_BUS is not set
# CONFIG_PWM is not set
CONFIG_ARM_GIC_MAX_NR=1
# CONFIG_IPACK_BUS is not set
# CONFIG_RESET_CONTROLLER is not set
# CONFIG_FMC is not set
#
# PHY Subsystem
#
# CONFIG_GENERIC_PHY is not set
# CONFIG_PHY_PXA_28NM_HSIC is not set
# CONFIG_PHY_PXA_28NM_USB2 is not set
# CONFIG_BCM_KONA_USB2_PHY is not set
# CONFIG_POWERCAP is not set
# CONFIG_MCB is not set
#
# Performance monitor support
#
# CONFIG_RAS is not set
# CONFIG_THUNDERBOLT is not set
#
# Android
#
# CONFIG_ANDROID is not set
# CONFIG_NVMEM is not set
# CONFIG_STM is not set
# CONFIG_INTEL_TH is not set
#
# FPGA Configuration Support
#
# CONFIG_FPGA is not set
#
# File systems
#
CONFIG_EXT2_FS=y
CONFIG_EXT2_FS_XATTR=y
CONFIG_EXT2_FS_POSIX_ACL=y
CONFIG_EXT2_FS_SECURITY=y
CONFIG_EXT3_FS=y
CONFIG_EXT3_FS_POSIX_ACL=y
CONFIG_EXT3_FS_SECURITY=y
CONFIG_EXT4_FS=y
CONFIG_EXT4_FS_POSIX_ACL=y
CONFIG_EXT4_FS_SECURITY=y
# CONFIG_EXT4_ENCRYPTION is not set
CONFIG_EXT4_DEBUG=y
CONFIG_JBD2=y
# CONFIG_JBD2_DEBUG is not set
CONFIG_FS_MBCACHE=y
# CONFIG_REISERFS_FS is not set
# CONFIG_JFS_FS is not set
# CONFIG_XFS_FS is not set
# CONFIG_GFS2_FS is not set
# CONFIG_OCFS2_FS is not set
# CONFIG_BTRFS_FS is not set
# CONFIG_NILFS2_FS is not set
# CONFIG_F2FS_FS is not set
# CONFIG_FS_DAX is not set
CONFIG_FS_POSIX_ACL=y
CONFIG_EXPORTFS=y
# CONFIG_EXPORTFS_BLOCK_OPS is not set
CONFIG_FILE_LOCKING=y
CONFIG_MANDATORY_FILE_LOCKING=y
# CONFIG_FS_ENCRYPTION is not set
CONFIG_FSNOTIFY=y
CONFIG_DNOTIFY=y
CONFIG_INOTIFY_USER=y
# CONFIG_FANOTIFY is not set
# CONFIG_QUOTA is not set
# CONFIG_QUOTACTL is not set
# CONFIG_AUTOFS4_FS is not set
# CONFIG_FUSE_FS is not set
# CONFIG_OVERLAY_FS is not set
#
# Caches
#
# CONFIG_FSCACHE is not set
#
# CD-ROM/DVD Filesystems
#
# CONFIG_ISO9660_FS is not set
# CONFIG_UDF_FS is not set
#
# DOS/FAT/NT Filesystems
#
CONFIG_FAT_FS=y
CONFIG_MSDOS_FS=y
CONFIG_VFAT_FS=y
CONFIG_FAT_DEFAULT_CODEPAGE=437
CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1"
# CONFIG_FAT_DEFAULT_UTF8 is not set
CONFIG_NTFS_FS=y
# CONFIG_NTFS_DEBUG is not set
CONFIG_NTFS_RW=y
#
# Pseudo filesystems
#
CONFIG_PROC_FS=y
CONFIG_PROC_KCORE=y
CONFIG_PROC_SYSCTL=y
CONFIG_PROC_PAGE_MONITOR=y
# CONFIG_PROC_CHILDREN is not set
CONFIG_KERNFS=y
CONFIG_SYSFS=y
CONFIG_TMPFS=y
# CONFIG_TMPFS_POSIX_ACL is not set
# CONFIG_TMPFS_XATTR is not set
CONFIG_HUGETLBFS=y
CONFIG_HUGETLB_PAGE=y
CONFIG_CONFIGFS_FS=y
CONFIG_MISC_FILESYSTEMS=y
# CONFIG_ORANGEFS_FS is not set
# CONFIG_ADFS_FS is not set
# CONFIG_AFFS_FS is not set
# CONFIG_ECRYPT_FS is not set
# CONFIG_HFS_FS is not set
# CONFIG_HFSPLUS_FS is not set
# CONFIG_BEFS_FS is not set
# CONFIG_BFS_FS is not set
# CONFIG_EFS_FS is not set
# CONFIG_JFFS2_FS is not set
# CONFIG_LOGFS is not set
# CONFIG_CRAMFS is not set
# CONFIG_SQUASHFS is not set
# CONFIG_VXFS_FS is not set
CONFIG_MINIX_FS=y
CONFIG_MINIX_FS_NATIVE_ENDIAN=y
# CONFIG_OMFS_FS is not set
# CONFIG_HPFS_FS is not set
# CONFIG_QNX4FS_FS is not set
# CONFIG_QNX6FS_FS is not set
# CONFIG_ROMFS_FS is not set
# CONFIG_PSTORE is not set
# CONFIG_SYSV_FS is not set
# CONFIG_UFS_FS is not set
CONFIG_NETWORK_FILESYSTEMS=y
CONFIG_NFS_FS=y
CONFIG_NFS_V2=y
CONFIG_NFS_V3=y
CONFIG_NFS_V3_ACL=y
CONFIG_NFS_V4=y
# CONFIG_NFS_SWAP is not set
CONFIG_NFS_V4_1=y
# CONFIG_NFS_V4_2 is not set
CONFIG_PNFS_FILE_LAYOUT=y
CONFIG_PNFS_FLEXFILE_LAYOUT=m
CONFIG_NFS_V4_1_IMPLEMENTATION_ID_DOMAIN="kernel.org"
# CONFIG_NFS_V4_1_MIGRATION is not set
CONFIG_ROOT_NFS=y
# CONFIG_NFS_USE_LEGACY_DNS is not set
CONFIG_NFS_USE_KERNEL_DNS=y
# CONFIG_NFSD is not set
CONFIG_GRACE_PERIOD=y
CONFIG_LOCKD=y
CONFIG_LOCKD_V4=y
CONFIG_NFS_ACL_SUPPORT=y
CONFIG_NFS_COMMON=y
CONFIG_SUNRPC=y
CONFIG_SUNRPC_GSS=y
CONFIG_SUNRPC_BACKCHANNEL=y
# CONFIG_SUNRPC_DEBUG is not set
# CONFIG_CEPH_FS is not set
# CONFIG_CIFS is not set
# CONFIG_NCP_FS is not set
# CONFIG_CODA_FS is not set
# CONFIG_AFS_FS is not set
CONFIG_NLS=y
CONFIG_NLS_DEFAULT="iso8859-1"
CONFIG_NLS_CODEPAGE_437=y
# CONFIG_NLS_CODEPAGE_737 is not set
# CONFIG_NLS_CODEPAGE_775 is not set
# CONFIG_NLS_CODEPAGE_850 is not set
# CONFIG_NLS_CODEPAGE_852 is not set
# CONFIG_NLS_CODEPAGE_855 is not set
# CONFIG_NLS_CODEPAGE_857 is not set
# CONFIG_NLS_CODEPAGE_860 is not set
# CONFIG_NLS_CODEPAGE_861 is not set
# CONFIG_NLS_CODEPAGE_862 is not set
# CONFIG_NLS_CODEPAGE_863 is not set
# CONFIG_NLS_CODEPAGE_864 is not set
# CONFIG_NLS_CODEPAGE_865 is not set
# CONFIG_NLS_CODEPAGE_866 is not set
# CONFIG_NLS_CODEPAGE_869 is not set
# CONFIG_NLS_CODEPAGE_936 is not set
# CONFIG_NLS_CODEPAGE_950 is not set
CONFIG_NLS_CODEPAGE_932=y
# CONFIG_NLS_CODEPAGE_949 is not set
# CONFIG_NLS_CODEPAGE_874 is not set
# CONFIG_NLS_ISO8859_8 is not set
# CONFIG_NLS_CODEPAGE_1250 is not set
# CONFIG_NLS_CODEPAGE_1251 is not set
# CONFIG_NLS_ASCII is not set
CONFIG_NLS_ISO8859_1=y
# CONFIG_NLS_ISO8859_2 is not set
# CONFIG_NLS_ISO8859_3 is not set
# CONFIG_NLS_ISO8859_4 is not set
# CONFIG_NLS_ISO8859_5 is not set
# CONFIG_NLS_ISO8859_6 is not set
# CONFIG_NLS_ISO8859_7 is not set
# CONFIG_NLS_ISO8859_9 is not set
# CONFIG_NLS_ISO8859_13 is not set
# CONFIG_NLS_ISO8859_14 is not set
# CONFIG_NLS_ISO8859_15 is not set
# CONFIG_NLS_KOI8_R is not set
# CONFIG_NLS_KOI8_U is not set
# CONFIG_NLS_MAC_ROMAN is not set
# CONFIG_NLS_MAC_CELTIC is not set
# CONFIG_NLS_MAC_CENTEURO is not set
# CONFIG_NLS_MAC_CROATIAN is not set
# CONFIG_NLS_MAC_CYRILLIC is not set
# CONFIG_NLS_MAC_GAELIC is not set
# CONFIG_NLS_MAC_GREEK is not set
# CONFIG_NLS_MAC_ICELAND is not set
# CONFIG_NLS_MAC_INUIT is not set
# CONFIG_NLS_MAC_ROMANIAN is not set
# CONFIG_NLS_MAC_TURKISH is not set
# CONFIG_NLS_UTF8 is not set
# CONFIG_DLM is not set
#
# Kernel hacking
#
CONFIG_TRACE_IRQFLAGS_SUPPORT=y
#
# printk and dmesg options
#
CONFIG_PRINTK_TIME=y
CONFIG_MESSAGE_LOGLEVEL_DEFAULT=4
# CONFIG_DYNAMIC_DEBUG is not set
#
# Compile-time checks and compiler options
#
CONFIG_DEBUG_INFO=y
# CONFIG_DEBUG_INFO_REDUCED is not set
# CONFIG_DEBUG_INFO_SPLIT is not set
# CONFIG_DEBUG_INFO_DWARF4 is not set
# CONFIG_GDB_SCRIPTS is not set
CONFIG_ENABLE_WARN_DEPRECATED=y
# CONFIG_ENABLE_MUST_CHECK is not set
CONFIG_FRAME_WARN=1024
# CONFIG_STRIP_ASM_SYMS is not set
# CONFIG_READABLE_ASM is not set
# CONFIG_UNUSED_SYMBOLS is not set
# CONFIG_PAGE_OWNER is not set
CONFIG_DEBUG_FS=y
# CONFIG_HEADERS_CHECK is not set
# CONFIG_DEBUG_SECTION_MISMATCH is not set
CONFIG_SECTION_MISMATCH_WARN_ONLY=y
CONFIG_FRAME_POINTER=y
# CONFIG_DEBUG_FORCE_WEAK_PER_CPU is not set
CONFIG_MAGIC_SYSRQ=y
CONFIG_MAGIC_SYSRQ_DEFAULT_ENABLE=0x1
CONFIG_DEBUG_KERNEL=y
#
# Memory Debugging
#
# CONFIG_PAGE_EXTENSION is not set
# CONFIG_DEBUG_PAGEALLOC is not set
# CONFIG_PAGE_POISONING is not set
# CONFIG_DEBUG_OBJECTS is not set
# CONFIG_DEBUG_SLAB is not set
CONFIG_HAVE_DEBUG_KMEMLEAK=y
CONFIG_DEBUG_KMEMLEAK=y
CONFIG_DEBUG_KMEMLEAK_EARLY_LOG_SIZE=400
# CONFIG_DEBUG_KMEMLEAK_TEST is not set
# CONFIG_DEBUG_KMEMLEAK_DEFAULT_OFF is not set
# CONFIG_DEBUG_STACK_USAGE is not set
# CONFIG_DEBUG_VM is not set
# CONFIG_DEBUG_MEMORY_INIT is not set
# CONFIG_DEBUG_SHIRQ is not set
#
# Debug Lockups and Hangs
#
# CONFIG_LOCKUP_DETECTOR is not set
CONFIG_DETECT_HUNG_TASK=y
CONFIG_DEFAULT_HUNG_TASK_TIMEOUT=120
# CONFIG_BOOTPARAM_HUNG_TASK_PANIC is not set
CONFIG_BOOTPARAM_HUNG_TASK_PANIC_VALUE=0
# CONFIG_WQ_WATCHDOG is not set
# CONFIG_PANIC_ON_OOPS is not set
CONFIG_PANIC_ON_OOPS_VALUE=0
CONFIG_PANIC_TIMEOUT=0
CONFIG_SCHED_DEBUG=y
CONFIG_SCHED_INFO=y
CONFIG_SCHEDSTATS=y
# CONFIG_SCHED_STACK_END_CHECK is not set
# CONFIG_DEBUG_TIMEKEEPING is not set
# CONFIG_TIMER_STATS is not set
CONFIG_DEBUG_PREEMPT=y
#
# Lock Debugging (spinlocks, mutexes, etc...)
#
# CONFIG_DEBUG_RT_MUTEXES is not set
CONFIG_DEBUG_SPINLOCK=y
CONFIG_DEBUG_MUTEXES=y
# CONFIG_DEBUG_WW_MUTEX_SLOWPATH is not set
# CONFIG_DEBUG_LOCK_ALLOC is not set
# CONFIG_PROVE_LOCKING is not set
# CONFIG_LOCK_STAT is not set
# CONFIG_DEBUG_ATOMIC_SLEEP is not set
# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set
# CONFIG_LOCK_TORTURE_TEST is not set
CONFIG_STACKTRACE=y
# CONFIG_DEBUG_KOBJECT is not set
CONFIG_HAVE_DEBUG_BUGVERBOSE=y
CONFIG_DEBUG_BUGVERBOSE=y
# CONFIG_DEBUG_LIST is not set
# CONFIG_DEBUG_PI_LIST is not set
# CONFIG_DEBUG_SG is not set
# CONFIG_DEBUG_NOTIFIERS is not set
# CONFIG_DEBUG_CREDENTIALS is not set
#
# RCU Debugging
#
# CONFIG_PROVE_RCU is not set
# CONFIG_SPARSE_RCU_POINTER is not set
# CONFIG_TORTURE_TEST is not set
# CONFIG_RCU_PERF_TEST is not set
# CONFIG_RCU_TORTURE_TEST is not set
CONFIG_RCU_CPU_STALL_TIMEOUT=21
# CONFIG_RCU_TRACE is not set
# CONFIG_RCU_EQS_DEBUG is not set
# CONFIG_DEBUG_WQ_FORCE_RR_CPU is not set
# CONFIG_DEBUG_BLOCK_EXT_DEVT is not set
# CONFIG_NOTIFIER_ERROR_INJECTION is not set
# CONFIG_FAULT_INJECTION is not set
CONFIG_LATENCYTOP=y
CONFIG_HAVE_FUNCTION_TRACER=y
CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y
CONFIG_HAVE_DYNAMIC_FTRACE=y
CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y
CONFIG_HAVE_SYSCALL_TRACEPOINTS=y
CONFIG_TRACING_SUPPORT=y
# CONFIG_FTRACE is not set
#
# Runtime Testing
#
# CONFIG_LKDTM is not set
# CONFIG_TEST_LIST_SORT is not set
# CONFIG_BACKTRACE_SELF_TEST is not set
# CONFIG_RBTREE_TEST is not set
# CONFIG_INTERVAL_TREE_TEST is not set
# CONFIG_PERCPU_TEST is not set
# CONFIG_ATOMIC64_SELFTEST is not set
# CONFIG_TEST_HEXDUMP is not set
# CONFIG_TEST_STRING_HELPERS is not set
# CONFIG_TEST_KSTRTOX is not set
# CONFIG_TEST_PRINTF is not set
# CONFIG_TEST_BITMAP is not set
# CONFIG_TEST_UUID is not set
# CONFIG_TEST_RHASHTABLE is not set
# CONFIG_TEST_HASH is not set
# CONFIG_DMA_API_DEBUG is not set
# CONFIG_TEST_LKM is not set
# CONFIG_TEST_USER_COPY is not set
# CONFIG_TEST_BPF is not set
# CONFIG_TEST_FIRMWARE is not set
# CONFIG_TEST_UDELAY is not set
# CONFIG_MEMTEST is not set
# CONFIG_TEST_STATIC_KEYS is not set
# CONFIG_SAMPLES is not set
CONFIG_HAVE_ARCH_KGDB=y
# CONFIG_KGDB is not set
# CONFIG_UBSAN is not set
# CONFIG_SH_STANDARD_BIOS is not set
# CONFIG_STACK_DEBUG is not set
# CONFIG_4KSTACKS is not set
CONFIG_DUMP_CODE=y
# CONFIG_DWARF_UNWINDER is not set
# CONFIG_SH_NO_BSS_INIT is not set
#
# Security options
#
CONFIG_KEYS=y
# CONFIG_PERSISTENT_KEYRINGS is not set
# CONFIG_ENCRYPTED_KEYS is not set
# CONFIG_KEY_DH_OPERATIONS is not set
# CONFIG_SECURITY_DMESG_RESTRICT is not set
CONFIG_SECURITY=y
CONFIG_SECURITYFS=y
CONFIG_SECURITY_NETWORK=y
CONFIG_SECURITY_NETWORK_XFRM=y
CONFIG_SECURITY_PATH=y
CONFIG_HAVE_HARDENED_USERCOPY_ALLOCATOR=y
# CONFIG_SECURITY_SELINUX is not set
# CONFIG_SECURITY_SMACK is not set
CONFIG_SECURITY_TOMOYO=y
CONFIG_SECURITY_TOMOYO_MAX_ACCEPT_ENTRY=2048
CONFIG_SECURITY_TOMOYO_MAX_AUDIT_LOG=1024
# CONFIG_SECURITY_TOMOYO_OMIT_USERSPACE_LOADER is not set
CONFIG_SECURITY_TOMOYO_POLICY_LOADER="/sbin/tomoyo-init"
CONFIG_SECURITY_TOMOYO_ACTIVATION_TRIGGER="/sbin/init"
CONFIG_SECURITY_APPARMOR=y
CONFIG_SECURITY_APPARMOR_BOOTPARAM_VALUE=1
CONFIG_SECURITY_APPARMOR_HASH=y
CONFIG_SECURITY_APPARMOR_HASH_DEFAULT=y
# CONFIG_SECURITY_LOADPIN is not set
CONFIG_SECURITY_YAMA=y
CONFIG_INTEGRITY=y
# CONFIG_INTEGRITY_SIGNATURE is not set
CONFIG_INTEGRITY_AUDIT=y
# CONFIG_IMA is not set
# CONFIG_EVM is not set
# CONFIG_DEFAULT_SECURITY_TOMOYO is not set
# CONFIG_DEFAULT_SECURITY_APPARMOR is not set
CONFIG_DEFAULT_SECURITY_DAC=y
CONFIG_DEFAULT_SECURITY=""
CONFIG_CRYPTO=y
#
# Crypto core or helper
#
CONFIG_CRYPTO_ALGAPI=y
CONFIG_CRYPTO_ALGAPI2=y
CONFIG_CRYPTO_AEAD=m
CONFIG_CRYPTO_AEAD2=y
CONFIG_CRYPTO_BLKCIPHER=m
CONFIG_CRYPTO_BLKCIPHER2=y
CONFIG_CRYPTO_HASH=y
CONFIG_CRYPTO_HASH2=y
CONFIG_CRYPTO_RNG=m
CONFIG_CRYPTO_RNG2=y
CONFIG_CRYPTO_RNG_DEFAULT=m
CONFIG_CRYPTO_AKCIPHER2=y
CONFIG_CRYPTO_KPP2=y
# CONFIG_CRYPTO_RSA is not set
# CONFIG_CRYPTO_DH is not set
# CONFIG_CRYPTO_ECDH is not set
CONFIG_CRYPTO_MANAGER=y
CONFIG_CRYPTO_MANAGER2=y
# CONFIG_CRYPTO_USER is not set
CONFIG_CRYPTO_MANAGER_DISABLE_TESTS=y
# CONFIG_CRYPTO_GF128MUL is not set
CONFIG_CRYPTO_NULL=m
CONFIG_CRYPTO_NULL2=y
CONFIG_CRYPTO_WORKQUEUE=y
# CONFIG_CRYPTO_CRYPTD is not set
# CONFIG_CRYPTO_MCRYPTD is not set
# CONFIG_CRYPTO_AUTHENC is not set
# CONFIG_CRYPTO_TEST is not set
#
# Authenticated Encryption with Associated Data
#
# CONFIG_CRYPTO_CCM is not set
# CONFIG_CRYPTO_GCM is not set
# CONFIG_CRYPTO_CHACHA20POLY1305 is not set
# CONFIG_CRYPTO_SEQIV is not set
CONFIG_CRYPTO_ECHAINIV=m
#
# Block modes
#
CONFIG_CRYPTO_CBC=m
# CONFIG_CRYPTO_CTR is not set
# CONFIG_CRYPTO_CTS is not set
CONFIG_CRYPTO_ECB=m
# CONFIG_CRYPTO_LRW is not set
# CONFIG_CRYPTO_PCBC is not set
# CONFIG_CRYPTO_XTS is not set
# CONFIG_CRYPTO_KEYWRAP is not set
#
# Hash modes
#
# CONFIG_CRYPTO_CMAC is not set
CONFIG_CRYPTO_HMAC=y
# CONFIG_CRYPTO_XCBC is not set
# CONFIG_CRYPTO_VMAC is not set
#
# Digest
#
CONFIG_CRYPTO_CRC32C=y
# CONFIG_CRYPTO_CRC32 is not set
# CONFIG_CRYPTO_CRCT10DIF is not set
# CONFIG_CRYPTO_GHASH is not set
# CONFIG_CRYPTO_POLY1305 is not set
# CONFIG_CRYPTO_MD4 is not set
# CONFIG_CRYPTO_MD5 is not set
# CONFIG_CRYPTO_MICHAEL_MIC is not set
# CONFIG_CRYPTO_RMD128 is not set
# CONFIG_CRYPTO_RMD160 is not set
# CONFIG_CRYPTO_RMD256 is not set
# CONFIG_CRYPTO_RMD320 is not set
CONFIG_CRYPTO_SHA1=y
CONFIG_CRYPTO_SHA256=m
# CONFIG_CRYPTO_SHA512 is not set
# CONFIG_CRYPTO_SHA3 is not set
# CONFIG_CRYPTO_TGR192 is not set
# CONFIG_CRYPTO_WP512 is not set
#
# Ciphers
#
CONFIG_CRYPTO_AES=y
# CONFIG_CRYPTO_ANUBIS is not set
CONFIG_CRYPTO_ARC4=m
# CONFIG_CRYPTO_BLOWFISH is not set
# CONFIG_CRYPTO_CAMELLIA is not set
# CONFIG_CRYPTO_CAST5 is not set
# CONFIG_CRYPTO_CAST6 is not set
# CONFIG_CRYPTO_DES is not set
# CONFIG_CRYPTO_FCRYPT is not set
# CONFIG_CRYPTO_KHAZAD is not set
# CONFIG_CRYPTO_SALSA20 is not set
# CONFIG_CRYPTO_CHACHA20 is not set
# CONFIG_CRYPTO_SEED is not set
# CONFIG_CRYPTO_SERPENT is not set
# CONFIG_CRYPTO_TEA is not set
# CONFIG_CRYPTO_TWOFISH is not set
#
# Compression
#
# CONFIG_CRYPTO_DEFLATE is not set
CONFIG_CRYPTO_LZO=y
# CONFIG_CRYPTO_842 is not set
# CONFIG_CRYPTO_LZ4 is not set
# CONFIG_CRYPTO_LZ4HC is not set
#
# Random Number Generation
#
# CONFIG_CRYPTO_ANSI_CPRNG is not set
CONFIG_CRYPTO_DRBG_MENU=m
CONFIG_CRYPTO_DRBG_HMAC=y
# CONFIG_CRYPTO_DRBG_HASH is not set
CONFIG_CRYPTO_DRBG=m
CONFIG_CRYPTO_JITTERENTROPY=m
CONFIG_CRYPTO_USER_API=m
CONFIG_CRYPTO_USER_API_HASH=m
CONFIG_CRYPTO_USER_API_SKCIPHER=m
# CONFIG_CRYPTO_USER_API_RNG is not set
# CONFIG_CRYPTO_USER_API_AEAD is not set
# CONFIG_CRYPTO_HW is not set
# CONFIG_ASYMMETRIC_KEY_TYPE is not set
#
# Certificates for signature checking
#
# CONFIG_BINARY_PRINTF is not set
#
# Library routines
#
CONFIG_BITREVERSE=y
# CONFIG_HAVE_ARCH_BITREVERSE is not set
CONFIG_GENERIC_STRNCPY_FROM_USER=y
CONFIG_GENERIC_STRNLEN_USER=y
CONFIG_GENERIC_NET_UTILS=y
CONFIG_NO_GENERIC_PCI_IOPORT_MAP=y
CONFIG_GENERIC_PCI_IOMAP=y
CONFIG_GENERIC_IO=y
CONFIG_CRC_CCITT=m
CONFIG_CRC16=y
# CONFIG_CRC_T10DIF is not set
# CONFIG_CRC_ITU_T is not set
CONFIG_CRC32=y
# CONFIG_CRC32_SELFTEST is not set
CONFIG_CRC32_SLICEBY8=y
# CONFIG_CRC32_SLICEBY4 is not set
# CONFIG_CRC32_SARWATE is not set
# CONFIG_CRC32_BIT is not set
# CONFIG_CRC7 is not set
# CONFIG_LIBCRC32C is not set
# CONFIG_CRC8 is not set
CONFIG_AUDIT_GENERIC=y
# CONFIG_AUDIT_ARCH_COMPAT_GENERIC is not set
# CONFIG_RANDOM32_SELFTEST is not set
CONFIG_ZLIB_INFLATE=m
CONFIG_ZLIB_DEFLATE=m
CONFIG_LZO_COMPRESS=y
CONFIG_LZO_DECOMPRESS=y
# CONFIG_XZ_DEC is not set
# CONFIG_XZ_DEC_BCJ is not set
CONFIG_ASSOCIATIVE_ARRAY=y
CONFIG_HAS_IOMEM=y
CONFIG_HAS_IOPORT_MAP=y
CONFIG_HAS_DMA=y
CONFIG_DQL=y
CONFIG_NLATTR=y
CONFIG_GENERIC_ATOMIC64=y
CONFIG_ARCH_HAS_ATOMIC64_DEC_IF_POSITIVE=y
# CONFIG_CORDIC is not set
# CONFIG_DDR is not set
# CONFIG_IRQ_POLL is not set
CONFIG_OID_REGISTRY=y
# CONFIG_SG_SPLIT is not set
CONFIG_SG_POOL=y
# CONFIG_ARCH_HAS_SG_CHAIN is not set
^ permalink raw reply [flat|nested] 138+ messages in thread
* Re: [J-core] [PATCH v5 00/22] sh: LANDISK and R2Dplus convert to device tree
2018-05-03 10:07 ` John Paul Adrian Glaubitz
@ 2018-05-03 15:41 ` Rich Felker
-1 siblings, 0 replies; 138+ messages in thread
From: Rich Felker @ 2018-05-03 15:41 UTC (permalink / raw)
To: John Paul Adrian Glaubitz
Cc: Rob Landley, Yoshinori Sato, linux-sh, linux-kernel
On Thu, May 03, 2018 at 12:07:38PM +0200, John Paul Adrian Glaubitz wrote:
> Hi Rich!
>
> On 05/03/2018 04:33 AM, Rich Felker wrote:
> >I found the U-Boot stuff here:
> >
> >https://ja.osdn.net/users/ysato/pf/uboot/wiki/FrontPage
> >
> >but I'm not sure how to install it yet. Will try to figure it out.
>
> Interesting. It seems the HDL-160U uses u-boot instead of lilo which
> is used on my USL-5P. Both are based on the LANDISK platform though.
> I wonder whether it is possible to convert the USL-5P to use u-boot
> instead of the very limited lilo.
>
> As for the kernel configuration, for USL-5P, I had to use the kernel
> configuration attached to this mail. One important configuration setting
> is CONFIG_SH_PCLK_FREQ which has to be set to "33250000" otherwise
> the kernel won't boot properly.
>
> I still have my USL-5P ready to be set up for testing a new kernel
> image with the device tree patches merged. Although I still don't
> know how to enable the internal (pseudo) IDE controller.
>
> @Yoshinori:
>
> Did the HDL-160U LANDISK device you have use u-boot by default or
> did you convert it from lilo?
The above U-Boot seems to be a version that's installed in the MBR and
then loads a second-stage program (from where, though?). It's not a
flash rom replacement as far as I can tell -- at least I never did
anything with the flash, and I think before I loaded this disk image,
it was using lilo. I probably still have the original drive that was
in it, with whatever that was booting from.
Rich
^ permalink raw reply [flat|nested] 138+ messages in thread
* Re: [J-core] [PATCH v5 00/22] sh: LANDISK and R2Dplus convert to device tree
@ 2018-05-03 15:41 ` Rich Felker
0 siblings, 0 replies; 138+ messages in thread
From: Rich Felker @ 2018-05-03 15:41 UTC (permalink / raw)
To: John Paul Adrian Glaubitz
Cc: Rob Landley, Yoshinori Sato, linux-sh, linux-kernel
On Thu, May 03, 2018 at 12:07:38PM +0200, John Paul Adrian Glaubitz wrote:
> Hi Rich!
>
> On 05/03/2018 04:33 AM, Rich Felker wrote:
> >I found the U-Boot stuff here:
> >
> >https://ja.osdn.net/users/ysato/pf/uboot/wiki/FrontPage
> >
> >but I'm not sure how to install it yet. Will try to figure it out.
>
> Interesting. It seems the HDL-160U uses u-boot instead of lilo which
> is used on my USL-5P. Both are based on the LANDISK platform though.
> I wonder whether it is possible to convert the USL-5P to use u-boot
> instead of the very limited lilo.
>
> As for the kernel configuration, for USL-5P, I had to use the kernel
> configuration attached to this mail. One important configuration setting
> is CONFIG_SH_PCLK_FREQ which has to be set to "33250000" otherwise
> the kernel won't boot properly.
>
> I still have my USL-5P ready to be set up for testing a new kernel
> image with the device tree patches merged. Although I still don't
> know how to enable the internal (pseudo) IDE controller.
>
> @Yoshinori:
>
> Did the HDL-160U LANDISK device you have use u-boot by default or
> did you convert it from lilo?
The above U-Boot seems to be a version that's installed in the MBR and
then loads a second-stage program (from where, though?). It's not a
flash rom replacement as far as I can tell -- at least I never did
anything with the flash, and I think before I loaded this disk image,
it was using lilo. I probably still have the original drive that was
in it, with whatever that was booting from.
Rich
^ permalink raw reply [flat|nested] 138+ messages in thread
* Re: [J-core] [PATCH v5 00/22] sh: LANDISK and R2Dplus convert to device tree
2018-05-03 10:07 ` John Paul Adrian Glaubitz
@ 2018-05-07 1:40 ` Yoshinori Sato
-1 siblings, 0 replies; 138+ messages in thread
From: Yoshinori Sato @ 2018-05-07 1:40 UTC (permalink / raw)
To: John Paul Adrian Glaubitz
Cc: Rich Felker, Rob Landley, linux-sh, linux-kernel
On Thu, 03 May 2018 19:07:38 +0900,
John Paul Adrian Glaubitz wrote:
>
> [1 <text/plain; utf-8 (7bit)>]
> Hi Rich!
>
> On 05/03/2018 04:33 AM, Rich Felker wrote:
> > I found the U-Boot stuff here:
> >
> > https://ja.osdn.net/users/ysato/pf/uboot/wiki/FrontPage
> >
> > but I'm not sure how to install it yet. Will try to figure it out.
>
> Interesting. It seems the HDL-160U uses u-boot instead of lilo which
> is used on my USL-5P. Both are based on the LANDISK platform though.
> I wonder whether it is possible to convert the USL-5P to use u-boot
> instead of the very limited lilo.
>
> As for the kernel configuration, for USL-5P, I had to use the kernel
> configuration attached to this mail. One important configuration setting
> is CONFIG_SH_PCLK_FREQ which has to be set to "33250000" otherwise
> the kernel won't boot properly.
>
> I still have my USL-5P ready to be set up for testing a new kernel
> image with the device tree patches merged. Although I still don't
> know how to enable the internal (pseudo) IDE controller.
>
> @Yoshinori:
>
> Did the HDL-160U LANDISK device you have use u-boot by default or
> did you convert it from lilo?
Yes.
Replace sh-lilo's second stage with u-boot.
With this method it is unnecessary to rewrite Flash for boot.
> Adrian
>
> --
> .''`. John Paul Adrian Glaubitz
> : :' : Debian Developer - glaubitz@debian.org
> `. `' Freie Universitaet Berlin - glaubitz@physik.fu-berlin.de
> `- GPG: 62FF 8A75 84E0 2956 9546 0006 7426 3B37 F5B5 F913
> [2 config-usl-5p-4.8.12.txt <text/plain; UTF-8 (base64)>]
> #
> # Automatically generated file; DO NOT EDIT.
> # Linux/sh 4.8.12 Kernel Configuration
> #
> CONFIG_SUPERH=y
> CONFIG_SUPERH32=y
> # CONFIG_SUPERH64 is not set
> CONFIG_ARCH_DEFCONFIG="arch/sh/configs/shx3_defconfig"
> CONFIG_RWSEM_GENERIC_SPINLOCK=y
> CONFIG_GENERIC_BUG=y
> CONFIG_GENERIC_HWEIGHT=y
> # CONFIG_ARCH_SUSPEND_POSSIBLE is not set
> CONFIG_ARCH_HIBERNATION_POSSIBLE=y
> CONFIG_SYS_SUPPORTS_HUGETLBFS=y
> CONFIG_SYS_SUPPORTS_PCI=y
> CONFIG_STACKTRACE_SUPPORT=y
> CONFIG_LOCKDEP_SUPPORT=y
> # CONFIG_ARCH_HAS_ILOG2_U32 is not set
> # CONFIG_ARCH_HAS_ILOG2_U64 is not set
> # CONFIG_NO_IOPORT_MAP is not set
> CONFIG_DMA_NONCOHERENT=y
> CONFIG_NEED_DMA_MAP_STATE=y
> CONFIG_NEED_SG_DMA_LENGTH=y
> CONFIG_PGTABLE_LEVELS=2
> CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
> CONFIG_CONSTRUCTORS=y
> CONFIG_IRQ_WORK=y
>
> #
> # General setup
> #
> CONFIG_BROKEN_ON_SMP=y
> CONFIG_INIT_ENV_ARG_LIMIT2
> CONFIG_CROSS_COMPILE=""
> # CONFIG_COMPILE_TEST is not set
> CONFIG_LOCALVERSION=""
> CONFIG_LOCALVERSION_AUTO=y
> CONFIG_HAVE_KERNEL_GZIP=y
> CONFIG_HAVE_KERNEL_BZIP2=y
> CONFIG_HAVE_KERNEL_LZMA=y
> CONFIG_HAVE_KERNEL_XZ=y
> CONFIG_HAVE_KERNEL_LZO=y
> CONFIG_KERNEL_GZIP=y
> # CONFIG_KERNEL_BZIP2 is not set
> # CONFIG_KERNEL_LZMA is not set
> # CONFIG_KERNEL_XZ is not set
> # CONFIG_KERNEL_LZO is not set
> CONFIG_DEFAULT_HOSTNAME="(none)"
> CONFIG_SWAP=y
> CONFIG_SYSVIPC=y
> CONFIG_SYSVIPC_SYSCTL=y
> CONFIG_POSIX_MQUEUE=y
> CONFIG_POSIX_MQUEUE_SYSCTL=y
> CONFIG_CROSS_MEMORY_ATTACH=y
> CONFIG_FHANDLE=y
> CONFIG_USELIB=y
> CONFIG_AUDIT=y
> CONFIG_HAVE_ARCH_AUDITSYSCALL=y
> CONFIG_AUDITSYSCALL=y
> CONFIG_AUDIT_WATCH=y
> CONFIG_AUDIT_TREE=y
>
> #
> # IRQ subsystem
> #
> CONFIG_MAY_HAVE_SPARSE_IRQ=y
> CONFIG_GENERIC_IRQ_SHOW=y
> CONFIG_IRQ_DOMAIN=y
> # CONFIG_IRQ_DOMAIN_DEBUG is not set
> CONFIG_IRQ_FORCED_THREADING=y
> CONFIG_SPARSE_IRQ=y
> CONFIG_GENERIC_CLOCKEVENTS=y
>
> #
> # Timers subsystem
> #
> CONFIG_TICK_ONESHOT=y
> CONFIG_NO_HZ_COMMON=y
> # CONFIG_HZ_PERIODIC is not set
> CONFIG_NO_HZ_IDLE=y
> CONFIG_NO_HZ=y
> CONFIG_HIGH_RES_TIMERS=y
>
> #
> # CPU/Task time and stats accounting
> #
> CONFIG_TICK_CPU_ACCOUNTING=y
> CONFIG_BSD_PROCESS_ACCT=y
> # CONFIG_BSD_PROCESS_ACCT_V3 is not set
> # CONFIG_TASKSTATS is not set
>
> #
> # RCU Subsystem
> #
> CONFIG_PREEMPT_RCU=y
> # CONFIG_RCU_EXPERT is not set
> CONFIG_SRCU=y
> # CONFIG_TASKS_RCU is not set
> CONFIG_RCU_STALL_COMMON=y
> # CONFIG_TREE_RCU_TRACE is not set
> # CONFIG_RCU_EXPEDITE_BOOT is not set
> CONFIG_BUILD_BIN2C=y
> CONFIG_IKCONFIG=y
> CONFIG_IKCONFIG_PROC=y
> CONFIG_LOG_BUF_SHIFT\x16
> CONFIG_NMI_LOG_BUF_SHIFT\x13
> CONFIG_GENERIC_SCHED_CLOCK=y
> CONFIG_CGROUPS=y
> # CONFIG_MEMCG is not set
> # CONFIG_BLK_CGROUP is not set
> CONFIG_CGROUP_SCHED=y
> CONFIG_FAIR_GROUP_SCHED=y
> # CONFIG_CFS_BANDWIDTH is not set
> # CONFIG_RT_GROUP_SCHED is not set
> # CONFIG_CGROUP_PIDS is not set
> CONFIG_CGROUP_FREEZER=y
> # CONFIG_CGROUP_HUGETLB is not set
> CONFIG_CPUSETS=y
> CONFIG_PROC_PID_CPUSET=y
> CONFIG_CGROUP_DEVICE=y
> CONFIG_CGROUP_CPUACCT=y
> CONFIG_CGROUP_PERF=y
> # CONFIG_CGROUP_DEBUG is not set
> # CONFIG_CHECKPOINT_RESTORE is not set
> # CONFIG_NAMESPACES is not set
> # CONFIG_SCHED_AUTOGROUP is not set
> # CONFIG_SYSFS_DEPRECATED is not set
> # CONFIG_RELAY is not set
> # CONFIG_BLK_DEV_INITRD is not set
> CONFIG_CC_OPTIMIZE_FOR_PERFORMANCE=y
> # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
> CONFIG_SYSCTL=y
> CONFIG_ANON_INODES=y
> CONFIG_HAVE_UID16=y
> CONFIG_BPF=y
> CONFIG_EXPERT=y
> CONFIG_UID16=y
> CONFIG_MULTIUSER=y
> CONFIG_SGETMASK_SYSCALL=y
> CONFIG_SYSFS_SYSCALL=y
> # CONFIG_SYSCTL_SYSCALL is not set
> CONFIG_KALLSYMS=y
> CONFIG_KALLSYMS_ALL=y
> # CONFIG_KALLSYMS_ABSOLUTE_PERCPU is not set
> CONFIG_KALLSYMS_BASE_RELATIVE=y
> CONFIG_PRINTK=y
> CONFIG_PRINTK_NMI=y
> CONFIG_BUG=y
> CONFIG_ELF_CORE=y
> CONFIG_BASE_FULL=y
> CONFIG_FUTEX=y
> CONFIG_HAVE_FUTEX_CMPXCHG=y
> CONFIG_EPOLL=y
> CONFIG_SIGNALFD=y
> CONFIG_TIMERFD=y
> CONFIG_EVENTFD=y
> # CONFIG_BPF_SYSCALL is not set
> CONFIG_SHMEM=y
> CONFIG_AIO=y
> CONFIG_ADVISE_SYSCALLS=y
> # CONFIG_USERFAULTFD is not set
> CONFIG_PCI_QUIRKS=y
> CONFIG_MEMBARRIER=y
> # CONFIG_EMBEDDED is not set
> CONFIG_HAVE_PERF_EVENTS=y
> CONFIG_PERF_USE_VMALLOC=y
>
> #
> # Kernel Performance Events And Counters
> #
> CONFIG_PERF_EVENTS=y
> # CONFIG_DEBUG_PERF_USE_VMALLOC is not set
> CONFIG_VM_EVENT_COUNTERS=y
> # CONFIG_COMPAT_BRK is not set
> CONFIG_SLAB=y
> # CONFIG_SLUB is not set
> # CONFIG_SLOB is not set
> # CONFIG_SLAB_FREELIST_RANDOM is not set
> # CONFIG_SYSTEM_DATA_VERIFICATION is not set
> CONFIG_PROFILING=y
> # CONFIG_OPROFILE is not set
> CONFIG_HAVE_OPROFILE=y
> # CONFIG_KPROBES is not set
> # CONFIG_UPROBES is not set
> # CONFIG_HAVE_64BIT_ALIGNED_ACCESS is not set
> CONFIG_HAVE_IOREMAP_PROT=y
> CONFIG_HAVE_KPROBES=y
> CONFIG_HAVE_KRETPROBES=y
> CONFIG_HAVE_NMI=y
> CONFIG_HAVE_ARCH_TRACEHOOK=y
> CONFIG_GENERIC_SMP_IDLE_THREAD=y
> CONFIG_GENERIC_IDLE_POLL_SETUP=y
> CONFIG_HAVE_REGS_AND_STACK_ACCESS_API=y
> CONFIG_HAVE_CLK=y
> CONFIG_HAVE_DMA_API_DEBUG=y
> CONFIG_HAVE_HW_BREAKPOINT=y
> CONFIG_HAVE_MIXED_BREAKPOINTS_REGS=y
> CONFIG_ARCH_WANT_IPC_PARSE_VERSION=y
> CONFIG_HAVE_CC_STACKPROTECTOR=y
> # CONFIG_CC_STACKPROTECTOR is not set
> CONFIG_CC_STACKPROTECTOR_NONE=y
> # CONFIG_CC_STACKPROTECTOR_REGULAR is not set
> # CONFIG_CC_STACKPROTECTOR_STRONG is not set
> CONFIG_MODULES_USE_ELF_RELA=y
> # CONFIG_HAVE_ARCH_HASH is not set
> # CONFIG_ISA_BUS_API is not set
> CONFIG_OLD_SIGSUSPEND=y
> CONFIG_OLD_SIGACTION=y
> CONFIG_CPU_NO_EFFICIENT_FFS=y
>
> #
> # GCOV-based kernel profiling
> #
> CONFIG_GCOV_KERNEL=y
> CONFIG_ARCH_HAS_GCOV_PROFILE_ALL=y
> # CONFIG_GCOV_PROFILE_ALL is not set
> CONFIG_GCOV_FORMAT_AUTODETECT=y
> # CONFIG_GCOV_FORMAT_3_4 is not set
> # CONFIG_GCOV_FORMAT_4_7 is not set
> CONFIG_HAVE_GENERIC_DMA_COHERENT=y
> CONFIG_SLABINFO=y
> CONFIG_RT_MUTEXES=y
> CONFIG_BASE_SMALL=0
> CONFIG_MODULES=y
> # CONFIG_MODULE_FORCE_LOAD is not set
> CONFIG_MODULE_UNLOAD=y
> # CONFIG_MODULE_FORCE_UNLOAD is not set
> # CONFIG_MODVERSIONS is not set
> # CONFIG_MODULE_SRCVERSION_ALL is not set
> # CONFIG_MODULE_SIG is not set
> # CONFIG_MODULE_COMPRESS is not set
> # CONFIG_TRIM_UNUSED_KSYMS is not set
> CONFIG_MODULES_TREE_LOOKUP=y
> CONFIG_BLOCK=y
> CONFIG_LBDAF=y
> CONFIG_BLK_DEV_BSG=y
> # CONFIG_BLK_DEV_BSGLIB is not set
> # CONFIG_BLK_DEV_INTEGRITY is not set
> # CONFIG_BLK_CMDLINE_PARSER is not set
>
> #
> # Partition Types
> #
> CONFIG_PARTITION_ADVANCED=y
> # CONFIG_ACORN_PARTITION is not set
> # CONFIG_AIX_PARTITION is not set
> # CONFIG_OSF_PARTITION is not set
> # CONFIG_AMIGA_PARTITION is not set
> # CONFIG_ATARI_PARTITION is not set
> # CONFIG_MAC_PARTITION is not set
> CONFIG_MSDOS_PARTITION=y
> # CONFIG_BSD_DISKLABEL is not set
> # CONFIG_MINIX_SUBPARTITION is not set
> # CONFIG_SOLARIS_X86_PARTITION is not set
> # CONFIG_UNIXWARE_DISKLABEL is not set
> # CONFIG_LDM_PARTITION is not set
> # CONFIG_SGI_PARTITION is not set
> # CONFIG_ULTRIX_PARTITION is not set
> # CONFIG_SUN_PARTITION is not set
> # CONFIG_KARMA_PARTITION is not set
> CONFIG_EFI_PARTITION=y
> # CONFIG_SYSV68_PARTITION is not set
> # CONFIG_CMDLINE_PARTITION is not set
>
> #
> # IO Schedulers
> #
> CONFIG_IOSCHED_NOOP=y
> CONFIG_IOSCHED_DEADLINE=y
> CONFIG_IOSCHED_CFQ=y
> # CONFIG_DEFAULT_DEADLINE is not set
> CONFIG_DEFAULT_CFQ=y
> # CONFIG_DEFAULT_NOOP is not set
> CONFIG_DEFAULT_IOSCHED="cfq"
> CONFIG_UNINLINE_SPIN_UNLOCK=y
> CONFIG_FREEZER=y
>
> #
> # System type
> #
> CONFIG_CPU_SH4=y
> CONFIG_CPU_HAS_PMU=y
> # CONFIG_CPU_SUBTYPE_SH7619 is not set
> # CONFIG_CPU_SUBTYPE_J2 is not set
> # CONFIG_CPU_SUBTYPE_SH7201 is not set
> # CONFIG_CPU_SUBTYPE_SH7203 is not set
> # CONFIG_CPU_SUBTYPE_SH7206 is not set
> # CONFIG_CPU_SUBTYPE_SH7263 is not set
> # CONFIG_CPU_SUBTYPE_SH7264 is not set
> # CONFIG_CPU_SUBTYPE_SH7269 is not set
> # CONFIG_CPU_SUBTYPE_MXG is not set
> # CONFIG_CPU_SUBTYPE_SH7705 is not set
> # CONFIG_CPU_SUBTYPE_SH7706 is not set
> # CONFIG_CPU_SUBTYPE_SH7707 is not set
> # CONFIG_CPU_SUBTYPE_SH7708 is not set
> # CONFIG_CPU_SUBTYPE_SH7709 is not set
> # CONFIG_CPU_SUBTYPE_SH7710 is not set
> # CONFIG_CPU_SUBTYPE_SH7712 is not set
> # CONFIG_CPU_SUBTYPE_SH7720 is not set
> # CONFIG_CPU_SUBTYPE_SH7721 is not set
> # CONFIG_CPU_SUBTYPE_SH7750 is not set
> # CONFIG_CPU_SUBTYPE_SH7091 is not set
> # CONFIG_CPU_SUBTYPE_SH7750R is not set
> # CONFIG_CPU_SUBTYPE_SH7750S is not set
> # CONFIG_CPU_SUBTYPE_SH7751 is not set
> CONFIG_CPU_SUBTYPE_SH7751R=y
> # CONFIG_CPU_SUBTYPE_SH7760 is not set
> # CONFIG_CPU_SUBTYPE_SH4_202 is not set
> # CONFIG_CPU_SUBTYPE_SH7723 is not set
> # CONFIG_CPU_SUBTYPE_SH7724 is not set
> # CONFIG_CPU_SUBTYPE_SH7734 is not set
> # CONFIG_CPU_SUBTYPE_SH7757 is not set
> # CONFIG_CPU_SUBTYPE_SH7763 is not set
> # CONFIG_CPU_SUBTYPE_SH7770 is not set
> # CONFIG_CPU_SUBTYPE_SH7780 is not set
> # CONFIG_CPU_SUBTYPE_SH7785 is not set
> # CONFIG_CPU_SUBTYPE_SH7786 is not set
> # CONFIG_CPU_SUBTYPE_SHX3 is not set
> # CONFIG_CPU_SUBTYPE_SH7343 is not set
> # CONFIG_CPU_SUBTYPE_SH7722 is not set
> # CONFIG_CPU_SUBTYPE_SH7366 is not set
>
> #
> # Memory management options
> #
> CONFIG_QUICKLIST=y
> CONFIG_MMU=y
> CONFIG_PAGE_OFFSET=0x80000000
> CONFIG_FORCE_MAX_ZONEORDER\x11
> CONFIG_MEMORY_START=0xc000000
> CONFIG_MEMORY_SIZE=0x4000000
> CONFIG_29BIT=y
> CONFIG_VSYSCALL=y
> CONFIG_ARCH_FLATMEM_ENABLE=y
> CONFIG_ARCH_SPARSEMEM_ENABLE=y
> CONFIG_ARCH_SPARSEMEM_DEFAULT=y
> CONFIG_ARCH_SELECT_MEMORY_MODEL=y
> CONFIG_ARCH_ENABLE_MEMORY_HOTPLUG=y
> CONFIG_ARCH_ENABLE_MEMORY_HOTREMOVE=y
> CONFIG_UNCACHED_MAPPING=y
> CONFIG_PAGE_SIZE_4KB=y
> # CONFIG_PAGE_SIZE_64KB is not set
> # CONFIG_HUGETLB_PAGE_SIZE_64K is not set
> CONFIG_HUGETLB_PAGE_SIZE_1MB=y
> CONFIG_SELECT_MEMORY_MODEL=y
> # CONFIG_FLATMEM_MANUAL is not set
> CONFIG_SPARSEMEM_MANUAL=y
> CONFIG_SPARSEMEM=y
> CONFIG_HAVE_MEMORY_PRESENT=y
> CONFIG_SPARSEMEM_STATIC=y
> CONFIG_HAVE_MEMBLOCK=y
> CONFIG_HAVE_MEMBLOCK_NODE_MAP=y
> CONFIG_ARCH_DISCARD_MEMBLOCK=y
> # CONFIG_HAVE_BOOTMEM_INFO_NODE is not set
> # CONFIG_MEMORY_HOTPLUG is not set
> CONFIG_SPLIT_PTLOCK_CPUS=4
> # CONFIG_COMPACTION is not set
> CONFIG_MIGRATION=y
> # CONFIG_PHYS_ADDR_T_64BIT is not set
> CONFIG_NR_QUICK=1
> # CONFIG_KSM is not set
> CONFIG_DEFAULT_MMAP_MIN_ADDR@96
> CONFIG_NEED_PER_CPU_KM=y
> # CONFIG_CLEANCACHE is not set
> # CONFIG_FRONTSWAP is not set
> # CONFIG_CMA is not set
> # CONFIG_ZPOOL is not set
> # CONFIG_ZBUD is not set
> # CONFIG_ZSMALLOC is not set
> # CONFIG_IDLE_PAGE_TRACKING is not set
>
> #
> # Cache configuration
> #
> CONFIG_CACHE_WRITEBACK=y
> # CONFIG_CACHE_WRITETHROUGH is not set
> # CONFIG_CACHE_OFF is not set
>
> #
> # Processor features
> #
> CONFIG_CPU_LITTLE_ENDIAN=y
> # CONFIG_CPU_BIG_ENDIAN is not set
> CONFIG_SH_FPU=y
> CONFIG_SH_STORE_QUEUES=y
> CONFIG_CPU_HAS_INTEVT=y
> CONFIG_CPU_HAS_SR_RB=y
> CONFIG_CPU_HAS_FPU=y
>
> #
> # Board support
> #
> # CONFIG_SH_DEVICE_TREE is not set
> # CONFIG_SH_SECUREEDGE5410 is not set
> # CONFIG_SH_RTS7751R2D is not set
> CONFIG_SH_LANDISK=y
> # CONFIG_SH_TITAN is not set
> # CONFIG_SH_LBOX_RE2 is not set
>
> #
> # Timer and clock configuration
> #
> CONFIG_SH_PCLK_FREQ3250000
> CONFIG_SH_CLK_CPG=y
> CONFIG_SH_CLK_CPG_LEGACY=y
>
> #
> # CPU Frequency scaling
> #
>
> #
> # CPU Frequency scaling
> #
> CONFIG_CPU_FREQ=y
> CONFIG_CPU_FREQ_GOV_ATTR_SET=y
> CONFIG_CPU_FREQ_GOV_COMMON=y
> CONFIG_CPU_FREQ_STAT=y
> CONFIG_CPU_FREQ_STAT_DETAILS=y
> # CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE is not set
> # CONFIG_CPU_FREQ_DEFAULT_GOV_POWERSAVE is not set
> # CONFIG_CPU_FREQ_DEFAULT_GOV_USERSPACE is not set
> CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND=y
> # CONFIG_CPU_FREQ_DEFAULT_GOV_CONSERVATIVE is not set
> CONFIG_CPU_FREQ_GOV_PERFORMANCE=y
> # CONFIG_CPU_FREQ_GOV_POWERSAVE is not set
> # CONFIG_CPU_FREQ_GOV_USERSPACE is not set
> CONFIG_CPU_FREQ_GOV_ONDEMAND=y
> # CONFIG_CPU_FREQ_GOV_CONSERVATIVE is not set
>
> #
> # CPU frequency scaling drivers
> #
> CONFIG_SH_CPU_FREQ=y
>
> #
> # DMA support
> #
> CONFIG_SH_DMA=y
> CONFIG_SH_DMA_IRQ_MULTI=y
> CONFIG_SH_DMA_API=y
> CONFIG_NR_ONCHIP_DMA_CHANNELS=8
>
> #
> # Companion Chips
> #
>
> #
> # Additional SuperH Device Drivers
> #
> CONFIG_HEARTBEAT=y
> CONFIG_PUSH_SWITCH=y
>
> #
> # Kernel features
> #
> # CONFIG_HZ_100 is not set
> CONFIG_HZ_250=y
> # CONFIG_HZ_300 is not set
> # CONFIG_HZ_1000 is not set
> CONFIG_HZ%0
> CONFIG_SCHED_HRTICK=y
> # CONFIG_KEXEC is not set
> # CONFIG_CRASH_DUMP is not set
> CONFIG_PHYSICAL_START=0xc000000
> CONFIG_SECCOMP=y
> # CONFIG_PREEMPT_NONE is not set
> # CONFIG_PREEMPT_VOLUNTARY is not set
> CONFIG_PREEMPT=y
> CONFIG_PREEMPT_COUNT=y
> CONFIG_GUSA=y
> # CONFIG_GUSA_RB is not set
> CONFIG_HW_PERF_EVENTS=y
>
> #
> # SuperH / SH-Mobile Driver Options
> #
> CONFIG_SH_INTC=y
>
> #
> # Interrupt controller options
> #
> # CONFIG_INTC_MAPPING_DEBUG is not set
>
> #
> # Boot options
> #
> CONFIG_ZERO_PAGE_OFFSET=0x00001000
> CONFIG_BOOT_LINK_OFFSET=0x00800000
> CONFIG_ENTRY_OFFSET=0x00001000
>
> #
> # Bus options
> #
> CONFIG_PCI=y
> CONFIG_PCI_DOMAINS=y
> # CONFIG_PCIEPORTBUS is not set
> # CONFIG_PCI_MSI is not set
> CONFIG_PCI_DEBUG=y
> # CONFIG_PCI_REALLOC_ENABLE_AUTO is not set
> # CONFIG_PCI_STUB is not set
> # CONFIG_PCI_IOV is not set
> # CONFIG_PCI_PRI is not set
> # CONFIG_PCI_PASID is not set
> # CONFIG_HOTPLUG_PCI is not set
>
> #
> # PCI host controller drivers
> #
> # CONFIG_PCCARD is not set
>
> #
> # Executable file formats
> #
> CONFIG_BINFMT_ELF=y
> CONFIG_ELFCORE=y
> CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS=y
> CONFIG_BINFMT_SCRIPT=y
> # CONFIG_HAVE_AOUT is not set
> # CONFIG_BINFMT_MISC is not set
> CONFIG_COREDUMP=y
>
> #
> # Power management options (EXPERIMENTAL)
> #
> # CONFIG_HIBERNATION is not set
> # CONFIG_PM is not set
>
> #
> # CPU Idle
> #
> CONFIG_CPU_IDLE=y
> CONFIG_CPU_IDLE_GOV_LADDER=y
> CONFIG_CPU_IDLE_GOV_MENU=y
> # CONFIG_ARCH_NEEDS_CPU_IDLE_COUPLED is not set
> CONFIG_NET=y
>
> #
> # Networking options
> #
> CONFIG_PACKET=y
> # CONFIG_PACKET_DIAG is not set
> CONFIG_UNIX=y
> # CONFIG_UNIX_DIAG is not set
> CONFIG_XFRM=y
> # CONFIG_XFRM_USER is not set
> # CONFIG_XFRM_SUB_POLICY is not set
> # CONFIG_XFRM_MIGRATE is not set
> # CONFIG_XFRM_STATISTICS is not set
> # CONFIG_NET_KEY is not set
> CONFIG_INET=y
> # CONFIG_IP_MULTICAST is not set
> CONFIG_IP_ADVANCED_ROUTER=y
> # CONFIG_IP_FIB_TRIE_STATS is not set
> # CONFIG_IP_MULTIPLE_TABLES is not set
> # CONFIG_IP_ROUTE_MULTIPATH is not set
> # CONFIG_IP_ROUTE_VERBOSE is not set
> CONFIG_IP_PNP=y
> CONFIG_IP_PNP_DHCP=y
> CONFIG_IP_PNP_BOOTP=y
> # CONFIG_IP_PNP_RARP is not set
> CONFIG_NET_IPIP=m
> CONFIG_NET_IPGRE_DEMUX=m
> CONFIG_NET_IP_TUNNEL=y
> CONFIG_NET_IPGRE=m
> # CONFIG_SYN_COOKIES is not set
> # CONFIG_NET_IPVTI is not set
> # CONFIG_NET_UDP_TUNNEL is not set
> # CONFIG_NET_FOU is not set
> # CONFIG_NET_FOU_IP_TUNNELS is not set
> # CONFIG_INET_AH is not set
> # CONFIG_INET_ESP is not set
> # CONFIG_INET_IPCOMP is not set
> # CONFIG_INET_XFRM_TUNNEL is not set
> CONFIG_INET_TUNNEL=y
> CONFIG_INET_XFRM_MODE_TRANSPORT=y
> CONFIG_INET_XFRM_MODE_TUNNEL=y
> CONFIG_INET_XFRM_MODE_BEET=y
> CONFIG_INET_DIAG=y
> CONFIG_INET_TCP_DIAG=y
> # CONFIG_INET_UDP_DIAG is not set
> # CONFIG_INET_DIAG_DESTROY is not set
> # CONFIG_TCP_CONG_ADVANCED is not set
> CONFIG_TCP_CONG_CUBIC=y
> CONFIG_DEFAULT_TCP_CONG="cubic"
> # CONFIG_TCP_MD5SIG is not set
> CONFIG_IPV6=y
> CONFIG_IPV6_ROUTER_PREF=y
> CONFIG_IPV6_ROUTE_INFO=y
> CONFIG_IPV6_OPTIMISTIC_DAD=y
> # CONFIG_INET6_AH is not set
> # CONFIG_INET6_ESP is not set
> # CONFIG_INET6_IPCOMP is not set
> # CONFIG_IPV6_MIP6 is not set
> # CONFIG_INET6_XFRM_TUNNEL is not set
> # CONFIG_INET6_TUNNEL is not set
> CONFIG_INET6_XFRM_MODE_TRANSPORT=y
> CONFIG_INET6_XFRM_MODE_TUNNEL=y
> CONFIG_INET6_XFRM_MODE_BEET=y
> # CONFIG_INET6_XFRM_MODE_ROUTEOPTIMIZATION is not set
> # CONFIG_IPV6_VTI is not set
> CONFIG_IPV6_SIT=y
> # CONFIG_IPV6_SIT_6RD is not set
> CONFIG_IPV6_NDISC_NODETYPE=y
> # CONFIG_IPV6_TUNNEL is not set
> # CONFIG_IPV6_GRE is not set
> # CONFIG_IPV6_FOU is not set
> # CONFIG_IPV6_FOU_TUNNEL is not set
> # CONFIG_IPV6_MULTIPLE_TABLES is not set
> # CONFIG_IPV6_MROUTE is not set
> # CONFIG_NETLABEL is not set
> # CONFIG_NETWORK_SECMARK is not set
> # CONFIG_NET_PTP_CLASSIFY is not set
> # CONFIG_NETWORK_PHY_TIMESTAMPING is not set
> # CONFIG_NETFILTER is not set
> # CONFIG_IP_DCCP is not set
> # CONFIG_IP_SCTP is not set
> # CONFIG_RDS is not set
> # CONFIG_TIPC is not set
> # CONFIG_ATM is not set
> # CONFIG_L2TP is not set
> # CONFIG_BRIDGE is not set
> CONFIG_HAVE_NET_DSA=y
> # CONFIG_VLAN_8021Q is not set
> # CONFIG_DECNET is not set
> # CONFIG_LLC2 is not set
> # CONFIG_IPX is not set
> # CONFIG_ATALK is not set
> # CONFIG_X25 is not set
> # CONFIG_LAPB is not set
> # CONFIG_PHONET is not set
> # CONFIG_6LOWPAN is not set
> # CONFIG_IEEE802154 is not set
> # CONFIG_NET_SCHED is not set
> # CONFIG_DCB is not set
> CONFIG_DNS_RESOLVER=y
> # CONFIG_BATMAN_ADV is not set
> # CONFIG_OPENVSWITCH is not set
> # CONFIG_VSOCKETS is not set
> # CONFIG_NETLINK_DIAG is not set
> # CONFIG_MPLS is not set
> # CONFIG_HSR is not set
> # CONFIG_NET_SWITCHDEV is not set
> # CONFIG_NET_L3_MASTER_DEV is not set
> # CONFIG_NET_NCSI is not set
> # CONFIG_SOCK_CGROUP_DATA is not set
> # CONFIG_CGROUP_NET_PRIO is not set
> # CONFIG_CGROUP_NET_CLASSID is not set
> CONFIG_NET_RX_BUSY_POLL=y
> CONFIG_BQL=y
>
> #
> # Network testing
> #
> # CONFIG_NET_PKTGEN is not set
> # CONFIG_HAMRADIO is not set
> # CONFIG_CAN is not set
> # CONFIG_IRDA is not set
> # CONFIG_BT is not set
> # CONFIG_AF_RXRPC is not set
> # CONFIG_AF_KCM is not set
> # CONFIG_WIRELESS is not set
> # CONFIG_WIMAX is not set
> # CONFIG_RFKILL is not set
> # CONFIG_NET_9P is not set
> # CONFIG_CAIF is not set
> # CONFIG_CEPH_LIB is not set
> # CONFIG_NFC is not set
> # CONFIG_LWTUNNEL is not set
> CONFIG_DST_CACHE=y
> # CONFIG_NET_DEVLINK is not set
> CONFIG_MAY_USE_DEVLINK=y
>
> #
> # Device Drivers
> #
>
> #
> # Generic Driver Options
> #
> CONFIG_UEVENT_HELPER=y
> CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
> CONFIG_DEVTMPFS=y
> CONFIG_DEVTMPFS_MOUNT=y
> CONFIG_STANDALONE=y
> CONFIG_PREVENT_FIRMWARE_BUILD=y
> CONFIG_FW_LOADER=y
> CONFIG_FIRMWARE_IN_KERNEL=y
> CONFIG_EXTRA_FIRMWARE=""
> # CONFIG_FW_LOADER_USER_HELPER_FALLBACK is not set
> CONFIG_ALLOW_DEV_COREDUMP=y
> # CONFIG_DEBUG_DRIVER is not set
> # CONFIG_DEBUG_DEVRES is not set
> # CONFIG_SYS_HYPERVISOR is not set
> # CONFIG_GENERIC_CPU_DEVICES is not set
> CONFIG_REGMAP=y
> CONFIG_REGMAP_I2C=y
> # CONFIG_DMA_SHARED_BUFFER is not set
>
> #
> # Bus devices
> #
> # CONFIG_CONNECTOR is not set
> CONFIG_MTD=y
> # CONFIG_MTD_TESTS is not set
> # CONFIG_MTD_REDBOOT_PARTS is not set
> # CONFIG_MTD_CMDLINE_PARTS is not set
> # CONFIG_MTD_AR7_PARTS is not set
>
> #
> # User Modules And Translation Layers
> #
> CONFIG_MTD_BLKDEVS=y
> CONFIG_MTD_BLOCK=y
> # CONFIG_FTL is not set
> # CONFIG_NFTL is not set
> # CONFIG_INFTL is not set
> # CONFIG_RFD_FTL is not set
> # CONFIG_SSFDC is not set
> # CONFIG_SM_FTL is not set
> # CONFIG_MTD_OOPS is not set
> # CONFIG_MTD_SWAP is not set
> # CONFIG_MTD_PARTITIONED_MASTER is not set
>
> #
> # RAM/ROM/Flash chip drivers
> #
> CONFIG_MTD_CFI=y
> # CONFIG_MTD_JEDECPROBE is not set
> CONFIG_MTD_GEN_PROBE=y
> # CONFIG_MTD_CFI_ADV_OPTIONS is not set
> CONFIG_MTD_MAP_BANK_WIDTH_1=y
> CONFIG_MTD_MAP_BANK_WIDTH_2=y
> CONFIG_MTD_MAP_BANK_WIDTH_4=y
> # CONFIG_MTD_MAP_BANK_WIDTH_8 is not set
> # CONFIG_MTD_MAP_BANK_WIDTH_16 is not set
> # CONFIG_MTD_MAP_BANK_WIDTH_32 is not set
> CONFIG_MTD_CFI_I1=y
> CONFIG_MTD_CFI_I2=y
> # CONFIG_MTD_CFI_I4 is not set
> # CONFIG_MTD_CFI_I8 is not set
> # CONFIG_MTD_CFI_INTELEXT is not set
> CONFIG_MTD_CFI_AMDSTD=y
> # CONFIG_MTD_CFI_STAA is not set
> CONFIG_MTD_CFI_UTIL=y
> # CONFIG_MTD_RAM is not set
> # CONFIG_MTD_ROM is not set
> # CONFIG_MTD_ABSENT is not set
>
> #
> # Mapping drivers for chip access
> #
> # CONFIG_MTD_COMPLEX_MAPPINGS is not set
> CONFIG_MTD_PHYSMAP=y
> # CONFIG_MTD_PHYSMAP_COMPAT is not set
> # CONFIG_MTD_INTEL_VR_NOR is not set
> # CONFIG_MTD_PLATRAM is not set
>
> #
> # Self-contained MTD device drivers
> #
> # CONFIG_MTD_PMC551 is not set
> # CONFIG_MTD_SLRAM is not set
> # CONFIG_MTD_PHRAM is not set
> # CONFIG_MTD_MTDRAM is not set
> # CONFIG_MTD_BLOCK2MTD is not set
>
> #
> # Disk-On-Chip Device Drivers
> #
> # CONFIG_MTD_DOCG3 is not set
> # CONFIG_MTD_NAND is not set
> # CONFIG_MTD_ONENAND is not set
>
> #
> # LPDDR & LPDDR2 PCM memory drivers
> #
> # CONFIG_MTD_LPDDR is not set
> # CONFIG_MTD_SPI_NOR is not set
> # CONFIG_MTD_UBI is not set
> # CONFIG_OF is not set
> CONFIG_ARCH_MIGHT_HAVE_PC_PARPORT=y
> # CONFIG_PARPORT is not set
> CONFIG_BLK_DEV=y
> # CONFIG_BLK_DEV_NULL_BLK is not set
> # CONFIG_BLK_DEV_PCIESSD_MTIP32XX is not set
> # CONFIG_BLK_CPQ_CISS_DA is not set
> # CONFIG_BLK_DEV_DAC960 is not set
> # CONFIG_BLK_DEV_UMEM is not set
> # CONFIG_BLK_DEV_COW_COMMON is not set
> CONFIG_BLK_DEV_LOOP=y
> CONFIG_BLK_DEV_LOOP_MIN_COUNT=8
> CONFIG_BLK_DEV_CRYPTOLOOP=m
> # CONFIG_BLK_DEV_DRBD is not set
> # CONFIG_BLK_DEV_NBD is not set
> # CONFIG_BLK_DEV_SX8 is not set
> CONFIG_BLK_DEV_RAM=y
> CONFIG_BLK_DEV_RAM_COUNT\x16
> CONFIG_BLK_DEV_RAM_SIZE@96
> # CONFIG_CDROM_PKTCDVD is not set
> # CONFIG_ATA_OVER_ETH is not set
> # CONFIG_BLK_DEV_HD is not set
> # CONFIG_BLK_DEV_RBD is not set
> # CONFIG_BLK_DEV_RSXX is not set
> # CONFIG_BLK_DEV_NVME is not set
> # CONFIG_NVME_TARGET is not set
>
> #
> # Misc devices
> #
> # CONFIG_SENSORS_LIS3LV02D is not set
> # CONFIG_AD525X_DPOT is not set
> # CONFIG_DUMMY_IRQ is not set
> # CONFIG_PHANTOM is not set
> # CONFIG_SGI_IOC4 is not set
> # CONFIG_TIFM_CORE is not set
> # CONFIG_ICS932S401 is not set
> # CONFIG_ENCLOSURE_SERVICES is not set
> # CONFIG_HP_ILO is not set
> # CONFIG_APDS9802ALS is not set
> # CONFIG_ISL29003 is not set
> # CONFIG_ISL29020 is not set
> # CONFIG_SENSORS_TSL2550 is not set
> # CONFIG_SENSORS_BH1770 is not set
> # CONFIG_SENSORS_APDS990X is not set
> # CONFIG_HMC6352 is not set
> # CONFIG_DS1682 is not set
> # CONFIG_BMP085_I2C is not set
> # CONFIG_USB_SWITCH_FSA9480 is not set
> # CONFIG_SRAM is not set
> # CONFIG_C2PORT is not set
>
> #
> # EEPROM support
> #
> # CONFIG_EEPROM_AT24 is not set
> # CONFIG_EEPROM_LEGACY is not set
> # CONFIG_EEPROM_MAX6875 is not set
> # CONFIG_EEPROM_93CX6 is not set
> # CONFIG_CB710_CORE is not set
>
> #
> # Texas Instruments shared transport line discipline
> #
> # CONFIG_SENSORS_LIS3_I2C is not set
>
> #
> # Altera FPGA firmware download module
> #
> # CONFIG_ALTERA_STAPL is not set
>
> #
> # Intel MIC Bus Driver
> #
>
> #
> # SCIF Bus Driver
> #
>
> #
> # VOP Bus Driver
> #
>
> #
> # Intel MIC Host Driver
> #
>
> #
> # Intel MIC Card Driver
> #
>
> #
> # SCIF Driver
> #
>
> #
> # Intel MIC Coprocessor State Management (COSM) Drivers
> #
>
> #
> # VOP Driver
> #
> # CONFIG_ECHO is not set
> # CONFIG_CXL_BASE is not set
> # CONFIG_CXL_AFU_DRIVER_OPS is not set
> CONFIG_HAVE_IDE=y
> CONFIG_IDE=y
>
> #
> # Please see Documentation/ide/ide.txt for help/info on IDE drives
> #
> CONFIG_IDE_XFER_MODE=y
> CONFIG_IDE_ATAPI=y
> # CONFIG_BLK_DEV_IDE_SATA is not set
> CONFIG_IDE_GD=y
> CONFIG_IDE_GD_ATA=y
> CONFIG_IDE_GD_ATAPI=y
> # CONFIG_BLK_DEV_IDECD is not set
> # CONFIG_BLK_DEV_IDETAPE is not set
> # CONFIG_IDE_TASK_IOCTL is not set
> CONFIG_IDE_PROC_FS=y
>
> #
> # IDE chipset support/bugfixes
> #
> CONFIG_BLK_DEV_PLATFORM=y
> CONFIG_BLK_DEV_IDEDMA_SFF=y
>
> #
> # PCI IDE chipsets support
> #
> CONFIG_BLK_DEV_IDEPCI=y
> CONFIG_IDEPCI_PCIBUS_ORDER=y
> # CONFIG_BLK_DEV_OFFBOARD is not set
> CONFIG_BLK_DEV_GENERIC=y
> # CONFIG_BLK_DEV_OPTI621 is not set
> CONFIG_BLK_DEV_IDEDMA_PCI=y
> CONFIG_BLK_DEV_AEC62XX=y
> # CONFIG_BLK_DEV_ALI15X3 is not set
> # CONFIG_BLK_DEV_AMD74XX is not set
> # CONFIG_BLK_DEV_CMD64X is not set
> # CONFIG_BLK_DEV_TRIFLEX is not set
> # CONFIG_BLK_DEV_HPT366 is not set
> # CONFIG_BLK_DEV_JMICRON is not set
> # CONFIG_BLK_DEV_PIIX is not set
> # CONFIG_BLK_DEV_IT8172 is not set
> # CONFIG_BLK_DEV_IT8213 is not set
> # CONFIG_BLK_DEV_IT821X is not set
> # CONFIG_BLK_DEV_NS87415 is not set
> CONFIG_BLK_DEV_PDC202XX_OLD=y
> CONFIG_BLK_DEV_PDC202XX_NEW=y
> # CONFIG_BLK_DEV_SVWKS is not set
> # CONFIG_BLK_DEV_SIIMAGE is not set
> # CONFIG_BLK_DEV_SLC90E66 is not set
> # CONFIG_BLK_DEV_TRM290 is not set
> # CONFIG_BLK_DEV_VIA82CXXX is not set
> # CONFIG_BLK_DEV_TC86C001 is not set
> CONFIG_BLK_DEV_IDEDMA=y
>
> #
> # SCSI device support
> #
> CONFIG_SCSI_MOD=y
> # CONFIG_RAID_ATTRS is not set
> CONFIG_SCSI=y
> CONFIG_SCSI_DMA=y
> # CONFIG_SCSI_NETLINK is not set
> # CONFIG_SCSI_MQ_DEFAULT is not set
> # CONFIG_SCSI_PROC_FS is not set
>
> #
> # SCSI support type (disk, tape, CD-ROM)
> #
> CONFIG_BLK_DEV_SD=y
> # CONFIG_CHR_DEV_ST is not set
> # CONFIG_CHR_DEV_OSST is not set
> # CONFIG_BLK_DEV_SR is not set
> # CONFIG_CHR_DEV_SG is not set
> # CONFIG_CHR_DEV_SCH is not set
> # CONFIG_SCSI_CONSTANTS is not set
> # CONFIG_SCSI_LOGGING is not set
> # CONFIG_SCSI_SCAN_ASYNC is not set
>
> #
> # SCSI Transports
> #
> # CONFIG_SCSI_SPI_ATTRS is not set
> # CONFIG_SCSI_FC_ATTRS is not set
> # CONFIG_SCSI_ISCSI_ATTRS is not set
> # CONFIG_SCSI_SAS_ATTRS is not set
> # CONFIG_SCSI_SAS_LIBSAS is not set
> # CONFIG_SCSI_SRP_ATTRS is not set
> # CONFIG_SCSI_LOWLEVEL is not set
> # CONFIG_SCSI_DH is not set
> # CONFIG_SCSI_OSD_INITIATOR is not set
> CONFIG_HAVE_PATA_PLATFORM=y
> # CONFIG_ATA is not set
> # CONFIG_MD is not set
> # CONFIG_TARGET_CORE is not set
> # CONFIG_FUSION is not set
>
> #
> # IEEE 1394 (FireWire) support
> #
> # CONFIG_FIREWIRE is not set
> # CONFIG_FIREWIRE_NOSY is not set
> CONFIG_NETDEVICES=y
> CONFIG_MII=y
> CONFIG_NET_CORE=y
> # CONFIG_BONDING is not set
> # CONFIG_DUMMY is not set
> # CONFIG_EQUALIZER is not set
> # CONFIG_NET_FC is not set
> # CONFIG_NET_TEAM is not set
> # CONFIG_MACVLAN is not set
> # CONFIG_IPVLAN is not set
> # CONFIG_VXLAN is not set
> # CONFIG_MACSEC is not set
> # CONFIG_NETCONSOLE is not set
> # CONFIG_NETPOLL is not set
> # CONFIG_NET_POLL_CONTROLLER is not set
> # CONFIG_TUN is not set
> # CONFIG_TUN_VNET_CROSS_LE is not set
> # CONFIG_VETH is not set
> # CONFIG_NLMON is not set
> # CONFIG_ARCNET is not set
>
> #
> # CAIF transport drivers
> #
>
> #
> # Distributed Switch Architecture drivers
> #
> CONFIG_ETHERNET=y
> # CONFIG_NET_VENDOR_3COM is not set
> # CONFIG_NET_VENDOR_ADAPTEC is not set
> # CONFIG_NET_VENDOR_AGERE is not set
> # CONFIG_NET_VENDOR_ALTEON is not set
> # CONFIG_ALTERA_TSE is not set
> # CONFIG_NET_VENDOR_AMD is not set
> # CONFIG_NET_VENDOR_ARC is not set
> # CONFIG_NET_VENDOR_ATHEROS is not set
> # CONFIG_NET_VENDOR_AURORA is not set
> # CONFIG_NET_CADENCE is not set
> # CONFIG_NET_VENDOR_BROADCOM is not set
> # CONFIG_NET_VENDOR_BROCADE is not set
> # CONFIG_NET_VENDOR_CAVIUM is not set
> # CONFIG_NET_VENDOR_CHELSIO is not set
> # CONFIG_NET_VENDOR_CISCO is not set
> # CONFIG_DNET is not set
> # CONFIG_NET_VENDOR_DEC is not set
> # CONFIG_NET_VENDOR_DLINK is not set
> # CONFIG_NET_VENDOR_EMULEX is not set
> # CONFIG_NET_VENDOR_EZCHIP is not set
> # CONFIG_NET_VENDOR_EXAR is not set
> # CONFIG_NET_VENDOR_HP is not set
> # CONFIG_NET_VENDOR_INTEL is not set
> # CONFIG_JME is not set
> # CONFIG_NET_VENDOR_MARVELL is not set
> # CONFIG_NET_VENDOR_MELLANOX is not set
> # CONFIG_NET_VENDOR_MICREL is not set
> # CONFIG_NET_VENDOR_MYRI is not set
> # CONFIG_FEALNX is not set
> # CONFIG_NET_VENDOR_NATSEMI is not set
> # CONFIG_NET_VENDOR_NETRONOME is not set
> # CONFIG_NET_VENDOR_NVIDIA is not set
> # CONFIG_NET_VENDOR_OKI is not set
> # CONFIG_ETHOC is not set
> # CONFIG_NET_PACKET_ENGINE is not set
> # CONFIG_NET_VENDOR_QLOGIC is not set
> # CONFIG_NET_VENDOR_QUALCOMM is not set
> CONFIG_NET_VENDOR_REALTEK=y
> # CONFIG_8139CP is not set
> CONFIG_8139TOO=y
> # CONFIG_8139TOO_PIO is not set
> # CONFIG_8139TOO_TUNE_TWISTER is not set
> # CONFIG_8139TOO_8129 is not set
> # CONFIG_8139_OLD_RX_RESET is not set
> # CONFIG_R8169 is not set
> CONFIG_NET_VENDOR_RENESAS=y
> CONFIG_SH_ETH=y
> # CONFIG_NET_VENDOR_RDC is not set
> # CONFIG_NET_VENDOR_ROCKER is not set
> # CONFIG_NET_VENDOR_SAMSUNG is not set
> # CONFIG_NET_VENDOR_SEEQ is not set
> # CONFIG_NET_VENDOR_SILAN is not set
> # CONFIG_NET_VENDOR_SIS is not set
> # CONFIG_SFC is not set
> # CONFIG_NET_VENDOR_SMSC is not set
> # CONFIG_NET_VENDOR_STMICRO is not set
> # CONFIG_NET_VENDOR_SUN is not set
> # CONFIG_NET_VENDOR_SYNOPSYS is not set
> # CONFIG_NET_VENDOR_TEHUTI is not set
> # CONFIG_NET_VENDOR_TI is not set
> # CONFIG_NET_VENDOR_VIA is not set
> # CONFIG_NET_VENDOR_WIZNET is not set
> # CONFIG_FDDI is not set
> # CONFIG_HIPPI is not set
> CONFIG_PHYLIB=y
>
> #
> # MII PHY device drivers
> #
> # CONFIG_AQUANTIA_PHY is not set
> # CONFIG_AT803X_PHY is not set
> # CONFIG_AMD_PHY is not set
> # CONFIG_MARVELL_PHY is not set
> # CONFIG_DAVICOM_PHY is not set
> # CONFIG_QSEMI_PHY is not set
> # CONFIG_LXT_PHY is not set
> # CONFIG_CICADA_PHY is not set
> # CONFIG_VITESSE_PHY is not set
> # CONFIG_TERANETICS_PHY is not set
> # CONFIG_SMSC_PHY is not set
> # CONFIG_BROADCOM_PHY is not set
> # CONFIG_BCM7XXX_PHY is not set
> # CONFIG_BCM87XX_PHY is not set
> # CONFIG_ICPLUS_PHY is not set
> # CONFIG_REALTEK_PHY is not set
> # CONFIG_NATIONAL_PHY is not set
> # CONFIG_STE10XP is not set
> # CONFIG_LSI_ET1011C_PHY is not set
> # CONFIG_MICREL_PHY is not set
> # CONFIG_DP83848_PHY is not set
> # CONFIG_DP83867_PHY is not set
> # CONFIG_MICROCHIP_PHY is not set
> # CONFIG_FIXED_PHY is not set
> CONFIG_MDIO_BITBANG=y
> # CONFIG_MDIO_BCM_UNIMAC is not set
> # CONFIG_INTEL_XWAY_PHY is not set
> CONFIG_PPP=m
> CONFIG_PPP_BSDCOMP=m
> CONFIG_PPP_DEFLATE=m
> CONFIG_PPP_FILTER=y
> CONFIG_PPP_MPPE=m
> CONFIG_PPP_MULTILINK=y
> # CONFIG_PPPOE is not set
> CONFIG_PPTP=m
> CONFIG_PPP_ASYNC=m
> CONFIG_PPP_SYNC_TTY=m
> # CONFIG_SLIP is not set
> CONFIG_SLHC=m
> # CONFIG_USB_NET_DRIVERS is not set
> # CONFIG_WLAN is not set
>
> #
> # Enable WiMAX (Networking options) to see the WiMAX drivers
> #
> # CONFIG_WAN is not set
> # CONFIG_VMXNET3 is not set
> # CONFIG_ISDN is not set
> # CONFIG_NVM is not set
>
> #
> # Input device support
> #
> CONFIG_INPUT=y
> CONFIG_INPUT_FF_MEMLESS=m
> # CONFIG_INPUT_POLLDEV is not set
> # CONFIG_INPUT_SPARSEKMAP is not set
> # CONFIG_INPUT_MATRIXKMAP is not set
>
> #
> # Userland interfaces
> #
> CONFIG_INPUT_MOUSEDEV=y
> CONFIG_INPUT_MOUSEDEV_PSAUX=y
> CONFIG_INPUT_MOUSEDEV_SCREEN_X\x1024
> CONFIG_INPUT_MOUSEDEV_SCREEN_Yv8
> # CONFIG_INPUT_JOYDEV is not set
> CONFIG_INPUT_EVDEV=y
> CONFIG_INPUT_EVBUG=m
>
> #
> # Input Device Drivers
> #
> CONFIG_INPUT_KEYBOARD=y
> # CONFIG_KEYBOARD_ADP5588 is not set
> # CONFIG_KEYBOARD_ADP5589 is not set
> CONFIG_KEYBOARD_ATKBD=y
> # CONFIG_KEYBOARD_QT1070 is not set
> # CONFIG_KEYBOARD_QT2160 is not set
> # CONFIG_KEYBOARD_LKKBD is not set
> # CONFIG_KEYBOARD_TCA6416 is not set
> # CONFIG_KEYBOARD_TCA8418 is not set
> # CONFIG_KEYBOARD_LM8333 is not set
> # CONFIG_KEYBOARD_MAX7359 is not set
> # CONFIG_KEYBOARD_MCS is not set
> # CONFIG_KEYBOARD_MPR121 is not set
> # CONFIG_KEYBOARD_NEWTON is not set
> # CONFIG_KEYBOARD_OPENCORES is not set
> # CONFIG_KEYBOARD_SAMSUNG is not set
> # CONFIG_KEYBOARD_STOWAWAY is not set
> # CONFIG_KEYBOARD_SUNKBD is not set
> # CONFIG_KEYBOARD_XTKBD is not set
> CONFIG_INPUT_MOUSE=y
> CONFIG_MOUSE_PS2=y
> CONFIG_MOUSE_PS2_ALPS=y
> CONFIG_MOUSE_PS2_BYD=y
> CONFIG_MOUSE_PS2_LOGIPS2PP=y
> CONFIG_MOUSE_PS2_SYNAPTICS=y
> CONFIG_MOUSE_PS2_CYPRESS=y
> CONFIG_MOUSE_PS2_TRACKPOINT=y
> # CONFIG_MOUSE_PS2_ELANTECH is not set
> # CONFIG_MOUSE_PS2_SENTELIC is not set
> # CONFIG_MOUSE_PS2_TOUCHKIT is not set
> CONFIG_MOUSE_PS2_FOCALTECH=y
> # CONFIG_MOUSE_SERIAL is not set
> # CONFIG_MOUSE_APPLETOUCH is not set
> # CONFIG_MOUSE_BCM5974 is not set
> # CONFIG_MOUSE_CYAPA is not set
> # CONFIG_MOUSE_ELAN_I2C is not set
> # CONFIG_MOUSE_VSXXXAA is not set
> # CONFIG_MOUSE_SYNAPTICS_I2C is not set
> # CONFIG_MOUSE_SYNAPTICS_USB is not set
> # CONFIG_INPUT_JOYSTICK is not set
> # CONFIG_INPUT_TABLET is not set
> # CONFIG_INPUT_TOUCHSCREEN is not set
> # CONFIG_INPUT_MISC is not set
> # CONFIG_RMI4_CORE is not set
>
> #
> # Hardware I/O ports
> #
> CONFIG_SERIO=y
> CONFIG_SERIO_SERPORT=y
> # CONFIG_SERIO_PCIPS2 is not set
> CONFIG_SERIO_LIBPS2=y
> # CONFIG_SERIO_RAW is not set
> # CONFIG_SERIO_ALTERA_PS2 is not set
> # CONFIG_SERIO_PS2MULT is not set
> # CONFIG_SERIO_ARC_PS2 is not set
> # CONFIG_USERIO is not set
> # CONFIG_GAMEPORT is not set
>
> #
> # Character devices
> #
> CONFIG_TTY=y
> CONFIG_VT=y
> CONFIG_CONSOLE_TRANSLATIONS=y
> CONFIG_VT_CONSOLE=y
> CONFIG_HW_CONSOLE=y
> CONFIG_VT_HW_CONSOLE_BINDING=y
> CONFIG_UNIX98_PTYS=y
> # CONFIG_LEGACY_PTYS is not set
> # CONFIG_SERIAL_NONSTANDARD is not set
> # CONFIG_NOZOMI is not set
> # CONFIG_N_GSM is not set
> # CONFIG_TRACE_SINK is not set
> CONFIG_DEVMEM=y
> # CONFIG_DEVKMEM is not set
>
> #
> # Serial drivers
> #
> # CONFIG_SERIAL_8250 is not set
>
> #
> # Non-8250 serial port support
> #
> # CONFIG_SERIAL_UARTLITE is not set
> CONFIG_SERIAL_SH_SCI=y
> CONFIG_SERIAL_SH_SCI_NR_UARTS=6
> CONFIG_SERIAL_SH_SCI_CONSOLE=y
> # CONFIG_SERIAL_SH_SCI_EARLYCON is not set
> CONFIG_SERIAL_CORE=y
> CONFIG_SERIAL_CORE_CONSOLE=y
> # CONFIG_SERIAL_JSM is not set
> # CONFIG_SERIAL_SCCNXP is not set
> # CONFIG_SERIAL_SC16IS7XX is not set
> # CONFIG_SERIAL_ALTERA_JTAGUART is not set
> # CONFIG_SERIAL_ALTERA_UART is not set
> # CONFIG_SERIAL_ARC is not set
> # CONFIG_SERIAL_RP2 is not set
> # CONFIG_SERIAL_FSL_LPUART is not set
> # CONFIG_TTY_PRINTK is not set
> # CONFIG_IPMI_HANDLER is not set
> # CONFIG_HW_RANDOM is not set
> # CONFIG_R3964 is not set
> # CONFIG_APPLICOM is not set
> # CONFIG_RAW_DRIVER is not set
> # CONFIG_TCG_TPM is not set
> CONFIG_DEVPORT=y
> # CONFIG_XILLYBUS is not set
>
> #
> # I2C support
> #
> CONFIG_I2C=y
> CONFIG_I2C_BOARDINFO=y
> CONFIG_I2C_COMPAT=y
> # CONFIG_I2C_CHARDEV is not set
> # CONFIG_I2C_MUX is not set
> CONFIG_I2C_HELPER_AUTO=y
> CONFIG_I2C_ALGOPCA=y
>
> #
> # I2C Hardware Bus support
> #
>
> #
> # PC SMBus host controller drivers
> #
> # CONFIG_I2C_ALI1535 is not set
> # CONFIG_I2C_ALI1563 is not set
> # CONFIG_I2C_ALI15X3 is not set
> # CONFIG_I2C_AMD756 is not set
> # CONFIG_I2C_AMD8111 is not set
> # CONFIG_I2C_I801 is not set
> # CONFIG_I2C_ISCH is not set
> # CONFIG_I2C_PIIX4 is not set
> # CONFIG_I2C_NFORCE2 is not set
> # CONFIG_I2C_SIS5595 is not set
> # CONFIG_I2C_SIS630 is not set
> # CONFIG_I2C_SIS96X is not set
> # CONFIG_I2C_VIA is not set
> # CONFIG_I2C_VIAPRO is not set
>
> #
> # I2C system bus drivers (mostly embedded / system-on-chip)
> #
> # CONFIG_I2C_DESIGNWARE_PLATFORM is not set
> # CONFIG_I2C_DESIGNWARE_PCI is not set
> # CONFIG_I2C_EMEV2 is not set
> # CONFIG_I2C_OCORES is not set
> CONFIG_I2C_PCA_PLATFORM=y
> # CONFIG_I2C_PXA_PCI is not set
> # CONFIG_I2C_SH_MOBILE is not set
> # CONFIG_I2C_SIMTEC is not set
> # CONFIG_I2C_XILINX is not set
>
> #
> # External I2C/SMBus adapter drivers
> #
> # CONFIG_I2C_DIOLAN_U2C is not set
> # CONFIG_I2C_PARPORT_LIGHT is not set
> # CONFIG_I2C_ROBOTFUZZ_OSIF is not set
> # CONFIG_I2C_TAOS_EVM is not set
> # CONFIG_I2C_TINY_USB is not set
>
> #
> # Other I2C/SMBus bus drivers
> #
> # CONFIG_I2C_STUB is not set
> # CONFIG_I2C_SLAVE is not set
> # CONFIG_I2C_DEBUG_CORE is not set
> # CONFIG_I2C_DEBUG_ALGO is not set
> # CONFIG_I2C_DEBUG_BUS is not set
> # CONFIG_SPI is not set
> # CONFIG_SPMI is not set
> # CONFIG_HSI is not set
>
> #
> # PPS support
> #
> # CONFIG_PPS is not set
>
> #
> # PPS generators support
> #
>
> #
> # PTP clock support
> #
> # CONFIG_PTP_1588_CLOCK is not set
>
> #
> # Enable PHYLIB and NETWORK_PHY_TIMESTAMPING to see the additional clocks.
> #
> CONFIG_ARCH_HAVE_CUSTOM_GPIO_H=y
> # CONFIG_GPIOLIB is not set
> # CONFIG_W1 is not set
> # CONFIG_POWER_SUPPLY is not set
> # CONFIG_POWER_RESET is not set
> # CONFIG_POWER_AVS is not set
> # CONFIG_HWMON is not set
> # CONFIG_THERMAL is not set
> CONFIG_WATCHDOG=y
> CONFIG_WATCHDOG_CORE=y
> # CONFIG_WATCHDOG_NOWAYOUT is not set
> # CONFIG_WATCHDOG_SYSFS is not set
>
> #
> # Watchdog Device Drivers
> #
> # CONFIG_SOFT_WATCHDOG is not set
> # CONFIG_XILINX_WATCHDOG is not set
> # CONFIG_ZIIRAVE_WATCHDOG is not set
> # CONFIG_CADENCE_WATCHDOG is not set
> # CONFIG_DW_WATCHDOG is not set
> # CONFIG_MAX63XX_WATCHDOG is not set
> # CONFIG_ALIM7101_WDT is not set
> # CONFIG_I6300ESB_WDT is not set
> CONFIG_SH_WDT=y
>
> #
> # PCI-based Watchdog Cards
> #
> # CONFIG_PCIPCWATCHDOG is not set
> # CONFIG_WDTPCI is not set
>
> #
> # USB-based Watchdog Cards
> #
> # CONFIG_USBPCWATCHDOG is not set
> CONFIG_SSB_POSSIBLE=y
>
> #
> # Sonics Silicon Backplane
> #
> # CONFIG_SSB is not set
> CONFIG_BCMA_POSSIBLE=y
>
> #
> # Broadcom specific AMBA
> #
> # CONFIG_BCMA is not set
>
> #
> # Multifunction device drivers
> #
> # CONFIG_MFD_CORE is not set
> # CONFIG_MFD_AS3711 is not set
> # CONFIG_PMIC_ADP5520 is not set
> # CONFIG_MFD_BCM590XX is not set
> # CONFIG_MFD_AXP20X_I2C is not set
> # CONFIG_PMIC_DA903X is not set
> # CONFIG_MFD_DA9052_I2C is not set
> # CONFIG_MFD_DA9055 is not set
> # CONFIG_MFD_DA9062 is not set
> # CONFIG_MFD_DA9063 is not set
> # CONFIG_MFD_DA9150 is not set
> # CONFIG_MFD_DLN2 is not set
> # CONFIG_MFD_MC13XXX_I2C is not set
> # CONFIG_HTC_PASIC3 is not set
> # CONFIG_LPC_ICH is not set
> # CONFIG_LPC_SCH is not set
> # CONFIG_MFD_JANZ_CMODIO is not set
> # CONFIG_MFD_KEMPLD is not set
> # CONFIG_MFD_88PM800 is not set
> # CONFIG_MFD_88PM805 is not set
> # CONFIG_MFD_88PM860X is not set
> # CONFIG_MFD_MAX14577 is not set
> # CONFIG_MFD_MAX77693 is not set
> # CONFIG_MFD_MAX77843 is not set
> # CONFIG_MFD_MAX8907 is not set
> # CONFIG_MFD_MAX8925 is not set
> # CONFIG_MFD_MAX8997 is not set
> # CONFIG_MFD_MAX8998 is not set
> # CONFIG_MFD_MT6397 is not set
> # CONFIG_MFD_MENF21BMC is not set
> # CONFIG_MFD_VIPERBOARD is not set
> # CONFIG_MFD_RETU is not set
> # CONFIG_MFD_PCF50633 is not set
> # CONFIG_MFD_RDC321X is not set
> # CONFIG_MFD_RTSX_PCI is not set
> # CONFIG_MFD_RT5033 is not set
> # CONFIG_MFD_RTSX_USB is not set
> # CONFIG_MFD_RC5T583 is not set
> # CONFIG_MFD_SEC_CORE is not set
> # CONFIG_MFD_SI476X_CORE is not set
> # CONFIG_MFD_SM501 is not set
> # CONFIG_MFD_SKY81452 is not set
> # CONFIG_MFD_SMSC is not set
> # CONFIG_ABX500_CORE is not set
> # CONFIG_MFD_SYSCON is not set
> # CONFIG_MFD_TI_AM335X_TSCADC is not set
> # CONFIG_MFD_LP3943 is not set
> # CONFIG_MFD_LP8788 is not set
> # CONFIG_MFD_PALMAS is not set
> # CONFIG_TPS6105X is not set
> # CONFIG_TPS6507X is not set
> # CONFIG_MFD_TPS65086 is not set
> # CONFIG_MFD_TPS65090 is not set
> # CONFIG_MFD_TPS65217 is not set
> # CONFIG_MFD_TPS65218 is not set
> # CONFIG_MFD_TPS6586X is not set
> # CONFIG_MFD_TPS65912_I2C is not set
> # CONFIG_MFD_TPS80031 is not set
> # CONFIG_TWL4030_CORE is not set
> # CONFIG_TWL6040_CORE is not set
> # CONFIG_MFD_WL1273_CORE is not set
> # CONFIG_MFD_LM3533 is not set
> # CONFIG_MFD_TMIO is not set
> # CONFIG_MFD_VX855 is not set
> # CONFIG_MFD_ARIZONA_I2C is not set
> # CONFIG_MFD_WM8400 is not set
> # CONFIG_MFD_WM831X_I2C is not set
> # CONFIG_MFD_WM8350_I2C is not set
> # CONFIG_MFD_WM8994 is not set
> # CONFIG_REGULATOR is not set
> # CONFIG_MEDIA_SUPPORT is not set
>
> #
> # Graphics support
> #
> # CONFIG_VGA_ARB is not set
> # CONFIG_DRM is not set
>
> #
> # ACP (Audio CoProcessor) Configuration
> #
>
> #
> # Frame buffer Devices
> #
> # CONFIG_FB is not set
> # CONFIG_FB_SH_MOBILE_MERAM is not set
> # CONFIG_BACKLIGHT_LCD_SUPPORT is not set
> # CONFIG_VGASTATE is not set
>
> #
> # Console display driver support
> #
> CONFIG_DUMMY_CONSOLE=y
> CONFIG_DUMMY_CONSOLE_COLUMNS€
> CONFIG_DUMMY_CONSOLE_ROWS%
> # CONFIG_SOUND is not set
>
> #
> # HID support
> #
> CONFIG_HID=y
> # CONFIG_HID_BATTERY_STRENGTH is not set
> # CONFIG_HIDRAW is not set
> # CONFIG_UHID is not set
> CONFIG_HID_GENERIC=y
>
> #
> # Special HID drivers
> #
> # CONFIG_HID_A4TECH is not set
> # CONFIG_HID_ACRUX is not set
> # CONFIG_HID_APPLE is not set
> # CONFIG_HID_APPLEIR is not set
> # CONFIG_HID_AUREAL is not set
> # CONFIG_HID_BELKIN is not set
> # CONFIG_HID_BETOP_FF is not set
> # CONFIG_HID_CHERRY is not set
> # CONFIG_HID_CHICONY is not set
> # CONFIG_HID_CMEDIA is not set
> # CONFIG_HID_CYPRESS is not set
> # CONFIG_HID_DRAGONRISE is not set
> # CONFIG_HID_EMS_FF is not set
> # CONFIG_HID_ELECOM is not set
> # CONFIG_HID_ELO is not set
> # CONFIG_HID_EZKEY is not set
> # CONFIG_HID_GEMBIRD is not set
> # CONFIG_HID_GFRM is not set
> # CONFIG_HID_HOLTEK is not set
> # CONFIG_HID_KEYTOUCH is not set
> # CONFIG_HID_KYE is not set
> # CONFIG_HID_UCLOGIC is not set
> # CONFIG_HID_WALTOP is not set
> # CONFIG_HID_GYRATION is not set
> # CONFIG_HID_ICADE is not set
> # CONFIG_HID_TWINHAN is not set
> # CONFIG_HID_KENSINGTON is not set
> # CONFIG_HID_LCPOWER is not set
> # CONFIG_HID_LENOVO is not set
> # CONFIG_HID_LOGITECH is not set
> # CONFIG_HID_MAGICMOUSE is not set
> # CONFIG_HID_MICROSOFT is not set
> # CONFIG_HID_MONTEREY is not set
> # CONFIG_HID_MULTITOUCH is not set
> # CONFIG_HID_NTRIG is not set
> # CONFIG_HID_ORTEK is not set
> # CONFIG_HID_PANTHERLORD is not set
> # CONFIG_HID_PENMOUNT is not set
> # CONFIG_HID_PETALYNX is not set
> # CONFIG_HID_PICOLCD is not set
> # CONFIG_HID_PLANTRONICS is not set
> # CONFIG_HID_PRIMAX is not set
> # CONFIG_HID_ROCCAT is not set
> # CONFIG_HID_SAITEK is not set
> # CONFIG_HID_SAMSUNG is not set
> # CONFIG_HID_SPEEDLINK is not set
> # CONFIG_HID_STEELSERIES is not set
> # CONFIG_HID_SUNPLUS is not set
> # CONFIG_HID_RMI is not set
> # CONFIG_HID_GREENASIA is not set
> # CONFIG_HID_SMARTJOYPLUS is not set
> # CONFIG_HID_TIVO is not set
> # CONFIG_HID_TOPSEED is not set
> # CONFIG_HID_THRUSTMASTER is not set
> # CONFIG_HID_WACOM is not set
> # CONFIG_HID_XINMO is not set
> # CONFIG_HID_ZEROPLUS is not set
> # CONFIG_HID_ZYDACRON is not set
> # CONFIG_HID_SENSOR_HUB is not set
> # CONFIG_HID_ALPS is not set
>
> #
> # USB HID support
> #
> CONFIG_USB_HID=y
> # CONFIG_HID_PID is not set
> # CONFIG_USB_HIDDEV is not set
>
> #
> # I2C HID support
> #
> # CONFIG_I2C_HID is not set
> CONFIG_USB_OHCI_LITTLE_ENDIAN=y
> CONFIG_USB_SUPPORT=y
> CONFIG_USB_COMMON=y
> CONFIG_USB_ARCH_HAS_HCD=y
> CONFIG_USB=y
> # CONFIG_USB_ANNOUNCE_NEW_DEVICES is not set
>
> #
> # Miscellaneous USB options
> #
> CONFIG_USB_DEFAULT_PERSIST=y
> # CONFIG_USB_DYNAMIC_MINORS is not set
> # CONFIG_USB_OTG_WHITELIST is not set
> # CONFIG_USB_OTG_BLACKLIST_HUB is not set
> # CONFIG_USB_ULPI_BUS is not set
> # CONFIG_USB_MON is not set
> # CONFIG_USB_WUSB_CBAF is not set
>
> #
> # USB Host Controller Drivers
> #
> # CONFIG_USB_C67X00_HCD is not set
> # CONFIG_USB_XHCI_HCD is not set
> CONFIG_USB_EHCI_HCD=y
> CONFIG_USB_EHCI_ROOT_HUB_TT=y
> CONFIG_USB_EHCI_TT_NEWSCHED=y
> CONFIG_USB_EHCI_PCI=y
> CONFIG_USB_EHCI_SH=y
> CONFIG_USB_EHCI_HCD_PLATFORM=y
> # CONFIG_USB_OXU210HP_HCD is not set
> # CONFIG_USB_ISP116X_HCD is not set
> # CONFIG_USB_ISP1362_HCD is not set
> # CONFIG_USB_FOTG210_HCD is not set
> CONFIG_USB_OHCI_HCD=y
> CONFIG_USB_OHCI_HCD_PCI=y
> # CONFIG_USB_OHCI_SH is not set
> CONFIG_USB_OHCI_HCD_PLATFORM=y
> # CONFIG_USB_UHCI_HCD is not set
> # CONFIG_USB_SL811_HCD is not set
> # CONFIG_USB_R8A66597_HCD is not set
> # CONFIG_USB_HCD_TEST_MODE is not set
>
> #
> # USB Device Class drivers
> #
> # CONFIG_USB_ACM is not set
> # CONFIG_USB_PRINTER is not set
> # CONFIG_USB_WDM is not set
> # CONFIG_USB_TMC is not set
>
> #
> # NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may
> #
>
> #
> # also be needed; see USB_STORAGE Help for more info
> #
> CONFIG_USB_STORAGE=y
> # CONFIG_USB_STORAGE_DEBUG is not set
> # CONFIG_USB_STORAGE_REALTEK is not set
> # CONFIG_USB_STORAGE_DATAFAB is not set
> # CONFIG_USB_STORAGE_FREECOM is not set
> # CONFIG_USB_STORAGE_ISD200 is not set
> # CONFIG_USB_STORAGE_USBAT is not set
> # CONFIG_USB_STORAGE_SDDR09 is not set
> # CONFIG_USB_STORAGE_SDDR55 is not set
> # CONFIG_USB_STORAGE_JUMPSHOT is not set
> # CONFIG_USB_STORAGE_ALAUDA is not set
> # CONFIG_USB_STORAGE_ONETOUCH is not set
> # CONFIG_USB_STORAGE_KARMA is not set
> # CONFIG_USB_STORAGE_CYPRESS_ATACB is not set
> # CONFIG_USB_STORAGE_ENE_UB6250 is not set
> # CONFIG_USB_UAS is not set
>
> #
> # USB Imaging devices
> #
> # CONFIG_USB_MDC800 is not set
> # CONFIG_USB_MICROTEK is not set
> # CONFIG_USBIP_CORE is not set
> # CONFIG_USB_MUSB_HDRC is not set
> # CONFIG_USB_DWC3 is not set
> # CONFIG_USB_DWC2 is not set
> # CONFIG_USB_CHIPIDEA is not set
> # CONFIG_USB_ISP1760 is not set
>
> #
> # USB port drivers
> #
> # CONFIG_USB_SERIAL is not set
>
> #
> # USB Miscellaneous drivers
> #
> # CONFIG_USB_EMI62 is not set
> # CONFIG_USB_EMI26 is not set
> # CONFIG_USB_ADUTUX is not set
> # CONFIG_USB_SEVSEG is not set
> # CONFIG_USB_RIO500 is not set
> # CONFIG_USB_LEGOTOWER is not set
> # CONFIG_USB_LCD is not set
> # CONFIG_USB_CYPRESS_CY7C63 is not set
> # CONFIG_USB_CYTHERM is not set
> # CONFIG_USB_IDMOUSE is not set
> # CONFIG_USB_FTDI_ELAN is not set
> # CONFIG_USB_APPLEDISPLAY is not set
> # CONFIG_USB_SISUSBVGA is not set
> # CONFIG_USB_LD is not set
> # CONFIG_USB_TRANCEVIBRATOR is not set
> # CONFIG_USB_IOWARRIOR is not set
> # CONFIG_USB_TEST is not set
> # CONFIG_USB_EHSET_TEST_FIXTURE is not set
> # CONFIG_USB_ISIGHTFW is not set
> # CONFIG_USB_YUREX is not set
> # CONFIG_USB_EZUSB_FX2 is not set
> # CONFIG_USB_HSIC_USB3503 is not set
> # CONFIG_USB_LINK_LAYER_TEST is not set
>
> #
> # USB Physical Layer drivers
> #
> # CONFIG_USB_PHY is not set
> # CONFIG_NOP_USB_XCEIV is not set
> # CONFIG_USB_ISP1301 is not set
> # CONFIG_USB_GADGET is not set
> # CONFIG_UWB is not set
> # CONFIG_MMC is not set
> # CONFIG_MEMSTICK is not set
> # CONFIG_NEW_LEDS is not set
> # CONFIG_ACCESSIBILITY is not set
> # CONFIG_INFINIBAND is not set
> CONFIG_RTC_LIB=y
> CONFIG_RTC_CLASS=y
> CONFIG_RTC_HCTOSYS=y
> CONFIG_RTC_HCTOSYS_DEVICE="rtc0"
> CONFIG_RTC_SYSTOHC=y
> CONFIG_RTC_SYSTOHC_DEVICE="rtc0"
> # CONFIG_RTC_DEBUG is not set
>
> #
> # RTC interfaces
> #
> CONFIG_RTC_INTF_SYSFS=y
> CONFIG_RTC_INTF_PROC=y
> CONFIG_RTC_INTF_DEV=y
> # CONFIG_RTC_INTF_DEV_UIE_EMUL is not set
> # CONFIG_RTC_DRV_TEST is not set
>
> #
> # I2C RTC drivers
> #
> # CONFIG_RTC_DRV_ABB5ZES3 is not set
> # CONFIG_RTC_DRV_ABX80X is not set
> # CONFIG_RTC_DRV_DS1307 is not set
> # CONFIG_RTC_DRV_DS1374 is not set
> # CONFIG_RTC_DRV_DS1672 is not set
> # CONFIG_RTC_DRV_MAX6900 is not set
> # CONFIG_RTC_DRV_RS5C372 is not set
> # CONFIG_RTC_DRV_ISL1208 is not set
> # CONFIG_RTC_DRV_ISL12022 is not set
> # CONFIG_RTC_DRV_ISL12057 is not set
> # CONFIG_RTC_DRV_X1205 is not set
> # CONFIG_RTC_DRV_PCF8523 is not set
> # CONFIG_RTC_DRV_PCF85063 is not set
> # CONFIG_RTC_DRV_PCF8563 is not set
> # CONFIG_RTC_DRV_PCF8583 is not set
> # CONFIG_RTC_DRV_M41T80 is not set
> # CONFIG_RTC_DRV_BQ32K is not set
> # CONFIG_RTC_DRV_S35390A is not set
> # CONFIG_RTC_DRV_FM3130 is not set
> # CONFIG_RTC_DRV_RX8010 is not set
> # CONFIG_RTC_DRV_RX8581 is not set
> # CONFIG_RTC_DRV_RX8025 is not set
> # CONFIG_RTC_DRV_EM3027 is not set
> # CONFIG_RTC_DRV_RV8803 is not set
>
> #
> # SPI RTC drivers
> #
> CONFIG_RTC_I2C_AND_SPI=y
>
> #
> # SPI and I2C RTC drivers
> #
> # CONFIG_RTC_DRV_DS3232 is not set
> # CONFIG_RTC_DRV_PCF2127 is not set
> # CONFIG_RTC_DRV_RV3029C2 is not set
>
> #
> # Platform RTC drivers
> #
> # CONFIG_RTC_DRV_DS1286 is not set
> # CONFIG_RTC_DRV_DS1511 is not set
> # CONFIG_RTC_DRV_DS1553 is not set
> # CONFIG_RTC_DRV_DS1685_FAMILY is not set
> # CONFIG_RTC_DRV_DS1742 is not set
> # CONFIG_RTC_DRV_DS2404 is not set
> # CONFIG_RTC_DRV_STK17TA8 is not set
> # CONFIG_RTC_DRV_M48T86 is not set
> # CONFIG_RTC_DRV_M48T35 is not set
> # CONFIG_RTC_DRV_M48T59 is not set
> # CONFIG_RTC_DRV_MSM6242 is not set
> # CONFIG_RTC_DRV_BQ4802 is not set
> # CONFIG_RTC_DRV_RP5C01 is not set
> # CONFIG_RTC_DRV_V3020 is not set
>
> #
> # on-CPU RTC drivers
> #
> CONFIG_RTC_DRV_SH=y
> CONFIG_RTC_DRV_RS5C313=y
> CONFIG_RTC_DRV_GENERIC=y
>
> #
> # HID Sensor RTC drivers
> #
> # CONFIG_RTC_DRV_HID_SENSOR_TIME is not set
> CONFIG_DMADEVICES=y
> # CONFIG_DMADEVICES_DEBUG is not set
>
> #
> # DMA Devices
> #
> # CONFIG_INTEL_IDMA64 is not set
> # CONFIG_QCOM_HIDMA_MGMT is not set
> # CONFIG_QCOM_HIDMA is not set
> # CONFIG_DW_DMAC is not set
> # CONFIG_DW_DMAC_PCI is not set
>
> #
> # DMABUF options
> #
> # CONFIG_SYNC_FILE is not set
> # CONFIG_AUXDISPLAY is not set
> # CONFIG_UIO is not set
> # CONFIG_VIRT_DRIVERS is not set
>
> #
> # Virtio drivers
> #
> # CONFIG_VIRTIO_PCI is not set
> # CONFIG_VIRTIO_MMIO is not set
>
> #
> # Microsoft Hyper-V guest support
> #
> # CONFIG_STAGING is not set
> CONFIG_CLKDEV_LOOKUP=y
>
> #
> # Hardware Spinlock drivers
> #
>
> #
> # Clock Source drivers
> #
> # CONFIG_ARM_TIMER_SP804 is not set
> # CONFIG_ATMEL_PIT is not set
> CONFIG_SYS_SUPPORTS_SH_TMU=y
> # CONFIG_SH_TIMER_CMT is not set
> # CONFIG_SH_TIMER_MTU2 is not set
> CONFIG_SH_TIMER_TMU=y
> # CONFIG_EM_TIMER_STI is not set
> # CONFIG_MAILBOX is not set
> # CONFIG_IOMMU_SUPPORT is not set
>
> #
> # Remoteproc drivers
> #
> # CONFIG_STE_MODEM_RPROC is not set
>
> #
> # Rpmsg drivers
> #
>
> #
> # SOC (System On Chip) specific Drivers
> #
>
> #
> # Broadcom SoC drivers
> #
> # CONFIG_SUNXI_SRAM is not set
> # CONFIG_SOC_TI is not set
> # CONFIG_PM_DEVFREQ is not set
> # CONFIG_EXTCON is not set
> # CONFIG_MEMORY is not set
> # CONFIG_IIO is not set
> # CONFIG_NTB is not set
> # CONFIG_VME_BUS is not set
> # CONFIG_PWM is not set
> CONFIG_ARM_GIC_MAX_NR=1
> # CONFIG_IPACK_BUS is not set
> # CONFIG_RESET_CONTROLLER is not set
> # CONFIG_FMC is not set
>
> #
> # PHY Subsystem
> #
> # CONFIG_GENERIC_PHY is not set
> # CONFIG_PHY_PXA_28NM_HSIC is not set
> # CONFIG_PHY_PXA_28NM_USB2 is not set
> # CONFIG_BCM_KONA_USB2_PHY is not set
> # CONFIG_POWERCAP is not set
> # CONFIG_MCB is not set
>
> #
> # Performance monitor support
> #
> # CONFIG_RAS is not set
> # CONFIG_THUNDERBOLT is not set
>
> #
> # Android
> #
> # CONFIG_ANDROID is not set
> # CONFIG_NVMEM is not set
> # CONFIG_STM is not set
> # CONFIG_INTEL_TH is not set
>
> #
> # FPGA Configuration Support
> #
> # CONFIG_FPGA is not set
>
> #
> # File systems
> #
> CONFIG_EXT2_FS=y
> CONFIG_EXT2_FS_XATTR=y
> CONFIG_EXT2_FS_POSIX_ACL=y
> CONFIG_EXT2_FS_SECURITY=y
> CONFIG_EXT3_FS=y
> CONFIG_EXT3_FS_POSIX_ACL=y
> CONFIG_EXT3_FS_SECURITY=y
> CONFIG_EXT4_FS=y
> CONFIG_EXT4_FS_POSIX_ACL=y
> CONFIG_EXT4_FS_SECURITY=y
> # CONFIG_EXT4_ENCRYPTION is not set
> CONFIG_EXT4_DEBUG=y
> CONFIG_JBD2=y
> # CONFIG_JBD2_DEBUG is not set
> CONFIG_FS_MBCACHE=y
> # CONFIG_REISERFS_FS is not set
> # CONFIG_JFS_FS is not set
> # CONFIG_XFS_FS is not set
> # CONFIG_GFS2_FS is not set
> # CONFIG_OCFS2_FS is not set
> # CONFIG_BTRFS_FS is not set
> # CONFIG_NILFS2_FS is not set
> # CONFIG_F2FS_FS is not set
> # CONFIG_FS_DAX is not set
> CONFIG_FS_POSIX_ACL=y
> CONFIG_EXPORTFS=y
> # CONFIG_EXPORTFS_BLOCK_OPS is not set
> CONFIG_FILE_LOCKING=y
> CONFIG_MANDATORY_FILE_LOCKING=y
> # CONFIG_FS_ENCRYPTION is not set
> CONFIG_FSNOTIFY=y
> CONFIG_DNOTIFY=y
> CONFIG_INOTIFY_USER=y
> # CONFIG_FANOTIFY is not set
> # CONFIG_QUOTA is not set
> # CONFIG_QUOTACTL is not set
> # CONFIG_AUTOFS4_FS is not set
> # CONFIG_FUSE_FS is not set
> # CONFIG_OVERLAY_FS is not set
>
> #
> # Caches
> #
> # CONFIG_FSCACHE is not set
>
> #
> # CD-ROM/DVD Filesystems
> #
> # CONFIG_ISO9660_FS is not set
> # CONFIG_UDF_FS is not set
>
> #
> # DOS/FAT/NT Filesystems
> #
> CONFIG_FAT_FS=y
> CONFIG_MSDOS_FS=y
> CONFIG_VFAT_FS=y
> CONFIG_FAT_DEFAULT_CODEPAGEC7
> CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1"
> # CONFIG_FAT_DEFAULT_UTF8 is not set
> CONFIG_NTFS_FS=y
> # CONFIG_NTFS_DEBUG is not set
> CONFIG_NTFS_RW=y
>
> #
> # Pseudo filesystems
> #
> CONFIG_PROC_FS=y
> CONFIG_PROC_KCORE=y
> CONFIG_PROC_SYSCTL=y
> CONFIG_PROC_PAGE_MONITOR=y
> # CONFIG_PROC_CHILDREN is not set
> CONFIG_KERNFS=y
> CONFIG_SYSFS=y
> CONFIG_TMPFS=y
> # CONFIG_TMPFS_POSIX_ACL is not set
> # CONFIG_TMPFS_XATTR is not set
> CONFIG_HUGETLBFS=y
> CONFIG_HUGETLB_PAGE=y
> CONFIG_CONFIGFS_FS=y
> CONFIG_MISC_FILESYSTEMS=y
> # CONFIG_ORANGEFS_FS is not set
> # CONFIG_ADFS_FS is not set
> # CONFIG_AFFS_FS is not set
> # CONFIG_ECRYPT_FS is not set
> # CONFIG_HFS_FS is not set
> # CONFIG_HFSPLUS_FS is not set
> # CONFIG_BEFS_FS is not set
> # CONFIG_BFS_FS is not set
> # CONFIG_EFS_FS is not set
> # CONFIG_JFFS2_FS is not set
> # CONFIG_LOGFS is not set
> # CONFIG_CRAMFS is not set
> # CONFIG_SQUASHFS is not set
> # CONFIG_VXFS_FS is not set
> CONFIG_MINIX_FS=y
> CONFIG_MINIX_FS_NATIVE_ENDIAN=y
> # CONFIG_OMFS_FS is not set
> # CONFIG_HPFS_FS is not set
> # CONFIG_QNX4FS_FS is not set
> # CONFIG_QNX6FS_FS is not set
> # CONFIG_ROMFS_FS is not set
> # CONFIG_PSTORE is not set
> # CONFIG_SYSV_FS is not set
> # CONFIG_UFS_FS is not set
> CONFIG_NETWORK_FILESYSTEMS=y
> CONFIG_NFS_FS=y
> CONFIG_NFS_V2=y
> CONFIG_NFS_V3=y
> CONFIG_NFS_V3_ACL=y
> CONFIG_NFS_V4=y
> # CONFIG_NFS_SWAP is not set
> CONFIG_NFS_V4_1=y
> # CONFIG_NFS_V4_2 is not set
> CONFIG_PNFS_FILE_LAYOUT=y
> CONFIG_PNFS_FLEXFILE_LAYOUT=m
> CONFIG_NFS_V4_1_IMPLEMENTATION_ID_DOMAIN="kernel.org"
> # CONFIG_NFS_V4_1_MIGRATION is not set
> CONFIG_ROOT_NFS=y
> # CONFIG_NFS_USE_LEGACY_DNS is not set
> CONFIG_NFS_USE_KERNEL_DNS=y
> # CONFIG_NFSD is not set
> CONFIG_GRACE_PERIOD=y
> CONFIG_LOCKD=y
> CONFIG_LOCKD_V4=y
> CONFIG_NFS_ACL_SUPPORT=y
> CONFIG_NFS_COMMON=y
> CONFIG_SUNRPC=y
> CONFIG_SUNRPC_GSS=y
> CONFIG_SUNRPC_BACKCHANNEL=y
> # CONFIG_SUNRPC_DEBUG is not set
> # CONFIG_CEPH_FS is not set
> # CONFIG_CIFS is not set
> # CONFIG_NCP_FS is not set
> # CONFIG_CODA_FS is not set
> # CONFIG_AFS_FS is not set
> CONFIG_NLS=y
> CONFIG_NLS_DEFAULT="iso8859-1"
> CONFIG_NLS_CODEPAGE_437=y
> # CONFIG_NLS_CODEPAGE_737 is not set
> # CONFIG_NLS_CODEPAGE_775 is not set
> # CONFIG_NLS_CODEPAGE_850 is not set
> # CONFIG_NLS_CODEPAGE_852 is not set
> # CONFIG_NLS_CODEPAGE_855 is not set
> # CONFIG_NLS_CODEPAGE_857 is not set
> # CONFIG_NLS_CODEPAGE_860 is not set
> # CONFIG_NLS_CODEPAGE_861 is not set
> # CONFIG_NLS_CODEPAGE_862 is not set
> # CONFIG_NLS_CODEPAGE_863 is not set
> # CONFIG_NLS_CODEPAGE_864 is not set
> # CONFIG_NLS_CODEPAGE_865 is not set
> # CONFIG_NLS_CODEPAGE_866 is not set
> # CONFIG_NLS_CODEPAGE_869 is not set
> # CONFIG_NLS_CODEPAGE_936 is not set
> # CONFIG_NLS_CODEPAGE_950 is not set
> CONFIG_NLS_CODEPAGE_932=y
> # CONFIG_NLS_CODEPAGE_949 is not set
> # CONFIG_NLS_CODEPAGE_874 is not set
> # CONFIG_NLS_ISO8859_8 is not set
> # CONFIG_NLS_CODEPAGE_1250 is not set
> # CONFIG_NLS_CODEPAGE_1251 is not set
> # CONFIG_NLS_ASCII is not set
> CONFIG_NLS_ISO8859_1=y
> # CONFIG_NLS_ISO8859_2 is not set
> # CONFIG_NLS_ISO8859_3 is not set
> # CONFIG_NLS_ISO8859_4 is not set
> # CONFIG_NLS_ISO8859_5 is not set
> # CONFIG_NLS_ISO8859_6 is not set
> # CONFIG_NLS_ISO8859_7 is not set
> # CONFIG_NLS_ISO8859_9 is not set
> # CONFIG_NLS_ISO8859_13 is not set
> # CONFIG_NLS_ISO8859_14 is not set
> # CONFIG_NLS_ISO8859_15 is not set
> # CONFIG_NLS_KOI8_R is not set
> # CONFIG_NLS_KOI8_U is not set
> # CONFIG_NLS_MAC_ROMAN is not set
> # CONFIG_NLS_MAC_CELTIC is not set
> # CONFIG_NLS_MAC_CENTEURO is not set
> # CONFIG_NLS_MAC_CROATIAN is not set
> # CONFIG_NLS_MAC_CYRILLIC is not set
> # CONFIG_NLS_MAC_GAELIC is not set
> # CONFIG_NLS_MAC_GREEK is not set
> # CONFIG_NLS_MAC_ICELAND is not set
> # CONFIG_NLS_MAC_INUIT is not set
> # CONFIG_NLS_MAC_ROMANIAN is not set
> # CONFIG_NLS_MAC_TURKISH is not set
> # CONFIG_NLS_UTF8 is not set
> # CONFIG_DLM is not set
>
> #
> # Kernel hacking
> #
> CONFIG_TRACE_IRQFLAGS_SUPPORT=y
>
> #
> # printk and dmesg options
> #
> CONFIG_PRINTK_TIME=y
> CONFIG_MESSAGE_LOGLEVEL_DEFAULT=4
> # CONFIG_DYNAMIC_DEBUG is not set
>
> #
> # Compile-time checks and compiler options
> #
> CONFIG_DEBUG_INFO=y
> # CONFIG_DEBUG_INFO_REDUCED is not set
> # CONFIG_DEBUG_INFO_SPLIT is not set
> # CONFIG_DEBUG_INFO_DWARF4 is not set
> # CONFIG_GDB_SCRIPTS is not set
> CONFIG_ENABLE_WARN_DEPRECATED=y
> # CONFIG_ENABLE_MUST_CHECK is not set
> CONFIG_FRAME_WARN\x1024
> # CONFIG_STRIP_ASM_SYMS is not set
> # CONFIG_READABLE_ASM is not set
> # CONFIG_UNUSED_SYMBOLS is not set
> # CONFIG_PAGE_OWNER is not set
> CONFIG_DEBUG_FS=y
> # CONFIG_HEADERS_CHECK is not set
> # CONFIG_DEBUG_SECTION_MISMATCH is not set
> CONFIG_SECTION_MISMATCH_WARN_ONLY=y
> CONFIG_FRAME_POINTER=y
> # CONFIG_DEBUG_FORCE_WEAK_PER_CPU is not set
> CONFIG_MAGIC_SYSRQ=y
> CONFIG_MAGIC_SYSRQ_DEFAULT_ENABLE=0x1
> CONFIG_DEBUG_KERNEL=y
>
> #
> # Memory Debugging
> #
> # CONFIG_PAGE_EXTENSION is not set
> # CONFIG_DEBUG_PAGEALLOC is not set
> # CONFIG_PAGE_POISONING is not set
> # CONFIG_DEBUG_OBJECTS is not set
> # CONFIG_DEBUG_SLAB is not set
> CONFIG_HAVE_DEBUG_KMEMLEAK=y
> CONFIG_DEBUG_KMEMLEAK=y
> CONFIG_DEBUG_KMEMLEAK_EARLY_LOG_SIZE@0
> # CONFIG_DEBUG_KMEMLEAK_TEST is not set
> # CONFIG_DEBUG_KMEMLEAK_DEFAULT_OFF is not set
> # CONFIG_DEBUG_STACK_USAGE is not set
> # CONFIG_DEBUG_VM is not set
> # CONFIG_DEBUG_MEMORY_INIT is not set
> # CONFIG_DEBUG_SHIRQ is not set
>
> #
> # Debug Lockups and Hangs
> #
> # CONFIG_LOCKUP_DETECTOR is not set
> CONFIG_DETECT_HUNG_TASK=y
> CONFIG_DEFAULT_HUNG_TASK_TIMEOUT\x120
> # CONFIG_BOOTPARAM_HUNG_TASK_PANIC is not set
> CONFIG_BOOTPARAM_HUNG_TASK_PANIC_VALUE=0
> # CONFIG_WQ_WATCHDOG is not set
> # CONFIG_PANIC_ON_OOPS is not set
> CONFIG_PANIC_ON_OOPS_VALUE=0
> CONFIG_PANIC_TIMEOUT=0
> CONFIG_SCHED_DEBUG=y
> CONFIG_SCHED_INFO=y
> CONFIG_SCHEDSTATS=y
> # CONFIG_SCHED_STACK_END_CHECK is not set
> # CONFIG_DEBUG_TIMEKEEPING is not set
> # CONFIG_TIMER_STATS is not set
> CONFIG_DEBUG_PREEMPT=y
>
> #
> # Lock Debugging (spinlocks, mutexes, etc...)
> #
> # CONFIG_DEBUG_RT_MUTEXES is not set
> CONFIG_DEBUG_SPINLOCK=y
> CONFIG_DEBUG_MUTEXES=y
> # CONFIG_DEBUG_WW_MUTEX_SLOWPATH is not set
> # CONFIG_DEBUG_LOCK_ALLOC is not set
> # CONFIG_PROVE_LOCKING is not set
> # CONFIG_LOCK_STAT is not set
> # CONFIG_DEBUG_ATOMIC_SLEEP is not set
> # CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set
> # CONFIG_LOCK_TORTURE_TEST is not set
> CONFIG_STACKTRACE=y
> # CONFIG_DEBUG_KOBJECT is not set
> CONFIG_HAVE_DEBUG_BUGVERBOSE=y
> CONFIG_DEBUG_BUGVERBOSE=y
> # CONFIG_DEBUG_LIST is not set
> # CONFIG_DEBUG_PI_LIST is not set
> # CONFIG_DEBUG_SG is not set
> # CONFIG_DEBUG_NOTIFIERS is not set
> # CONFIG_DEBUG_CREDENTIALS is not set
>
> #
> # RCU Debugging
> #
> # CONFIG_PROVE_RCU is not set
> # CONFIG_SPARSE_RCU_POINTER is not set
> # CONFIG_TORTURE_TEST is not set
> # CONFIG_RCU_PERF_TEST is not set
> # CONFIG_RCU_TORTURE_TEST is not set
> CONFIG_RCU_CPU_STALL_TIMEOUT!
> # CONFIG_RCU_TRACE is not set
> # CONFIG_RCU_EQS_DEBUG is not set
> # CONFIG_DEBUG_WQ_FORCE_RR_CPU is not set
> # CONFIG_DEBUG_BLOCK_EXT_DEVT is not set
> # CONFIG_NOTIFIER_ERROR_INJECTION is not set
> # CONFIG_FAULT_INJECTION is not set
> CONFIG_LATENCYTOP=y
> CONFIG_HAVE_FUNCTION_TRACER=y
> CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y
> CONFIG_HAVE_DYNAMIC_FTRACE=y
> CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y
> CONFIG_HAVE_SYSCALL_TRACEPOINTS=y
> CONFIG_TRACING_SUPPORT=y
> # CONFIG_FTRACE is not set
>
> #
> # Runtime Testing
> #
> # CONFIG_LKDTM is not set
> # CONFIG_TEST_LIST_SORT is not set
> # CONFIG_BACKTRACE_SELF_TEST is not set
> # CONFIG_RBTREE_TEST is not set
> # CONFIG_INTERVAL_TREE_TEST is not set
> # CONFIG_PERCPU_TEST is not set
> # CONFIG_ATOMIC64_SELFTEST is not set
> # CONFIG_TEST_HEXDUMP is not set
> # CONFIG_TEST_STRING_HELPERS is not set
> # CONFIG_TEST_KSTRTOX is not set
> # CONFIG_TEST_PRINTF is not set
> # CONFIG_TEST_BITMAP is not set
> # CONFIG_TEST_UUID is not set
> # CONFIG_TEST_RHASHTABLE is not set
> # CONFIG_TEST_HASH is not set
> # CONFIG_DMA_API_DEBUG is not set
> # CONFIG_TEST_LKM is not set
> # CONFIG_TEST_USER_COPY is not set
> # CONFIG_TEST_BPF is not set
> # CONFIG_TEST_FIRMWARE is not set
> # CONFIG_TEST_UDELAY is not set
> # CONFIG_MEMTEST is not set
> # CONFIG_TEST_STATIC_KEYS is not set
> # CONFIG_SAMPLES is not set
> CONFIG_HAVE_ARCH_KGDB=y
> # CONFIG_KGDB is not set
> # CONFIG_UBSAN is not set
> # CONFIG_SH_STANDARD_BIOS is not set
> # CONFIG_STACK_DEBUG is not set
> # CONFIG_4KSTACKS is not set
> CONFIG_DUMP_CODE=y
> # CONFIG_DWARF_UNWINDER is not set
> # CONFIG_SH_NO_BSS_INIT is not set
>
> #
> # Security options
> #
> CONFIG_KEYS=y
> # CONFIG_PERSISTENT_KEYRINGS is not set
> # CONFIG_ENCRYPTED_KEYS is not set
> # CONFIG_KEY_DH_OPERATIONS is not set
> # CONFIG_SECURITY_DMESG_RESTRICT is not set
> CONFIG_SECURITY=y
> CONFIG_SECURITYFS=y
> CONFIG_SECURITY_NETWORK=y
> CONFIG_SECURITY_NETWORK_XFRM=y
> CONFIG_SECURITY_PATH=y
> CONFIG_HAVE_HARDENED_USERCOPY_ALLOCATOR=y
> # CONFIG_SECURITY_SELINUX is not set
> # CONFIG_SECURITY_SMACK is not set
> CONFIG_SECURITY_TOMOYO=y
> CONFIG_SECURITY_TOMOYO_MAX_ACCEPT_ENTRY 48
> CONFIG_SECURITY_TOMOYO_MAX_AUDIT_LOG\x1024
> # CONFIG_SECURITY_TOMOYO_OMIT_USERSPACE_LOADER is not set
> CONFIG_SECURITY_TOMOYO_POLICY_LOADER="/sbin/tomoyo-init"
> CONFIG_SECURITY_TOMOYO_ACTIVATION_TRIGGER="/sbin/init"
> CONFIG_SECURITY_APPARMOR=y
> CONFIG_SECURITY_APPARMOR_BOOTPARAM_VALUE=1
> CONFIG_SECURITY_APPARMOR_HASH=y
> CONFIG_SECURITY_APPARMOR_HASH_DEFAULT=y
> # CONFIG_SECURITY_LOADPIN is not set
> CONFIG_SECURITY_YAMA=y
> CONFIG_INTEGRITY=y
> # CONFIG_INTEGRITY_SIGNATURE is not set
> CONFIG_INTEGRITY_AUDIT=y
> # CONFIG_IMA is not set
> # CONFIG_EVM is not set
> # CONFIG_DEFAULT_SECURITY_TOMOYO is not set
> # CONFIG_DEFAULT_SECURITY_APPARMOR is not set
> CONFIG_DEFAULT_SECURITY_DAC=y
> CONFIG_DEFAULT_SECURITY=""
> CONFIG_CRYPTO=y
>
> #
> # Crypto core or helper
> #
> CONFIG_CRYPTO_ALGAPI=y
> CONFIG_CRYPTO_ALGAPI2=y
> CONFIG_CRYPTO_AEAD=m
> CONFIG_CRYPTO_AEAD2=y
> CONFIG_CRYPTO_BLKCIPHER=m
> CONFIG_CRYPTO_BLKCIPHER2=y
> CONFIG_CRYPTO_HASH=y
> CONFIG_CRYPTO_HASH2=y
> CONFIG_CRYPTO_RNG=m
> CONFIG_CRYPTO_RNG2=y
> CONFIG_CRYPTO_RNG_DEFAULT=m
> CONFIG_CRYPTO_AKCIPHER2=y
> CONFIG_CRYPTO_KPP2=y
> # CONFIG_CRYPTO_RSA is not set
> # CONFIG_CRYPTO_DH is not set
> # CONFIG_CRYPTO_ECDH is not set
> CONFIG_CRYPTO_MANAGER=y
> CONFIG_CRYPTO_MANAGER2=y
> # CONFIG_CRYPTO_USER is not set
> CONFIG_CRYPTO_MANAGER_DISABLE_TESTS=y
> # CONFIG_CRYPTO_GF128MUL is not set
> CONFIG_CRYPTO_NULL=m
> CONFIG_CRYPTO_NULL2=y
> CONFIG_CRYPTO_WORKQUEUE=y
> # CONFIG_CRYPTO_CRYPTD is not set
> # CONFIG_CRYPTO_MCRYPTD is not set
> # CONFIG_CRYPTO_AUTHENC is not set
> # CONFIG_CRYPTO_TEST is not set
>
> #
> # Authenticated Encryption with Associated Data
> #
> # CONFIG_CRYPTO_CCM is not set
> # CONFIG_CRYPTO_GCM is not set
> # CONFIG_CRYPTO_CHACHA20POLY1305 is not set
> # CONFIG_CRYPTO_SEQIV is not set
> CONFIG_CRYPTO_ECHAINIV=m
>
> #
> # Block modes
> #
> CONFIG_CRYPTO_CBC=m
> # CONFIG_CRYPTO_CTR is not set
> # CONFIG_CRYPTO_CTS is not set
> CONFIG_CRYPTO_ECB=m
> # CONFIG_CRYPTO_LRW is not set
> # CONFIG_CRYPTO_PCBC is not set
> # CONFIG_CRYPTO_XTS is not set
> # CONFIG_CRYPTO_KEYWRAP is not set
>
> #
> # Hash modes
> #
> # CONFIG_CRYPTO_CMAC is not set
> CONFIG_CRYPTO_HMAC=y
> # CONFIG_CRYPTO_XCBC is not set
> # CONFIG_CRYPTO_VMAC is not set
>
> #
> # Digest
> #
> CONFIG_CRYPTO_CRC32C=y
> # CONFIG_CRYPTO_CRC32 is not set
> # CONFIG_CRYPTO_CRCT10DIF is not set
> # CONFIG_CRYPTO_GHASH is not set
> # CONFIG_CRYPTO_POLY1305 is not set
> # CONFIG_CRYPTO_MD4 is not set
> # CONFIG_CRYPTO_MD5 is not set
> # CONFIG_CRYPTO_MICHAEL_MIC is not set
> # CONFIG_CRYPTO_RMD128 is not set
> # CONFIG_CRYPTO_RMD160 is not set
> # CONFIG_CRYPTO_RMD256 is not set
> # CONFIG_CRYPTO_RMD320 is not set
> CONFIG_CRYPTO_SHA1=y
> CONFIG_CRYPTO_SHA256=m
> # CONFIG_CRYPTO_SHA512 is not set
> # CONFIG_CRYPTO_SHA3 is not set
> # CONFIG_CRYPTO_TGR192 is not set
> # CONFIG_CRYPTO_WP512 is not set
>
> #
> # Ciphers
> #
> CONFIG_CRYPTO_AES=y
> # CONFIG_CRYPTO_ANUBIS is not set
> CONFIG_CRYPTO_ARC4=m
> # CONFIG_CRYPTO_BLOWFISH is not set
> # CONFIG_CRYPTO_CAMELLIA is not set
> # CONFIG_CRYPTO_CAST5 is not set
> # CONFIG_CRYPTO_CAST6 is not set
> # CONFIG_CRYPTO_DES is not set
> # CONFIG_CRYPTO_FCRYPT is not set
> # CONFIG_CRYPTO_KHAZAD is not set
> # CONFIG_CRYPTO_SALSA20 is not set
> # CONFIG_CRYPTO_CHACHA20 is not set
> # CONFIG_CRYPTO_SEED is not set
> # CONFIG_CRYPTO_SERPENT is not set
> # CONFIG_CRYPTO_TEA is not set
> # CONFIG_CRYPTO_TWOFISH is not set
>
> #
> # Compression
> #
> # CONFIG_CRYPTO_DEFLATE is not set
> CONFIG_CRYPTO_LZO=y
> # CONFIG_CRYPTO_842 is not set
> # CONFIG_CRYPTO_LZ4 is not set
> # CONFIG_CRYPTO_LZ4HC is not set
>
> #
> # Random Number Generation
> #
> # CONFIG_CRYPTO_ANSI_CPRNG is not set
> CONFIG_CRYPTO_DRBG_MENU=m
> CONFIG_CRYPTO_DRBG_HMAC=y
> # CONFIG_CRYPTO_DRBG_HASH is not set
> CONFIG_CRYPTO_DRBG=m
> CONFIG_CRYPTO_JITTERENTROPY=m
> CONFIG_CRYPTO_USER_API=m
> CONFIG_CRYPTO_USER_API_HASH=m
> CONFIG_CRYPTO_USER_API_SKCIPHER=m
> # CONFIG_CRYPTO_USER_API_RNG is not set
> # CONFIG_CRYPTO_USER_API_AEAD is not set
> # CONFIG_CRYPTO_HW is not set
> # CONFIG_ASYMMETRIC_KEY_TYPE is not set
>
> #
> # Certificates for signature checking
> #
> # CONFIG_BINARY_PRINTF is not set
>
> #
> # Library routines
> #
> CONFIG_BITREVERSE=y
> # CONFIG_HAVE_ARCH_BITREVERSE is not set
> CONFIG_GENERIC_STRNCPY_FROM_USER=y
> CONFIG_GENERIC_STRNLEN_USER=y
> CONFIG_GENERIC_NET_UTILS=y
> CONFIG_NO_GENERIC_PCI_IOPORT_MAP=y
> CONFIG_GENERIC_PCI_IOMAP=y
> CONFIG_GENERIC_IO=y
> CONFIG_CRC_CCITT=m
> CONFIG_CRC16=y
> # CONFIG_CRC_T10DIF is not set
> # CONFIG_CRC_ITU_T is not set
> CONFIG_CRC32=y
> # CONFIG_CRC32_SELFTEST is not set
> CONFIG_CRC32_SLICEBY8=y
> # CONFIG_CRC32_SLICEBY4 is not set
> # CONFIG_CRC32_SARWATE is not set
> # CONFIG_CRC32_BIT is not set
> # CONFIG_CRC7 is not set
> # CONFIG_LIBCRC32C is not set
> # CONFIG_CRC8 is not set
> CONFIG_AUDIT_GENERIC=y
> # CONFIG_AUDIT_ARCH_COMPAT_GENERIC is not set
> # CONFIG_RANDOM32_SELFTEST is not set
> CONFIG_ZLIB_INFLATE=m
> CONFIG_ZLIB_DEFLATE=m
> CONFIG_LZO_COMPRESS=y
> CONFIG_LZO_DECOMPRESS=y
> # CONFIG_XZ_DEC is not set
> # CONFIG_XZ_DEC_BCJ is not set
> CONFIG_ASSOCIATIVE_ARRAY=y
> CONFIG_HAS_IOMEM=y
> CONFIG_HAS_IOPORT_MAP=y
> CONFIG_HAS_DMA=y
> CONFIG_DQL=y
> CONFIG_NLATTR=y
> CONFIG_GENERIC_ATOMIC64=y
> CONFIG_ARCH_HAS_ATOMIC64_DEC_IF_POSITIVE=y
> # CONFIG_CORDIC is not set
> # CONFIG_DDR is not set
> # CONFIG_IRQ_POLL is not set
> CONFIG_OID_REGISTRY=y
> # CONFIG_SG_SPLIT is not set
> CONFIG_SG_POOL=y
> # CONFIG_ARCH_HAS_SG_CHAIN is not set
--
Yosinori Sato
^ permalink raw reply [flat|nested] 138+ messages in thread
* Re: [J-core] [PATCH v5 00/22] sh: LANDISK and R2Dplus convert to device tree
@ 2018-05-07 1:40 ` Yoshinori Sato
0 siblings, 0 replies; 138+ messages in thread
From: Yoshinori Sato @ 2018-05-07 1:40 UTC (permalink / raw)
To: John Paul Adrian Glaubitz
Cc: Rich Felker, Rob Landley, linux-sh, linux-kernel
On Thu, 03 May 2018 19:07:38 +0900,
John Paul Adrian Glaubitz wrote:
>
> [1 <text/plain; utf-8 (7bit)>]
> Hi Rich!
>
> On 05/03/2018 04:33 AM, Rich Felker wrote:
> > I found the U-Boot stuff here:
> >
> > https://ja.osdn.net/users/ysato/pf/uboot/wiki/FrontPage
> >
> > but I'm not sure how to install it yet. Will try to figure it out.
>
> Interesting. It seems the HDL-160U uses u-boot instead of lilo which
> is used on my USL-5P. Both are based on the LANDISK platform though.
> I wonder whether it is possible to convert the USL-5P to use u-boot
> instead of the very limited lilo.
>
> As for the kernel configuration, for USL-5P, I had to use the kernel
> configuration attached to this mail. One important configuration setting
> is CONFIG_SH_PCLK_FREQ which has to be set to "33250000" otherwise
> the kernel won't boot properly.
>
> I still have my USL-5P ready to be set up for testing a new kernel
> image with the device tree patches merged. Although I still don't
> know how to enable the internal (pseudo) IDE controller.
>
> @Yoshinori:
>
> Did the HDL-160U LANDISK device you have use u-boot by default or
> did you convert it from lilo?
Yes.
Replace sh-lilo's second stage with u-boot.
With this method it is unnecessary to rewrite Flash for boot.
> Adrian
>
> --
> .''`. John Paul Adrian Glaubitz
> : :' : Debian Developer - glaubitz@debian.org
> `. `' Freie Universitaet Berlin - glaubitz@physik.fu-berlin.de
> `- GPG: 62FF 8A75 84E0 2956 9546 0006 7426 3B37 F5B5 F913
> [2 config-usl-5p-4.8.12.txt <text/plain; UTF-8 (base64)>]
> #
> # Automatically generated file; DO NOT EDIT.
> # Linux/sh 4.8.12 Kernel Configuration
> #
> CONFIG_SUPERH=y
> CONFIG_SUPERH32=y
> # CONFIG_SUPERH64 is not set
> CONFIG_ARCH_DEFCONFIG="arch/sh/configs/shx3_defconfig"
> CONFIG_RWSEM_GENERIC_SPINLOCK=y
> CONFIG_GENERIC_BUG=y
> CONFIG_GENERIC_HWEIGHT=y
> # CONFIG_ARCH_SUSPEND_POSSIBLE is not set
> CONFIG_ARCH_HIBERNATION_POSSIBLE=y
> CONFIG_SYS_SUPPORTS_HUGETLBFS=y
> CONFIG_SYS_SUPPORTS_PCI=y
> CONFIG_STACKTRACE_SUPPORT=y
> CONFIG_LOCKDEP_SUPPORT=y
> # CONFIG_ARCH_HAS_ILOG2_U32 is not set
> # CONFIG_ARCH_HAS_ILOG2_U64 is not set
> # CONFIG_NO_IOPORT_MAP is not set
> CONFIG_DMA_NONCOHERENT=y
> CONFIG_NEED_DMA_MAP_STATE=y
> CONFIG_NEED_SG_DMA_LENGTH=y
> CONFIG_PGTABLE_LEVELS=2
> CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
> CONFIG_CONSTRUCTORS=y
> CONFIG_IRQ_WORK=y
>
> #
> # General setup
> #
> CONFIG_BROKEN_ON_SMP=y
> CONFIG_INIT_ENV_ARG_LIMIT=32
> CONFIG_CROSS_COMPILE=""
> # CONFIG_COMPILE_TEST is not set
> CONFIG_LOCALVERSION=""
> CONFIG_LOCALVERSION_AUTO=y
> CONFIG_HAVE_KERNEL_GZIP=y
> CONFIG_HAVE_KERNEL_BZIP2=y
> CONFIG_HAVE_KERNEL_LZMA=y
> CONFIG_HAVE_KERNEL_XZ=y
> CONFIG_HAVE_KERNEL_LZO=y
> CONFIG_KERNEL_GZIP=y
> # CONFIG_KERNEL_BZIP2 is not set
> # CONFIG_KERNEL_LZMA is not set
> # CONFIG_KERNEL_XZ is not set
> # CONFIG_KERNEL_LZO is not set
> CONFIG_DEFAULT_HOSTNAME="(none)"
> CONFIG_SWAP=y
> CONFIG_SYSVIPC=y
> CONFIG_SYSVIPC_SYSCTL=y
> CONFIG_POSIX_MQUEUE=y
> CONFIG_POSIX_MQUEUE_SYSCTL=y
> CONFIG_CROSS_MEMORY_ATTACH=y
> CONFIG_FHANDLE=y
> CONFIG_USELIB=y
> CONFIG_AUDIT=y
> CONFIG_HAVE_ARCH_AUDITSYSCALL=y
> CONFIG_AUDITSYSCALL=y
> CONFIG_AUDIT_WATCH=y
> CONFIG_AUDIT_TREE=y
>
> #
> # IRQ subsystem
> #
> CONFIG_MAY_HAVE_SPARSE_IRQ=y
> CONFIG_GENERIC_IRQ_SHOW=y
> CONFIG_IRQ_DOMAIN=y
> # CONFIG_IRQ_DOMAIN_DEBUG is not set
> CONFIG_IRQ_FORCED_THREADING=y
> CONFIG_SPARSE_IRQ=y
> CONFIG_GENERIC_CLOCKEVENTS=y
>
> #
> # Timers subsystem
> #
> CONFIG_TICK_ONESHOT=y
> CONFIG_NO_HZ_COMMON=y
> # CONFIG_HZ_PERIODIC is not set
> CONFIG_NO_HZ_IDLE=y
> CONFIG_NO_HZ=y
> CONFIG_HIGH_RES_TIMERS=y
>
> #
> # CPU/Task time and stats accounting
> #
> CONFIG_TICK_CPU_ACCOUNTING=y
> CONFIG_BSD_PROCESS_ACCT=y
> # CONFIG_BSD_PROCESS_ACCT_V3 is not set
> # CONFIG_TASKSTATS is not set
>
> #
> # RCU Subsystem
> #
> CONFIG_PREEMPT_RCU=y
> # CONFIG_RCU_EXPERT is not set
> CONFIG_SRCU=y
> # CONFIG_TASKS_RCU is not set
> CONFIG_RCU_STALL_COMMON=y
> # CONFIG_TREE_RCU_TRACE is not set
> # CONFIG_RCU_EXPEDITE_BOOT is not set
> CONFIG_BUILD_BIN2C=y
> CONFIG_IKCONFIG=y
> CONFIG_IKCONFIG_PROC=y
> CONFIG_LOG_BUF_SHIFT=16
> CONFIG_NMI_LOG_BUF_SHIFT=13
> CONFIG_GENERIC_SCHED_CLOCK=y
> CONFIG_CGROUPS=y
> # CONFIG_MEMCG is not set
> # CONFIG_BLK_CGROUP is not set
> CONFIG_CGROUP_SCHED=y
> CONFIG_FAIR_GROUP_SCHED=y
> # CONFIG_CFS_BANDWIDTH is not set
> # CONFIG_RT_GROUP_SCHED is not set
> # CONFIG_CGROUP_PIDS is not set
> CONFIG_CGROUP_FREEZER=y
> # CONFIG_CGROUP_HUGETLB is not set
> CONFIG_CPUSETS=y
> CONFIG_PROC_PID_CPUSET=y
> CONFIG_CGROUP_DEVICE=y
> CONFIG_CGROUP_CPUACCT=y
> CONFIG_CGROUP_PERF=y
> # CONFIG_CGROUP_DEBUG is not set
> # CONFIG_CHECKPOINT_RESTORE is not set
> # CONFIG_NAMESPACES is not set
> # CONFIG_SCHED_AUTOGROUP is not set
> # CONFIG_SYSFS_DEPRECATED is not set
> # CONFIG_RELAY is not set
> # CONFIG_BLK_DEV_INITRD is not set
> CONFIG_CC_OPTIMIZE_FOR_PERFORMANCE=y
> # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
> CONFIG_SYSCTL=y
> CONFIG_ANON_INODES=y
> CONFIG_HAVE_UID16=y
> CONFIG_BPF=y
> CONFIG_EXPERT=y
> CONFIG_UID16=y
> CONFIG_MULTIUSER=y
> CONFIG_SGETMASK_SYSCALL=y
> CONFIG_SYSFS_SYSCALL=y
> # CONFIG_SYSCTL_SYSCALL is not set
> CONFIG_KALLSYMS=y
> CONFIG_KALLSYMS_ALL=y
> # CONFIG_KALLSYMS_ABSOLUTE_PERCPU is not set
> CONFIG_KALLSYMS_BASE_RELATIVE=y
> CONFIG_PRINTK=y
> CONFIG_PRINTK_NMI=y
> CONFIG_BUG=y
> CONFIG_ELF_CORE=y
> CONFIG_BASE_FULL=y
> CONFIG_FUTEX=y
> CONFIG_HAVE_FUTEX_CMPXCHG=y
> CONFIG_EPOLL=y
> CONFIG_SIGNALFD=y
> CONFIG_TIMERFD=y
> CONFIG_EVENTFD=y
> # CONFIG_BPF_SYSCALL is not set
> CONFIG_SHMEM=y
> CONFIG_AIO=y
> CONFIG_ADVISE_SYSCALLS=y
> # CONFIG_USERFAULTFD is not set
> CONFIG_PCI_QUIRKS=y
> CONFIG_MEMBARRIER=y
> # CONFIG_EMBEDDED is not set
> CONFIG_HAVE_PERF_EVENTS=y
> CONFIG_PERF_USE_VMALLOC=y
>
> #
> # Kernel Performance Events And Counters
> #
> CONFIG_PERF_EVENTS=y
> # CONFIG_DEBUG_PERF_USE_VMALLOC is not set
> CONFIG_VM_EVENT_COUNTERS=y
> # CONFIG_COMPAT_BRK is not set
> CONFIG_SLAB=y
> # CONFIG_SLUB is not set
> # CONFIG_SLOB is not set
> # CONFIG_SLAB_FREELIST_RANDOM is not set
> # CONFIG_SYSTEM_DATA_VERIFICATION is not set
> CONFIG_PROFILING=y
> # CONFIG_OPROFILE is not set
> CONFIG_HAVE_OPROFILE=y
> # CONFIG_KPROBES is not set
> # CONFIG_UPROBES is not set
> # CONFIG_HAVE_64BIT_ALIGNED_ACCESS is not set
> CONFIG_HAVE_IOREMAP_PROT=y
> CONFIG_HAVE_KPROBES=y
> CONFIG_HAVE_KRETPROBES=y
> CONFIG_HAVE_NMI=y
> CONFIG_HAVE_ARCH_TRACEHOOK=y
> CONFIG_GENERIC_SMP_IDLE_THREAD=y
> CONFIG_GENERIC_IDLE_POLL_SETUP=y
> CONFIG_HAVE_REGS_AND_STACK_ACCESS_API=y
> CONFIG_HAVE_CLK=y
> CONFIG_HAVE_DMA_API_DEBUG=y
> CONFIG_HAVE_HW_BREAKPOINT=y
> CONFIG_HAVE_MIXED_BREAKPOINTS_REGS=y
> CONFIG_ARCH_WANT_IPC_PARSE_VERSION=y
> CONFIG_HAVE_CC_STACKPROTECTOR=y
> # CONFIG_CC_STACKPROTECTOR is not set
> CONFIG_CC_STACKPROTECTOR_NONE=y
> # CONFIG_CC_STACKPROTECTOR_REGULAR is not set
> # CONFIG_CC_STACKPROTECTOR_STRONG is not set
> CONFIG_MODULES_USE_ELF_RELA=y
> # CONFIG_HAVE_ARCH_HASH is not set
> # CONFIG_ISA_BUS_API is not set
> CONFIG_OLD_SIGSUSPEND=y
> CONFIG_OLD_SIGACTION=y
> CONFIG_CPU_NO_EFFICIENT_FFS=y
>
> #
> # GCOV-based kernel profiling
> #
> CONFIG_GCOV_KERNEL=y
> CONFIG_ARCH_HAS_GCOV_PROFILE_ALL=y
> # CONFIG_GCOV_PROFILE_ALL is not set
> CONFIG_GCOV_FORMAT_AUTODETECT=y
> # CONFIG_GCOV_FORMAT_3_4 is not set
> # CONFIG_GCOV_FORMAT_4_7 is not set
> CONFIG_HAVE_GENERIC_DMA_COHERENT=y
> CONFIG_SLABINFO=y
> CONFIG_RT_MUTEXES=y
> CONFIG_BASE_SMALL=0
> CONFIG_MODULES=y
> # CONFIG_MODULE_FORCE_LOAD is not set
> CONFIG_MODULE_UNLOAD=y
> # CONFIG_MODULE_FORCE_UNLOAD is not set
> # CONFIG_MODVERSIONS is not set
> # CONFIG_MODULE_SRCVERSION_ALL is not set
> # CONFIG_MODULE_SIG is not set
> # CONFIG_MODULE_COMPRESS is not set
> # CONFIG_TRIM_UNUSED_KSYMS is not set
> CONFIG_MODULES_TREE_LOOKUP=y
> CONFIG_BLOCK=y
> CONFIG_LBDAF=y
> CONFIG_BLK_DEV_BSG=y
> # CONFIG_BLK_DEV_BSGLIB is not set
> # CONFIG_BLK_DEV_INTEGRITY is not set
> # CONFIG_BLK_CMDLINE_PARSER is not set
>
> #
> # Partition Types
> #
> CONFIG_PARTITION_ADVANCED=y
> # CONFIG_ACORN_PARTITION is not set
> # CONFIG_AIX_PARTITION is not set
> # CONFIG_OSF_PARTITION is not set
> # CONFIG_AMIGA_PARTITION is not set
> # CONFIG_ATARI_PARTITION is not set
> # CONFIG_MAC_PARTITION is not set
> CONFIG_MSDOS_PARTITION=y
> # CONFIG_BSD_DISKLABEL is not set
> # CONFIG_MINIX_SUBPARTITION is not set
> # CONFIG_SOLARIS_X86_PARTITION is not set
> # CONFIG_UNIXWARE_DISKLABEL is not set
> # CONFIG_LDM_PARTITION is not set
> # CONFIG_SGI_PARTITION is not set
> # CONFIG_ULTRIX_PARTITION is not set
> # CONFIG_SUN_PARTITION is not set
> # CONFIG_KARMA_PARTITION is not set
> CONFIG_EFI_PARTITION=y
> # CONFIG_SYSV68_PARTITION is not set
> # CONFIG_CMDLINE_PARTITION is not set
>
> #
> # IO Schedulers
> #
> CONFIG_IOSCHED_NOOP=y
> CONFIG_IOSCHED_DEADLINE=y
> CONFIG_IOSCHED_CFQ=y
> # CONFIG_DEFAULT_DEADLINE is not set
> CONFIG_DEFAULT_CFQ=y
> # CONFIG_DEFAULT_NOOP is not set
> CONFIG_DEFAULT_IOSCHED="cfq"
> CONFIG_UNINLINE_SPIN_UNLOCK=y
> CONFIG_FREEZER=y
>
> #
> # System type
> #
> CONFIG_CPU_SH4=y
> CONFIG_CPU_HAS_PMU=y
> # CONFIG_CPU_SUBTYPE_SH7619 is not set
> # CONFIG_CPU_SUBTYPE_J2 is not set
> # CONFIG_CPU_SUBTYPE_SH7201 is not set
> # CONFIG_CPU_SUBTYPE_SH7203 is not set
> # CONFIG_CPU_SUBTYPE_SH7206 is not set
> # CONFIG_CPU_SUBTYPE_SH7263 is not set
> # CONFIG_CPU_SUBTYPE_SH7264 is not set
> # CONFIG_CPU_SUBTYPE_SH7269 is not set
> # CONFIG_CPU_SUBTYPE_MXG is not set
> # CONFIG_CPU_SUBTYPE_SH7705 is not set
> # CONFIG_CPU_SUBTYPE_SH7706 is not set
> # CONFIG_CPU_SUBTYPE_SH7707 is not set
> # CONFIG_CPU_SUBTYPE_SH7708 is not set
> # CONFIG_CPU_SUBTYPE_SH7709 is not set
> # CONFIG_CPU_SUBTYPE_SH7710 is not set
> # CONFIG_CPU_SUBTYPE_SH7712 is not set
> # CONFIG_CPU_SUBTYPE_SH7720 is not set
> # CONFIG_CPU_SUBTYPE_SH7721 is not set
> # CONFIG_CPU_SUBTYPE_SH7750 is not set
> # CONFIG_CPU_SUBTYPE_SH7091 is not set
> # CONFIG_CPU_SUBTYPE_SH7750R is not set
> # CONFIG_CPU_SUBTYPE_SH7750S is not set
> # CONFIG_CPU_SUBTYPE_SH7751 is not set
> CONFIG_CPU_SUBTYPE_SH7751R=y
> # CONFIG_CPU_SUBTYPE_SH7760 is not set
> # CONFIG_CPU_SUBTYPE_SH4_202 is not set
> # CONFIG_CPU_SUBTYPE_SH7723 is not set
> # CONFIG_CPU_SUBTYPE_SH7724 is not set
> # CONFIG_CPU_SUBTYPE_SH7734 is not set
> # CONFIG_CPU_SUBTYPE_SH7757 is not set
> # CONFIG_CPU_SUBTYPE_SH7763 is not set
> # CONFIG_CPU_SUBTYPE_SH7770 is not set
> # CONFIG_CPU_SUBTYPE_SH7780 is not set
> # CONFIG_CPU_SUBTYPE_SH7785 is not set
> # CONFIG_CPU_SUBTYPE_SH7786 is not set
> # CONFIG_CPU_SUBTYPE_SHX3 is not set
> # CONFIG_CPU_SUBTYPE_SH7343 is not set
> # CONFIG_CPU_SUBTYPE_SH7722 is not set
> # CONFIG_CPU_SUBTYPE_SH7366 is not set
>
> #
> # Memory management options
> #
> CONFIG_QUICKLIST=y
> CONFIG_MMU=y
> CONFIG_PAGE_OFFSET=0x80000000
> CONFIG_FORCE_MAX_ZONEORDER=11
> CONFIG_MEMORY_START=0xc000000
> CONFIG_MEMORY_SIZE=0x4000000
> CONFIG_29BIT=y
> CONFIG_VSYSCALL=y
> CONFIG_ARCH_FLATMEM_ENABLE=y
> CONFIG_ARCH_SPARSEMEM_ENABLE=y
> CONFIG_ARCH_SPARSEMEM_DEFAULT=y
> CONFIG_ARCH_SELECT_MEMORY_MODEL=y
> CONFIG_ARCH_ENABLE_MEMORY_HOTPLUG=y
> CONFIG_ARCH_ENABLE_MEMORY_HOTREMOVE=y
> CONFIG_UNCACHED_MAPPING=y
> CONFIG_PAGE_SIZE_4KB=y
> # CONFIG_PAGE_SIZE_64KB is not set
> # CONFIG_HUGETLB_PAGE_SIZE_64K is not set
> CONFIG_HUGETLB_PAGE_SIZE_1MB=y
> CONFIG_SELECT_MEMORY_MODEL=y
> # CONFIG_FLATMEM_MANUAL is not set
> CONFIG_SPARSEMEM_MANUAL=y
> CONFIG_SPARSEMEM=y
> CONFIG_HAVE_MEMORY_PRESENT=y
> CONFIG_SPARSEMEM_STATIC=y
> CONFIG_HAVE_MEMBLOCK=y
> CONFIG_HAVE_MEMBLOCK_NODE_MAP=y
> CONFIG_ARCH_DISCARD_MEMBLOCK=y
> # CONFIG_HAVE_BOOTMEM_INFO_NODE is not set
> # CONFIG_MEMORY_HOTPLUG is not set
> CONFIG_SPLIT_PTLOCK_CPUS=4
> # CONFIG_COMPACTION is not set
> CONFIG_MIGRATION=y
> # CONFIG_PHYS_ADDR_T_64BIT is not set
> CONFIG_NR_QUICK=1
> # CONFIG_KSM is not set
> CONFIG_DEFAULT_MMAP_MIN_ADDR=4096
> CONFIG_NEED_PER_CPU_KM=y
> # CONFIG_CLEANCACHE is not set
> # CONFIG_FRONTSWAP is not set
> # CONFIG_CMA is not set
> # CONFIG_ZPOOL is not set
> # CONFIG_ZBUD is not set
> # CONFIG_ZSMALLOC is not set
> # CONFIG_IDLE_PAGE_TRACKING is not set
>
> #
> # Cache configuration
> #
> CONFIG_CACHE_WRITEBACK=y
> # CONFIG_CACHE_WRITETHROUGH is not set
> # CONFIG_CACHE_OFF is not set
>
> #
> # Processor features
> #
> CONFIG_CPU_LITTLE_ENDIAN=y
> # CONFIG_CPU_BIG_ENDIAN is not set
> CONFIG_SH_FPU=y
> CONFIG_SH_STORE_QUEUES=y
> CONFIG_CPU_HAS_INTEVT=y
> CONFIG_CPU_HAS_SR_RB=y
> CONFIG_CPU_HAS_FPU=y
>
> #
> # Board support
> #
> # CONFIG_SH_DEVICE_TREE is not set
> # CONFIG_SH_SECUREEDGE5410 is not set
> # CONFIG_SH_RTS7751R2D is not set
> CONFIG_SH_LANDISK=y
> # CONFIG_SH_TITAN is not set
> # CONFIG_SH_LBOX_RE2 is not set
>
> #
> # Timer and clock configuration
> #
> CONFIG_SH_PCLK_FREQ=33250000
> CONFIG_SH_CLK_CPG=y
> CONFIG_SH_CLK_CPG_LEGACY=y
>
> #
> # CPU Frequency scaling
> #
>
> #
> # CPU Frequency scaling
> #
> CONFIG_CPU_FREQ=y
> CONFIG_CPU_FREQ_GOV_ATTR_SET=y
> CONFIG_CPU_FREQ_GOV_COMMON=y
> CONFIG_CPU_FREQ_STAT=y
> CONFIG_CPU_FREQ_STAT_DETAILS=y
> # CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE is not set
> # CONFIG_CPU_FREQ_DEFAULT_GOV_POWERSAVE is not set
> # CONFIG_CPU_FREQ_DEFAULT_GOV_USERSPACE is not set
> CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND=y
> # CONFIG_CPU_FREQ_DEFAULT_GOV_CONSERVATIVE is not set
> CONFIG_CPU_FREQ_GOV_PERFORMANCE=y
> # CONFIG_CPU_FREQ_GOV_POWERSAVE is not set
> # CONFIG_CPU_FREQ_GOV_USERSPACE is not set
> CONFIG_CPU_FREQ_GOV_ONDEMAND=y
> # CONFIG_CPU_FREQ_GOV_CONSERVATIVE is not set
>
> #
> # CPU frequency scaling drivers
> #
> CONFIG_SH_CPU_FREQ=y
>
> #
> # DMA support
> #
> CONFIG_SH_DMA=y
> CONFIG_SH_DMA_IRQ_MULTI=y
> CONFIG_SH_DMA_API=y
> CONFIG_NR_ONCHIP_DMA_CHANNELS=8
>
> #
> # Companion Chips
> #
>
> #
> # Additional SuperH Device Drivers
> #
> CONFIG_HEARTBEAT=y
> CONFIG_PUSH_SWITCH=y
>
> #
> # Kernel features
> #
> # CONFIG_HZ_100 is not set
> CONFIG_HZ_250=y
> # CONFIG_HZ_300 is not set
> # CONFIG_HZ_1000 is not set
> CONFIG_HZ=250
> CONFIG_SCHED_HRTICK=y
> # CONFIG_KEXEC is not set
> # CONFIG_CRASH_DUMP is not set
> CONFIG_PHYSICAL_START=0xc000000
> CONFIG_SECCOMP=y
> # CONFIG_PREEMPT_NONE is not set
> # CONFIG_PREEMPT_VOLUNTARY is not set
> CONFIG_PREEMPT=y
> CONFIG_PREEMPT_COUNT=y
> CONFIG_GUSA=y
> # CONFIG_GUSA_RB is not set
> CONFIG_HW_PERF_EVENTS=y
>
> #
> # SuperH / SH-Mobile Driver Options
> #
> CONFIG_SH_INTC=y
>
> #
> # Interrupt controller options
> #
> # CONFIG_INTC_MAPPING_DEBUG is not set
>
> #
> # Boot options
> #
> CONFIG_ZERO_PAGE_OFFSET=0x00001000
> CONFIG_BOOT_LINK_OFFSET=0x00800000
> CONFIG_ENTRY_OFFSET=0x00001000
>
> #
> # Bus options
> #
> CONFIG_PCI=y
> CONFIG_PCI_DOMAINS=y
> # CONFIG_PCIEPORTBUS is not set
> # CONFIG_PCI_MSI is not set
> CONFIG_PCI_DEBUG=y
> # CONFIG_PCI_REALLOC_ENABLE_AUTO is not set
> # CONFIG_PCI_STUB is not set
> # CONFIG_PCI_IOV is not set
> # CONFIG_PCI_PRI is not set
> # CONFIG_PCI_PASID is not set
> # CONFIG_HOTPLUG_PCI is not set
>
> #
> # PCI host controller drivers
> #
> # CONFIG_PCCARD is not set
>
> #
> # Executable file formats
> #
> CONFIG_BINFMT_ELF=y
> CONFIG_ELFCORE=y
> CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS=y
> CONFIG_BINFMT_SCRIPT=y
> # CONFIG_HAVE_AOUT is not set
> # CONFIG_BINFMT_MISC is not set
> CONFIG_COREDUMP=y
>
> #
> # Power management options (EXPERIMENTAL)
> #
> # CONFIG_HIBERNATION is not set
> # CONFIG_PM is not set
>
> #
> # CPU Idle
> #
> CONFIG_CPU_IDLE=y
> CONFIG_CPU_IDLE_GOV_LADDER=y
> CONFIG_CPU_IDLE_GOV_MENU=y
> # CONFIG_ARCH_NEEDS_CPU_IDLE_COUPLED is not set
> CONFIG_NET=y
>
> #
> # Networking options
> #
> CONFIG_PACKET=y
> # CONFIG_PACKET_DIAG is not set
> CONFIG_UNIX=y
> # CONFIG_UNIX_DIAG is not set
> CONFIG_XFRM=y
> # CONFIG_XFRM_USER is not set
> # CONFIG_XFRM_SUB_POLICY is not set
> # CONFIG_XFRM_MIGRATE is not set
> # CONFIG_XFRM_STATISTICS is not set
> # CONFIG_NET_KEY is not set
> CONFIG_INET=y
> # CONFIG_IP_MULTICAST is not set
> CONFIG_IP_ADVANCED_ROUTER=y
> # CONFIG_IP_FIB_TRIE_STATS is not set
> # CONFIG_IP_MULTIPLE_TABLES is not set
> # CONFIG_IP_ROUTE_MULTIPATH is not set
> # CONFIG_IP_ROUTE_VERBOSE is not set
> CONFIG_IP_PNP=y
> CONFIG_IP_PNP_DHCP=y
> CONFIG_IP_PNP_BOOTP=y
> # CONFIG_IP_PNP_RARP is not set
> CONFIG_NET_IPIP=m
> CONFIG_NET_IPGRE_DEMUX=m
> CONFIG_NET_IP_TUNNEL=y
> CONFIG_NET_IPGRE=m
> # CONFIG_SYN_COOKIES is not set
> # CONFIG_NET_IPVTI is not set
> # CONFIG_NET_UDP_TUNNEL is not set
> # CONFIG_NET_FOU is not set
> # CONFIG_NET_FOU_IP_TUNNELS is not set
> # CONFIG_INET_AH is not set
> # CONFIG_INET_ESP is not set
> # CONFIG_INET_IPCOMP is not set
> # CONFIG_INET_XFRM_TUNNEL is not set
> CONFIG_INET_TUNNEL=y
> CONFIG_INET_XFRM_MODE_TRANSPORT=y
> CONFIG_INET_XFRM_MODE_TUNNEL=y
> CONFIG_INET_XFRM_MODE_BEET=y
> CONFIG_INET_DIAG=y
> CONFIG_INET_TCP_DIAG=y
> # CONFIG_INET_UDP_DIAG is not set
> # CONFIG_INET_DIAG_DESTROY is not set
> # CONFIG_TCP_CONG_ADVANCED is not set
> CONFIG_TCP_CONG_CUBIC=y
> CONFIG_DEFAULT_TCP_CONG="cubic"
> # CONFIG_TCP_MD5SIG is not set
> CONFIG_IPV6=y
> CONFIG_IPV6_ROUTER_PREF=y
> CONFIG_IPV6_ROUTE_INFO=y
> CONFIG_IPV6_OPTIMISTIC_DAD=y
> # CONFIG_INET6_AH is not set
> # CONFIG_INET6_ESP is not set
> # CONFIG_INET6_IPCOMP is not set
> # CONFIG_IPV6_MIP6 is not set
> # CONFIG_INET6_XFRM_TUNNEL is not set
> # CONFIG_INET6_TUNNEL is not set
> CONFIG_INET6_XFRM_MODE_TRANSPORT=y
> CONFIG_INET6_XFRM_MODE_TUNNEL=y
> CONFIG_INET6_XFRM_MODE_BEET=y
> # CONFIG_INET6_XFRM_MODE_ROUTEOPTIMIZATION is not set
> # CONFIG_IPV6_VTI is not set
> CONFIG_IPV6_SIT=y
> # CONFIG_IPV6_SIT_6RD is not set
> CONFIG_IPV6_NDISC_NODETYPE=y
> # CONFIG_IPV6_TUNNEL is not set
> # CONFIG_IPV6_GRE is not set
> # CONFIG_IPV6_FOU is not set
> # CONFIG_IPV6_FOU_TUNNEL is not set
> # CONFIG_IPV6_MULTIPLE_TABLES is not set
> # CONFIG_IPV6_MROUTE is not set
> # CONFIG_NETLABEL is not set
> # CONFIG_NETWORK_SECMARK is not set
> # CONFIG_NET_PTP_CLASSIFY is not set
> # CONFIG_NETWORK_PHY_TIMESTAMPING is not set
> # CONFIG_NETFILTER is not set
> # CONFIG_IP_DCCP is not set
> # CONFIG_IP_SCTP is not set
> # CONFIG_RDS is not set
> # CONFIG_TIPC is not set
> # CONFIG_ATM is not set
> # CONFIG_L2TP is not set
> # CONFIG_BRIDGE is not set
> CONFIG_HAVE_NET_DSA=y
> # CONFIG_VLAN_8021Q is not set
> # CONFIG_DECNET is not set
> # CONFIG_LLC2 is not set
> # CONFIG_IPX is not set
> # CONFIG_ATALK is not set
> # CONFIG_X25 is not set
> # CONFIG_LAPB is not set
> # CONFIG_PHONET is not set
> # CONFIG_6LOWPAN is not set
> # CONFIG_IEEE802154 is not set
> # CONFIG_NET_SCHED is not set
> # CONFIG_DCB is not set
> CONFIG_DNS_RESOLVER=y
> # CONFIG_BATMAN_ADV is not set
> # CONFIG_OPENVSWITCH is not set
> # CONFIG_VSOCKETS is not set
> # CONFIG_NETLINK_DIAG is not set
> # CONFIG_MPLS is not set
> # CONFIG_HSR is not set
> # CONFIG_NET_SWITCHDEV is not set
> # CONFIG_NET_L3_MASTER_DEV is not set
> # CONFIG_NET_NCSI is not set
> # CONFIG_SOCK_CGROUP_DATA is not set
> # CONFIG_CGROUP_NET_PRIO is not set
> # CONFIG_CGROUP_NET_CLASSID is not set
> CONFIG_NET_RX_BUSY_POLL=y
> CONFIG_BQL=y
>
> #
> # Network testing
> #
> # CONFIG_NET_PKTGEN is not set
> # CONFIG_HAMRADIO is not set
> # CONFIG_CAN is not set
> # CONFIG_IRDA is not set
> # CONFIG_BT is not set
> # CONFIG_AF_RXRPC is not set
> # CONFIG_AF_KCM is not set
> # CONFIG_WIRELESS is not set
> # CONFIG_WIMAX is not set
> # CONFIG_RFKILL is not set
> # CONFIG_NET_9P is not set
> # CONFIG_CAIF is not set
> # CONFIG_CEPH_LIB is not set
> # CONFIG_NFC is not set
> # CONFIG_LWTUNNEL is not set
> CONFIG_DST_CACHE=y
> # CONFIG_NET_DEVLINK is not set
> CONFIG_MAY_USE_DEVLINK=y
>
> #
> # Device Drivers
> #
>
> #
> # Generic Driver Options
> #
> CONFIG_UEVENT_HELPER=y
> CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
> CONFIG_DEVTMPFS=y
> CONFIG_DEVTMPFS_MOUNT=y
> CONFIG_STANDALONE=y
> CONFIG_PREVENT_FIRMWARE_BUILD=y
> CONFIG_FW_LOADER=y
> CONFIG_FIRMWARE_IN_KERNEL=y
> CONFIG_EXTRA_FIRMWARE=""
> # CONFIG_FW_LOADER_USER_HELPER_FALLBACK is not set
> CONFIG_ALLOW_DEV_COREDUMP=y
> # CONFIG_DEBUG_DRIVER is not set
> # CONFIG_DEBUG_DEVRES is not set
> # CONFIG_SYS_HYPERVISOR is not set
> # CONFIG_GENERIC_CPU_DEVICES is not set
> CONFIG_REGMAP=y
> CONFIG_REGMAP_I2C=y
> # CONFIG_DMA_SHARED_BUFFER is not set
>
> #
> # Bus devices
> #
> # CONFIG_CONNECTOR is not set
> CONFIG_MTD=y
> # CONFIG_MTD_TESTS is not set
> # CONFIG_MTD_REDBOOT_PARTS is not set
> # CONFIG_MTD_CMDLINE_PARTS is not set
> # CONFIG_MTD_AR7_PARTS is not set
>
> #
> # User Modules And Translation Layers
> #
> CONFIG_MTD_BLKDEVS=y
> CONFIG_MTD_BLOCK=y
> # CONFIG_FTL is not set
> # CONFIG_NFTL is not set
> # CONFIG_INFTL is not set
> # CONFIG_RFD_FTL is not set
> # CONFIG_SSFDC is not set
> # CONFIG_SM_FTL is not set
> # CONFIG_MTD_OOPS is not set
> # CONFIG_MTD_SWAP is not set
> # CONFIG_MTD_PARTITIONED_MASTER is not set
>
> #
> # RAM/ROM/Flash chip drivers
> #
> CONFIG_MTD_CFI=y
> # CONFIG_MTD_JEDECPROBE is not set
> CONFIG_MTD_GEN_PROBE=y
> # CONFIG_MTD_CFI_ADV_OPTIONS is not set
> CONFIG_MTD_MAP_BANK_WIDTH_1=y
> CONFIG_MTD_MAP_BANK_WIDTH_2=y
> CONFIG_MTD_MAP_BANK_WIDTH_4=y
> # CONFIG_MTD_MAP_BANK_WIDTH_8 is not set
> # CONFIG_MTD_MAP_BANK_WIDTH_16 is not set
> # CONFIG_MTD_MAP_BANK_WIDTH_32 is not set
> CONFIG_MTD_CFI_I1=y
> CONFIG_MTD_CFI_I2=y
> # CONFIG_MTD_CFI_I4 is not set
> # CONFIG_MTD_CFI_I8 is not set
> # CONFIG_MTD_CFI_INTELEXT is not set
> CONFIG_MTD_CFI_AMDSTD=y
> # CONFIG_MTD_CFI_STAA is not set
> CONFIG_MTD_CFI_UTIL=y
> # CONFIG_MTD_RAM is not set
> # CONFIG_MTD_ROM is not set
> # CONFIG_MTD_ABSENT is not set
>
> #
> # Mapping drivers for chip access
> #
> # CONFIG_MTD_COMPLEX_MAPPINGS is not set
> CONFIG_MTD_PHYSMAP=y
> # CONFIG_MTD_PHYSMAP_COMPAT is not set
> # CONFIG_MTD_INTEL_VR_NOR is not set
> # CONFIG_MTD_PLATRAM is not set
>
> #
> # Self-contained MTD device drivers
> #
> # CONFIG_MTD_PMC551 is not set
> # CONFIG_MTD_SLRAM is not set
> # CONFIG_MTD_PHRAM is not set
> # CONFIG_MTD_MTDRAM is not set
> # CONFIG_MTD_BLOCK2MTD is not set
>
> #
> # Disk-On-Chip Device Drivers
> #
> # CONFIG_MTD_DOCG3 is not set
> # CONFIG_MTD_NAND is not set
> # CONFIG_MTD_ONENAND is not set
>
> #
> # LPDDR & LPDDR2 PCM memory drivers
> #
> # CONFIG_MTD_LPDDR is not set
> # CONFIG_MTD_SPI_NOR is not set
> # CONFIG_MTD_UBI is not set
> # CONFIG_OF is not set
> CONFIG_ARCH_MIGHT_HAVE_PC_PARPORT=y
> # CONFIG_PARPORT is not set
> CONFIG_BLK_DEV=y
> # CONFIG_BLK_DEV_NULL_BLK is not set
> # CONFIG_BLK_DEV_PCIESSD_MTIP32XX is not set
> # CONFIG_BLK_CPQ_CISS_DA is not set
> # CONFIG_BLK_DEV_DAC960 is not set
> # CONFIG_BLK_DEV_UMEM is not set
> # CONFIG_BLK_DEV_COW_COMMON is not set
> CONFIG_BLK_DEV_LOOP=y
> CONFIG_BLK_DEV_LOOP_MIN_COUNT=8
> CONFIG_BLK_DEV_CRYPTOLOOP=m
> # CONFIG_BLK_DEV_DRBD is not set
> # CONFIG_BLK_DEV_NBD is not set
> # CONFIG_BLK_DEV_SX8 is not set
> CONFIG_BLK_DEV_RAM=y
> CONFIG_BLK_DEV_RAM_COUNT=16
> CONFIG_BLK_DEV_RAM_SIZE=4096
> # CONFIG_CDROM_PKTCDVD is not set
> # CONFIG_ATA_OVER_ETH is not set
> # CONFIG_BLK_DEV_HD is not set
> # CONFIG_BLK_DEV_RBD is not set
> # CONFIG_BLK_DEV_RSXX is not set
> # CONFIG_BLK_DEV_NVME is not set
> # CONFIG_NVME_TARGET is not set
>
> #
> # Misc devices
> #
> # CONFIG_SENSORS_LIS3LV02D is not set
> # CONFIG_AD525X_DPOT is not set
> # CONFIG_DUMMY_IRQ is not set
> # CONFIG_PHANTOM is not set
> # CONFIG_SGI_IOC4 is not set
> # CONFIG_TIFM_CORE is not set
> # CONFIG_ICS932S401 is not set
> # CONFIG_ENCLOSURE_SERVICES is not set
> # CONFIG_HP_ILO is not set
> # CONFIG_APDS9802ALS is not set
> # CONFIG_ISL29003 is not set
> # CONFIG_ISL29020 is not set
> # CONFIG_SENSORS_TSL2550 is not set
> # CONFIG_SENSORS_BH1770 is not set
> # CONFIG_SENSORS_APDS990X is not set
> # CONFIG_HMC6352 is not set
> # CONFIG_DS1682 is not set
> # CONFIG_BMP085_I2C is not set
> # CONFIG_USB_SWITCH_FSA9480 is not set
> # CONFIG_SRAM is not set
> # CONFIG_C2PORT is not set
>
> #
> # EEPROM support
> #
> # CONFIG_EEPROM_AT24 is not set
> # CONFIG_EEPROM_LEGACY is not set
> # CONFIG_EEPROM_MAX6875 is not set
> # CONFIG_EEPROM_93CX6 is not set
> # CONFIG_CB710_CORE is not set
>
> #
> # Texas Instruments shared transport line discipline
> #
> # CONFIG_SENSORS_LIS3_I2C is not set
>
> #
> # Altera FPGA firmware download module
> #
> # CONFIG_ALTERA_STAPL is not set
>
> #
> # Intel MIC Bus Driver
> #
>
> #
> # SCIF Bus Driver
> #
>
> #
> # VOP Bus Driver
> #
>
> #
> # Intel MIC Host Driver
> #
>
> #
> # Intel MIC Card Driver
> #
>
> #
> # SCIF Driver
> #
>
> #
> # Intel MIC Coprocessor State Management (COSM) Drivers
> #
>
> #
> # VOP Driver
> #
> # CONFIG_ECHO is not set
> # CONFIG_CXL_BASE is not set
> # CONFIG_CXL_AFU_DRIVER_OPS is not set
> CONFIG_HAVE_IDE=y
> CONFIG_IDE=y
>
> #
> # Please see Documentation/ide/ide.txt for help/info on IDE drives
> #
> CONFIG_IDE_XFER_MODE=y
> CONFIG_IDE_ATAPI=y
> # CONFIG_BLK_DEV_IDE_SATA is not set
> CONFIG_IDE_GD=y
> CONFIG_IDE_GD_ATA=y
> CONFIG_IDE_GD_ATAPI=y
> # CONFIG_BLK_DEV_IDECD is not set
> # CONFIG_BLK_DEV_IDETAPE is not set
> # CONFIG_IDE_TASK_IOCTL is not set
> CONFIG_IDE_PROC_FS=y
>
> #
> # IDE chipset support/bugfixes
> #
> CONFIG_BLK_DEV_PLATFORM=y
> CONFIG_BLK_DEV_IDEDMA_SFF=y
>
> #
> # PCI IDE chipsets support
> #
> CONFIG_BLK_DEV_IDEPCI=y
> CONFIG_IDEPCI_PCIBUS_ORDER=y
> # CONFIG_BLK_DEV_OFFBOARD is not set
> CONFIG_BLK_DEV_GENERIC=y
> # CONFIG_BLK_DEV_OPTI621 is not set
> CONFIG_BLK_DEV_IDEDMA_PCI=y
> CONFIG_BLK_DEV_AEC62XX=y
> # CONFIG_BLK_DEV_ALI15X3 is not set
> # CONFIG_BLK_DEV_AMD74XX is not set
> # CONFIG_BLK_DEV_CMD64X is not set
> # CONFIG_BLK_DEV_TRIFLEX is not set
> # CONFIG_BLK_DEV_HPT366 is not set
> # CONFIG_BLK_DEV_JMICRON is not set
> # CONFIG_BLK_DEV_PIIX is not set
> # CONFIG_BLK_DEV_IT8172 is not set
> # CONFIG_BLK_DEV_IT8213 is not set
> # CONFIG_BLK_DEV_IT821X is not set
> # CONFIG_BLK_DEV_NS87415 is not set
> CONFIG_BLK_DEV_PDC202XX_OLD=y
> CONFIG_BLK_DEV_PDC202XX_NEW=y
> # CONFIG_BLK_DEV_SVWKS is not set
> # CONFIG_BLK_DEV_SIIMAGE is not set
> # CONFIG_BLK_DEV_SLC90E66 is not set
> # CONFIG_BLK_DEV_TRM290 is not set
> # CONFIG_BLK_DEV_VIA82CXXX is not set
> # CONFIG_BLK_DEV_TC86C001 is not set
> CONFIG_BLK_DEV_IDEDMA=y
>
> #
> # SCSI device support
> #
> CONFIG_SCSI_MOD=y
> # CONFIG_RAID_ATTRS is not set
> CONFIG_SCSI=y
> CONFIG_SCSI_DMA=y
> # CONFIG_SCSI_NETLINK is not set
> # CONFIG_SCSI_MQ_DEFAULT is not set
> # CONFIG_SCSI_PROC_FS is not set
>
> #
> # SCSI support type (disk, tape, CD-ROM)
> #
> CONFIG_BLK_DEV_SD=y
> # CONFIG_CHR_DEV_ST is not set
> # CONFIG_CHR_DEV_OSST is not set
> # CONFIG_BLK_DEV_SR is not set
> # CONFIG_CHR_DEV_SG is not set
> # CONFIG_CHR_DEV_SCH is not set
> # CONFIG_SCSI_CONSTANTS is not set
> # CONFIG_SCSI_LOGGING is not set
> # CONFIG_SCSI_SCAN_ASYNC is not set
>
> #
> # SCSI Transports
> #
> # CONFIG_SCSI_SPI_ATTRS is not set
> # CONFIG_SCSI_FC_ATTRS is not set
> # CONFIG_SCSI_ISCSI_ATTRS is not set
> # CONFIG_SCSI_SAS_ATTRS is not set
> # CONFIG_SCSI_SAS_LIBSAS is not set
> # CONFIG_SCSI_SRP_ATTRS is not set
> # CONFIG_SCSI_LOWLEVEL is not set
> # CONFIG_SCSI_DH is not set
> # CONFIG_SCSI_OSD_INITIATOR is not set
> CONFIG_HAVE_PATA_PLATFORM=y
> # CONFIG_ATA is not set
> # CONFIG_MD is not set
> # CONFIG_TARGET_CORE is not set
> # CONFIG_FUSION is not set
>
> #
> # IEEE 1394 (FireWire) support
> #
> # CONFIG_FIREWIRE is not set
> # CONFIG_FIREWIRE_NOSY is not set
> CONFIG_NETDEVICES=y
> CONFIG_MII=y
> CONFIG_NET_CORE=y
> # CONFIG_BONDING is not set
> # CONFIG_DUMMY is not set
> # CONFIG_EQUALIZER is not set
> # CONFIG_NET_FC is not set
> # CONFIG_NET_TEAM is not set
> # CONFIG_MACVLAN is not set
> # CONFIG_IPVLAN is not set
> # CONFIG_VXLAN is not set
> # CONFIG_MACSEC is not set
> # CONFIG_NETCONSOLE is not set
> # CONFIG_NETPOLL is not set
> # CONFIG_NET_POLL_CONTROLLER is not set
> # CONFIG_TUN is not set
> # CONFIG_TUN_VNET_CROSS_LE is not set
> # CONFIG_VETH is not set
> # CONFIG_NLMON is not set
> # CONFIG_ARCNET is not set
>
> #
> # CAIF transport drivers
> #
>
> #
> # Distributed Switch Architecture drivers
> #
> CONFIG_ETHERNET=y
> # CONFIG_NET_VENDOR_3COM is not set
> # CONFIG_NET_VENDOR_ADAPTEC is not set
> # CONFIG_NET_VENDOR_AGERE is not set
> # CONFIG_NET_VENDOR_ALTEON is not set
> # CONFIG_ALTERA_TSE is not set
> # CONFIG_NET_VENDOR_AMD is not set
> # CONFIG_NET_VENDOR_ARC is not set
> # CONFIG_NET_VENDOR_ATHEROS is not set
> # CONFIG_NET_VENDOR_AURORA is not set
> # CONFIG_NET_CADENCE is not set
> # CONFIG_NET_VENDOR_BROADCOM is not set
> # CONFIG_NET_VENDOR_BROCADE is not set
> # CONFIG_NET_VENDOR_CAVIUM is not set
> # CONFIG_NET_VENDOR_CHELSIO is not set
> # CONFIG_NET_VENDOR_CISCO is not set
> # CONFIG_DNET is not set
> # CONFIG_NET_VENDOR_DEC is not set
> # CONFIG_NET_VENDOR_DLINK is not set
> # CONFIG_NET_VENDOR_EMULEX is not set
> # CONFIG_NET_VENDOR_EZCHIP is not set
> # CONFIG_NET_VENDOR_EXAR is not set
> # CONFIG_NET_VENDOR_HP is not set
> # CONFIG_NET_VENDOR_INTEL is not set
> # CONFIG_JME is not set
> # CONFIG_NET_VENDOR_MARVELL is not set
> # CONFIG_NET_VENDOR_MELLANOX is not set
> # CONFIG_NET_VENDOR_MICREL is not set
> # CONFIG_NET_VENDOR_MYRI is not set
> # CONFIG_FEALNX is not set
> # CONFIG_NET_VENDOR_NATSEMI is not set
> # CONFIG_NET_VENDOR_NETRONOME is not set
> # CONFIG_NET_VENDOR_NVIDIA is not set
> # CONFIG_NET_VENDOR_OKI is not set
> # CONFIG_ETHOC is not set
> # CONFIG_NET_PACKET_ENGINE is not set
> # CONFIG_NET_VENDOR_QLOGIC is not set
> # CONFIG_NET_VENDOR_QUALCOMM is not set
> CONFIG_NET_VENDOR_REALTEK=y
> # CONFIG_8139CP is not set
> CONFIG_8139TOO=y
> # CONFIG_8139TOO_PIO is not set
> # CONFIG_8139TOO_TUNE_TWISTER is not set
> # CONFIG_8139TOO_8129 is not set
> # CONFIG_8139_OLD_RX_RESET is not set
> # CONFIG_R8169 is not set
> CONFIG_NET_VENDOR_RENESAS=y
> CONFIG_SH_ETH=y
> # CONFIG_NET_VENDOR_RDC is not set
> # CONFIG_NET_VENDOR_ROCKER is not set
> # CONFIG_NET_VENDOR_SAMSUNG is not set
> # CONFIG_NET_VENDOR_SEEQ is not set
> # CONFIG_NET_VENDOR_SILAN is not set
> # CONFIG_NET_VENDOR_SIS is not set
> # CONFIG_SFC is not set
> # CONFIG_NET_VENDOR_SMSC is not set
> # CONFIG_NET_VENDOR_STMICRO is not set
> # CONFIG_NET_VENDOR_SUN is not set
> # CONFIG_NET_VENDOR_SYNOPSYS is not set
> # CONFIG_NET_VENDOR_TEHUTI is not set
> # CONFIG_NET_VENDOR_TI is not set
> # CONFIG_NET_VENDOR_VIA is not set
> # CONFIG_NET_VENDOR_WIZNET is not set
> # CONFIG_FDDI is not set
> # CONFIG_HIPPI is not set
> CONFIG_PHYLIB=y
>
> #
> # MII PHY device drivers
> #
> # CONFIG_AQUANTIA_PHY is not set
> # CONFIG_AT803X_PHY is not set
> # CONFIG_AMD_PHY is not set
> # CONFIG_MARVELL_PHY is not set
> # CONFIG_DAVICOM_PHY is not set
> # CONFIG_QSEMI_PHY is not set
> # CONFIG_LXT_PHY is not set
> # CONFIG_CICADA_PHY is not set
> # CONFIG_VITESSE_PHY is not set
> # CONFIG_TERANETICS_PHY is not set
> # CONFIG_SMSC_PHY is not set
> # CONFIG_BROADCOM_PHY is not set
> # CONFIG_BCM7XXX_PHY is not set
> # CONFIG_BCM87XX_PHY is not set
> # CONFIG_ICPLUS_PHY is not set
> # CONFIG_REALTEK_PHY is not set
> # CONFIG_NATIONAL_PHY is not set
> # CONFIG_STE10XP is not set
> # CONFIG_LSI_ET1011C_PHY is not set
> # CONFIG_MICREL_PHY is not set
> # CONFIG_DP83848_PHY is not set
> # CONFIG_DP83867_PHY is not set
> # CONFIG_MICROCHIP_PHY is not set
> # CONFIG_FIXED_PHY is not set
> CONFIG_MDIO_BITBANG=y
> # CONFIG_MDIO_BCM_UNIMAC is not set
> # CONFIG_INTEL_XWAY_PHY is not set
> CONFIG_PPP=m
> CONFIG_PPP_BSDCOMP=m
> CONFIG_PPP_DEFLATE=m
> CONFIG_PPP_FILTER=y
> CONFIG_PPP_MPPE=m
> CONFIG_PPP_MULTILINK=y
> # CONFIG_PPPOE is not set
> CONFIG_PPTP=m
> CONFIG_PPP_ASYNC=m
> CONFIG_PPP_SYNC_TTY=m
> # CONFIG_SLIP is not set
> CONFIG_SLHC=m
> # CONFIG_USB_NET_DRIVERS is not set
> # CONFIG_WLAN is not set
>
> #
> # Enable WiMAX (Networking options) to see the WiMAX drivers
> #
> # CONFIG_WAN is not set
> # CONFIG_VMXNET3 is not set
> # CONFIG_ISDN is not set
> # CONFIG_NVM is not set
>
> #
> # Input device support
> #
> CONFIG_INPUT=y
> CONFIG_INPUT_FF_MEMLESS=m
> # CONFIG_INPUT_POLLDEV is not set
> # CONFIG_INPUT_SPARSEKMAP is not set
> # CONFIG_INPUT_MATRIXKMAP is not set
>
> #
> # Userland interfaces
> #
> CONFIG_INPUT_MOUSEDEV=y
> CONFIG_INPUT_MOUSEDEV_PSAUX=y
> CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
> CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
> # CONFIG_INPUT_JOYDEV is not set
> CONFIG_INPUT_EVDEV=y
> CONFIG_INPUT_EVBUG=m
>
> #
> # Input Device Drivers
> #
> CONFIG_INPUT_KEYBOARD=y
> # CONFIG_KEYBOARD_ADP5588 is not set
> # CONFIG_KEYBOARD_ADP5589 is not set
> CONFIG_KEYBOARD_ATKBD=y
> # CONFIG_KEYBOARD_QT1070 is not set
> # CONFIG_KEYBOARD_QT2160 is not set
> # CONFIG_KEYBOARD_LKKBD is not set
> # CONFIG_KEYBOARD_TCA6416 is not set
> # CONFIG_KEYBOARD_TCA8418 is not set
> # CONFIG_KEYBOARD_LM8333 is not set
> # CONFIG_KEYBOARD_MAX7359 is not set
> # CONFIG_KEYBOARD_MCS is not set
> # CONFIG_KEYBOARD_MPR121 is not set
> # CONFIG_KEYBOARD_NEWTON is not set
> # CONFIG_KEYBOARD_OPENCORES is not set
> # CONFIG_KEYBOARD_SAMSUNG is not set
> # CONFIG_KEYBOARD_STOWAWAY is not set
> # CONFIG_KEYBOARD_SUNKBD is not set
> # CONFIG_KEYBOARD_XTKBD is not set
> CONFIG_INPUT_MOUSE=y
> CONFIG_MOUSE_PS2=y
> CONFIG_MOUSE_PS2_ALPS=y
> CONFIG_MOUSE_PS2_BYD=y
> CONFIG_MOUSE_PS2_LOGIPS2PP=y
> CONFIG_MOUSE_PS2_SYNAPTICS=y
> CONFIG_MOUSE_PS2_CYPRESS=y
> CONFIG_MOUSE_PS2_TRACKPOINT=y
> # CONFIG_MOUSE_PS2_ELANTECH is not set
> # CONFIG_MOUSE_PS2_SENTELIC is not set
> # CONFIG_MOUSE_PS2_TOUCHKIT is not set
> CONFIG_MOUSE_PS2_FOCALTECH=y
> # CONFIG_MOUSE_SERIAL is not set
> # CONFIG_MOUSE_APPLETOUCH is not set
> # CONFIG_MOUSE_BCM5974 is not set
> # CONFIG_MOUSE_CYAPA is not set
> # CONFIG_MOUSE_ELAN_I2C is not set
> # CONFIG_MOUSE_VSXXXAA is not set
> # CONFIG_MOUSE_SYNAPTICS_I2C is not set
> # CONFIG_MOUSE_SYNAPTICS_USB is not set
> # CONFIG_INPUT_JOYSTICK is not set
> # CONFIG_INPUT_TABLET is not set
> # CONFIG_INPUT_TOUCHSCREEN is not set
> # CONFIG_INPUT_MISC is not set
> # CONFIG_RMI4_CORE is not set
>
> #
> # Hardware I/O ports
> #
> CONFIG_SERIO=y
> CONFIG_SERIO_SERPORT=y
> # CONFIG_SERIO_PCIPS2 is not set
> CONFIG_SERIO_LIBPS2=y
> # CONFIG_SERIO_RAW is not set
> # CONFIG_SERIO_ALTERA_PS2 is not set
> # CONFIG_SERIO_PS2MULT is not set
> # CONFIG_SERIO_ARC_PS2 is not set
> # CONFIG_USERIO is not set
> # CONFIG_GAMEPORT is not set
>
> #
> # Character devices
> #
> CONFIG_TTY=y
> CONFIG_VT=y
> CONFIG_CONSOLE_TRANSLATIONS=y
> CONFIG_VT_CONSOLE=y
> CONFIG_HW_CONSOLE=y
> CONFIG_VT_HW_CONSOLE_BINDING=y
> CONFIG_UNIX98_PTYS=y
> # CONFIG_LEGACY_PTYS is not set
> # CONFIG_SERIAL_NONSTANDARD is not set
> # CONFIG_NOZOMI is not set
> # CONFIG_N_GSM is not set
> # CONFIG_TRACE_SINK is not set
> CONFIG_DEVMEM=y
> # CONFIG_DEVKMEM is not set
>
> #
> # Serial drivers
> #
> # CONFIG_SERIAL_8250 is not set
>
> #
> # Non-8250 serial port support
> #
> # CONFIG_SERIAL_UARTLITE is not set
> CONFIG_SERIAL_SH_SCI=y
> CONFIG_SERIAL_SH_SCI_NR_UARTS=6
> CONFIG_SERIAL_SH_SCI_CONSOLE=y
> # CONFIG_SERIAL_SH_SCI_EARLYCON is not set
> CONFIG_SERIAL_CORE=y
> CONFIG_SERIAL_CORE_CONSOLE=y
> # CONFIG_SERIAL_JSM is not set
> # CONFIG_SERIAL_SCCNXP is not set
> # CONFIG_SERIAL_SC16IS7XX is not set
> # CONFIG_SERIAL_ALTERA_JTAGUART is not set
> # CONFIG_SERIAL_ALTERA_UART is not set
> # CONFIG_SERIAL_ARC is not set
> # CONFIG_SERIAL_RP2 is not set
> # CONFIG_SERIAL_FSL_LPUART is not set
> # CONFIG_TTY_PRINTK is not set
> # CONFIG_IPMI_HANDLER is not set
> # CONFIG_HW_RANDOM is not set
> # CONFIG_R3964 is not set
> # CONFIG_APPLICOM is not set
> # CONFIG_RAW_DRIVER is not set
> # CONFIG_TCG_TPM is not set
> CONFIG_DEVPORT=y
> # CONFIG_XILLYBUS is not set
>
> #
> # I2C support
> #
> CONFIG_I2C=y
> CONFIG_I2C_BOARDINFO=y
> CONFIG_I2C_COMPAT=y
> # CONFIG_I2C_CHARDEV is not set
> # CONFIG_I2C_MUX is not set
> CONFIG_I2C_HELPER_AUTO=y
> CONFIG_I2C_ALGOPCA=y
>
> #
> # I2C Hardware Bus support
> #
>
> #
> # PC SMBus host controller drivers
> #
> # CONFIG_I2C_ALI1535 is not set
> # CONFIG_I2C_ALI1563 is not set
> # CONFIG_I2C_ALI15X3 is not set
> # CONFIG_I2C_AMD756 is not set
> # CONFIG_I2C_AMD8111 is not set
> # CONFIG_I2C_I801 is not set
> # CONFIG_I2C_ISCH is not set
> # CONFIG_I2C_PIIX4 is not set
> # CONFIG_I2C_NFORCE2 is not set
> # CONFIG_I2C_SIS5595 is not set
> # CONFIG_I2C_SIS630 is not set
> # CONFIG_I2C_SIS96X is not set
> # CONFIG_I2C_VIA is not set
> # CONFIG_I2C_VIAPRO is not set
>
> #
> # I2C system bus drivers (mostly embedded / system-on-chip)
> #
> # CONFIG_I2C_DESIGNWARE_PLATFORM is not set
> # CONFIG_I2C_DESIGNWARE_PCI is not set
> # CONFIG_I2C_EMEV2 is not set
> # CONFIG_I2C_OCORES is not set
> CONFIG_I2C_PCA_PLATFORM=y
> # CONFIG_I2C_PXA_PCI is not set
> # CONFIG_I2C_SH_MOBILE is not set
> # CONFIG_I2C_SIMTEC is not set
> # CONFIG_I2C_XILINX is not set
>
> #
> # External I2C/SMBus adapter drivers
> #
> # CONFIG_I2C_DIOLAN_U2C is not set
> # CONFIG_I2C_PARPORT_LIGHT is not set
> # CONFIG_I2C_ROBOTFUZZ_OSIF is not set
> # CONFIG_I2C_TAOS_EVM is not set
> # CONFIG_I2C_TINY_USB is not set
>
> #
> # Other I2C/SMBus bus drivers
> #
> # CONFIG_I2C_STUB is not set
> # CONFIG_I2C_SLAVE is not set
> # CONFIG_I2C_DEBUG_CORE is not set
> # CONFIG_I2C_DEBUG_ALGO is not set
> # CONFIG_I2C_DEBUG_BUS is not set
> # CONFIG_SPI is not set
> # CONFIG_SPMI is not set
> # CONFIG_HSI is not set
>
> #
> # PPS support
> #
> # CONFIG_PPS is not set
>
> #
> # PPS generators support
> #
>
> #
> # PTP clock support
> #
> # CONFIG_PTP_1588_CLOCK is not set
>
> #
> # Enable PHYLIB and NETWORK_PHY_TIMESTAMPING to see the additional clocks.
> #
> CONFIG_ARCH_HAVE_CUSTOM_GPIO_H=y
> # CONFIG_GPIOLIB is not set
> # CONFIG_W1 is not set
> # CONFIG_POWER_SUPPLY is not set
> # CONFIG_POWER_RESET is not set
> # CONFIG_POWER_AVS is not set
> # CONFIG_HWMON is not set
> # CONFIG_THERMAL is not set
> CONFIG_WATCHDOG=y
> CONFIG_WATCHDOG_CORE=y
> # CONFIG_WATCHDOG_NOWAYOUT is not set
> # CONFIG_WATCHDOG_SYSFS is not set
>
> #
> # Watchdog Device Drivers
> #
> # CONFIG_SOFT_WATCHDOG is not set
> # CONFIG_XILINX_WATCHDOG is not set
> # CONFIG_ZIIRAVE_WATCHDOG is not set
> # CONFIG_CADENCE_WATCHDOG is not set
> # CONFIG_DW_WATCHDOG is not set
> # CONFIG_MAX63XX_WATCHDOG is not set
> # CONFIG_ALIM7101_WDT is not set
> # CONFIG_I6300ESB_WDT is not set
> CONFIG_SH_WDT=y
>
> #
> # PCI-based Watchdog Cards
> #
> # CONFIG_PCIPCWATCHDOG is not set
> # CONFIG_WDTPCI is not set
>
> #
> # USB-based Watchdog Cards
> #
> # CONFIG_USBPCWATCHDOG is not set
> CONFIG_SSB_POSSIBLE=y
>
> #
> # Sonics Silicon Backplane
> #
> # CONFIG_SSB is not set
> CONFIG_BCMA_POSSIBLE=y
>
> #
> # Broadcom specific AMBA
> #
> # CONFIG_BCMA is not set
>
> #
> # Multifunction device drivers
> #
> # CONFIG_MFD_CORE is not set
> # CONFIG_MFD_AS3711 is not set
> # CONFIG_PMIC_ADP5520 is not set
> # CONFIG_MFD_BCM590XX is not set
> # CONFIG_MFD_AXP20X_I2C is not set
> # CONFIG_PMIC_DA903X is not set
> # CONFIG_MFD_DA9052_I2C is not set
> # CONFIG_MFD_DA9055 is not set
> # CONFIG_MFD_DA9062 is not set
> # CONFIG_MFD_DA9063 is not set
> # CONFIG_MFD_DA9150 is not set
> # CONFIG_MFD_DLN2 is not set
> # CONFIG_MFD_MC13XXX_I2C is not set
> # CONFIG_HTC_PASIC3 is not set
> # CONFIG_LPC_ICH is not set
> # CONFIG_LPC_SCH is not set
> # CONFIG_MFD_JANZ_CMODIO is not set
> # CONFIG_MFD_KEMPLD is not set
> # CONFIG_MFD_88PM800 is not set
> # CONFIG_MFD_88PM805 is not set
> # CONFIG_MFD_88PM860X is not set
> # CONFIG_MFD_MAX14577 is not set
> # CONFIG_MFD_MAX77693 is not set
> # CONFIG_MFD_MAX77843 is not set
> # CONFIG_MFD_MAX8907 is not set
> # CONFIG_MFD_MAX8925 is not set
> # CONFIG_MFD_MAX8997 is not set
> # CONFIG_MFD_MAX8998 is not set
> # CONFIG_MFD_MT6397 is not set
> # CONFIG_MFD_MENF21BMC is not set
> # CONFIG_MFD_VIPERBOARD is not set
> # CONFIG_MFD_RETU is not set
> # CONFIG_MFD_PCF50633 is not set
> # CONFIG_MFD_RDC321X is not set
> # CONFIG_MFD_RTSX_PCI is not set
> # CONFIG_MFD_RT5033 is not set
> # CONFIG_MFD_RTSX_USB is not set
> # CONFIG_MFD_RC5T583 is not set
> # CONFIG_MFD_SEC_CORE is not set
> # CONFIG_MFD_SI476X_CORE is not set
> # CONFIG_MFD_SM501 is not set
> # CONFIG_MFD_SKY81452 is not set
> # CONFIG_MFD_SMSC is not set
> # CONFIG_ABX500_CORE is not set
> # CONFIG_MFD_SYSCON is not set
> # CONFIG_MFD_TI_AM335X_TSCADC is not set
> # CONFIG_MFD_LP3943 is not set
> # CONFIG_MFD_LP8788 is not set
> # CONFIG_MFD_PALMAS is not set
> # CONFIG_TPS6105X is not set
> # CONFIG_TPS6507X is not set
> # CONFIG_MFD_TPS65086 is not set
> # CONFIG_MFD_TPS65090 is not set
> # CONFIG_MFD_TPS65217 is not set
> # CONFIG_MFD_TPS65218 is not set
> # CONFIG_MFD_TPS6586X is not set
> # CONFIG_MFD_TPS65912_I2C is not set
> # CONFIG_MFD_TPS80031 is not set
> # CONFIG_TWL4030_CORE is not set
> # CONFIG_TWL6040_CORE is not set
> # CONFIG_MFD_WL1273_CORE is not set
> # CONFIG_MFD_LM3533 is not set
> # CONFIG_MFD_TMIO is not set
> # CONFIG_MFD_VX855 is not set
> # CONFIG_MFD_ARIZONA_I2C is not set
> # CONFIG_MFD_WM8400 is not set
> # CONFIG_MFD_WM831X_I2C is not set
> # CONFIG_MFD_WM8350_I2C is not set
> # CONFIG_MFD_WM8994 is not set
> # CONFIG_REGULATOR is not set
> # CONFIG_MEDIA_SUPPORT is not set
>
> #
> # Graphics support
> #
> # CONFIG_VGA_ARB is not set
> # CONFIG_DRM is not set
>
> #
> # ACP (Audio CoProcessor) Configuration
> #
>
> #
> # Frame buffer Devices
> #
> # CONFIG_FB is not set
> # CONFIG_FB_SH_MOBILE_MERAM is not set
> # CONFIG_BACKLIGHT_LCD_SUPPORT is not set
> # CONFIG_VGASTATE is not set
>
> #
> # Console display driver support
> #
> CONFIG_DUMMY_CONSOLE=y
> CONFIG_DUMMY_CONSOLE_COLUMNS=80
> CONFIG_DUMMY_CONSOLE_ROWS=25
> # CONFIG_SOUND is not set
>
> #
> # HID support
> #
> CONFIG_HID=y
> # CONFIG_HID_BATTERY_STRENGTH is not set
> # CONFIG_HIDRAW is not set
> # CONFIG_UHID is not set
> CONFIG_HID_GENERIC=y
>
> #
> # Special HID drivers
> #
> # CONFIG_HID_A4TECH is not set
> # CONFIG_HID_ACRUX is not set
> # CONFIG_HID_APPLE is not set
> # CONFIG_HID_APPLEIR is not set
> # CONFIG_HID_AUREAL is not set
> # CONFIG_HID_BELKIN is not set
> # CONFIG_HID_BETOP_FF is not set
> # CONFIG_HID_CHERRY is not set
> # CONFIG_HID_CHICONY is not set
> # CONFIG_HID_CMEDIA is not set
> # CONFIG_HID_CYPRESS is not set
> # CONFIG_HID_DRAGONRISE is not set
> # CONFIG_HID_EMS_FF is not set
> # CONFIG_HID_ELECOM is not set
> # CONFIG_HID_ELO is not set
> # CONFIG_HID_EZKEY is not set
> # CONFIG_HID_GEMBIRD is not set
> # CONFIG_HID_GFRM is not set
> # CONFIG_HID_HOLTEK is not set
> # CONFIG_HID_KEYTOUCH is not set
> # CONFIG_HID_KYE is not set
> # CONFIG_HID_UCLOGIC is not set
> # CONFIG_HID_WALTOP is not set
> # CONFIG_HID_GYRATION is not set
> # CONFIG_HID_ICADE is not set
> # CONFIG_HID_TWINHAN is not set
> # CONFIG_HID_KENSINGTON is not set
> # CONFIG_HID_LCPOWER is not set
> # CONFIG_HID_LENOVO is not set
> # CONFIG_HID_LOGITECH is not set
> # CONFIG_HID_MAGICMOUSE is not set
> # CONFIG_HID_MICROSOFT is not set
> # CONFIG_HID_MONTEREY is not set
> # CONFIG_HID_MULTITOUCH is not set
> # CONFIG_HID_NTRIG is not set
> # CONFIG_HID_ORTEK is not set
> # CONFIG_HID_PANTHERLORD is not set
> # CONFIG_HID_PENMOUNT is not set
> # CONFIG_HID_PETALYNX is not set
> # CONFIG_HID_PICOLCD is not set
> # CONFIG_HID_PLANTRONICS is not set
> # CONFIG_HID_PRIMAX is not set
> # CONFIG_HID_ROCCAT is not set
> # CONFIG_HID_SAITEK is not set
> # CONFIG_HID_SAMSUNG is not set
> # CONFIG_HID_SPEEDLINK is not set
> # CONFIG_HID_STEELSERIES is not set
> # CONFIG_HID_SUNPLUS is not set
> # CONFIG_HID_RMI is not set
> # CONFIG_HID_GREENASIA is not set
> # CONFIG_HID_SMARTJOYPLUS is not set
> # CONFIG_HID_TIVO is not set
> # CONFIG_HID_TOPSEED is not set
> # CONFIG_HID_THRUSTMASTER is not set
> # CONFIG_HID_WACOM is not set
> # CONFIG_HID_XINMO is not set
> # CONFIG_HID_ZEROPLUS is not set
> # CONFIG_HID_ZYDACRON is not set
> # CONFIG_HID_SENSOR_HUB is not set
> # CONFIG_HID_ALPS is not set
>
> #
> # USB HID support
> #
> CONFIG_USB_HID=y
> # CONFIG_HID_PID is not set
> # CONFIG_USB_HIDDEV is not set
>
> #
> # I2C HID support
> #
> # CONFIG_I2C_HID is not set
> CONFIG_USB_OHCI_LITTLE_ENDIAN=y
> CONFIG_USB_SUPPORT=y
> CONFIG_USB_COMMON=y
> CONFIG_USB_ARCH_HAS_HCD=y
> CONFIG_USB=y
> # CONFIG_USB_ANNOUNCE_NEW_DEVICES is not set
>
> #
> # Miscellaneous USB options
> #
> CONFIG_USB_DEFAULT_PERSIST=y
> # CONFIG_USB_DYNAMIC_MINORS is not set
> # CONFIG_USB_OTG_WHITELIST is not set
> # CONFIG_USB_OTG_BLACKLIST_HUB is not set
> # CONFIG_USB_ULPI_BUS is not set
> # CONFIG_USB_MON is not set
> # CONFIG_USB_WUSB_CBAF is not set
>
> #
> # USB Host Controller Drivers
> #
> # CONFIG_USB_C67X00_HCD is not set
> # CONFIG_USB_XHCI_HCD is not set
> CONFIG_USB_EHCI_HCD=y
> CONFIG_USB_EHCI_ROOT_HUB_TT=y
> CONFIG_USB_EHCI_TT_NEWSCHED=y
> CONFIG_USB_EHCI_PCI=y
> CONFIG_USB_EHCI_SH=y
> CONFIG_USB_EHCI_HCD_PLATFORM=y
> # CONFIG_USB_OXU210HP_HCD is not set
> # CONFIG_USB_ISP116X_HCD is not set
> # CONFIG_USB_ISP1362_HCD is not set
> # CONFIG_USB_FOTG210_HCD is not set
> CONFIG_USB_OHCI_HCD=y
> CONFIG_USB_OHCI_HCD_PCI=y
> # CONFIG_USB_OHCI_SH is not set
> CONFIG_USB_OHCI_HCD_PLATFORM=y
> # CONFIG_USB_UHCI_HCD is not set
> # CONFIG_USB_SL811_HCD is not set
> # CONFIG_USB_R8A66597_HCD is not set
> # CONFIG_USB_HCD_TEST_MODE is not set
>
> #
> # USB Device Class drivers
> #
> # CONFIG_USB_ACM is not set
> # CONFIG_USB_PRINTER is not set
> # CONFIG_USB_WDM is not set
> # CONFIG_USB_TMC is not set
>
> #
> # NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may
> #
>
> #
> # also be needed; see USB_STORAGE Help for more info
> #
> CONFIG_USB_STORAGE=y
> # CONFIG_USB_STORAGE_DEBUG is not set
> # CONFIG_USB_STORAGE_REALTEK is not set
> # CONFIG_USB_STORAGE_DATAFAB is not set
> # CONFIG_USB_STORAGE_FREECOM is not set
> # CONFIG_USB_STORAGE_ISD200 is not set
> # CONFIG_USB_STORAGE_USBAT is not set
> # CONFIG_USB_STORAGE_SDDR09 is not set
> # CONFIG_USB_STORAGE_SDDR55 is not set
> # CONFIG_USB_STORAGE_JUMPSHOT is not set
> # CONFIG_USB_STORAGE_ALAUDA is not set
> # CONFIG_USB_STORAGE_ONETOUCH is not set
> # CONFIG_USB_STORAGE_KARMA is not set
> # CONFIG_USB_STORAGE_CYPRESS_ATACB is not set
> # CONFIG_USB_STORAGE_ENE_UB6250 is not set
> # CONFIG_USB_UAS is not set
>
> #
> # USB Imaging devices
> #
> # CONFIG_USB_MDC800 is not set
> # CONFIG_USB_MICROTEK is not set
> # CONFIG_USBIP_CORE is not set
> # CONFIG_USB_MUSB_HDRC is not set
> # CONFIG_USB_DWC3 is not set
> # CONFIG_USB_DWC2 is not set
> # CONFIG_USB_CHIPIDEA is not set
> # CONFIG_USB_ISP1760 is not set
>
> #
> # USB port drivers
> #
> # CONFIG_USB_SERIAL is not set
>
> #
> # USB Miscellaneous drivers
> #
> # CONFIG_USB_EMI62 is not set
> # CONFIG_USB_EMI26 is not set
> # CONFIG_USB_ADUTUX is not set
> # CONFIG_USB_SEVSEG is not set
> # CONFIG_USB_RIO500 is not set
> # CONFIG_USB_LEGOTOWER is not set
> # CONFIG_USB_LCD is not set
> # CONFIG_USB_CYPRESS_CY7C63 is not set
> # CONFIG_USB_CYTHERM is not set
> # CONFIG_USB_IDMOUSE is not set
> # CONFIG_USB_FTDI_ELAN is not set
> # CONFIG_USB_APPLEDISPLAY is not set
> # CONFIG_USB_SISUSBVGA is not set
> # CONFIG_USB_LD is not set
> # CONFIG_USB_TRANCEVIBRATOR is not set
> # CONFIG_USB_IOWARRIOR is not set
> # CONFIG_USB_TEST is not set
> # CONFIG_USB_EHSET_TEST_FIXTURE is not set
> # CONFIG_USB_ISIGHTFW is not set
> # CONFIG_USB_YUREX is not set
> # CONFIG_USB_EZUSB_FX2 is not set
> # CONFIG_USB_HSIC_USB3503 is not set
> # CONFIG_USB_LINK_LAYER_TEST is not set
>
> #
> # USB Physical Layer drivers
> #
> # CONFIG_USB_PHY is not set
> # CONFIG_NOP_USB_XCEIV is not set
> # CONFIG_USB_ISP1301 is not set
> # CONFIG_USB_GADGET is not set
> # CONFIG_UWB is not set
> # CONFIG_MMC is not set
> # CONFIG_MEMSTICK is not set
> # CONFIG_NEW_LEDS is not set
> # CONFIG_ACCESSIBILITY is not set
> # CONFIG_INFINIBAND is not set
> CONFIG_RTC_LIB=y
> CONFIG_RTC_CLASS=y
> CONFIG_RTC_HCTOSYS=y
> CONFIG_RTC_HCTOSYS_DEVICE="rtc0"
> CONFIG_RTC_SYSTOHC=y
> CONFIG_RTC_SYSTOHC_DEVICE="rtc0"
> # CONFIG_RTC_DEBUG is not set
>
> #
> # RTC interfaces
> #
> CONFIG_RTC_INTF_SYSFS=y
> CONFIG_RTC_INTF_PROC=y
> CONFIG_RTC_INTF_DEV=y
> # CONFIG_RTC_INTF_DEV_UIE_EMUL is not set
> # CONFIG_RTC_DRV_TEST is not set
>
> #
> # I2C RTC drivers
> #
> # CONFIG_RTC_DRV_ABB5ZES3 is not set
> # CONFIG_RTC_DRV_ABX80X is not set
> # CONFIG_RTC_DRV_DS1307 is not set
> # CONFIG_RTC_DRV_DS1374 is not set
> # CONFIG_RTC_DRV_DS1672 is not set
> # CONFIG_RTC_DRV_MAX6900 is not set
> # CONFIG_RTC_DRV_RS5C372 is not set
> # CONFIG_RTC_DRV_ISL1208 is not set
> # CONFIG_RTC_DRV_ISL12022 is not set
> # CONFIG_RTC_DRV_ISL12057 is not set
> # CONFIG_RTC_DRV_X1205 is not set
> # CONFIG_RTC_DRV_PCF8523 is not set
> # CONFIG_RTC_DRV_PCF85063 is not set
> # CONFIG_RTC_DRV_PCF8563 is not set
> # CONFIG_RTC_DRV_PCF8583 is not set
> # CONFIG_RTC_DRV_M41T80 is not set
> # CONFIG_RTC_DRV_BQ32K is not set
> # CONFIG_RTC_DRV_S35390A is not set
> # CONFIG_RTC_DRV_FM3130 is not set
> # CONFIG_RTC_DRV_RX8010 is not set
> # CONFIG_RTC_DRV_RX8581 is not set
> # CONFIG_RTC_DRV_RX8025 is not set
> # CONFIG_RTC_DRV_EM3027 is not set
> # CONFIG_RTC_DRV_RV8803 is not set
>
> #
> # SPI RTC drivers
> #
> CONFIG_RTC_I2C_AND_SPI=y
>
> #
> # SPI and I2C RTC drivers
> #
> # CONFIG_RTC_DRV_DS3232 is not set
> # CONFIG_RTC_DRV_PCF2127 is not set
> # CONFIG_RTC_DRV_RV3029C2 is not set
>
> #
> # Platform RTC drivers
> #
> # CONFIG_RTC_DRV_DS1286 is not set
> # CONFIG_RTC_DRV_DS1511 is not set
> # CONFIG_RTC_DRV_DS1553 is not set
> # CONFIG_RTC_DRV_DS1685_FAMILY is not set
> # CONFIG_RTC_DRV_DS1742 is not set
> # CONFIG_RTC_DRV_DS2404 is not set
> # CONFIG_RTC_DRV_STK17TA8 is not set
> # CONFIG_RTC_DRV_M48T86 is not set
> # CONFIG_RTC_DRV_M48T35 is not set
> # CONFIG_RTC_DRV_M48T59 is not set
> # CONFIG_RTC_DRV_MSM6242 is not set
> # CONFIG_RTC_DRV_BQ4802 is not set
> # CONFIG_RTC_DRV_RP5C01 is not set
> # CONFIG_RTC_DRV_V3020 is not set
>
> #
> # on-CPU RTC drivers
> #
> CONFIG_RTC_DRV_SH=y
> CONFIG_RTC_DRV_RS5C313=y
> CONFIG_RTC_DRV_GENERIC=y
>
> #
> # HID Sensor RTC drivers
> #
> # CONFIG_RTC_DRV_HID_SENSOR_TIME is not set
> CONFIG_DMADEVICES=y
> # CONFIG_DMADEVICES_DEBUG is not set
>
> #
> # DMA Devices
> #
> # CONFIG_INTEL_IDMA64 is not set
> # CONFIG_QCOM_HIDMA_MGMT is not set
> # CONFIG_QCOM_HIDMA is not set
> # CONFIG_DW_DMAC is not set
> # CONFIG_DW_DMAC_PCI is not set
>
> #
> # DMABUF options
> #
> # CONFIG_SYNC_FILE is not set
> # CONFIG_AUXDISPLAY is not set
> # CONFIG_UIO is not set
> # CONFIG_VIRT_DRIVERS is not set
>
> #
> # Virtio drivers
> #
> # CONFIG_VIRTIO_PCI is not set
> # CONFIG_VIRTIO_MMIO is not set
>
> #
> # Microsoft Hyper-V guest support
> #
> # CONFIG_STAGING is not set
> CONFIG_CLKDEV_LOOKUP=y
>
> #
> # Hardware Spinlock drivers
> #
>
> #
> # Clock Source drivers
> #
> # CONFIG_ARM_TIMER_SP804 is not set
> # CONFIG_ATMEL_PIT is not set
> CONFIG_SYS_SUPPORTS_SH_TMU=y
> # CONFIG_SH_TIMER_CMT is not set
> # CONFIG_SH_TIMER_MTU2 is not set
> CONFIG_SH_TIMER_TMU=y
> # CONFIG_EM_TIMER_STI is not set
> # CONFIG_MAILBOX is not set
> # CONFIG_IOMMU_SUPPORT is not set
>
> #
> # Remoteproc drivers
> #
> # CONFIG_STE_MODEM_RPROC is not set
>
> #
> # Rpmsg drivers
> #
>
> #
> # SOC (System On Chip) specific Drivers
> #
>
> #
> # Broadcom SoC drivers
> #
> # CONFIG_SUNXI_SRAM is not set
> # CONFIG_SOC_TI is not set
> # CONFIG_PM_DEVFREQ is not set
> # CONFIG_EXTCON is not set
> # CONFIG_MEMORY is not set
> # CONFIG_IIO is not set
> # CONFIG_NTB is not set
> # CONFIG_VME_BUS is not set
> # CONFIG_PWM is not set
> CONFIG_ARM_GIC_MAX_NR=1
> # CONFIG_IPACK_BUS is not set
> # CONFIG_RESET_CONTROLLER is not set
> # CONFIG_FMC is not set
>
> #
> # PHY Subsystem
> #
> # CONFIG_GENERIC_PHY is not set
> # CONFIG_PHY_PXA_28NM_HSIC is not set
> # CONFIG_PHY_PXA_28NM_USB2 is not set
> # CONFIG_BCM_KONA_USB2_PHY is not set
> # CONFIG_POWERCAP is not set
> # CONFIG_MCB is not set
>
> #
> # Performance monitor support
> #
> # CONFIG_RAS is not set
> # CONFIG_THUNDERBOLT is not set
>
> #
> # Android
> #
> # CONFIG_ANDROID is not set
> # CONFIG_NVMEM is not set
> # CONFIG_STM is not set
> # CONFIG_INTEL_TH is not set
>
> #
> # FPGA Configuration Support
> #
> # CONFIG_FPGA is not set
>
> #
> # File systems
> #
> CONFIG_EXT2_FS=y
> CONFIG_EXT2_FS_XATTR=y
> CONFIG_EXT2_FS_POSIX_ACL=y
> CONFIG_EXT2_FS_SECURITY=y
> CONFIG_EXT3_FS=y
> CONFIG_EXT3_FS_POSIX_ACL=y
> CONFIG_EXT3_FS_SECURITY=y
> CONFIG_EXT4_FS=y
> CONFIG_EXT4_FS_POSIX_ACL=y
> CONFIG_EXT4_FS_SECURITY=y
> # CONFIG_EXT4_ENCRYPTION is not set
> CONFIG_EXT4_DEBUG=y
> CONFIG_JBD2=y
> # CONFIG_JBD2_DEBUG is not set
> CONFIG_FS_MBCACHE=y
> # CONFIG_REISERFS_FS is not set
> # CONFIG_JFS_FS is not set
> # CONFIG_XFS_FS is not set
> # CONFIG_GFS2_FS is not set
> # CONFIG_OCFS2_FS is not set
> # CONFIG_BTRFS_FS is not set
> # CONFIG_NILFS2_FS is not set
> # CONFIG_F2FS_FS is not set
> # CONFIG_FS_DAX is not set
> CONFIG_FS_POSIX_ACL=y
> CONFIG_EXPORTFS=y
> # CONFIG_EXPORTFS_BLOCK_OPS is not set
> CONFIG_FILE_LOCKING=y
> CONFIG_MANDATORY_FILE_LOCKING=y
> # CONFIG_FS_ENCRYPTION is not set
> CONFIG_FSNOTIFY=y
> CONFIG_DNOTIFY=y
> CONFIG_INOTIFY_USER=y
> # CONFIG_FANOTIFY is not set
> # CONFIG_QUOTA is not set
> # CONFIG_QUOTACTL is not set
> # CONFIG_AUTOFS4_FS is not set
> # CONFIG_FUSE_FS is not set
> # CONFIG_OVERLAY_FS is not set
>
> #
> # Caches
> #
> # CONFIG_FSCACHE is not set
>
> #
> # CD-ROM/DVD Filesystems
> #
> # CONFIG_ISO9660_FS is not set
> # CONFIG_UDF_FS is not set
>
> #
> # DOS/FAT/NT Filesystems
> #
> CONFIG_FAT_FS=y
> CONFIG_MSDOS_FS=y
> CONFIG_VFAT_FS=y
> CONFIG_FAT_DEFAULT_CODEPAGE=437
> CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1"
> # CONFIG_FAT_DEFAULT_UTF8 is not set
> CONFIG_NTFS_FS=y
> # CONFIG_NTFS_DEBUG is not set
> CONFIG_NTFS_RW=y
>
> #
> # Pseudo filesystems
> #
> CONFIG_PROC_FS=y
> CONFIG_PROC_KCORE=y
> CONFIG_PROC_SYSCTL=y
> CONFIG_PROC_PAGE_MONITOR=y
> # CONFIG_PROC_CHILDREN is not set
> CONFIG_KERNFS=y
> CONFIG_SYSFS=y
> CONFIG_TMPFS=y
> # CONFIG_TMPFS_POSIX_ACL is not set
> # CONFIG_TMPFS_XATTR is not set
> CONFIG_HUGETLBFS=y
> CONFIG_HUGETLB_PAGE=y
> CONFIG_CONFIGFS_FS=y
> CONFIG_MISC_FILESYSTEMS=y
> # CONFIG_ORANGEFS_FS is not set
> # CONFIG_ADFS_FS is not set
> # CONFIG_AFFS_FS is not set
> # CONFIG_ECRYPT_FS is not set
> # CONFIG_HFS_FS is not set
> # CONFIG_HFSPLUS_FS is not set
> # CONFIG_BEFS_FS is not set
> # CONFIG_BFS_FS is not set
> # CONFIG_EFS_FS is not set
> # CONFIG_JFFS2_FS is not set
> # CONFIG_LOGFS is not set
> # CONFIG_CRAMFS is not set
> # CONFIG_SQUASHFS is not set
> # CONFIG_VXFS_FS is not set
> CONFIG_MINIX_FS=y
> CONFIG_MINIX_FS_NATIVE_ENDIAN=y
> # CONFIG_OMFS_FS is not set
> # CONFIG_HPFS_FS is not set
> # CONFIG_QNX4FS_FS is not set
> # CONFIG_QNX6FS_FS is not set
> # CONFIG_ROMFS_FS is not set
> # CONFIG_PSTORE is not set
> # CONFIG_SYSV_FS is not set
> # CONFIG_UFS_FS is not set
> CONFIG_NETWORK_FILESYSTEMS=y
> CONFIG_NFS_FS=y
> CONFIG_NFS_V2=y
> CONFIG_NFS_V3=y
> CONFIG_NFS_V3_ACL=y
> CONFIG_NFS_V4=y
> # CONFIG_NFS_SWAP is not set
> CONFIG_NFS_V4_1=y
> # CONFIG_NFS_V4_2 is not set
> CONFIG_PNFS_FILE_LAYOUT=y
> CONFIG_PNFS_FLEXFILE_LAYOUT=m
> CONFIG_NFS_V4_1_IMPLEMENTATION_ID_DOMAIN="kernel.org"
> # CONFIG_NFS_V4_1_MIGRATION is not set
> CONFIG_ROOT_NFS=y
> # CONFIG_NFS_USE_LEGACY_DNS is not set
> CONFIG_NFS_USE_KERNEL_DNS=y
> # CONFIG_NFSD is not set
> CONFIG_GRACE_PERIOD=y
> CONFIG_LOCKD=y
> CONFIG_LOCKD_V4=y
> CONFIG_NFS_ACL_SUPPORT=y
> CONFIG_NFS_COMMON=y
> CONFIG_SUNRPC=y
> CONFIG_SUNRPC_GSS=y
> CONFIG_SUNRPC_BACKCHANNEL=y
> # CONFIG_SUNRPC_DEBUG is not set
> # CONFIG_CEPH_FS is not set
> # CONFIG_CIFS is not set
> # CONFIG_NCP_FS is not set
> # CONFIG_CODA_FS is not set
> # CONFIG_AFS_FS is not set
> CONFIG_NLS=y
> CONFIG_NLS_DEFAULT="iso8859-1"
> CONFIG_NLS_CODEPAGE_437=y
> # CONFIG_NLS_CODEPAGE_737 is not set
> # CONFIG_NLS_CODEPAGE_775 is not set
> # CONFIG_NLS_CODEPAGE_850 is not set
> # CONFIG_NLS_CODEPAGE_852 is not set
> # CONFIG_NLS_CODEPAGE_855 is not set
> # CONFIG_NLS_CODEPAGE_857 is not set
> # CONFIG_NLS_CODEPAGE_860 is not set
> # CONFIG_NLS_CODEPAGE_861 is not set
> # CONFIG_NLS_CODEPAGE_862 is not set
> # CONFIG_NLS_CODEPAGE_863 is not set
> # CONFIG_NLS_CODEPAGE_864 is not set
> # CONFIG_NLS_CODEPAGE_865 is not set
> # CONFIG_NLS_CODEPAGE_866 is not set
> # CONFIG_NLS_CODEPAGE_869 is not set
> # CONFIG_NLS_CODEPAGE_936 is not set
> # CONFIG_NLS_CODEPAGE_950 is not set
> CONFIG_NLS_CODEPAGE_932=y
> # CONFIG_NLS_CODEPAGE_949 is not set
> # CONFIG_NLS_CODEPAGE_874 is not set
> # CONFIG_NLS_ISO8859_8 is not set
> # CONFIG_NLS_CODEPAGE_1250 is not set
> # CONFIG_NLS_CODEPAGE_1251 is not set
> # CONFIG_NLS_ASCII is not set
> CONFIG_NLS_ISO8859_1=y
> # CONFIG_NLS_ISO8859_2 is not set
> # CONFIG_NLS_ISO8859_3 is not set
> # CONFIG_NLS_ISO8859_4 is not set
> # CONFIG_NLS_ISO8859_5 is not set
> # CONFIG_NLS_ISO8859_6 is not set
> # CONFIG_NLS_ISO8859_7 is not set
> # CONFIG_NLS_ISO8859_9 is not set
> # CONFIG_NLS_ISO8859_13 is not set
> # CONFIG_NLS_ISO8859_14 is not set
> # CONFIG_NLS_ISO8859_15 is not set
> # CONFIG_NLS_KOI8_R is not set
> # CONFIG_NLS_KOI8_U is not set
> # CONFIG_NLS_MAC_ROMAN is not set
> # CONFIG_NLS_MAC_CELTIC is not set
> # CONFIG_NLS_MAC_CENTEURO is not set
> # CONFIG_NLS_MAC_CROATIAN is not set
> # CONFIG_NLS_MAC_CYRILLIC is not set
> # CONFIG_NLS_MAC_GAELIC is not set
> # CONFIG_NLS_MAC_GREEK is not set
> # CONFIG_NLS_MAC_ICELAND is not set
> # CONFIG_NLS_MAC_INUIT is not set
> # CONFIG_NLS_MAC_ROMANIAN is not set
> # CONFIG_NLS_MAC_TURKISH is not set
> # CONFIG_NLS_UTF8 is not set
> # CONFIG_DLM is not set
>
> #
> # Kernel hacking
> #
> CONFIG_TRACE_IRQFLAGS_SUPPORT=y
>
> #
> # printk and dmesg options
> #
> CONFIG_PRINTK_TIME=y
> CONFIG_MESSAGE_LOGLEVEL_DEFAULT=4
> # CONFIG_DYNAMIC_DEBUG is not set
>
> #
> # Compile-time checks and compiler options
> #
> CONFIG_DEBUG_INFO=y
> # CONFIG_DEBUG_INFO_REDUCED is not set
> # CONFIG_DEBUG_INFO_SPLIT is not set
> # CONFIG_DEBUG_INFO_DWARF4 is not set
> # CONFIG_GDB_SCRIPTS is not set
> CONFIG_ENABLE_WARN_DEPRECATED=y
> # CONFIG_ENABLE_MUST_CHECK is not set
> CONFIG_FRAME_WARN=1024
> # CONFIG_STRIP_ASM_SYMS is not set
> # CONFIG_READABLE_ASM is not set
> # CONFIG_UNUSED_SYMBOLS is not set
> # CONFIG_PAGE_OWNER is not set
> CONFIG_DEBUG_FS=y
> # CONFIG_HEADERS_CHECK is not set
> # CONFIG_DEBUG_SECTION_MISMATCH is not set
> CONFIG_SECTION_MISMATCH_WARN_ONLY=y
> CONFIG_FRAME_POINTER=y
> # CONFIG_DEBUG_FORCE_WEAK_PER_CPU is not set
> CONFIG_MAGIC_SYSRQ=y
> CONFIG_MAGIC_SYSRQ_DEFAULT_ENABLE=0x1
> CONFIG_DEBUG_KERNEL=y
>
> #
> # Memory Debugging
> #
> # CONFIG_PAGE_EXTENSION is not set
> # CONFIG_DEBUG_PAGEALLOC is not set
> # CONFIG_PAGE_POISONING is not set
> # CONFIG_DEBUG_OBJECTS is not set
> # CONFIG_DEBUG_SLAB is not set
> CONFIG_HAVE_DEBUG_KMEMLEAK=y
> CONFIG_DEBUG_KMEMLEAK=y
> CONFIG_DEBUG_KMEMLEAK_EARLY_LOG_SIZE=400
> # CONFIG_DEBUG_KMEMLEAK_TEST is not set
> # CONFIG_DEBUG_KMEMLEAK_DEFAULT_OFF is not set
> # CONFIG_DEBUG_STACK_USAGE is not set
> # CONFIG_DEBUG_VM is not set
> # CONFIG_DEBUG_MEMORY_INIT is not set
> # CONFIG_DEBUG_SHIRQ is not set
>
> #
> # Debug Lockups and Hangs
> #
> # CONFIG_LOCKUP_DETECTOR is not set
> CONFIG_DETECT_HUNG_TASK=y
> CONFIG_DEFAULT_HUNG_TASK_TIMEOUT=120
> # CONFIG_BOOTPARAM_HUNG_TASK_PANIC is not set
> CONFIG_BOOTPARAM_HUNG_TASK_PANIC_VALUE=0
> # CONFIG_WQ_WATCHDOG is not set
> # CONFIG_PANIC_ON_OOPS is not set
> CONFIG_PANIC_ON_OOPS_VALUE=0
> CONFIG_PANIC_TIMEOUT=0
> CONFIG_SCHED_DEBUG=y
> CONFIG_SCHED_INFO=y
> CONFIG_SCHEDSTATS=y
> # CONFIG_SCHED_STACK_END_CHECK is not set
> # CONFIG_DEBUG_TIMEKEEPING is not set
> # CONFIG_TIMER_STATS is not set
> CONFIG_DEBUG_PREEMPT=y
>
> #
> # Lock Debugging (spinlocks, mutexes, etc...)
> #
> # CONFIG_DEBUG_RT_MUTEXES is not set
> CONFIG_DEBUG_SPINLOCK=y
> CONFIG_DEBUG_MUTEXES=y
> # CONFIG_DEBUG_WW_MUTEX_SLOWPATH is not set
> # CONFIG_DEBUG_LOCK_ALLOC is not set
> # CONFIG_PROVE_LOCKING is not set
> # CONFIG_LOCK_STAT is not set
> # CONFIG_DEBUG_ATOMIC_SLEEP is not set
> # CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set
> # CONFIG_LOCK_TORTURE_TEST is not set
> CONFIG_STACKTRACE=y
> # CONFIG_DEBUG_KOBJECT is not set
> CONFIG_HAVE_DEBUG_BUGVERBOSE=y
> CONFIG_DEBUG_BUGVERBOSE=y
> # CONFIG_DEBUG_LIST is not set
> # CONFIG_DEBUG_PI_LIST is not set
> # CONFIG_DEBUG_SG is not set
> # CONFIG_DEBUG_NOTIFIERS is not set
> # CONFIG_DEBUG_CREDENTIALS is not set
>
> #
> # RCU Debugging
> #
> # CONFIG_PROVE_RCU is not set
> # CONFIG_SPARSE_RCU_POINTER is not set
> # CONFIG_TORTURE_TEST is not set
> # CONFIG_RCU_PERF_TEST is not set
> # CONFIG_RCU_TORTURE_TEST is not set
> CONFIG_RCU_CPU_STALL_TIMEOUT=21
> # CONFIG_RCU_TRACE is not set
> # CONFIG_RCU_EQS_DEBUG is not set
> # CONFIG_DEBUG_WQ_FORCE_RR_CPU is not set
> # CONFIG_DEBUG_BLOCK_EXT_DEVT is not set
> # CONFIG_NOTIFIER_ERROR_INJECTION is not set
> # CONFIG_FAULT_INJECTION is not set
> CONFIG_LATENCYTOP=y
> CONFIG_HAVE_FUNCTION_TRACER=y
> CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y
> CONFIG_HAVE_DYNAMIC_FTRACE=y
> CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y
> CONFIG_HAVE_SYSCALL_TRACEPOINTS=y
> CONFIG_TRACING_SUPPORT=y
> # CONFIG_FTRACE is not set
>
> #
> # Runtime Testing
> #
> # CONFIG_LKDTM is not set
> # CONFIG_TEST_LIST_SORT is not set
> # CONFIG_BACKTRACE_SELF_TEST is not set
> # CONFIG_RBTREE_TEST is not set
> # CONFIG_INTERVAL_TREE_TEST is not set
> # CONFIG_PERCPU_TEST is not set
> # CONFIG_ATOMIC64_SELFTEST is not set
> # CONFIG_TEST_HEXDUMP is not set
> # CONFIG_TEST_STRING_HELPERS is not set
> # CONFIG_TEST_KSTRTOX is not set
> # CONFIG_TEST_PRINTF is not set
> # CONFIG_TEST_BITMAP is not set
> # CONFIG_TEST_UUID is not set
> # CONFIG_TEST_RHASHTABLE is not set
> # CONFIG_TEST_HASH is not set
> # CONFIG_DMA_API_DEBUG is not set
> # CONFIG_TEST_LKM is not set
> # CONFIG_TEST_USER_COPY is not set
> # CONFIG_TEST_BPF is not set
> # CONFIG_TEST_FIRMWARE is not set
> # CONFIG_TEST_UDELAY is not set
> # CONFIG_MEMTEST is not set
> # CONFIG_TEST_STATIC_KEYS is not set
> # CONFIG_SAMPLES is not set
> CONFIG_HAVE_ARCH_KGDB=y
> # CONFIG_KGDB is not set
> # CONFIG_UBSAN is not set
> # CONFIG_SH_STANDARD_BIOS is not set
> # CONFIG_STACK_DEBUG is not set
> # CONFIG_4KSTACKS is not set
> CONFIG_DUMP_CODE=y
> # CONFIG_DWARF_UNWINDER is not set
> # CONFIG_SH_NO_BSS_INIT is not set
>
> #
> # Security options
> #
> CONFIG_KEYS=y
> # CONFIG_PERSISTENT_KEYRINGS is not set
> # CONFIG_ENCRYPTED_KEYS is not set
> # CONFIG_KEY_DH_OPERATIONS is not set
> # CONFIG_SECURITY_DMESG_RESTRICT is not set
> CONFIG_SECURITY=y
> CONFIG_SECURITYFS=y
> CONFIG_SECURITY_NETWORK=y
> CONFIG_SECURITY_NETWORK_XFRM=y
> CONFIG_SECURITY_PATH=y
> CONFIG_HAVE_HARDENED_USERCOPY_ALLOCATOR=y
> # CONFIG_SECURITY_SELINUX is not set
> # CONFIG_SECURITY_SMACK is not set
> CONFIG_SECURITY_TOMOYO=y
> CONFIG_SECURITY_TOMOYO_MAX_ACCEPT_ENTRY=2048
> CONFIG_SECURITY_TOMOYO_MAX_AUDIT_LOG=1024
> # CONFIG_SECURITY_TOMOYO_OMIT_USERSPACE_LOADER is not set
> CONFIG_SECURITY_TOMOYO_POLICY_LOADER="/sbin/tomoyo-init"
> CONFIG_SECURITY_TOMOYO_ACTIVATION_TRIGGER="/sbin/init"
> CONFIG_SECURITY_APPARMOR=y
> CONFIG_SECURITY_APPARMOR_BOOTPARAM_VALUE=1
> CONFIG_SECURITY_APPARMOR_HASH=y
> CONFIG_SECURITY_APPARMOR_HASH_DEFAULT=y
> # CONFIG_SECURITY_LOADPIN is not set
> CONFIG_SECURITY_YAMA=y
> CONFIG_INTEGRITY=y
> # CONFIG_INTEGRITY_SIGNATURE is not set
> CONFIG_INTEGRITY_AUDIT=y
> # CONFIG_IMA is not set
> # CONFIG_EVM is not set
> # CONFIG_DEFAULT_SECURITY_TOMOYO is not set
> # CONFIG_DEFAULT_SECURITY_APPARMOR is not set
> CONFIG_DEFAULT_SECURITY_DAC=y
> CONFIG_DEFAULT_SECURITY=""
> CONFIG_CRYPTO=y
>
> #
> # Crypto core or helper
> #
> CONFIG_CRYPTO_ALGAPI=y
> CONFIG_CRYPTO_ALGAPI2=y
> CONFIG_CRYPTO_AEAD=m
> CONFIG_CRYPTO_AEAD2=y
> CONFIG_CRYPTO_BLKCIPHER=m
> CONFIG_CRYPTO_BLKCIPHER2=y
> CONFIG_CRYPTO_HASH=y
> CONFIG_CRYPTO_HASH2=y
> CONFIG_CRYPTO_RNG=m
> CONFIG_CRYPTO_RNG2=y
> CONFIG_CRYPTO_RNG_DEFAULT=m
> CONFIG_CRYPTO_AKCIPHER2=y
> CONFIG_CRYPTO_KPP2=y
> # CONFIG_CRYPTO_RSA is not set
> # CONFIG_CRYPTO_DH is not set
> # CONFIG_CRYPTO_ECDH is not set
> CONFIG_CRYPTO_MANAGER=y
> CONFIG_CRYPTO_MANAGER2=y
> # CONFIG_CRYPTO_USER is not set
> CONFIG_CRYPTO_MANAGER_DISABLE_TESTS=y
> # CONFIG_CRYPTO_GF128MUL is not set
> CONFIG_CRYPTO_NULL=m
> CONFIG_CRYPTO_NULL2=y
> CONFIG_CRYPTO_WORKQUEUE=y
> # CONFIG_CRYPTO_CRYPTD is not set
> # CONFIG_CRYPTO_MCRYPTD is not set
> # CONFIG_CRYPTO_AUTHENC is not set
> # CONFIG_CRYPTO_TEST is not set
>
> #
> # Authenticated Encryption with Associated Data
> #
> # CONFIG_CRYPTO_CCM is not set
> # CONFIG_CRYPTO_GCM is not set
> # CONFIG_CRYPTO_CHACHA20POLY1305 is not set
> # CONFIG_CRYPTO_SEQIV is not set
> CONFIG_CRYPTO_ECHAINIV=m
>
> #
> # Block modes
> #
> CONFIG_CRYPTO_CBC=m
> # CONFIG_CRYPTO_CTR is not set
> # CONFIG_CRYPTO_CTS is not set
> CONFIG_CRYPTO_ECB=m
> # CONFIG_CRYPTO_LRW is not set
> # CONFIG_CRYPTO_PCBC is not set
> # CONFIG_CRYPTO_XTS is not set
> # CONFIG_CRYPTO_KEYWRAP is not set
>
> #
> # Hash modes
> #
> # CONFIG_CRYPTO_CMAC is not set
> CONFIG_CRYPTO_HMAC=y
> # CONFIG_CRYPTO_XCBC is not set
> # CONFIG_CRYPTO_VMAC is not set
>
> #
> # Digest
> #
> CONFIG_CRYPTO_CRC32C=y
> # CONFIG_CRYPTO_CRC32 is not set
> # CONFIG_CRYPTO_CRCT10DIF is not set
> # CONFIG_CRYPTO_GHASH is not set
> # CONFIG_CRYPTO_POLY1305 is not set
> # CONFIG_CRYPTO_MD4 is not set
> # CONFIG_CRYPTO_MD5 is not set
> # CONFIG_CRYPTO_MICHAEL_MIC is not set
> # CONFIG_CRYPTO_RMD128 is not set
> # CONFIG_CRYPTO_RMD160 is not set
> # CONFIG_CRYPTO_RMD256 is not set
> # CONFIG_CRYPTO_RMD320 is not set
> CONFIG_CRYPTO_SHA1=y
> CONFIG_CRYPTO_SHA256=m
> # CONFIG_CRYPTO_SHA512 is not set
> # CONFIG_CRYPTO_SHA3 is not set
> # CONFIG_CRYPTO_TGR192 is not set
> # CONFIG_CRYPTO_WP512 is not set
>
> #
> # Ciphers
> #
> CONFIG_CRYPTO_AES=y
> # CONFIG_CRYPTO_ANUBIS is not set
> CONFIG_CRYPTO_ARC4=m
> # CONFIG_CRYPTO_BLOWFISH is not set
> # CONFIG_CRYPTO_CAMELLIA is not set
> # CONFIG_CRYPTO_CAST5 is not set
> # CONFIG_CRYPTO_CAST6 is not set
> # CONFIG_CRYPTO_DES is not set
> # CONFIG_CRYPTO_FCRYPT is not set
> # CONFIG_CRYPTO_KHAZAD is not set
> # CONFIG_CRYPTO_SALSA20 is not set
> # CONFIG_CRYPTO_CHACHA20 is not set
> # CONFIG_CRYPTO_SEED is not set
> # CONFIG_CRYPTO_SERPENT is not set
> # CONFIG_CRYPTO_TEA is not set
> # CONFIG_CRYPTO_TWOFISH is not set
>
> #
> # Compression
> #
> # CONFIG_CRYPTO_DEFLATE is not set
> CONFIG_CRYPTO_LZO=y
> # CONFIG_CRYPTO_842 is not set
> # CONFIG_CRYPTO_LZ4 is not set
> # CONFIG_CRYPTO_LZ4HC is not set
>
> #
> # Random Number Generation
> #
> # CONFIG_CRYPTO_ANSI_CPRNG is not set
> CONFIG_CRYPTO_DRBG_MENU=m
> CONFIG_CRYPTO_DRBG_HMAC=y
> # CONFIG_CRYPTO_DRBG_HASH is not set
> CONFIG_CRYPTO_DRBG=m
> CONFIG_CRYPTO_JITTERENTROPY=m
> CONFIG_CRYPTO_USER_API=m
> CONFIG_CRYPTO_USER_API_HASH=m
> CONFIG_CRYPTO_USER_API_SKCIPHER=m
> # CONFIG_CRYPTO_USER_API_RNG is not set
> # CONFIG_CRYPTO_USER_API_AEAD is not set
> # CONFIG_CRYPTO_HW is not set
> # CONFIG_ASYMMETRIC_KEY_TYPE is not set
>
> #
> # Certificates for signature checking
> #
> # CONFIG_BINARY_PRINTF is not set
>
> #
> # Library routines
> #
> CONFIG_BITREVERSE=y
> # CONFIG_HAVE_ARCH_BITREVERSE is not set
> CONFIG_GENERIC_STRNCPY_FROM_USER=y
> CONFIG_GENERIC_STRNLEN_USER=y
> CONFIG_GENERIC_NET_UTILS=y
> CONFIG_NO_GENERIC_PCI_IOPORT_MAP=y
> CONFIG_GENERIC_PCI_IOMAP=y
> CONFIG_GENERIC_IO=y
> CONFIG_CRC_CCITT=m
> CONFIG_CRC16=y
> # CONFIG_CRC_T10DIF is not set
> # CONFIG_CRC_ITU_T is not set
> CONFIG_CRC32=y
> # CONFIG_CRC32_SELFTEST is not set
> CONFIG_CRC32_SLICEBY8=y
> # CONFIG_CRC32_SLICEBY4 is not set
> # CONFIG_CRC32_SARWATE is not set
> # CONFIG_CRC32_BIT is not set
> # CONFIG_CRC7 is not set
> # CONFIG_LIBCRC32C is not set
> # CONFIG_CRC8 is not set
> CONFIG_AUDIT_GENERIC=y
> # CONFIG_AUDIT_ARCH_COMPAT_GENERIC is not set
> # CONFIG_RANDOM32_SELFTEST is not set
> CONFIG_ZLIB_INFLATE=m
> CONFIG_ZLIB_DEFLATE=m
> CONFIG_LZO_COMPRESS=y
> CONFIG_LZO_DECOMPRESS=y
> # CONFIG_XZ_DEC is not set
> # CONFIG_XZ_DEC_BCJ is not set
> CONFIG_ASSOCIATIVE_ARRAY=y
> CONFIG_HAS_IOMEM=y
> CONFIG_HAS_IOPORT_MAP=y
> CONFIG_HAS_DMA=y
> CONFIG_DQL=y
> CONFIG_NLATTR=y
> CONFIG_GENERIC_ATOMIC64=y
> CONFIG_ARCH_HAS_ATOMIC64_DEC_IF_POSITIVE=y
> # CONFIG_CORDIC is not set
> # CONFIG_DDR is not set
> # CONFIG_IRQ_POLL is not set
> CONFIG_OID_REGISTRY=y
> # CONFIG_SG_SPLIT is not set
> CONFIG_SG_POOL=y
> # CONFIG_ARCH_HAS_SG_CHAIN is not set
--
Yosinori Sato
^ permalink raw reply [flat|nested] 138+ messages in thread
* Re: [J-core] [PATCH v5 00/22] sh: LANDISK and R2Dplus convert to device tree
2018-05-07 1:40 ` Yoshinori Sato
@ 2018-05-07 11:00 ` John Paul Adrian Glaubitz
-1 siblings, 0 replies; 138+ messages in thread
From: John Paul Adrian Glaubitz @ 2018-05-07 11:00 UTC (permalink / raw)
To: Yoshinori Sato; +Cc: Rich Felker, Rob Landley, linux-sh, linux-kernel
On 05/07/2018 03:40 AM, Yoshinori Sato wrote:
>> @Yoshinori:
>>
>> Did the HDL-160U LANDISK device you have use u-boot by default or
>> did you convert it from lilo?
>
> Yes.
> Replace sh-lilo's second stage with u-boot.
> With this method it is unnecessary to rewrite Flash for boot.
Great, thank you. I will give it a try on my USL-5P and write down
the individual steps once I have figured it out.
As for the IDE controller: Can you tell me whether there are any
particular patches necessary to get the kernel detect the IDE
controller of the LANDISK devices?
I have been able to boot my own kernel on my USL-5P device, but
I could never get it to detect the IDE controller. Do I need
an additional patch for that?
Adrian
--
.''`. John Paul Adrian Glaubitz
: :' : Debian Developer - glaubitz@debian.org
`. `' Freie Universitaet Berlin - glaubitz@physik.fu-berlin.de
`- GPG: 62FF 8A75 84E0 2956 9546 0006 7426 3B37 F5B5 F913
^ permalink raw reply [flat|nested] 138+ messages in thread
* Re: [J-core] [PATCH v5 00/22] sh: LANDISK and R2Dplus convert to device tree
@ 2018-05-07 11:00 ` John Paul Adrian Glaubitz
0 siblings, 0 replies; 138+ messages in thread
From: John Paul Adrian Glaubitz @ 2018-05-07 11:00 UTC (permalink / raw)
To: Yoshinori Sato; +Cc: Rich Felker, Rob Landley, linux-sh, linux-kernel
On 05/07/2018 03:40 AM, Yoshinori Sato wrote:
>> @Yoshinori:
>>
>> Did the HDL-160U LANDISK device you have use u-boot by default or
>> did you convert it from lilo?
>
> Yes.
> Replace sh-lilo's second stage with u-boot.
> With this method it is unnecessary to rewrite Flash for boot.
Great, thank you. I will give it a try on my USL-5P and write down
the individual steps once I have figured it out.
As for the IDE controller: Can you tell me whether there are any
particular patches necessary to get the kernel detect the IDE
controller of the LANDISK devices?
I have been able to boot my own kernel on my USL-5P device, but
I could never get it to detect the IDE controller. Do I need
an additional patch for that?
Adrian
--
.''`. John Paul Adrian Glaubitz
: :' : Debian Developer - glaubitz@debian.org
`. `' Freie Universitaet Berlin - glaubitz@physik.fu-berlin.de
`- GPG: 62FF 8A75 84E0 2956 9546 0006 7426 3B37 F5B5 F913
^ permalink raw reply [flat|nested] 138+ messages in thread
* Re: [J-core] [PATCH v5 00/22] sh: LANDISK and R2Dplus convert to device tree
2018-05-07 11:00 ` John Paul Adrian Glaubitz
@ 2018-05-07 13:40 ` Rob Landley
-1 siblings, 0 replies; 138+ messages in thread
From: Rob Landley @ 2018-05-07 13:40 UTC (permalink / raw)
To: John Paul Adrian Glaubitz, Yoshinori Sato
Cc: Rich Felker, linux-sh, linux-kernel
On 05/07/2018 06:00 AM, John Paul Adrian Glaubitz wrote:
> I have been able to boot my own kernel on my USL-5P device, but
> I could never get it to detect the IDE controller. Do I need
> an additional patch for that?
On a related note, is there a list of boards anywhere? I'm working on a 7760
system at $DAYJOB, Rich has a landisk which according to
https://www.openbsd.org/landisk.html is an SH7751R, and Sato-san says that
QEMU's -r2d emulates that too? ("RTS7751R2Dplus is QEMU-SH4 target. So easy
trying.")
What other boards do we need to covert to device tree? arch/sh/boards has 15 C
files and 19 subdirectories, but I dunno the status of any of them...
Rob
^ permalink raw reply [flat|nested] 138+ messages in thread* Re: [J-core] [PATCH v5 00/22] sh: LANDISK and R2Dplus convert to device tree
@ 2018-05-07 13:40 ` Rob Landley
0 siblings, 0 replies; 138+ messages in thread
From: Rob Landley @ 2018-05-07 13:40 UTC (permalink / raw)
To: John Paul Adrian Glaubitz, Yoshinori Sato
Cc: Rich Felker, linux-sh, linux-kernel
On 05/07/2018 06:00 AM, John Paul Adrian Glaubitz wrote:
> I have been able to boot my own kernel on my USL-5P device, but
> I could never get it to detect the IDE controller. Do I need
> an additional patch for that?
On a related note, is there a list of boards anywhere? I'm working on a 7760
system at $DAYJOB, Rich has a landisk which according to
https://www.openbsd.org/landisk.html is an SH7751R, and Sato-san says that
QEMU's -r2d emulates that too? ("RTS7751R2Dplus is QEMU-SH4 target. So easy
trying.")
What other boards do we need to covert to device tree? arch/sh/boards has 15 C
files and 19 subdirectories, but I dunno the status of any of them...
Rob
^ permalink raw reply [flat|nested] 138+ messages in thread* Re: [J-core] [PATCH v5 00/22] sh: LANDISK and R2Dplus convert to device tree
2018-05-07 13:40 ` Rob Landley
@ 2018-05-07 13:50 ` John Paul Adrian Glaubitz
-1 siblings, 0 replies; 138+ messages in thread
From: John Paul Adrian Glaubitz @ 2018-05-07 13:50 UTC (permalink / raw)
To: Rob Landley, Yoshinori Sato; +Cc: Rich Felker, linux-sh, linux-kernel
On 05/07/2018 03:40 PM, Rob Landley wrote:
> On a related note, is there a list of boards anywhere? I'm working on a 7760
> system at $DAYJOB, Rich has a landisk which according to
> https://www.openbsd.org/landisk.html is an SH7751R, and Sato-san says that
> QEMU's -r2d emulates that too? ("RTS7751R2Dplus is QEMU-SH4 target. So easy
> trying.")
I have lots of Dreamcasts (SH7091), one SH7785LCR evaulation board and one
SH7724 Evovec board. I also own one KMC KZ-SH3-03 (SH7708, SH-3) board and
several small SH-2 and SH-2A boards (from a Japanese electronics magazine).
I think Geert Uytterhoven has also one SH-4 board (if I remember correctly)
and one of the gcc upstream maintainers has an AP-SH4AD-0A board from Alpha
Project.
> What other boards do we need to covert to device tree? arch/sh/boards has 15 C
> files and 19 subdirectories, but I dunno the status of any of them...
Hard to say. At least the ones above plus the ST-40 boards should be included.
I would leave the rest in for the time being unless they become a burden
in any way.
First we should get Sato-san's LANDISK device tree conversion merged though
and maybe we can use this one as a template to convert the rest. I would
be happy to help.
Adrian
--
.''`. John Paul Adrian Glaubitz
: :' : Debian Developer - glaubitz@debian.org
`. `' Freie Universitaet Berlin - glaubitz@physik.fu-berlin.de
`- GPG: 62FF 8A75 84E0 2956 9546 0006 7426 3B37 F5B5 F913
^ permalink raw reply [flat|nested] 138+ messages in thread* Re: [J-core] [PATCH v5 00/22] sh: LANDISK and R2Dplus convert to device tree
@ 2018-05-07 13:50 ` John Paul Adrian Glaubitz
0 siblings, 0 replies; 138+ messages in thread
From: John Paul Adrian Glaubitz @ 2018-05-07 13:50 UTC (permalink / raw)
To: Rob Landley, Yoshinori Sato; +Cc: Rich Felker, linux-sh, linux-kernel
On 05/07/2018 03:40 PM, Rob Landley wrote:
> On a related note, is there a list of boards anywhere? I'm working on a 7760
> system at $DAYJOB, Rich has a landisk which according to
> https://www.openbsd.org/landisk.html is an SH7751R, and Sato-san says that
> QEMU's -r2d emulates that too? ("RTS7751R2Dplus is QEMU-SH4 target. So easy
> trying.")
I have lots of Dreamcasts (SH7091), one SH7785LCR evaulation board and one
SH7724 Evovec board. I also own one KMC KZ-SH3-03 (SH7708, SH-3) board and
several small SH-2 and SH-2A boards (from a Japanese electronics magazine).
I think Geert Uytterhoven has also one SH-4 board (if I remember correctly)
and one of the gcc upstream maintainers has an AP-SH4AD-0A board from Alpha
Project.
> What other boards do we need to covert to device tree? arch/sh/boards has 15 C
> files and 19 subdirectories, but I dunno the status of any of them...
Hard to say. At least the ones above plus the ST-40 boards should be included.
I would leave the rest in for the time being unless they become a burden
in any way.
First we should get Sato-san's LANDISK device tree conversion merged though
and maybe we can use this one as a template to convert the rest. I would
be happy to help.
Adrian
--
.''`. John Paul Adrian Glaubitz
: :' : Debian Developer - glaubitz@debian.org
`. `' Freie Universitaet Berlin - glaubitz@physik.fu-berlin.de
`- GPG: 62FF 8A75 84E0 2956 9546 0006 7426 3B37 F5B5 F913
^ permalink raw reply [flat|nested] 138+ messages in thread* Re: [J-core] [PATCH v5 00/22] sh: LANDISK and R2Dplus convert to device tree
2018-05-07 13:50 ` John Paul Adrian Glaubitz
@ 2018-05-07 14:05 ` Geert Uytterhoeven
-1 siblings, 0 replies; 138+ messages in thread
From: Geert Uytterhoeven @ 2018-05-07 14:05 UTC (permalink / raw)
To: John Paul Adrian Glaubitz
Cc: Rob Landley, Yoshinori Sato, Rich Felker, Linux-sh list,
Linux Kernel Mailing List
Hi Adrian,
On Mon, May 7, 2018 at 3:50 PM, John Paul Adrian Glaubitz
<glaubitz@physik.fu-berlin.de> wrote:
> On 05/07/2018 03:40 PM, Rob Landley wrote:
>> On a related note, is there a list of boards anywhere? I'm working on a
>> 7760
>> system at $DAYJOB, Rich has a landisk which according to
>> https://www.openbsd.org/landisk.html is an SH7751R, and Sato-san says that
>> QEMU's -r2d emulates that too? ("RTS7751R2Dplus is QEMU-SH4 target. So
>> easy
>> trying.")
>
> I have lots of Dreamcasts (SH7091), one SH7785LCR evaulation board and one
> SH7724 Evovec board. I also own one KMC KZ-SH3-03 (SH7708, SH-3) board and
> several small SH-2 and SH-2A boards (from a Japanese electronics magazine).
>
> I think Geert Uytterhoven has also one SH-4 board (if I remember correctly)
> and one of the gcc upstream maintainers has an AP-SH4AD-0A board from Alpha
> Project.
Sorry to disappoint you, but my SH-4A CPU cores are buried in Renesas ARM SoCs.
Using those means resurrecting "SH Core Linux" and forward-porting it to
still-supported SoCs first.
>> What other boards do we need to covert to device tree? arch/sh/boards has
>> 15 C
>> files and 19 subdirectories, but I dunno the status of any of them...
>
> Hard to say. At least the ones above plus the ST-40 boards should be
> included.
I also have access to a remote Migo-R (SH7722).
[*] https://marc.info/?l=linux-sh&m\x130034400711357 first.
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
^ permalink raw reply [flat|nested] 138+ messages in thread* Re: [J-core] [PATCH v5 00/22] sh: LANDISK and R2Dplus convert to device tree
@ 2018-05-07 14:05 ` Geert Uytterhoeven
0 siblings, 0 replies; 138+ messages in thread
From: Geert Uytterhoeven @ 2018-05-07 14:05 UTC (permalink / raw)
To: John Paul Adrian Glaubitz
Cc: Rob Landley, Yoshinori Sato, Rich Felker, Linux-sh list,
Linux Kernel Mailing List
Hi Adrian,
On Mon, May 7, 2018 at 3:50 PM, John Paul Adrian Glaubitz
<glaubitz@physik.fu-berlin.de> wrote:
> On 05/07/2018 03:40 PM, Rob Landley wrote:
>> On a related note, is there a list of boards anywhere? I'm working on a
>> 7760
>> system at $DAYJOB, Rich has a landisk which according to
>> https://www.openbsd.org/landisk.html is an SH7751R, and Sato-san says that
>> QEMU's -r2d emulates that too? ("RTS7751R2Dplus is QEMU-SH4 target. So
>> easy
>> trying.")
>
> I have lots of Dreamcasts (SH7091), one SH7785LCR evaulation board and one
> SH7724 Evovec board. I also own one KMC KZ-SH3-03 (SH7708, SH-3) board and
> several small SH-2 and SH-2A boards (from a Japanese electronics magazine).
>
> I think Geert Uytterhoven has also one SH-4 board (if I remember correctly)
> and one of the gcc upstream maintainers has an AP-SH4AD-0A board from Alpha
> Project.
Sorry to disappoint you, but my SH-4A CPU cores are buried in Renesas ARM SoCs.
Using those means resurrecting "SH Core Linux" and forward-porting it to
still-supported SoCs first.
>> What other boards do we need to covert to device tree? arch/sh/boards has
>> 15 C
>> files and 19 subdirectories, but I dunno the status of any of them...
>
> Hard to say. At least the ones above plus the ST-40 boards should be
> included.
I also have access to a remote Migo-R (SH7722).
[*] https://marc.info/?l=linux-sh&m=130034400711357 first.
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
^ permalink raw reply [flat|nested] 138+ messages in thread
* Re: [J-core] [PATCH v5 00/22] sh: LANDISK and R2Dplus convert to device tree
2018-05-07 13:40 ` Rob Landley
@ 2018-05-07 14:43 ` Rich Felker
-1 siblings, 0 replies; 138+ messages in thread
From: Rich Felker @ 2018-05-07 14:43 UTC (permalink / raw)
To: Rob Landley
Cc: John Paul Adrian Glaubitz, Yoshinori Sato, linux-sh, linux-kernel
On Mon, May 07, 2018 at 08:40:35AM -0500, Rob Landley wrote:
> On 05/07/2018 06:00 AM, John Paul Adrian Glaubitz wrote:
> > I have been able to boot my own kernel on my USL-5P device, but
> > I could never get it to detect the IDE controller. Do I need
> > an additional patch for that?
>
> On a related note, is there a list of boards anywhere? I'm working on a 7760
> system at $DAYJOB, Rich has a landisk which according to
> https://www.openbsd.org/landisk.html is an SH7751R, and Sato-san says that
> QEMU's -r2d emulates that too? ("RTS7751R2Dplus is QEMU-SH4 target. So easy
> trying.")
>
> What other boards do we need to covert to device tree? arch/sh/boards has 15 C
> files and 19 subdirectories, but I dunno the status of any of them...
I think asking "what we need to convert" is at least slightly
mis-framed. Once the basics for device tree support are in place
(basically patches 06-09), which boards are supported by device tree
is mostly a matter of (1) whether the hardware drivers you want to use
have bindings and use modern kernel interfaces, and (2) someone
writing the dts files.
Unless there's strong objection, I'd be happy with just doing a survey
of device drivers used on currently supported boards, making sure they
all nominally support device tree, then removing the old board file
framework and waiting to see user response. If we take this path it
should likely happen in a release not planned for LTS so there's time
to add appropriate driver fixes and dts files before the next LTS
release.
I don't mind holding off a little bit on removal of the legacy board
file support if it's hard to get enough hardware working right away
with device tree, but I do want to move towards getting rid of it as
soon as we can, since it's a large volume of code cutting into my
ability to have a good maintainer-level understanding of the arch/sh
tree and has a lot of crufty, unmaintained parallel infrastructure
duplicating stuff that can be done in cleaner and more modern ways
(see the threads on early platform device stuff, rtc drivers, etc.).
Rich
^ permalink raw reply [flat|nested] 138+ messages in thread* Re: [J-core] [PATCH v5 00/22] sh: LANDISK and R2Dplus convert to device tree
@ 2018-05-07 14:43 ` Rich Felker
0 siblings, 0 replies; 138+ messages in thread
From: Rich Felker @ 2018-05-07 14:43 UTC (permalink / raw)
To: Rob Landley
Cc: John Paul Adrian Glaubitz, Yoshinori Sato, linux-sh, linux-kernel
On Mon, May 07, 2018 at 08:40:35AM -0500, Rob Landley wrote:
> On 05/07/2018 06:00 AM, John Paul Adrian Glaubitz wrote:
> > I have been able to boot my own kernel on my USL-5P device, but
> > I could never get it to detect the IDE controller. Do I need
> > an additional patch for that?
>
> On a related note, is there a list of boards anywhere? I'm working on a 7760
> system at $DAYJOB, Rich has a landisk which according to
> https://www.openbsd.org/landisk.html is an SH7751R, and Sato-san says that
> QEMU's -r2d emulates that too? ("RTS7751R2Dplus is QEMU-SH4 target. So easy
> trying.")
>
> What other boards do we need to covert to device tree? arch/sh/boards has 15 C
> files and 19 subdirectories, but I dunno the status of any of them...
I think asking "what we need to convert" is at least slightly
mis-framed. Once the basics for device tree support are in place
(basically patches 06-09), which boards are supported by device tree
is mostly a matter of (1) whether the hardware drivers you want to use
have bindings and use modern kernel interfaces, and (2) someone
writing the dts files.
Unless there's strong objection, I'd be happy with just doing a survey
of device drivers used on currently supported boards, making sure they
all nominally support device tree, then removing the old board file
framework and waiting to see user response. If we take this path it
should likely happen in a release not planned for LTS so there's time
to add appropriate driver fixes and dts files before the next LTS
release.
I don't mind holding off a little bit on removal of the legacy board
file support if it's hard to get enough hardware working right away
with device tree, but I do want to move towards getting rid of it as
soon as we can, since it's a large volume of code cutting into my
ability to have a good maintainer-level understanding of the arch/sh
tree and has a lot of crufty, unmaintained parallel infrastructure
duplicating stuff that can be done in cleaner and more modern ways
(see the threads on early platform device stuff, rtc drivers, etc.).
Rich
^ permalink raw reply [flat|nested] 138+ messages in thread* Re: [J-core] [PATCH v5 00/22] sh: LANDISK and R2Dplus convert to device tree
2018-05-07 14:43 ` Rich Felker
@ 2018-05-07 15:13 ` Rob Landley
-1 siblings, 0 replies; 138+ messages in thread
From: Rob Landley @ 2018-05-07 15:13 UTC (permalink / raw)
To: Rich Felker
Cc: John Paul Adrian Glaubitz, Yoshinori Sato, linux-sh, linux-kernel
On 05/07/2018 09:43 AM, Rich Felker wrote:
> On Mon, May 07, 2018 at 08:40:35AM -0500, Rob Landley wrote:
>> On 05/07/2018 06:00 AM, John Paul Adrian Glaubitz wrote:
>>> I have been able to boot my own kernel on my USL-5P device, but
>>> I could never get it to detect the IDE controller. Do I need
>>> an additional patch for that?
>>
>> On a related note, is there a list of boards anywhere? I'm working on a 7760
>> system at $DAYJOB, Rich has a landisk which according to
>> https://www.openbsd.org/landisk.html is an SH7751R, and Sato-san says that
>> QEMU's -r2d emulates that too? ("RTS7751R2Dplus is QEMU-SH4 target. So easy
>> trying.")
>>
>> What other boards do we need to covert to device tree? arch/sh/boards has 15 C
>> files and 19 subdirectories, but I dunno the status of any of them...
>
> I think asking "what we need to convert" is at least slightly
> mis-framed. Once the basics for device tree support are in place
> (basically patches 06-09), which boards are supported by device tree
> is mostly a matter of (1) whether the hardware drivers you want to use
> have bindings and use modern kernel interfaces, and (2) someone
> writing the dts files.
(3) being able to test the result on real hardware.
We can _add_ device tree support without that, but can we remove the old board
files without it?
> I don't mind holding off a little bit on removal of the legacy board
> file support if it's hard to get enough hardware working right away
> with device tree, but I do want to move towards getting rid of it as
> soon as we can, since it's a large volume of code cutting into my
> ability to have a good maintainer-level understanding of the arch/sh
> tree and has a lot of crufty, unmaintained parallel infrastructure
> duplicating stuff that can be done in cleaner and more modern ways
> (see the threads on early platform device stuff, rtc drivers, etc.).
The process may include a deprecation of hardware nobody has anymore, with call
for testers, for a year or so before deleting stuff. (And then the old stuff's
in git if somebody finds a board and wants to fish it out.)
Also, I'd really like QEMU support to act as a first class board. At least 256
megs of ram (so you can do native compiles on it), serial support that works
(enabling the FIFO broke it because they don't implement the '15 bits of silence
triggers a flush timer' part, so data gets stranded in the buffer until enough
comes in to fill it the rest of the way which is a pain to type at when it's a
serial console), multiple hard drives, and so on.
I'd be fine with virtio but there's no virtio devices on that target I've
noticed yet, although maybe I just haven't figured out how to enable it...
> Rich
Rob
^ permalink raw reply [flat|nested] 138+ messages in thread* Re: [J-core] [PATCH v5 00/22] sh: LANDISK and R2Dplus convert to device tree
@ 2018-05-07 15:13 ` Rob Landley
0 siblings, 0 replies; 138+ messages in thread
From: Rob Landley @ 2018-05-07 15:13 UTC (permalink / raw)
To: Rich Felker
Cc: John Paul Adrian Glaubitz, Yoshinori Sato, linux-sh, linux-kernel
On 05/07/2018 09:43 AM, Rich Felker wrote:
> On Mon, May 07, 2018 at 08:40:35AM -0500, Rob Landley wrote:
>> On 05/07/2018 06:00 AM, John Paul Adrian Glaubitz wrote:
>>> I have been able to boot my own kernel on my USL-5P device, but
>>> I could never get it to detect the IDE controller. Do I need
>>> an additional patch for that?
>>
>> On a related note, is there a list of boards anywhere? I'm working on a 7760
>> system at $DAYJOB, Rich has a landisk which according to
>> https://www.openbsd.org/landisk.html is an SH7751R, and Sato-san says that
>> QEMU's -r2d emulates that too? ("RTS7751R2Dplus is QEMU-SH4 target. So easy
>> trying.")
>>
>> What other boards do we need to covert to device tree? arch/sh/boards has 15 C
>> files and 19 subdirectories, but I dunno the status of any of them...
>
> I think asking "what we need to convert" is at least slightly
> mis-framed. Once the basics for device tree support are in place
> (basically patches 06-09), which boards are supported by device tree
> is mostly a matter of (1) whether the hardware drivers you want to use
> have bindings and use modern kernel interfaces, and (2) someone
> writing the dts files.
(3) being able to test the result on real hardware.
We can _add_ device tree support without that, but can we remove the old board
files without it?
> I don't mind holding off a little bit on removal of the legacy board
> file support if it's hard to get enough hardware working right away
> with device tree, but I do want to move towards getting rid of it as
> soon as we can, since it's a large volume of code cutting into my
> ability to have a good maintainer-level understanding of the arch/sh
> tree and has a lot of crufty, unmaintained parallel infrastructure
> duplicating stuff that can be done in cleaner and more modern ways
> (see the threads on early platform device stuff, rtc drivers, etc.).
The process may include a deprecation of hardware nobody has anymore, with call
for testers, for a year or so before deleting stuff. (And then the old stuff's
in git if somebody finds a board and wants to fish it out.)
Also, I'd really like QEMU support to act as a first class board. At least 256
megs of ram (so you can do native compiles on it), serial support that works
(enabling the FIFO broke it because they don't implement the '15 bits of silence
triggers a flush timer' part, so data gets stranded in the buffer until enough
comes in to fill it the rest of the way which is a pain to type at when it's a
serial console), multiple hard drives, and so on.
I'd be fine with virtio but there's no virtio devices on that target I've
noticed yet, although maybe I just haven't figured out how to enable it...
> Rich
Rob
^ permalink raw reply [flat|nested] 138+ messages in thread* Re: [J-core] [PATCH v5 00/22] sh: LANDISK and R2Dplus convert to device tree
2018-05-07 15:13 ` Rob Landley
@ 2018-05-07 15:52 ` Rich Felker
-1 siblings, 0 replies; 138+ messages in thread
From: Rich Felker @ 2018-05-07 15:52 UTC (permalink / raw)
To: Rob Landley
Cc: John Paul Adrian Glaubitz, Yoshinori Sato, linux-sh, linux-kernel
On Mon, May 07, 2018 at 10:13:32AM -0500, Rob Landley wrote:
>
>
> On 05/07/2018 09:43 AM, Rich Felker wrote:
> > On Mon, May 07, 2018 at 08:40:35AM -0500, Rob Landley wrote:
> >> On 05/07/2018 06:00 AM, John Paul Adrian Glaubitz wrote:
> >>> I have been able to boot my own kernel on my USL-5P device, but
> >>> I could never get it to detect the IDE controller. Do I need
> >>> an additional patch for that?
> >>
> >> On a related note, is there a list of boards anywhere? I'm working on a 7760
> >> system at $DAYJOB, Rich has a landisk which according to
> >> https://www.openbsd.org/landisk.html is an SH7751R, and Sato-san says that
> >> QEMU's -r2d emulates that too? ("RTS7751R2Dplus is QEMU-SH4 target. So easy
> >> trying.")
> >>
> >> What other boards do we need to covert to device tree? arch/sh/boards has 15 C
> >> files and 19 subdirectories, but I dunno the status of any of them...
> >
> > I think asking "what we need to convert" is at least slightly
> > mis-framed. Once the basics for device tree support are in place
> > (basically patches 06-09), which boards are supported by device tree
> > is mostly a matter of (1) whether the hardware drivers you want to use
> > have bindings and use modern kernel interfaces, and (2) someone
> > writing the dts files.
>
> (3) being able to test the result on real hardware.
>
> We can _add_ device tree support without that, but can we remove the old board
> files without it?
As far as what Linus told me when I joined as maintainer, we can
remove whatever we like. But I don't want to be user-hostile.
OTOH I don't think there are SH users keeping up with bleeding-edge
kernels, and I don't think distros (Debian?) are shipping kernels
anyway since the kernel is currently highly board-specific. So the
only users who would be affected by removal are ones building their
own latest kernels, and it seems plausible they'd be happy with doing
a little testing to provide feedback to get things working with DT if
they don't work out of the box.
> > I don't mind holding off a little bit on removal of the legacy board
> > file support if it's hard to get enough hardware working right away
> > with device tree, but I do want to move towards getting rid of it as
> > soon as we can, since it's a large volume of code cutting into my
> > ability to have a good maintainer-level understanding of the arch/sh
> > tree and has a lot of crufty, unmaintained parallel infrastructure
> > duplicating stuff that can be done in cleaner and more modern ways
> > (see the threads on early platform device stuff, rtc drivers, etc.).
>
> The process may include a deprecation of hardware nobody has anymore, with call
> for testers, for a year or so before deleting stuff. (And then the old stuff's
> in git if somebody finds a board and wants to fish it out.)
>
> Also, I'd really like QEMU support to act as a first class board. At least 256
> megs of ram (so you can do native compiles on it),
Unfortunately the r2d has some hardware mapped just above 64M
physical, so it's not easy to extend its memory size. I think device
tree will solve this by letting us pass multiple physical ranges that
can be used as ram, which I don't know how to do with the old
kconfig-based memory base/size.
Of course there's no limit (except the usual 2G one) on virtual
memory, so another solution is just adding large swap. I think with a
virtio block device it would be fast.
> serial support that works
> (enabling the FIFO broke it because they don't implement the '15 bits of silence
> triggers a flush timer' part, so data gets stranded in the buffer until enough
> comes in to fill it the rest of the way which is a pain to type at when it's a
> serial console), multiple hard drives, and so on.
Let's look at how the kernel detects the buffer capability. It might
be a one-line fix on the qemu side, telling it to claim to emulate an
older model, and it's probably easy to add a kernel cmdline option to
work around it too.
> I'd be fine with virtio but there's no virtio devices on that target I've
> noticed yet, although maybe I just haven't figured out how to enable it...
I'm running qemu-sh4-system with -M r2d and virtio 9p & network,
rootfs on 9p. If you want to try reproducing my setup I can run
through my .config and command line options with you and see if we can
get something in suitable form for writeup.
Rich
^ permalink raw reply [flat|nested] 138+ messages in thread* Re: [J-core] [PATCH v5 00/22] sh: LANDISK and R2Dplus convert to device tree
@ 2018-05-07 15:52 ` Rich Felker
0 siblings, 0 replies; 138+ messages in thread
From: Rich Felker @ 2018-05-07 15:52 UTC (permalink / raw)
To: Rob Landley
Cc: John Paul Adrian Glaubitz, Yoshinori Sato, linux-sh, linux-kernel
On Mon, May 07, 2018 at 10:13:32AM -0500, Rob Landley wrote:
>
>
> On 05/07/2018 09:43 AM, Rich Felker wrote:
> > On Mon, May 07, 2018 at 08:40:35AM -0500, Rob Landley wrote:
> >> On 05/07/2018 06:00 AM, John Paul Adrian Glaubitz wrote:
> >>> I have been able to boot my own kernel on my USL-5P device, but
> >>> I could never get it to detect the IDE controller. Do I need
> >>> an additional patch for that?
> >>
> >> On a related note, is there a list of boards anywhere? I'm working on a 7760
> >> system at $DAYJOB, Rich has a landisk which according to
> >> https://www.openbsd.org/landisk.html is an SH7751R, and Sato-san says that
> >> QEMU's -r2d emulates that too? ("RTS7751R2Dplus is QEMU-SH4 target. So easy
> >> trying.")
> >>
> >> What other boards do we need to covert to device tree? arch/sh/boards has 15 C
> >> files and 19 subdirectories, but I dunno the status of any of them...
> >
> > I think asking "what we need to convert" is at least slightly
> > mis-framed. Once the basics for device tree support are in place
> > (basically patches 06-09), which boards are supported by device tree
> > is mostly a matter of (1) whether the hardware drivers you want to use
> > have bindings and use modern kernel interfaces, and (2) someone
> > writing the dts files.
>
> (3) being able to test the result on real hardware.
>
> We can _add_ device tree support without that, but can we remove the old board
> files without it?
As far as what Linus told me when I joined as maintainer, we can
remove whatever we like. But I don't want to be user-hostile.
OTOH I don't think there are SH users keeping up with bleeding-edge
kernels, and I don't think distros (Debian?) are shipping kernels
anyway since the kernel is currently highly board-specific. So the
only users who would be affected by removal are ones building their
own latest kernels, and it seems plausible they'd be happy with doing
a little testing to provide feedback to get things working with DT if
they don't work out of the box.
> > I don't mind holding off a little bit on removal of the legacy board
> > file support if it's hard to get enough hardware working right away
> > with device tree, but I do want to move towards getting rid of it as
> > soon as we can, since it's a large volume of code cutting into my
> > ability to have a good maintainer-level understanding of the arch/sh
> > tree and has a lot of crufty, unmaintained parallel infrastructure
> > duplicating stuff that can be done in cleaner and more modern ways
> > (see the threads on early platform device stuff, rtc drivers, etc.).
>
> The process may include a deprecation of hardware nobody has anymore, with call
> for testers, for a year or so before deleting stuff. (And then the old stuff's
> in git if somebody finds a board and wants to fish it out.)
>
> Also, I'd really like QEMU support to act as a first class board. At least 256
> megs of ram (so you can do native compiles on it),
Unfortunately the r2d has some hardware mapped just above 64M
physical, so it's not easy to extend its memory size. I think device
tree will solve this by letting us pass multiple physical ranges that
can be used as ram, which I don't know how to do with the old
kconfig-based memory base/size.
Of course there's no limit (except the usual 2G one) on virtual
memory, so another solution is just adding large swap. I think with a
virtio block device it would be fast.
> serial support that works
> (enabling the FIFO broke it because they don't implement the '15 bits of silence
> triggers a flush timer' part, so data gets stranded in the buffer until enough
> comes in to fill it the rest of the way which is a pain to type at when it's a
> serial console), multiple hard drives, and so on.
Let's look at how the kernel detects the buffer capability. It might
be a one-line fix on the qemu side, telling it to claim to emulate an
older model, and it's probably easy to add a kernel cmdline option to
work around it too.
> I'd be fine with virtio but there's no virtio devices on that target I've
> noticed yet, although maybe I just haven't figured out how to enable it...
I'm running qemu-sh4-system with -M r2d and virtio 9p & network,
rootfs on 9p. If you want to try reproducing my setup I can run
through my .config and command line options with you and see if we can
get something in suitable form for writeup.
Rich
^ permalink raw reply [flat|nested] 138+ messages in thread
* Re: [J-core] [PATCH v5 00/22] sh: LANDISK and R2Dplus convert to device tree
2018-05-07 11:00 ` John Paul Adrian Glaubitz
@ 2018-05-07 14:45 ` Rich Felker
-1 siblings, 0 replies; 138+ messages in thread
From: Rich Felker @ 2018-05-07 14:45 UTC (permalink / raw)
To: John Paul Adrian Glaubitz
Cc: Yoshinori Sato, Rob Landley, linux-sh, linux-kernel
On Mon, May 07, 2018 at 01:00:17PM +0200, John Paul Adrian Glaubitz wrote:
> On 05/07/2018 03:40 AM, Yoshinori Sato wrote:
> >>@Yoshinori:
> >>
> >>Did the HDL-160U LANDISK device you have use u-boot by default or
> >>did you convert it from lilo?
> >
> >Yes.
> >Replace sh-lilo's second stage with u-boot.
> >With this method it is unnecessary to rewrite Flash for boot.
>
> Great, thank you. I will give it a try on my USL-5P and write down
> the individual steps once I have figured it out.
Please let me know once you figure it out. I haven't made much
progress yet and it would be really helpful to have some simple
directions/outline of what to do, especially one that's not in terms
of black box tools ("run this command") but how it all works (where
the different bootloader components live when installed -- MBRs?
partition boot records? files in a filesystem (who interprets it?)?
etc.)
Rich
^ permalink raw reply [flat|nested] 138+ messages in thread* Re: [J-core] [PATCH v5 00/22] sh: LANDISK and R2Dplus convert to device tree
@ 2018-05-07 14:45 ` Rich Felker
0 siblings, 0 replies; 138+ messages in thread
From: Rich Felker @ 2018-05-07 14:45 UTC (permalink / raw)
To: John Paul Adrian Glaubitz
Cc: Yoshinori Sato, Rob Landley, linux-sh, linux-kernel
On Mon, May 07, 2018 at 01:00:17PM +0200, John Paul Adrian Glaubitz wrote:
> On 05/07/2018 03:40 AM, Yoshinori Sato wrote:
> >>@Yoshinori:
> >>
> >>Did the HDL-160U LANDISK device you have use u-boot by default or
> >>did you convert it from lilo?
> >
> >Yes.
> >Replace sh-lilo's second stage with u-boot.
> >With this method it is unnecessary to rewrite Flash for boot.
>
> Great, thank you. I will give it a try on my USL-5P and write down
> the individual steps once I have figured it out.
Please let me know once you figure it out. I haven't made much
progress yet and it would be really helpful to have some simple
directions/outline of what to do, especially one that's not in terms
of black box tools ("run this command") but how it all works (where
the different bootloader components live when installed -- MBRs?
partition boot records? files in a filesystem (who interprets it?)?
etc.)
Rich
^ permalink raw reply [flat|nested] 138+ messages in thread* Re: [J-core] [PATCH v5 00/22] sh: LANDISK and R2Dplus convert to device tree
2018-05-07 14:45 ` Rich Felker
@ 2018-05-07 15:28 ` Rob Landley
-1 siblings, 0 replies; 138+ messages in thread
From: Rob Landley @ 2018-05-07 15:28 UTC (permalink / raw)
To: Rich Felker, John Paul Adrian Glaubitz
Cc: Yoshinori Sato, linux-sh, linux-kernel
On 05/07/2018 09:45 AM, Rich Felker wrote:
> On Mon, May 07, 2018 at 01:00:17PM +0200, John Paul Adrian Glaubitz wrote:
>> On 05/07/2018 03:40 AM, Yoshinori Sato wrote:
>>>> @Yoshinori:
>>>>
>>>> Did the HDL-160U LANDISK device you have use u-boot by default or
>>>> did you convert it from lilo?
>>>
>>> Yes.
>>> Replace sh-lilo's second stage with u-boot.
>>> With this method it is unnecessary to rewrite Flash for boot.
>>
>> Great, thank you. I will give it a try on my USL-5P and write down
>> the individual steps once I have figured it out.
>
> Please let me know once you figure it out. I haven't made much
> progress yet and it would be really helpful to have some simple
> directions/outline of what to do, especially one that's not in terms
> of black box tools ("run this command") but how it all works (where
> the different bootloader components live when installed -- MBRs?
> partition boot records? files in a filesystem (who interprets it?)?
> etc.)
U-boot 101. The workflow you want is usually:
1) get u-boot to load and run on the board, with serial console and a basic
knowledge of where the DRAM is. (This often involves fighting with dram refresh
init, often by convincing u-boot NOT to do it because your stage 1 bootloader
already did, which involves a rolled up newspaper and a lot of swearing because
it ASSUMES. Oh it assumes. Or sometimes there's an sram->dram relocation which
means somewhere, there's a magic linker script you will learn to hate. Well,
Rich might be comfortable with that area, I still stub my toes there a lot.)
2) Getting u-boot reading/writing a flash area it can store its environment
variables in, so they can persist. (It's a driver.)
3) get u-boot talking to the network card, with either dhcp or static IP.
(Another driver, and some magic environment variables the driver consumes.)
4) tftp fetch an ELF kernel (or uimage if you must) into DRAM starting at a
known address. (This is a u-boot command line command. You'll need a tftp server
set up on another machine for it to fetch from.)
5) tftp fetch any other data (initrd.cpio.gz, board.dtb). (Same command,
different parameters.)
6) boot the kernel with all that gorp (a big long command line command) which
will need a kernel command line (generally stored in another persistent
environjment variable).
7) make a "go" script that does all that in one commend. There's a command to
run an environment variable's contents as a set of semicolon-separated command
line commands (that's how u-boot implements scripts), and there's a magic
environment variable whose contents get run on startup (bootup? startup? I
forget, it's in the source and docs and a buncha examples out there). It's
cleaner to have the magic one do "run $othervar" rather than putting a lot of
plumbing in the magic one. And you will totally want a "wait 3 seconds for a key
to be pressed and do a shell prompt if it is" header on that or you have to
reflash the bootloader to get your shell prompt back, which is sad.
8) Once you've got tftp working, there's a copy command to copy flash memory to
dram, and a corresponding "write to flash from dram" command with dram start
address and flash start address and length arguments. This is how the boot
without tftp is implemented in u-boot, and how updating the saved image it
auto-boots to if you don't press a key is implemented.
(You can usually configure/build uboot in a couple different ways, with a
brain-dead built in shell or with busybox hush glued into it. Depends on how big
you want the image to be. Not sure how much of that is upstream and how much is
vendor forks I've used, though. Been a while.)
> Rich
Rob
^ permalink raw reply [flat|nested] 138+ messages in thread* Re: [J-core] [PATCH v5 00/22] sh: LANDISK and R2Dplus convert to device tree
@ 2018-05-07 15:28 ` Rob Landley
0 siblings, 0 replies; 138+ messages in thread
From: Rob Landley @ 2018-05-07 15:28 UTC (permalink / raw)
To: Rich Felker, John Paul Adrian Glaubitz
Cc: Yoshinori Sato, linux-sh, linux-kernel
On 05/07/2018 09:45 AM, Rich Felker wrote:
> On Mon, May 07, 2018 at 01:00:17PM +0200, John Paul Adrian Glaubitz wrote:
>> On 05/07/2018 03:40 AM, Yoshinori Sato wrote:
>>>> @Yoshinori:
>>>>
>>>> Did the HDL-160U LANDISK device you have use u-boot by default or
>>>> did you convert it from lilo?
>>>
>>> Yes.
>>> Replace sh-lilo's second stage with u-boot.
>>> With this method it is unnecessary to rewrite Flash for boot.
>>
>> Great, thank you. I will give it a try on my USL-5P and write down
>> the individual steps once I have figured it out.
>
> Please let me know once you figure it out. I haven't made much
> progress yet and it would be really helpful to have some simple
> directions/outline of what to do, especially one that's not in terms
> of black box tools ("run this command") but how it all works (where
> the different bootloader components live when installed -- MBRs?
> partition boot records? files in a filesystem (who interprets it?)?
> etc.)
U-boot 101. The workflow you want is usually:
1) get u-boot to load and run on the board, with serial console and a basic
knowledge of where the DRAM is. (This often involves fighting with dram refresh
init, often by convincing u-boot NOT to do it because your stage 1 bootloader
already did, which involves a rolled up newspaper and a lot of swearing because
it ASSUMES. Oh it assumes. Or sometimes there's an sram->dram relocation which
means somewhere, there's a magic linker script you will learn to hate. Well,
Rich might be comfortable with that area, I still stub my toes there a lot.)
2) Getting u-boot reading/writing a flash area it can store its environment
variables in, so they can persist. (It's a driver.)
3) get u-boot talking to the network card, with either dhcp or static IP.
(Another driver, and some magic environment variables the driver consumes.)
4) tftp fetch an ELF kernel (or uimage if you must) into DRAM starting at a
known address. (This is a u-boot command line command. You'll need a tftp server
set up on another machine for it to fetch from.)
5) tftp fetch any other data (initrd.cpio.gz, board.dtb). (Same command,
different parameters.)
6) boot the kernel with all that gorp (a big long command line command) which
will need a kernel command line (generally stored in another persistent
environjment variable).
7) make a "go" script that does all that in one commend. There's a command to
run an environment variable's contents as a set of semicolon-separated command
line commands (that's how u-boot implements scripts), and there's a magic
environment variable whose contents get run on startup (bootup? startup? I
forget, it's in the source and docs and a buncha examples out there). It's
cleaner to have the magic one do "run $othervar" rather than putting a lot of
plumbing in the magic one. And you will totally want a "wait 3 seconds for a key
to be pressed and do a shell prompt if it is" header on that or you have to
reflash the bootloader to get your shell prompt back, which is sad.
8) Once you've got tftp working, there's a copy command to copy flash memory to
dram, and a corresponding "write to flash from dram" command with dram start
address and flash start address and length arguments. This is how the boot
without tftp is implemented in u-boot, and how updating the saved image it
auto-boots to if you don't press a key is implemented.
(You can usually configure/build uboot in a couple different ways, with a
brain-dead built in shell or with busybox hush glued into it. Depends on how big
you want the image to be. Not sure how much of that is upstream and how much is
vendor forks I've used, though. Been a while.)
> Rich
Rob
^ permalink raw reply [flat|nested] 138+ messages in thread* Re: [J-core] [PATCH v5 00/22] sh: LANDISK and R2Dplus convert to device tree
2018-05-07 15:28 ` Rob Landley
@ 2018-05-07 15:55 ` Rich Felker
-1 siblings, 0 replies; 138+ messages in thread
From: Rich Felker @ 2018-05-07 15:55 UTC (permalink / raw)
To: Rob Landley
Cc: John Paul Adrian Glaubitz, Yoshinori Sato, linux-sh, linux-kernel
On Mon, May 07, 2018 at 10:28:37AM -0500, Rob Landley wrote:
>
>
> On 05/07/2018 09:45 AM, Rich Felker wrote:
> > On Mon, May 07, 2018 at 01:00:17PM +0200, John Paul Adrian Glaubitz wrote:
> >> On 05/07/2018 03:40 AM, Yoshinori Sato wrote:
> >>>> @Yoshinori:
> >>>>
> >>>> Did the HDL-160U LANDISK device you have use u-boot by default or
> >>>> did you convert it from lilo?
> >>>
> >>> Yes.
> >>> Replace sh-lilo's second stage with u-boot.
> >>> With this method it is unnecessary to rewrite Flash for boot.
> >>
> >> Great, thank you. I will give it a try on my USL-5P and write down
> >> the individual steps once I have figured it out.
> >
> > Please let me know once you figure it out. I haven't made much
> > progress yet and it would be really helpful to have some simple
> > directions/outline of what to do, especially one that's not in terms
> > of black box tools ("run this command") but how it all works (where
> > the different bootloader components live when installed -- MBRs?
> > partition boot records? files in a filesystem (who interprets it?)?
> > etc.)
>
> U-boot 101. The workflow you want is usually:
>
> 1) get u-boot to load and run on the board, with serial console and a basic
> knowledge of where the DRAM is. (This often involves fighting with dram refresh
> init, often by convincing u-boot NOT to do it because your stage 1 bootloader
> already did, which involves a rolled up newspaper and a lot of swearing because
> it ASSUMES. Oh it assumes. Or sometimes there's an sram->dram relocation which
> means somewhere, there's a magic linker script you will learn to hate. Well,
> Rich might be comfortable with that area, I still stub my toes there a lot.)
>
> 2) Getting u-boot reading/writing a flash area it can store its environment
> variables in, so they can persist. (It's a driver.)
>
> 3) get u-boot talking to the network card, with either dhcp or static IP.
> (Another driver, and some magic environment variables the driver consumes.)
>
> 4) tftp fetch an ELF kernel (or uimage if you must) into DRAM starting at a
> known address. (This is a u-boot command line command. You'll need a tftp server
> set up on another machine for it to fetch from.)
>
> 5) tftp fetch any other data (initrd.cpio.gz, board.dtb). (Same command,
> different parameters.)
>
> 6) boot the kernel with all that gorp (a big long command line command) which
> will need a kernel command line (generally stored in another persistent
> environjment variable).
>
> 7) make a "go" script that does all that in one commend. There's a command to
> run an environment variable's contents as a set of semicolon-separated command
> line commands (that's how u-boot implements scripts), and there's a magic
> environment variable whose contents get run on startup (bootup? startup? I
> forget, it's in the source and docs and a buncha examples out there). It's
> cleaner to have the magic one do "run $othervar" rather than putting a lot of
> plumbing in the magic one. And you will totally want a "wait 3 seconds for a key
> to be pressed and do a shell prompt if it is" header on that or you have to
> reflash the bootloader to get your shell prompt back, which is sad.
>
> 8) Once you've got tftp working, there's a copy command to copy flash memory to
> dram, and a corresponding "write to flash from dram" command with dram start
> address and flash start address and length arguments. This is how the boot
> without tftp is implemented in u-boot, and how updating the saved image it
> auto-boots to if you don't press a key is implemented.
>
> (You can usually configure/build uboot in a couple different ways, with a
> brain-dead built in shell or with busybox hush glued into it. Depends on how big
> you want the image to be. Not sure how much of that is upstream and how much is
> vendor forks I've used, though. Been a while.)
This sounds like a pain, but none of it seems relevant to the setup
we're using. This U-Boot variant does not install on flash or use
flash; it runs from disk in place of LILO or another MBR-based
bootloader. I'm just trying to understand where/how the binary blobs
are installed on the disk so I can reproduce that when making new disk
images with my kernel and filesystem.
Rich
^ permalink raw reply [flat|nested] 138+ messages in thread* Re: [J-core] [PATCH v5 00/22] sh: LANDISK and R2Dplus convert to device tree
@ 2018-05-07 15:55 ` Rich Felker
0 siblings, 0 replies; 138+ messages in thread
From: Rich Felker @ 2018-05-07 15:55 UTC (permalink / raw)
To: Rob Landley
Cc: John Paul Adrian Glaubitz, Yoshinori Sato, linux-sh, linux-kernel
On Mon, May 07, 2018 at 10:28:37AM -0500, Rob Landley wrote:
>
>
> On 05/07/2018 09:45 AM, Rich Felker wrote:
> > On Mon, May 07, 2018 at 01:00:17PM +0200, John Paul Adrian Glaubitz wrote:
> >> On 05/07/2018 03:40 AM, Yoshinori Sato wrote:
> >>>> @Yoshinori:
> >>>>
> >>>> Did the HDL-160U LANDISK device you have use u-boot by default or
> >>>> did you convert it from lilo?
> >>>
> >>> Yes.
> >>> Replace sh-lilo's second stage with u-boot.
> >>> With this method it is unnecessary to rewrite Flash for boot.
> >>
> >> Great, thank you. I will give it a try on my USL-5P and write down
> >> the individual steps once I have figured it out.
> >
> > Please let me know once you figure it out. I haven't made much
> > progress yet and it would be really helpful to have some simple
> > directions/outline of what to do, especially one that's not in terms
> > of black box tools ("run this command") but how it all works (where
> > the different bootloader components live when installed -- MBRs?
> > partition boot records? files in a filesystem (who interprets it?)?
> > etc.)
>
> U-boot 101. The workflow you want is usually:
>
> 1) get u-boot to load and run on the board, with serial console and a basic
> knowledge of where the DRAM is. (This often involves fighting with dram refresh
> init, often by convincing u-boot NOT to do it because your stage 1 bootloader
> already did, which involves a rolled up newspaper and a lot of swearing because
> it ASSUMES. Oh it assumes. Or sometimes there's an sram->dram relocation which
> means somewhere, there's a magic linker script you will learn to hate. Well,
> Rich might be comfortable with that area, I still stub my toes there a lot.)
>
> 2) Getting u-boot reading/writing a flash area it can store its environment
> variables in, so they can persist. (It's a driver.)
>
> 3) get u-boot talking to the network card, with either dhcp or static IP.
> (Another driver, and some magic environment variables the driver consumes.)
>
> 4) tftp fetch an ELF kernel (or uimage if you must) into DRAM starting at a
> known address. (This is a u-boot command line command. You'll need a tftp server
> set up on another machine for it to fetch from.)
>
> 5) tftp fetch any other data (initrd.cpio.gz, board.dtb). (Same command,
> different parameters.)
>
> 6) boot the kernel with all that gorp (a big long command line command) which
> will need a kernel command line (generally stored in another persistent
> environjment variable).
>
> 7) make a "go" script that does all that in one commend. There's a command to
> run an environment variable's contents as a set of semicolon-separated command
> line commands (that's how u-boot implements scripts), and there's a magic
> environment variable whose contents get run on startup (bootup? startup? I
> forget, it's in the source and docs and a buncha examples out there). It's
> cleaner to have the magic one do "run $othervar" rather than putting a lot of
> plumbing in the magic one. And you will totally want a "wait 3 seconds for a key
> to be pressed and do a shell prompt if it is" header on that or you have to
> reflash the bootloader to get your shell prompt back, which is sad.
>
> 8) Once you've got tftp working, there's a copy command to copy flash memory to
> dram, and a corresponding "write to flash from dram" command with dram start
> address and flash start address and length arguments. This is how the boot
> without tftp is implemented in u-boot, and how updating the saved image it
> auto-boots to if you don't press a key is implemented.
>
> (You can usually configure/build uboot in a couple different ways, with a
> brain-dead built in shell or with busybox hush glued into it. Depends on how big
> you want the image to be. Not sure how much of that is upstream and how much is
> vendor forks I've used, though. Been a while.)
This sounds like a pain, but none of it seems relevant to the setup
we're using. This U-Boot variant does not install on flash or use
flash; it runs from disk in place of LILO or another MBR-based
bootloader. I'm just trying to understand where/how the binary blobs
are installed on the disk so I can reproduce that when making new disk
images with my kernel and filesystem.
Rich
^ permalink raw reply [flat|nested] 138+ messages in thread* Re: [J-core] [PATCH v5 00/22] sh: LANDISK and R2Dplus convert to device tree
2018-05-07 15:55 ` Rich Felker
@ 2018-05-07 20:01 ` Rob Landley
-1 siblings, 0 replies; 138+ messages in thread
From: Rob Landley @ 2018-05-07 20:01 UTC (permalink / raw)
To: Rich Felker
Cc: John Paul Adrian Glaubitz, Yoshinori Sato, linux-sh, linux-kernel
On 05/07/2018 10:55 AM, Rich Felker wrote:
> On Mon, May 07, 2018 at 10:28:37AM -0500, Rob Landley wrote:
>>
>>
>> On 05/07/2018 09:45 AM, Rich Felker wrote:
>> (You can usually configure/build uboot in a couple different ways, with a
>> brain-dead built in shell or with busybox hush glued into it. Depends on how big
>> you want the image to be. Not sure how much of that is upstream and how much is
>> vendor forks I've used, though. Been a while.)
>
> This sounds like a pain,
Well yeah. It's u-boot.
> but none of it seems relevant to the setup
> we're using. This U-Boot variant does not install on flash or use
That's the full dance for getting it installed on a board it's not already
running on. Usually somebody else sets it up and you inherit one with a "tftp
download" script and another "boot from persistent storage" script and you
mostly just the command line to swap the autoboot variable to point to the right
one of the two.
> flash; it runs from disk in place of LILO or another MBR-based
> bootloader. I'm just trying to understand where/how the binary blobs
> are installed on the disk so I can reproduce that when making new disk
> images with my kernel and filesystem.
The point of the tftp boot is quick reboot cycles during development, not having
to install the kernel you're booting on target each time. But as long as you're
not replacing u-boot and have a u-boot console you can fall back on an alternate
kernel from disk. (It's not really designed to give you a menu though, it gives
you a command line. You can have the kernel name to load in its own variable and
"set kernelname 'walrus.img'; run hdboot" though.)
There are probably more elegant ways to use this tool. I learned how to hammer
it in and get the lid off, and went on to other things...
> Rich
Rob
^ permalink raw reply [flat|nested] 138+ messages in thread
* Re: [J-core] [PATCH v5 00/22] sh: LANDISK and R2Dplus convert to device tree
@ 2018-05-07 20:01 ` Rob Landley
0 siblings, 0 replies; 138+ messages in thread
From: Rob Landley @ 2018-05-07 20:01 UTC (permalink / raw)
To: Rich Felker
Cc: John Paul Adrian Glaubitz, Yoshinori Sato, linux-sh, linux-kernel
On 05/07/2018 10:55 AM, Rich Felker wrote:
> On Mon, May 07, 2018 at 10:28:37AM -0500, Rob Landley wrote:
>>
>>
>> On 05/07/2018 09:45 AM, Rich Felker wrote:
>> (You can usually configure/build uboot in a couple different ways, with a
>> brain-dead built in shell or with busybox hush glued into it. Depends on how big
>> you want the image to be. Not sure how much of that is upstream and how much is
>> vendor forks I've used, though. Been a while.)
>
> This sounds like a pain,
Well yeah. It's u-boot.
> but none of it seems relevant to the setup
> we're using. This U-Boot variant does not install on flash or use
That's the full dance for getting it installed on a board it's not already
running on. Usually somebody else sets it up and you inherit one with a "tftp
download" script and another "boot from persistent storage" script and you
mostly just the command line to swap the autoboot variable to point to the right
one of the two.
> flash; it runs from disk in place of LILO or another MBR-based
> bootloader. I'm just trying to understand where/how the binary blobs
> are installed on the disk so I can reproduce that when making new disk
> images with my kernel and filesystem.
The point of the tftp boot is quick reboot cycles during development, not having
to install the kernel you're booting on target each time. But as long as you're
not replacing u-boot and have a u-boot console you can fall back on an alternate
kernel from disk. (It's not really designed to give you a menu though, it gives
you a command line. You can have the kernel name to load in its own variable and
"set kernelname 'walrus.img'; run hdboot" though.)
There are probably more elegant ways to use this tool. I learned how to hammer
it in and get the lid off, and went on to other things...
> Rich
Rob
^ permalink raw reply [flat|nested] 138+ messages in thread
* Re: [J-core] [PATCH v5 00/22] sh: LANDISK and R2Dplus convert to device tree
2018-05-07 11:00 ` John Paul Adrian Glaubitz
@ 2018-05-08 12:05 ` Yoshinori Sato
-1 siblings, 0 replies; 138+ messages in thread
From: Yoshinori Sato @ 2018-05-08 12:05 UTC (permalink / raw)
To: John Paul Adrian Glaubitz
Cc: Rich Felker, Rob Landley, linux-sh, linux-kernel
On Mon, 07 May 2018 20:00:17 +0900,
John Paul Adrian Glaubitz wrote:
>
> On 05/07/2018 03:40 AM, Yoshinori Sato wrote:
> >> @Yoshinori:
> >>
> >> Did the HDL-160U LANDISK device you have use u-boot by default or
> >> did you convert it from lilo?
> >
> > Yes.
> > Replace sh-lilo's second stage with u-boot.
> > With this method it is unnecessary to rewrite Flash for boot.
>
> Great, thank you. I will give it a try on my USL-5P and write down
> the individual steps once I have figured it out.
>
> As for the IDE controller: Can you tell me whether there are any
> particular patches necessary to get the kernel detect the IDE
> controller of the LANDISK devices?
I have not changed it in particular.
It works with AEC-62XX.
> I have been able to boot my own kernel on my USL-5P device, but
> I could never get it to detect the IDE controller. Do I need
> an additional patch for that?
>
> Adrian
>
> --
> .''`. John Paul Adrian Glaubitz
> : :' : Debian Developer - glaubitz@debian.org
> `. `' Freie Universitaet Berlin - glaubitz@physik.fu-berlin.de
> `- GPG: 62FF 8A75 84E0 2956 9546 0006 7426 3B37 F5B5 F913
--
Yosinori Sato
^ permalink raw reply [flat|nested] 138+ messages in thread
* Re: [J-core] [PATCH v5 00/22] sh: LANDISK and R2Dplus convert to device tree
@ 2018-05-08 12:05 ` Yoshinori Sato
0 siblings, 0 replies; 138+ messages in thread
From: Yoshinori Sato @ 2018-05-08 12:05 UTC (permalink / raw)
To: John Paul Adrian Glaubitz
Cc: Rich Felker, Rob Landley, linux-sh, linux-kernel
On Mon, 07 May 2018 20:00:17 +0900,
John Paul Adrian Glaubitz wrote:
>
> On 05/07/2018 03:40 AM, Yoshinori Sato wrote:
> >> @Yoshinori:
> >>
> >> Did the HDL-160U LANDISK device you have use u-boot by default or
> >> did you convert it from lilo?
> >
> > Yes.
> > Replace sh-lilo's second stage with u-boot.
> > With this method it is unnecessary to rewrite Flash for boot.
>
> Great, thank you. I will give it a try on my USL-5P and write down
> the individual steps once I have figured it out.
>
> As for the IDE controller: Can you tell me whether there are any
> particular patches necessary to get the kernel detect the IDE
> controller of the LANDISK devices?
I have not changed it in particular.
It works with AEC-62XX.
> I have been able to boot my own kernel on my USL-5P device, but
> I could never get it to detect the IDE controller. Do I need
> an additional patch for that?
>
> Adrian
>
> --
> .''`. John Paul Adrian Glaubitz
> : :' : Debian Developer - glaubitz@debian.org
> `. `' Freie Universitaet Berlin - glaubitz@physik.fu-berlin.de
> `- GPG: 62FF 8A75 84E0 2956 9546 0006 7426 3B37 F5B5 F913
--
Yosinori Sato
^ permalink raw reply [flat|nested] 138+ messages in thread
* Re: [J-core] [PATCH v5 00/22] sh: LANDISK and R2Dplus convert to device tree
2018-05-07 1:40 ` Yoshinori Sato
@ 2018-05-15 1:41 ` Rich Felker
-1 siblings, 0 replies; 138+ messages in thread
From: Rich Felker @ 2018-05-15 1:41 UTC (permalink / raw)
To: Yoshinori Sato
Cc: John Paul Adrian Glaubitz, Rob Landley, linux-sh, linux-kernel
On Mon, May 07, 2018 at 10:40:34AM +0900, Yoshinori Sato wrote:
> On Thu, 03 May 2018 19:07:38 +0900,
> John Paul Adrian Glaubitz wrote:
> >
> > [1 <text/plain; utf-8 (7bit)>]
> > Hi Rich!
> >
> > On 05/03/2018 04:33 AM, Rich Felker wrote:
> > > I found the U-Boot stuff here:
> > >
> > > https://ja.osdn.net/users/ysato/pf/uboot/wiki/FrontPage
> > >
> > > but I'm not sure how to install it yet. Will try to figure it out.
> >
> > Interesting. It seems the HDL-160U uses u-boot instead of lilo which
> > is used on my USL-5P. Both are based on the LANDISK platform though.
> > I wonder whether it is possible to convert the USL-5P to use u-boot
> > instead of the very limited lilo.
> >
> > As for the kernel configuration, for USL-5P, I had to use the kernel
> > configuration attached to this mail. One important configuration setting
> > is CONFIG_SH_PCLK_FREQ which has to be set to "33250000" otherwise
> > the kernel won't boot properly.
> >
> > I still have my USL-5P ready to be set up for testing a new kernel
> > image with the device tree patches merged. Although I still don't
> > know how to enable the internal (pseudo) IDE controller.
> >
> > @Yoshinori:
> >
> > Did the HDL-160U LANDISK device you have use u-boot by default or
> > did you convert it from lilo?
>
> Yes.
> Replace sh-lilo's second stage with u-boot.
> With this method it is unnecessary to rewrite Flash for boot.
Can you give me a brief explanation of how to reproduce the bootloader
installation? For now I'm just using the existing MBR/partitioning you
sent me, and replacing zImage.itb in /boot makes it attempt to load a
new kernel, but I haven't gotten any output yet to know if it's
working.
Probably the most important thing I'm missing right now is what the
its file for generating the zImage.itb should look like. I tried
making one myself but it may be wrong. I'm also unsure whether I
should use a zImage or vmlinux file as input, and if using a zImage
file, what load address I should choose.
For now I'm using the upstream landisk board support (maybe not
working, we'll see). Once I can confirm I'm getting some output and
the kernel seems minimally functional, I'm going to switch to DT, but
integrating the DT stuff with u-boot isn't important right away since
I can start with a linked-in DT.
At some point I'd also like to know how to reinstall u-boot on the MBR
or whatever.
Rich
^ permalink raw reply [flat|nested] 138+ messages in thread
* Re: [J-core] [PATCH v5 00/22] sh: LANDISK and R2Dplus convert to device tree
@ 2018-05-15 1:41 ` Rich Felker
0 siblings, 0 replies; 138+ messages in thread
From: Rich Felker @ 2018-05-15 1:41 UTC (permalink / raw)
To: Yoshinori Sato
Cc: John Paul Adrian Glaubitz, Rob Landley, linux-sh, linux-kernel
On Mon, May 07, 2018 at 10:40:34AM +0900, Yoshinori Sato wrote:
> On Thu, 03 May 2018 19:07:38 +0900,
> John Paul Adrian Glaubitz wrote:
> >
> > [1 <text/plain; utf-8 (7bit)>]
> > Hi Rich!
> >
> > On 05/03/2018 04:33 AM, Rich Felker wrote:
> > > I found the U-Boot stuff here:
> > >
> > > https://ja.osdn.net/users/ysato/pf/uboot/wiki/FrontPage
> > >
> > > but I'm not sure how to install it yet. Will try to figure it out.
> >
> > Interesting. It seems the HDL-160U uses u-boot instead of lilo which
> > is used on my USL-5P. Both are based on the LANDISK platform though.
> > I wonder whether it is possible to convert the USL-5P to use u-boot
> > instead of the very limited lilo.
> >
> > As for the kernel configuration, for USL-5P, I had to use the kernel
> > configuration attached to this mail. One important configuration setting
> > is CONFIG_SH_PCLK_FREQ which has to be set to "33250000" otherwise
> > the kernel won't boot properly.
> >
> > I still have my USL-5P ready to be set up for testing a new kernel
> > image with the device tree patches merged. Although I still don't
> > know how to enable the internal (pseudo) IDE controller.
> >
> > @Yoshinori:
> >
> > Did the HDL-160U LANDISK device you have use u-boot by default or
> > did you convert it from lilo?
>
> Yes.
> Replace sh-lilo's second stage with u-boot.
> With this method it is unnecessary to rewrite Flash for boot.
Can you give me a brief explanation of how to reproduce the bootloader
installation? For now I'm just using the existing MBR/partitioning you
sent me, and replacing zImage.itb in /boot makes it attempt to load a
new kernel, but I haven't gotten any output yet to know if it's
working.
Probably the most important thing I'm missing right now is what the
its file for generating the zImage.itb should look like. I tried
making one myself but it may be wrong. I'm also unsure whether I
should use a zImage or vmlinux file as input, and if using a zImage
file, what load address I should choose.
For now I'm using the upstream landisk board support (maybe not
working, we'll see). Once I can confirm I'm getting some output and
the kernel seems minimally functional, I'm going to switch to DT, but
integrating the DT stuff with u-boot isn't important right away since
I can start with a linked-in DT.
At some point I'd also like to know how to reinstall u-boot on the MBR
or whatever.
Rich
^ permalink raw reply [flat|nested] 138+ messages in thread
* Re: [J-core] [PATCH v5 00/22] sh: LANDISK and R2Dplus convert to device tree
2018-05-15 1:41 ` Rich Felker
@ 2018-05-16 6:42 ` Yoshinori Sato
-1 siblings, 0 replies; 138+ messages in thread
From: Yoshinori Sato @ 2018-05-16 6:42 UTC (permalink / raw)
To: Rich Felker
Cc: John Paul Adrian Glaubitz, Rob Landley, linux-sh, linux-kernel
On Tue, 15 May 2018 10:41:52 +0900,
Rich Felker wrote:
>
> On Mon, May 07, 2018 at 10:40:34AM +0900, Yoshinori Sato wrote:
> > On Thu, 03 May 2018 19:07:38 +0900,
> > John Paul Adrian Glaubitz wrote:
> > >
> > > [1 <text/plain; utf-8 (7bit)>]
> > > Hi Rich!
> > >
> > > On 05/03/2018 04:33 AM, Rich Felker wrote:
> > > > I found the U-Boot stuff here:
> > > >
> > > > https://ja.osdn.net/users/ysato/pf/uboot/wiki/FrontPage
> > > >
> > > > but I'm not sure how to install it yet. Will try to figure it out.
> > >
> > > Interesting. It seems the HDL-160U uses u-boot instead of lilo which
> > > is used on my USL-5P. Both are based on the LANDISK platform though.
> > > I wonder whether it is possible to convert the USL-5P to use u-boot
> > > instead of the very limited lilo.
> > >
> > > As for the kernel configuration, for USL-5P, I had to use the kernel
> > > configuration attached to this mail. One important configuration setting
> > > is CONFIG_SH_PCLK_FREQ which has to be set to "33250000" otherwise
> > > the kernel won't boot properly.
> > >
> > > I still have my USL-5P ready to be set up for testing a new kernel
> > > image with the device tree patches merged. Although I still don't
> > > know how to enable the internal (pseudo) IDE controller.
> > >
> > > @Yoshinori:
> > >
> > > Did the HDL-160U LANDISK device you have use u-boot by default or
> > > did you convert it from lilo?
> >
> > Yes.
> > Replace sh-lilo's second stage with u-boot.
> > With this method it is unnecessary to rewrite Flash for boot.
>
> Can you give me a brief explanation of how to reproduce the bootloader
> installation? For now I'm just using the existing MBR/partitioning you
> sent me, and replacing zImage.itb in /boot makes it attempt to load a
> new kernel, but I haven't gotten any output yet to know if it's
> working.
landisk's u-boot using spl.
You should be able to update it by the following procedure.
1. Rebuild u-boot.
2. Format ext4 for HDD first partition.
3. put u-boot.img to HDD first partition.
4. put spl/u-boot-spl.bin to HDD MBR and subsequent region.
> Probably the most important thing I'm missing right now is what the
> its file for generating the zImage.itb should look like. I tried
> making one myself but it may be wrong. I'm also unsure whether I
> should use a zImage or vmlinux file as input, and if using a zImage
> file, what load address I should choose.
>
> For now I'm using the upstream landisk board support (maybe not
> working, we'll see). Once I can confirm I'm getting some output and
> the kernel seems minimally functional, I'm going to switch to DT, but
> integrating the DT stuff with u-boot isn't important right away since
> I can start with a linked-in DT.
>
> At some point I'd also like to know how to reinstall u-boot on the MBR
> or whatever.
>
> Rich
--
Yosinori Sato
^ permalink raw reply [flat|nested] 138+ messages in thread
* Re: [J-core] [PATCH v5 00/22] sh: LANDISK and R2Dplus convert to device tree
@ 2018-05-16 6:42 ` Yoshinori Sato
0 siblings, 0 replies; 138+ messages in thread
From: Yoshinori Sato @ 2018-05-16 6:42 UTC (permalink / raw)
To: Rich Felker
Cc: John Paul Adrian Glaubitz, Rob Landley, linux-sh, linux-kernel
On Tue, 15 May 2018 10:41:52 +0900,
Rich Felker wrote:
>
> On Mon, May 07, 2018 at 10:40:34AM +0900, Yoshinori Sato wrote:
> > On Thu, 03 May 2018 19:07:38 +0900,
> > John Paul Adrian Glaubitz wrote:
> > >
> > > [1 <text/plain; utf-8 (7bit)>]
> > > Hi Rich!
> > >
> > > On 05/03/2018 04:33 AM, Rich Felker wrote:
> > > > I found the U-Boot stuff here:
> > > >
> > > > https://ja.osdn.net/users/ysato/pf/uboot/wiki/FrontPage
> > > >
> > > > but I'm not sure how to install it yet. Will try to figure it out.
> > >
> > > Interesting. It seems the HDL-160U uses u-boot instead of lilo which
> > > is used on my USL-5P. Both are based on the LANDISK platform though.
> > > I wonder whether it is possible to convert the USL-5P to use u-boot
> > > instead of the very limited lilo.
> > >
> > > As for the kernel configuration, for USL-5P, I had to use the kernel
> > > configuration attached to this mail. One important configuration setting
> > > is CONFIG_SH_PCLK_FREQ which has to be set to "33250000" otherwise
> > > the kernel won't boot properly.
> > >
> > > I still have my USL-5P ready to be set up for testing a new kernel
> > > image with the device tree patches merged. Although I still don't
> > > know how to enable the internal (pseudo) IDE controller.
> > >
> > > @Yoshinori:
> > >
> > > Did the HDL-160U LANDISK device you have use u-boot by default or
> > > did you convert it from lilo?
> >
> > Yes.
> > Replace sh-lilo's second stage with u-boot.
> > With this method it is unnecessary to rewrite Flash for boot.
>
> Can you give me a brief explanation of how to reproduce the bootloader
> installation? For now I'm just using the existing MBR/partitioning you
> sent me, and replacing zImage.itb in /boot makes it attempt to load a
> new kernel, but I haven't gotten any output yet to know if it's
> working.
landisk's u-boot using spl.
You should be able to update it by the following procedure.
1. Rebuild u-boot.
2. Format ext4 for HDD first partition.
3. put u-boot.img to HDD first partition.
4. put spl/u-boot-spl.bin to HDD MBR and subsequent region.
> Probably the most important thing I'm missing right now is what the
> its file for generating the zImage.itb should look like. I tried
> making one myself but it may be wrong. I'm also unsure whether I
> should use a zImage or vmlinux file as input, and if using a zImage
> file, what load address I should choose.
>
> For now I'm using the upstream landisk board support (maybe not
> working, we'll see). Once I can confirm I'm getting some output and
> the kernel seems minimally functional, I'm going to switch to DT, but
> integrating the DT stuff with u-boot isn't important right away since
> I can start with a linked-in DT.
>
> At some point I'd also like to know how to reinstall u-boot on the MBR
> or whatever.
>
> Rich
--
Yosinori Sato
^ permalink raw reply [flat|nested] 138+ messages in thread
* Re: [J-core] [PATCH v5 00/22] sh: LANDISK and R2Dplus convert to device tree
2018-05-16 6:42 ` Yoshinori Sato
@ 2018-05-18 7:51 ` John Paul Adrian Glaubitz
-1 siblings, 0 replies; 138+ messages in thread
From: John Paul Adrian Glaubitz @ 2018-05-18 7:51 UTC (permalink / raw)
To: Yoshinori Sato, Rich Felker; +Cc: Rob Landley, linux-sh, linux-kernel
On 05/16/2018 08:42 AM, Yoshinori Sato wrote:
>> Can you give me a brief explanation of how to reproduce the bootloader
>> installation? For now I'm just using the existing MBR/partitioning you
>> sent me, and replacing zImage.itb in /boot makes it attempt to load a
>> new kernel, but I haven't gotten any output yet to know if it's
>> working.
>
> landisk's u-boot using spl.
> You should be able to update it by the following procedure.
> 1. Rebuild u-boot.
> 2. Format ext4 for HDD first partition.
> 3. put u-boot.img to HDD first partition.
> 4. put spl/u-boot-spl.bin to HDD MBR and subsequent region.
I will try to set up uboot this way on my USL-5P over the weekend.
Thanks for these instructions.
Adrian
--
.''`. John Paul Adrian Glaubitz
: :' : Debian Developer - glaubitz@debian.org
`. `' Freie Universitaet Berlin - glaubitz@physik.fu-berlin.de
`- GPG: 62FF 8A75 84E0 2956 9546 0006 7426 3B37 F5B5 F913
^ permalink raw reply [flat|nested] 138+ messages in thread
* Re: [J-core] [PATCH v5 00/22] sh: LANDISK and R2Dplus convert to device tree
@ 2018-05-18 7:51 ` John Paul Adrian Glaubitz
0 siblings, 0 replies; 138+ messages in thread
From: John Paul Adrian Glaubitz @ 2018-05-18 7:51 UTC (permalink / raw)
To: Yoshinori Sato, Rich Felker; +Cc: Rob Landley, linux-sh, linux-kernel
On 05/16/2018 08:42 AM, Yoshinori Sato wrote:
>> Can you give me a brief explanation of how to reproduce the bootloader
>> installation? For now I'm just using the existing MBR/partitioning you
>> sent me, and replacing zImage.itb in /boot makes it attempt to load a
>> new kernel, but I haven't gotten any output yet to know if it's
>> working.
>
> landisk's u-boot using spl.
> You should be able to update it by the following procedure.
> 1. Rebuild u-boot.
> 2. Format ext4 for HDD first partition.
> 3. put u-boot.img to HDD first partition.
> 4. put spl/u-boot-spl.bin to HDD MBR and subsequent region.
I will try to set up uboot this way on my USL-5P over the weekend.
Thanks for these instructions.
Adrian
--
.''`. John Paul Adrian Glaubitz
: :' : Debian Developer - glaubitz@debian.org
`. `' Freie Universitaet Berlin - glaubitz@physik.fu-berlin.de
`- GPG: 62FF 8A75 84E0 2956 9546 0006 7426 3B37 F5B5 F913
^ permalink raw reply [flat|nested] 138+ messages in thread