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From: Simon Horman <horms@verge.net.au>
To: Geert Uytterhoeven <geert@linux-m68k.org>
Cc: Gilad Ben-Yossef <gilad@benyossef.com>,
	Magnus Damm <magnus.damm@gmail.com>,
	Rob Herring <robh+dt@kernel.org>,
	Mark Rutland <mark.rutland@arm.com>,
	Catalin Marinas <catalin.marinas@arm.com>,
	Will Deacon <will.deacon@arm.com>,
	Geert Uytterhoeven <geert+renesas@glider.be>,
	Michael Turquette <mturquette@baylibre.com>,
	Stephen Boyd <sboyd@kernel.org>,
	Herbert Xu <herbert@gondor.apana.org.au>,
	"David S. Miller" <davem@davemloft.net>,
	Ofir Drang <ofir.drang@arm.com>,
	Linux-Renesas <linux-renesas-soc@vger.kernel.org>,
	"open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS"
	<devicetree@vger.kernel.org>,
	Linux ARM <linux-arm-kernel@lists.infradead.org>,
	Linux Kernel Mailing List <linux-kernel@vger.kernel.org>,
	linux-clk <linux-clk@vger.kernel.org>,
Subject: Re: [PATCH 3/3] arm64: dts: renesas: r8a7795: add ccree binding
Date: Wed, 16 May 2018 09:43:34 +0200	[thread overview]
Message-ID: <20180516074333.i2672u435ymwffk3@verge.net.au> (raw)
In-Reply-To: <CAMuHMdWzeNqsho1V6ezZb81T3_HcRzrtuQpmGXsjtFgt9BtZDQ@mail.gmail.com>

On Tue, May 15, 2018 at 04:50:44PM +0200, Geert Uytterhoeven wrote:
> Hi Gilad,
> 
> On Tue, May 15, 2018 at 2:29 PM, Gilad Ben-Yossef <gilad@benyossef.com> wrote:
> > Add bindings for CryptoCell instance in the SoC.
> >
> > Signed-off-by: Gilad Ben-Yossef <gilad@benyossef.com>
> 
> Thanks for your patch!
> 
> > --- a/arch/arm64/boot/dts/renesas/r8a7795.dtsi
> > +++ b/arch/arm64/boot/dts/renesas/r8a7795.dtsi
> > @@ -528,6 +528,14 @@
> >                         status = "disabled";
> >                 };
> >
> > +               arm_cc630p: crypto@e6601000 {
> > +                       compatible = "arm,cryptocell-630p-ree";
> > +                       interrupts = <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>;
> > +                       #interrupt-cells = <2>;
> 
> I believe the #interrupt-cells property is not needed.
> 
> > +                       reg = <0x0 0xe6601000 0 0x1000>;
> > +                       clocks = <&cpg CPG_MOD 229>;
> > +               };
> 
> The rest looks good, but I cannot verify the register block.
> 
> > +
> >                 i2c3: i2c@e66d0000 {
> >                         #address-cells = <1>;
> >                         #size-cells = <0>;

Thanks, I have applied this after dropping the #interrupt-cells property.

WARNING: multiple messages have this Message-ID (diff)
From: Simon Horman <horms@verge.net.au>
To: Geert Uytterhoeven <geert@linux-m68k.org>
Cc: Gilad Ben-Yossef <gilad@benyossef.com>,
	Magnus Damm <magnus.damm@gmail.com>,
	Rob Herring <robh+dt@kernel.org>,
	Mark Rutland <mark.rutland@arm.com>,
	Catalin Marinas <catalin.marinas@arm.com>,
	Will Deacon <will.deacon@arm.com>,
	Geert Uytterhoeven <geert+renesas@glider.be>,
	Michael Turquette <mturquette@baylibre.com>,
	Stephen Boyd <sboyd@kernel.org>,
	Herbert Xu <herbert@gondor.apana.org.au>,
	"David S. Miller" <davem@davemloft.net>,
	Ofir Drang <ofir.drang@arm.com>,
	Linux-Renesas <linux-renesas-soc@vger.kernel.org>,
	"open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS"
	<devicetree@vger.kernel.org>,
	Linux ARM <linux-arm-kernel@lists.infradead.org>,
	Linux Kernel Mailing List <linux-kernel@vger.kernel.org>,
	linux-clk <linux-clk@vger.kernel.org>,
	Linux Crypto Mailing List <linux-crypto@vger.kernel.org>
Subject: Re: [PATCH 3/3] arm64: dts: renesas: r8a7795: add ccree binding
Date: Wed, 16 May 2018 09:43:34 +0200	[thread overview]
Message-ID: <20180516074333.i2672u435ymwffk3@verge.net.au> (raw)
In-Reply-To: <CAMuHMdWzeNqsho1V6ezZb81T3_HcRzrtuQpmGXsjtFgt9BtZDQ@mail.gmail.com>

On Tue, May 15, 2018 at 04:50:44PM +0200, Geert Uytterhoeven wrote:
> Hi Gilad,
> 
> On Tue, May 15, 2018 at 2:29 PM, Gilad Ben-Yossef <gilad@benyossef.com> wrote:
> > Add bindings for CryptoCell instance in the SoC.
> >
> > Signed-off-by: Gilad Ben-Yossef <gilad@benyossef.com>
> 
> Thanks for your patch!
> 
> > --- a/arch/arm64/boot/dts/renesas/r8a7795.dtsi
> > +++ b/arch/arm64/boot/dts/renesas/r8a7795.dtsi
> > @@ -528,6 +528,14 @@
> >                         status = "disabled";
> >                 };
> >
> > +               arm_cc630p: crypto@e6601000 {
> > +                       compatible = "arm,cryptocell-630p-ree";
> > +                       interrupts = <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>;
> > +                       #interrupt-cells = <2>;
> 
> I believe the #interrupt-cells property is not needed.
> 
> > +                       reg = <0x0 0xe6601000 0 0x1000>;
> > +                       clocks = <&cpg CPG_MOD 229>;
> > +               };
> 
> The rest looks good, but I cannot verify the register block.
> 
> > +
> >                 i2c3: i2c@e66d0000 {
> >                         #address-cells = <1>;
> >                         #size-cells = <0>;

Thanks, I have applied this after dropping the #interrupt-cells property.

WARNING: multiple messages have this Message-ID (diff)
From: Simon Horman <horms@verge.net.au>
To: Geert Uytterhoeven <geert@linux-m68k.org>
Cc: Gilad Ben-Yossef <gilad@benyossef.com>,
	Magnus Damm <magnus.damm@gmail.com>,
	Rob Herring <robh+dt@kernel.org>,
	Mark Rutland <mark.rutland@arm.com>,
	Catalin Marinas <catalin.marinas@arm.com>,
	Will Deacon <will.deacon@arm.com>,
	Geert Uytterhoeven <geert+renesas@glider.be>,
	Michael Turquette <mturquette@baylibre.com>,
	Stephen Boyd <sboyd@kernel.org>,
	Herbert Xu <herbert@gondor.apana.org.au>,
	"David S. Miller" <davem@davemloft.net>,
	Ofir Drang <ofir.drang@arm.com>,
	Linux-Renesas <linux-renesas-soc@vger.kernel.org>,
	"open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS"
	<devicetree@vger.kernel.org>,
	Linux ARM <linux-arm-kernel@lists.infradead.org>,
	Linux Kernel Mailing List <linux-kernel@vger.kernel.org>,
	linux-clk <linux-clk@vger.kernel.org>
Subject: Re: [PATCH 3/3] arm64: dts: renesas: r8a7795: add ccree binding
Date: Wed, 16 May 2018 09:43:34 +0200	[thread overview]
Message-ID: <20180516074333.i2672u435ymwffk3@verge.net.au> (raw)
In-Reply-To: <CAMuHMdWzeNqsho1V6ezZb81T3_HcRzrtuQpmGXsjtFgt9BtZDQ@mail.gmail.com>

On Tue, May 15, 2018 at 04:50:44PM +0200, Geert Uytterhoeven wrote:
> Hi Gilad,
> 
> On Tue, May 15, 2018 at 2:29 PM, Gilad Ben-Yossef <gilad@benyossef.com> wrote:
> > Add bindings for CryptoCell instance in the SoC.
> >
> > Signed-off-by: Gilad Ben-Yossef <gilad@benyossef.com>
> 
> Thanks for your patch!
> 
> > --- a/arch/arm64/boot/dts/renesas/r8a7795.dtsi
> > +++ b/arch/arm64/boot/dts/renesas/r8a7795.dtsi
> > @@ -528,6 +528,14 @@
> >                         status = "disabled";
> >                 };
> >
> > +               arm_cc630p: crypto@e6601000 {
> > +                       compatible = "arm,cryptocell-630p-ree";
> > +                       interrupts = <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>;
> > +                       #interrupt-cells = <2>;
> 
> I believe the #interrupt-cells property is not needed.
> 
> > +                       reg = <0x0 0xe6601000 0 0x1000>;
> > +                       clocks = <&cpg CPG_MOD 229>;
> > +               };
> 
> The rest looks good, but I cannot verify the register block.
> 
> > +
> >                 i2c3: i2c@e66d0000 {
> >                         #address-cells = <1>;
> >                         #size-cells = <0>;

Thanks, I have applied this after dropping the #interrupt-cells property.

WARNING: multiple messages have this Message-ID (diff)
From: horms@verge.net.au (Simon Horman)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH 3/3] arm64: dts: renesas: r8a7795: add ccree binding
Date: Wed, 16 May 2018 09:43:34 +0200	[thread overview]
Message-ID: <20180516074333.i2672u435ymwffk3@verge.net.au> (raw)
In-Reply-To: <CAMuHMdWzeNqsho1V6ezZb81T3_HcRzrtuQpmGXsjtFgt9BtZDQ@mail.gmail.com>

On Tue, May 15, 2018 at 04:50:44PM +0200, Geert Uytterhoeven wrote:
> Hi Gilad,
> 
> On Tue, May 15, 2018 at 2:29 PM, Gilad Ben-Yossef <gilad@benyossef.com> wrote:
> > Add bindings for CryptoCell instance in the SoC.
> >
> > Signed-off-by: Gilad Ben-Yossef <gilad@benyossef.com>
> 
> Thanks for your patch!
> 
> > --- a/arch/arm64/boot/dts/renesas/r8a7795.dtsi
> > +++ b/arch/arm64/boot/dts/renesas/r8a7795.dtsi
> > @@ -528,6 +528,14 @@
> >                         status = "disabled";
> >                 };
> >
> > +               arm_cc630p: crypto at e6601000 {
> > +                       compatible = "arm,cryptocell-630p-ree";
> > +                       interrupts = <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>;
> > +                       #interrupt-cells = <2>;
> 
> I believe the #interrupt-cells property is not needed.
> 
> > +                       reg = <0x0 0xe6601000 0 0x1000>;
> > +                       clocks = <&cpg CPG_MOD 229>;
> > +               };
> 
> The rest looks good, but I cannot verify the register block.
> 
> > +
> >                 i2c3: i2c at e66d0000 {
> >                         #address-cells = <1>;
> >                         #size-cells = <0>;

Thanks, I have applied this after dropping the #interrupt-cells property.

  reply	other threads:[~2018-05-16  7:43 UTC|newest]

Thread overview: 86+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-05-15 12:29 [PATCH 0/3] enable ccree on Renesas R-Car platform Gilad Ben-Yossef
2018-05-15 12:29 ` Gilad Ben-Yossef
2018-05-15 12:29 ` [PATCH 1/3] crypto: ccree: drop signature register check Gilad Ben-Yossef
2018-05-15 12:29   ` Gilad Ben-Yossef
2018-05-17 12:54   ` Gilad Ben-Yossef
2018-05-17 12:54     ` Gilad Ben-Yossef
2018-05-15 12:29 ` [PATCH 2/3] clk: renesas: r8a7795: Add ccree clock Gilad Ben-Yossef
2018-05-15 12:29   ` Gilad Ben-Yossef
2018-05-15 14:47   ` Geert Uytterhoeven
2018-05-15 14:47     ` Geert Uytterhoeven
2018-05-15 14:47     ` Geert Uytterhoeven
2018-05-15 14:47     ` Geert Uytterhoeven
2018-05-17  8:00     ` Gilad Ben-Yossef
2018-05-17  8:00       ` Gilad Ben-Yossef
2018-05-17  8:00       ` Gilad Ben-Yossef
2018-05-17  8:00       ` Gilad Ben-Yossef
2018-05-17  8:41       ` Geert Uytterhoeven
2018-05-17  8:41         ` Geert Uytterhoeven
2018-05-17  8:41         ` Geert Uytterhoeven
2018-05-17  8:41         ` Geert Uytterhoeven
2018-05-15 12:29 ` [PATCH 3/3] arm64: dts: renesas: r8a7795: add ccree binding Gilad Ben-Yossef
2018-05-15 12:29   ` Gilad Ben-Yossef
2018-05-15 14:50   ` Geert Uytterhoeven
2018-05-15 14:50     ` Geert Uytterhoeven
2018-05-15 14:50     ` Geert Uytterhoeven
2018-05-15 14:50     ` Geert Uytterhoeven
2018-05-16  7:43     ` Simon Horman [this message]
2018-05-16  7:43       ` Simon Horman
2018-05-16  7:43       ` Simon Horman
2018-05-16  7:43       ` Simon Horman
2018-05-17  8:01       ` Gilad Ben-Yossef
2018-05-17  8:01         ` Gilad Ben-Yossef
2018-05-17  8:01         ` Gilad Ben-Yossef
2018-05-17  8:01         ` Gilad Ben-Yossef
2018-05-17  9:04         ` Simon Horman
2018-05-17  9:04           ` Simon Horman
2018-05-17  9:04           ` Simon Horman
2018-05-17  9:04           ` Simon Horman
2018-05-17 13:12           ` Gilad Ben-Yossef
2018-05-17 13:12             ` Gilad Ben-Yossef
2018-05-17 13:12             ` Gilad Ben-Yossef
2018-05-17 13:12             ` Gilad Ben-Yossef
2018-05-18  9:50             ` Simon Horman
2018-05-18  9:50               ` Simon Horman
2018-05-18  9:50               ` Simon Horman
2018-05-18  9:50               ` Simon Horman
2018-05-17 10:16         ` Geert Uytterhoeven
2018-05-17 10:16           ` Geert Uytterhoeven
2018-05-17 10:16           ` Geert Uytterhoeven
2018-05-17 10:16           ` Geert Uytterhoeven
2018-05-17 13:09           ` Gilad Ben-Yossef
2018-05-17 13:09             ` Gilad Ben-Yossef
2018-05-17 13:09             ` Gilad Ben-Yossef
2018-05-17 13:09             ` Gilad Ben-Yossef
2018-05-17 13:35             ` Geert Uytterhoeven
2018-05-17 13:35               ` Geert Uytterhoeven
2018-05-17 13:35               ` Geert Uytterhoeven
2018-05-17 13:35               ` Geert Uytterhoeven
2018-05-17 13:41               ` Gilad Ben-Yossef
2018-05-17 13:41                 ` Gilad Ben-Yossef
2018-05-17 13:41                 ` Gilad Ben-Yossef
2018-05-17 13:41                 ` Gilad Ben-Yossef
2018-05-17 13:49                 ` Geert Uytterhoeven
2018-05-17 13:49                   ` Geert Uytterhoeven
2018-05-17 13:49                   ` Geert Uytterhoeven
2018-05-17 13:49                   ` Geert Uytterhoeven
2018-05-17 13:17           ` Geert Uytterhoeven
2018-05-17 13:17             ` Geert Uytterhoeven
2018-05-17 13:17             ` Geert Uytterhoeven
2018-05-17 13:17             ` Geert Uytterhoeven
2018-05-21 13:43           ` Gilad Ben-Yossef
2018-05-21 13:43             ` Gilad Ben-Yossef
2018-05-21 13:43             ` Gilad Ben-Yossef
2018-05-21 13:43             ` Gilad Ben-Yossef
2018-05-22  7:48             ` Geert Uytterhoeven
2018-05-22  7:48               ` Geert Uytterhoeven
2018-05-22  7:48               ` Geert Uytterhoeven
2018-05-22  7:48               ` Geert Uytterhoeven
2018-05-24 13:20               ` Gilad Ben-Yossef
2018-05-24 13:20                 ` Gilad Ben-Yossef
2018-05-24 13:20                 ` Gilad Ben-Yossef
2018-05-24 13:20                 ` Gilad Ben-Yossef
2018-05-24 13:44                 ` Geert Uytterhoeven
2018-05-24 13:44                   ` Geert Uytterhoeven
2018-05-24 13:44                   ` Geert Uytterhoeven
2018-05-24 13:44                   ` Geert Uytterhoeven

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