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From: Chris Wilson <chris@chris-wilson.co.uk>
To: intel-gfx@lists.freedesktop.org
Subject: [PATCH 14/20] drm/i915/gtt: Lazily allocate page directories for gen7
Date: Thu,  7 Jun 2018 10:58:09 +0100	[thread overview]
Message-ID: <20180607095815.10938-15-chris@chris-wilson.co.uk> (raw)
In-Reply-To: <20180607095815.10938-1-chris@chris-wilson.co.uk>

As we were only supporting aliasing_ppgtt on gen7 for some time, we
saved a few checks by preallocating the page directories on creation.
However, since we need 2MiB of page directories for each ppgtt, to
support arbitrary numbers of user contexts, we need to be more prudent
in our allocations, and defer the page allocation until it is used. We
don't recover unused pages yet as we found that doing so on the fly
(i.e. altering TLB entries) would confuse the GPU.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
Cc: Mika Kuoppala <mika.kuoppala@linux.intel.com>
Cc: Matthew Auld <matthew.william.auld@gmail.com>
Reviewed-by: Matthew Auld <matthew.william.auld@gmail.com>
---
 drivers/gpu/drm/i915/i915_gem_gtt.c | 67 +++++++++++------------------
 1 file changed, 26 insertions(+), 41 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c b/drivers/gpu/drm/i915/i915_gem_gtt.c
index a69cd1b5f8f2..660596ebd3c1 100644
--- a/drivers/gpu/drm/i915/i915_gem_gtt.c
+++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
@@ -190,11 +190,19 @@ int intel_sanitize_enable_ppgtt(struct drm_i915_private *dev_priv,
 	return 1;
 }
 
-static int gen6_ppgtt_bind_vma(struct i915_vma *vma,
-			       enum i915_cache_level cache_level,
-			       u32 unused)
+static int ppgtt_bind_vma(struct i915_vma *vma,
+			  enum i915_cache_level cache_level,
+			  u32 unused)
 {
 	u32 pte_flags;
+	int err;
+
+	if (!(vma->flags & I915_VMA_LOCAL_BIND)) {
+		err = vma->vm->allocate_va_range(vma->vm,
+						 vma->node.start, vma->size);
+		if (err)
+			return err;
+	}
 
 	/* Currently applicable only to VLV */
 	pte_flags = 0;
@@ -206,22 +214,6 @@ static int gen6_ppgtt_bind_vma(struct i915_vma *vma,
 	return 0;
 }
 
-static int gen8_ppgtt_bind_vma(struct i915_vma *vma,
-			       enum i915_cache_level cache_level,
-			       u32 unused)
-{
-	int ret;
-
-	if (!(vma->flags & I915_VMA_LOCAL_BIND)) {
-		ret = vma->vm->allocate_va_range(vma->vm,
-						 vma->node.start, vma->size);
-		if (ret)
-			return ret;
-	}
-
-	return gen6_ppgtt_bind_vma(vma, cache_level, unused);
-}
-
 static void ppgtt_unbind_vma(struct i915_vma *vma)
 {
 	vma->vm->clear_range(vma->vm, vma->node.start, vma->size);
@@ -1622,7 +1614,7 @@ static struct i915_hw_ppgtt *gen8_ppgtt_create(struct drm_i915_private *i915)
 	ppgtt->vm.cleanup = gen8_ppgtt_cleanup;
 	ppgtt->debug_dump = gen8_dump_ppgtt;
 
-	ppgtt->vm.vma_ops.bind_vma    = gen8_ppgtt_bind_vma;
+	ppgtt->vm.vma_ops.bind_vma    = ppgtt_bind_vma;
 	ppgtt->vm.vma_ops.unbind_vma  = ppgtt_unbind_vma;
 	ppgtt->vm.vma_ops.set_pages   = ppgtt_set_pages;
 	ppgtt->vm.vma_ops.clear_pages = clear_pages;
@@ -1837,7 +1829,8 @@ static void gen6_ppgtt_clear_range(struct i915_address_space *vm,
 
 		num_entries -= end - pte;
 
-		/* Note that the hw doesn't support removing PDE on the fly
+		/*
+		 * Note that the hw doesn't support removing PDE on the fly
 		 * (they are cached inside the context with no means to
 		 * invalidate the cache), so we can only reset the PTE
 		 * entries back to scratch.
@@ -2113,12 +2106,13 @@ static struct i915_hw_ppgtt *gen6_ppgtt_create(struct drm_i915_private *i915)
 
 	ppgtt->base.vm.total = I915_PDES * GEN6_PTES * PAGE_SIZE;
 
+	ppgtt->base.vm.allocate_va_range = gen6_alloc_va_range;
 	ppgtt->base.vm.clear_range = gen6_ppgtt_clear_range;
 	ppgtt->base.vm.insert_entries = gen6_ppgtt_insert_entries;
 	ppgtt->base.vm.cleanup = gen6_ppgtt_cleanup;
 	ppgtt->base.debug_dump = gen6_dump_ppgtt;
 
-	ppgtt->base.vm.vma_ops.bind_vma    = gen6_ppgtt_bind_vma;
+	ppgtt->base.vm.vma_ops.bind_vma    = ppgtt_bind_vma;
 	ppgtt->base.vm.vma_ops.unbind_vma  = ppgtt_unbind_vma;
 	ppgtt->base.vm.vma_ops.set_pages   = ppgtt_set_pages;
 	ppgtt->base.vm.vma_ops.clear_pages = clear_pages;
@@ -2143,14 +2137,8 @@ static struct i915_hw_ppgtt *gen6_ppgtt_create(struct drm_i915_private *i915)
 		goto err_scratch;
 	}
 
-	err = gen6_alloc_va_range(&ppgtt->base.vm, 0, ppgtt->base.vm.total);
-	if (err)
-		goto err_vma;
-
 	return &ppgtt->base;
 
-err_vma:
-	i915_vma_destroy(ppgtt->vma);
 err_scratch:
 	gen6_ppgtt_free_scratch(&ppgtt->base.vm);
 err_free:
@@ -2746,8 +2734,7 @@ static int aliasing_gtt_bind_vma(struct i915_vma *vma,
 	if (flags & I915_VMA_LOCAL_BIND) {
 		struct i915_hw_ppgtt *appgtt = i915->mm.aliasing_ppgtt;
 
-		if (!(vma->flags & I915_VMA_LOCAL_BIND) &&
-		    appgtt->vm.allocate_va_range) {
+		if (!(vma->flags & I915_VMA_LOCAL_BIND)) {
 			ret = appgtt->vm.allocate_va_range(&appgtt->vm,
 							   vma->node.start,
 							   vma->size);
@@ -2851,17 +2838,15 @@ int i915_gem_init_aliasing_ppgtt(struct drm_i915_private *i915)
 		goto err_ppgtt;
 	}
 
-	if (ppgtt->vm.allocate_va_range) {
-		/* Note we only pre-allocate as far as the end of the global
-		 * GTT. On 48b / 4-level page-tables, the difference is very,
-		 * very significant! We have to preallocate as GVT/vgpu does
-		 * not like the page directory disappearing.
-		 */
-		err = ppgtt->vm.allocate_va_range(&ppgtt->vm,
-						  0, ggtt->vm.total);
-		if (err)
-			goto err_ppgtt;
-	}
+	/*
+	 * Note we only pre-allocate as far as the end of the global
+	 * GTT. On 48b / 4-level page-tables, the difference is very,
+	 * very significant! We have to preallocate as GVT/vgpu does
+	 * not like the page directory disappearing.
+	 */
+	err = ppgtt->vm.allocate_va_range(&ppgtt->vm, 0, ggtt->vm.total);
+	if (err)
+		goto err_ppgtt;
 
 	i915->mm.aliasing_ppgtt = ppgtt;
 
-- 
2.17.1

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  parent reply	other threads:[~2018-06-07  9:59 UTC|newest]

Thread overview: 28+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-06-07  9:57 Guess what? HSW full-ppgtt. Almost Chris Wilson
2018-06-07  9:57 ` [PATCH 01/20] drm/i915: Apply batch location restrictions before pinning Chris Wilson
2018-06-07  9:57 ` [PATCH 02/20] drm/i915/ringbuffer: Make order of mmio to CCID/PP_DIR consistent with switch_context() Chris Wilson
2018-06-07  9:57 ` [PATCH 03/20] drm/i915/ringbuffer: Brute force context restore Chris Wilson
2018-06-07  9:57 ` [PATCH 04/20] drm/i915/ringbuffer: Force restore of mm after failed context switch Chris Wilson
2018-06-07  9:58 ` [PATCH 05/20] drm/i915/gtt: Invalidate GGTT caches after writing the gen6 page directories Chris Wilson
2018-06-07  9:58 ` [PATCH 06/20] drm/i915: Prepare for non-object vma Chris Wilson
2018-06-07  9:58 ` [PATCH 07/20] drm/i915: Decouple vma vfuncs from vm Chris Wilson
2018-06-07  9:58 ` [PATCH 08/20] drm/i915/gtt: Push allocation to hw ppgtt constructor Chris Wilson
2018-06-07  9:58 ` [PATCH 09/20] drm/i915/gtt: Subclass gen6_hw_ppgtt Chris Wilson
2018-06-07  9:58 ` [PATCH 10/20] drm/i915/gtt Onionify error handling for gen6_ppgtt_create Chris Wilson
2018-06-07 10:17   ` Matthew Auld
2018-06-07 10:21     ` Chris Wilson
2018-06-07  9:58 ` [PATCH 11/20] drm/i915/gtt: Reorder aliasing_ppgtt fini Chris Wilson
2018-06-07  9:58 ` [PATCH 12/20] drm/i915/gtt: Make gen6 page directories evictable Chris Wilson
2018-06-07  9:58 ` [PATCH 13/20] drm/i915/gtt: Only keep gen6 page directories pinned while active Chris Wilson
2018-06-07  9:58 ` Chris Wilson [this message]
2018-06-07  9:58 ` [PATCH 15/20] drm/i915/gtt: Free unused page tables on unbind the context Chris Wilson
2018-06-07  9:58 ` [PATCH 16/20] drm/i915/gtt: Skip initializing PT with scratch if full Chris Wilson
2018-06-07  9:58 ` [PATCH 17/20] drm/i915/gtt: Cache the PTE encoding of the scratch page Chris Wilson
2018-06-07  9:58 ` [PATCH 18/20] drm/i915/gtt: Reduce a pair of runtime asserts Chris Wilson
2018-06-07  9:58 ` [PATCH 19/20] drm/i915/gtt: Skip clearing the GGTT under gen6+ full-ppgtt Chris Wilson
2018-06-07  9:58 ` [PATCH 20/20] RFT drm/i915/gtt: Enable full-ppgtt by default everywhere Chris Wilson
2018-06-07 10:13 ` ✗ Fi.CI.CHECKPATCH: warning for series starting with [01/20] drm/i915: Apply batch location restrictions before pinning Patchwork
2018-06-07 10:18 ` ✗ Fi.CI.SPARSE: " Patchwork
2018-06-07 10:29 ` ✓ Fi.CI.BAT: success " Patchwork
2018-06-07 14:12 ` ✗ Fi.CI.IGT: failure " Patchwork
2018-06-07 14:18   ` Chris Wilson

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