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From: Dave Martin <Dave.Martin@arm.com>
To: Marc Zyngier <marc.zyngier@arm.com>
Cc: Suzuki K Poulose <suzuki.poulose@arm.com>,
	cdall@kernel.org, kvm@vger.kernel.org, catalin.marinas@arm.com,
	punit.agrawal@arm.com, Will Deacon <will.deacon@arm.com>,
	linux-kernel@vger.kernel.org, qemu-devel@nongnu.org,
	Paolo Bonzini <pbonzini@redhat.com>,
	kvmarm@lists.cs.columbia.edu,
	linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH v3 15/20] kvm: arm/arm64: Allow tuning the physical address size for VM
Date: Mon, 9 Jul 2018 14:37:50 +0100	[thread overview]
Message-ID: <20180709133750.GE9486@e103592.cambridge.arm.com> (raw)
In-Reply-To: <17f8d585-3489-ab6f-6ee1-4d8d337dcf9c@arm.com>

On Mon, Jul 09, 2018 at 01:29:42PM +0100, Marc Zyngier wrote:
> On 09/07/18 12:23, Dave Martin wrote:
> > On Fri, Jul 06, 2018 at 05:39:00PM +0100, Suzuki K Poulose wrote:
> >> On 07/06/2018 04:09 PM, Marc Zyngier wrote:
> >>> On 06/07/18 14:49, Suzuki K Poulose wrote:
> >>>> On 04/07/18 23:03, Suzuki K Poulose wrote:
> >>>>> On 07/04/2018 04:51 PM, Will Deacon wrote:
> >>>>>> Hi Suzuki,
> >>>>>>
> >>>>>> On Fri, Jun 29, 2018 at 12:15:35PM +0100, Suzuki K Poulose wrote:
> >>>>>>> Allow specifying the physical address size for a new VM via
> >>>>>>> the kvm_type argument for KVM_CREATE_VM ioctl. This allows
> >>>>>>> us to finalise the stage2 page table format as early as possible
> >>>>>>> and hence perform the right checks on the memory slots without
> >>>>>>> complication. The size is encoded as Log2(PA_Size) in the bits[7:0]
> >>>>>>> of the type field and can encode more information in the future if
> >>>>>>> required. The IPA size is still capped at 40bits.
> >>>>>>>
> >>>>>>> Cc: Marc Zyngier <marc.zyngier@arm.com>
> >>>>>>> Cc: Christoffer Dall <cdall@kernel.org>
> >>>>>>> Cc: Peter Maydel <peter.maydell@linaro.org>
> >>>>>>> Cc: Paolo Bonzini <pbonzini@redhat.com>
> >>>>>>> Cc: Radim Krčmář <rkrcmar@redhat.com>
> >>>>>>> Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com>
> >>>>>>> ---
> >>>>>>>   arch/arm/include/asm/kvm_mmu.h   |  2 ++
> >>>>>>>   arch/arm64/include/asm/kvm_arm.h | 10 +++-------
> >>>>>>>   arch/arm64/include/asm/kvm_mmu.h |  2 ++
> >>>>>>>   include/uapi/linux/kvm.h         | 10 ++++++++++
> >>>>>>>   virt/kvm/arm/arm.c               | 24 ++++++++++++++++++++++--
> >>>>>>>   5 files changed, 39 insertions(+), 9 deletions(-)
> >>>>>>
> >>>>>> [...]
> >>>>>>
> >>>>>>> diff --git a/include/uapi/linux/kvm.h b/include/uapi/linux/kvm.h
> >>>>>>> index 4df9bb6..fa4cab0 100644
> >>>>>>> --- a/include/uapi/linux/kvm.h
> >>>>>>> +++ b/include/uapi/linux/kvm.h
> >>>>>>> @@ -751,6 +751,16 @@ struct kvm_ppc_resize_hpt {
> >>>>>>>   #define KVM_S390_SIE_PAGE_OFFSET 1
> >>>>>>>   /*
> >>>>>>> + * On arm/arm64, machine type can be used to request the physical
> >>>>>>> + * address size for the VM. Bits [7-0] have been reserved for the
> >>>>>>> + * PA size shift (i.e, log2(PA_Size)). For backward compatibility,
> >>>>>>> + * value 0 implies the default IPA size, which is 40bits.
> >>>>>>> + */
> >>>>>>> +#define KVM_VM_TYPE_ARM_PHYS_SHIFT_MASK    0xff
> >>>>>>> +#define KVM_VM_TYPE_ARM_PHYS_SHIFT(x)        \
> >>>>>>> +    ((x) & KVM_VM_TYPE_ARM_PHYS_SHIFT_MASK)
> >>>>>>
> >>>>>> This seems like you're allocating quite a lot of bits in a non-extensible
> >>>>>> interface to a fairly esoteric parameter. Would it be better to add another
> >>>>>> ioctl, or condense the number of sizes you support instead?
> >>>>>
> >>>>> As I explained in the other thread, we need the size as soon as the VM
> >>>>> is created. The major challenge is keeping the backward compatibility by
> >>>>> mapping 0 to 40bits. I will give it a thought.
> >>>>
> >>>> Here is one option. We could re-use the {V}TCR_ELx.{I}PS field format, which
> >>>> occupies 3 bits and has the following definitions. (ID_AA64MMFR0_EL1:PARange
> >>>> also has the field definitions, except that the field is 4bits wide, but
> >>>> only 3bits are used)
> >>>>
> >>>> 000 32 bits, 4GB.
> >>>> 001 36 bits, 64GB.
> >>>> 010 40 bits, 1TB.
> >>>> 011 42 bits, 4TB.
> >>>> 100 44 bits, 16TB.
> >>>> 101 48 bits, 256TB.
> >>>> 110 52 bits, 4PB
> >>>>
> >>>> But we need to map 0 => 40bits IPA to make our ABI backward compatible. So
> >>>> we could use the additional one bit to indicate that IPA size is requested
> >>>> in the 3 bits.
> >>>>
> >>>> i.e,
> >>>>
> >>>> machine_type:
> >>>>
> >>>> Bit [2:0]	- Requested IPA size. Values follow VTCR_EL2.PS format.
> >>>>
> >>>> Bit [3]		- 1 => IPA Size bits (Bits[2:0]) requested.
> >>>> 		0 => Not requested
> >>>>
> >>>> The only minor down side is restricting to the predefined values above,
> >>>> which is not a real issue for a VM.
> >>>>
> >>>> Thoughts ?
> >>>
> >>> I'd be very wary of using that 4th bit to do something that is not in
> >>> the architecture. We have only a single value left to be used (0b111),
> >>> and then your scheme clashes with the architecture definition.
> >>
> >> I agree. However, if we ever go beyond the 3bits in PARange, we have an
> >> issue with {V}TCR counter part. But lets not take that chance.
> >>
> >>>
> >>> I'd rather encode things in a way that is independent from the
> >>> architecture, and be done with it. You can map 0 to 40bits, and we have
> >>> the ability to express all values the architecture has (just in a
> >>> different order).
> >>
> >> The other option I can think of is encoding a signed number which is the
> >> difference of the IPA from 40. But that would need 5 bits if we were to
> >> encode it as it is. And if we want to squeeze it in 4bit, we could store
> >> half the difference (limiting the IPA limit to even numbers).
> >>
> >> i.e IPA = 40 + 2 * sign_extend(bits[3:0);
> > 
> > I came across similar issues when trying to work out how to enable
> > SVE for KVM.  In the end I reduced this to a per-vcpu feature, but
> > it means that there is no global opt-in for the SVE-specific KVM
> > API extensions:
> > 
> > That's a bit gross, because SVE may require a change to the way
> > vcpus are initialised.  The set of supported SVE vector lengths needs
> > to be set somehow before the vcpu is set running, but it's tricky do
> > do that without a new ioctl -- which would mean that if SVE is enabled
> > for a vcpu then the vcpu is not considered runnable until the new
> > magic ioctl is called.
> > 
> > Opting into that semantic change globally at VM creation time might
> > be preferable.  On the SVE side, this is still very much subject to
> > review/change.
> > 
> > 
> > Here:
> > 
> > The KVM_CREATE_VM init argument seems undefined by the KVM core code and
> > is available for arches to abuse in creative ways.  x86 and arm have
> > nothing here and reject non-zero values with -EINVAL; s390 treats it as
> > a bitmask, and defines a sincle feature-like bit here; powerpc treats it
> > as an enumeration of VM types.
> > 
> > If we want to be extensible, we could
> > 
> >  a) Pass a pointer in type, and come up with some extensible VM parameter
> >     struct for it to point to (which then wouldn't need a cryptic
> >     compressed encoding), or
> > 
> >  b) Introduce a new "KVM_CREATE_VM2" variant that either takes such
> >     an argument, or mandates a parameter negotiation phase involving
> >     additional ioctls before marking the VM as ready for vcpu and
> >     device creation.
> > 
> > (a) feels like an easy backwards-compatible approach, but cannot be
> > readily adopted by other arches (maybe not an issue).
> > 
> > (b) might be considered overengineered, so it would need a bit of
> > thought.
> > 
> > Wedging arguments into a few bits in the type argument feels awkward,
> > and may be regretted later if we run out of bits, or something can't be
> > represented in the chosen encoding.
> 
> I think that's a pretty convincing argument for a "better" CREATE_VM,
> one that would have a clearly defined, structured (and potentially
> extensible) argument.
> 
> I've quickly hacked the following:
> 
> diff --git a/include/uapi/linux/kvm.h b/include/uapi/linux/kvm.h
> index b6270a3b38e9..3e76214034c2 100644
> --- a/include/uapi/linux/kvm.h
> +++ b/include/uapi/linux/kvm.h
> @@ -735,6 +735,20 @@ struct kvm_ppc_resize_hpt {
>  	__u32 pad;
>  };
> 
> +struct kvm_create_vm2 {
> +	__u64	version;	/* Or maybe not */
> +	union {
> +		struct {
> +#define KVM_ARM_SVE_CAPABLE	(1 << 0)
> +#define KVM_ARM_SELECT_IPA	{1 << 1)
> +			__u64	capabilities;
> +			__u16	sve_vlen;
> +			__u8	ipa_size;
> +		} arm64;
> +		__u64	dummy[15];
> +	};
> +};
> +
>  #define KVMIO 0xAE
> 
>  /* machine type bits, to be used as argument to KVM_CREATE_VM */
> 
> Other architectures could fill in their own bits if they need to.
> 
> Thoughts?

This kind of thing should work, but it may still get messy when we
add additional fields.

It we want this to work cross-arch, would it make sense to go
for a more generic approach, say

struct kvm_create_vm_attr_any {
        __u32   type;
};

#define KVM_CREATE_VM_ATTR_ARCH_CAPABILITIES 1
struct kvm_create_vm_attr_arch_capabilities {
        __u32   type;
        __u16   size; /* support future expansion of capabilities[] */
        __u16   reserved;
        __u64   capabilities[1];
};

#define KVM_CREATE_VM_ATTR_ARM64_PHYSADDR_SIZE 2
struct kvm_create_vm_attr_arm64_physaddr_size {
        __u32   type;
        __u32   physaddr_bits;
};

/* ... */

union kvm_create_vm_attr {
        struct kvm_create_vm_attr_any;
        struct kvm_create_vm_attr_arch_capabilities;
        struct kvm_create_vm_attr_arm64_physaddr_size;
        /* ... */
};

struct kvm_create_vm2 {
        __u32   version;        /* harmless, even if not useful */
        __u16   nr_attrs;       /* or could just terminate attrs with a
                                   NULL entry */
        union kvm_create_vm_attr __user *__user *attrs;
};


This is quite flexible, but obviously a bit heavy.

However, if we're adding a new interface due to lack of extensibility,
it may be worth going for something that's freely extensible.


Userspace might call this as

	struct kvm_create_vm_attr_arch_capabilities vm_arch_caps = {
		.type = KVM_CREATE_VM_ATTR_ARCH_CAPABILITIES,
		.size = 64,
		.capabilities[0] = KVM_CREATE_VM_ARM64_VCPU_NEEDS_SET_SVE_VLS,
	};

	struct kvm_create_vm_attr_arch_arm64_physaddr_size = {
		.type = KVM_CREATE_VM_ATTR_ARM64_PHYSADDR_SIZE,
		.physaddr_bits = 52,
	};

	union kvm_create_vm_attr **vmattrs[] = {
		&vm_arch_caps,
		&vm_arm64_physaddr_size,
		NULL, /* maybe */
	};

	struct kvm_create_vm2 vm;

	vm.version = 0;
	vm.nr_attrs = 2; /* maybe */
	vm.attrs = vmattrs;

	ioctl(..., KVM_CREATE_VM2, &vm);

Cheers
---Dave

WARNING: multiple messages have this Message-ID (diff)
From: Dave Martin <Dave.Martin@arm.com>
To: Marc Zyngier <marc.zyngier@arm.com>
Cc: Suzuki K Poulose <suzuki.poulose@arm.com>,
	cdall@kernel.org, kvm@vger.kernel.org, catalin.marinas@arm.com,
	punit.agrawal@arm.com, Will Deacon <will.deacon@arm.com>,
	linux-kernel@vger.kernel.org, qemu-devel@nongnu.org,
	Paolo Bonzini <pbonzini@redhat.com>,
	kvmarm@lists.cs.columbia.edu,
	linux-arm-kernel@lists.infradead.org
Subject: Re: [Qemu-devel] [PATCH v3 15/20] kvm: arm/arm64: Allow tuning the physical address size for VM
Date: Mon, 9 Jul 2018 14:37:50 +0100	[thread overview]
Message-ID: <20180709133750.GE9486@e103592.cambridge.arm.com> (raw)
In-Reply-To: <17f8d585-3489-ab6f-6ee1-4d8d337dcf9c@arm.com>

On Mon, Jul 09, 2018 at 01:29:42PM +0100, Marc Zyngier wrote:
> On 09/07/18 12:23, Dave Martin wrote:
> > On Fri, Jul 06, 2018 at 05:39:00PM +0100, Suzuki K Poulose wrote:
> >> On 07/06/2018 04:09 PM, Marc Zyngier wrote:
> >>> On 06/07/18 14:49, Suzuki K Poulose wrote:
> >>>> On 04/07/18 23:03, Suzuki K Poulose wrote:
> >>>>> On 07/04/2018 04:51 PM, Will Deacon wrote:
> >>>>>> Hi Suzuki,
> >>>>>>
> >>>>>> On Fri, Jun 29, 2018 at 12:15:35PM +0100, Suzuki K Poulose wrote:
> >>>>>>> Allow specifying the physical address size for a new VM via
> >>>>>>> the kvm_type argument for KVM_CREATE_VM ioctl. This allows
> >>>>>>> us to finalise the stage2 page table format as early as possible
> >>>>>>> and hence perform the right checks on the memory slots without
> >>>>>>> complication. The size is encoded as Log2(PA_Size) in the bits[7:0]
> >>>>>>> of the type field and can encode more information in the future if
> >>>>>>> required. The IPA size is still capped at 40bits.
> >>>>>>>
> >>>>>>> Cc: Marc Zyngier <marc.zyngier@arm.com>
> >>>>>>> Cc: Christoffer Dall <cdall@kernel.org>
> >>>>>>> Cc: Peter Maydel <peter.maydell@linaro.org>
> >>>>>>> Cc: Paolo Bonzini <pbonzini@redhat.com>
> >>>>>>> Cc: Radim Krčmář <rkrcmar@redhat.com>
> >>>>>>> Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com>
> >>>>>>> ---
> >>>>>>>   arch/arm/include/asm/kvm_mmu.h   |  2 ++
> >>>>>>>   arch/arm64/include/asm/kvm_arm.h | 10 +++-------
> >>>>>>>   arch/arm64/include/asm/kvm_mmu.h |  2 ++
> >>>>>>>   include/uapi/linux/kvm.h         | 10 ++++++++++
> >>>>>>>   virt/kvm/arm/arm.c               | 24 ++++++++++++++++++++++--
> >>>>>>>   5 files changed, 39 insertions(+), 9 deletions(-)
> >>>>>>
> >>>>>> [...]
> >>>>>>
> >>>>>>> diff --git a/include/uapi/linux/kvm.h b/include/uapi/linux/kvm.h
> >>>>>>> index 4df9bb6..fa4cab0 100644
> >>>>>>> --- a/include/uapi/linux/kvm.h
> >>>>>>> +++ b/include/uapi/linux/kvm.h
> >>>>>>> @@ -751,6 +751,16 @@ struct kvm_ppc_resize_hpt {
> >>>>>>>   #define KVM_S390_SIE_PAGE_OFFSET 1
> >>>>>>>   /*
> >>>>>>> + * On arm/arm64, machine type can be used to request the physical
> >>>>>>> + * address size for the VM. Bits [7-0] have been reserved for the
> >>>>>>> + * PA size shift (i.e, log2(PA_Size)). For backward compatibility,
> >>>>>>> + * value 0 implies the default IPA size, which is 40bits.
> >>>>>>> + */
> >>>>>>> +#define KVM_VM_TYPE_ARM_PHYS_SHIFT_MASK    0xff
> >>>>>>> +#define KVM_VM_TYPE_ARM_PHYS_SHIFT(x)        \
> >>>>>>> +    ((x) & KVM_VM_TYPE_ARM_PHYS_SHIFT_MASK)
> >>>>>>
> >>>>>> This seems like you're allocating quite a lot of bits in a non-extensible
> >>>>>> interface to a fairly esoteric parameter. Would it be better to add another
> >>>>>> ioctl, or condense the number of sizes you support instead?
> >>>>>
> >>>>> As I explained in the other thread, we need the size as soon as the VM
> >>>>> is created. The major challenge is keeping the backward compatibility by
> >>>>> mapping 0 to 40bits. I will give it a thought.
> >>>>
> >>>> Here is one option. We could re-use the {V}TCR_ELx.{I}PS field format, which
> >>>> occupies 3 bits and has the following definitions. (ID_AA64MMFR0_EL1:PARange
> >>>> also has the field definitions, except that the field is 4bits wide, but
> >>>> only 3bits are used)
> >>>>
> >>>> 000 32 bits, 4GB.
> >>>> 001 36 bits, 64GB.
> >>>> 010 40 bits, 1TB.
> >>>> 011 42 bits, 4TB.
> >>>> 100 44 bits, 16TB.
> >>>> 101 48 bits, 256TB.
> >>>> 110 52 bits, 4PB
> >>>>
> >>>> But we need to map 0 => 40bits IPA to make our ABI backward compatible. So
> >>>> we could use the additional one bit to indicate that IPA size is requested
> >>>> in the 3 bits.
> >>>>
> >>>> i.e,
> >>>>
> >>>> machine_type:
> >>>>
> >>>> Bit [2:0]	- Requested IPA size. Values follow VTCR_EL2.PS format.
> >>>>
> >>>> Bit [3]		- 1 => IPA Size bits (Bits[2:0]) requested.
> >>>> 		0 => Not requested
> >>>>
> >>>> The only minor down side is restricting to the predefined values above,
> >>>> which is not a real issue for a VM.
> >>>>
> >>>> Thoughts ?
> >>>
> >>> I'd be very wary of using that 4th bit to do something that is not in
> >>> the architecture. We have only a single value left to be used (0b111),
> >>> and then your scheme clashes with the architecture definition.
> >>
> >> I agree. However, if we ever go beyond the 3bits in PARange, we have an
> >> issue with {V}TCR counter part. But lets not take that chance.
> >>
> >>>
> >>> I'd rather encode things in a way that is independent from the
> >>> architecture, and be done with it. You can map 0 to 40bits, and we have
> >>> the ability to express all values the architecture has (just in a
> >>> different order).
> >>
> >> The other option I can think of is encoding a signed number which is the
> >> difference of the IPA from 40. But that would need 5 bits if we were to
> >> encode it as it is. And if we want to squeeze it in 4bit, we could store
> >> half the difference (limiting the IPA limit to even numbers).
> >>
> >> i.e IPA = 40 + 2 * sign_extend(bits[3:0);
> > 
> > I came across similar issues when trying to work out how to enable
> > SVE for KVM.  In the end I reduced this to a per-vcpu feature, but
> > it means that there is no global opt-in for the SVE-specific KVM
> > API extensions:
> > 
> > That's a bit gross, because SVE may require a change to the way
> > vcpus are initialised.  The set of supported SVE vector lengths needs
> > to be set somehow before the vcpu is set running, but it's tricky do
> > do that without a new ioctl -- which would mean that if SVE is enabled
> > for a vcpu then the vcpu is not considered runnable until the new
> > magic ioctl is called.
> > 
> > Opting into that semantic change globally at VM creation time might
> > be preferable.  On the SVE side, this is still very much subject to
> > review/change.
> > 
> > 
> > Here:
> > 
> > The KVM_CREATE_VM init argument seems undefined by the KVM core code and
> > is available for arches to abuse in creative ways.  x86 and arm have
> > nothing here and reject non-zero values with -EINVAL; s390 treats it as
> > a bitmask, and defines a sincle feature-like bit here; powerpc treats it
> > as an enumeration of VM types.
> > 
> > If we want to be extensible, we could
> > 
> >  a) Pass a pointer in type, and come up with some extensible VM parameter
> >     struct for it to point to (which then wouldn't need a cryptic
> >     compressed encoding), or
> > 
> >  b) Introduce a new "KVM_CREATE_VM2" variant that either takes such
> >     an argument, or mandates a parameter negotiation phase involving
> >     additional ioctls before marking the VM as ready for vcpu and
> >     device creation.
> > 
> > (a) feels like an easy backwards-compatible approach, but cannot be
> > readily adopted by other arches (maybe not an issue).
> > 
> > (b) might be considered overengineered, so it would need a bit of
> > thought.
> > 
> > Wedging arguments into a few bits in the type argument feels awkward,
> > and may be regretted later if we run out of bits, or something can't be
> > represented in the chosen encoding.
> 
> I think that's a pretty convincing argument for a "better" CREATE_VM,
> one that would have a clearly defined, structured (and potentially
> extensible) argument.
> 
> I've quickly hacked the following:
> 
> diff --git a/include/uapi/linux/kvm.h b/include/uapi/linux/kvm.h
> index b6270a3b38e9..3e76214034c2 100644
> --- a/include/uapi/linux/kvm.h
> +++ b/include/uapi/linux/kvm.h
> @@ -735,6 +735,20 @@ struct kvm_ppc_resize_hpt {
>  	__u32 pad;
>  };
> 
> +struct kvm_create_vm2 {
> +	__u64	version;	/* Or maybe not */
> +	union {
> +		struct {
> +#define KVM_ARM_SVE_CAPABLE	(1 << 0)
> +#define KVM_ARM_SELECT_IPA	{1 << 1)
> +			__u64	capabilities;
> +			__u16	sve_vlen;
> +			__u8	ipa_size;
> +		} arm64;
> +		__u64	dummy[15];
> +	};
> +};
> +
>  #define KVMIO 0xAE
> 
>  /* machine type bits, to be used as argument to KVM_CREATE_VM */
> 
> Other architectures could fill in their own bits if they need to.
> 
> Thoughts?

This kind of thing should work, but it may still get messy when we
add additional fields.

It we want this to work cross-arch, would it make sense to go
for a more generic approach, say

struct kvm_create_vm_attr_any {
        __u32   type;
};

#define KVM_CREATE_VM_ATTR_ARCH_CAPABILITIES 1
struct kvm_create_vm_attr_arch_capabilities {
        __u32   type;
        __u16   size; /* support future expansion of capabilities[] */
        __u16   reserved;
        __u64   capabilities[1];
};

#define KVM_CREATE_VM_ATTR_ARM64_PHYSADDR_SIZE 2
struct kvm_create_vm_attr_arm64_physaddr_size {
        __u32   type;
        __u32   physaddr_bits;
};

/* ... */

union kvm_create_vm_attr {
        struct kvm_create_vm_attr_any;
        struct kvm_create_vm_attr_arch_capabilities;
        struct kvm_create_vm_attr_arm64_physaddr_size;
        /* ... */
};

struct kvm_create_vm2 {
        __u32   version;        /* harmless, even if not useful */
        __u16   nr_attrs;       /* or could just terminate attrs with a
                                   NULL entry */
        union kvm_create_vm_attr __user *__user *attrs;
};


This is quite flexible, but obviously a bit heavy.

However, if we're adding a new interface due to lack of extensibility,
it may be worth going for something that's freely extensible.


Userspace might call this as

	struct kvm_create_vm_attr_arch_capabilities vm_arch_caps = {
		.type = KVM_CREATE_VM_ATTR_ARCH_CAPABILITIES,
		.size = 64,
		.capabilities[0] = KVM_CREATE_VM_ARM64_VCPU_NEEDS_SET_SVE_VLS,
	};

	struct kvm_create_vm_attr_arch_arm64_physaddr_size = {
		.type = KVM_CREATE_VM_ATTR_ARM64_PHYSADDR_SIZE,
		.physaddr_bits = 52,
	};

	union kvm_create_vm_attr **vmattrs[] = {
		&vm_arch_caps,
		&vm_arm64_physaddr_size,
		NULL, /* maybe */
	};

	struct kvm_create_vm2 vm;

	vm.version = 0;
	vm.nr_attrs = 2; /* maybe */
	vm.attrs = vmattrs;

	ioctl(..., KVM_CREATE_VM2, &vm);

Cheers
---Dave

WARNING: multiple messages have this Message-ID (diff)
From: Dave.Martin@arm.com (Dave Martin)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH v3 15/20] kvm: arm/arm64: Allow tuning the physical address size for VM
Date: Mon, 9 Jul 2018 14:37:50 +0100	[thread overview]
Message-ID: <20180709133750.GE9486@e103592.cambridge.arm.com> (raw)
In-Reply-To: <17f8d585-3489-ab6f-6ee1-4d8d337dcf9c@arm.com>

On Mon, Jul 09, 2018 at 01:29:42PM +0100, Marc Zyngier wrote:
> On 09/07/18 12:23, Dave Martin wrote:
> > On Fri, Jul 06, 2018 at 05:39:00PM +0100, Suzuki K Poulose wrote:
> >> On 07/06/2018 04:09 PM, Marc Zyngier wrote:
> >>> On 06/07/18 14:49, Suzuki K Poulose wrote:
> >>>> On 04/07/18 23:03, Suzuki K Poulose wrote:
> >>>>> On 07/04/2018 04:51 PM, Will Deacon wrote:
> >>>>>> Hi Suzuki,
> >>>>>>
> >>>>>> On Fri, Jun 29, 2018 at 12:15:35PM +0100, Suzuki K Poulose wrote:
> >>>>>>> Allow specifying the physical address size for a new VM via
> >>>>>>> the kvm_type argument for KVM_CREATE_VM ioctl. This allows
> >>>>>>> us to finalise the stage2 page table format as early as possible
> >>>>>>> and hence perform the right checks on the memory slots without
> >>>>>>> complication. The size is encoded as Log2(PA_Size) in the bits[7:0]
> >>>>>>> of the type field and can encode more information in the future if
> >>>>>>> required. The IPA size is still capped at 40bits.
> >>>>>>>
> >>>>>>> Cc: Marc Zyngier <marc.zyngier@arm.com>
> >>>>>>> Cc: Christoffer Dall <cdall@kernel.org>
> >>>>>>> Cc: Peter Maydel <peter.maydell@linaro.org>
> >>>>>>> Cc: Paolo Bonzini <pbonzini@redhat.com>
> >>>>>>> Cc: Radim Kr?m?? <rkrcmar@redhat.com>
> >>>>>>> Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com>
> >>>>>>> ---
> >>>>>>> ? arch/arm/include/asm/kvm_mmu.h?? |? 2 ++
> >>>>>>> ? arch/arm64/include/asm/kvm_arm.h | 10 +++-------
> >>>>>>> ? arch/arm64/include/asm/kvm_mmu.h |? 2 ++
> >>>>>>> ? include/uapi/linux/kvm.h???????? | 10 ++++++++++
> >>>>>>> ? virt/kvm/arm/arm.c?????????????? | 24 ++++++++++++++++++++++--
> >>>>>>> ? 5 files changed, 39 insertions(+), 9 deletions(-)
> >>>>>>
> >>>>>> [...]
> >>>>>>
> >>>>>>> diff --git a/include/uapi/linux/kvm.h b/include/uapi/linux/kvm.h
> >>>>>>> index 4df9bb6..fa4cab0 100644
> >>>>>>> --- a/include/uapi/linux/kvm.h
> >>>>>>> +++ b/include/uapi/linux/kvm.h
> >>>>>>> @@ -751,6 +751,16 @@ struct kvm_ppc_resize_hpt {
> >>>>>>> ? #define KVM_S390_SIE_PAGE_OFFSET 1
> >>>>>>> ? /*
> >>>>>>> + * On arm/arm64, machine type can be used to request the physical
> >>>>>>> + * address size for the VM. Bits [7-0] have been reserved for the
> >>>>>>> + * PA size shift (i.e, log2(PA_Size)). For backward compatibility,
> >>>>>>> + * value 0 implies the default IPA size, which is 40bits.
> >>>>>>> + */
> >>>>>>> +#define KVM_VM_TYPE_ARM_PHYS_SHIFT_MASK??? 0xff
> >>>>>>> +#define KVM_VM_TYPE_ARM_PHYS_SHIFT(x)??????? \
> >>>>>>> +??? ((x) & KVM_VM_TYPE_ARM_PHYS_SHIFT_MASK)
> >>>>>>
> >>>>>> This seems like you're allocating quite a lot of bits in a non-extensible
> >>>>>> interface to a fairly esoteric parameter. Would it be better to add another
> >>>>>> ioctl, or condense the number of sizes you support instead?
> >>>>>
> >>>>> As I explained in the other thread, we need the size as soon as the VM
> >>>>> is created. The major challenge is keeping the backward compatibility by
> >>>>> mapping 0 to 40bits. I will give it a thought.
> >>>>
> >>>> Here is one option. We could re-use the {V}TCR_ELx.{I}PS field format, which
> >>>> occupies 3 bits and has the following definitions. (ID_AA64MMFR0_EL1:PARange
> >>>> also has the field definitions, except that the field is 4bits wide, but
> >>>> only 3bits are used)
> >>>>
> >>>> 000 32 bits, 4GB.
> >>>> 001 36 bits, 64GB.
> >>>> 010 40 bits, 1TB.
> >>>> 011 42 bits, 4TB.
> >>>> 100 44 bits, 16TB.
> >>>> 101 48 bits, 256TB.
> >>>> 110 52 bits, 4PB
> >>>>
> >>>> But we need to map 0 => 40bits IPA to make our ABI backward compatible. So
> >>>> we could use the additional one bit to indicate that IPA size is requested
> >>>> in the 3 bits.
> >>>>
> >>>> i.e,
> >>>>
> >>>> machine_type:
> >>>>
> >>>> Bit [2:0]	- Requested IPA size. Values follow VTCR_EL2.PS format.
> >>>>
> >>>> Bit [3]		- 1 => IPA Size bits (Bits[2:0]) requested.
> >>>> 		0 => Not requested
> >>>>
> >>>> The only minor down side is restricting to the predefined values above,
> >>>> which is not a real issue for a VM.
> >>>>
> >>>> Thoughts ?
> >>>
> >>> I'd be very wary of using that 4th bit to do something that is not in
> >>> the architecture. We have only a single value left to be used (0b111),
> >>> and then your scheme clashes with the architecture definition.
> >>
> >> I agree. However, if we ever go beyond the 3bits in PARange, we have an
> >> issue with {V}TCR counter part. But lets not take that chance.
> >>
> >>>
> >>> I'd rather encode things in a way that is independent from the
> >>> architecture, and be done with it. You can map 0 to 40bits, and we have
> >>> the ability to express all values the architecture has (just in a
> >>> different order).
> >>
> >> The other option I can think of is encoding a signed number which is the
> >> difference of the IPA from 40. But that would need 5 bits if we were to
> >> encode it as it is. And if we want to squeeze it in 4bit, we could store
> >> half the difference (limiting the IPA limit to even numbers).
> >>
> >> i.e IPA = 40 + 2 * sign_extend(bits[3:0);
> > 
> > I came across similar issues when trying to work out how to enable
> > SVE for KVM.  In the end I reduced this to a per-vcpu feature, but
> > it means that there is no global opt-in for the SVE-specific KVM
> > API extensions:
> > 
> > That's a bit gross, because SVE may require a change to the way
> > vcpus are initialised.  The set of supported SVE vector lengths needs
> > to be set somehow before the vcpu is set running, but it's tricky do
> > do that without a new ioctl -- which would mean that if SVE is enabled
> > for a vcpu then the vcpu is not considered runnable until the new
> > magic ioctl is called.
> > 
> > Opting into that semantic change globally at VM creation time might
> > be preferable.  On the SVE side, this is still very much subject to
> > review/change.
> > 
> > 
> > Here:
> > 
> > The KVM_CREATE_VM init argument seems undefined by the KVM core code and
> > is available for arches to abuse in creative ways.  x86 and arm have
> > nothing here and reject non-zero values with -EINVAL; s390 treats it as
> > a bitmask, and defines a sincle feature-like bit here; powerpc treats it
> > as an enumeration of VM types.
> > 
> > If we want to be extensible, we could
> > 
> >  a) Pass a pointer in type, and come up with some extensible VM parameter
> >     struct for it to point to (which then wouldn't need a cryptic
> >     compressed encoding), or
> > 
> >  b) Introduce a new "KVM_CREATE_VM2" variant that either takes such
> >     an argument, or mandates a parameter negotiation phase involving
> >     additional ioctls before marking the VM as ready for vcpu and
> >     device creation.
> > 
> > (a) feels like an easy backwards-compatible approach, but cannot be
> > readily adopted by other arches (maybe not an issue).
> > 
> > (b) might be considered overengineered, so it would need a bit of
> > thought.
> > 
> > Wedging arguments into a few bits in the type argument feels awkward,
> > and may be regretted later if we run out of bits, or something can't be
> > represented in the chosen encoding.
> 
> I think that's a pretty convincing argument for a "better" CREATE_VM,
> one that would have a clearly defined, structured (and potentially
> extensible) argument.
> 
> I've quickly hacked the following:
> 
> diff --git a/include/uapi/linux/kvm.h b/include/uapi/linux/kvm.h
> index b6270a3b38e9..3e76214034c2 100644
> --- a/include/uapi/linux/kvm.h
> +++ b/include/uapi/linux/kvm.h
> @@ -735,6 +735,20 @@ struct kvm_ppc_resize_hpt {
>  	__u32 pad;
>  };
> 
> +struct kvm_create_vm2 {
> +	__u64	version;	/* Or maybe not */
> +	union {
> +		struct {
> +#define KVM_ARM_SVE_CAPABLE	(1 << 0)
> +#define KVM_ARM_SELECT_IPA	{1 << 1)
> +			__u64	capabilities;
> +			__u16	sve_vlen;
> +			__u8	ipa_size;
> +		} arm64;
> +		__u64	dummy[15];
> +	};
> +};
> +
>  #define KVMIO 0xAE
> 
>  /* machine type bits, to be used as argument to KVM_CREATE_VM */
> 
> Other architectures could fill in their own bits if they need to.
> 
> Thoughts?

This kind of thing should work, but it may still get messy when we
add additional fields.

It we want this to work cross-arch, would it make sense to go
for a more generic approach, say

struct kvm_create_vm_attr_any {
        __u32   type;
};

#define KVM_CREATE_VM_ATTR_ARCH_CAPABILITIES 1
struct kvm_create_vm_attr_arch_capabilities {
        __u32   type;
        __u16   size; /* support future expansion of capabilities[] */
        __u16   reserved;
        __u64   capabilities[1];
};

#define KVM_CREATE_VM_ATTR_ARM64_PHYSADDR_SIZE 2
struct kvm_create_vm_attr_arm64_physaddr_size {
        __u32   type;
        __u32   physaddr_bits;
};

/* ... */

union kvm_create_vm_attr {
        struct kvm_create_vm_attr_any;
        struct kvm_create_vm_attr_arch_capabilities;
        struct kvm_create_vm_attr_arm64_physaddr_size;
        /* ... */
};

struct kvm_create_vm2 {
        __u32   version;        /* harmless, even if not useful */
        __u16   nr_attrs;       /* or could just terminate attrs with a
                                   NULL entry */
        union kvm_create_vm_attr __user *__user *attrs;
};


This is quite flexible, but obviously a bit heavy.

However, if we're adding a new interface due to lack of extensibility,
it may be worth going for something that's freely extensible.


Userspace might call this as

	struct kvm_create_vm_attr_arch_capabilities vm_arch_caps = {
		.type = KVM_CREATE_VM_ATTR_ARCH_CAPABILITIES,
		.size = 64,
		.capabilities[0] = KVM_CREATE_VM_ARM64_VCPU_NEEDS_SET_SVE_VLS,
	};

	struct kvm_create_vm_attr_arch_arm64_physaddr_size = {
		.type = KVM_CREATE_VM_ATTR_ARM64_PHYSADDR_SIZE,
		.physaddr_bits = 52,
	};

	union kvm_create_vm_attr **vmattrs[] = {
		&vm_arch_caps,
		&vm_arm64_physaddr_size,
		NULL, /* maybe */
	};

	struct kvm_create_vm2 vm;

	vm.version = 0;
	vm.nr_attrs = 2; /* maybe */
	vm.attrs = vmattrs;

	ioctl(..., KVM_CREATE_VM2, &vm);

Cheers
---Dave

  reply	other threads:[~2018-07-09 13:38 UTC|newest]

Thread overview: 276+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-06-29 11:15 [PATCH v3 00/20] arm64: Dynamic & 52bit IPA support Suzuki K Poulose
2018-06-29 11:15 ` Suzuki K Poulose
2018-06-29 11:15 ` [Qemu-devel] " Suzuki K Poulose
2018-06-29 11:15 ` [PATCH v3 01/20] virtio: mmio-v1: Validate queue PFN Suzuki K Poulose
2018-06-29 11:15   ` Suzuki K Poulose
2018-06-29 11:15   ` [Qemu-devel] " Suzuki K Poulose
2018-06-29 11:15   ` Suzuki K Poulose
2018-06-29 17:42   ` Michael S. Tsirkin
2018-06-29 17:42     ` Michael S. Tsirkin
2018-06-29 17:42     ` [Qemu-devel] " Michael S. Tsirkin
2018-07-03  8:04     ` Suzuki K Poulose
2018-07-03  8:04       ` Suzuki K Poulose
2018-07-03  8:04       ` [Qemu-devel] " Suzuki K Poulose
2018-07-04  5:37       ` Michael S. Tsirkin
2018-07-04  5:37         ` Michael S. Tsirkin
2018-07-04  5:37         ` [Qemu-devel] " Michael S. Tsirkin
2018-06-29 11:15 ` [PATCH v3 02/20] virtio: pci-legacy: Validate queue pfn Suzuki K Poulose
2018-06-29 11:15   ` Suzuki K Poulose
2018-06-29 11:15   ` [Qemu-devel] " Suzuki K Poulose
2018-06-29 17:42   ` Michael S. Tsirkin
2018-06-29 17:42     ` Michael S. Tsirkin
2018-06-29 17:42     ` [Qemu-devel] " Michael S. Tsirkin
2018-06-29 11:15 ` [PATCH v3 03/20] arm64: Add a helper for PARange to physical shift conversion Suzuki K Poulose
2018-06-29 11:15   ` Suzuki K Poulose
2018-06-29 11:15   ` [Qemu-devel] " Suzuki K Poulose
2018-06-29 11:15   ` Suzuki K Poulose
2018-06-29 14:50   ` Auger Eric
2018-06-29 14:50     ` Auger Eric
2018-06-29 14:50     ` [Qemu-devel] " Auger Eric
2018-06-29 11:15 ` [PATCH v3 04/20] kvm: arm64: Clean up VTCR_EL2 initialisation Suzuki K Poulose
2018-06-29 11:15   ` Suzuki K Poulose
2018-06-29 11:15   ` [Qemu-devel] " Suzuki K Poulose
2018-06-29 14:50   ` Auger Eric
2018-06-29 14:50     ` Auger Eric
2018-06-29 14:50     ` [Qemu-devel] " Auger Eric
2018-06-29 11:15 ` [PATCH v3 05/20] kvm: arm/arm64: Fix stage2_flush_memslot for 4 level page table Suzuki K Poulose
2018-06-29 11:15   ` Suzuki K Poulose
2018-06-29 11:15   ` [Qemu-devel] " Suzuki K Poulose
2018-06-29 11:15   ` Suzuki K Poulose
2018-06-29 14:50   ` Auger Eric
2018-06-29 14:50     ` Auger Eric
2018-06-29 14:50     ` [Qemu-devel] " Auger Eric
2018-07-02  9:59   ` Marc Zyngier
2018-07-02  9:59     ` Marc Zyngier
2018-07-02  9:59     ` [Qemu-devel] " Marc Zyngier
2018-06-29 11:15 ` [PATCH v3 06/20] kvm: arm/arm64: Remove spurious WARN_ON Suzuki K Poulose
2018-06-29 11:15   ` Suzuki K Poulose
2018-06-29 11:15   ` [Qemu-devel] " Suzuki K Poulose
2018-06-29 14:51   ` Auger Eric
2018-06-29 14:51     ` Auger Eric
2018-06-29 14:51     ` [Qemu-devel] " Auger Eric
2018-07-02 10:01   ` Marc Zyngier
2018-07-02 10:01     ` Marc Zyngier
2018-07-02 10:01     ` [Qemu-devel] " Marc Zyngier
2018-06-29 11:15 ` [PATCH v3 07/20] kvm: arm/arm64: Prepare for VM specific stage2 translations Suzuki K Poulose
2018-06-29 11:15   ` Suzuki K Poulose
2018-06-29 11:15   ` [Qemu-devel] " Suzuki K Poulose
2018-06-29 11:15   ` Suzuki K Poulose
2018-07-02 10:12   ` Marc Zyngier
2018-07-02 10:12     ` Marc Zyngier
2018-07-02 10:12     ` [Qemu-devel] " Marc Zyngier
2018-07-02 10:12     ` Marc Zyngier
2018-07-02 10:25     ` Suzuki K Poulose
2018-07-02 10:25       ` Suzuki K Poulose
2018-07-02 10:25       ` [Qemu-devel] " Suzuki K Poulose
2018-07-02 10:51   ` Auger Eric
2018-07-02 10:51     ` Auger Eric
2018-07-02 10:51     ` [Qemu-devel] " Auger Eric
2018-07-02 10:59     ` Suzuki K Poulose
2018-07-02 10:59       ` Suzuki K Poulose
2018-07-02 10:59       ` [Qemu-devel] " Suzuki K Poulose
2018-06-29 11:15 ` [PATCH v3 08/20] kvm: arm/arm64: Abstract stage2 pgd table allocation Suzuki K Poulose
2018-06-29 11:15   ` Suzuki K Poulose
2018-06-29 11:15   ` [Qemu-devel] " Suzuki K Poulose
2018-07-02 15:01   ` Auger Eric
2018-07-02 15:01     ` Auger Eric
2018-07-02 15:01     ` [Qemu-devel] " Auger Eric
2018-06-29 11:15 ` [PATCH v3 09/20] kvm: arm64: Make stage2 page table layout dynamic Suzuki K Poulose
2018-06-29 11:15   ` Suzuki K Poulose
2018-06-29 11:15   ` [Qemu-devel] " Suzuki K Poulose
2018-06-29 11:15   ` Suzuki K Poulose
2018-07-02 10:57   ` Suzuki K Poulose
2018-07-02 10:57     ` Suzuki K Poulose
2018-07-02 10:57     ` [Qemu-devel] " Suzuki K Poulose
2018-07-02 12:14   ` Auger Eric
2018-07-02 12:14     ` Auger Eric
2018-07-02 12:14     ` [Qemu-devel] " Auger Eric
2018-07-02 13:24     ` Suzuki K Poulose
2018-07-02 13:24       ` Suzuki K Poulose
2018-07-02 13:24       ` [Qemu-devel] " Suzuki K Poulose
2018-07-02 14:46       ` Auger Eric
2018-07-02 14:46         ` Auger Eric
2018-06-29 11:15 ` [PATCH v3 10/20] kvm: arm64: Dynamic configuration of VTTBR mask Suzuki K Poulose
2018-06-29 11:15   ` Suzuki K Poulose
2018-06-29 11:15   ` [Qemu-devel] " Suzuki K Poulose
2018-07-02 14:41   ` Auger Eric
2018-07-02 14:41     ` Auger Eric
2018-07-02 14:41     ` [Qemu-devel] " Auger Eric
2018-07-03 11:54     ` Suzuki K Poulose
2018-07-03 11:54       ` Suzuki K Poulose
2018-07-03 11:54       ` [Qemu-devel] " Suzuki K Poulose
2018-07-04  8:24       ` Auger Eric
2018-07-04  8:24         ` Auger Eric
2018-07-04  8:24         ` [Qemu-devel] " Auger Eric
2018-07-04  8:29         ` Suzuki K Poulose
2018-07-04  8:29           ` Suzuki K Poulose
2018-07-04  8:29           ` [Qemu-devel] " Suzuki K Poulose
2018-06-29 11:15 ` [PATCH v3 11/20] kvm: arm64: Helper for computing VTCR_EL2.SL0 Suzuki K Poulose
2018-06-29 11:15   ` Suzuki K Poulose
2018-06-29 11:15   ` [Qemu-devel] " Suzuki K Poulose
2018-07-02 14:59   ` Auger Eric
2018-07-02 14:59     ` Auger Eric
2018-07-02 14:59     ` [Qemu-devel] " Auger Eric
2018-06-29 11:15 ` [PATCH v3 12/20] kvm: arm64: Add helper for loading the stage2 setting for a VM Suzuki K Poulose
2018-06-29 11:15   ` Suzuki K Poulose
2018-06-29 11:15   ` [Qemu-devel] " Suzuki K Poulose
2018-07-02 19:13   ` Auger Eric
2018-07-02 19:13     ` Auger Eric
2018-07-02 19:13     ` [Qemu-devel] " Auger Eric
2018-06-29 11:15 ` [PATCH v3 13/20] kvm: arm64: Configure VTCR per VM Suzuki K Poulose
2018-06-29 11:15   ` Suzuki K Poulose
2018-06-29 11:15   ` [Qemu-devel] " Suzuki K Poulose
2018-07-02 12:16   ` Marc Zyngier
2018-07-02 12:16     ` Marc Zyngier
2018-07-02 12:16     ` [Qemu-devel] " Marc Zyngier
2018-07-03 10:48     ` Suzuki K Poulose
2018-07-03 10:48       ` Suzuki K Poulose
2018-07-03 10:48       ` [Qemu-devel] " Suzuki K Poulose
2018-07-03 10:58       ` Marc Zyngier
2018-07-03 10:58         ` Marc Zyngier
2018-07-03 10:58         ` [Qemu-devel] " Marc Zyngier
2018-06-29 11:15 ` [PATCH v3 14/20] kvm: arm/arm64: Expose supported physical address limit for VM Suzuki K Poulose
2018-06-29 11:15   ` Suzuki K Poulose
2018-06-29 11:15   ` [Qemu-devel] " Suzuki K Poulose
2018-06-29 11:15 ` [PATCH v3 15/20] kvm: arm/arm64: Allow tuning the physical address size " Suzuki K Poulose
2018-06-29 11:15   ` Suzuki K Poulose
2018-06-29 11:15   ` [Qemu-devel] " Suzuki K Poulose
2018-07-02 13:13   ` Marc Zyngier
2018-07-02 13:13     ` Marc Zyngier
2018-07-02 13:13     ` [Qemu-devel] " Marc Zyngier
2018-07-02 13:31     ` Suzuki K Poulose
2018-07-02 13:31       ` Suzuki K Poulose
2018-07-02 13:31       ` [Qemu-devel] " Suzuki K Poulose
2018-07-04 15:51   ` Will Deacon
2018-07-04 15:51     ` Will Deacon
2018-07-04 15:51     ` [Qemu-devel] " Will Deacon
2018-07-04 22:03     ` Suzuki K Poulose
2018-07-04 22:03       ` Suzuki K Poulose
2018-07-04 22:03       ` [Qemu-devel] " Suzuki K Poulose
2018-07-04 22:03       ` Suzuki K Poulose
2018-07-06 13:49       ` Suzuki K Poulose
2018-07-06 13:49         ` Suzuki K Poulose
2018-07-06 13:49         ` [Qemu-devel] " Suzuki K Poulose
2018-07-06 13:49         ` Suzuki K Poulose
2018-07-06 15:09         ` Marc Zyngier
2018-07-06 15:09           ` Marc Zyngier
2018-07-06 15:09           ` [Qemu-devel] " Marc Zyngier
2018-07-06 15:09           ` Marc Zyngier
2018-07-06 16:39           ` Suzuki K Poulose
2018-07-06 16:39             ` Suzuki K Poulose
2018-07-06 16:39             ` [Qemu-devel] " Suzuki K Poulose
2018-07-06 16:39             ` Suzuki K Poulose
2018-07-09 11:23             ` Dave Martin
2018-07-09 11:23               ` Dave Martin
2018-07-09 11:23               ` [Qemu-devel] " Dave Martin
2018-07-09 12:29               ` Marc Zyngier
2018-07-09 12:29                 ` Marc Zyngier
2018-07-09 12:29                 ` [Qemu-devel] " Marc Zyngier
2018-07-09 13:37                 ` Dave Martin [this message]
2018-07-09 13:37                   ` Dave Martin
2018-07-09 13:37                   ` [Qemu-devel] " Dave Martin
2018-07-10 16:38                   ` Suzuki K Poulose
2018-07-10 16:38                     ` Suzuki K Poulose
2018-07-10 16:38                     ` [Qemu-devel] " Suzuki K Poulose
2018-07-10 16:38                     ` Suzuki K Poulose
2018-07-10 17:03                     ` Dave Martin
2018-07-10 17:03                       ` Dave Martin
2018-07-10 17:03                       ` [Qemu-devel] " Dave Martin
2018-07-10 17:03                       ` Dave Martin
2018-07-11  9:05                       ` Suzuki K Poulose
2018-07-11  9:05                         ` Suzuki K Poulose
2018-07-11  9:05                         ` [Qemu-devel] " Suzuki K Poulose
2018-07-11 10:38                         ` Dave Martin
2018-07-11 10:38                           ` Dave Martin
2018-07-11 10:38                           ` [Qemu-devel] " Dave Martin
2018-06-29 11:15 ` [PATCH v3 16/20] kvm: arm64: Switch to per VM IPA limit Suzuki K Poulose
2018-06-29 11:15   ` Suzuki K Poulose
2018-06-29 11:15   ` [Qemu-devel] " Suzuki K Poulose
2018-07-02 13:32   ` Marc Zyngier
2018-07-02 13:32     ` Marc Zyngier
2018-07-02 13:32     ` [Qemu-devel] " Marc Zyngier
2018-07-02 13:53     ` Suzuki K Poulose
2018-07-02 13:53       ` Suzuki K Poulose
2018-07-02 13:53       ` [Qemu-devel] " Suzuki K Poulose
2018-06-29 11:15 ` [PATCH v3 17/20] vgic: Add support for 52bit guest physical address Suzuki K Poulose
2018-06-29 11:15   ` Suzuki K Poulose
2018-06-29 11:15   ` [Qemu-devel] " Suzuki K Poulose
2018-07-04  8:09   ` Auger Eric
2018-07-04  8:09     ` Auger Eric
2018-07-04  8:09     ` [Qemu-devel] " Auger Eric
2018-06-29 11:15 ` [PATCH v3 18/20] kvm: arm64: Add support for handling 52bit IPA Suzuki K Poulose
2018-06-29 11:15   ` Suzuki K Poulose
2018-06-29 11:15   ` [Qemu-devel] " Suzuki K Poulose
2018-07-02 13:43   ` Marc Zyngier
2018-07-02 13:43     ` Marc Zyngier
2018-07-02 13:43     ` [Qemu-devel] " Marc Zyngier
2018-06-29 11:15 ` [PATCH v3 19/20] kvm: arm64: Allow IPA size supported by the system Suzuki K Poulose
2018-06-29 11:15   ` Suzuki K Poulose
2018-06-29 11:15   ` [Qemu-devel] " Suzuki K Poulose
2018-07-02 13:50   ` Marc Zyngier
2018-07-02 13:50     ` Marc Zyngier
2018-07-02 13:50     ` [Qemu-devel] " Marc Zyngier
2018-07-02 13:54     ` Suzuki K Poulose
2018-07-02 13:54       ` Suzuki K Poulose
2018-07-02 13:54       ` [Qemu-devel] " Suzuki K Poulose
2018-06-29 11:15 ` [PATCH v3 20/20] kvm: arm64: Fall back to normal stage2 entry level Suzuki K Poulose
2018-06-29 11:15   ` Suzuki K Poulose
2018-06-29 11:15   ` [Qemu-devel] " Suzuki K Poulose
2018-06-29 11:15 ` [kvmtool test PATCH 21/24] kvmtool: Allow backends to run checks on the KVM device fd Suzuki K Poulose
2018-06-29 11:15   ` Suzuki K Poulose
2018-06-29 11:15   ` [Qemu-devel] " Suzuki K Poulose
2018-06-29 11:15 ` [kvmtool test PATCH 22/24] kvmtool: arm64: Add support for guest physical address size Suzuki K Poulose
2018-06-29 11:15   ` Suzuki K Poulose
2018-06-29 11:15   ` [Qemu-devel] " Suzuki K Poulose
2018-07-04 14:09   ` Will Deacon
2018-07-04 14:09     ` Will Deacon
2018-07-04 14:09     ` [Qemu-devel] " Will Deacon
2018-07-04 15:00     ` Julien Grall
2018-07-04 15:00       ` Julien Grall
2018-07-04 15:00       ` [Qemu-devel] " Julien Grall
2018-07-04 15:52       ` Will Deacon
2018-07-04 15:52         ` Will Deacon
2018-07-04 15:52         ` [Qemu-devel] " Will Deacon
2018-07-05 12:47         ` Julien Grall
2018-07-05 12:47           ` Julien Grall
2018-07-05 12:47           ` [Qemu-devel] " Julien Grall
2018-07-05 13:20           ` Marc Zyngier
2018-07-05 13:20             ` Marc Zyngier
2018-07-05 13:20             ` [Qemu-devel] " Marc Zyngier
2018-07-05 13:46             ` Auger Eric
2018-07-05 13:46               ` Auger Eric
2018-07-05 13:46               ` [Qemu-devel] " Auger Eric
2018-07-05 14:12               ` Suzuki K Poulose
2018-07-05 14:12                 ` Suzuki K Poulose
2018-07-05 14:12                 ` [Qemu-devel] " Suzuki K Poulose
2018-07-05 14:15               ` Marc Zyngier
2018-07-05 14:15                 ` Marc Zyngier
2018-07-05 14:15                 ` [Qemu-devel] " Marc Zyngier
2018-07-05 14:37                 ` Auger Eric
2018-07-05 14:37                   ` Auger Eric
2018-07-05 14:37                   ` [Qemu-devel] " Auger Eric
2018-06-29 11:15 ` [kvmtool test PATCH 23/24] kvmtool: arm64: Switch memory layout Suzuki K Poulose
2018-06-29 11:15   ` Suzuki K Poulose
2018-06-29 11:15   ` [Qemu-devel] " Suzuki K Poulose
2018-06-29 11:15 ` [kvmtool test PATCH 24/24] kvmtool: arm: Add support for creating VM with PA size Suzuki K Poulose
2018-06-29 11:15   ` Suzuki K Poulose
2018-06-29 11:15   ` [Qemu-devel] " Suzuki K Poulose
2018-07-04 14:22   ` Will Deacon
2018-07-04 14:22     ` Will Deacon
2018-07-04 14:22     ` [Qemu-devel] " Will Deacon
2018-07-04 14:41     ` Marc Zyngier
2018-07-04 14:41       ` Marc Zyngier
2018-07-04 14:41       ` Marc Zyngier
2018-07-04 14:41       ` [Qemu-devel] " Marc Zyngier
2018-07-04 15:51       ` Will Deacon
2018-07-04 15:51         ` Will Deacon
2018-07-04 15:51         ` [Qemu-devel] " Will Deacon
2018-07-05  7:51         ` Peter Maydell
2018-07-05  7:51           ` Peter Maydell
2018-07-05  7:51           ` [Qemu-devel] " Peter Maydell
2018-07-05  7:58           ` Auger Eric
2018-07-05  7:58             ` Auger Eric
2018-07-05  7:58             ` [Qemu-devel] " Auger Eric
2018-07-04 15:58     ` Suzuki K Poulose
2018-07-04 15:58       ` Suzuki K Poulose
2018-07-04 15:58       ` [Qemu-devel] " Suzuki K Poulose

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