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From: kbuild test robot <lkp@intel.com>
To: Christoph Hellwig <hch@lst.de>
Cc: kbuild-all@01.org, tglx@linutronix.de, palmer@sifive.com,
	jason@lakedaemon.net, marc.zyngier@arm.com, robh+dt@kernel.org,
	mark.rutland@arm.com, anup@brainfault.org, atish.patra@wdc.com,
	devicetree@vger.kernel.org, aou@eecs.berkeley.edu,
	linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org,
	shorne@gmail.com, Palmer Dabbelt <palmer@dabbelt.com>,
	Dmitriy Cherkasov <dmitriy@oss-tech.org>
Subject: Re: [PATCH 9/9] clocksource: new RISC-V SBI timer driver
Date: Sun, 29 Jul 2018 05:16:21 +0800	[thread overview]
Message-ID: <201807290553.B0ofZ6cm%fengguang.wu@intel.com> (raw)
In-Reply-To: <20180726143723.16585-10-hch@lst.de>

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Hi Palmer,

I love your patch! Yet something to improve:

[auto build test ERROR on linus/master]
[also build test ERROR on v4.18-rc6 next-20180727]
[if your patch is applied to the wrong git tree, please drop us a note to help improve the system]

url:    https://github.com/0day-ci/linux/commits/Christoph-Hellwig/RISC-V-remove-timer-leftovers/20180729-021511
config: powerpc64-allmodconfig (attached as .config)
compiler: powerpc64-linux-gnu-gcc (Debian 7.2.0-11) 7.2.0
reproduce:
        wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
        chmod +x ~/bin/make.cross
        # save the attached .config to linux build tree
        GCC_VERSION=7.2.0 make.cross ARCH=powerpc64 

All errors (new ones prefixed by >>):

>> drivers/clocksource/riscv_timer.c:11:10: fatal error: asm/sbi.h: No such file or directory
    #include <asm/sbi.h>
             ^~~~~~~~~~~
   compilation terminated.

vim +11 drivers/clocksource/riscv_timer.c

  > 11	#include <asm/sbi.h>
    12	

---
0-DAY kernel test infrastructure                Open Source Technology Center
https://lists.01.org/pipermail/kbuild-all                   Intel Corporation

[-- Attachment #2: .config.gz --]
[-- Type: application/gzip, Size: 57495 bytes --]

WARNING: multiple messages have this Message-ID (diff)
From: lkp@intel.com (kbuild test robot)
To: linux-riscv@lists.infradead.org
Subject: [PATCH 9/9] clocksource: new RISC-V SBI timer driver
Date: Sun, 29 Jul 2018 05:16:21 +0800	[thread overview]
Message-ID: <201807290553.B0ofZ6cm%fengguang.wu@intel.com> (raw)
In-Reply-To: <20180726143723.16585-10-hch@lst.de>

Hi Palmer,

I love your patch! Yet something to improve:

[auto build test ERROR on linus/master]
[also build test ERROR on v4.18-rc6 next-20180727]
[if your patch is applied to the wrong git tree, please drop us a note to help improve the system]

url:    https://github.com/0day-ci/linux/commits/Christoph-Hellwig/RISC-V-remove-timer-leftovers/20180729-021511
config: powerpc64-allmodconfig (attached as .config)
compiler: powerpc64-linux-gnu-gcc (Debian 7.2.0-11) 7.2.0
reproduce:
        wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
        chmod +x ~/bin/make.cross
        # save the attached .config to linux build tree
        GCC_VERSION=7.2.0 make.cross ARCH=powerpc64 

All errors (new ones prefixed by >>):

>> drivers/clocksource/riscv_timer.c:11:10: fatal error: asm/sbi.h: No such file or directory
    #include <asm/sbi.h>
             ^~~~~~~~~~~
   compilation terminated.

vim +11 drivers/clocksource/riscv_timer.c

  > 11	#include <asm/sbi.h>
    12	

---
0-DAY kernel test infrastructure                Open Source Technology Center
https://lists.01.org/pipermail/kbuild-all                   Intel Corporation
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  parent reply	other threads:[~2018-07-28 21:17 UTC|newest]

Thread overview: 84+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-07-26 14:37 RFC: simplified RISC-V interrupt and clocksource handling Christoph Hellwig
2018-07-26 14:37 ` Christoph Hellwig
2018-07-26 14:37 ` Christoph Hellwig
2018-07-26 14:37 ` [PATCH 1/9] RISC-V: remove timer leftovers Christoph Hellwig
2018-07-26 14:37   ` Christoph Hellwig
2018-07-26 14:37   ` Christoph Hellwig
2018-07-26 14:37 ` [PATCH 2/9] RISC-V: simplify software interrupt / IPI code Christoph Hellwig
2018-07-26 14:37   ` Christoph Hellwig
2018-07-26 14:37   ` Christoph Hellwig
2018-07-26 14:37 ` [PATCH 3/9] RISC-V: remove INTERRUPT_CAUSE_* defines from asm/irq.h Christoph Hellwig
2018-07-26 14:37   ` Christoph Hellwig
2018-07-26 14:37   ` Christoph Hellwig
2018-07-26 14:37 ` [PATCH 4/9] RISC-V: add a definition for the SIE SEIE bit Christoph Hellwig
2018-07-26 14:37   ` Christoph Hellwig
2018-07-26 14:37   ` Christoph Hellwig
2018-07-26 14:37 ` [PATCH 5/9] RISC-V: implement low-level interrupt handling Christoph Hellwig
2018-07-26 14:37   ` Christoph Hellwig
2018-07-26 14:37   ` Christoph Hellwig
2018-08-02  9:48   ` Thomas Gleixner
2018-08-02  9:48     ` Thomas Gleixner
2018-08-02  9:59     ` Christoph Hellwig
2018-08-02  9:59       ` Christoph Hellwig
2018-07-26 14:37 ` [PATCH 6/9] RISC-V: Support per-hart timebase-frequency Christoph Hellwig
2018-07-26 14:37   ` Christoph Hellwig
2018-07-26 14:37   ` Christoph Hellwig
2018-07-26 14:37 ` [PATCH 7/9] irqchip: add a RISC-V PLIC driver Christoph Hellwig
2018-07-26 14:37   ` Christoph Hellwig
2018-07-26 14:37   ` Christoph Hellwig
2018-07-28  0:04   ` Atish Patra
2018-07-28  0:04     ` Atish Patra
2018-07-30 15:51     ` Anup Patel
2018-07-30 15:51       ` Anup Patel
2018-07-31  3:21     ` Atish Patra
2018-07-31  3:21       ` Atish Patra
2018-07-31  3:21       ` Atish Patra
2018-07-31 16:57       ` Christoph Hellwig
2018-07-31 16:57         ` Christoph Hellwig
2018-08-01  0:38         ` Atish Patra
2018-08-01  0:38           ` Atish Patra
2018-08-01  0:38           ` Atish Patra
2018-08-01  7:14           ` Christoph Hellwig
2018-08-01  7:14             ` Christoph Hellwig
2018-08-01 12:16           ` Christoph Hellwig
2018-08-01 12:16             ` Christoph Hellwig
2018-08-02  1:09             ` Atish Patra
2018-08-02  1:09               ` Atish Patra
2018-08-02  9:53               ` Christoph Hellwig
2018-08-02  9:53                 ` Christoph Hellwig
2018-08-01 14:18           ` Christoph Hellwig
2018-08-01 14:18             ` Christoph Hellwig
2018-08-02  1:02             ` Atish Patra
2018-08-02  1:02               ` Atish Patra
2018-08-02  9:50               ` Christoph Hellwig
2018-08-02  9:50                 ` Christoph Hellwig
2018-07-31 16:37     ` Christoph Hellwig
2018-07-31 16:37       ` Christoph Hellwig
2018-08-02 10:04   ` Thomas Gleixner
2018-08-02 10:04     ` Thomas Gleixner
2018-08-02 11:51     ` Christoph Hellwig
2018-08-02 11:51       ` Christoph Hellwig
2018-07-26 14:37 ` [PATCH 8/9] dt-bindings: interrupt-controller: RISC-V PLIC documentation Christoph Hellwig
2018-07-26 14:37   ` Christoph Hellwig
2018-07-26 14:37   ` Christoph Hellwig
2018-08-02  7:24   ` Nikolay Borisov
2018-08-02  7:24     ` Nikolay Borisov
2018-08-02  9:52     ` Christoph Hellwig
2018-08-02  9:52       ` Christoph Hellwig
2018-07-26 14:37 ` [PATCH 9/9] clocksource: new RISC-V SBI timer driver Christoph Hellwig
2018-07-26 14:37   ` Christoph Hellwig
2018-07-26 14:37   ` Christoph Hellwig
2018-07-26 18:51   ` Atish Patra
2018-07-26 18:51     ` Atish Patra
2018-07-27 14:41     ` Christoph Hellwig
2018-07-27 14:41       ` Christoph Hellwig
2018-07-27 17:44       ` Atish Patra
2018-07-27 17:44         ` Atish Patra
2018-07-28 21:12   ` kbuild test robot
2018-07-28 21:12     ` kbuild test robot
2018-07-28 21:16   ` kbuild test robot [this message]
2018-07-28 21:16     ` kbuild test robot
2018-07-26 23:38 ` RFC: simplified RISC-V interrupt and clocksource handling Atish Patra
2018-07-26 23:38   ` Atish Patra
2018-07-27 14:44   ` Christoph Hellwig
2018-07-27 14:44     ` Christoph Hellwig

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