[v3,3/3] dmaengine: imx-sdma: allocate max 20 bds for one transfer

[v3,3/3] dmaengine: imx-sdma: allocate max 20 bds for one transfer

[Lucas Stach]

Am Dienstag, den 24.07.2018, 01:46 +0800 schrieb Robin Gong:
> If multi-bds used in one transfer, all bds should be consisten
> memory.To easily follow it, enlarge the dma pool size into 20 bds,
> and it will report error if the number of bds is over than 20. For
> dmatest, the max count for single transfer is NUM_BD *
> SDMA_BD_MAX_CNT = 20 * 65535 = ~1.28MB.

Both the commit message and the comment need a lot more care to
actually tell what this commit is trying to achieve. Currently I don't
follow at all. What does "consisten" mean? Do you mean BDs should be
contiguous in memory?

What do you gain by over-allocating each BD by a factor of 20?

Regards,
Lucas

> Signed-off-by: Robin Gong <yibin.gong@nxp.com>
> ---
>  drivers/dma/imx-sdma.c | 17 ++++++++++++++++-
>  1 file changed, 16 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/dma/imx-sdma.c b/drivers/dma/imx-sdma.c
> index b4ec2d2..5973489 100644
> --- a/drivers/dma/imx-sdma.c
> +++ b/drivers/dma/imx-sdma.c
> @@ -298,6 +298,15 @@ struct sdma_context_data {
> >  	u32  scratch7;
>  } __attribute__ ((packed));
>  
> +/*
> + * All bds in one transfer should be consitent on SDMA. To easily follow it,just
> + * set the dma pool size as the enough bds. For example, in dmatest case, the
> + * max 20 bds means the max for single transfer is NUM_BD * SDMA_BD_MAX_CNT = 20
> + * * 65535 = ~1.28MB. 20 bds supposed to be enough basically.If it's still not
> + * enough in some specific cases, enlarge it here.Warning message would also
> + * appear if the bd numbers is over than 20.
> + */
> +#define NUM_BD 20
>  
>  struct sdma_engine;
>  
> @@ -1273,7 +1282,7 @@ static int sdma_alloc_chan_resources(struct dma_chan *chan)
> >  		goto disable_clk_ahb;
>  
> >  	sdmac->bd_pool = dma_pool_create("bd_pool", chan->device->dev,
> > -				sizeof(struct sdma_buffer_descriptor),
> > +				NUM_BD * sizeof(struct sdma_buffer_descriptor),
> >  				32, 0);
>  
> >  	return 0;
> @@ -1314,6 +1323,12 @@ static struct sdma_desc *sdma_transfer_init(struct sdma_channel *sdmac,
>  {
> >  	struct sdma_desc *desc;
>  
> > +	if (bds > NUM_BD) {
> > +		dev_err(sdmac->sdma->dev, "%d bds exceed the max %d\n",
> > +			bds, NUM_BD);
> > +		goto err_out;
> > +	}
> +
> >  	desc = kzalloc((sizeof(*desc)), GFP_NOWAIT);
> >  	if (!desc)
> >  		goto err_out;
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Re: [PATCH v3 3/3] dmaengine: imx-sdma: allocate max 20 bds for one transfer

[Lucas Stach]

Am Dienstag, den 24.07.2018, 01:46 +0800 schrieb Robin Gong:
> If multi-bds used in one transfer, all bds should be consisten
> memory.To easily follow it, enlarge the dma pool size into 20 bds,
> and it will report error if the number of bds is over than 20. For
> dmatest, the max count for single transfer is NUM_BD *
> SDMA_BD_MAX_CNT = 20 * 65535 = ~1.28MB.

Both the commit message and the comment need a lot more care to
actually tell what this commit is trying to achieve. Currently I don't
follow at all. What does "consisten" mean? Do you mean BDs should be
contiguous in memory?

What do you gain by over-allocating each BD by a factor of 20?

Regards,
Lucas

> Signed-off-by: Robin Gong <yibin.gong@nxp.com>
> ---
>  drivers/dma/imx-sdma.c | 17 ++++++++++++++++-
>  1 file changed, 16 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/dma/imx-sdma.c b/drivers/dma/imx-sdma.c
> index b4ec2d2..5973489 100644
> --- a/drivers/dma/imx-sdma.c
> +++ b/drivers/dma/imx-sdma.c
> @@ -298,6 +298,15 @@ struct sdma_context_data {
> >  	u32  scratch7;
>  } __attribute__ ((packed));
>  
> +/*
> + * All bds in one transfer should be consitent on SDMA. To easily follow it,just
> + * set the dma pool size as the enough bds. For example, in dmatest case, the
> + * max 20 bds means the max for single transfer is NUM_BD * SDMA_BD_MAX_CNT = 20
> + * * 65535 = ~1.28MB. 20 bds supposed to be enough basically.If it's still not
> + * enough in some specific cases, enlarge it here.Warning message would also
> + * appear if the bd numbers is over than 20.
> + */
> +#define NUM_BD 20
>  
>  struct sdma_engine;
>  
> @@ -1273,7 +1282,7 @@ static int sdma_alloc_chan_resources(struct dma_chan *chan)
> >  		goto disable_clk_ahb;
>  
> >  	sdmac->bd_pool = dma_pool_create("bd_pool", chan->device->dev,
> > -				sizeof(struct sdma_buffer_descriptor),
> > +				NUM_BD * sizeof(struct sdma_buffer_descriptor),
> >  				32, 0);
>  
> >  	return 0;
> @@ -1314,6 +1323,12 @@ static struct sdma_desc *sdma_transfer_init(struct sdma_channel *sdmac,
>  {
> >  	struct sdma_desc *desc;
>  
> > +	if (bds > NUM_BD) {
> > +		dev_err(sdmac->sdma->dev, "%d bds exceed the max %d\n",
> > +			bds, NUM_BD);
> > +		goto err_out;
> > +	}
> +
> >  	desc = kzalloc((sizeof(*desc)), GFP_NOWAIT);
> >  	if (!desc)
> >  		goto err_out;

[PATCH v3 3/3] dmaengine: imx-sdma: allocate max 20 bds for one transfer

[Lucas Stach]

Am Dienstag, den 24.07.2018, 01:46 +0800 schrieb Robin Gong:
> If multi-bds used in one transfer, all bds should be consisten
> memory.To easily follow it, enlarge the dma pool size into 20 bds,
> and it will report error if the number of bds is over than 20. For
> dmatest, the max count for single transfer is NUM_BD *
> SDMA_BD_MAX_CNT = 20 * 65535 = ~1.28MB.

Both the commit message and the comment need a lot more care to
actually tell what this commit is trying to achieve. Currently I don't
follow at all. What does "consisten" mean? Do you mean BDs should be
contiguous in memory?

What do you gain by over-allocating each BD by a factor of 20?

Regards,
Lucas

> Signed-off-by: Robin Gong <yibin.gong@nxp.com>
> ---
> ?drivers/dma/imx-sdma.c | 17 ++++++++++++++++-
> ?1 file changed, 16 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/dma/imx-sdma.c b/drivers/dma/imx-sdma.c
> index b4ec2d2..5973489 100644
> --- a/drivers/dma/imx-sdma.c
> +++ b/drivers/dma/imx-sdma.c
> @@ -298,6 +298,15 @@ struct sdma_context_data {
> > ?	u32??scratch7;
> ?} __attribute__ ((packed));
> ?
> +/*
> + * All bds in one transfer should be consitent on SDMA. To easily follow it,just
> + * set the dma pool size as the enough bds. For example, in dmatest case, the
> + * max 20 bds means the max for single transfer is NUM_BD * SDMA_BD_MAX_CNT = 20
> + * * 65535 = ~1.28MB. 20 bds supposed to be enough basically.If it's still not
> + * enough in some specific cases, enlarge it here.Warning message would also
> + * appear if the bd numbers is over than 20.
> + */
> +#define NUM_BD 20
> ?
> ?struct sdma_engine;
> ?
> @@ -1273,7 +1282,7 @@ static int sdma_alloc_chan_resources(struct dma_chan *chan)
> > ?		goto disable_clk_ahb;
> ?
> > ?	sdmac->bd_pool = dma_pool_create("bd_pool", chan->device->dev,
> > -				sizeof(struct sdma_buffer_descriptor),
> > +				NUM_BD * sizeof(struct sdma_buffer_descriptor),
> > ?				32, 0);
> ?
> > ?	return 0;
> @@ -1314,6 +1323,12 @@ static struct sdma_desc *sdma_transfer_init(struct sdma_channel *sdmac,
> ?{
> > ?	struct sdma_desc *desc;
> ?
> > +	if (bds > NUM_BD) {
> > +		dev_err(sdmac->sdma->dev, "%d bds exceed the max %d\n",
> > +			bds, NUM_BD);
> > +		goto err_out;
> > +	}
> +
> > ?	desc = kzalloc((sizeof(*desc)), GFP_NOWAIT);
> > ?	if (!desc)
> > ?		goto err_out;

[v3,3/3] dmaengine: imx-sdma: allocate max 20 bds for one transfer

[Robin Gong]

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RE: [PATCH v3 3/3] dmaengine: imx-sdma: allocate max 20 bds for one transfer

[Robin Gong]

> -----Original Message-----
> From: Lucas Stach [mailto:l.stach@pengutronix.de]
> Sent: 2018年7月23日 18:54
> To: Robin Gong <yibin.gong@nxp.com>; vkoul@kernel.org;
> dan.j.williams@intel.com; s.hauer@pengutronix.de; linux@armlinux.org.uk
> Cc: dmaengine@vger.kernel.org; dl-linux-imx <linux-imx@nxp.com>;
> kernel@pengutronix.de; linux-arm-kernel@lists.infradead.org;
> linux-kernel@vger.kernel.org
> Subject: Re: [PATCH v3 3/3] dmaengine: imx-sdma: allocate max 20 bds for one
> transfer
> 
> Am Dienstag, den 24.07.2018, 01:46 +0800 schrieb Robin Gong:
> > If multi-bds used in one transfer, all bds should be consisten
> > memory.To easily follow it, enlarge the dma pool size into 20 bds, and
> > it will report error if the number of bds is over than 20. For
> > dmatest, the max count for single transfer is NUM_BD *
> SDMA_BD_MAX_CNT
> > = 20 * 65535 = ~1.28MB.
> 
> Both the commit message and the comment need a lot more care to actually
> tell what this commit is trying to achieve. Currently I don't follow at all. What
> does "consisten" mean? Do you mean BDs should be contiguous in memory?
Yes, BDs should be contiguous  one by one in memory.
> 
> What do you gain by over-allocating each BD by a factor of 20?
I guess dma_pool_alloc will return error in such case, and then cause dma setup
transfer failure.
> 
> Regards,
> Lucas
> 
> > Signed-off-by: Robin Gong <yibin.gong@nxp.com>
> > ---
> >  drivers/dma/imx-sdma.c | 17 ++++++++++++++++-
> >  1 file changed, 16 insertions(+), 1 deletion(-)
> >
> > diff --git a/drivers/dma/imx-sdma.c b/drivers/dma/imx-sdma.c index
> > b4ec2d2..5973489 100644
> > --- a/drivers/dma/imx-sdma.c
> > +++ b/drivers/dma/imx-sdma.c
> > @@ -298,6 +298,15 @@ struct sdma_context_data {
> > >  	u32  scratch7;
> >  } __attribute__ ((packed));
> >
> > +/*
> > + * All bds in one transfer should be consitent on SDMA. To easily
> > +follow it,just
> > + * set the dma pool size as the enough bds. For example, in dmatest
> > +case, the
> > + * max 20 bds means the max for single transfer is NUM_BD *
> > +SDMA_BD_MAX_CNT = 20
> > + * * 65535 = ~1.28MB. 20 bds supposed to be enough basically.If it's
> > +still not
> > + * enough in some specific cases, enlarge it here.Warning message
> > +would also
> > + * appear if the bd numbers is over than 20.
> > + */
> > +#define NUM_BD 20
> >
> >  struct sdma_engine;
> >
> > @@ -1273,7 +1282,7 @@ static int sdma_alloc_chan_resources(struct
> > dma_chan *chan)
> > >  		goto disable_clk_ahb;
> >
> > >  	sdmac->bd_pool = dma_pool_create("bd_pool", chan->device->dev,
> > > -				sizeof(struct sdma_buffer_descriptor),
> > > +				NUM_BD * sizeof(struct sdma_buffer_descriptor),
> > >  				32, 0);
> >
> > >  	return 0;
> > @@ -1314,6 +1323,12 @@ static struct sdma_desc
> > *sdma_transfer_init(struct sdma_channel *sdmac,
> >  {
> > >  	struct sdma_desc *desc;
> >
> > > +	if (bds > NUM_BD) {
> > > +		dev_err(sdmac->sdma->dev, "%d bds exceed the max %d\n",
> > > +			bds, NUM_BD);
> > > +		goto err_out;
> > > +	}
> > +
> > >  	desc = kzalloc((sizeof(*desc)), GFP_NOWAIT);
> > >  	if (!desc)
> > >  		goto err_out;

[PATCH v3 3/3] dmaengine: imx-sdma: allocate max 20 bds for one transfer

[Robin Gong]

> -----Original Message-----
> From: Lucas Stach [mailto:l.stach at pengutronix.de]
> Sent: 2018?7?23? 18:54
> To: Robin Gong <yibin.gong@nxp.com>; vkoul at kernel.org;
> dan.j.williams at intel.com; s.hauer at pengutronix.de; linux at armlinux.org.uk
> Cc: dmaengine at vger.kernel.org; dl-linux-imx <linux-imx@nxp.com>;
> kernel at pengutronix.de; linux-arm-kernel at lists.infradead.org;
> linux-kernel at vger.kernel.org
> Subject: Re: [PATCH v3 3/3] dmaengine: imx-sdma: allocate max 20 bds for one
> transfer
> 
> Am Dienstag, den 24.07.2018, 01:46 +0800 schrieb Robin Gong:
> > If multi-bds used in one transfer, all bds should be consisten
> > memory.To easily follow it, enlarge the dma pool size into 20 bds, and
> > it will report error if the number of bds is over than 20. For
> > dmatest, the max count for single transfer is NUM_BD *
> SDMA_BD_MAX_CNT
> > = 20 * 65535 = ~1.28MB.
> 
> Both the commit message and the comment need a lot more care to actually
> tell what this commit is trying to achieve. Currently I don't follow at all. What
> does "consisten" mean? Do you mean BDs should be contiguous in memory?
Yes, BDs should be contiguous  one by one in memory.
> 
> What do you gain by over-allocating each BD by a factor of 20?
I guess dma_pool_alloc will return error in such case, and then cause dma setup
transfer failure.
> 
> Regards,
> Lucas
> 
> > Signed-off-by: Robin Gong <yibin.gong@nxp.com>
> > ---
> > ?drivers/dma/imx-sdma.c | 17 ++++++++++++++++-
> > ?1 file changed, 16 insertions(+), 1 deletion(-)
> >
> > diff --git a/drivers/dma/imx-sdma.c b/drivers/dma/imx-sdma.c index
> > b4ec2d2..5973489 100644
> > --- a/drivers/dma/imx-sdma.c
> > +++ b/drivers/dma/imx-sdma.c
> > @@ -298,6 +298,15 @@ struct sdma_context_data {
> > > ?	u32??scratch7;
> > ?} __attribute__ ((packed));
> >
> > +/*
> > + * All bds in one transfer should be consitent on SDMA. To easily
> > +follow it,just
> > + * set the dma pool size as the enough bds. For example, in dmatest
> > +case, the
> > + * max 20 bds means the max for single transfer is NUM_BD *
> > +SDMA_BD_MAX_CNT = 20
> > + * * 65535 = ~1.28MB. 20 bds supposed to be enough basically.If it's
> > +still not
> > + * enough in some specific cases, enlarge it here.Warning message
> > +would also
> > + * appear if the bd numbers is over than 20.
> > + */
> > +#define NUM_BD 20
> >
> > ?struct sdma_engine;
> >
> > @@ -1273,7 +1282,7 @@ static int sdma_alloc_chan_resources(struct
> > dma_chan *chan)
> > > ?		goto disable_clk_ahb;
> >
> > > ?	sdmac->bd_pool = dma_pool_create("bd_pool", chan->device->dev,
> > > -				sizeof(struct sdma_buffer_descriptor),
> > > +				NUM_BD * sizeof(struct sdma_buffer_descriptor),
> > > ?				32, 0);
> >
> > > ?	return 0;
> > @@ -1314,6 +1323,12 @@ static struct sdma_desc
> > *sdma_transfer_init(struct sdma_channel *sdmac,
> > ?{
> > > ?	struct sdma_desc *desc;
> >
> > > +	if (bds > NUM_BD) {
> > > +		dev_err(sdmac->sdma->dev, "%d bds exceed the max %d\n",
> > > +			bds, NUM_BD);
> > > +		goto err_out;
> > > +	}
> > +
> > > ?	desc = kzalloc((sizeof(*desc)), GFP_NOWAIT);
> > > ?	if (!desc)
> > > ?		goto err_out;

[PATCH v3 0/3] add memcpy support for sdma

[Robin Gong]

This patchset is to add memcpy interface for imx-sdma, besides,to
support dmatest and enable config by default, so that could test dma
easily without any other device support such as uart/audio/spi...

Change from v2:
  1. remove 'copy_align' since sdma script for memory_2_memory will handle
     such align issue. No such align limitation. Also remove bus width
     description in bd.
  2. for multi bds case such as in dmatest, should make sure all bds of 
     single transfer should be consistent, so enlarge allocated size for
     dma pool to max bds, 20 bds/1.28MB should be enough for all case.Report
     error if the bd number exceed 20.

Change from v1:
  1. remove bus_width check for memcpy since only max bus width needed for
     memcpy case to speedup copy.
  2. remove DMATEST support patch, since DMATEST is a common memcpy case.
  3. split to single patch for SDMA_BD_MAX_CNT instead of '0xffff'
  4. move sdma_config_ownership() from alloc_chan into sdma_prep_memcpy.
  5. address some minor review comments.

Robin Gong (3):
  dmaengine: imx-sdma: add SDMA_BD_MAX_CNT to replace '0xffff'
  dmaengine: imx-sdma: add memcpy interface
  dmaengine: imx-sdma: allocate max 20 bds for one transfer

 drivers/dma/imx-sdma.c | 121 +++++++++++++++++++++++++++++++++++++++++++++----
 1 file changed, 112 insertions(+), 9 deletions(-)

-- 
2.7.4

[PATCH v3 0/3] add memcpy support for sdma

[Robin Gong]

This patchset is to add memcpy interface for imx-sdma, besides,to
support dmatest and enable config by default, so that could test dma
easily without any other device support such as uart/audio/spi...

Change from v2:
  1. remove 'copy_align' since sdma script for memory_2_memory will handle
     such align issue. No such align limitation. Also remove bus width
     description in bd.
  2. for multi bds case such as in dmatest, should make sure all bds of 
     single transfer should be consistent, so enlarge allocated size for
     dma pool to max bds, 20 bds/1.28MB should be enough for all case.Report
     error if the bd number exceed 20.

Change from v1:
  1. remove bus_width check for memcpy since only max bus width needed for
     memcpy case to speedup copy.
  2. remove DMATEST support patch, since DMATEST is a common memcpy case.
  3. split to single patch for SDMA_BD_MAX_CNT instead of '0xffff'
  4. move sdma_config_ownership() from alloc_chan into sdma_prep_memcpy.
  5. address some minor review comments.

Robin Gong (3):
  dmaengine: imx-sdma: add SDMA_BD_MAX_CNT to replace '0xffff'
  dmaengine: imx-sdma: add memcpy interface
  dmaengine: imx-sdma: allocate max 20 bds for one transfer

 drivers/dma/imx-sdma.c | 121 +++++++++++++++++++++++++++++++++++++++++++++----
 1 file changed, 112 insertions(+), 9 deletions(-)

-- 
2.7.4

[v3,1/3] dmaengine: imx-sdma: add SDMA_BD_MAX_CNT to replace '0xffff'

[Robin Gong]

Add macro SDMA_BD_MAX_CNT to replace '0xffff'.

Signed-off-by: Robin Gong <yibin.gong@nxp.com>
---
 drivers/dma/imx-sdma.c | 11 ++++++-----
 1 file changed, 6 insertions(+), 5 deletions(-)

diff --git a/drivers/dma/imx-sdma.c b/drivers/dma/imx-sdma.c
index 3b622d6..e3d5e73 100644
--- a/drivers/dma/imx-sdma.c
+++ b/drivers/dma/imx-sdma.c
@@ -185,6 +185,7 @@
  * Mode/Count of data node descriptors - IPCv2
  */
 struct sdma_mode_count {
+#define SDMA_BD_MAX_CNT	0xffff
 	u32 count   : 16; /* size of the buffer pointed by this BD */
 	u32 status  :  8; /* E,R,I,C,W,D status bits stored here */
 	u32 command :  8; /* command mostly used for channel 0 */
@@ -1344,9 +1345,9 @@ static struct dma_async_tx_descriptor *sdma_prep_slave_sg(
 
 		count = sg_dma_len(sg);
 
-		if (count > 0xffff) {
+		if (count > SDMA_BD_MAX_CNT) {
 			dev_err(sdma->dev, "SDMA channel %d: maximum bytes for sg entry exceeded: %d > %d\n",
-					channel, count, 0xffff);
+					channel, count, SDMA_BD_MAX_CNT);
 			goto err_bd_out;
 		}
 
@@ -1421,9 +1422,9 @@ static struct dma_async_tx_descriptor *sdma_prep_dma_cyclic(
 
 	sdmac->flags |= IMX_DMA_SG_LOOP;
 
-	if (period_len > 0xffff) {
+	if (period_len > SDMA_BD_MAX_CNT) {
 		dev_err(sdma->dev, "SDMA channel %d: maximum period size exceeded: %zu > %d\n",
-				channel, period_len, 0xffff);
+				channel, period_len, SDMA_BD_MAX_CNT);
 		goto err_bd_out;
 	}
 
@@ -1970,7 +1971,7 @@ static int sdma_probe(struct platform_device *pdev)
 	sdma->dma_device.residue_granularity = DMA_RESIDUE_GRANULARITY_SEGMENT;
 	sdma->dma_device.device_issue_pending = sdma_issue_pending;
 	sdma->dma_device.dev->dma_parms = &sdma->dma_parms;
-	dma_set_max_seg_size(sdma->dma_device.dev, 65535);
+	dma_set_max_seg_size(sdma->dma_device.dev, SDMA_BD_MAX_CNT);
 
 	platform_set_drvdata(pdev, sdma);
 

[PATCH v3 1/3] dmaengine: imx-sdma: add SDMA_BD_MAX_CNT to replace '0xffff'

[Robin Gong]

Add macro SDMA_BD_MAX_CNT to replace '0xffff'.

Signed-off-by: Robin Gong <yibin.gong@nxp.com>
---
 drivers/dma/imx-sdma.c | 11 ++++++-----
 1 file changed, 6 insertions(+), 5 deletions(-)

diff --git a/drivers/dma/imx-sdma.c b/drivers/dma/imx-sdma.c
index 3b622d6..e3d5e73 100644
--- a/drivers/dma/imx-sdma.c
+++ b/drivers/dma/imx-sdma.c
@@ -185,6 +185,7 @@
  * Mode/Count of data node descriptors - IPCv2
  */
 struct sdma_mode_count {
+#define SDMA_BD_MAX_CNT	0xffff
 	u32 count   : 16; /* size of the buffer pointed by this BD */
 	u32 status  :  8; /* E,R,I,C,W,D status bits stored here */
 	u32 command :  8; /* command mostly used for channel 0 */
@@ -1344,9 +1345,9 @@ static struct dma_async_tx_descriptor *sdma_prep_slave_sg(
 
 		count = sg_dma_len(sg);
 
-		if (count > 0xffff) {
+		if (count > SDMA_BD_MAX_CNT) {
 			dev_err(sdma->dev, "SDMA channel %d: maximum bytes for sg entry exceeded: %d > %d\n",
-					channel, count, 0xffff);
+					channel, count, SDMA_BD_MAX_CNT);
 			goto err_bd_out;
 		}
 
@@ -1421,9 +1422,9 @@ static struct dma_async_tx_descriptor *sdma_prep_dma_cyclic(
 
 	sdmac->flags |= IMX_DMA_SG_LOOP;
 
-	if (period_len > 0xffff) {
+	if (period_len > SDMA_BD_MAX_CNT) {
 		dev_err(sdma->dev, "SDMA channel %d: maximum period size exceeded: %zu > %d\n",
-				channel, period_len, 0xffff);
+				channel, period_len, SDMA_BD_MAX_CNT);
 		goto err_bd_out;
 	}
 
@@ -1970,7 +1971,7 @@ static int sdma_probe(struct platform_device *pdev)
 	sdma->dma_device.residue_granularity = DMA_RESIDUE_GRANULARITY_SEGMENT;
 	sdma->dma_device.device_issue_pending = sdma_issue_pending;
 	sdma->dma_device.dev->dma_parms = &sdma->dma_parms;
-	dma_set_max_seg_size(sdma->dma_device.dev, 65535);
+	dma_set_max_seg_size(sdma->dma_device.dev, SDMA_BD_MAX_CNT);
 
 	platform_set_drvdata(pdev, sdma);
 
-- 
2.7.4

[PATCH v3 1/3] dmaengine: imx-sdma: add SDMA_BD_MAX_CNT to replace '0xffff'

[Robin Gong]

Add macro SDMA_BD_MAX_CNT to replace '0xffff'.

Signed-off-by: Robin Gong <yibin.gong@nxp.com>
---
 drivers/dma/imx-sdma.c | 11 ++++++-----
 1 file changed, 6 insertions(+), 5 deletions(-)

diff --git a/drivers/dma/imx-sdma.c b/drivers/dma/imx-sdma.c
index 3b622d6..e3d5e73 100644
--- a/drivers/dma/imx-sdma.c
+++ b/drivers/dma/imx-sdma.c
@@ -185,6 +185,7 @@
  * Mode/Count of data node descriptors - IPCv2
  */
 struct sdma_mode_count {
+#define SDMA_BD_MAX_CNT	0xffff
 	u32 count   : 16; /* size of the buffer pointed by this BD */
 	u32 status  :  8; /* E,R,I,C,W,D status bits stored here */
 	u32 command :  8; /* command mostly used for channel 0 */
@@ -1344,9 +1345,9 @@ static struct dma_async_tx_descriptor *sdma_prep_slave_sg(
 
 		count = sg_dma_len(sg);
 
-		if (count > 0xffff) {
+		if (count > SDMA_BD_MAX_CNT) {
 			dev_err(sdma->dev, "SDMA channel %d: maximum bytes for sg entry exceeded: %d > %d\n",
-					channel, count, 0xffff);
+					channel, count, SDMA_BD_MAX_CNT);
 			goto err_bd_out;
 		}
 
@@ -1421,9 +1422,9 @@ static struct dma_async_tx_descriptor *sdma_prep_dma_cyclic(
 
 	sdmac->flags |= IMX_DMA_SG_LOOP;
 
-	if (period_len > 0xffff) {
+	if (period_len > SDMA_BD_MAX_CNT) {
 		dev_err(sdma->dev, "SDMA channel %d: maximum period size exceeded: %zu > %d\n",
-				channel, period_len, 0xffff);
+				channel, period_len, SDMA_BD_MAX_CNT);
 		goto err_bd_out;
 	}
 
@@ -1970,7 +1971,7 @@ static int sdma_probe(struct platform_device *pdev)
 	sdma->dma_device.residue_granularity = DMA_RESIDUE_GRANULARITY_SEGMENT;
 	sdma->dma_device.device_issue_pending = sdma_issue_pending;
 	sdma->dma_device.dev->dma_parms = &sdma->dma_parms;
-	dma_set_max_seg_size(sdma->dma_device.dev, 65535);
+	dma_set_max_seg_size(sdma->dma_device.dev, SDMA_BD_MAX_CNT);
 
 	platform_set_drvdata(pdev, sdma);
 
-- 
2.7.4

[v3,2/3] dmaengine: imx-sdma: add memcpy interface

[Robin Gong]

Add MEMCPY capability for imx-sdma driver.

Signed-off-by: Robin Gong <yibin.gong@nxp.com>
---
 drivers/dma/imx-sdma.c | 93 ++++++++++++++++++++++++++++++++++++++++++++++++--
 1 file changed, 90 insertions(+), 3 deletions(-)

diff --git a/drivers/dma/imx-sdma.c b/drivers/dma/imx-sdma.c
index e3d5e73..b4ec2d2 100644
--- a/drivers/dma/imx-sdma.c
+++ b/drivers/dma/imx-sdma.c
@@ -342,6 +342,7 @@ struct sdma_desc {
  * @pc_from_device:	script address for those device_2_memory
  * @pc_to_device:	script address for those memory_2_device
  * @device_to_device:	script address for those device_2_device
+ * @pc_to_pc:		script address for those memory_2_memory
  * @flags:		loop mode or not
  * @per_address:	peripheral source or destination address in common case
  *                      destination address in p_2_p case
@@ -367,6 +368,7 @@ struct sdma_channel {
 	enum dma_slave_buswidth		word_size;
 	unsigned int			pc_from_device, pc_to_device;
 	unsigned int			device_to_device;
+	unsigned int                    pc_to_pc;
 	unsigned long			flags;
 	dma_addr_t			per_address, per_address2;
 	unsigned long			event_mask[2];
@@ -869,14 +871,16 @@ static void sdma_get_pc(struct sdma_channel *sdmac,
 	 * These are needed once we start to support transfers between
 	 * two peripherals or memory-to-memory transfers
 	 */
-	int per_2_per = 0;
+	int per_2_per = 0, emi_2_emi = 0;
 
 	sdmac->pc_from_device = 0;
 	sdmac->pc_to_device = 0;
 	sdmac->device_to_device = 0;
+	sdmac->pc_to_pc = 0;
 
 	switch (peripheral_type) {
 	case IMX_DMATYPE_MEMORY:
+		emi_2_emi = sdma->script_addrs->ap_2_ap_addr;
 		break;
 	case IMX_DMATYPE_DSP:
 		emi_2_per = sdma->script_addrs->bp_2_ap_addr;
@@ -949,6 +953,7 @@ static void sdma_get_pc(struct sdma_channel *sdmac,
 	sdmac->pc_from_device = per_2_emi;
 	sdmac->pc_to_device = emi_2_per;
 	sdmac->device_to_device = per_2_per;
+	sdmac->pc_to_pc = emi_2_emi;
 }
 
 static int sdma_load_context(struct sdma_channel *sdmac)
@@ -965,6 +970,8 @@ static int sdma_load_context(struct sdma_channel *sdmac)
 		load_address = sdmac->pc_from_device;
 	else if (sdmac->direction == DMA_DEV_TO_DEV)
 		load_address = sdmac->device_to_device;
+	else if (sdmac->direction == DMA_MEM_TO_MEM)
+		load_address = sdmac->pc_to_pc;
 	else
 		load_address = sdmac->pc_to_device;
 
@@ -1214,10 +1221,28 @@ static int sdma_alloc_chan_resources(struct dma_chan *chan)
 {
 	struct sdma_channel *sdmac = to_sdma_chan(chan);
 	struct imx_dma_data *data = chan->private;
+	struct imx_dma_data mem_data;
 	int prio, ret;
 
-	if (!data)
-		return -EINVAL;
+	/*
+	 * MEMCPY may never setup chan->private by filter function such as
+	 * dmatest, thus create 'struct imx_dma_data mem_data' for this case.
+	 * Please note in any other slave case, you have to setup chan->private
+	 * with 'struct imx_dma_data' in your own filter function if you want to
+	 * request dma channel by dma_request_channel() rather than
+	 * dma_request_slave_channel(). Othwise, 'MEMCPY in case?' will appear
+	 * to warn you to correct your filter function.
+	 */
+	if (!data) {
+		dev_dbg(sdmac->sdma->dev, "MEMCPY in case?\n");
+		mem_data.priority = 2;
+		mem_data.peripheral_type = IMX_DMATYPE_MEMORY;
+		mem_data.dma_request = 0;
+		mem_data.dma_request2 = 0;
+		data = &mem_data;
+
+		sdma_get_pc(sdmac, IMX_DMATYPE_MEMORY);
+	}
 
 	switch (data->priority) {
 	case DMA_PRIO_HIGH:
@@ -1307,6 +1332,10 @@ static struct sdma_desc *sdma_transfer_init(struct sdma_channel *sdmac,
 	if (sdma_alloc_bd(desc))
 		goto err_desc_out;
 
+	/* No slave_config called in MEMCPY case, so do here */
+	if (direction == DMA_MEM_TO_MEM)
+		sdma_config_ownership(sdmac, false, true, false);
+
 	if (sdma_load_context(sdmac))
 		goto err_desc_out;
 
@@ -1318,6 +1347,62 @@ static struct sdma_desc *sdma_transfer_init(struct sdma_channel *sdmac,
 	return NULL;
 }
 
+static struct dma_async_tx_descriptor *sdma_prep_memcpy(
+		struct dma_chan *chan, dma_addr_t dma_dst,
+		dma_addr_t dma_src, size_t len, unsigned long flags)
+{
+	struct sdma_channel *sdmac = to_sdma_chan(chan);
+	struct sdma_engine *sdma = sdmac->sdma;
+	int channel = sdmac->channel;
+	size_t count;
+	int i = 0, param;
+	struct sdma_buffer_descriptor *bd;
+	struct sdma_desc *desc;
+
+	if (!chan || !len)
+		return NULL;
+
+	dev_dbg(sdma->dev, "memcpy: %pad->%pad, len=%zu, channel=%d.\n",
+		&dma_src, &dma_dst, len, channel);
+
+	desc = sdma_transfer_init(sdmac, DMA_MEM_TO_MEM,
+					len / SDMA_BD_MAX_CNT + 1);
+	if (!desc)
+		return NULL;
+
+	do {
+		count = min_t(size_t, len, SDMA_BD_MAX_CNT);
+		bd = &desc->bd[i];
+		bd->buffer_addr = dma_src;
+		bd->ext_buffer_addr = dma_dst;
+		bd->mode.count = count;
+		desc->chn_count += count;
+		bd->mode.command = 0;
+
+		dma_src += count;
+		dma_dst += count;
+		len -= count;
+		i++;
+
+		param = BD_DONE | BD_EXTD | BD_CONT;
+		/* last bd */
+		if (!len) {
+			param |= BD_INTR;
+			param |= BD_LAST;
+			param &= ~BD_CONT;
+		}
+
+		dev_dbg(sdma->dev, "entry %d: count: %zd dma: 0x%x %s%s\n",
+				i, count, bd->buffer_addr,
+				param & BD_WRAP ? "wrap" : "",
+				param & BD_INTR ? " intr" : "");
+
+		bd->mode.status = param;
+	} while (len);
+
+	return vchan_tx_prep(&sdmac->vc, &desc->vd, flags);
+}
+
 static struct dma_async_tx_descriptor *sdma_prep_slave_sg(
 		struct dma_chan *chan, struct scatterlist *sgl,
 		unsigned int sg_len, enum dma_transfer_direction direction,
@@ -1903,6 +1988,7 @@ static int sdma_probe(struct platform_device *pdev)
 
 	dma_cap_set(DMA_SLAVE, sdma->dma_device.cap_mask);
 	dma_cap_set(DMA_CYCLIC, sdma->dma_device.cap_mask);
+	dma_cap_set(DMA_MEMCPY, sdma->dma_device.cap_mask);
 
 	INIT_LIST_HEAD(&sdma->dma_device.channels);
 	/* Initialize channel parameters */
@@ -1969,6 +2055,7 @@ static int sdma_probe(struct platform_device *pdev)
 	sdma->dma_device.dst_addr_widths = SDMA_DMA_BUSWIDTHS;
 	sdma->dma_device.directions = SDMA_DMA_DIRECTIONS;
 	sdma->dma_device.residue_granularity = DMA_RESIDUE_GRANULARITY_SEGMENT;
+	sdma->dma_device.device_prep_dma_memcpy = sdma_prep_memcpy;
 	sdma->dma_device.device_issue_pending = sdma_issue_pending;
 	sdma->dma_device.dev->dma_parms = &sdma->dma_parms;
 	dma_set_max_seg_size(sdma->dma_device.dev, SDMA_BD_MAX_CNT);

[PATCH v3 2/3] dmaengine: imx-sdma: add memcpy interface

[Robin Gong]

Add MEMCPY capability for imx-sdma driver.

Signed-off-by: Robin Gong <yibin.gong@nxp.com>
---
 drivers/dma/imx-sdma.c | 93 ++++++++++++++++++++++++++++++++++++++++++++++++--
 1 file changed, 90 insertions(+), 3 deletions(-)

diff --git a/drivers/dma/imx-sdma.c b/drivers/dma/imx-sdma.c
index e3d5e73..b4ec2d2 100644
--- a/drivers/dma/imx-sdma.c
+++ b/drivers/dma/imx-sdma.c
@@ -342,6 +342,7 @@ struct sdma_desc {
  * @pc_from_device:	script address for those device_2_memory
  * @pc_to_device:	script address for those memory_2_device
  * @device_to_device:	script address for those device_2_device
+ * @pc_to_pc:		script address for those memory_2_memory
  * @flags:		loop mode or not
  * @per_address:	peripheral source or destination address in common case
  *                      destination address in p_2_p case
@@ -367,6 +368,7 @@ struct sdma_channel {
 	enum dma_slave_buswidth		word_size;
 	unsigned int			pc_from_device, pc_to_device;
 	unsigned int			device_to_device;
+	unsigned int                    pc_to_pc;
 	unsigned long			flags;
 	dma_addr_t			per_address, per_address2;
 	unsigned long			event_mask[2];
@@ -869,14 +871,16 @@ static void sdma_get_pc(struct sdma_channel *sdmac,
 	 * These are needed once we start to support transfers between
 	 * two peripherals or memory-to-memory transfers
 	 */
-	int per_2_per = 0;
+	int per_2_per = 0, emi_2_emi = 0;
 
 	sdmac->pc_from_device = 0;
 	sdmac->pc_to_device = 0;
 	sdmac->device_to_device = 0;
+	sdmac->pc_to_pc = 0;
 
 	switch (peripheral_type) {
 	case IMX_DMATYPE_MEMORY:
+		emi_2_emi = sdma->script_addrs->ap_2_ap_addr;
 		break;
 	case IMX_DMATYPE_DSP:
 		emi_2_per = sdma->script_addrs->bp_2_ap_addr;
@@ -949,6 +953,7 @@ static void sdma_get_pc(struct sdma_channel *sdmac,
 	sdmac->pc_from_device = per_2_emi;
 	sdmac->pc_to_device = emi_2_per;
 	sdmac->device_to_device = per_2_per;
+	sdmac->pc_to_pc = emi_2_emi;
 }
 
 static int sdma_load_context(struct sdma_channel *sdmac)
@@ -965,6 +970,8 @@ static int sdma_load_context(struct sdma_channel *sdmac)
 		load_address = sdmac->pc_from_device;
 	else if (sdmac->direction == DMA_DEV_TO_DEV)
 		load_address = sdmac->device_to_device;
+	else if (sdmac->direction == DMA_MEM_TO_MEM)
+		load_address = sdmac->pc_to_pc;
 	else
 		load_address = sdmac->pc_to_device;
 
@@ -1214,10 +1221,28 @@ static int sdma_alloc_chan_resources(struct dma_chan *chan)
 {
 	struct sdma_channel *sdmac = to_sdma_chan(chan);
 	struct imx_dma_data *data = chan->private;
+	struct imx_dma_data mem_data;
 	int prio, ret;
 
-	if (!data)
-		return -EINVAL;
+	/*
+	 * MEMCPY may never setup chan->private by filter function such as
+	 * dmatest, thus create 'struct imx_dma_data mem_data' for this case.
+	 * Please note in any other slave case, you have to setup chan->private
+	 * with 'struct imx_dma_data' in your own filter function if you want to
+	 * request dma channel by dma_request_channel() rather than
+	 * dma_request_slave_channel(). Othwise, 'MEMCPY in case?' will appear
+	 * to warn you to correct your filter function.
+	 */
+	if (!data) {
+		dev_dbg(sdmac->sdma->dev, "MEMCPY in case?\n");
+		mem_data.priority = 2;
+		mem_data.peripheral_type = IMX_DMATYPE_MEMORY;
+		mem_data.dma_request = 0;
+		mem_data.dma_request2 = 0;
+		data = &mem_data;
+
+		sdma_get_pc(sdmac, IMX_DMATYPE_MEMORY);
+	}
 
 	switch (data->priority) {
 	case DMA_PRIO_HIGH:
@@ -1307,6 +1332,10 @@ static struct sdma_desc *sdma_transfer_init(struct sdma_channel *sdmac,
 	if (sdma_alloc_bd(desc))
 		goto err_desc_out;
 
+	/* No slave_config called in MEMCPY case, so do here */
+	if (direction == DMA_MEM_TO_MEM)
+		sdma_config_ownership(sdmac, false, true, false);
+
 	if (sdma_load_context(sdmac))
 		goto err_desc_out;
 
@@ -1318,6 +1347,62 @@ static struct sdma_desc *sdma_transfer_init(struct sdma_channel *sdmac,
 	return NULL;
 }
 
+static struct dma_async_tx_descriptor *sdma_prep_memcpy(
+		struct dma_chan *chan, dma_addr_t dma_dst,
+		dma_addr_t dma_src, size_t len, unsigned long flags)
+{
+	struct sdma_channel *sdmac = to_sdma_chan(chan);
+	struct sdma_engine *sdma = sdmac->sdma;
+	int channel = sdmac->channel;
+	size_t count;
+	int i = 0, param;
+	struct sdma_buffer_descriptor *bd;
+	struct sdma_desc *desc;
+
+	if (!chan || !len)
+		return NULL;
+
+	dev_dbg(sdma->dev, "memcpy: %pad->%pad, len=%zu, channel=%d.\n",
+		&dma_src, &dma_dst, len, channel);
+
+	desc = sdma_transfer_init(sdmac, DMA_MEM_TO_MEM,
+					len / SDMA_BD_MAX_CNT + 1);
+	if (!desc)
+		return NULL;
+
+	do {
+		count = min_t(size_t, len, SDMA_BD_MAX_CNT);
+		bd = &desc->bd[i];
+		bd->buffer_addr = dma_src;
+		bd->ext_buffer_addr = dma_dst;
+		bd->mode.count = count;
+		desc->chn_count += count;
+		bd->mode.command = 0;
+
+		dma_src += count;
+		dma_dst += count;
+		len -= count;
+		i++;
+
+		param = BD_DONE | BD_EXTD | BD_CONT;
+		/* last bd */
+		if (!len) {
+			param |= BD_INTR;
+			param |= BD_LAST;
+			param &= ~BD_CONT;
+		}
+
+		dev_dbg(sdma->dev, "entry %d: count: %zd dma: 0x%x %s%s\n",
+				i, count, bd->buffer_addr,
+				param & BD_WRAP ? "wrap" : "",
+				param & BD_INTR ? " intr" : "");
+
+		bd->mode.status = param;
+	} while (len);
+
+	return vchan_tx_prep(&sdmac->vc, &desc->vd, flags);
+}
+
 static struct dma_async_tx_descriptor *sdma_prep_slave_sg(
 		struct dma_chan *chan, struct scatterlist *sgl,
 		unsigned int sg_len, enum dma_transfer_direction direction,
@@ -1903,6 +1988,7 @@ static int sdma_probe(struct platform_device *pdev)
 
 	dma_cap_set(DMA_SLAVE, sdma->dma_device.cap_mask);
 	dma_cap_set(DMA_CYCLIC, sdma->dma_device.cap_mask);
+	dma_cap_set(DMA_MEMCPY, sdma->dma_device.cap_mask);
 
 	INIT_LIST_HEAD(&sdma->dma_device.channels);
 	/* Initialize channel parameters */
@@ -1969,6 +2055,7 @@ static int sdma_probe(struct platform_device *pdev)
 	sdma->dma_device.dst_addr_widths = SDMA_DMA_BUSWIDTHS;
 	sdma->dma_device.directions = SDMA_DMA_DIRECTIONS;
 	sdma->dma_device.residue_granularity = DMA_RESIDUE_GRANULARITY_SEGMENT;
+	sdma->dma_device.device_prep_dma_memcpy = sdma_prep_memcpy;
 	sdma->dma_device.device_issue_pending = sdma_issue_pending;
 	sdma->dma_device.dev->dma_parms = &sdma->dma_parms;
 	dma_set_max_seg_size(sdma->dma_device.dev, SDMA_BD_MAX_CNT);
-- 
2.7.4

[PATCH v3 2/3] dmaengine: imx-sdma: add memcpy interface

[Robin Gong]

Add MEMCPY capability for imx-sdma driver.

Signed-off-by: Robin Gong <yibin.gong@nxp.com>
---
 drivers/dma/imx-sdma.c | 93 ++++++++++++++++++++++++++++++++++++++++++++++++--
 1 file changed, 90 insertions(+), 3 deletions(-)

diff --git a/drivers/dma/imx-sdma.c b/drivers/dma/imx-sdma.c
index e3d5e73..b4ec2d2 100644
--- a/drivers/dma/imx-sdma.c
+++ b/drivers/dma/imx-sdma.c
@@ -342,6 +342,7 @@ struct sdma_desc {
  * @pc_from_device:	script address for those device_2_memory
  * @pc_to_device:	script address for those memory_2_device
  * @device_to_device:	script address for those device_2_device
+ * @pc_to_pc:		script address for those memory_2_memory
  * @flags:		loop mode or not
  * @per_address:	peripheral source or destination address in common case
  *                      destination address in p_2_p case
@@ -367,6 +368,7 @@ struct sdma_channel {
 	enum dma_slave_buswidth		word_size;
 	unsigned int			pc_from_device, pc_to_device;
 	unsigned int			device_to_device;
+	unsigned int                    pc_to_pc;
 	unsigned long			flags;
 	dma_addr_t			per_address, per_address2;
 	unsigned long			event_mask[2];
@@ -869,14 +871,16 @@ static void sdma_get_pc(struct sdma_channel *sdmac,
 	 * These are needed once we start to support transfers between
 	 * two peripherals or memory-to-memory transfers
 	 */
-	int per_2_per = 0;
+	int per_2_per = 0, emi_2_emi = 0;
 
 	sdmac->pc_from_device = 0;
 	sdmac->pc_to_device = 0;
 	sdmac->device_to_device = 0;
+	sdmac->pc_to_pc = 0;
 
 	switch (peripheral_type) {
 	case IMX_DMATYPE_MEMORY:
+		emi_2_emi = sdma->script_addrs->ap_2_ap_addr;
 		break;
 	case IMX_DMATYPE_DSP:
 		emi_2_per = sdma->script_addrs->bp_2_ap_addr;
@@ -949,6 +953,7 @@ static void sdma_get_pc(struct sdma_channel *sdmac,
 	sdmac->pc_from_device = per_2_emi;
 	sdmac->pc_to_device = emi_2_per;
 	sdmac->device_to_device = per_2_per;
+	sdmac->pc_to_pc = emi_2_emi;
 }
 
 static int sdma_load_context(struct sdma_channel *sdmac)
@@ -965,6 +970,8 @@ static int sdma_load_context(struct sdma_channel *sdmac)
 		load_address = sdmac->pc_from_device;
 	else if (sdmac->direction == DMA_DEV_TO_DEV)
 		load_address = sdmac->device_to_device;
+	else if (sdmac->direction == DMA_MEM_TO_MEM)
+		load_address = sdmac->pc_to_pc;
 	else
 		load_address = sdmac->pc_to_device;
 
@@ -1214,10 +1221,28 @@ static int sdma_alloc_chan_resources(struct dma_chan *chan)
 {
 	struct sdma_channel *sdmac = to_sdma_chan(chan);
 	struct imx_dma_data *data = chan->private;
+	struct imx_dma_data mem_data;
 	int prio, ret;
 
-	if (!data)
-		return -EINVAL;
+	/*
+	 * MEMCPY may never setup chan->private by filter function such as
+	 * dmatest, thus create 'struct imx_dma_data mem_data' for this case.
+	 * Please note in any other slave case, you have to setup chan->private
+	 * with 'struct imx_dma_data' in your own filter function if you want to
+	 * request dma channel by dma_request_channel() rather than
+	 * dma_request_slave_channel(). Othwise, 'MEMCPY in case?' will appear
+	 * to warn you to correct your filter function.
+	 */
+	if (!data) {
+		dev_dbg(sdmac->sdma->dev, "MEMCPY in case?\n");
+		mem_data.priority = 2;
+		mem_data.peripheral_type = IMX_DMATYPE_MEMORY;
+		mem_data.dma_request = 0;
+		mem_data.dma_request2 = 0;
+		data = &mem_data;
+
+		sdma_get_pc(sdmac, IMX_DMATYPE_MEMORY);
+	}
 
 	switch (data->priority) {
 	case DMA_PRIO_HIGH:
@@ -1307,6 +1332,10 @@ static struct sdma_desc *sdma_transfer_init(struct sdma_channel *sdmac,
 	if (sdma_alloc_bd(desc))
 		goto err_desc_out;
 
+	/* No slave_config called in MEMCPY case, so do here */
+	if (direction == DMA_MEM_TO_MEM)
+		sdma_config_ownership(sdmac, false, true, false);
+
 	if (sdma_load_context(sdmac))
 		goto err_desc_out;
 
@@ -1318,6 +1347,62 @@ static struct sdma_desc *sdma_transfer_init(struct sdma_channel *sdmac,
 	return NULL;
 }
 
+static struct dma_async_tx_descriptor *sdma_prep_memcpy(
+		struct dma_chan *chan, dma_addr_t dma_dst,
+		dma_addr_t dma_src, size_t len, unsigned long flags)
+{
+	struct sdma_channel *sdmac = to_sdma_chan(chan);
+	struct sdma_engine *sdma = sdmac->sdma;
+	int channel = sdmac->channel;
+	size_t count;
+	int i = 0, param;
+	struct sdma_buffer_descriptor *bd;
+	struct sdma_desc *desc;
+
+	if (!chan || !len)
+		return NULL;
+
+	dev_dbg(sdma->dev, "memcpy: %pad->%pad, len=%zu, channel=%d.\n",
+		&dma_src, &dma_dst, len, channel);
+
+	desc = sdma_transfer_init(sdmac, DMA_MEM_TO_MEM,
+					len / SDMA_BD_MAX_CNT + 1);
+	if (!desc)
+		return NULL;
+
+	do {
+		count = min_t(size_t, len, SDMA_BD_MAX_CNT);
+		bd = &desc->bd[i];
+		bd->buffer_addr = dma_src;
+		bd->ext_buffer_addr = dma_dst;
+		bd->mode.count = count;
+		desc->chn_count += count;
+		bd->mode.command = 0;
+
+		dma_src += count;
+		dma_dst += count;
+		len -= count;
+		i++;
+
+		param = BD_DONE | BD_EXTD | BD_CONT;
+		/* last bd */
+		if (!len) {
+			param |= BD_INTR;
+			param |= BD_LAST;
+			param &= ~BD_CONT;
+		}
+
+		dev_dbg(sdma->dev, "entry %d: count: %zd dma: 0x%x %s%s\n",
+				i, count, bd->buffer_addr,
+				param & BD_WRAP ? "wrap" : "",
+				param & BD_INTR ? " intr" : "");
+
+		bd->mode.status = param;
+	} while (len);
+
+	return vchan_tx_prep(&sdmac->vc, &desc->vd, flags);
+}
+
 static struct dma_async_tx_descriptor *sdma_prep_slave_sg(
 		struct dma_chan *chan, struct scatterlist *sgl,
 		unsigned int sg_len, enum dma_transfer_direction direction,
@@ -1903,6 +1988,7 @@ static int sdma_probe(struct platform_device *pdev)
 
 	dma_cap_set(DMA_SLAVE, sdma->dma_device.cap_mask);
 	dma_cap_set(DMA_CYCLIC, sdma->dma_device.cap_mask);
+	dma_cap_set(DMA_MEMCPY, sdma->dma_device.cap_mask);
 
 	INIT_LIST_HEAD(&sdma->dma_device.channels);
 	/* Initialize channel parameters */
@@ -1969,6 +2055,7 @@ static int sdma_probe(struct platform_device *pdev)
 	sdma->dma_device.dst_addr_widths = SDMA_DMA_BUSWIDTHS;
 	sdma->dma_device.directions = SDMA_DMA_DIRECTIONS;
 	sdma->dma_device.residue_granularity = DMA_RESIDUE_GRANULARITY_SEGMENT;
+	sdma->dma_device.device_prep_dma_memcpy = sdma_prep_memcpy;
 	sdma->dma_device.device_issue_pending = sdma_issue_pending;
 	sdma->dma_device.dev->dma_parms = &sdma->dma_parms;
 	dma_set_max_seg_size(sdma->dma_device.dev, SDMA_BD_MAX_CNT);
-- 
2.7.4

[v3,3/3] dmaengine: imx-sdma: allocate max 20 bds for one transfer

[Robin Gong]

If multi-bds used in one transfer, all bds should be consisten
memory.To easily follow it, enlarge the dma pool size into 20 bds,
and it will report error if the number of bds is over than 20. For
dmatest, the max count for single transfer is NUM_BD *
SDMA_BD_MAX_CNT = 20 * 65535 = ~1.28MB.

Signed-off-by: Robin Gong <yibin.gong@nxp.com>
---
 drivers/dma/imx-sdma.c | 17 ++++++++++++++++-
 1 file changed, 16 insertions(+), 1 deletion(-)

diff --git a/drivers/dma/imx-sdma.c b/drivers/dma/imx-sdma.c
index b4ec2d2..5973489 100644
--- a/drivers/dma/imx-sdma.c
+++ b/drivers/dma/imx-sdma.c
@@ -298,6 +298,15 @@ struct sdma_context_data {
 	u32  scratch7;
 } __attribute__ ((packed));
 
+/*
+ * All bds in one transfer should be consitent on SDMA. To easily follow it,just
+ * set the dma pool size as the enough bds. For example, in dmatest case, the
+ * max 20 bds means the max for single transfer is NUM_BD * SDMA_BD_MAX_CNT = 20
+ * * 65535 = ~1.28MB. 20 bds supposed to be enough basically.If it's still not
+ * enough in some specific cases, enlarge it here.Warning message would also
+ * appear if the bd numbers is over than 20.
+ */
+#define NUM_BD 20
 
 struct sdma_engine;
 
@@ -1273,7 +1282,7 @@ static int sdma_alloc_chan_resources(struct dma_chan *chan)
 		goto disable_clk_ahb;
 
 	sdmac->bd_pool = dma_pool_create("bd_pool", chan->device->dev,
-				sizeof(struct sdma_buffer_descriptor),
+				NUM_BD * sizeof(struct sdma_buffer_descriptor),
 				32, 0);
 
 	return 0;
@@ -1314,6 +1323,12 @@ static struct sdma_desc *sdma_transfer_init(struct sdma_channel *sdmac,
 {
 	struct sdma_desc *desc;
 
+	if (bds > NUM_BD) {
+		dev_err(sdmac->sdma->dev, "%d bds exceed the max %d\n",
+			bds, NUM_BD);
+		goto err_out;
+	}
+
 	desc = kzalloc((sizeof(*desc)), GFP_NOWAIT);
 	if (!desc)
 		goto err_out;

[PATCH v3 3/3] dmaengine: imx-sdma: allocate max 20 bds for one transfer

[Robin Gong]

If multi-bds used in one transfer, all bds should be consisten
memory.To easily follow it, enlarge the dma pool size into 20 bds,
and it will report error if the number of bds is over than 20. For
dmatest, the max count for single transfer is NUM_BD *
SDMA_BD_MAX_CNT = 20 * 65535 = ~1.28MB.

Signed-off-by: Robin Gong <yibin.gong@nxp.com>
---
 drivers/dma/imx-sdma.c | 17 ++++++++++++++++-
 1 file changed, 16 insertions(+), 1 deletion(-)

diff --git a/drivers/dma/imx-sdma.c b/drivers/dma/imx-sdma.c
index b4ec2d2..5973489 100644
--- a/drivers/dma/imx-sdma.c
+++ b/drivers/dma/imx-sdma.c
@@ -298,6 +298,15 @@ struct sdma_context_data {
 	u32  scratch7;
 } __attribute__ ((packed));
 
+/*
+ * All bds in one transfer should be consitent on SDMA. To easily follow it,just
+ * set the dma pool size as the enough bds. For example, in dmatest case, the
+ * max 20 bds means the max for single transfer is NUM_BD * SDMA_BD_MAX_CNT = 20
+ * * 65535 = ~1.28MB. 20 bds supposed to be enough basically.If it's still not
+ * enough in some specific cases, enlarge it here.Warning message would also
+ * appear if the bd numbers is over than 20.
+ */
+#define NUM_BD 20
 
 struct sdma_engine;
 
@@ -1273,7 +1282,7 @@ static int sdma_alloc_chan_resources(struct dma_chan *chan)
 		goto disable_clk_ahb;
 
 	sdmac->bd_pool = dma_pool_create("bd_pool", chan->device->dev,
-				sizeof(struct sdma_buffer_descriptor),
+				NUM_BD * sizeof(struct sdma_buffer_descriptor),
 				32, 0);
 
 	return 0;
@@ -1314,6 +1323,12 @@ static struct sdma_desc *sdma_transfer_init(struct sdma_channel *sdmac,
 {
 	struct sdma_desc *desc;
 
+	if (bds > NUM_BD) {
+		dev_err(sdmac->sdma->dev, "%d bds exceed the max %d\n",
+			bds, NUM_BD);
+		goto err_out;
+	}
+
 	desc = kzalloc((sizeof(*desc)), GFP_NOWAIT);
 	if (!desc)
 		goto err_out;
-- 
2.7.4

[PATCH v3 3/3] dmaengine: imx-sdma: allocate max 20 bds for one transfer

[Robin Gong]

If multi-bds used in one transfer, all bds should be consisten
memory.To easily follow it, enlarge the dma pool size into 20 bds,
and it will report error if the number of bds is over than 20. For
dmatest, the max count for single transfer is NUM_BD *
SDMA_BD_MAX_CNT = 20 * 65535 = ~1.28MB.

Signed-off-by: Robin Gong <yibin.gong@nxp.com>
---
 drivers/dma/imx-sdma.c | 17 ++++++++++++++++-
 1 file changed, 16 insertions(+), 1 deletion(-)

diff --git a/drivers/dma/imx-sdma.c b/drivers/dma/imx-sdma.c
index b4ec2d2..5973489 100644
--- a/drivers/dma/imx-sdma.c
+++ b/drivers/dma/imx-sdma.c
@@ -298,6 +298,15 @@ struct sdma_context_data {
 	u32  scratch7;
 } __attribute__ ((packed));
 
+/*
+ * All bds in one transfer should be consitent on SDMA. To easily follow it,just
+ * set the dma pool size as the enough bds. For example, in dmatest case, the
+ * max 20 bds means the max for single transfer is NUM_BD * SDMA_BD_MAX_CNT = 20
+ * * 65535 = ~1.28MB. 20 bds supposed to be enough basically.If it's still not
+ * enough in some specific cases, enlarge it here.Warning message would also
+ * appear if the bd numbers is over than 20.
+ */
+#define NUM_BD 20
 
 struct sdma_engine;
 
@@ -1273,7 +1282,7 @@ static int sdma_alloc_chan_resources(struct dma_chan *chan)
 		goto disable_clk_ahb;
 
 	sdmac->bd_pool = dma_pool_create("bd_pool", chan->device->dev,
-				sizeof(struct sdma_buffer_descriptor),
+				NUM_BD * sizeof(struct sdma_buffer_descriptor),
 				32, 0);
 
 	return 0;
@@ -1314,6 +1323,12 @@ static struct sdma_desc *sdma_transfer_init(struct sdma_channel *sdmac,
 {
 	struct sdma_desc *desc;
 
+	if (bds > NUM_BD) {
+		dev_err(sdmac->sdma->dev, "%d bds exceed the max %d\n",
+			bds, NUM_BD);
+		goto err_out;
+	}
+
 	desc = kzalloc((sizeof(*desc)), GFP_NOWAIT);
 	if (!desc)
 		goto err_out;
-- 
2.7.4

[v3,3/3] dmaengine: imx-sdma: allocate max 20 bds for one transfer

[Lucas Stach]

Am Montag, den 23.07.2018, 13:55 +0000 schrieb Robin Gong:
> > -----Original Message-----
> > From: Lucas Stach [mailto:l.stach@pengutronix.de]
> > Sent: 2018年7月23日 18:54
> > To: Robin Gong <yibin.gong@nxp.com>; vkoul@kernel.org;
> > dan.j.williams@intel.com; s.hauer@pengutronix.de; linux@armlinux.or
> > g.uk
> > Cc: dmaengine@vger.kernel.org; dl-linux-imx <linux-imx@nxp.com>;
> > kernel@pengutronix.de; linux-arm-kernel@lists.infradead.org;
> > linux-kernel@vger.kernel.org
> > Subject: Re: [PATCH v3 3/3] dmaengine: imx-sdma: allocate max 20
> > bds for one
> > transfer
> > 
> > Am Dienstag, den 24.07.2018, 01:46 +0800 schrieb Robin Gong:
> > > If multi-bds used in one transfer, all bds should be consisten
> > > memory.To easily follow it, enlarge the dma pool size into 20
> > > bds, and
> > > it will report error if the number of bds is over than 20. For
> > > dmatest, the max count for single transfer is NUM_BD *
> > 
> > SDMA_BD_MAX_CNT
> > > = 20 * 65535 = ~1.28MB.
> > 
> > Both the commit message and the comment need a lot more care to
> > actually
> > tell what this commit is trying to achieve. Currently I don't
> > follow at all. What
> > does "consisten" mean? Do you mean BDs should be contiguous in
> > memory?
> 
> Yes, BDs should be contiguous  one by one in memory.

Okay, but this isn't what the code change does. By increasing the size
parameter of the dma pool you just allocate 20 times as much memory as
needed for each BD. So actually the BDs end up being very non-
contiguous in memory as there are now holes of 19 BD sizes between the
start of each BD.

So something isn't right with this change.

Regards,
Lucas

> > 
> > What do you gain by over-allocating each BD by a factor of 20?
> 
> I guess dma_pool_alloc will return error in such case, and then cause
> dma setup
> transfer failure.
> > 
> > Regards,
> > Lucas
> > 
> > > Signed-off-by: Robin Gong <yibin.gong@nxp.com>
> > > ---
> > >  drivers/dma/imx-sdma.c | 17 ++++++++++++++++-
> > >  1 file changed, 16 insertions(+), 1 deletion(-)
> > > 
> > > diff --git a/drivers/dma/imx-sdma.c b/drivers/dma/imx-sdma.c
> > > index
> > > b4ec2d2..5973489 100644
> > > --- a/drivers/dma/imx-sdma.c
> > > +++ b/drivers/dma/imx-sdma.c
> > > @@ -298,6 +298,15 @@ struct sdma_context_data {
> > > >  	u32  scratch7;
> > > 
> > >  } __attribute__ ((packed));
> > > 
> > > +/*
> > > + * All bds in one transfer should be consitent on SDMA. To
> > > easily
> > > +follow it,just
> > > + * set the dma pool size as the enough bds. For example, in
> > > dmatest
> > > +case, the
> > > + * max 20 bds means the max for single transfer is NUM_BD *
> > > +SDMA_BD_MAX_CNT = 20
> > > + * * 65535 = ~1.28MB. 20 bds supposed to be enough basically.If
> > > it's
> > > +still not
> > > + * enough in some specific cases, enlarge it here.Warning
> > > message
> > > +would also
> > > + * appear if the bd numbers is over than 20.
> > > + */
> > > +#define NUM_BD 20
> > > 
> > >  struct sdma_engine;
> > > 
> > > @@ -1273,7 +1282,7 @@ static int sdma_alloc_chan_resources(struct
> > > dma_chan *chan)
> > > >  		goto disable_clk_ahb;
> > > >  	sdmac->bd_pool = dma_pool_create("bd_pool", chan-
> > > > >device->dev,
> > > > -				sizeof(struct
> > > > sdma_buffer_descriptor),
> > > > +				NUM_BD * sizeof(struct
> > > > sdma_buffer_descriptor),
> > > >  				32, 0);
> > > >  	return 0;
> > > 
> > > @@ -1314,6 +1323,12 @@ static struct sdma_desc
> > > *sdma_transfer_init(struct sdma_channel *sdmac,
> > >  {
> > > >  	struct sdma_desc *desc;
> > > > +	if (bds > NUM_BD) {
> > > > +		dev_err(sdmac->sdma->dev, "%d bds exceed the
> > > > max %d\n",
> > > > +			bds, NUM_BD);
> > > > +		goto err_out;
> > > > +	}
> > > 
> > > +
> > > >  	desc = kzalloc((sizeof(*desc)), GFP_NOWAIT);
> > > >  	if (!desc)
> > > >  		goto err_out;
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Re: [PATCH v3 3/3] dmaengine: imx-sdma: allocate max 20 bds for one transfer

[Lucas Stach]

Am Montag, den 23.07.2018, 13:55 +0000 schrieb Robin Gong:
> > -----Original Message-----
> > From: Lucas Stach [mailto:l.stach@pengutronix.de]
> > Sent: 2018年7月23日 18:54
> > To: Robin Gong <yibin.gong@nxp.com>; vkoul@kernel.org;
> > dan.j.williams@intel.com; s.hauer@pengutronix.de; linux@armlinux.or
> > g.uk
> > Cc: dmaengine@vger.kernel.org; dl-linux-imx <linux-imx@nxp.com>;
> > kernel@pengutronix.de; linux-arm-kernel@lists.infradead.org;
> > linux-kernel@vger.kernel.org
> > Subject: Re: [PATCH v3 3/3] dmaengine: imx-sdma: allocate max 20
> > bds for one
> > transfer
> > 
> > Am Dienstag, den 24.07.2018, 01:46 +0800 schrieb Robin Gong:
> > > If multi-bds used in one transfer, all bds should be consisten
> > > memory.To easily follow it, enlarge the dma pool size into 20
> > > bds, and
> > > it will report error if the number of bds is over than 20. For
> > > dmatest, the max count for single transfer is NUM_BD *
> > 
> > SDMA_BD_MAX_CNT
> > > = 20 * 65535 = ~1.28MB.
> > 
> > Both the commit message and the comment need a lot more care to
> > actually
> > tell what this commit is trying to achieve. Currently I don't
> > follow at all. What
> > does "consisten" mean? Do you mean BDs should be contiguous in
> > memory?
> 
> Yes, BDs should be contiguous  one by one in memory.

Okay, but this isn't what the code change does. By increasing the size
parameter of the dma pool you just allocate 20 times as much memory as
needed for each BD. So actually the BDs end up being very non-
contiguous in memory as there are now holes of 19 BD sizes between the
start of each BD.

So something isn't right with this change.

Regards,
Lucas

> > 
> > What do you gain by over-allocating each BD by a factor of 20?
> 
> I guess dma_pool_alloc will return error in such case, and then cause
> dma setup
> transfer failure.
> > 
> > Regards,
> > Lucas
> > 
> > > Signed-off-by: Robin Gong <yibin.gong@nxp.com>
> > > ---
> > >  drivers/dma/imx-sdma.c | 17 ++++++++++++++++-
> > >  1 file changed, 16 insertions(+), 1 deletion(-)
> > > 
> > > diff --git a/drivers/dma/imx-sdma.c b/drivers/dma/imx-sdma.c
> > > index
> > > b4ec2d2..5973489 100644
> > > --- a/drivers/dma/imx-sdma.c
> > > +++ b/drivers/dma/imx-sdma.c
> > > @@ -298,6 +298,15 @@ struct sdma_context_data {
> > > >  	u32  scratch7;
> > > 
> > >  } __attribute__ ((packed));
> > > 
> > > +/*
> > > + * All bds in one transfer should be consitent on SDMA. To
> > > easily
> > > +follow it,just
> > > + * set the dma pool size as the enough bds. For example, in
> > > dmatest
> > > +case, the
> > > + * max 20 bds means the max for single transfer is NUM_BD *
> > > +SDMA_BD_MAX_CNT = 20
> > > + * * 65535 = ~1.28MB. 20 bds supposed to be enough basically.If
> > > it's
> > > +still not
> > > + * enough in some specific cases, enlarge it here.Warning
> > > message
> > > +would also
> > > + * appear if the bd numbers is over than 20.
> > > + */
> > > +#define NUM_BD 20
> > > 
> > >  struct sdma_engine;
> > > 
> > > @@ -1273,7 +1282,7 @@ static int sdma_alloc_chan_resources(struct
> > > dma_chan *chan)
> > > >  		goto disable_clk_ahb;
> > > >  	sdmac->bd_pool = dma_pool_create("bd_pool", chan-
> > > > >device->dev,
> > > > -				sizeof(struct
> > > > sdma_buffer_descriptor),
> > > > +				NUM_BD * sizeof(struct
> > > > sdma_buffer_descriptor),
> > > >  				32, 0);
> > > >  	return 0;
> > > 
> > > @@ -1314,6 +1323,12 @@ static struct sdma_desc
> > > *sdma_transfer_init(struct sdma_channel *sdmac,
> > >  {
> > > >  	struct sdma_desc *desc;
> > > > +	if (bds > NUM_BD) {
> > > > +		dev_err(sdmac->sdma->dev, "%d bds exceed the
> > > > max %d\n",
> > > > +			bds, NUM_BD);
> > > > +		goto err_out;
> > > > +	}
> > > 
> > > +
> > > >  	desc = kzalloc((sizeof(*desc)), GFP_NOWAIT);
> > > >  	if (!desc)
> > > >  		goto err_out;

[PATCH v3 3/3] dmaengine: imx-sdma: allocate max 20 bds for one transfer

[Lucas Stach]

Am Montag, den 23.07.2018, 13:55 +0000 schrieb Robin Gong:
> > -----Original Message-----
> > From: Lucas Stach [mailto:l.stach at pengutronix.de]
> > Sent: 2018?7?23? 18:54
> > To: Robin Gong <yibin.gong@nxp.com>; vkoul at kernel.org;
> > dan.j.williams at intel.com; s.hauer at pengutronix.de; linux at armlinux.or
> > g.uk
> > Cc: dmaengine at vger.kernel.org; dl-linux-imx <linux-imx@nxp.com>;
> > kernel at pengutronix.de; linux-arm-kernel at lists.infradead.org;
> > linux-kernel at vger.kernel.org
> > Subject: Re: [PATCH v3 3/3] dmaengine: imx-sdma: allocate max 20
> > bds for one
> > transfer
> > 
> > Am Dienstag, den 24.07.2018, 01:46 +0800 schrieb Robin Gong:
> > > If multi-bds used in one transfer, all bds should be consisten
> > > memory.To easily follow it, enlarge the dma pool size into 20
> > > bds, and
> > > it will report error if the number of bds is over than 20. For
> > > dmatest, the max count for single transfer is NUM_BD *
> > 
> > SDMA_BD_MAX_CNT
> > > = 20 * 65535 = ~1.28MB.
> > 
> > Both the commit message and the comment need a lot more care to
> > actually
> > tell what this commit is trying to achieve. Currently I don't
> > follow at all. What
> > does "consisten" mean? Do you mean BDs should be contiguous in
> > memory?
> 
> Yes, BDs should be contiguous??one by one in memory.

Okay, but this isn't what the code change does. By increasing the size
parameter of the dma pool you just allocate 20 times as much memory as
needed for each BD. So actually the BDs end up being very non-
contiguous in memory as there are now holes of 19 BD sizes between the
start of each BD.

So something isn't right with this change.

Regards,
Lucas

> > 
> > What do you gain by over-allocating each BD by a factor of 20?
> 
> I guess dma_pool_alloc will return error in such case, and then cause
> dma setup
> transfer failure.
> > 
> > Regards,
> > Lucas
> > 
> > > Signed-off-by: Robin Gong <yibin.gong@nxp.com>
> > > ---
> > > ?drivers/dma/imx-sdma.c | 17 ++++++++++++++++-
> > > ?1 file changed, 16 insertions(+), 1 deletion(-)
> > > 
> > > diff --git a/drivers/dma/imx-sdma.c b/drivers/dma/imx-sdma.c
> > > index
> > > b4ec2d2..5973489 100644
> > > --- a/drivers/dma/imx-sdma.c
> > > +++ b/drivers/dma/imx-sdma.c
> > > @@ -298,6 +298,15 @@ struct sdma_context_data {
> > > > ?	u32??scratch7;
> > > 
> > > ?} __attribute__ ((packed));
> > > 
> > > +/*
> > > + * All bds in one transfer should be consitent on SDMA. To
> > > easily
> > > +follow it,just
> > > + * set the dma pool size as the enough bds. For example, in
> > > dmatest
> > > +case, the
> > > + * max 20 bds means the max for single transfer is NUM_BD *
> > > +SDMA_BD_MAX_CNT = 20
> > > + * * 65535 = ~1.28MB. 20 bds supposed to be enough basically.If
> > > it's
> > > +still not
> > > + * enough in some specific cases, enlarge it here.Warning
> > > message
> > > +would also
> > > + * appear if the bd numbers is over than 20.
> > > + */
> > > +#define NUM_BD 20
> > > 
> > > ?struct sdma_engine;
> > > 
> > > @@ -1273,7 +1282,7 @@ static int sdma_alloc_chan_resources(struct
> > > dma_chan *chan)
> > > > ?		goto disable_clk_ahb;
> > > > ?	sdmac->bd_pool = dma_pool_create("bd_pool", chan-
> > > > >device->dev,
> > > > -				sizeof(struct
> > > > sdma_buffer_descriptor),
> > > > +				NUM_BD * sizeof(struct
> > > > sdma_buffer_descriptor),
> > > > ?				32, 0);
> > > > ?	return 0;
> > > 
> > > @@ -1314,6 +1323,12 @@ static struct sdma_desc
> > > *sdma_transfer_init(struct sdma_channel *sdmac,
> > > ?{
> > > > ?	struct sdma_desc *desc;
> > > > +	if (bds > NUM_BD) {
> > > > +		dev_err(sdmac->sdma->dev, "%d bds exceed the
> > > > max %d\n",
> > > > +			bds, NUM_BD);
> > > > +		goto err_out;
> > > > +	}
> > > 
> > > +
> > > > ?	desc = kzalloc((sizeof(*desc)), GFP_NOWAIT);
> > > > ?	if (!desc)
> > > > ?		goto err_out;

[v3,3/3] dmaengine: imx-sdma: allocate max 20 bds for one transfer

[Robin Gong]

> -----Original Message-----
> From: Lucas Stach [mailto:l.stach@pengutronix.de]
> Sent: 2018年7月24日 17:22
> To: Robin Gong <yibin.gong@nxp.com>; vkoul@kernel.org;
> dan.j.williams@intel.com; s.hauer@pengutronix.de; linux@armlinux.org.uk
> Cc: dmaengine@vger.kernel.org; dl-linux-imx <linux-imx@nxp.com>;
> kernel@pengutronix.de; linux-arm-kernel@lists.infradead.org;
> linux-kernel@vger.kernel.org
> Subject: Re: [PATCH v3 3/3] dmaengine: imx-sdma: allocate max 20 bds for one
> transfer
> 
> Am Montag, den 23.07.2018, 13:55 +0000 schrieb Robin Gong:
> > > -----Original Message-----
> > > From: Lucas Stach [mailto:l.stach@pengutronix.de]
> > > Sent: 2018年7月23日 18:54
> > > To: Robin Gong <yibin.gong@nxp.com>; vkoul@kernel.org;
> > > dan.j.williams@intel.com; s.hauer@pengutronix.de; linux@armlinux.or
> > > g.uk
> > > Cc: dmaengine@vger.kernel.org; dl-linux-imx <linux-imx@nxp.com>;
> > > kernel@pengutronix.de; linux-arm-kernel@lists.infradead.org;
> > > linux-kernel@vger.kernel.org
> > > Subject: Re: [PATCH v3 3/3] dmaengine: imx-sdma: allocate max 20 bds
> > > for one transfer
> > >
> > > Am Dienstag, den 24.07.2018, 01:46 +0800 schrieb Robin Gong:
> > > > If multi-bds used in one transfer, all bds should be consisten
> > > > memory.To easily follow it, enlarge the dma pool size into 20 bds,
> > > > and it will report error if the number of bds is over than 20. For
> > > > dmatest, the max count for single transfer is NUM_BD *
> > >
> > > SDMA_BD_MAX_CNT
> > > > = 20 * 65535 = ~1.28MB.
> > >
> > > Both the commit message and the comment need a lot more care to
> > > actually tell what this commit is trying to achieve. Currently I
> > > don't follow at all. What does "consisten" mean? Do you mean BDs
> > > should be contiguous in memory?
> >
> > Yes, BDs should be contiguous  one by one in memory.
> 
> Okay, but this isn't what the code change does. By increasing the size
> parameter of the dma pool you just allocate 20 times as much memory as
> needed for each BD. So actually the BDs end up being very non- contiguous in
> memory as there are now holes of 19 BD sizes between the start of each BD.
Please notice only allocate bds memory from dma pool one time even in multi bds.
That's different with the common use case that allocate memory from dma pool everytime
for every bd. Why do this is to make sure all bd memory is contiguous for single transfer
whatever single bd or multi-bds, since two call dma_pool_alloc() can't promise the address
is contiguous especially for multi thread case such as dmatest 'threads_per_chan = 5'. You
can change to ' norandom=true ' and ' test_buf_size = 163840' in dmatest.c to look what
issue coming without this patch.
> 
> So something isn't right with this change.
I think this patch is the easy way to resolve the bd contiguous issue, but the cost is to
allocate more dma pool memory which may not used.
> 
> Regards,
> Lucas
> 
> > >
> > > What do you gain by over-allocating each BD by a factor of 20?
> >
> > I guess dma_pool_alloc will return error in such case, and then cause
> > dma setup transfer failure.
> > >
> > > Regards,
> > > Lucas
> > >
> > > > Signed-off-by: Robin Gong <yibin.gong@nxp.com>
> > > > ---
> > > >  drivers/dma/imx-sdma.c | 17 ++++++++++++++++-
> > > >  1 file changed, 16 insertions(+), 1 deletion(-)
> > > >
> > > > diff --git a/drivers/dma/imx-sdma.c b/drivers/dma/imx-sdma.c index
> > > > b4ec2d2..5973489 100644
> > > > --- a/drivers/dma/imx-sdma.c
> > > > +++ b/drivers/dma/imx-sdma.c
> > > > @@ -298,6 +298,15 @@ struct sdma_context_data {
> > > > >  	u32  scratch7;
> > > >
> > > >  } __attribute__ ((packed));
> > > >
> > > > +/*
> > > > + * All bds in one transfer should be consitent on SDMA. To
> > > > easily
> > > > +follow it,just
> > > > + * set the dma pool size as the enough bds. For example, in
> > > > dmatest
> > > > +case, the
> > > > + * max 20 bds means the max for single transfer is NUM_BD *
> > > > +SDMA_BD_MAX_CNT = 20
> > > > + * * 65535 = ~1.28MB. 20 bds supposed to be enough basically.If
> > > > it's
> > > > +still not
> > > > + * enough in some specific cases, enlarge it here.Warning
> > > > message
> > > > +would also
> > > > + * appear if the bd numbers is over than 20.
> > > > + */
> > > > +#define NUM_BD 20
> > > >
> > > >  struct sdma_engine;
> > > >
> > > > @@ -1273,7 +1282,7 @@ static int sdma_alloc_chan_resources(struct
> > > > dma_chan *chan)
> > > > >  		goto disable_clk_ahb;
> > > > >  	sdmac->bd_pool = dma_pool_create("bd_pool", chan-
> > > > > >device->dev,
> > > > > -				sizeof(struct
> > > > > sdma_buffer_descriptor),
> > > > > +				NUM_BD * sizeof(struct
> > > > > sdma_buffer_descriptor),
> > > > >  				32, 0);
> > > > >  	return 0;
> > > >
> > > > @@ -1314,6 +1323,12 @@ static struct sdma_desc
> > > > *sdma_transfer_init(struct sdma_channel *sdmac,
> > > >  {
> > > > >  	struct sdma_desc *desc;
> > > > > +	if (bds > NUM_BD) {
> > > > > +		dev_err(sdmac->sdma->dev, "%d bds exceed the
> > > > > max %d\n",
> > > > > +			bds, NUM_BD);
> > > > > +		goto err_out;
> > > > > +	}
> > > >
> > > > +
> > > > >  	desc = kzalloc((sizeof(*desc)), GFP_NOWAIT);
> > > > >  	if (!desc)
> > > > >  		goto err_out;

RE: [PATCH v3 3/3] dmaengine: imx-sdma: allocate max 20 bds for one transfer

[Robin Gong]

> -----Original Message-----
> From: Lucas Stach [mailto:l.stach@pengutronix.de]
> Sent: 2018年7月24日 17:22
> To: Robin Gong <yibin.gong@nxp.com>; vkoul@kernel.org;
> dan.j.williams@intel.com; s.hauer@pengutronix.de; linux@armlinux.org.uk
> Cc: dmaengine@vger.kernel.org; dl-linux-imx <linux-imx@nxp.com>;
> kernel@pengutronix.de; linux-arm-kernel@lists.infradead.org;
> linux-kernel@vger.kernel.org
> Subject: Re: [PATCH v3 3/3] dmaengine: imx-sdma: allocate max 20 bds for one
> transfer
> 
> Am Montag, den 23.07.2018, 13:55 +0000 schrieb Robin Gong:
> > > -----Original Message-----
> > > From: Lucas Stach [mailto:l.stach@pengutronix.de]
> > > Sent: 2018年7月23日 18:54
> > > To: Robin Gong <yibin.gong@nxp.com>; vkoul@kernel.org;
> > > dan.j.williams@intel.com; s.hauer@pengutronix.de; linux@armlinux.or
> > > g.uk
> > > Cc: dmaengine@vger.kernel.org; dl-linux-imx <linux-imx@nxp.com>;
> > > kernel@pengutronix.de; linux-arm-kernel@lists.infradead.org;
> > > linux-kernel@vger.kernel.org
> > > Subject: Re: [PATCH v3 3/3] dmaengine: imx-sdma: allocate max 20 bds
> > > for one transfer
> > >
> > > Am Dienstag, den 24.07.2018, 01:46 +0800 schrieb Robin Gong:
> > > > If multi-bds used in one transfer, all bds should be consisten
> > > > memory.To easily follow it, enlarge the dma pool size into 20 bds,
> > > > and it will report error if the number of bds is over than 20. For
> > > > dmatest, the max count for single transfer is NUM_BD *
> > >
> > > SDMA_BD_MAX_CNT
> > > > = 20 * 65535 = ~1.28MB.
> > >
> > > Both the commit message and the comment need a lot more care to
> > > actually tell what this commit is trying to achieve. Currently I
> > > don't follow at all. What does "consisten" mean? Do you mean BDs
> > > should be contiguous in memory?
> >
> > Yes, BDs should be contiguous  one by one in memory.
> 
> Okay, but this isn't what the code change does. By increasing the size
> parameter of the dma pool you just allocate 20 times as much memory as
> needed for each BD. So actually the BDs end up being very non- contiguous in
> memory as there are now holes of 19 BD sizes between the start of each BD.
Please notice only allocate bds memory from dma pool one time even in multi bds.
That's different with the common use case that allocate memory from dma pool everytime
for every bd. Why do this is to make sure all bd memory is contiguous for single transfer
whatever single bd or multi-bds, since two call dma_pool_alloc() can't promise the address
is contiguous especially for multi thread case such as dmatest 'threads_per_chan = 5'. You
can change to ' norandom=true ' and ' test_buf_size = 163840' in dmatest.c to look what
issue coming without this patch.
> 
> So something isn't right with this change.
I think this patch is the easy way to resolve the bd contiguous issue, but the cost is to
allocate more dma pool memory which may not used.
> 
> Regards,
> Lucas
> 
> > >
> > > What do you gain by over-allocating each BD by a factor of 20?
> >
> > I guess dma_pool_alloc will return error in such case, and then cause
> > dma setup transfer failure.
> > >
> > > Regards,
> > > Lucas
> > >
> > > > Signed-off-by: Robin Gong <yibin.gong@nxp.com>
> > > > ---
> > > >  drivers/dma/imx-sdma.c | 17 ++++++++++++++++-
> > > >  1 file changed, 16 insertions(+), 1 deletion(-)
> > > >
> > > > diff --git a/drivers/dma/imx-sdma.c b/drivers/dma/imx-sdma.c index
> > > > b4ec2d2..5973489 100644
> > > > --- a/drivers/dma/imx-sdma.c
> > > > +++ b/drivers/dma/imx-sdma.c
> > > > @@ -298,6 +298,15 @@ struct sdma_context_data {
> > > > >  	u32  scratch7;
> > > >
> > > >  } __attribute__ ((packed));
> > > >
> > > > +/*
> > > > + * All bds in one transfer should be consitent on SDMA. To
> > > > easily
> > > > +follow it,just
> > > > + * set the dma pool size as the enough bds. For example, in
> > > > dmatest
> > > > +case, the
> > > > + * max 20 bds means the max for single transfer is NUM_BD *
> > > > +SDMA_BD_MAX_CNT = 20
> > > > + * * 65535 = ~1.28MB. 20 bds supposed to be enough basically.If
> > > > it's
> > > > +still not
> > > > + * enough in some specific cases, enlarge it here.Warning
> > > > message
> > > > +would also
> > > > + * appear if the bd numbers is over than 20.
> > > > + */
> > > > +#define NUM_BD 20
> > > >
> > > >  struct sdma_engine;
> > > >
> > > > @@ -1273,7 +1282,7 @@ static int sdma_alloc_chan_resources(struct
> > > > dma_chan *chan)
> > > > >  		goto disable_clk_ahb;
> > > > >  	sdmac->bd_pool = dma_pool_create("bd_pool", chan-
> > > > > >device->dev,
> > > > > -				sizeof(struct
> > > > > sdma_buffer_descriptor),
> > > > > +				NUM_BD * sizeof(struct
> > > > > sdma_buffer_descriptor),
> > > > >  				32, 0);
> > > > >  	return 0;
> > > >
> > > > @@ -1314,6 +1323,12 @@ static struct sdma_desc
> > > > *sdma_transfer_init(struct sdma_channel *sdmac,
> > > >  {
> > > > >  	struct sdma_desc *desc;
> > > > > +	if (bds > NUM_BD) {
> > > > > +		dev_err(sdmac->sdma->dev, "%d bds exceed the
> > > > > max %d\n",
> > > > > +			bds, NUM_BD);
> > > > > +		goto err_out;
> > > > > +	}
> > > >
> > > > +
> > > > >  	desc = kzalloc((sizeof(*desc)), GFP_NOWAIT);
> > > > >  	if (!desc)
> > > > >  		goto err_out;

[PATCH v3 3/3] dmaengine: imx-sdma: allocate max 20 bds for one transfer

[Robin Gong]

> -----Original Message-----
> From: Lucas Stach [mailto:l.stach at pengutronix.de]
> Sent: 2018?7?24? 17:22
> To: Robin Gong <yibin.gong@nxp.com>; vkoul at kernel.org;
> dan.j.williams at intel.com; s.hauer at pengutronix.de; linux at armlinux.org.uk
> Cc: dmaengine at vger.kernel.org; dl-linux-imx <linux-imx@nxp.com>;
> kernel at pengutronix.de; linux-arm-kernel at lists.infradead.org;
> linux-kernel at vger.kernel.org
> Subject: Re: [PATCH v3 3/3] dmaengine: imx-sdma: allocate max 20 bds for one
> transfer
> 
> Am Montag, den 23.07.2018, 13:55 +0000 schrieb Robin Gong:
> > > -----Original Message-----
> > > From: Lucas Stach [mailto:l.stach at pengutronix.de]
> > > Sent: 2018?7?23? 18:54
> > > To: Robin Gong <yibin.gong@nxp.com>; vkoul at kernel.org;
> > > dan.j.williams at intel.com; s.hauer at pengutronix.de; linux at armlinux.or
> > > g.uk
> > > Cc: dmaengine at vger.kernel.org; dl-linux-imx <linux-imx@nxp.com>;
> > > kernel at pengutronix.de; linux-arm-kernel at lists.infradead.org;
> > > linux-kernel at vger.kernel.org
> > > Subject: Re: [PATCH v3 3/3] dmaengine: imx-sdma: allocate max 20 bds
> > > for one transfer
> > >
> > > Am Dienstag, den 24.07.2018, 01:46 +0800 schrieb Robin Gong:
> > > > If multi-bds used in one transfer, all bds should be consisten
> > > > memory.To easily follow it, enlarge the dma pool size into 20 bds,
> > > > and it will report error if the number of bds is over than 20. For
> > > > dmatest, the max count for single transfer is NUM_BD *
> > >
> > > SDMA_BD_MAX_CNT
> > > > = 20 * 65535 = ~1.28MB.
> > >
> > > Both the commit message and the comment need a lot more care to
> > > actually tell what this commit is trying to achieve. Currently I
> > > don't follow at all. What does "consisten" mean? Do you mean BDs
> > > should be contiguous in memory?
> >
> > Yes, BDs should be contiguous??one by one in memory.
> 
> Okay, but this isn't what the code change does. By increasing the size
> parameter of the dma pool you just allocate 20 times as much memory as
> needed for each BD. So actually the BDs end up being very non- contiguous in
> memory as there are now holes of 19 BD sizes between the start of each BD.
Please notice only allocate bds memory from dma pool one time even in multi bds.
That's different with the common use case that allocate memory from dma pool everytime
for every bd. Why do this is to make sure all bd memory is contiguous for single transfer
whatever single bd or multi-bds, since two call dma_pool_alloc() can't promise the address
is contiguous especially for multi thread case such as dmatest 'threads_per_chan = 5'. You
can change to ' norandom=true ' and ' test_buf_size = 163840' in dmatest.c to look what
issue coming without this patch.
> 
> So something isn't right with this change.
I think this patch is the easy way to resolve the bd contiguous issue, but the cost is to
allocate more dma pool memory which may not used.
> 
> Regards,
> Lucas
> 
> > >
> > > What do you gain by over-allocating each BD by a factor of 20?
> >
> > I guess dma_pool_alloc will return error in such case, and then cause
> > dma setup transfer failure.
> > >
> > > Regards,
> > > Lucas
> > >
> > > > Signed-off-by: Robin Gong <yibin.gong@nxp.com>
> > > > ---
> > > > ?drivers/dma/imx-sdma.c | 17 ++++++++++++++++-
> > > > ?1 file changed, 16 insertions(+), 1 deletion(-)
> > > >
> > > > diff --git a/drivers/dma/imx-sdma.c b/drivers/dma/imx-sdma.c index
> > > > b4ec2d2..5973489 100644
> > > > --- a/drivers/dma/imx-sdma.c
> > > > +++ b/drivers/dma/imx-sdma.c
> > > > @@ -298,6 +298,15 @@ struct sdma_context_data {
> > > > > ?	u32??scratch7;
> > > >
> > > > ?} __attribute__ ((packed));
> > > >
> > > > +/*
> > > > + * All bds in one transfer should be consitent on SDMA. To
> > > > easily
> > > > +follow it,just
> > > > + * set the dma pool size as the enough bds. For example, in
> > > > dmatest
> > > > +case, the
> > > > + * max 20 bds means the max for single transfer is NUM_BD *
> > > > +SDMA_BD_MAX_CNT = 20
> > > > + * * 65535 = ~1.28MB. 20 bds supposed to be enough basically.If
> > > > it's
> > > > +still not
> > > > + * enough in some specific cases, enlarge it here.Warning
> > > > message
> > > > +would also
> > > > + * appear if the bd numbers is over than 20.
> > > > + */
> > > > +#define NUM_BD 20
> > > >
> > > > ?struct sdma_engine;
> > > >
> > > > @@ -1273,7 +1282,7 @@ static int sdma_alloc_chan_resources(struct
> > > > dma_chan *chan)
> > > > > ?		goto disable_clk_ahb;
> > > > > ?	sdmac->bd_pool = dma_pool_create("bd_pool", chan-
> > > > > >device->dev,
> > > > > -				sizeof(struct
> > > > > sdma_buffer_descriptor),
> > > > > +				NUM_BD * sizeof(struct
> > > > > sdma_buffer_descriptor),
> > > > > ?				32, 0);
> > > > > ?	return 0;
> > > >
> > > > @@ -1314,6 +1323,12 @@ static struct sdma_desc
> > > > *sdma_transfer_init(struct sdma_channel *sdmac,
> > > > ?{
> > > > > ?	struct sdma_desc *desc;
> > > > > +	if (bds > NUM_BD) {
> > > > > +		dev_err(sdmac->sdma->dev, "%d bds exceed the
> > > > > max %d\n",
> > > > > +			bds, NUM_BD);
> > > > > +		goto err_out;
> > > > > +	}
> > > >
> > > > +
> > > > > ?	desc = kzalloc((sizeof(*desc)), GFP_NOWAIT);
> > > > > ?	if (!desc)
> > > > > ?		goto err_out;

[v3,1/3] dmaengine: imx-sdma: add SDMA_BD_MAX_CNT to replace '0xffff'

[Vinod Koul]

On 24-07-18, 01:46, Robin Gong wrote:
> Add macro SDMA_BD_MAX_CNT to replace '0xffff'.

Applied, thanks

Re: [PATCH v3 1/3] dmaengine: imx-sdma: add SDMA_BD_MAX_CNT to replace '0xffff'

[Vinod]

On 24-07-18, 01:46, Robin Gong wrote:
> Add macro SDMA_BD_MAX_CNT to replace '0xffff'.

Applied, thanks

-- 
~Vinod

[PATCH v3 1/3] dmaengine: imx-sdma: add SDMA_BD_MAX_CNT to replace '0xffff'

[Vinod]

On 24-07-18, 01:46, Robin Gong wrote:
> Add macro SDMA_BD_MAX_CNT to replace '0xffff'.

Applied, thanks

-- 
~Vinod

[v3,2/3] dmaengine: imx-sdma: add memcpy interface

[Vinod Koul]

On 24-07-18, 01:46, Robin Gong wrote:
> Add MEMCPY capability for imx-sdma driver.

Applied, thanks

Re: [PATCH v3 2/3] dmaengine: imx-sdma: add memcpy interface

[Vinod]

On 24-07-18, 01:46, Robin Gong wrote:
> Add MEMCPY capability for imx-sdma driver.

Applied, thanks

-- 
~Vinod

[PATCH v3 2/3] dmaengine: imx-sdma: add memcpy interface

[Vinod]

On 24-07-18, 01:46, Robin Gong wrote:
> Add MEMCPY capability for imx-sdma driver.

Applied, thanks

-- 
~Vinod

[v3,3/3] dmaengine: imx-sdma: allocate max 20 bds for one transfer

[Robin Gong]

Hello Lucas,
	Any comment for my reply?

> -----Original Message-----
> From: Robin Gong
> Sent: 2018年7月25日 9:25
> To: 'Lucas Stach' <l.stach@pengutronix.de>; vkoul@kernel.org;
> dan.j.williams@intel.com; s.hauer@pengutronix.de; linux@armlinux.org.uk
> Cc: dmaengine@vger.kernel.org; dl-linux-imx <linux-imx@nxp.com>;
> kernel@pengutronix.de; linux-arm-kernel@lists.infradead.org;
> linux-kernel@vger.kernel.org
> Subject: RE: [PATCH v3 3/3] dmaengine: imx-sdma: allocate max 20 bds for one
> transfer
> 
> > -----Original Message-----
> > From: Lucas Stach [mailto:l.stach@pengutronix.de]
> > Sent: 2018年7月24日 17:22
> > To: Robin Gong <yibin.gong@nxp.com>; vkoul@kernel.org;
> > dan.j.williams@intel.com; s.hauer@pengutronix.de;
> > linux@armlinux.org.uk
> > Cc: dmaengine@vger.kernel.org; dl-linux-imx <linux-imx@nxp.com>;
> > kernel@pengutronix.de; linux-arm-kernel@lists.infradead.org;
> > linux-kernel@vger.kernel.org
> > Subject: Re: [PATCH v3 3/3] dmaengine: imx-sdma: allocate max 20 bds
> > for one transfer
> >
> > Am Montag, den 23.07.2018, 13:55 +0000 schrieb Robin Gong:
> > > > -----Original Message-----
> > > > From: Lucas Stach [mailto:l.stach@pengutronix.de]
> > > > Sent: 2018年7月23日 18:54
> > > > To: Robin Gong <yibin.gong@nxp.com>; vkoul@kernel.org;
> > > > dan.j.williams@intel.com; s.hauer@pengutronix.de;
> > > > linux@armlinux.or g.uk
> > > > Cc: dmaengine@vger.kernel.org; dl-linux-imx <linux-imx@nxp.com>;
> > > > kernel@pengutronix.de; linux-arm-kernel@lists.infradead.org;
> > > > linux-kernel@vger.kernel.org
> > > > Subject: Re: [PATCH v3 3/3] dmaengine: imx-sdma: allocate max 20
> > > > bds for one transfer
> > > >
> > > > Am Dienstag, den 24.07.2018, 01:46 +0800 schrieb Robin Gong:
> > > > > If multi-bds used in one transfer, all bds should be consisten
> > > > > memory.To easily follow it, enlarge the dma pool size into 20
> > > > > bds, and it will report error if the number of bds is over than
> > > > > 20. For dmatest, the max count for single transfer is NUM_BD *
> > > >
> > > > SDMA_BD_MAX_CNT
> > > > > = 20 * 65535 = ~1.28MB.
> > > >
> > > > Both the commit message and the comment need a lot more care to
> > > > actually tell what this commit is trying to achieve. Currently I
> > > > don't follow at all. What does "consisten" mean? Do you mean BDs
> > > > should be contiguous in memory?
> > >
> > > Yes, BDs should be contiguous  one by one in memory.
> >
> > Okay, but this isn't what the code change does. By increasing the size
> > parameter of the dma pool you just allocate 20 times as much memory as
> > needed for each BD. So actually the BDs end up being very non-
> > contiguous in memory as there are now holes of 19 BD sizes between the
> start of each BD.
> Please notice only allocate bds memory from dma pool one time even in multi
> bds.
> That's different with the common use case that allocate memory from dma
> pool everytime for every bd. Why do this is to make sure all bd memory is
> contiguous for single transfer whatever single bd or multi-bds, since two call
> dma_pool_alloc() can't promise the address is contiguous especially for multi
> thread case such as dmatest 'threads_per_chan = 5'. You can change to '
> norandom=true ' and ' test_buf_size = 163840' in dmatest.c to look what issue
> coming without this patch.
> >
> > So something isn't right with this change.
> I think this patch is the easy way to resolve the bd contiguous issue, but the
> cost is to allocate more dma pool memory which may not used.
> >
> > Regards,
> > Lucas
> >
> > > >
> > > > What do you gain by over-allocating each BD by a factor of 20?
> > >
> > > I guess dma_pool_alloc will return error in such case, and then
> > > cause dma setup transfer failure.
> > > >
> > > > Regards,
> > > > Lucas
> > > >
> > > > > Signed-off-by: Robin Gong <yibin.gong@nxp.com>
> > > > > ---
> > > > >  drivers/dma/imx-sdma.c | 17 ++++++++++++++++-
> > > > >  1 file changed, 16 insertions(+), 1 deletion(-)
> > > > >
> > > > > diff --git a/drivers/dma/imx-sdma.c b/drivers/dma/imx-sdma.c
> > > > > index
> > > > > b4ec2d2..5973489 100644
> > > > > --- a/drivers/dma/imx-sdma.c
> > > > > +++ b/drivers/dma/imx-sdma.c
> > > > > @@ -298,6 +298,15 @@ struct sdma_context_data {
> > > > > >  	u32  scratch7;
> > > > >
> > > > >  } __attribute__ ((packed));
> > > > >
> > > > > +/*
> > > > > + * All bds in one transfer should be consitent on SDMA. To
> > > > > easily
> > > > > +follow it,just
> > > > > + * set the dma pool size as the enough bds. For example, in
> > > > > dmatest
> > > > > +case, the
> > > > > + * max 20 bds means the max for single transfer is NUM_BD *
> > > > > +SDMA_BD_MAX_CNT = 20
> > > > > + * * 65535 = ~1.28MB. 20 bds supposed to be enough basically.If
> > > > > it's
> > > > > +still not
> > > > > + * enough in some specific cases, enlarge it here.Warning
> > > > > message
> > > > > +would also
> > > > > + * appear if the bd numbers is over than 20.
> > > > > + */
> > > > > +#define NUM_BD 20
> > > > >
> > > > >  struct sdma_engine;
> > > > >
> > > > > @@ -1273,7 +1282,7 @@ static int
> > > > > sdma_alloc_chan_resources(struct dma_chan *chan)
> > > > > >  		goto disable_clk_ahb;
> > > > > >  	sdmac->bd_pool = dma_pool_create("bd_pool", chan-
> > > > > > >device->dev,
> > > > > > -				sizeof(struct
> > > > > > sdma_buffer_descriptor),
> > > > > > +				NUM_BD * sizeof(struct
> > > > > > sdma_buffer_descriptor),
> > > > > >  				32, 0);
> > > > > >  	return 0;
> > > > >
> > > > > @@ -1314,6 +1323,12 @@ static struct sdma_desc
> > > > > *sdma_transfer_init(struct sdma_channel *sdmac,
> > > > >  {
> > > > > >  	struct sdma_desc *desc;
> > > > > > +	if (bds > NUM_BD) {
> > > > > > +		dev_err(sdmac->sdma->dev, "%d bds exceed the
> > > > > > max %d\n",
> > > > > > +			bds, NUM_BD);
> > > > > > +		goto err_out;
> > > > > > +	}
> > > > >
> > > > > +
> > > > > >  	desc = kzalloc((sizeof(*desc)), GFP_NOWAIT);
> > > > > >  	if (!desc)
> > > > > >  		goto err_out;

RE: [PATCH v3 3/3] dmaengine: imx-sdma: allocate max 20 bds for one transfer

[Robin Gong]

Hello Lucas,
	Any comment for my reply?

> -----Original Message-----
> From: Robin Gong
> Sent: 2018年7月25日 9:25
> To: 'Lucas Stach' <l.stach@pengutronix.de>; vkoul@kernel.org;
> dan.j.williams@intel.com; s.hauer@pengutronix.de; linux@armlinux.org.uk
> Cc: dmaengine@vger.kernel.org; dl-linux-imx <linux-imx@nxp.com>;
> kernel@pengutronix.de; linux-arm-kernel@lists.infradead.org;
> linux-kernel@vger.kernel.org
> Subject: RE: [PATCH v3 3/3] dmaengine: imx-sdma: allocate max 20 bds for one
> transfer
> 
> > -----Original Message-----
> > From: Lucas Stach [mailto:l.stach@pengutronix.de]
> > Sent: 2018年7月24日 17:22
> > To: Robin Gong <yibin.gong@nxp.com>; vkoul@kernel.org;
> > dan.j.williams@intel.com; s.hauer@pengutronix.de;
> > linux@armlinux.org.uk
> > Cc: dmaengine@vger.kernel.org; dl-linux-imx <linux-imx@nxp.com>;
> > kernel@pengutronix.de; linux-arm-kernel@lists.infradead.org;
> > linux-kernel@vger.kernel.org
> > Subject: Re: [PATCH v3 3/3] dmaengine: imx-sdma: allocate max 20 bds
> > for one transfer
> >
> > Am Montag, den 23.07.2018, 13:55 +0000 schrieb Robin Gong:
> > > > -----Original Message-----
> > > > From: Lucas Stach [mailto:l.stach@pengutronix.de]
> > > > Sent: 2018年7月23日 18:54
> > > > To: Robin Gong <yibin.gong@nxp.com>; vkoul@kernel.org;
> > > > dan.j.williams@intel.com; s.hauer@pengutronix.de;
> > > > linux@armlinux.or g.uk
> > > > Cc: dmaengine@vger.kernel.org; dl-linux-imx <linux-imx@nxp.com>;
> > > > kernel@pengutronix.de; linux-arm-kernel@lists.infradead.org;
> > > > linux-kernel@vger.kernel.org
> > > > Subject: Re: [PATCH v3 3/3] dmaengine: imx-sdma: allocate max 20
> > > > bds for one transfer
> > > >
> > > > Am Dienstag, den 24.07.2018, 01:46 +0800 schrieb Robin Gong:
> > > > > If multi-bds used in one transfer, all bds should be consisten
> > > > > memory.To easily follow it, enlarge the dma pool size into 20
> > > > > bds, and it will report error if the number of bds is over than
> > > > > 20. For dmatest, the max count for single transfer is NUM_BD *
> > > >
> > > > SDMA_BD_MAX_CNT
> > > > > = 20 * 65535 = ~1.28MB.
> > > >
> > > > Both the commit message and the comment need a lot more care to
> > > > actually tell what this commit is trying to achieve. Currently I
> > > > don't follow at all. What does "consisten" mean? Do you mean BDs
> > > > should be contiguous in memory?
> > >
> > > Yes, BDs should be contiguous  one by one in memory.
> >
> > Okay, but this isn't what the code change does. By increasing the size
> > parameter of the dma pool you just allocate 20 times as much memory as
> > needed for each BD. So actually the BDs end up being very non-
> > contiguous in memory as there are now holes of 19 BD sizes between the
> start of each BD.
> Please notice only allocate bds memory from dma pool one time even in multi
> bds.
> That's different with the common use case that allocate memory from dma
> pool everytime for every bd. Why do this is to make sure all bd memory is
> contiguous for single transfer whatever single bd or multi-bds, since two call
> dma_pool_alloc() can't promise the address is contiguous especially for multi
> thread case such as dmatest 'threads_per_chan = 5'. You can change to '
> norandom=true ' and ' test_buf_size = 163840' in dmatest.c to look what issue
> coming without this patch.
> >
> > So something isn't right with this change.
> I think this patch is the easy way to resolve the bd contiguous issue, but the
> cost is to allocate more dma pool memory which may not used.
> >
> > Regards,
> > Lucas
> >
> > > >
> > > > What do you gain by over-allocating each BD by a factor of 20?
> > >
> > > I guess dma_pool_alloc will return error in such case, and then
> > > cause dma setup transfer failure.
> > > >
> > > > Regards,
> > > > Lucas
> > > >
> > > > > Signed-off-by: Robin Gong <yibin.gong@nxp.com>
> > > > > ---
> > > > >  drivers/dma/imx-sdma.c | 17 ++++++++++++++++-
> > > > >  1 file changed, 16 insertions(+), 1 deletion(-)
> > > > >
> > > > > diff --git a/drivers/dma/imx-sdma.c b/drivers/dma/imx-sdma.c
> > > > > index
> > > > > b4ec2d2..5973489 100644
> > > > > --- a/drivers/dma/imx-sdma.c
> > > > > +++ b/drivers/dma/imx-sdma.c
> > > > > @@ -298,6 +298,15 @@ struct sdma_context_data {
> > > > > >  	u32  scratch7;
> > > > >
> > > > >  } __attribute__ ((packed));
> > > > >
> > > > > +/*
> > > > > + * All bds in one transfer should be consitent on SDMA. To
> > > > > easily
> > > > > +follow it,just
> > > > > + * set the dma pool size as the enough bds. For example, in
> > > > > dmatest
> > > > > +case, the
> > > > > + * max 20 bds means the max for single transfer is NUM_BD *
> > > > > +SDMA_BD_MAX_CNT = 20
> > > > > + * * 65535 = ~1.28MB. 20 bds supposed to be enough basically.If
> > > > > it's
> > > > > +still not
> > > > > + * enough in some specific cases, enlarge it here.Warning
> > > > > message
> > > > > +would also
> > > > > + * appear if the bd numbers is over than 20.
> > > > > + */
> > > > > +#define NUM_BD 20
> > > > >
> > > > >  struct sdma_engine;
> > > > >
> > > > > @@ -1273,7 +1282,7 @@ static int
> > > > > sdma_alloc_chan_resources(struct dma_chan *chan)
> > > > > >  		goto disable_clk_ahb;
> > > > > >  	sdmac->bd_pool = dma_pool_create("bd_pool", chan-
> > > > > > >device->dev,
> > > > > > -				sizeof(struct
> > > > > > sdma_buffer_descriptor),
> > > > > > +				NUM_BD * sizeof(struct
> > > > > > sdma_buffer_descriptor),
> > > > > >  				32, 0);
> > > > > >  	return 0;
> > > > >
> > > > > @@ -1314,6 +1323,12 @@ static struct sdma_desc
> > > > > *sdma_transfer_init(struct sdma_channel *sdmac,
> > > > >  {
> > > > > >  	struct sdma_desc *desc;
> > > > > > +	if (bds > NUM_BD) {
> > > > > > +		dev_err(sdmac->sdma->dev, "%d bds exceed the
> > > > > > max %d\n",
> > > > > > +			bds, NUM_BD);
> > > > > > +		goto err_out;
> > > > > > +	}
> > > > >
> > > > > +
> > > > > >  	desc = kzalloc((sizeof(*desc)), GFP_NOWAIT);
> > > > > >  	if (!desc)
> > > > > >  		goto err_out;

[PATCH v3 3/3] dmaengine: imx-sdma: allocate max 20 bds for one transfer

[Robin Gong]

Hello Lucas,
	Any comment for my reply?

> -----Original Message-----
> From: Robin Gong
> Sent: 2018?7?25? 9:25
> To: 'Lucas Stach' <l.stach@pengutronix.de>; vkoul at kernel.org;
> dan.j.williams at intel.com; s.hauer at pengutronix.de; linux at armlinux.org.uk
> Cc: dmaengine at vger.kernel.org; dl-linux-imx <linux-imx@nxp.com>;
> kernel at pengutronix.de; linux-arm-kernel at lists.infradead.org;
> linux-kernel at vger.kernel.org
> Subject: RE: [PATCH v3 3/3] dmaengine: imx-sdma: allocate max 20 bds for one
> transfer
> 
> > -----Original Message-----
> > From: Lucas Stach [mailto:l.stach at pengutronix.de]
> > Sent: 2018?7?24? 17:22
> > To: Robin Gong <yibin.gong@nxp.com>; vkoul at kernel.org;
> > dan.j.williams at intel.com; s.hauer at pengutronix.de;
> > linux at armlinux.org.uk
> > Cc: dmaengine at vger.kernel.org; dl-linux-imx <linux-imx@nxp.com>;
> > kernel at pengutronix.de; linux-arm-kernel at lists.infradead.org;
> > linux-kernel at vger.kernel.org
> > Subject: Re: [PATCH v3 3/3] dmaengine: imx-sdma: allocate max 20 bds
> > for one transfer
> >
> > Am Montag, den 23.07.2018, 13:55 +0000 schrieb Robin Gong:
> > > > -----Original Message-----
> > > > From: Lucas Stach [mailto:l.stach at pengutronix.de]
> > > > Sent: 2018?7?23? 18:54
> > > > To: Robin Gong <yibin.gong@nxp.com>; vkoul at kernel.org;
> > > > dan.j.williams at intel.com; s.hauer at pengutronix.de;
> > > > linux at armlinux.or g.uk
> > > > Cc: dmaengine at vger.kernel.org; dl-linux-imx <linux-imx@nxp.com>;
> > > > kernel at pengutronix.de; linux-arm-kernel at lists.infradead.org;
> > > > linux-kernel at vger.kernel.org
> > > > Subject: Re: [PATCH v3 3/3] dmaengine: imx-sdma: allocate max 20
> > > > bds for one transfer
> > > >
> > > > Am Dienstag, den 24.07.2018, 01:46 +0800 schrieb Robin Gong:
> > > > > If multi-bds used in one transfer, all bds should be consisten
> > > > > memory.To easily follow it, enlarge the dma pool size into 20
> > > > > bds, and it will report error if the number of bds is over than
> > > > > 20. For dmatest, the max count for single transfer is NUM_BD *
> > > >
> > > > SDMA_BD_MAX_CNT
> > > > > = 20 * 65535 = ~1.28MB.
> > > >
> > > > Both the commit message and the comment need a lot more care to
> > > > actually tell what this commit is trying to achieve. Currently I
> > > > don't follow at all. What does "consisten" mean? Do you mean BDs
> > > > should be contiguous in memory?
> > >
> > > Yes, BDs should be contiguous??one by one in memory.
> >
> > Okay, but this isn't what the code change does. By increasing the size
> > parameter of the dma pool you just allocate 20 times as much memory as
> > needed for each BD. So actually the BDs end up being very non-
> > contiguous in memory as there are now holes of 19 BD sizes between the
> start of each BD.
> Please notice only allocate bds memory from dma pool one time even in multi
> bds.
> That's different with the common use case that allocate memory from dma
> pool everytime for every bd. Why do this is to make sure all bd memory is
> contiguous for single transfer whatever single bd or multi-bds, since two call
> dma_pool_alloc() can't promise the address is contiguous especially for multi
> thread case such as dmatest 'threads_per_chan = 5'. You can change to '
> norandom=true ' and ' test_buf_size = 163840' in dmatest.c to look what issue
> coming without this patch.
> >
> > So something isn't right with this change.
> I think this patch is the easy way to resolve the bd contiguous issue, but the
> cost is to allocate more dma pool memory which may not used.
> >
> > Regards,
> > Lucas
> >
> > > >
> > > > What do you gain by over-allocating each BD by a factor of 20?
> > >
> > > I guess dma_pool_alloc will return error in such case, and then
> > > cause dma setup transfer failure.
> > > >
> > > > Regards,
> > > > Lucas
> > > >
> > > > > Signed-off-by: Robin Gong <yibin.gong@nxp.com>
> > > > > ---
> > > > > ?drivers/dma/imx-sdma.c | 17 ++++++++++++++++-
> > > > > ?1 file changed, 16 insertions(+), 1 deletion(-)
> > > > >
> > > > > diff --git a/drivers/dma/imx-sdma.c b/drivers/dma/imx-sdma.c
> > > > > index
> > > > > b4ec2d2..5973489 100644
> > > > > --- a/drivers/dma/imx-sdma.c
> > > > > +++ b/drivers/dma/imx-sdma.c
> > > > > @@ -298,6 +298,15 @@ struct sdma_context_data {
> > > > > > ?	u32??scratch7;
> > > > >
> > > > > ?} __attribute__ ((packed));
> > > > >
> > > > > +/*
> > > > > + * All bds in one transfer should be consitent on SDMA. To
> > > > > easily
> > > > > +follow it,just
> > > > > + * set the dma pool size as the enough bds. For example, in
> > > > > dmatest
> > > > > +case, the
> > > > > + * max 20 bds means the max for single transfer is NUM_BD *
> > > > > +SDMA_BD_MAX_CNT = 20
> > > > > + * * 65535 = ~1.28MB. 20 bds supposed to be enough basically.If
> > > > > it's
> > > > > +still not
> > > > > + * enough in some specific cases, enlarge it here.Warning
> > > > > message
> > > > > +would also
> > > > > + * appear if the bd numbers is over than 20.
> > > > > + */
> > > > > +#define NUM_BD 20
> > > > >
> > > > > ?struct sdma_engine;
> > > > >
> > > > > @@ -1273,7 +1282,7 @@ static int
> > > > > sdma_alloc_chan_resources(struct dma_chan *chan)
> > > > > > ?		goto disable_clk_ahb;
> > > > > > ?	sdmac->bd_pool = dma_pool_create("bd_pool", chan-
> > > > > > >device->dev,
> > > > > > -				sizeof(struct
> > > > > > sdma_buffer_descriptor),
> > > > > > +				NUM_BD * sizeof(struct
> > > > > > sdma_buffer_descriptor),
> > > > > > ?				32, 0);
> > > > > > ?	return 0;
> > > > >
> > > > > @@ -1314,6 +1323,12 @@ static struct sdma_desc
> > > > > *sdma_transfer_init(struct sdma_channel *sdmac,
> > > > > ?{
> > > > > > ?	struct sdma_desc *desc;
> > > > > > +	if (bds > NUM_BD) {
> > > > > > +		dev_err(sdmac->sdma->dev, "%d bds exceed the
> > > > > > max %d\n",
> > > > > > +			bds, NUM_BD);
> > > > > > +		goto err_out;
> > > > > > +	}
> > > > >
> > > > > +
> > > > > > ?	desc = kzalloc((sizeof(*desc)), GFP_NOWAIT);
> > > > > > ?	if (!desc)
> > > > > > ?		goto err_out;

[v3,3/3] dmaengine: imx-sdma: allocate max 20 bds for one transfer

[Lucas Stach]

Hi Robin,

Am Montag, den 06.08.2018, 08:04 +0000 schrieb Robin Gong:
> Hello Lucas,
> 	Any comment for my reply?

So I've looked at this again and sadly I need to NACK this patch. It is
a total API abuse of the dma_pool API and even the patch introducing
the dma_pool usage in this driver is wrong and should be reverted.

The SDMA need contiguous buffer descriptors for each channel, something
the dma_pool abstraction isn't able to provide. So either the dma_pool
implementation needs to be extended to support this use-case, or you
can't use this at all in the sdma driver. Adding hacks, which are
abusing the API, to cram a dma_pool into the sdma driver is not a valid
way to implement things for upstream.

Regards,
Lucas

> > -----Original Message-----
> > From: Robin Gong
> > Sent: 2018年7月25日 9:25
> > To: 'Lucas Stach' <l.stach@pengutronix.de>; vkoul@kernel.org;
> > dan.j.williams@intel.com; s.hauer@pengutronix.de; linux@armlinux.or
> > g.uk
> > Cc: dmaengine@vger.kernel.org; dl-linux-imx <linux-imx@nxp.com>;
> > kernel@pengutronix.de; linux-arm-kernel@lists.infradead.org;
> > linux-kernel@vger.kernel.org
> > Subject: RE: [PATCH v3 3/3] dmaengine: imx-sdma: allocate max 20
> > bds for one
> > transfer
> > 
> > > -----Original Message-----
> > > From: Lucas Stach [mailto:l.stach@pengutronix.de]
> > > Sent: 2018年7月24日 17:22
> > > To: Robin Gong <yibin.gong@nxp.com>; vkoul@kernel.org;
> > > dan.j.williams@intel.com; s.hauer@pengutronix.de;
> > > linux@armlinux.org.uk
> > > Cc: dmaengine@vger.kernel.org; dl-linux-imx <linux-imx@nxp.com>;
> > > kernel@pengutronix.de; linux-arm-kernel@lists.infradead.org;
> > > linux-kernel@vger.kernel.org
> > > Subject: Re: [PATCH v3 3/3] dmaengine: imx-sdma: allocate max 20
> > > bds
> > > for one transfer
> > > 
> > > Am Montag, den 23.07.2018, 13:55 +0000 schrieb Robin Gong:
> > > > > -----Original Message-----
> > > > > From: Lucas Stach [mailto:l.stach@pengutronix.de]
> > > > > Sent: 2018年7月23日 18:54
> > > > > To: Robin Gong <yibin.gong@nxp.com>; vkoul@kernel.org;
> > > > > dan.j.williams@intel.com; s.hauer@pengutronix.de;
> > > > > linux@armlinux.or g.uk
> > > > > Cc: dmaengine@vger.kernel.org; dl-linux-imx <linux-imx@nxp.co
> > > > > m>;
> > > > > kernel@pengutronix.de; linux-arm-kernel@lists.infradead.org;
> > > > > linux-kernel@vger.kernel.org
> > > > > Subject: Re: [PATCH v3 3/3] dmaengine: imx-sdma: allocate max
> > > > > 20
> > > > > bds for one transfer
> > > > > 
> > > > > Am Dienstag, den 24.07.2018, 01:46 +0800 schrieb Robin Gong:
> > > > > > If multi-bds used in one transfer, all bds should be
> > > > > > consisten
> > > > > > memory.To easily follow it, enlarge the dma pool size into
> > > > > > 20
> > > > > > bds, and it will report error if the number of bds is over
> > > > > > than
> > > > > > 20. For dmatest, the max count for single transfer is
> > > > > > NUM_BD *
> > > > > 
> > > > > SDMA_BD_MAX_CNT
> > > > > > = 20 * 65535 = ~1.28MB.
> > > > > 
> > > > > Both the commit message and the comment need a lot more care
> > > > > to
> > > > > actually tell what this commit is trying to achieve.
> > > > > Currently I
> > > > > don't follow at all. What does "consisten" mean? Do you mean
> > > > > BDs
> > > > > should be contiguous in memory?
> > > > 
> > > > Yes, BDs should be contiguous  one by one in memory.
> > > 
> > > Okay, but this isn't what the code change does. By increasing the
> > > size
> > > parameter of the dma pool you just allocate 20 times as much
> > > memory as
> > > needed for each BD. So actually the BDs end up being very non-
> > > contiguous in memory as there are now holes of 19 BD sizes
> > > between the
> > 
> > start of each BD.
> > Please notice only allocate bds memory from dma pool one time even
> > in multi
> > bds.
> > That's different with the common use case that allocate memory from
> > dma
> > pool everytime for every bd. Why do this is to make sure all bd
> > memory is
> > contiguous for single transfer whatever single bd or multi-bds,
> > since two call
> > dma_pool_alloc() can't promise the address is contiguous especially
> > for multi
> > thread case such as dmatest 'threads_per_chan = 5'. You can change
> > to '
> > norandom=true ' and ' test_buf_size = 163840' in dmatest.c to look
> > what issue
> > coming without this patch.
> > > 
> > > So something isn't right with this change.
> > 
> > I think this patch is the easy way to resolve the bd contiguous
> > issue, but the
> > cost is to allocate more dma pool memory which may not used.
> > > 
> > > Regards,
> > > Lucas
> > > 
> > > > > 
> > > > > What do you gain by over-allocating each BD by a factor of
> > > > > 20?
> > > > 
> > > > I guess dma_pool_alloc will return error in such case, and then
> > > > cause dma setup transfer failure.
> > > > > 
> > > > > Regards,
> > > > > Lucas
> > > > > 
> > > > > > Signed-off-by: Robin Gong <yibin.gong@nxp.com>
> > > > > > ---
> > > > > >  drivers/dma/imx-sdma.c | 17 ++++++++++++++++-
> > > > > >  1 file changed, 16 insertions(+), 1 deletion(-)
> > > > > > 
> > > > > > diff --git a/drivers/dma/imx-sdma.c b/drivers/dma/imx-
> > > > > > sdma.c
> > > > > > index
> > > > > > b4ec2d2..5973489 100644
> > > > > > --- a/drivers/dma/imx-sdma.c
> > > > > > +++ b/drivers/dma/imx-sdma.c
> > > > > > @@ -298,6 +298,15 @@ struct sdma_context_data {
> > > > > > >  	u32  scratch7;
> > > > > > 
> > > > > >  } __attribute__ ((packed));
> > > > > > 
> > > > > > +/*
> > > > > > + * All bds in one transfer should be consitent on SDMA. To
> > > > > > easily
> > > > > > +follow it,just
> > > > > > + * set the dma pool size as the enough bds. For example,
> > > > > > in
> > > > > > dmatest
> > > > > > +case, the
> > > > > > + * max 20 bds means the max for single transfer is NUM_BD
> > > > > > *
> > > > > > +SDMA_BD_MAX_CNT = 20
> > > > > > + * * 65535 = ~1.28MB. 20 bds supposed to be enough
> > > > > > basically.If
> > > > > > it's
> > > > > > +still not
> > > > > > + * enough in some specific cases, enlarge it here.Warning
> > > > > > message
> > > > > > +would also
> > > > > > + * appear if the bd numbers is over than 20.
> > > > > > + */
> > > > > > +#define NUM_BD 20
> > > > > > 
> > > > > >  struct sdma_engine;
> > > > > > 
> > > > > > @@ -1273,7 +1282,7 @@ static int
> > > > > > sdma_alloc_chan_resources(struct dma_chan *chan)
> > > > > > >  		goto disable_clk_ahb;
> > > > > > >  	sdmac->bd_pool = dma_pool_create("bd_pool",
> > > > > > > chan-
> > > > > > > > device->dev,
> > > > > > > 
> > > > > > > -				sizeof(struct
> > > > > > > sdma_buffer_descriptor),
> > > > > > > +				NUM_BD * sizeof(struct
> > > > > > > sdma_buffer_descriptor),
> > > > > > >  				32, 0);
> > > > > > >  	return 0;
> > > > > > 
> > > > > > @@ -1314,6 +1323,12 @@ static struct sdma_desc
> > > > > > *sdma_transfer_init(struct sdma_channel *sdmac,
> > > > > >  {
> > > > > > >  	struct sdma_desc *desc;
> > > > > > > +	if (bds > NUM_BD) {
> > > > > > > +		dev_err(sdmac->sdma->dev, "%d bds exceed
> > > > > > > the
> > > > > > > max %d\n",
> > > > > > > +			bds, NUM_BD);
> > > > > > > +		goto err_out;
> > > > > > > +	}
> > > > > > 
> > > > > > +
> > > > > > >  	desc = kzalloc((sizeof(*desc)), GFP_NOWAIT);
> > > > > > >  	if (!desc)
> > > > > > >  		goto err_out;
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Re: [PATCH v3 3/3] dmaengine: imx-sdma: allocate max 20 bds for one transfer

[Lucas Stach]

Hi Robin,

Am Montag, den 06.08.2018, 08:04 +0000 schrieb Robin Gong:
> Hello Lucas,
> 	Any comment for my reply?

So I've looked at this again and sadly I need to NACK this patch. It is
a total API abuse of the dma_pool API and even the patch introducing
the dma_pool usage in this driver is wrong and should be reverted.

The SDMA need contiguous buffer descriptors for each channel, something
the dma_pool abstraction isn't able to provide. So either the dma_pool
implementation needs to be extended to support this use-case, or you
can't use this at all in the sdma driver. Adding hacks, which are
abusing the API, to cram a dma_pool into the sdma driver is not a valid
way to implement things for upstream.

Regards,
Lucas

> > -----Original Message-----
> > From: Robin Gong
> > Sent: 2018年7月25日 9:25
> > To: 'Lucas Stach' <l.stach@pengutronix.de>; vkoul@kernel.org;
> > dan.j.williams@intel.com; s.hauer@pengutronix.de; linux@armlinux.or
> > g.uk
> > Cc: dmaengine@vger.kernel.org; dl-linux-imx <linux-imx@nxp.com>;
> > kernel@pengutronix.de; linux-arm-kernel@lists.infradead.org;
> > linux-kernel@vger.kernel.org
> > Subject: RE: [PATCH v3 3/3] dmaengine: imx-sdma: allocate max 20
> > bds for one
> > transfer
> > 
> > > -----Original Message-----
> > > From: Lucas Stach [mailto:l.stach@pengutronix.de]
> > > Sent: 2018年7月24日 17:22
> > > To: Robin Gong <yibin.gong@nxp.com>; vkoul@kernel.org;
> > > dan.j.williams@intel.com; s.hauer@pengutronix.de;
> > > linux@armlinux.org.uk
> > > Cc: dmaengine@vger.kernel.org; dl-linux-imx <linux-imx@nxp.com>;
> > > kernel@pengutronix.de; linux-arm-kernel@lists.infradead.org;
> > > linux-kernel@vger.kernel.org
> > > Subject: Re: [PATCH v3 3/3] dmaengine: imx-sdma: allocate max 20
> > > bds
> > > for one transfer
> > > 
> > > Am Montag, den 23.07.2018, 13:55 +0000 schrieb Robin Gong:
> > > > > -----Original Message-----
> > > > > From: Lucas Stach [mailto:l.stach@pengutronix.de]
> > > > > Sent: 2018年7月23日 18:54
> > > > > To: Robin Gong <yibin.gong@nxp.com>; vkoul@kernel.org;
> > > > > dan.j.williams@intel.com; s.hauer@pengutronix.de;
> > > > > linux@armlinux.or g.uk
> > > > > Cc: dmaengine@vger.kernel.org; dl-linux-imx <linux-imx@nxp.co
> > > > > m>;
> > > > > kernel@pengutronix.de; linux-arm-kernel@lists.infradead.org;
> > > > > linux-kernel@vger.kernel.org
> > > > > Subject: Re: [PATCH v3 3/3] dmaengine: imx-sdma: allocate max
> > > > > 20
> > > > > bds for one transfer
> > > > > 
> > > > > Am Dienstag, den 24.07.2018, 01:46 +0800 schrieb Robin Gong:
> > > > > > If multi-bds used in one transfer, all bds should be
> > > > > > consisten
> > > > > > memory.To easily follow it, enlarge the dma pool size into
> > > > > > 20
> > > > > > bds, and it will report error if the number of bds is over
> > > > > > than
> > > > > > 20. For dmatest, the max count for single transfer is
> > > > > > NUM_BD *
> > > > > 
> > > > > SDMA_BD_MAX_CNT
> > > > > > = 20 * 65535 = ~1.28MB.
> > > > > 
> > > > > Both the commit message and the comment need a lot more care
> > > > > to
> > > > > actually tell what this commit is trying to achieve.
> > > > > Currently I
> > > > > don't follow at all. What does "consisten" mean? Do you mean
> > > > > BDs
> > > > > should be contiguous in memory?
> > > > 
> > > > Yes, BDs should be contiguous  one by one in memory.
> > > 
> > > Okay, but this isn't what the code change does. By increasing the
> > > size
> > > parameter of the dma pool you just allocate 20 times as much
> > > memory as
> > > needed for each BD. So actually the BDs end up being very non-
> > > contiguous in memory as there are now holes of 19 BD sizes
> > > between the
> > 
> > start of each BD.
> > Please notice only allocate bds memory from dma pool one time even
> > in multi
> > bds.
> > That's different with the common use case that allocate memory from
> > dma
> > pool everytime for every bd. Why do this is to make sure all bd
> > memory is
> > contiguous for single transfer whatever single bd or multi-bds,
> > since two call
> > dma_pool_alloc() can't promise the address is contiguous especially
> > for multi
> > thread case such as dmatest 'threads_per_chan = 5'. You can change
> > to '
> > norandom=true ' and ' test_buf_size = 163840' in dmatest.c to look
> > what issue
> > coming without this patch.
> > > 
> > > So something isn't right with this change.
> > 
> > I think this patch is the easy way to resolve the bd contiguous
> > issue, but the
> > cost is to allocate more dma pool memory which may not used.
> > > 
> > > Regards,
> > > Lucas
> > > 
> > > > > 
> > > > > What do you gain by over-allocating each BD by a factor of
> > > > > 20?
> > > > 
> > > > I guess dma_pool_alloc will return error in such case, and then
> > > > cause dma setup transfer failure.
> > > > > 
> > > > > Regards,
> > > > > Lucas
> > > > > 
> > > > > > Signed-off-by: Robin Gong <yibin.gong@nxp.com>
> > > > > > ---
> > > > > >  drivers/dma/imx-sdma.c | 17 ++++++++++++++++-
> > > > > >  1 file changed, 16 insertions(+), 1 deletion(-)
> > > > > > 
> > > > > > diff --git a/drivers/dma/imx-sdma.c b/drivers/dma/imx-
> > > > > > sdma.c
> > > > > > index
> > > > > > b4ec2d2..5973489 100644
> > > > > > --- a/drivers/dma/imx-sdma.c
> > > > > > +++ b/drivers/dma/imx-sdma.c
> > > > > > @@ -298,6 +298,15 @@ struct sdma_context_data {
> > > > > > >  	u32  scratch7;
> > > > > > 
> > > > > >  } __attribute__ ((packed));
> > > > > > 
> > > > > > +/*
> > > > > > + * All bds in one transfer should be consitent on SDMA. To
> > > > > > easily
> > > > > > +follow it,just
> > > > > > + * set the dma pool size as the enough bds. For example,
> > > > > > in
> > > > > > dmatest
> > > > > > +case, the
> > > > > > + * max 20 bds means the max for single transfer is NUM_BD
> > > > > > *
> > > > > > +SDMA_BD_MAX_CNT = 20
> > > > > > + * * 65535 = ~1.28MB. 20 bds supposed to be enough
> > > > > > basically.If
> > > > > > it's
> > > > > > +still not
> > > > > > + * enough in some specific cases, enlarge it here.Warning
> > > > > > message
> > > > > > +would also
> > > > > > + * appear if the bd numbers is over than 20.
> > > > > > + */
> > > > > > +#define NUM_BD 20
> > > > > > 
> > > > > >  struct sdma_engine;
> > > > > > 
> > > > > > @@ -1273,7 +1282,7 @@ static int
> > > > > > sdma_alloc_chan_resources(struct dma_chan *chan)
> > > > > > >  		goto disable_clk_ahb;
> > > > > > >  	sdmac->bd_pool = dma_pool_create("bd_pool",
> > > > > > > chan-
> > > > > > > > device->dev,
> > > > > > > 
> > > > > > > -				sizeof(struct
> > > > > > > sdma_buffer_descriptor),
> > > > > > > +				NUM_BD * sizeof(struct
> > > > > > > sdma_buffer_descriptor),
> > > > > > >  				32, 0);
> > > > > > >  	return 0;
> > > > > > 
> > > > > > @@ -1314,6 +1323,12 @@ static struct sdma_desc
> > > > > > *sdma_transfer_init(struct sdma_channel *sdmac,
> > > > > >  {
> > > > > > >  	struct sdma_desc *desc;
> > > > > > > +	if (bds > NUM_BD) {
> > > > > > > +		dev_err(sdmac->sdma->dev, "%d bds exceed
> > > > > > > the
> > > > > > > max %d\n",
> > > > > > > +			bds, NUM_BD);
> > > > > > > +		goto err_out;
> > > > > > > +	}
> > > > > > 
> > > > > > +
> > > > > > >  	desc = kzalloc((sizeof(*desc)), GFP_NOWAIT);
> > > > > > >  	if (!desc)
> > > > > > >  		goto err_out;

[PATCH v3 3/3] dmaengine: imx-sdma: allocate max 20 bds for one transfer

[Lucas Stach]

Hi Robin,

Am Montag, den 06.08.2018, 08:04 +0000 schrieb Robin Gong:
> Hello Lucas,
> 	Any comment for my reply?

So I've looked at this again and sadly I need to NACK this patch. It is
a total API abuse of the dma_pool API and even the patch introducing
the dma_pool usage in this driver is wrong and should be reverted.

The SDMA need contiguous buffer descriptors for each channel, something
the dma_pool abstraction isn't able to provide. So either the dma_pool
implementation needs to be extended to support this use-case, or you
can't use this at all in the sdma driver. Adding hacks, which are
abusing the API, to cram a dma_pool into the sdma driver is not a valid
way to implement things for upstream.

Regards,
Lucas

> > -----Original Message-----
> > From: Robin Gong
> > Sent: 2018?7?25? 9:25
> > To: 'Lucas Stach' <l.stach@pengutronix.de>; vkoul at kernel.org;
> > dan.j.williams at intel.com; s.hauer at pengutronix.de; linux at armlinux.or
> > g.uk
> > Cc: dmaengine at vger.kernel.org; dl-linux-imx <linux-imx@nxp.com>;
> > kernel at pengutronix.de; linux-arm-kernel at lists.infradead.org;
> > linux-kernel at vger.kernel.org
> > Subject: RE: [PATCH v3 3/3] dmaengine: imx-sdma: allocate max 20
> > bds for one
> > transfer
> > 
> > > -----Original Message-----
> > > From: Lucas Stach [mailto:l.stach at pengutronix.de]
> > > Sent: 2018?7?24? 17:22
> > > To: Robin Gong <yibin.gong@nxp.com>; vkoul at kernel.org;
> > > dan.j.williams at intel.com; s.hauer at pengutronix.de;
> > > linux at armlinux.org.uk
> > > Cc: dmaengine at vger.kernel.org; dl-linux-imx <linux-imx@nxp.com>;
> > > kernel at pengutronix.de; linux-arm-kernel at lists.infradead.org;
> > > linux-kernel at vger.kernel.org
> > > Subject: Re: [PATCH v3 3/3] dmaengine: imx-sdma: allocate max 20
> > > bds
> > > for one transfer
> > > 
> > > Am Montag, den 23.07.2018, 13:55 +0000 schrieb Robin Gong:
> > > > > -----Original Message-----
> > > > > From: Lucas Stach [mailto:l.stach at pengutronix.de]
> > > > > Sent: 2018?7?23? 18:54
> > > > > To: Robin Gong <yibin.gong@nxp.com>; vkoul at kernel.org;
> > > > > dan.j.williams at intel.com; s.hauer at pengutronix.de;
> > > > > linux at armlinux.or g.uk
> > > > > Cc: dmaengine at vger.kernel.org; dl-linux-imx <linux-imx@nxp.co
> > > > > m>;
> > > > > kernel at pengutronix.de; linux-arm-kernel at lists.infradead.org;
> > > > > linux-kernel at vger.kernel.org
> > > > > Subject: Re: [PATCH v3 3/3] dmaengine: imx-sdma: allocate max
> > > > > 20
> > > > > bds for one transfer
> > > > > 
> > > > > Am Dienstag, den 24.07.2018, 01:46 +0800 schrieb Robin Gong:
> > > > > > If multi-bds used in one transfer, all bds should be
> > > > > > consisten
> > > > > > memory.To easily follow it, enlarge the dma pool size into
> > > > > > 20
> > > > > > bds, and it will report error if the number of bds is over
> > > > > > than
> > > > > > 20. For dmatest, the max count for single transfer is
> > > > > > NUM_BD *
> > > > > 
> > > > > SDMA_BD_MAX_CNT
> > > > > > = 20 * 65535 = ~1.28MB.
> > > > > 
> > > > > Both the commit message and the comment need a lot more care
> > > > > to
> > > > > actually tell what this commit is trying to achieve.
> > > > > Currently I
> > > > > don't follow at all. What does "consisten" mean? Do you mean
> > > > > BDs
> > > > > should be contiguous in memory?
> > > > 
> > > > Yes, BDs should be contiguous??one by one in memory.
> > > 
> > > Okay, but this isn't what the code change does. By increasing the
> > > size
> > > parameter of the dma pool you just allocate 20 times as much
> > > memory as
> > > needed for each BD. So actually the BDs end up being very non-
> > > contiguous in memory as there are now holes of 19 BD sizes
> > > between the
> > 
> > start of each BD.
> > Please notice only allocate bds memory from dma pool one time even
> > in multi
> > bds.
> > That's different with the common use case that allocate memory from
> > dma
> > pool everytime for every bd. Why do this is to make sure all bd
> > memory is
> > contiguous for single transfer whatever single bd or multi-bds,
> > since two call
> > dma_pool_alloc() can't promise the address is contiguous especially
> > for multi
> > thread case such as dmatest 'threads_per_chan = 5'. You can change
> > to '
> > norandom=true ' and ' test_buf_size = 163840' in dmatest.c to look
> > what issue
> > coming without this patch.
> > > 
> > > So something isn't right with this change.
> > 
> > I think this patch is the easy way to resolve the bd contiguous
> > issue, but the
> > cost is to allocate more dma pool memory which may not used.
> > > 
> > > Regards,
> > > Lucas
> > > 
> > > > > 
> > > > > What do you gain by over-allocating each BD by a factor of
> > > > > 20?
> > > > 
> > > > I guess dma_pool_alloc will return error in such case, and then
> > > > cause dma setup transfer failure.
> > > > > 
> > > > > Regards,
> > > > > Lucas
> > > > > 
> > > > > > Signed-off-by: Robin Gong <yibin.gong@nxp.com>
> > > > > > ---
> > > > > > ?drivers/dma/imx-sdma.c | 17 ++++++++++++++++-
> > > > > > ?1 file changed, 16 insertions(+), 1 deletion(-)
> > > > > > 
> > > > > > diff --git a/drivers/dma/imx-sdma.c b/drivers/dma/imx-
> > > > > > sdma.c
> > > > > > index
> > > > > > b4ec2d2..5973489 100644
> > > > > > --- a/drivers/dma/imx-sdma.c
> > > > > > +++ b/drivers/dma/imx-sdma.c
> > > > > > @@ -298,6 +298,15 @@ struct sdma_context_data {
> > > > > > > ?	u32??scratch7;
> > > > > > 
> > > > > > ?} __attribute__ ((packed));
> > > > > > 
> > > > > > +/*
> > > > > > + * All bds in one transfer should be consitent on SDMA. To
> > > > > > easily
> > > > > > +follow it,just
> > > > > > + * set the dma pool size as the enough bds. For example,
> > > > > > in
> > > > > > dmatest
> > > > > > +case, the
> > > > > > + * max 20 bds means the max for single transfer is NUM_BD
> > > > > > *
> > > > > > +SDMA_BD_MAX_CNT = 20
> > > > > > + * * 65535 = ~1.28MB. 20 bds supposed to be enough
> > > > > > basically.If
> > > > > > it's
> > > > > > +still not
> > > > > > + * enough in some specific cases, enlarge it here.Warning
> > > > > > message
> > > > > > +would also
> > > > > > + * appear if the bd numbers is over than 20.
> > > > > > + */
> > > > > > +#define NUM_BD 20
> > > > > > 
> > > > > > ?struct sdma_engine;
> > > > > > 
> > > > > > @@ -1273,7 +1282,7 @@ static int
> > > > > > sdma_alloc_chan_resources(struct dma_chan *chan)
> > > > > > > ?		goto disable_clk_ahb;
> > > > > > > ?	sdmac->bd_pool = dma_pool_create("bd_pool",
> > > > > > > chan-
> > > > > > > > device->dev,
> > > > > > > 
> > > > > > > -				sizeof(struct
> > > > > > > sdma_buffer_descriptor),
> > > > > > > +				NUM_BD * sizeof(struct
> > > > > > > sdma_buffer_descriptor),
> > > > > > > ?				32, 0);
> > > > > > > ?	return 0;
> > > > > > 
> > > > > > @@ -1314,6 +1323,12 @@ static struct sdma_desc
> > > > > > *sdma_transfer_init(struct sdma_channel *sdmac,
> > > > > > ?{
> > > > > > > ?	struct sdma_desc *desc;
> > > > > > > +	if (bds > NUM_BD) {
> > > > > > > +		dev_err(sdmac->sdma->dev, "%d bds exceed
> > > > > > > the
> > > > > > > max %d\n",
> > > > > > > +			bds, NUM_BD);
> > > > > > > +		goto err_out;
> > > > > > > +	}
> > > > > > 
> > > > > > +
> > > > > > > ?	desc = kzalloc((sizeof(*desc)), GFP_NOWAIT);
> > > > > > > ?	if (!desc)
> > > > > > > ?		goto err_out;