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From: "Emilio G. Cota" <cota@braap.org>
To: guangrong.xiao@gmail.com
Cc: kvm@vger.kernel.org, quintela@redhat.com, mtosatti@redhat.com,
	Xiao Guangrong <xiaoguangrong@tencent.com>,
	qemu-devel@nongnu.org, peterx@redhat.com, dgilbert@redhat.com,
	wei.w.wang@intel.com, mst@redhat.com, jiang.biao2@zte.com.cn,
	pbonzini@redhat.com
Subject: Re: [PATCH 1/4] ptr_ring: port ptr_ring from linux kernel to QEMU
Date: Tue, 16 Oct 2018 12:40:19 -0400	[thread overview]
Message-ID: <20181016164019.GA5666@flamenco> (raw)
In-Reply-To: <20181016111006.629-2-xiaoguangrong@tencent.com>

On Tue, Oct 16, 2018 at 19:10:03 +0800, guangrong.xiao@gmail.com wrote:
(snip)
> diff --git a/include/qemu/ptr_ring.h b/include/qemu/ptr_ring.h
> new file mode 100644
> index 0000000000..d8266d45f6
> --- /dev/null
> +++ b/include/qemu/ptr_ring.h
> @@ -0,0 +1,235 @@
(snip)
> +#define SMP_CACHE_BYTES      64
> +#define ____cacheline_aligned_in_smp \
> +        __attribute__((__aligned__(SMP_CACHE_BYTES)))

You could use QEMU_ALIGNED() here.

> +
> +#define WRITE_ONCE(ptr, val) \
> +    (*((volatile typeof(ptr) *)(&(ptr))) = (val))
> +#define READ_ONCE(ptr) (*((volatile typeof(ptr) *)(&(ptr))))

Why not atomic_read/set, like in the rest of the QEMU code base?

Furthermore, READ_ONCE in the kernel implies smp_read_barrier_depends,
whereas here you're not bringing that in. That means that your
barrier pairing, e.g.

> +    /* Pairs with READ_ONCE in ptr_ring_consume. */
> +    smp_wmb();

is incorrect for Alpha.

Thanks,

		E.

WARNING: multiple messages have this Message-ID (diff)
From: "Emilio G. Cota" <cota@braap.org>
To: guangrong.xiao@gmail.com
Cc: pbonzini@redhat.com, mst@redhat.com, mtosatti@redhat.com,
	kvm@vger.kernel.org, quintela@redhat.com,
	Xiao Guangrong <xiaoguangrong@tencent.com>,
	qemu-devel@nongnu.org, peterx@redhat.com, dgilbert@redhat.com,
	wei.w.wang@intel.com, jiang.biao2@zte.com.cn
Subject: Re: [Qemu-devel] [PATCH 1/4] ptr_ring: port ptr_ring from linux kernel to QEMU
Date: Tue, 16 Oct 2018 12:40:19 -0400	[thread overview]
Message-ID: <20181016164019.GA5666@flamenco> (raw)
In-Reply-To: <20181016111006.629-2-xiaoguangrong@tencent.com>

On Tue, Oct 16, 2018 at 19:10:03 +0800, guangrong.xiao@gmail.com wrote:
(snip)
> diff --git a/include/qemu/ptr_ring.h b/include/qemu/ptr_ring.h
> new file mode 100644
> index 0000000000..d8266d45f6
> --- /dev/null
> +++ b/include/qemu/ptr_ring.h
> @@ -0,0 +1,235 @@
(snip)
> +#define SMP_CACHE_BYTES      64
> +#define ____cacheline_aligned_in_smp \
> +        __attribute__((__aligned__(SMP_CACHE_BYTES)))

You could use QEMU_ALIGNED() here.

> +
> +#define WRITE_ONCE(ptr, val) \
> +    (*((volatile typeof(ptr) *)(&(ptr))) = (val))
> +#define READ_ONCE(ptr) (*((volatile typeof(ptr) *)(&(ptr))))

Why not atomic_read/set, like in the rest of the QEMU code base?

Furthermore, READ_ONCE in the kernel implies smp_read_barrier_depends,
whereas here you're not bringing that in. That means that your
barrier pairing, e.g.

> +    /* Pairs with READ_ONCE in ptr_ring_consume. */
> +    smp_wmb();

is incorrect for Alpha.

Thanks,

		E.

  reply	other threads:[~2018-10-16 16:40 UTC|newest]

Thread overview: 28+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-10-16 11:10 [PATCH 0/4] migration: improve multithreads guangrong.xiao
2018-10-16 11:10 ` [Qemu-devel] " guangrong.xiao
2018-10-16 11:10 ` [PATCH 1/4] ptr_ring: port ptr_ring from linux kernel to QEMU guangrong.xiao
2018-10-16 11:10   ` [Qemu-devel] " guangrong.xiao
2018-10-16 16:40   ` Emilio G. Cota [this message]
2018-10-16 16:40     ` Emilio G. Cota
2018-10-17  8:14     ` Paolo Bonzini
2018-10-17  8:14       ` [Qemu-devel] " Paolo Bonzini
2018-10-18  6:52       ` Xiao Guangrong
2018-10-18  6:52         ` [Qemu-devel] " Xiao Guangrong
2018-10-16 11:10 ` [PATCH 2/4] migration: introduce lockless multithreads model guangrong.xiao
2018-10-16 11:10   ` [Qemu-devel] " guangrong.xiao
2018-10-17 10:10   ` Paolo Bonzini
2018-10-17 10:10     ` [Qemu-devel] " Paolo Bonzini
2018-10-18  9:30     ` Xiao Guangrong
2018-10-18  9:30       ` [Qemu-devel] " Xiao Guangrong
2018-10-18 10:39       ` Paolo Bonzini
2018-10-18 10:39         ` [Qemu-devel] " Paolo Bonzini
2018-10-26 23:33     ` Emilio G. Cota
2018-10-26 23:33       ` [Qemu-devel] " Emilio G. Cota
2018-10-28  7:50       ` Paolo Bonzini
2018-10-28  7:50         ` [Qemu-devel] " Paolo Bonzini
2018-10-29  2:52         ` Xiao Guangrong
2018-10-29  2:52           ` [Qemu-devel] " Xiao Guangrong
2018-10-16 11:10 ` [PATCH 3/4] migration: use lockless Multithread model for compression guangrong.xiao
2018-10-16 11:10   ` [Qemu-devel] " guangrong.xiao
2018-10-16 11:10 ` [PATCH 4/4] migration: use lockless Multithread model for decompression guangrong.xiao
2018-10-16 11:10   ` [Qemu-devel] " guangrong.xiao

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