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From: Marek Vasut <marek.vasut@gmail.com>
To: u-boot@lists.denx.de
Subject: [U-Boot] [PATCH 10/13] mmc: tmio: sdhi: Clear HS400 settings when reseting SCC
Date: Wed, 31 Oct 2018 18:16:03 +0100	[thread overview]
Message-ID: <20181031171606.13561-10-marek.vasut+renesas@gmail.com> (raw)
In-Reply-To: <20181031171606.13561-1-marek.vasut+renesas@gmail.com>

Make sure to clear HS400 configuration when reseting the SCC block.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
---
 drivers/mmc/renesas-sdhi.c | 7 +++++++
 1 file changed, 7 insertions(+)

diff --git a/drivers/mmc/renesas-sdhi.c b/drivers/mmc/renesas-sdhi.c
index 6b5871a0ae..2949c517cb 100644
--- a/drivers/mmc/renesas-sdhi.c
+++ b/drivers/mmc/renesas-sdhi.c
@@ -34,6 +34,8 @@
 #define   RENESAS_SDHI_SCC_RVSREQ_RVSERR		BIT(2)
 #define RENESAS_SDHI_SCC_SMPCMP			0x818
 #define RENESAS_SDHI_SCC_TMPPORT2			0x81c
+#define   RENESAS_SDHI_SCC_TMPPORT2_HS400EN		BIT(31)
+#define   RENESAS_SDHI_SCC_TMPPORT2_HS400OSEL		BIT(4)
 
 #define RENESAS_SDHI_MAX_TAP 3
 
@@ -90,6 +92,11 @@ static void renesas_sdhi_reset_tuning(struct tmio_sd_priv *priv)
 	reg &= ~RENESAS_SDHI_SCC_CKSEL_DTSEL;
 	tmio_sd_writel(priv, reg, RENESAS_SDHI_SCC_CKSEL);
 
+	reg = tmio_sd_readl(priv, RENESAS_SDHI_SCC_TMPPORT2);
+	reg &= ~(RENESAS_SDHI_SCC_TMPPORT2_HS400EN |
+		 RENESAS_SDHI_SCC_TMPPORT2_HS400OSEL);
+	tmio_sd_writel(priv, reg, RENESAS_SDHI_SCC_TMPPORT2);
+
 	reg = tmio_sd_readl(priv, TMIO_SD_CLKCTL);
 	reg |= TMIO_SD_CLKCTL_SCLKEN;
 	tmio_sd_writel(priv, reg, TMIO_SD_CLKCTL);
-- 
2.18.0

  parent reply	other threads:[~2018-10-31 17:16 UTC|newest]

Thread overview: 33+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-10-31 17:15 [U-Boot] [PATCH 01/13] mmc: tmio: Simplify pinmux handling Marek Vasut
2018-10-31 17:15 ` [U-Boot] [PATCH 02/13] mmc: tmio: Switch to clock framework Marek Vasut
2018-11-01  9:38   ` [U-Boot] [PATCH V2 " Marek Vasut
2018-11-01 11:38     ` Masahiro Yamada
2018-11-02  2:19       ` Masahiro Yamada
2018-11-02 14:42         ` Marek Vasut
2018-11-02  2:24     ` Masahiro Yamada
2018-11-02 14:43       ` Marek Vasut
2018-10-31 17:15 ` [U-Boot] [PATCH 03/13] mmc: tmio: Do not set divider to 1 in DDR mode Marek Vasut
2018-11-01 11:39   ` Masahiro Yamada
2018-11-01 12:09     ` Marek Vasut
2018-10-31 17:15 ` [U-Boot] [PATCH 04/13] mmc: tmio: Configure clock before any other IOS Marek Vasut
2018-10-31 17:15 ` [U-Boot] [PATCH 05/13] mmc: tmio: Keep generating clock when clock are enabled Marek Vasut
2018-11-01 11:46   ` Masahiro Yamada
2018-11-01 12:10     ` Marek Vasut
2018-10-31 17:15 ` [U-Boot] [PATCH 06/13] mmc: tmio: Preinitialize regulator to 3.3V Marek Vasut
2018-10-31 17:16 ` [U-Boot] [PATCH 07/13] mmc: tmio: Improve error handling Marek Vasut
2018-11-01 11:43   ` Masahiro Yamada
2018-10-31 17:16 ` [U-Boot] [PATCH 08/13] mmc: tmio: Silence transfer errors when tuning Marek Vasut
2018-11-01 11:42   ` Masahiro Yamada
2018-11-01 12:11     ` Marek Vasut
2018-11-02  3:59       ` Masahiro Yamada
2018-11-02 14:27         ` Marek Vasut
2018-10-31 17:16 ` [U-Boot] [PATCH 09/13] mmc: tmio: sdhi: Touch SCC only when UHS capable Marek Vasut
2018-10-31 17:16 ` Marek Vasut [this message]
2018-10-31 17:16 ` [U-Boot] [PATCH 11/13] mmc: tmio: sdhi: Implement waiting for DAT0 line state Marek Vasut
2018-10-31 17:16 ` [U-Boot] [PATCH 12/13] mmc: tmio: sdhi: Switch CPG settings in UHS modes Marek Vasut
2018-10-31 17:16 ` [U-Boot] [PATCH 13/13] mmc: tmio: sdhi: Merge DTCNTL access into single register write Marek Vasut
2018-11-01 11:38 ` [U-Boot] [PATCH 01/13] mmc: tmio: Simplify pinmux handling Masahiro Yamada
2018-11-01 12:12   ` Marek Vasut
2018-11-02  3:58     ` Masahiro Yamada
2018-11-02 14:20       ` Marek Vasut
2018-11-02 14:35         ` Masahiro Yamada

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