[U-Boot] [PATCH 12/13] mmc: tmio: sdhi: Switch CPG settings in UHS modes

[Marek Vasut <marek.vasut@gmail.com>]

Switch CPG settings when transitioning between HS200/HS400/SDR104
and regular modes. This is required for the SCC block to operate
correctly.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
---
 drivers/mmc/renesas-sdhi.c | 28 +++++++++++++++++++++++++++-
 1 file changed, 27 insertions(+), 1 deletion(-)

diff --git a/drivers/mmc/renesas-sdhi.c b/drivers/mmc/renesas-sdhi.c
index e6e6fca061..813cf8749b 100644
--- a/drivers/mmc/renesas-sdhi.c
+++ b/drivers/mmc/renesas-sdhi.c
@@ -292,9 +292,35 @@ out:
 }
 #endif
 
+static void renesas_sdhi_set_clk(struct udevice *dev)
+{
+	struct tmio_sd_priv *priv = dev_get_priv(dev);
+	struct mmc *mmc = mmc_get_mmc_dev(dev);
+	u32 tmp;
+
+	if (!mmc->clock)
+		return;
+
+	/* Stop the clock before changing its rate to avoid a glitch signal */
+	tmp = tmio_sd_readl(priv, TMIO_SD_CLKCTL);
+	tmp &= ~TMIO_SD_CLKCTL_SCLKEN;
+	tmio_sd_writel(priv, tmp, TMIO_SD_CLKCTL);
+
+	if ((mmc->selected_mode == UHS_SDR104) ||
+	    (mmc->selected_mode == MMC_HS_200)) {
+		clk_set_rate(&priv->clk, 400000000);
+	} else {
+		clk_set_rate(&priv->clk, 200000000);
+	}
+}
+
 static int renesas_sdhi_set_ios(struct udevice *dev)
 {
-	int ret = tmio_sd_set_ios(dev);
+	int ret;
+
+	renesas_sdhi_set_clk(dev);
+
+	ret = tmio_sd_set_ios(dev);
 
 	mdelay(10);
 
-- 
2.18.0