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From: Marek Vasut <marek.vasut@gmail.com>
To: u-boot@lists.denx.de
Subject: [U-Boot] [PATCH 05/13] mmc: tmio: Keep generating clock when clock are enabled
Date: Wed, 31 Oct 2018 18:15:58 +0100	[thread overview]
Message-ID: <20181031171606.13561-5-marek.vasut+renesas@gmail.com> (raw)
In-Reply-To: <20181031171606.13561-1-marek.vasut+renesas@gmail.com>

The TMIO core has a feature where it can automatically disable clock output
when the bus is not in use. While this is useful, it also interferes with
switching the bus to 1.8V and other background tasks of the SD/MMC cards,
which require clock to be enabled.

This patch respects the mmc->clk_disable and only disables the clock when
the MMC core requests it. Otherwise the clock are continuously generated
on the bus.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
---
 drivers/mmc/tmio-common.c | 10 ++++++++--
 1 file changed, 8 insertions(+), 2 deletions(-)

diff --git a/drivers/mmc/tmio-common.c b/drivers/mmc/tmio-common.c
index ef06f0aa4b..42eb847edb 100644
--- a/drivers/mmc/tmio-common.c
+++ b/drivers/mmc/tmio-common.c
@@ -603,10 +603,16 @@ static void tmio_sd_set_clk_rate(struct tmio_sd_priv *priv,
 	tmio_sd_writel(priv, tmp, TMIO_SD_CLKCTL);
 
 	tmp &= ~TMIO_SD_CLKCTL_DIV_MASK;
-	tmp |= val | TMIO_SD_CLKCTL_OFFEN;
+	tmp |= val;
 	tmio_sd_writel(priv, tmp, TMIO_SD_CLKCTL);
 
-	tmp |= TMIO_SD_CLKCTL_SCLKEN;
+	if (!mmc->clk_disable) {
+		tmp &= ~TMIO_SD_CLKCTL_OFFEN;
+		tmp |= TMIO_SD_CLKCTL_SCLKEN;
+	} else {
+		tmp |= TMIO_SD_CLKCTL_OFFEN;
+		tmp &= ~TMIO_SD_CLKCTL_SCLKEN;
+	}
 	tmio_sd_writel(priv, tmp, TMIO_SD_CLKCTL);
 
 	udelay(1000);
-- 
2.18.0

  parent reply	other threads:[~2018-10-31 17:15 UTC|newest]

Thread overview: 33+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-10-31 17:15 [U-Boot] [PATCH 01/13] mmc: tmio: Simplify pinmux handling Marek Vasut
2018-10-31 17:15 ` [U-Boot] [PATCH 02/13] mmc: tmio: Switch to clock framework Marek Vasut
2018-11-01  9:38   ` [U-Boot] [PATCH V2 " Marek Vasut
2018-11-01 11:38     ` Masahiro Yamada
2018-11-02  2:19       ` Masahiro Yamada
2018-11-02 14:42         ` Marek Vasut
2018-11-02  2:24     ` Masahiro Yamada
2018-11-02 14:43       ` Marek Vasut
2018-10-31 17:15 ` [U-Boot] [PATCH 03/13] mmc: tmio: Do not set divider to 1 in DDR mode Marek Vasut
2018-11-01 11:39   ` Masahiro Yamada
2018-11-01 12:09     ` Marek Vasut
2018-10-31 17:15 ` [U-Boot] [PATCH 04/13] mmc: tmio: Configure clock before any other IOS Marek Vasut
2018-10-31 17:15 ` Marek Vasut [this message]
2018-11-01 11:46   ` [U-Boot] [PATCH 05/13] mmc: tmio: Keep generating clock when clock are enabled Masahiro Yamada
2018-11-01 12:10     ` Marek Vasut
2018-10-31 17:15 ` [U-Boot] [PATCH 06/13] mmc: tmio: Preinitialize regulator to 3.3V Marek Vasut
2018-10-31 17:16 ` [U-Boot] [PATCH 07/13] mmc: tmio: Improve error handling Marek Vasut
2018-11-01 11:43   ` Masahiro Yamada
2018-10-31 17:16 ` [U-Boot] [PATCH 08/13] mmc: tmio: Silence transfer errors when tuning Marek Vasut
2018-11-01 11:42   ` Masahiro Yamada
2018-11-01 12:11     ` Marek Vasut
2018-11-02  3:59       ` Masahiro Yamada
2018-11-02 14:27         ` Marek Vasut
2018-10-31 17:16 ` [U-Boot] [PATCH 09/13] mmc: tmio: sdhi: Touch SCC only when UHS capable Marek Vasut
2018-10-31 17:16 ` [U-Boot] [PATCH 10/13] mmc: tmio: sdhi: Clear HS400 settings when reseting SCC Marek Vasut
2018-10-31 17:16 ` [U-Boot] [PATCH 11/13] mmc: tmio: sdhi: Implement waiting for DAT0 line state Marek Vasut
2018-10-31 17:16 ` [U-Boot] [PATCH 12/13] mmc: tmio: sdhi: Switch CPG settings in UHS modes Marek Vasut
2018-10-31 17:16 ` [U-Boot] [PATCH 13/13] mmc: tmio: sdhi: Merge DTCNTL access into single register write Marek Vasut
2018-11-01 11:38 ` [U-Boot] [PATCH 01/13] mmc: tmio: Simplify pinmux handling Masahiro Yamada
2018-11-01 12:12   ` Marek Vasut
2018-11-02  3:58     ` Masahiro Yamada
2018-11-02 14:20       ` Marek Vasut
2018-11-02 14:35         ` Masahiro Yamada

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