From: Borislav Petkov <bp@alien8.de>
To: Chris Packham <chris.packham@alliedtelesis.co.nz>
Cc: linux@armlinux.org.uk, arnd@arndb.de, jlu@pengutronix.de,
gregory.clement@bootlin.com,
linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org,
linux-edac@vger.kernel.org, linux-kernel@vger.kernel.org,
Mauro Carvalho Chehab <mchehab@kernel.org>
Subject: Re: [PATCH v6 8/9] EDAC: Add driver for the Marvell Armada XP SDRAM and L2 cache ECC
Date: Sun, 11 Nov 2018 20:40:24 +0100 [thread overview]
Message-ID: <20181111194024.GC31937@zn.tnic> (raw)
In-Reply-To: <20181109070349.20464-9-chris.packham@alliedtelesis.co.nz>
On Fri, Nov 09, 2018 at 08:03:48PM +1300, Chris Packham wrote:
> From: Jan Luebbe <jlu@pengutronix.de>
>
> Add support for the ECC functionality as found in the DDR RAM and L2
> cache controllers on the MV78230/MV78x60 SoCs. This driver has been
> tested on the MV78460 (on a custom board with a DDR3 ECC DIMM).
>
> Signed-off-by: Jan Luebbe <jlu@pengutronix.de>
> [cp use SPDX license]
> Signed-off-by: Chris Packham <chris.packham@alliedtelesis.co.nz>
> ---
> MAINTAINERS | 6 +
> drivers/edac/Kconfig | 7 +
> drivers/edac/Makefile | 1 +
> drivers/edac/armada_xp_edac.c | 630 ++++++++++++++++++++++++++++++++++
> 4 files changed, 644 insertions(+)
> create mode 100644 drivers/edac/armada_xp_edac.c
Looks ok at a glance. Those overly long lines could use some macros or
breaking but it is not a big deal:
Reviewed-by: Borislav Petkov <bp@suse.de>
--
Regards/Gruss,
Boris.
Good mailing practices for 400: avoid top-posting and trim the reply.
WARNING: multiple messages have this Message-ID (diff)
From: Borislav Petkov <bp@alien8.de>
To: Chris Packham <chris.packham@alliedtelesis.co.nz>
Cc: linux@armlinux.org.uk, arnd@arndb.de, jlu@pengutronix.de,
gregory.clement@bootlin.com,
linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org,
linux-edac@vger.kernel.org, linux-kernel@vger.kernel.org,
Mauro Carvalho Chehab <mchehab@kernel.org>
Subject: [v6,8/9] EDAC: Add driver for the Marvell Armada XP SDRAM and L2 cache ECC
Date: Sun, 11 Nov 2018 20:40:24 +0100 [thread overview]
Message-ID: <20181111194024.GC31937@zn.tnic> (raw)
On Fri, Nov 09, 2018 at 08:03:48PM +1300, Chris Packham wrote:
> From: Jan Luebbe <jlu@pengutronix.de>
>
> Add support for the ECC functionality as found in the DDR RAM and L2
> cache controllers on the MV78230/MV78x60 SoCs. This driver has been
> tested on the MV78460 (on a custom board with a DDR3 ECC DIMM).
>
> Signed-off-by: Jan Luebbe <jlu@pengutronix.de>
> [cp use SPDX license]
> Signed-off-by: Chris Packham <chris.packham@alliedtelesis.co.nz>
> ---
> MAINTAINERS | 6 +
> drivers/edac/Kconfig | 7 +
> drivers/edac/Makefile | 1 +
> drivers/edac/armada_xp_edac.c | 630 ++++++++++++++++++++++++++++++++++
> 4 files changed, 644 insertions(+)
> create mode 100644 drivers/edac/armada_xp_edac.c
Looks ok at a glance. Those overly long lines could use some macros or
breaking but it is not a big deal:
Reviewed-by: Borislav Petkov <bp@suse.de>
WARNING: multiple messages have this Message-ID (diff)
From: bp@alien8.de (Borislav Petkov)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH v6 8/9] EDAC: Add driver for the Marvell Armada XP SDRAM and L2 cache ECC
Date: Sun, 11 Nov 2018 20:40:24 +0100 [thread overview]
Message-ID: <20181111194024.GC31937@zn.tnic> (raw)
In-Reply-To: <20181109070349.20464-9-chris.packham@alliedtelesis.co.nz>
On Fri, Nov 09, 2018 at 08:03:48PM +1300, Chris Packham wrote:
> From: Jan Luebbe <jlu@pengutronix.de>
>
> Add support for the ECC functionality as found in the DDR RAM and L2
> cache controllers on the MV78230/MV78x60 SoCs. This driver has been
> tested on the MV78460 (on a custom board with a DDR3 ECC DIMM).
>
> Signed-off-by: Jan Luebbe <jlu@pengutronix.de>
> [cp use SPDX license]
> Signed-off-by: Chris Packham <chris.packham@alliedtelesis.co.nz>
> ---
> MAINTAINERS | 6 +
> drivers/edac/Kconfig | 7 +
> drivers/edac/Makefile | 1 +
> drivers/edac/armada_xp_edac.c | 630 ++++++++++++++++++++++++++++++++++
> 4 files changed, 644 insertions(+)
> create mode 100644 drivers/edac/armada_xp_edac.c
Looks ok at a glance. Those overly long lines could use some macros or
breaking but it is not a big deal:
Reviewed-by: Borislav Petkov <bp@suse.de>
--
Regards/Gruss,
Boris.
Good mailing practices for 400: avoid top-posting and trim the reply.
next prev parent reply other threads:[~2018-11-11 19:40 UTC|newest]
Thread overview: 48+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-11-09 7:03 [PATCH v6 0/9] EDAC drivers for Armada XP L2 and DDR Chris Packham
2018-11-09 7:03 ` Chris Packham
2018-11-09 7:03 ` [PATCH v6 1/9] ARM: l2c: move cache-aurora-l2.h to asm/hardware Chris Packham
2018-11-09 7:03 ` Chris Packham
2018-11-09 7:03 ` [v6,1/9] " Chris Packham
2018-11-09 7:03 ` [PATCH v6 2/9] ARM: aurora-l2: add prefix to MAX_RANGE_SIZE Chris Packham
2018-11-09 7:03 ` Chris Packham
2018-11-09 7:03 ` [v6,2/9] " Chris Packham
2018-11-09 7:03 ` [PATCH v6 3/9] ARM: aurora-l2: add defines for parity and ECC registers Chris Packham
2018-11-09 7:03 ` Chris Packham
2018-11-09 7:03 ` [v6,3/9] " Chris Packham
2018-11-09 7:03 ` [PATCH v6 4/9] ARM: l2x0: support parity-enable/disable on aurora Chris Packham
2018-11-09 7:03 ` Chris Packham
2018-11-09 7:03 ` [v6,4/9] " Chris Packham
2018-11-09 7:03 ` [PATCH v6 5/9] dt-bindings: ARM: document marvell,ecc-enable binding Chris Packham
2018-11-09 7:03 ` Chris Packham
2018-11-09 7:03 ` [v6,5/9] " Chris Packham
2018-11-09 11:40 ` [PATCH v6 5/9] " Arnd Bergmann
2018-11-09 11:40 ` [PATCH v6 5/9] dt-bindings: ARM: document marvell, ecc-enable binding Arnd Bergmann
2018-11-09 11:40 ` [v6,5/9] dt-bindings: ARM: document marvell,ecc-enable binding Arnd Bergmann
2018-11-09 11:48 ` [PATCH v6 5/9] " Russell King - ARM Linux
2018-11-09 11:48 ` Russell King - ARM Linux
2018-11-09 11:48 ` [v6,5/9] " Russell King - ARM Linux
2018-11-09 15:58 ` [PATCH v6 5/9] " Arnd Bergmann
2018-11-09 15:58 ` [PATCH v6 5/9] dt-bindings: ARM: document marvell, ecc-enable binding Arnd Bergmann
2018-11-09 15:58 ` [v6,5/9] dt-bindings: ARM: document marvell,ecc-enable binding Arnd Bergmann
2018-11-11 19:57 ` [PATCH v6 5/9] " Chris Packham
2018-11-11 19:57 ` Chris Packham
2018-11-11 19:57 ` [v6,5/9] " Chris Packham
2018-11-11 22:35 ` [PATCH v6 5/9] " Rob Herring
2018-11-11 22:35 ` Rob Herring
2018-11-11 22:35 ` Rob Herring
2018-11-11 22:35 ` [v6,5/9] " Rob Herring
2018-11-09 7:03 ` [PATCH v6 6/9] ARM: l2x0: add marvell,ecc-enable property for aurora Chris Packham
2018-11-09 7:03 ` Chris Packham
2018-11-09 7:03 ` [v6,6/9] " Chris Packham
2018-11-09 7:03 ` [PATCH v6 7/9] EDAC: Add missing debugfs_create_x32 wrapper Chris Packham
2018-11-09 7:03 ` Chris Packham
2018-11-09 7:03 ` [v6,7/9] " Chris Packham
2018-11-09 7:03 ` [PATCH v6 8/9] EDAC: Add driver for the Marvell Armada XP SDRAM and L2 cache ECC Chris Packham
2018-11-09 7:03 ` Chris Packham
2018-11-09 7:03 ` [v6,8/9] " Chris Packham
2018-11-11 19:40 ` Borislav Petkov [this message]
2018-11-11 19:40 ` [PATCH v6 8/9] " Borislav Petkov
2018-11-11 19:40 ` [v6,8/9] " Borislav Petkov
2018-11-09 7:03 ` [PATCH v6 9/9] EDAC: armada_xp: Add support for more SoCs Chris Packham
2018-11-09 7:03 ` Chris Packham
2018-11-09 7:03 ` [v6,9/9] " Chris Packham
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20181111194024.GC31937@zn.tnic \
--to=bp@alien8.de \
--cc=arnd@arndb.de \
--cc=chris.packham@alliedtelesis.co.nz \
--cc=devicetree@vger.kernel.org \
--cc=gregory.clement@bootlin.com \
--cc=jlu@pengutronix.de \
--cc=linux-arm-kernel@lists.infradead.org \
--cc=linux-edac@vger.kernel.org \
--cc=linux-kernel@vger.kernel.org \
--cc=linux@armlinux.org.uk \
--cc=mchehab@kernel.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.