From: Benjamin Gaignard <benjamin.gaignard@linaro.org>
To: ohad@wizery.com, bjorn.andersson@linaro.org, robh+dt@kernel.org,
mark.rutland@arm.com, alexandre.torgue@st.com
Cc: linux-remoteproc@vger.kernel.org, devicetree@vger.kernel.org,
linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org,
linux-stm32@st-md-mailman.stormreply.com,
Benjamin Gaignard <benjamin.gaignard@st.com>
Subject: [PATCH v3 3/4] ARM: dts: stm32: Add hwspinlock node for stm32mp157 SoC
Date: Mon, 12 Nov 2018 16:23:41 +0100 [thread overview]
Message-ID: <20181112152342.6561-4-benjamin.gaignard@st.com> (raw)
In-Reply-To: <20181112152342.6561-1-benjamin.gaignard@st.com>
Declare hwspinlock device for stm32mp157 SoC
Signed-off-by: Benjamin Gaignard <benjamin.gaignard@st.com>
---
arch/arm/boot/dts/stm32mp157c.dtsi | 9 +++++++++
1 file changed, 9 insertions(+)
diff --git a/arch/arm/boot/dts/stm32mp157c.dtsi b/arch/arm/boot/dts/stm32mp157c.dtsi
index 185541a5b69f..98f824d8b0f0 100644
--- a/arch/arm/boot/dts/stm32mp157c.dtsi
+++ b/arch/arm/boot/dts/stm32mp157c.dtsi
@@ -803,6 +803,15 @@
status = "disabled";
};
+ hsem: hwspinlock@4c000000 {
+ compatible = "st,stm32-hwspinlock";
+ #hwlock-cells = <1>;
+ reg = <0x4c000000 0x400>;
+ clocks = <&rcc HSEM>;
+ clock-names = "hwsem";
+ status = "disabled";
+ };
+
rcc: rcc@50000000 {
compatible = "st,stm32mp1-rcc", "syscon";
reg = <0x50000000 0x1000>;
--
2.15.0
WARNING: multiple messages have this Message-ID (diff)
From: benjamin.gaignard@linaro.org (Benjamin Gaignard)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH v3 3/4] ARM: dts: stm32: Add hwspinlock node for stm32mp157 SoC
Date: Mon, 12 Nov 2018 16:23:41 +0100 [thread overview]
Message-ID: <20181112152342.6561-4-benjamin.gaignard@st.com> (raw)
In-Reply-To: <20181112152342.6561-1-benjamin.gaignard@st.com>
Declare hwspinlock device for stm32mp157 SoC
Signed-off-by: Benjamin Gaignard <benjamin.gaignard@st.com>
---
arch/arm/boot/dts/stm32mp157c.dtsi | 9 +++++++++
1 file changed, 9 insertions(+)
diff --git a/arch/arm/boot/dts/stm32mp157c.dtsi b/arch/arm/boot/dts/stm32mp157c.dtsi
index 185541a5b69f..98f824d8b0f0 100644
--- a/arch/arm/boot/dts/stm32mp157c.dtsi
+++ b/arch/arm/boot/dts/stm32mp157c.dtsi
@@ -803,6 +803,15 @@
status = "disabled";
};
+ hsem: hwspinlock at 4c000000 {
+ compatible = "st,stm32-hwspinlock";
+ #hwlock-cells = <1>;
+ reg = <0x4c000000 0x400>;
+ clocks = <&rcc HSEM>;
+ clock-names = "hwsem";
+ status = "disabled";
+ };
+
rcc: rcc at 50000000 {
compatible = "st,stm32mp1-rcc", "syscon";
reg = <0x50000000 0x1000>;
--
2.15.0
next prev parent reply other threads:[~2018-11-12 15:23 UTC|newest]
Thread overview: 22+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-11-12 15:23 [PATCH v3 0/4] Add support of STM32 hwspinlock Benjamin Gaignard
2018-11-12 15:23 ` Benjamin Gaignard
2018-11-12 15:23 ` [PATCH v3 1/4] dt-bindings: hwlock: Document STM32 hwspinlock bindings Benjamin Gaignard
2018-11-12 15:23 ` Benjamin Gaignard
2018-11-13 2:13 ` Rob Herring
2018-11-13 2:13 ` Rob Herring
2018-11-13 17:13 ` Bjorn Andersson
2018-11-13 17:13 ` Bjorn Andersson
2018-11-13 2:13 ` Rob Herring
2018-11-13 2:13 ` Rob Herring
2018-11-12 15:23 ` [PATCH v3 2/4] hwspinlock: add STM32 hwspinlock device Benjamin Gaignard
2018-11-12 15:23 ` Benjamin Gaignard
2018-11-12 15:23 ` Benjamin Gaignard [this message]
2018-11-12 15:23 ` [PATCH v3 3/4] ARM: dts: stm32: Add hwspinlock node for stm32mp157 SoC Benjamin Gaignard
2018-11-12 15:23 ` [PATCH v3 4/4] ARM: dts: stm32: enable hwspinlock on stm32mp157c-ed1 Benjamin Gaignard
2018-11-12 15:23 ` Benjamin Gaignard
2018-11-13 8:09 ` [PATCH v3 0/4] Add support of STM32 hwspinlock Alexandre Torgue
2018-11-13 8:09 ` Alexandre Torgue
2018-11-13 8:09 ` Alexandre Torgue
2018-12-03 8:46 ` Alexandre Torgue
2018-12-03 8:46 ` Alexandre Torgue
2018-12-03 8:46 ` Alexandre Torgue
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