[PATCH i-g-t 1/8] lib: Skip unused fork helpers

[PATCH i-g-t 1/8] lib: Skip unused fork helpers

[Chris Wilson]

Skip trying to stop unused fork helpers to avoid the various asserts
that they were running and didn't die early.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=109468
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
---
 lib/igt_core.c | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/lib/igt_core.c b/lib/igt_core.c
index 49fbf70de..0794e11a0 100644
--- a/lib/igt_core.c
+++ b/lib/igt_core.c
@@ -1678,6 +1678,9 @@ void igt_stop_helper(struct igt_helper_process *proc)
 {
 	int status;
 
+	if (!proc->running) /* never even started */
+		return;
+
 	/* failure here means the pid is already dead and so waiting is safe */
 	kill(proc->pid, proc->use_SIGKILL ? SIGKILL : SIGTERM);
 
-- 
2.20.1

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[igt-dev] [PATCH i-g-t 1/8] lib: Skip unused fork helpers

[Chris Wilson]

Skip trying to stop unused fork helpers to avoid the various asserts
that they were running and didn't die early.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=109468
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
---
 lib/igt_core.c | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/lib/igt_core.c b/lib/igt_core.c
index 49fbf70de..0794e11a0 100644
--- a/lib/igt_core.c
+++ b/lib/igt_core.c
@@ -1678,6 +1678,9 @@ void igt_stop_helper(struct igt_helper_process *proc)
 {
 	int status;
 
+	if (!proc->running) /* never even started */
+		return;
+
 	/* failure here means the pid is already dead and so waiting is safe */
 	kill(proc->pid, proc->use_SIGKILL ? SIGKILL : SIGTERM);
 
-- 
2.20.1

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[PATCH i-g-t 2/8] i915/gem_eio: Check for allow-hang prior to issuing a reset

[Chris Wilson]

Check that we are allowed to hang/reset the GPU before we actually do so
for the first time.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
---
 tests/i915/gem_eio.c | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/tests/i915/gem_eio.c b/tests/i915/gem_eio.c
index 5250a414c..09059c311 100644
--- a/tests/i915/gem_eio.c
+++ b/tests/i915/gem_eio.c
@@ -745,14 +745,14 @@ igt_main
 		fd = drm_open_driver(DRIVER_INTEL);
 		igt_device_drop_master(fd);
 
-		igt_require(i915_reset_control(true));
-		igt_force_gpu_reset(fd);
-		igt_install_exit_handler(exit_handler);
-
 		gem_submission_print_method(fd);
 		igt_require_gem(fd);
 
 		igt_allow_hang(fd, 0, 0);
+
+		igt_require(i915_reset_control(true));
+		igt_force_gpu_reset(fd);
+		igt_install_exit_handler(exit_handler);
 	}
 
 	igt_subtest("throttle")
-- 
2.20.1

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[igt-dev] [PATCH i-g-t 2/8] i915/gem_eio: Check for allow-hang prior to issuing a reset

[Chris Wilson]

Check that we are allowed to hang/reset the GPU before we actually do so
for the first time.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
---
 tests/i915/gem_eio.c | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/tests/i915/gem_eio.c b/tests/i915/gem_eio.c
index 5250a414c..09059c311 100644
--- a/tests/i915/gem_eio.c
+++ b/tests/i915/gem_eio.c
@@ -745,14 +745,14 @@ igt_main
 		fd = drm_open_driver(DRIVER_INTEL);
 		igt_device_drop_master(fd);
 
-		igt_require(i915_reset_control(true));
-		igt_force_gpu_reset(fd);
-		igt_install_exit_handler(exit_handler);
-
 		gem_submission_print_method(fd);
 		igt_require_gem(fd);
 
 		igt_allow_hang(fd, 0, 0);
+
+		igt_require(i915_reset_control(true));
+		igt_force_gpu_reset(fd);
+		igt_install_exit_handler(exit_handler);
 	}
 
 	igt_subtest("throttle")
-- 
2.20.1

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Re: [PATCH i-g-t 2/8] i915/gem_eio: Check for allow-hang prior to issuing a reset

[Mika Kuoppala]

Chris Wilson <chris@chris-wilson.co.uk> writes:

> Check that we are allowed to hang/reset the GPU before we actually do so
> for the first time.
>
> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>

Reviewed-by: Mika Kuoppala <mika.kuoppala@linux.intel.com>

> ---
>  tests/i915/gem_eio.c | 8 ++++----
>  1 file changed, 4 insertions(+), 4 deletions(-)
>
> diff --git a/tests/i915/gem_eio.c b/tests/i915/gem_eio.c
> index 5250a414c..09059c311 100644
> --- a/tests/i915/gem_eio.c
> +++ b/tests/i915/gem_eio.c
> @@ -745,14 +745,14 @@ igt_main
>  		fd = drm_open_driver(DRIVER_INTEL);
>  		igt_device_drop_master(fd);
>  
> -		igt_require(i915_reset_control(true));
> -		igt_force_gpu_reset(fd);
> -		igt_install_exit_handler(exit_handler);
> -
>  		gem_submission_print_method(fd);
>  		igt_require_gem(fd);
>  
>  		igt_allow_hang(fd, 0, 0);
> +
> +		igt_require(i915_reset_control(true));
> +		igt_force_gpu_reset(fd);
> +		igt_install_exit_handler(exit_handler);
>  	}
>  
>  	igt_subtest("throttle")
> -- 
> 2.20.1
>
> _______________________________________________
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> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx
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Re: [igt-dev] [Intel-gfx] [PATCH i-g-t 2/8] i915/gem_eio: Check for allow-hang prior to issuing a reset

[Mika Kuoppala]

Chris Wilson <chris@chris-wilson.co.uk> writes:

> Check that we are allowed to hang/reset the GPU before we actually do so
> for the first time.
>
> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>

Reviewed-by: Mika Kuoppala <mika.kuoppala@linux.intel.com>

> ---
>  tests/i915/gem_eio.c | 8 ++++----
>  1 file changed, 4 insertions(+), 4 deletions(-)
>
> diff --git a/tests/i915/gem_eio.c b/tests/i915/gem_eio.c
> index 5250a414c..09059c311 100644
> --- a/tests/i915/gem_eio.c
> +++ b/tests/i915/gem_eio.c
> @@ -745,14 +745,14 @@ igt_main
>  		fd = drm_open_driver(DRIVER_INTEL);
>  		igt_device_drop_master(fd);
>  
> -		igt_require(i915_reset_control(true));
> -		igt_force_gpu_reset(fd);
> -		igt_install_exit_handler(exit_handler);
> -
>  		gem_submission_print_method(fd);
>  		igt_require_gem(fd);
>  
>  		igt_allow_hang(fd, 0, 0);
> +
> +		igt_require(i915_reset_control(true));
> +		igt_force_gpu_reset(fd);
> +		igt_install_exit_handler(exit_handler);
>  	}
>  
>  	igt_subtest("throttle")
> -- 
> 2.20.1
>
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> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx
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[PATCH i-g-t 3/8] i915/gem_exec_latency: Normalize results into ns

[Chris Wilson]

Present the latency results in nanoseconds not RCS cycles.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
---
 tests/i915/gem_exec_latency.c | 36 ++++++++++++++++++++++++++++++++---
 1 file changed, 33 insertions(+), 3 deletions(-)

diff --git a/tests/i915/gem_exec_latency.c b/tests/i915/gem_exec_latency.c
index de16322a6..b16b25e53 100644
--- a/tests/i915/gem_exec_latency.c
+++ b/tests/i915/gem_exec_latency.c
@@ -59,6 +59,7 @@
 #define PREEMPT 0x2
 
 static unsigned int ring_size;
+static double rcs_clock;
 
 static void
 poll_ring(int fd, unsigned ring, const char *name)
@@ -238,10 +239,11 @@ static void latency_on_ring(int fd,
 	igt_assert(offset == obj[2].offset);
 
 	gem_set_domain(fd, obj[1].handle, I915_GEM_DOMAIN_GTT, 0);
-	igt_info("%s: dispatch latency: %.2f, execution latency: %.2f (target %.2f)\n",
+	igt_info("%s: dispatch latency: %.1fns, execution latency: %.1fns (target %.1fns)\n",
 		 name,
-		 (end - start) / (double)repeats,
-		 gpu_latency, (results[repeats - 1] - results[0]) / (double)(repeats - 1));
+		 (end - start) / (double)repeats * rcs_clock,
+		 gpu_latency * rcs_clock,
+		 (results[repeats - 1] - results[0]) / (double)(repeats - 1) * rcs_clock);
 
 	munmap(map, 64*1024);
 	munmap(results, 4096);
@@ -620,6 +622,30 @@ rthog_latency_on_ring(int fd, unsigned int engine, const char *name, unsigned in
 	munmap(results, MMAP_SZ);
 }
 
+static double clockrate(int reg)
+{
+	volatile uint32_t *mmio;
+	uint32_t r_start, r_end;
+	struct timespec tv;
+	uint64_t t_start, t_end;
+	uint64_t elapsed;
+
+	mmio = (volatile uint32_t *)((volatile char *)igt_global_mmio + reg);
+
+	t_start = igt_nsec_elapsed(&tv);
+	r_start = *mmio;
+	elapsed = igt_nsec_elapsed(&tv) - t_start;
+
+	usleep(1000);
+
+	t_end = igt_nsec_elapsed(&tv);
+	r_end = *mmio;
+	elapsed += igt_nsec_elapsed(&tv) - t_end;
+
+	elapsed = (t_end - t_start) + elapsed / 2;
+	return (r_end - r_start) * 1e9 / elapsed;
+}
+
 igt_main
 {
 	const struct intel_execution_engine *e;
@@ -640,6 +666,10 @@ igt_main
 			ring_size = 1024;
 
 		intel_register_access_init(intel_get_pci_device(), false, device);
+		rcs_clock = clockrate(RCS_TIMESTAMP);
+		igt_info("RCS timestamp clock: %.3fKHz, %.1fns\n",
+			 rcs_clock / 1e3, 1e9 / rcs_clock);
+		rcs_clock = 1e9 / rcs_clock;
 	}
 
 	igt_subtest("all-rtidle-submit")
-- 
2.20.1

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[Intel-gfx] [PATCH i-g-t 3/8] i915/gem_exec_latency: Normalize results into ns

[Chris Wilson]

Present the latency results in nanoseconds not RCS cycles.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
---
 tests/i915/gem_exec_latency.c | 36 ++++++++++++++++++++++++++++++++---
 1 file changed, 33 insertions(+), 3 deletions(-)

diff --git a/tests/i915/gem_exec_latency.c b/tests/i915/gem_exec_latency.c
index de16322a6..b16b25e53 100644
--- a/tests/i915/gem_exec_latency.c
+++ b/tests/i915/gem_exec_latency.c
@@ -59,6 +59,7 @@
 #define PREEMPT 0x2
 
 static unsigned int ring_size;
+static double rcs_clock;
 
 static void
 poll_ring(int fd, unsigned ring, const char *name)
@@ -238,10 +239,11 @@ static void latency_on_ring(int fd,
 	igt_assert(offset == obj[2].offset);
 
 	gem_set_domain(fd, obj[1].handle, I915_GEM_DOMAIN_GTT, 0);
-	igt_info("%s: dispatch latency: %.2f, execution latency: %.2f (target %.2f)\n",
+	igt_info("%s: dispatch latency: %.1fns, execution latency: %.1fns (target %.1fns)\n",
 		 name,
-		 (end - start) / (double)repeats,
-		 gpu_latency, (results[repeats - 1] - results[0]) / (double)(repeats - 1));
+		 (end - start) / (double)repeats * rcs_clock,
+		 gpu_latency * rcs_clock,
+		 (results[repeats - 1] - results[0]) / (double)(repeats - 1) * rcs_clock);
 
 	munmap(map, 64*1024);
 	munmap(results, 4096);
@@ -620,6 +622,30 @@ rthog_latency_on_ring(int fd, unsigned int engine, const char *name, unsigned in
 	munmap(results, MMAP_SZ);
 }
 
+static double clockrate(int reg)
+{
+	volatile uint32_t *mmio;
+	uint32_t r_start, r_end;
+	struct timespec tv;
+	uint64_t t_start, t_end;
+	uint64_t elapsed;
+
+	mmio = (volatile uint32_t *)((volatile char *)igt_global_mmio + reg);
+
+	t_start = igt_nsec_elapsed(&tv);
+	r_start = *mmio;
+	elapsed = igt_nsec_elapsed(&tv) - t_start;
+
+	usleep(1000);
+
+	t_end = igt_nsec_elapsed(&tv);
+	r_end = *mmio;
+	elapsed += igt_nsec_elapsed(&tv) - t_end;
+
+	elapsed = (t_end - t_start) + elapsed / 2;
+	return (r_end - r_start) * 1e9 / elapsed;
+}
+
 igt_main
 {
 	const struct intel_execution_engine *e;
@@ -640,6 +666,10 @@ igt_main
 			ring_size = 1024;
 
 		intel_register_access_init(intel_get_pci_device(), false, device);
+		rcs_clock = clockrate(RCS_TIMESTAMP);
+		igt_info("RCS timestamp clock: %.3fKHz, %.1fns\n",
+			 rcs_clock / 1e3, 1e9 / rcs_clock);
+		rcs_clock = 1e9 / rcs_clock;
 	}
 
 	igt_subtest("all-rtidle-submit")
-- 
2.20.1

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[PATCH i-g-t 4/8] i915/gem_exec_latency: Eliminate the wakeup penalty

[Chris Wilson]

The first dispatch incurs the cost of waking up the device, so also
measure after issuing a spinner to keep the device awake as we submit.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
---
 tests/i915/gem_exec_latency.c | 19 +++++++++++++++++--
 1 file changed, 17 insertions(+), 2 deletions(-)

diff --git a/tests/i915/gem_exec_latency.c b/tests/i915/gem_exec_latency.c
index b16b25e53..e726385bd 100644
--- a/tests/i915/gem_exec_latency.c
+++ b/tests/i915/gem_exec_latency.c
@@ -55,8 +55,9 @@
 
 #define ENGINE_FLAGS  (I915_EXEC_RING_MASK | LOCAL_I915_EXEC_BSD_MASK)
 
-#define CORK 0x1
-#define PREEMPT 0x2
+#define LIVE 0x1
+#define CORK 0x2
+#define PREEMPT 0x4
 
 static unsigned int ring_size;
 static double rcs_clock;
@@ -120,6 +121,7 @@ static void latency_on_ring(int fd,
 	struct drm_i915_gem_exec_object2 obj[3];
 	struct drm_i915_gem_relocation_entry reloc;
 	struct drm_i915_gem_execbuffer2 execbuf;
+	igt_spin_t *spin = NULL;
 	IGT_CORK_HANDLE(c);
 	volatile uint32_t *reg;
 	unsigned repeats = ring_size;
@@ -189,6 +191,9 @@ static void latency_on_ring(int fd,
 		execbuf.buffer_count = 3;
 	}
 
+	if (flags & LIVE)
+		spin = igt_spin_batch_new(fd, .engine = ring);
+
 	start = *reg;
 	for (j = 0; j < repeats; j++) {
 		uint64_t presumed_offset = reloc.presumed_offset;
@@ -204,6 +209,7 @@ static void latency_on_ring(int fd,
 	end = *reg;
 	igt_assert(reloc.presumed_offset == obj[1].offset);
 
+	igt_spin_batch_free(fd, spin);
 	if (flags & CORK)
 		igt_cork_unplug(&c);
 
@@ -696,6 +702,11 @@ igt_main
 							e->exec_id | e->flags,
 							e->name, 0);
 
+				igt_subtest_f("%s-live-dispatch", e->name)
+					latency_on_ring(device,
+							e->exec_id | e->flags,
+							e->name, LIVE);
+
 				igt_subtest_f("%s-poll", e->name)
 					poll_ring(device,
 						  e->exec_id | e->flags,
@@ -715,6 +726,10 @@ igt_main
 							      e->name,
 							      0);
 
+				igt_subtest_f("%s-live-dispatch-queued", e->name)
+					latency_on_ring(device,
+							e->exec_id | e->flags,
+							e->name, LIVE | CORK);
 				igt_subtest_f("%s-dispatch-queued", e->name)
 					latency_on_ring(device,
 							e->exec_id | e->flags,
-- 
2.20.1

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[igt-dev] [PATCH i-g-t 4/8] i915/gem_exec_latency: Eliminate the wakeup penalty

[Chris Wilson]

The first dispatch incurs the cost of waking up the device, so also
measure after issuing a spinner to keep the device awake as we submit.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
---
 tests/i915/gem_exec_latency.c | 19 +++++++++++++++++--
 1 file changed, 17 insertions(+), 2 deletions(-)

diff --git a/tests/i915/gem_exec_latency.c b/tests/i915/gem_exec_latency.c
index b16b25e53..e726385bd 100644
--- a/tests/i915/gem_exec_latency.c
+++ b/tests/i915/gem_exec_latency.c
@@ -55,8 +55,9 @@
 
 #define ENGINE_FLAGS  (I915_EXEC_RING_MASK | LOCAL_I915_EXEC_BSD_MASK)
 
-#define CORK 0x1
-#define PREEMPT 0x2
+#define LIVE 0x1
+#define CORK 0x2
+#define PREEMPT 0x4
 
 static unsigned int ring_size;
 static double rcs_clock;
@@ -120,6 +121,7 @@ static void latency_on_ring(int fd,
 	struct drm_i915_gem_exec_object2 obj[3];
 	struct drm_i915_gem_relocation_entry reloc;
 	struct drm_i915_gem_execbuffer2 execbuf;
+	igt_spin_t *spin = NULL;
 	IGT_CORK_HANDLE(c);
 	volatile uint32_t *reg;
 	unsigned repeats = ring_size;
@@ -189,6 +191,9 @@ static void latency_on_ring(int fd,
 		execbuf.buffer_count = 3;
 	}
 
+	if (flags & LIVE)
+		spin = igt_spin_batch_new(fd, .engine = ring);
+
 	start = *reg;
 	for (j = 0; j < repeats; j++) {
 		uint64_t presumed_offset = reloc.presumed_offset;
@@ -204,6 +209,7 @@ static void latency_on_ring(int fd,
 	end = *reg;
 	igt_assert(reloc.presumed_offset == obj[1].offset);
 
+	igt_spin_batch_free(fd, spin);
 	if (flags & CORK)
 		igt_cork_unplug(&c);
 
@@ -696,6 +702,11 @@ igt_main
 							e->exec_id | e->flags,
 							e->name, 0);
 
+				igt_subtest_f("%s-live-dispatch", e->name)
+					latency_on_ring(device,
+							e->exec_id | e->flags,
+							e->name, LIVE);
+
 				igt_subtest_f("%s-poll", e->name)
 					poll_ring(device,
 						  e->exec_id | e->flags,
@@ -715,6 +726,10 @@ igt_main
 							      e->name,
 							      0);
 
+				igt_subtest_f("%s-live-dispatch-queued", e->name)
+					latency_on_ring(device,
+							e->exec_id | e->flags,
+							e->name, LIVE | CORK);
 				igt_subtest_f("%s-dispatch-queued", e->name)
 					latency_on_ring(device,
 							e->exec_id | e->flags,
-- 
2.20.1

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[PATCH i-g-t 5/8] i915/gem_exec_schedule: Verify that using HW semaphores doesn't block

[Chris Wilson]

We may use HW semaphores to schedule nearly-ready work such that they
are already spinning on the GPU waiting for the completion on another
engine. However, we don't want for that spinning task to actually block
any real work should it be scheduled.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
---
 tests/i915/gem_exec_schedule.c | 87 ++++++++++++++++++++++++++++++++++
 1 file changed, 87 insertions(+)

diff --git a/tests/i915/gem_exec_schedule.c b/tests/i915/gem_exec_schedule.c
index 0462ce84f..e947dde41 100644
--- a/tests/i915/gem_exec_schedule.c
+++ b/tests/i915/gem_exec_schedule.c
@@ -47,6 +47,10 @@
 
 #define MAX_CONTEXTS 1024
 
+#define LOCAL_I915_EXEC_BSD_SHIFT      (13)
+#define LOCAL_I915_EXEC_BSD_MASK       (3 << LOCAL_I915_EXEC_BSD_SHIFT)
+#define ENGINE_MASK  (I915_EXEC_RING_MASK | LOCAL_I915_EXEC_BSD_MASK)
+
 IGT_TEST_DESCRIPTION("Check that we can control the order of execution");
 
 static uint32_t __store_dword(int fd, uint32_t ctx, unsigned ring,
@@ -305,6 +309,86 @@ static void smoketest(int fd, unsigned ring, unsigned timeout)
 	munmap(ptr, 4096);
 }
 
+static uint32_t __batch_create(int i915, uint32_t offset)
+{
+	const uint32_t bbe = MI_BATCH_BUFFER_END;
+	uint32_t handle;
+
+	handle = gem_create(i915, ALIGN(offset + 4, 4096));
+	gem_write(i915, handle, offset, &bbe, sizeof(bbe));
+
+	return handle;
+}
+
+static uint32_t batch_create(int i915)
+{
+	return __batch_create(i915, 0);
+}
+
+static void semaphore(int i915)
+{
+	struct drm_i915_gem_exec_object2 obj = {
+		.handle = batch_create(i915),
+	};
+	igt_spin_t *spin = NULL;
+	unsigned int engine;
+	uint32_t scratch;
+
+	igt_require(gem_scheduler_has_preemption(i915));
+
+	/*
+	 * Given the use of semaphores to govern parallel submission
+	 * of nearly-ready work to HW, we still want to run actually
+	 * ready work immediately. Without semaphores, the dependent
+	 * work wouldn't be submitted so our ready work will run.
+	 */
+
+	scratch = gem_create(i915, 4096);
+	for_each_physical_engine(i915, engine) {
+		if (!spin) {
+			spin = igt_spin_batch_new(i915,
+						  .dependency = scratch,
+						  .engine = engine);
+		} else {
+			typeof(spin->execbuf.flags) saved = spin->execbuf.flags;
+
+			spin->execbuf.flags &= ~ENGINE_MASK;
+			spin->execbuf.flags |= engine;
+
+			gem_execbuf(i915, &spin->execbuf);
+
+			spin->execbuf.flags = saved;
+		}
+	}
+	igt_require(spin);
+	gem_close(i915, scratch);
+
+	/*
+	 * On all dependent engines, the request may be executing (busywaiting
+	 * on a HW semaphore) but it should not prevent any real work from
+	 * taking precedence.
+	 */
+	scratch = gem_context_create(i915);
+	for_each_physical_engine(i915, engine) {
+		struct drm_i915_gem_execbuffer2 execbuf = {
+			.buffers_ptr = to_user_pointer(&obj),
+			.buffer_count = 1,
+			.flags = engine,
+			.rsvd1 = scratch,
+		};
+
+		if (engine == (spin->execbuf.flags & ENGINE_MASK))
+			continue;
+
+		gem_execbuf(i915, &execbuf);
+	}
+	gem_context_destroy(i915, scratch);
+	gem_sync(i915, obj.handle); /* to hang unless we can preempt */
+	gem_close(i915, obj.handle);
+
+	igt_spin_batch_free(i915, spin);
+}
+
 static void reorder(int fd, unsigned ring, unsigned flags)
 #define EQUAL 1
 {
@@ -1236,6 +1320,9 @@ igt_main
 			igt_require(gem_scheduler_has_ctx_priority(fd));
 		}
 
+		igt_subtest("semaphore")
+			semaphore(fd);
+
 		igt_subtest("smoketest-all")
 			smoketest(fd, ALL_ENGINES, 30);
 
-- 
2.20.1

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[Intel-gfx] [PATCH i-g-t 5/8] i915/gem_exec_schedule: Verify that using HW semaphores doesn't block

[Chris Wilson]

We may use HW semaphores to schedule nearly-ready work such that they
are already spinning on the GPU waiting for the completion on another
engine. However, we don't want for that spinning task to actually block
any real work should it be scheduled.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
---
 tests/i915/gem_exec_schedule.c | 87 ++++++++++++++++++++++++++++++++++
 1 file changed, 87 insertions(+)

diff --git a/tests/i915/gem_exec_schedule.c b/tests/i915/gem_exec_schedule.c
index 0462ce84f..e947dde41 100644
--- a/tests/i915/gem_exec_schedule.c
+++ b/tests/i915/gem_exec_schedule.c
@@ -47,6 +47,10 @@
 
 #define MAX_CONTEXTS 1024
 
+#define LOCAL_I915_EXEC_BSD_SHIFT      (13)
+#define LOCAL_I915_EXEC_BSD_MASK       (3 << LOCAL_I915_EXEC_BSD_SHIFT)
+#define ENGINE_MASK  (I915_EXEC_RING_MASK | LOCAL_I915_EXEC_BSD_MASK)
+
 IGT_TEST_DESCRIPTION("Check that we can control the order of execution");
 
 static uint32_t __store_dword(int fd, uint32_t ctx, unsigned ring,
@@ -305,6 +309,86 @@ static void smoketest(int fd, unsigned ring, unsigned timeout)
 	munmap(ptr, 4096);
 }
 
+static uint32_t __batch_create(int i915, uint32_t offset)
+{
+	const uint32_t bbe = MI_BATCH_BUFFER_END;
+	uint32_t handle;
+
+	handle = gem_create(i915, ALIGN(offset + 4, 4096));
+	gem_write(i915, handle, offset, &bbe, sizeof(bbe));
+
+	return handle;
+}
+
+static uint32_t batch_create(int i915)
+{
+	return __batch_create(i915, 0);
+}
+
+static void semaphore(int i915)
+{
+	struct drm_i915_gem_exec_object2 obj = {
+		.handle = batch_create(i915),
+	};
+	igt_spin_t *spin = NULL;
+	unsigned int engine;
+	uint32_t scratch;
+
+	igt_require(gem_scheduler_has_preemption(i915));
+
+	/*
+	 * Given the use of semaphores to govern parallel submission
+	 * of nearly-ready work to HW, we still want to run actually
+	 * ready work immediately. Without semaphores, the dependent
+	 * work wouldn't be submitted so our ready work will run.
+	 */
+
+	scratch = gem_create(i915, 4096);
+	for_each_physical_engine(i915, engine) {
+		if (!spin) {
+			spin = igt_spin_batch_new(i915,
+						  .dependency = scratch,
+						  .engine = engine);
+		} else {
+			typeof(spin->execbuf.flags) saved = spin->execbuf.flags;
+
+			spin->execbuf.flags &= ~ENGINE_MASK;
+			spin->execbuf.flags |= engine;
+
+			gem_execbuf(i915, &spin->execbuf);
+
+			spin->execbuf.flags = saved;
+		}
+	}
+	igt_require(spin);
+	gem_close(i915, scratch);
+
+	/*
+	 * On all dependent engines, the request may be executing (busywaiting
+	 * on a HW semaphore) but it should not prevent any real work from
+	 * taking precedence.
+	 */
+	scratch = gem_context_create(i915);
+	for_each_physical_engine(i915, engine) {
+		struct drm_i915_gem_execbuffer2 execbuf = {
+			.buffers_ptr = to_user_pointer(&obj),
+			.buffer_count = 1,
+			.flags = engine,
+			.rsvd1 = scratch,
+		};
+
+		if (engine == (spin->execbuf.flags & ENGINE_MASK))
+			continue;
+
+		gem_execbuf(i915, &execbuf);
+	}
+	gem_context_destroy(i915, scratch);
+	gem_sync(i915, obj.handle); /* to hang unless we can preempt */
+	gem_close(i915, obj.handle);
+
+	igt_spin_batch_free(i915, spin);
+}
+
 static void reorder(int fd, unsigned ring, unsigned flags)
 #define EQUAL 1
 {
@@ -1236,6 +1320,9 @@ igt_main
 			igt_require(gem_scheduler_has_ctx_priority(fd));
 		}
 
+		igt_subtest("semaphore")
+			semaphore(fd);
+
 		igt_subtest("smoketest-all")
 			smoketest(fd, ALL_ENGINES, 30);
 
-- 
2.20.1

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[PATCH i-g-t 6/8] i915/gem_exec_nop: poll-sequential requires ordering between rings

[Chris Wilson]

In order to correctly serialise the order of execution between rings, we
need to flag the scratch address as being written. Make it so.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
---
 tests/i915/gem_exec_nop.c | 152 +++++++++++++++++++++++++++++++++-----
 1 file changed, 133 insertions(+), 19 deletions(-)

diff --git a/tests/i915/gem_exec_nop.c b/tests/i915/gem_exec_nop.c
index 59a08ad08..b91b4d0f6 100644
--- a/tests/i915/gem_exec_nop.c
+++ b/tests/i915/gem_exec_nop.c
@@ -104,7 +104,7 @@ static double nop_on_ring(int fd, uint32_t handle, unsigned ring_id,
 	return elapsed(&start, &now);
 }
 
-static void poll_ring(int fd, unsigned ring, const char *name, int timeout)
+static void poll_ring(int fd, unsigned engine, const char *name, int timeout)
 {
 	const int gen = intel_gen(intel_get_drm_devid(fd));
 	const uint32_t MI_ARB_CHK = 0x5 << 23;
@@ -112,29 +112,17 @@ static void poll_ring(int fd, unsigned ring, const char *name, int timeout)
 	struct drm_i915_gem_exec_object2 obj;
 	struct drm_i915_gem_relocation_entry reloc[4], *r;
 	uint32_t *bbe[2], *state, *batch;
-	unsigned engines[16], nengine, flags;
 	struct timespec tv = {};
 	unsigned long cycles;
+	unsigned flags;
 	uint64_t elapsed;
 
 	flags = I915_EXEC_NO_RELOC;
 	if (gen == 4 || gen == 5)
 		flags |= I915_EXEC_SECURE;
 
-	nengine = 0;
-	if (ring == ALL_ENGINES) {
-		for_each_physical_engine(fd, ring) {
-			if (!gem_can_store_dword(fd, ring))
-				continue;
-
-			engines[nengine++] = ring;
-		}
-	} else {
-		gem_require_ring(fd, ring);
-		igt_require(gem_can_store_dword(fd, ring));
-		engines[nengine++] = ring;
-	}
-	igt_require(nengine);
+	gem_require_ring(fd, engine);
+	igt_require(gem_can_store_dword(fd, engine));
 
 	memset(&obj, 0, sizeof(obj));
 	obj.handle = gem_create(fd, 4096);
@@ -198,7 +186,7 @@ static void poll_ring(int fd, unsigned ring, const char *name, int timeout)
 	memset(&execbuf, 0, sizeof(execbuf));
 	execbuf.buffers_ptr = to_user_pointer(&obj);
 	execbuf.buffer_count = 1;
-	execbuf.flags = engines[0];
+	execbuf.flags = engine | flags;
 
 	cycles = 0;
 	do {
@@ -208,7 +196,6 @@ static void poll_ring(int fd, unsigned ring, const char *name, int timeout)
 		execbuf.batch_start_offset =
 			(bbe[idx] - batch) * sizeof(*batch) - 64;
 
-		execbuf.flags = engines[cycles % nengine] | flags;
 		gem_execbuf(fd, &execbuf);
 
 		*bbe[!idx] = MI_BATCH_BUFFER_END;
@@ -227,6 +214,133 @@ static void poll_ring(int fd, unsigned ring, const char *name, int timeout)
 	gem_close(fd, obj.handle);
 }
 
+static void poll_sequential(int fd, const char *name, int timeout)
+{
+	const int gen = intel_gen(intel_get_drm_devid(fd));
+	const uint32_t MI_ARB_CHK = 0x5 << 23;
+	struct drm_i915_gem_execbuffer2 execbuf;
+	struct drm_i915_gem_exec_object2 obj[2];
+	struct drm_i915_gem_relocation_entry reloc[4], *r;
+	uint32_t *bbe[2], *state, *batch;
+	unsigned engines[16], nengine, engine, flags;
+	struct timespec tv = {};
+	unsigned long cycles;
+	uint64_t elapsed;
+	bool cached;
+
+	flags = I915_EXEC_NO_RELOC;
+	if (gen == 4 || gen == 5)
+		flags |= I915_EXEC_SECURE;
+
+	nengine = 0;
+	for_each_physical_engine(fd, engine) {
+		if (!gem_can_store_dword(fd, engine))
+			continue;
+
+		engines[nengine++] = engine;
+	}
+	igt_require(nengine);
+
+	memset(obj, 0, sizeof(obj));
+	obj[0].handle = gem_create(fd, 4096);
+	obj[0].flags = EXEC_OBJECT_WRITE;
+	cached = __gem_set_caching(fd, obj[0].handle, 1) == 0;
+	obj[1].handle = gem_create(fd, 4096);
+	obj[1].relocs_ptr = to_user_pointer(reloc);
+	obj[1].relocation_count = ARRAY_SIZE(reloc);
+
+	r = memset(reloc, 0, sizeof(reloc));
+	batch = gem_mmap__wc(fd, obj[1].handle, 0, 4096, PROT_WRITE);
+
+	for (unsigned int start_offset = 0;
+	     start_offset <= 128;
+	     start_offset += 128) {
+		uint32_t *b = batch + start_offset / sizeof(*batch);
+
+		r->target_handle = obj[0].handle;
+		r->offset = (b - batch + 1) * sizeof(uint32_t);
+		r->delta = 0;
+		r->read_domains = I915_GEM_DOMAIN_RENDER;
+		r->write_domain = I915_GEM_DOMAIN_RENDER;
+
+		*b = MI_STORE_DWORD_IMM | (gen < 6 ? 1 << 22 : 0);
+		if (gen >= 8) {
+			*++b = r->delta;
+			*++b = 0;
+		} else if (gen >= 4) {
+			r->offset += sizeof(uint32_t);
+			*++b = 0;
+			*++b = r->delta;
+		} else {
+			*b -= 1;
+			*++b = r->delta;
+		}
+		*++b = start_offset != 0;
+		r++;
+
+		b = batch + (start_offset + 64) / sizeof(*batch);
+		bbe[start_offset != 0] = b;
+		*b++ = MI_ARB_CHK;
+
+		r->target_handle = obj[1].handle;
+		r->offset = (b - batch + 1) * sizeof(uint32_t);
+		r->read_domains = I915_GEM_DOMAIN_COMMAND;
+		r->delta = start_offset + 64;
+		if (gen >= 8) {
+			*b++ = MI_BATCH_BUFFER_START | 1 << 8 | 1;
+			*b++ = r->delta;
+			*b++ = 0;
+		} else if (gen >= 6) {
+			*b++ = MI_BATCH_BUFFER_START | 1 << 8;
+			*b++ = r->delta;
+		} else {
+			*b++ = MI_BATCH_BUFFER_START | 2 << 6;
+			if (gen < 4)
+				r->delta |= 1;
+			*b++ = r->delta;
+		}
+		r++;
+	}
+	igt_assert(r == reloc + ARRAY_SIZE(reloc));
+
+	if (cached)
+		state = gem_mmap__cpu(fd, obj[0].handle, 0, 4096, PROT_READ);
+	else
+		state = gem_mmap__wc(fd, obj[0].handle, 0, 4096, PROT_READ);
+
+	memset(&execbuf, 0, sizeof(execbuf));
+	execbuf.buffers_ptr = to_user_pointer(obj);
+	execbuf.buffer_count = ARRAY_SIZE(obj);
+
+	cycles = 0;
+	do {
+		unsigned int idx = ++cycles & 1;
+
+		*bbe[idx] = MI_ARB_CHK;
+		execbuf.batch_start_offset =
+			(bbe[idx] - batch) * sizeof(*batch) - 64;
+
+		execbuf.flags = engines[cycles % nengine] | flags;
+		gem_execbuf(fd, &execbuf);
+
+		*bbe[!idx] = MI_BATCH_BUFFER_END;
+		__sync_synchronize();
+
+		while (READ_ONCE(*state) != idx)
+			;
+	} while ((elapsed = igt_nsec_elapsed(&tv)) >> 30 < timeout);
+	*bbe[cycles & 1] = MI_BATCH_BUFFER_END;
+	gem_sync(fd, obj[1].handle);
+
+	igt_info("%s completed %ld cycles: %.3f us\n",
+		 name, cycles, elapsed*1e-3/cycles);
+
+	munmap(state, 4096);
+	munmap(batch, 4096);
+	gem_close(fd, obj[1].handle);
+	gem_close(fd, obj[0].handle);
+}
+
 static void single(int fd, uint32_t handle,
 		   unsigned ring_id, const char *ring_name)
 {
@@ -813,7 +927,7 @@ igt_main
 		}
 
 		igt_subtest("poll-sequential")
-			poll_ring(device, ALL_ENGINES, "Sequential", 20);
+			poll_sequential(device, "Sequential", 20);
 
 		igt_subtest("headless") {
 			/* Requires master for changing display modes */
-- 
2.20.1

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[igt-dev] [PATCH i-g-t 6/8] i915/gem_exec_nop: poll-sequential requires ordering between rings

[Chris Wilson]

In order to correctly serialise the order of execution between rings, we
need to flag the scratch address as being written. Make it so.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
---
 tests/i915/gem_exec_nop.c | 152 +++++++++++++++++++++++++++++++++-----
 1 file changed, 133 insertions(+), 19 deletions(-)

diff --git a/tests/i915/gem_exec_nop.c b/tests/i915/gem_exec_nop.c
index 59a08ad08..b91b4d0f6 100644
--- a/tests/i915/gem_exec_nop.c
+++ b/tests/i915/gem_exec_nop.c
@@ -104,7 +104,7 @@ static double nop_on_ring(int fd, uint32_t handle, unsigned ring_id,
 	return elapsed(&start, &now);
 }
 
-static void poll_ring(int fd, unsigned ring, const char *name, int timeout)
+static void poll_ring(int fd, unsigned engine, const char *name, int timeout)
 {
 	const int gen = intel_gen(intel_get_drm_devid(fd));
 	const uint32_t MI_ARB_CHK = 0x5 << 23;
@@ -112,29 +112,17 @@ static void poll_ring(int fd, unsigned ring, const char *name, int timeout)
 	struct drm_i915_gem_exec_object2 obj;
 	struct drm_i915_gem_relocation_entry reloc[4], *r;
 	uint32_t *bbe[2], *state, *batch;
-	unsigned engines[16], nengine, flags;
 	struct timespec tv = {};
 	unsigned long cycles;
+	unsigned flags;
 	uint64_t elapsed;
 
 	flags = I915_EXEC_NO_RELOC;
 	if (gen == 4 || gen == 5)
 		flags |= I915_EXEC_SECURE;
 
-	nengine = 0;
-	if (ring == ALL_ENGINES) {
-		for_each_physical_engine(fd, ring) {
-			if (!gem_can_store_dword(fd, ring))
-				continue;
-
-			engines[nengine++] = ring;
-		}
-	} else {
-		gem_require_ring(fd, ring);
-		igt_require(gem_can_store_dword(fd, ring));
-		engines[nengine++] = ring;
-	}
-	igt_require(nengine);
+	gem_require_ring(fd, engine);
+	igt_require(gem_can_store_dword(fd, engine));
 
 	memset(&obj, 0, sizeof(obj));
 	obj.handle = gem_create(fd, 4096);
@@ -198,7 +186,7 @@ static void poll_ring(int fd, unsigned ring, const char *name, int timeout)
 	memset(&execbuf, 0, sizeof(execbuf));
 	execbuf.buffers_ptr = to_user_pointer(&obj);
 	execbuf.buffer_count = 1;
-	execbuf.flags = engines[0];
+	execbuf.flags = engine | flags;
 
 	cycles = 0;
 	do {
@@ -208,7 +196,6 @@ static void poll_ring(int fd, unsigned ring, const char *name, int timeout)
 		execbuf.batch_start_offset =
 			(bbe[idx] - batch) * sizeof(*batch) - 64;
 
-		execbuf.flags = engines[cycles % nengine] | flags;
 		gem_execbuf(fd, &execbuf);
 
 		*bbe[!idx] = MI_BATCH_BUFFER_END;
@@ -227,6 +214,133 @@ static void poll_ring(int fd, unsigned ring, const char *name, int timeout)
 	gem_close(fd, obj.handle);
 }
 
+static void poll_sequential(int fd, const char *name, int timeout)
+{
+	const int gen = intel_gen(intel_get_drm_devid(fd));
+	const uint32_t MI_ARB_CHK = 0x5 << 23;
+	struct drm_i915_gem_execbuffer2 execbuf;
+	struct drm_i915_gem_exec_object2 obj[2];
+	struct drm_i915_gem_relocation_entry reloc[4], *r;
+	uint32_t *bbe[2], *state, *batch;
+	unsigned engines[16], nengine, engine, flags;
+	struct timespec tv = {};
+	unsigned long cycles;
+	uint64_t elapsed;
+	bool cached;
+
+	flags = I915_EXEC_NO_RELOC;
+	if (gen == 4 || gen == 5)
+		flags |= I915_EXEC_SECURE;
+
+	nengine = 0;
+	for_each_physical_engine(fd, engine) {
+		if (!gem_can_store_dword(fd, engine))
+			continue;
+
+		engines[nengine++] = engine;
+	}
+	igt_require(nengine);
+
+	memset(obj, 0, sizeof(obj));
+	obj[0].handle = gem_create(fd, 4096);
+	obj[0].flags = EXEC_OBJECT_WRITE;
+	cached = __gem_set_caching(fd, obj[0].handle, 1) == 0;
+	obj[1].handle = gem_create(fd, 4096);
+	obj[1].relocs_ptr = to_user_pointer(reloc);
+	obj[1].relocation_count = ARRAY_SIZE(reloc);
+
+	r = memset(reloc, 0, sizeof(reloc));
+	batch = gem_mmap__wc(fd, obj[1].handle, 0, 4096, PROT_WRITE);
+
+	for (unsigned int start_offset = 0;
+	     start_offset <= 128;
+	     start_offset += 128) {
+		uint32_t *b = batch + start_offset / sizeof(*batch);
+
+		r->target_handle = obj[0].handle;
+		r->offset = (b - batch + 1) * sizeof(uint32_t);
+		r->delta = 0;
+		r->read_domains = I915_GEM_DOMAIN_RENDER;
+		r->write_domain = I915_GEM_DOMAIN_RENDER;
+
+		*b = MI_STORE_DWORD_IMM | (gen < 6 ? 1 << 22 : 0);
+		if (gen >= 8) {
+			*++b = r->delta;
+			*++b = 0;
+		} else if (gen >= 4) {
+			r->offset += sizeof(uint32_t);
+			*++b = 0;
+			*++b = r->delta;
+		} else {
+			*b -= 1;
+			*++b = r->delta;
+		}
+		*++b = start_offset != 0;
+		r++;
+
+		b = batch + (start_offset + 64) / sizeof(*batch);
+		bbe[start_offset != 0] = b;
+		*b++ = MI_ARB_CHK;
+
+		r->target_handle = obj[1].handle;
+		r->offset = (b - batch + 1) * sizeof(uint32_t);
+		r->read_domains = I915_GEM_DOMAIN_COMMAND;
+		r->delta = start_offset + 64;
+		if (gen >= 8) {
+			*b++ = MI_BATCH_BUFFER_START | 1 << 8 | 1;
+			*b++ = r->delta;
+			*b++ = 0;
+		} else if (gen >= 6) {
+			*b++ = MI_BATCH_BUFFER_START | 1 << 8;
+			*b++ = r->delta;
+		} else {
+			*b++ = MI_BATCH_BUFFER_START | 2 << 6;
+			if (gen < 4)
+				r->delta |= 1;
+			*b++ = r->delta;
+		}
+		r++;
+	}
+	igt_assert(r == reloc + ARRAY_SIZE(reloc));
+
+	if (cached)
+		state = gem_mmap__cpu(fd, obj[0].handle, 0, 4096, PROT_READ);
+	else
+		state = gem_mmap__wc(fd, obj[0].handle, 0, 4096, PROT_READ);
+
+	memset(&execbuf, 0, sizeof(execbuf));
+	execbuf.buffers_ptr = to_user_pointer(obj);
+	execbuf.buffer_count = ARRAY_SIZE(obj);
+
+	cycles = 0;
+	do {
+		unsigned int idx = ++cycles & 1;
+
+		*bbe[idx] = MI_ARB_CHK;
+		execbuf.batch_start_offset =
+			(bbe[idx] - batch) * sizeof(*batch) - 64;
+
+		execbuf.flags = engines[cycles % nengine] | flags;
+		gem_execbuf(fd, &execbuf);
+
+		*bbe[!idx] = MI_BATCH_BUFFER_END;
+		__sync_synchronize();
+
+		while (READ_ONCE(*state) != idx)
+			;
+	} while ((elapsed = igt_nsec_elapsed(&tv)) >> 30 < timeout);
+	*bbe[cycles & 1] = MI_BATCH_BUFFER_END;
+	gem_sync(fd, obj[1].handle);
+
+	igt_info("%s completed %ld cycles: %.3f us\n",
+		 name, cycles, elapsed*1e-3/cycles);
+
+	munmap(state, 4096);
+	munmap(batch, 4096);
+	gem_close(fd, obj[1].handle);
+	gem_close(fd, obj[0].handle);
+}
+
 static void single(int fd, uint32_t handle,
 		   unsigned ring_id, const char *ring_name)
 {
@@ -813,7 +927,7 @@ igt_main
 		}
 
 		igt_subtest("poll-sequential")
-			poll_ring(device, ALL_ENGINES, "Sequential", 20);
+			poll_sequential(device, "Sequential", 20);
 
 		igt_subtest("headless") {
 			/* Requires master for changing display modes */
-- 
2.20.1

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[PATCH i-g-t 7/8] i915/gem_sync: Make switch-default asymmetric

[Chris Wilson]

To make the demonstration of the cheeky preemption more impactful, make
the second context a nop to contrast the first being 1024
MI_STORE_DWORD_IMM. Then if we execute and wait on the second context
before executing the first, the client latency is even more drastically
reduced.

To more clearly show any effect on wait reordering, measure the
alternative path and present both.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
---
 tests/i915/gem_sync.c | 40 +++++++++++++++++++++++++++++-----------
 1 file changed, 29 insertions(+), 11 deletions(-)

diff --git a/tests/i915/gem_sync.c b/tests/i915/gem_sync.c
index fb209977d..3e4feff32 100644
--- a/tests/i915/gem_sync.c
+++ b/tests/i915/gem_sync.c
@@ -651,7 +651,7 @@ switch_ring(int fd, unsigned ring, int num_children, int timeout)
 			struct drm_i915_gem_relocation_entry reloc[1024];
 			struct drm_i915_gem_execbuffer2 execbuf;
 		} contexts[2];
-		double start, elapsed;
+		double elapsed, baseline;
 		unsigned long cycles;
 
 		for (int i = 0; i < ARRAY_SIZE(contexts); i++) {
@@ -679,7 +679,7 @@ switch_ring(int fd, unsigned ring, int num_children, int timeout)
 			c->object[1].handle = gem_create(fd, sz);
 
 			c->object[1].relocs_ptr = to_user_pointer(c->reloc);
-			c->object[1].relocation_count = 1024;
+			c->object[1].relocation_count = 1024 * i;
 
 			batch = gem_mmap__cpu(fd, c->object[1].handle, 0, sz,
 					PROT_WRITE | PROT_READ);
@@ -688,7 +688,7 @@ switch_ring(int fd, unsigned ring, int num_children, int timeout)
 
 			memset(c->reloc, 0, sizeof(c->reloc));
 			b = batch;
-			for (int r = 0; r < 1024; r++) {
+			for (int r = 0; r < c->object[1].relocation_count; r++) {
 				uint64_t offset;
 
 				c->reloc[r].presumed_offset = c->object[0].offset;
@@ -722,26 +722,44 @@ switch_ring(int fd, unsigned ring, int num_children, int timeout)
 		}
 
 		cycles = 0;
-		elapsed = 0;
-		start = gettime();
-		do {
+		baseline = 0;
+		igt_until_timeout(timeout) {
 			do {
 				double this;
 
-				gem_execbuf(fd, &contexts[0].execbuf);
 				gem_execbuf(fd, &contexts[1].execbuf);
+				gem_execbuf(fd, &contexts[0].execbuf);
 
 				this = gettime();
 				gem_sync(fd, contexts[1].object[1].handle);
-				elapsed += gettime() - this;
+				gem_sync(fd, contexts[0].object[1].handle);
+				baseline += gettime() - this;
+			} while (++cycles & 1023);
+		}
+		baseline /= cycles;
+
+		cycles = 0;
+		elapsed = 0;
+		igt_until_timeout(timeout) {
+			do {
+				double this;
 
+				gem_execbuf(fd, &contexts[1].execbuf);
+				gem_execbuf(fd, &contexts[0].execbuf);
+
+				this = gettime();
 				gem_sync(fd, contexts[0].object[1].handle);
+				elapsed += gettime() - this;
+
+				gem_sync(fd, contexts[1].object[1].handle);
 			} while (++cycles & 1023);
-		} while ((gettime() - start) < timeout);
-		igt_info("%s%sompleted %ld cycles: %.3f us\n",
+		}
+		elapsed /= cycles;
+
+		igt_info("%s%sompleted %ld cycles: %.3f us, baseline %.3f us\n",
 			 names[child % num_engines] ?: "",
 			 names[child % num_engines] ? " c" : "C",
-			 cycles, elapsed*1e6/cycles);
+			 cycles, elapsed*1e6, baseline*1e6);
 
 		for (int i = 0; i < ARRAY_SIZE(contexts); i++) {
 			gem_close(fd, contexts[i].object[1].handle);
-- 
2.20.1

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[igt-dev] [PATCH i-g-t 7/8] i915/gem_sync: Make switch-default asymmetric

[Chris Wilson]

To make the demonstration of the cheeky preemption more impactful, make
the second context a nop to contrast the first being 1024
MI_STORE_DWORD_IMM. Then if we execute and wait on the second context
before executing the first, the client latency is even more drastically
reduced.

To more clearly show any effect on wait reordering, measure the
alternative path and present both.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
---
 tests/i915/gem_sync.c | 40 +++++++++++++++++++++++++++++-----------
 1 file changed, 29 insertions(+), 11 deletions(-)

diff --git a/tests/i915/gem_sync.c b/tests/i915/gem_sync.c
index fb209977d..3e4feff32 100644
--- a/tests/i915/gem_sync.c
+++ b/tests/i915/gem_sync.c
@@ -651,7 +651,7 @@ switch_ring(int fd, unsigned ring, int num_children, int timeout)
 			struct drm_i915_gem_relocation_entry reloc[1024];
 			struct drm_i915_gem_execbuffer2 execbuf;
 		} contexts[2];
-		double start, elapsed;
+		double elapsed, baseline;
 		unsigned long cycles;
 
 		for (int i = 0; i < ARRAY_SIZE(contexts); i++) {
@@ -679,7 +679,7 @@ switch_ring(int fd, unsigned ring, int num_children, int timeout)
 			c->object[1].handle = gem_create(fd, sz);
 
 			c->object[1].relocs_ptr = to_user_pointer(c->reloc);
-			c->object[1].relocation_count = 1024;
+			c->object[1].relocation_count = 1024 * i;
 
 			batch = gem_mmap__cpu(fd, c->object[1].handle, 0, sz,
 					PROT_WRITE | PROT_READ);
@@ -688,7 +688,7 @@ switch_ring(int fd, unsigned ring, int num_children, int timeout)
 
 			memset(c->reloc, 0, sizeof(c->reloc));
 			b = batch;
-			for (int r = 0; r < 1024; r++) {
+			for (int r = 0; r < c->object[1].relocation_count; r++) {
 				uint64_t offset;
 
 				c->reloc[r].presumed_offset = c->object[0].offset;
@@ -722,26 +722,44 @@ switch_ring(int fd, unsigned ring, int num_children, int timeout)
 		}
 
 		cycles = 0;
-		elapsed = 0;
-		start = gettime();
-		do {
+		baseline = 0;
+		igt_until_timeout(timeout) {
 			do {
 				double this;
 
-				gem_execbuf(fd, &contexts[0].execbuf);
 				gem_execbuf(fd, &contexts[1].execbuf);
+				gem_execbuf(fd, &contexts[0].execbuf);
 
 				this = gettime();
 				gem_sync(fd, contexts[1].object[1].handle);
-				elapsed += gettime() - this;
+				gem_sync(fd, contexts[0].object[1].handle);
+				baseline += gettime() - this;
+			} while (++cycles & 1023);
+		}
+		baseline /= cycles;
+
+		cycles = 0;
+		elapsed = 0;
+		igt_until_timeout(timeout) {
+			do {
+				double this;
 
+				gem_execbuf(fd, &contexts[1].execbuf);
+				gem_execbuf(fd, &contexts[0].execbuf);
+
+				this = gettime();
 				gem_sync(fd, contexts[0].object[1].handle);
+				elapsed += gettime() - this;
+
+				gem_sync(fd, contexts[1].object[1].handle);
 			} while (++cycles & 1023);
-		} while ((gettime() - start) < timeout);
-		igt_info("%s%sompleted %ld cycles: %.3f us\n",
+		}
+		elapsed /= cycles;
+
+		igt_info("%s%sompleted %ld cycles: %.3f us, baseline %.3f us\n",
 			 names[child % num_engines] ?: "",
 			 names[child % num_engines] ? " c" : "C",
-			 cycles, elapsed*1e6/cycles);
+			 cycles, elapsed*1e6, baseline*1e6);
 
 		for (int i = 0; i < ARRAY_SIZE(contexts); i++) {
 			gem_close(fd, contexts[i].object[1].handle);
-- 
2.20.1

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[PATCH i-g-t 8/8] intel-ci: Drop gem_exec_nop from BAT

[Chris Wilson]

This pair, gem_exec_nop/{series,parallel}, are very light stress tests
of which we already perform the same sequence inside
i915_selftests/live_requests. We keep basic uABI coverage (i.e. plain
old gem_execbuf) via the likes of gem_exec_basic and gem_exec_reloc so
all gem_exec_nop adds are nefarious HW details, much less likely to spot
if a test is of sound quality for further testing (and again, we have
alternate coverage of the same HW stress).

Between the pair of subtests, gem_exec_nop takes about 20s of BAT.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
Cc: Mika Kuoppala <mika.kuoppala@intel.com>
Cc: Petri Latvala <petri.latvala@intel.com>
Cc: Tomi Sarvela <tomi.p.sarvela@intel.com>
---
 tests/intel-ci/fast-feedback.testlist | 2 --
 1 file changed, 2 deletions(-)

diff --git a/tests/intel-ci/fast-feedback.testlist b/tests/intel-ci/fast-feedback.testlist
index da3c4c8ed..a95d2e95c 100644
--- a/tests/intel-ci/fast-feedback.testlist
+++ b/tests/intel-ci/fast-feedback.testlist
@@ -43,8 +43,6 @@ igt@gem_exec_fence@basic-wait-default
 igt@gem_exec_fence@basic-await-default
 igt@gem_exec_fence@nb-await-default
 igt@gem_exec_gttfill@basic
-igt@gem_exec_nop@basic-parallel
-igt@gem_exec_nop@basic-series
 igt@gem_exec_parallel@basic
 igt@gem_exec_parse@basic-allowed
 igt@gem_exec_parse@basic-rejected
-- 
2.20.1

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[igt-dev] [PATCH i-g-t 8/8] intel-ci: Drop gem_exec_nop from BAT

[Chris Wilson]

This pair, gem_exec_nop/{series,parallel}, are very light stress tests
of which we already perform the same sequence inside
i915_selftests/live_requests. We keep basic uABI coverage (i.e. plain
old gem_execbuf) via the likes of gem_exec_basic and gem_exec_reloc so
all gem_exec_nop adds are nefarious HW details, much less likely to spot
if a test is of sound quality for further testing (and again, we have
alternate coverage of the same HW stress).

Between the pair of subtests, gem_exec_nop takes about 20s of BAT.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
Cc: Mika Kuoppala <mika.kuoppala@intel.com>
Cc: Petri Latvala <petri.latvala@intel.com>
Cc: Tomi Sarvela <tomi.p.sarvela@intel.com>
---
 tests/intel-ci/fast-feedback.testlist | 2 --
 1 file changed, 2 deletions(-)

diff --git a/tests/intel-ci/fast-feedback.testlist b/tests/intel-ci/fast-feedback.testlist
index da3c4c8ed..a95d2e95c 100644
--- a/tests/intel-ci/fast-feedback.testlist
+++ b/tests/intel-ci/fast-feedback.testlist
@@ -43,8 +43,6 @@ igt@gem_exec_fence@basic-wait-default
 igt@gem_exec_fence@basic-await-default
 igt@gem_exec_fence@nb-await-default
 igt@gem_exec_gttfill@basic
-igt@gem_exec_nop@basic-parallel
-igt@gem_exec_nop@basic-series
 igt@gem_exec_parallel@basic
 igt@gem_exec_parse@basic-allowed
 igt@gem_exec_parse@basic-rejected
-- 
2.20.1

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Re: [PATCH i-g-t 8/8] intel-ci: Drop gem_exec_nop from BAT

[Mika Kuoppala]

Chris Wilson <chris@chris-wilson.co.uk> writes:

> This pair, gem_exec_nop/{series,parallel}, are very light stress tests
> of which we already perform the same sequence inside
> i915_selftests/live_requests. We keep basic uABI coverage (i.e. plain
> old gem_execbuf) via the likes of gem_exec_basic and gem_exec_reloc so
> all gem_exec_nop adds are nefarious HW details, much less likely to spot
> if a test is of sound quality for further testing (and again, we have
> alternate coverage of the same HW stress).
>
> Between the pair of subtests, gem_exec_nop takes about 20s of BAT.
>
> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
> Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
> Cc: Mika Kuoppala <mika.kuoppala@intel.com>
> Cc: Petri Latvala <petri.latvala@intel.com>
> Cc: Tomi Sarvela <tomi.p.sarvela@intel.com>

I was going to say that I have already stamped this.
But re-checking the previous submission, I haven't.
Perhaps I forgot to press send.

Reviewed-by: Mika Kuoppala <mika.kuoppala@linux.intel.com>

> ---
>  tests/intel-ci/fast-feedback.testlist | 2 --
>  1 file changed, 2 deletions(-)
>
> diff --git a/tests/intel-ci/fast-feedback.testlist b/tests/intel-ci/fast-feedback.testlist
> index da3c4c8ed..a95d2e95c 100644
> --- a/tests/intel-ci/fast-feedback.testlist
> +++ b/tests/intel-ci/fast-feedback.testlist
> @@ -43,8 +43,6 @@ igt@gem_exec_fence@basic-wait-default
>  igt@gem_exec_fence@basic-await-default
>  igt@gem_exec_fence@nb-await-default
>  igt@gem_exec_gttfill@basic
> -igt@gem_exec_nop@basic-parallel
> -igt@gem_exec_nop@basic-series
>  igt@gem_exec_parallel@basic
>  igt@gem_exec_parse@basic-allowed
>  igt@gem_exec_parse@basic-rejected
> -- 
> 2.20.1
>
> _______________________________________________
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> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx
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Re: [igt-dev] [Intel-gfx] [PATCH i-g-t 8/8] intel-ci: Drop gem_exec_nop from BAT

[Mika Kuoppala]

Chris Wilson <chris@chris-wilson.co.uk> writes:

> This pair, gem_exec_nop/{series,parallel}, are very light stress tests
> of which we already perform the same sequence inside
> i915_selftests/live_requests. We keep basic uABI coverage (i.e. plain
> old gem_execbuf) via the likes of gem_exec_basic and gem_exec_reloc so
> all gem_exec_nop adds are nefarious HW details, much less likely to spot
> if a test is of sound quality for further testing (and again, we have
> alternate coverage of the same HW stress).
>
> Between the pair of subtests, gem_exec_nop takes about 20s of BAT.
>
> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
> Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
> Cc: Mika Kuoppala <mika.kuoppala@intel.com>
> Cc: Petri Latvala <petri.latvala@intel.com>
> Cc: Tomi Sarvela <tomi.p.sarvela@intel.com>

I was going to say that I have already stamped this.
But re-checking the previous submission, I haven't.
Perhaps I forgot to press send.

Reviewed-by: Mika Kuoppala <mika.kuoppala@linux.intel.com>

> ---
>  tests/intel-ci/fast-feedback.testlist | 2 --
>  1 file changed, 2 deletions(-)
>
> diff --git a/tests/intel-ci/fast-feedback.testlist b/tests/intel-ci/fast-feedback.testlist
> index da3c4c8ed..a95d2e95c 100644
> --- a/tests/intel-ci/fast-feedback.testlist
> +++ b/tests/intel-ci/fast-feedback.testlist
> @@ -43,8 +43,6 @@ igt@gem_exec_fence@basic-wait-default
>  igt@gem_exec_fence@basic-await-default
>  igt@gem_exec_fence@nb-await-default
>  igt@gem_exec_gttfill@basic
> -igt@gem_exec_nop@basic-parallel
> -igt@gem_exec_nop@basic-series
>  igt@gem_exec_parallel@basic
>  igt@gem_exec_parse@basic-allowed
>  igt@gem_exec_parse@basic-rejected
> -- 
> 2.20.1
>
> _______________________________________________
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> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx
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[igt-dev] ✓ Fi.CI.BAT: success for series starting with [i-g-t,1/8] lib: Skip unused fork helpers

[Patchwork]

== Series Details ==

Series: series starting with [i-g-t,1/8] lib: Skip unused fork helpers
URL   : https://patchwork.freedesktop.org/series/55968/
State : success

== Summary ==

CI Bug Log - changes from IGT_4799 -> IGTPW_2318
====================================================

Summary
-------

  **SUCCESS**

  No regressions found.

  External URL: https://patchwork.freedesktop.org/api/1.0/series/55968/revisions/1/mbox/

Known issues
------------

  Here are the changes found in IGTPW_2318 that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@kms_chamelium@common-hpd-after-suspend:
    - fi-kbl-7567u:       NOTRUN -> WARN [fdo#109380]

  
#### Possible fixes ####

  * igt@kms_chamelium@hdmi-hpd-fast:
    - fi-kbl-7500u:       FAIL [fdo#109485] -> PASS

  * igt@kms_pipe_crc_basic@suspend-read-crc-pipe-b:
    - fi-byt-clapper:     FAIL [fdo#103191] / [fdo#107362] -> PASS

  * igt@pm_rpm@basic-pci-d3-state:
    - fi-byt-j1900:       {SKIP} [fdo#109271] -> PASS

  * igt@pm_rpm@basic-rte:
    - fi-byt-j1900:       FAIL [fdo#108800] -> PASS

  
  {name}: This element is suppressed. This means it is ignored when computing
          the status of the difference (SUCCESS, WARNING, or FAILURE).

  [fdo#103191]: https://bugs.freedesktop.org/show_bug.cgi?id=103191
  [fdo#107362]: https://bugs.freedesktop.org/show_bug.cgi?id=107362
  [fdo#108800]: https://bugs.freedesktop.org/show_bug.cgi?id=108800
  [fdo#108915]: https://bugs.freedesktop.org/show_bug.cgi?id=108915
  [fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
  [fdo#109380]: https://bugs.freedesktop.org/show_bug.cgi?id=109380
  [fdo#109485]: https://bugs.freedesktop.org/show_bug.cgi?id=109485


Participating hosts (42 -> 41)
------------------------------

  Additional (2): fi-icl-y fi-kbl-7567u 
  Missing    (3): fi-ilk-m540 fi-byt-squawks fi-bsw-cyan 


Build changes
-------------

    * IGT: IGT_4799 -> IGTPW_2318

  CI_DRM_5507: ac9df1e288cc904e2d24872ca44a44728b7a6ee7 @ git://anongit.freedesktop.org/gfx-ci/linux
  IGTPW_2318: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_2318/
  IGT_4799: 4177d0d6a40fe96e3d859be0413bf66ef9a8a606 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools



== Testlist changes ==

+igt@gem_exec_latency@blt-live-dispatch
+igt@gem_exec_latency@blt-live-dispatch-queued
+igt@gem_exec_latency@bsd1-live-dispatch
+igt@gem_exec_latency@bsd1-live-dispatch-queued
+igt@gem_exec_latency@bsd2-live-dispatch
+igt@gem_exec_latency@bsd2-live-dispatch-queued
+igt@gem_exec_latency@bsd-live-dispatch
+igt@gem_exec_latency@bsd-live-dispatch-queued
+igt@gem_exec_latency@render-live-dispatch
+igt@gem_exec_latency@render-live-dispatch-queued
+igt@gem_exec_latency@vebox-live-dispatch
+igt@gem_exec_latency@vebox-live-dispatch-queued
+igt@gem_exec_schedule@semaphore

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_2318/
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Re: [PATCH i-g-t 1/8] lib: Skip unused fork helpers

[Mika Kuoppala]

Chris Wilson <chris@chris-wilson.co.uk> writes:

> Skip trying to stop unused fork helpers to avoid the various asserts
> that they were running and didn't die early.
>
> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=109468
> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
> ---
>  lib/igt_core.c | 3 +++
>  1 file changed, 3 insertions(+)
>
> diff --git a/lib/igt_core.c b/lib/igt_core.c
> index 49fbf70de..0794e11a0 100644
> --- a/lib/igt_core.c
> +++ b/lib/igt_core.c
> @@ -1678,6 +1678,9 @@ void igt_stop_helper(struct igt_helper_process *proc)
>  {
>  	int status;
>  
> +	if (!proc->running) /* never even started */
> +		return;
> +

The comment above mentions that it is error to call this on a helper
process which hasn't been spawned yet. So as we relax the requirements,
remove that comment.

With that,
Reviewed-by: Mika Kuoppala <mika.kuoppala@linux.intel.com>

>  	/* failure here means the pid is already dead and so waiting is safe */
>  	kill(proc->pid, proc->use_SIGKILL ? SIGKILL : SIGTERM);
>  
> -- 
> 2.20.1
>
> _______________________________________________
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> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx
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Re: [igt-dev] [Intel-gfx] [PATCH i-g-t 1/8] lib: Skip unused fork helpers

[Mika Kuoppala]

Chris Wilson <chris@chris-wilson.co.uk> writes:

> Skip trying to stop unused fork helpers to avoid the various asserts
> that they were running and didn't die early.
>
> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=109468
> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
> ---
>  lib/igt_core.c | 3 +++
>  1 file changed, 3 insertions(+)
>
> diff --git a/lib/igt_core.c b/lib/igt_core.c
> index 49fbf70de..0794e11a0 100644
> --- a/lib/igt_core.c
> +++ b/lib/igt_core.c
> @@ -1678,6 +1678,9 @@ void igt_stop_helper(struct igt_helper_process *proc)
>  {
>  	int status;
>  
> +	if (!proc->running) /* never even started */
> +		return;
> +

The comment above mentions that it is error to call this on a helper
process which hasn't been spawned yet. So as we relax the requirements,
remove that comment.

With that,
Reviewed-by: Mika Kuoppala <mika.kuoppala@linux.intel.com>

>  	/* failure here means the pid is already dead and so waiting is safe */
>  	kill(proc->pid, proc->use_SIGKILL ? SIGKILL : SIGTERM);
>  
> -- 
> 2.20.1
>
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx
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[igt-dev] ✓ Fi.CI.IGT: success for series starting with [i-g-t,1/8] lib: Skip unused fork helpers

[Patchwork]

== Series Details ==

Series: series starting with [i-g-t,1/8] lib: Skip unused fork helpers
URL   : https://patchwork.freedesktop.org/series/55968/
State : success

== Summary ==

CI Bug Log - changes from IGT_4799_full -> IGTPW_2318_full
====================================================

Summary
-------

  **SUCCESS**

  No regressions found.

  External URL: https://patchwork.freedesktop.org/api/1.0/series/55968/revisions/1/mbox/

Known issues
------------

  Here are the changes found in IGTPW_2318_full that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@kms_available_modes_crc@available_mode_test_crc:
    - shard-glk:          PASS -> FAIL [fdo#106641]

  * igt@kms_ccs@pipe-b-crc-sprite-planes-basic:
    - shard-glk:          PASS -> FAIL [fdo#108145]

  * igt@kms_cursor_crc@cursor-128x42-random:
    - shard-glk:          PASS -> FAIL [fdo#103232] +3

  * igt@kms_cursor_crc@cursor-256x256-dpms:
    - shard-glk:          NOTRUN -> FAIL [fdo#103232]

  * igt@kms_cursor_crc@cursor-256x256-suspend:
    - shard-apl:          PASS -> FAIL [fdo#103191] / [fdo#103232]

  * igt@kms_cursor_crc@cursor-256x85-random:
    - shard-apl:          PASS -> FAIL [fdo#103232] +6
    - shard-kbl:          NOTRUN -> FAIL [fdo#103232]

  * igt@kms_cursor_crc@cursor-size-change:
    - shard-kbl:          PASS -> FAIL [fdo#103232]

  * igt@kms_cursor_legacy@2x-long-cursor-vs-flip-legacy:
    - shard-hsw:          PASS -> FAIL [fdo#105767]

  * igt@kms_plane@plane-position-covered-pipe-c-planes:
    - shard-apl:          PASS -> FAIL [fdo#103166] +6
    - shard-kbl:          PASS -> FAIL [fdo#103166]

  * igt@kms_plane_alpha_blend@pipe-a-alpha-opaque-fb:
    - shard-apl:          PASS -> FAIL [fdo#108145]
    - shard-kbl:          PASS -> FAIL [fdo#108145]

  * igt@kms_plane_alpha_blend@pipe-c-alpha-transparant-fb:
    - shard-glk:          NOTRUN -> FAIL [fdo#108145]

  * igt@kms_plane_multiple@atomic-pipe-b-tiling-none:
    - shard-glk:          PASS -> FAIL [fdo#103166] +5

  * igt@kms_vblank@pipe-b-ts-continuation-suspend:
    - shard-kbl:          PASS -> INCOMPLETE [fdo#103665]

  
#### Possible fixes ####

  * igt@gem_workarounds@suspend-resume-context:
    - shard-kbl:          INCOMPLETE [fdo#103665] -> PASS

  * igt@kms_available_modes_crc@available_mode_test_crc:
    - shard-apl:          FAIL [fdo#106641] -> PASS

  * igt@kms_busy@extended-pageflip-hang-newfb-render-b:
    - shard-apl:          DMESG-WARN [fdo#107956] -> PASS

  * igt@kms_busy@extended-pageflip-modeset-hang-oldfb-render-c:
    - shard-glk:          DMESG-WARN [fdo#107956] -> PASS

  * igt@kms_color@pipe-c-legacy-gamma:
    - shard-kbl:          FAIL [fdo#104782] -> PASS
    - shard-apl:          FAIL [fdo#104782] -> PASS

  * igt@kms_cursor_crc@cursor-256x256-suspend:
    - shard-kbl:          DMESG-WARN [fdo#108566] -> PASS

  * igt@kms_cursor_crc@cursor-64x21-random:
    - shard-apl:          FAIL [fdo#103232] -> PASS +2
    - shard-kbl:          FAIL [fdo#103232] -> PASS +1

  * igt@kms_cursor_crc@cursor-64x64-suspend:
    - shard-apl:          FAIL [fdo#103191] / [fdo#103232] -> PASS
    - shard-kbl:          FAIL [fdo#103191] / [fdo#103232] -> PASS

  * igt@kms_cursor_legacy@flip-vs-cursor-legacy:
    - shard-glk:          FAIL [fdo#102670] -> PASS

  * igt@kms_flip@flip-vs-expired-vblank-interruptible:
    - shard-glk:          FAIL [fdo#105363] -> PASS

  * igt@kms_plane@pixel-format-pipe-a-planes-source-clamping:
    - shard-glk:          FAIL [fdo#108948] -> PASS
    - shard-apl:          FAIL [fdo#108948] -> PASS
    - shard-kbl:          FAIL [fdo#108948] -> PASS

  * igt@kms_plane_alpha_blend@pipe-b-constant-alpha-max:
    - shard-glk:          FAIL [fdo#108145] -> PASS

  * igt@kms_plane_multiple@atomic-pipe-a-tiling-y:
    - shard-apl:          FAIL [fdo#103166] -> PASS +2

  * igt@kms_plane_multiple@atomic-pipe-b-tiling-x:
    - shard-glk:          FAIL [fdo#103166] -> PASS +1
    - shard-kbl:          FAIL [fdo#103166] -> PASS

  * igt@pm_rc6_residency@rc6-accuracy:
    - shard-snb:          {SKIP} [fdo#109271] -> PASS

  
  {name}: This element is suppressed. This means it is ignored when computing
          the status of the difference (SUCCESS, WARNING, or FAILURE).

  [fdo#102670]: https://bugs.freedesktop.org/show_bug.cgi?id=102670
  [fdo#103166]: https://bugs.freedesktop.org/show_bug.cgi?id=103166
  [fdo#103191]: https://bugs.freedesktop.org/show_bug.cgi?id=103191
  [fdo#103232]: https://bugs.freedesktop.org/show_bug.cgi?id=103232
  [fdo#103665]: https://bugs.freedesktop.org/show_bug.cgi?id=103665
  [fdo#104782]: https://bugs.freedesktop.org/show_bug.cgi?id=104782
  [fdo#105363]: https://bugs.freedesktop.org/show_bug.cgi?id=105363
  [fdo#105767]: https://bugs.freedesktop.org/show_bug.cgi?id=105767
  [fdo#106641]: https://bugs.freedesktop.org/show_bug.cgi?id=106641
  [fdo#107956]: https://bugs.freedesktop.org/show_bug.cgi?id=107956
  [fdo#108145]: https://bugs.freedesktop.org/show_bug.cgi?id=108145
  [fdo#108566]: https://bugs.freedesktop.org/show_bug.cgi?id=108566
  [fdo#108948]: https://bugs.freedesktop.org/show_bug.cgi?id=108948
  [fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
  [fdo#109278]: https://bugs.freedesktop.org/show_bug.cgi?id=109278
  [fdo#109373]: https://bugs.freedesktop.org/show_bug.cgi?id=109373
  [k.org#202321]: https://bugzilla.kernel.org/show_bug.cgi?id=202321


Participating hosts (7 -> 5)
------------------------------

  Missing    (2): shard-skl shard-iclb 


Build changes
-------------

    * IGT: IGT_4799 -> IGTPW_2318

  CI_DRM_5507: ac9df1e288cc904e2d24872ca44a44728b7a6ee7 @ git://anongit.freedesktop.org/gfx-ci/linux
  IGTPW_2318: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_2318/
  IGT_4799: 4177d0d6a40fe96e3d859be0413bf66ef9a8a606 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_2318/
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