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From: Peter Maydell <peter.maydell@linaro.org>
To: qemu-devel@nongnu.org
Subject: [Qemu-devel] [PULL 02/21] target/arm: v8M MPU should use background region as default, not always
Date: Thu, 21 Feb 2019 18:57:20 +0000	[thread overview]
Message-ID: <20190221185739.25362-3-peter.maydell@linaro.org> (raw)
In-Reply-To: <20190221185739.25362-1-peter.maydell@linaro.org>

The "background region" for a v8M MPU is a default which will be used
(if enabled, and if the access is privileged) if the access does
not match any specific MPU region. We were incorrectly using it
always (by putting the condition at the wrong nesting level). This
meant that we would always return the default background permissions
rather than the correct permissions for a specific region, and also
that we would not return the right information in response to a
TT instruction.

Move the check for the background region to the same place in the
logic as the equivalent v8M MPUCheck() pseudocode puts it.
This in turn means we must adjust the condition we use to detect
matches in multiple regions to avoid false-positives.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20190214113408.10214-1-peter.maydell@linaro.org
---
 target/arm/helper.c | 8 +++++---
 1 file changed, 5 insertions(+), 3 deletions(-)

diff --git a/target/arm/helper.c b/target/arm/helper.c
index a018eb23fe2..fe054897c78 100644
--- a/target/arm/helper.c
+++ b/target/arm/helper.c
@@ -11387,9 +11387,11 @@ static bool pmsav8_mpu_lookup(CPUARMState *env, uint32_t address,
         hit = true;
     } else if (m_is_ppb_region(env, address)) {
         hit = true;
-    } else if (pmsav7_use_background_region(cpu, mmu_idx, is_user)) {
-        hit = true;
     } else {
+        if (pmsav7_use_background_region(cpu, mmu_idx, is_user)) {
+            hit = true;
+        }
+
         for (n = (int)cpu->pmsav7_dregion - 1; n >= 0; n--) {
             /* region search */
             /* Note that the base address is bits [31:5] from the register
@@ -11427,7 +11429,7 @@ static bool pmsav8_mpu_lookup(CPUARMState *env, uint32_t address,
                 *is_subpage = true;
             }
 
-            if (hit) {
+            if (matchregion != -1) {
                 /* Multiple regions match -- always a failure (unlike
                  * PMSAv7 where highest-numbered-region wins)
                  */
-- 
2.20.1

  parent reply	other threads:[~2019-02-21 18:58 UTC|newest]

Thread overview: 23+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-02-21 18:57 [Qemu-devel] [PULL 00/21] target-arm queue Peter Maydell
2019-02-21 18:57 ` [Qemu-devel] [PULL 01/21] hw/arm/armsse: Fix memory leak in error-exit path Peter Maydell
2019-02-21 18:57 ` Peter Maydell [this message]
2019-02-21 18:57 ` [Qemu-devel] [PULL 03/21] target/arm: Stop unintentional sign extension in pmu_init Peter Maydell
2019-02-21 18:57 ` [Qemu-devel] [PULL 04/21] target/arm: Restructure disas_fp_int_conv Peter Maydell
2019-02-21 18:57 ` [Qemu-devel] [PULL 05/21] target/arm: Split out vfp_helper.c Peter Maydell
2019-02-21 18:57 ` [Qemu-devel] [PULL 06/21] target/arm: Rearrange Floating-point data-processing (2 regs) Peter Maydell
2019-02-21 18:57 ` [Qemu-devel] [PULL 07/21] target/arm: Implement ARMv8.3-JSConv Peter Maydell
2019-02-21 18:57 ` [Qemu-devel] [PULL 08/21] hw/misc/tz-ppc: Support having unused ports in the middle of the range Peter Maydell
2019-02-21 18:57 ` [Qemu-devel] [PULL 09/21] hw/timer/pl031: Allow use as an embedded-struct device Peter Maydell
2019-02-21 18:57 ` [Qemu-devel] [PULL 10/21] hw/timer/pl031: Convert to using trace events Peter Maydell
2019-02-21 18:57 ` [Qemu-devel] [PULL 11/21] hw/char/pl011: Allow use as an embedded-struct device Peter Maydell
2019-02-21 18:57 ` [Qemu-devel] [PULL 12/21] hw/char/pl011: Support all interrupt lines Peter Maydell
2019-02-21 18:57 ` [Qemu-devel] [PULL 13/21] hw/char/pl011: Use '0x' prefix when logging hex numbers Peter Maydell
2019-02-21 18:57 ` [Qemu-devel] [PULL 14/21] hw/arm/armsse: Document SRAM_ADDR_WIDTH property in header comment Peter Maydell
2019-02-21 18:57 ` [Qemu-devel] [PULL 15/21] hw/arm/armsse: Allow boards to specify init-svtor Peter Maydell
2019-02-21 18:57 ` [Qemu-devel] [PULL 16/21] hw/arm/musca.c: Implement models of the Musca-A and -B1 boards Peter Maydell
2019-02-21 18:57 ` [Qemu-devel] [PULL 17/21] hw/arm/musca: Add PPCs Peter Maydell
2019-02-21 18:57 ` [Qemu-devel] [PULL 18/21] hw/arm/musca: Add MPCs Peter Maydell
2019-02-21 18:57 ` [Qemu-devel] [PULL 19/21] hw/arm/musca: Wire up PL031 RTC Peter Maydell
2019-02-21 18:57 ` [Qemu-devel] [PULL 20/21] hw/arm/musca: Wire up PL011 UARTs Peter Maydell
2019-02-21 18:57 ` [Qemu-devel] [PULL 21/21] hw/arm/armsse: Make 0x5... alias region work for per-CPU devices Peter Maydell
2019-02-22 11:24 ` [Qemu-devel] [PULL 00/21] target-arm queue Peter Maydell

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