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From: Peter Maydell <peter.maydell@linaro.org>
To: qemu-devel@nongnu.org
Subject: [Qemu-devel] [PULL 08/21] hw/misc/tz-ppc: Support having unused ports in the middle of the range
Date: Thu, 21 Feb 2019 18:57:26 +0000	[thread overview]
Message-ID: <20190221185739.25362-9-peter.maydell@linaro.org> (raw)
In-Reply-To: <20190221185739.25362-1-peter.maydell@linaro.org>

The Peripheral Protection Controller's handling of unused ports
is that if there is nothing connected to the port's downstream
then it does not create the sysbus MMIO region for the upstream
end of the port. This results in odd behaviour when there is
an unused port in the middle of the range: since sysbus MMIO
regions are implicitly consecutively allocated, any used ports
above the unused ones end up with sysbus MMIO region numbers
that don't match the port number.

Avoid this numbering mismatch by creating dummy MMIO regions
for the unused ports. This doesn't change anything for our
existing boards, which don't have any gaps in the middle of
the port ranges they use; but it will be needed for the Musca
board.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
---
 include/hw/misc/tz-ppc.h |  8 +++++++-
 hw/misc/tz-ppc.c         | 32 ++++++++++++++++++++++++++++++++
 2 files changed, 39 insertions(+), 1 deletion(-)

diff --git a/include/hw/misc/tz-ppc.h b/include/hw/misc/tz-ppc.h
index fc8b806e4df..080d6e2ec17 100644
--- a/include/hw/misc/tz-ppc.h
+++ b/include/hw/misc/tz-ppc.h
@@ -38,7 +38,13 @@
  *
  * QEMU interface:
  * + sysbus MMIO regions 0..15: MemoryRegions defining the upstream end
- *   of each of the 16 ports of the PPC
+ *   of each of the 16 ports of the PPC. When a port is unused (i.e. no
+ *   downstream MemoryRegion is connected to it) at the end of the 0..15
+ *   range then no sysbus MMIO region is created for its upstream. When an
+ *   unused port lies in the middle of the range with other used ports at
+ *   higher port numbers, a dummy MMIO region is created to ensure that
+ *   port N's upstream is always sysbus MMIO region N. Dummy regions should
+ *   not be mapped, and will assert if any access is made to them.
  * + Property "port[0..15]": MemoryRegion defining the downstream device(s)
  *   for each of the 16 ports of the PPC
  * + Named GPIO inputs "cfg_nonsec[0..15]": set to 1 if the port should be
diff --git a/hw/misc/tz-ppc.c b/hw/misc/tz-ppc.c
index 3dd045c15f5..2e04837bea9 100644
--- a/hw/misc/tz-ppc.c
+++ b/hw/misc/tz-ppc.c
@@ -181,6 +181,21 @@ static const MemoryRegionOps tz_ppc_ops = {
     .endianness = DEVICE_LITTLE_ENDIAN,
 };
 
+static bool tz_ppc_dummy_accepts(void *opaque, hwaddr addr,
+                                 unsigned size, bool is_write,
+                                 MemTxAttrs attrs)
+{
+    /*
+     * Board code should never map the upstream end of an unused port,
+     * so we should never try to make a memory access to it.
+     */
+    g_assert_not_reached();
+}
+
+static const MemoryRegionOps tz_ppc_dummy_ops = {
+    .valid.accepts = tz_ppc_dummy_accepts,
+};
+
 static void tz_ppc_reset(DeviceState *dev)
 {
     TZPPC *s = TZ_PPC(dev);
@@ -210,16 +225,33 @@ static void tz_ppc_realize(DeviceState *dev, Error **errp)
     SysBusDevice *sbd = SYS_BUS_DEVICE(dev);
     TZPPC *s = TZ_PPC(dev);
     int i;
+    int max_port = 0;
 
     /* We can't create the upstream end of the port until realize,
      * as we don't know the size of the MR used as the downstream until then.
      */
     for (i = 0; i < TZ_NUM_PORTS; i++) {
+        if (s->port[i].downstream) {
+            max_port = i;
+        }
+    }
+
+    for (i = 0; i <= max_port; i++) {
         TZPPCPort *port = &s->port[i];
         char *name;
         uint64_t size;
 
         if (!port->downstream) {
+            /*
+             * Create dummy sysbus MMIO region so the sysbus region
+             * numbering doesn't get out of sync with the port numbers.
+             * The size is entirely arbitrary.
+             */
+            name = g_strdup_printf("tz-ppc-dummy-port[%d]", i);
+            memory_region_init_io(&port->upstream, obj, &tz_ppc_dummy_ops,
+                                  port, name, 0x10000);
+            sysbus_init_mmio(sbd, &port->upstream);
+            g_free(name);
             continue;
         }
 
-- 
2.20.1

  parent reply	other threads:[~2019-02-21 18:58 UTC|newest]

Thread overview: 23+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-02-21 18:57 [Qemu-devel] [PULL 00/21] target-arm queue Peter Maydell
2019-02-21 18:57 ` [Qemu-devel] [PULL 01/21] hw/arm/armsse: Fix memory leak in error-exit path Peter Maydell
2019-02-21 18:57 ` [Qemu-devel] [PULL 02/21] target/arm: v8M MPU should use background region as default, not always Peter Maydell
2019-02-21 18:57 ` [Qemu-devel] [PULL 03/21] target/arm: Stop unintentional sign extension in pmu_init Peter Maydell
2019-02-21 18:57 ` [Qemu-devel] [PULL 04/21] target/arm: Restructure disas_fp_int_conv Peter Maydell
2019-02-21 18:57 ` [Qemu-devel] [PULL 05/21] target/arm: Split out vfp_helper.c Peter Maydell
2019-02-21 18:57 ` [Qemu-devel] [PULL 06/21] target/arm: Rearrange Floating-point data-processing (2 regs) Peter Maydell
2019-02-21 18:57 ` [Qemu-devel] [PULL 07/21] target/arm: Implement ARMv8.3-JSConv Peter Maydell
2019-02-21 18:57 ` Peter Maydell [this message]
2019-02-21 18:57 ` [Qemu-devel] [PULL 09/21] hw/timer/pl031: Allow use as an embedded-struct device Peter Maydell
2019-02-21 18:57 ` [Qemu-devel] [PULL 10/21] hw/timer/pl031: Convert to using trace events Peter Maydell
2019-02-21 18:57 ` [Qemu-devel] [PULL 11/21] hw/char/pl011: Allow use as an embedded-struct device Peter Maydell
2019-02-21 18:57 ` [Qemu-devel] [PULL 12/21] hw/char/pl011: Support all interrupt lines Peter Maydell
2019-02-21 18:57 ` [Qemu-devel] [PULL 13/21] hw/char/pl011: Use '0x' prefix when logging hex numbers Peter Maydell
2019-02-21 18:57 ` [Qemu-devel] [PULL 14/21] hw/arm/armsse: Document SRAM_ADDR_WIDTH property in header comment Peter Maydell
2019-02-21 18:57 ` [Qemu-devel] [PULL 15/21] hw/arm/armsse: Allow boards to specify init-svtor Peter Maydell
2019-02-21 18:57 ` [Qemu-devel] [PULL 16/21] hw/arm/musca.c: Implement models of the Musca-A and -B1 boards Peter Maydell
2019-02-21 18:57 ` [Qemu-devel] [PULL 17/21] hw/arm/musca: Add PPCs Peter Maydell
2019-02-21 18:57 ` [Qemu-devel] [PULL 18/21] hw/arm/musca: Add MPCs Peter Maydell
2019-02-21 18:57 ` [Qemu-devel] [PULL 19/21] hw/arm/musca: Wire up PL031 RTC Peter Maydell
2019-02-21 18:57 ` [Qemu-devel] [PULL 20/21] hw/arm/musca: Wire up PL011 UARTs Peter Maydell
2019-02-21 18:57 ` [Qemu-devel] [PULL 21/21] hw/arm/armsse: Make 0x5... alias region work for per-CPU devices Peter Maydell
2019-02-22 11:24 ` [Qemu-devel] [PULL 00/21] target-arm queue Peter Maydell

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