From: Julien Grall <julien.grall@arm.com> To: linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, kvmarm@lists.cs.columbia.edu Cc: christoffer.dall@arm.com, james.morse@arm.com, marc.zyngier@arm.com, julien.thierry@arm.com, suzuki.poulose@arm.com, catalin.marinas@arm.com, will.deacon@arm.com, Julien Grall <julien.grall@arm.com> Subject: [PATCH RFC 12/14] arm64/lib: asid: Allow user to update the context under the lock Date: Thu, 21 Mar 2019 16:36:21 +0000 [thread overview] Message-ID: <20190321163623.20219-13-julien.grall@arm.com> (raw) In-Reply-To: <20190321163623.20219-1-julien.grall@arm.com> Some users of the ASID allocator (e.g VMID) will require to update the context when a new ASID is generated. This has to be protected by a lock to prevent concurrent modification. Rather than introducing yet another lock, it is possible to re-use the allocator lock for that purpose. This patch introduces a new callback that will be call when updating the context. Signed-off-by: Julien Grall <julien.grall@arm.com> --- arch/arm64/include/asm/asid.h | 12 ++++++++---- arch/arm64/lib/asid.c | 10 ++++++++-- arch/arm64/mm/context.c | 11 ++++++++--- 3 files changed, 24 insertions(+), 9 deletions(-) diff --git a/arch/arm64/include/asm/asid.h b/arch/arm64/include/asm/asid.h index bb62b587f37f..d8d9dc875bec 100644 --- a/arch/arm64/include/asm/asid.h +++ b/arch/arm64/include/asm/asid.h @@ -23,6 +23,8 @@ struct asid_info unsigned int ctxt_shift; /* Callback to locally flush the context. */ void (*flush_cpu_ctxt_cb)(void); + /* Callback to call when a context is updated */ + void (*update_ctxt_cb)(void *ctxt); }; #define NUM_ASIDS(info) (1UL << ((info)->bits)) @@ -31,7 +33,7 @@ struct asid_info #define active_asid(info, cpu) *per_cpu_ptr((info)->active, cpu) void asid_new_context(struct asid_info *info, atomic64_t *pasid, - unsigned int cpu); + unsigned int cpu, void *ctxt); /* * Check the ASID is still valid for the context. If not generate a new ASID. @@ -40,7 +42,8 @@ void asid_new_context(struct asid_info *info, atomic64_t *pasid, * @cpu: current CPU ID. Must have been acquired throught get_cpu() */ static inline void asid_check_context(struct asid_info *info, - atomic64_t *pasid, unsigned int cpu) + atomic64_t *pasid, unsigned int cpu, + void *ctxt) { u64 asid, old_active_asid; @@ -67,11 +70,12 @@ static inline void asid_check_context(struct asid_info *info, old_active_asid, asid)) return; - asid_new_context(info, pasid, cpu); + asid_new_context(info, pasid, cpu, ctxt); } int asid_allocator_init(struct asid_info *info, u32 bits, unsigned int asid_per_ctxt, - void (*flush_cpu_ctxt_cb)(void)); + void (*flush_cpu_ctxt_cb)(void), + void (*update_ctxt_cb)(void *ctxt)); #endif diff --git a/arch/arm64/lib/asid.c b/arch/arm64/lib/asid.c index 72b71bfb32be..b47e6769c1bc 100644 --- a/arch/arm64/lib/asid.c +++ b/arch/arm64/lib/asid.c @@ -130,9 +130,10 @@ static u64 new_context(struct asid_info *info, atomic64_t *pasid) * @pasid: Pointer to the current ASID batch allocated. It will be updated * with the new ASID batch. * @cpu: current CPU ID. Must have been acquired through get_cpu() + * @ctxt: Context to update when calling update_context */ void asid_new_context(struct asid_info *info, atomic64_t *pasid, - unsigned int cpu) + unsigned int cpu, void *ctxt) { unsigned long flags; u64 asid; @@ -149,6 +150,9 @@ void asid_new_context(struct asid_info *info, atomic64_t *pasid, info->flush_cpu_ctxt_cb(); atomic64_set(&active_asid(info, cpu), asid); + + info->update_ctxt_cb(ctxt); + raw_spin_unlock_irqrestore(&info->lock, flags); } @@ -163,11 +167,13 @@ void asid_new_context(struct asid_info *info, atomic64_t *pasid, */ int asid_allocator_init(struct asid_info *info, u32 bits, unsigned int asid_per_ctxt, - void (*flush_cpu_ctxt_cb)(void)) + void (*flush_cpu_ctxt_cb)(void), + void (*update_ctxt_cb)(void *ctxt)) { info->bits = bits; info->ctxt_shift = ilog2(asid_per_ctxt); info->flush_cpu_ctxt_cb = flush_cpu_ctxt_cb; + info->update_ctxt_cb = update_ctxt_cb; /* * Expect allocation after rollover to fail if we don't have at least * one more ASID than CPUs. ASID #0 is always reserved. diff --git a/arch/arm64/mm/context.c b/arch/arm64/mm/context.c index 95ee7711a2ef..737b4bd7bbe7 100644 --- a/arch/arm64/mm/context.c +++ b/arch/arm64/mm/context.c @@ -82,7 +82,7 @@ void check_and_switch_context(struct mm_struct *mm, unsigned int cpu) if (system_supports_cnp()) cpu_set_reserved_ttbr0(); - asid_check_context(&asid_info, &mm->context.id, cpu); + asid_check_context(&asid_info, &mm->context.id, cpu, mm); arm64_apply_bp_hardening(); @@ -108,12 +108,17 @@ static void asid_flush_cpu_ctxt(void) local_flush_tlb_all(); } +static void asid_update_ctxt(void *ctxt) +{ + /* Nothing to do */ +} + static int asids_init(void) { u32 bits = get_cpu_asid_bits(); - if (!asid_allocator_init(&asid_info, bits, ASID_PER_CONTEXT, - asid_flush_cpu_ctxt)) + if (asid_allocator_init(&asid_info, bits, ASID_PER_CONTEXT, + asid_flush_cpu_ctxt, asid_update_ctxt)) panic("Unable to initialize ASID allocator for %lu ASIDs\n", NUM_ASIDS(&asid_info)); -- 2.11.0
WARNING: multiple messages have this Message-ID (diff)
From: Julien Grall <julien.grall@arm.com> To: linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, kvmarm@lists.cs.columbia.edu Cc: suzuki.poulose@arm.com, marc.zyngier@arm.com, catalin.marinas@arm.com, julien.thierry@arm.com, will.deacon@arm.com, christoffer.dall@arm.com, Julien Grall <julien.grall@arm.com>, james.morse@arm.com Subject: [PATCH RFC 12/14] arm64/lib: asid: Allow user to update the context under the lock Date: Thu, 21 Mar 2019 16:36:21 +0000 [thread overview] Message-ID: <20190321163623.20219-13-julien.grall@arm.com> (raw) In-Reply-To: <20190321163623.20219-1-julien.grall@arm.com> Some users of the ASID allocator (e.g VMID) will require to update the context when a new ASID is generated. This has to be protected by a lock to prevent concurrent modification. Rather than introducing yet another lock, it is possible to re-use the allocator lock for that purpose. This patch introduces a new callback that will be call when updating the context. Signed-off-by: Julien Grall <julien.grall@arm.com> --- arch/arm64/include/asm/asid.h | 12 ++++++++---- arch/arm64/lib/asid.c | 10 ++++++++-- arch/arm64/mm/context.c | 11 ++++++++--- 3 files changed, 24 insertions(+), 9 deletions(-) diff --git a/arch/arm64/include/asm/asid.h b/arch/arm64/include/asm/asid.h index bb62b587f37f..d8d9dc875bec 100644 --- a/arch/arm64/include/asm/asid.h +++ b/arch/arm64/include/asm/asid.h @@ -23,6 +23,8 @@ struct asid_info unsigned int ctxt_shift; /* Callback to locally flush the context. */ void (*flush_cpu_ctxt_cb)(void); + /* Callback to call when a context is updated */ + void (*update_ctxt_cb)(void *ctxt); }; #define NUM_ASIDS(info) (1UL << ((info)->bits)) @@ -31,7 +33,7 @@ struct asid_info #define active_asid(info, cpu) *per_cpu_ptr((info)->active, cpu) void asid_new_context(struct asid_info *info, atomic64_t *pasid, - unsigned int cpu); + unsigned int cpu, void *ctxt); /* * Check the ASID is still valid for the context. If not generate a new ASID. @@ -40,7 +42,8 @@ void asid_new_context(struct asid_info *info, atomic64_t *pasid, * @cpu: current CPU ID. Must have been acquired throught get_cpu() */ static inline void asid_check_context(struct asid_info *info, - atomic64_t *pasid, unsigned int cpu) + atomic64_t *pasid, unsigned int cpu, + void *ctxt) { u64 asid, old_active_asid; @@ -67,11 +70,12 @@ static inline void asid_check_context(struct asid_info *info, old_active_asid, asid)) return; - asid_new_context(info, pasid, cpu); + asid_new_context(info, pasid, cpu, ctxt); } int asid_allocator_init(struct asid_info *info, u32 bits, unsigned int asid_per_ctxt, - void (*flush_cpu_ctxt_cb)(void)); + void (*flush_cpu_ctxt_cb)(void), + void (*update_ctxt_cb)(void *ctxt)); #endif diff --git a/arch/arm64/lib/asid.c b/arch/arm64/lib/asid.c index 72b71bfb32be..b47e6769c1bc 100644 --- a/arch/arm64/lib/asid.c +++ b/arch/arm64/lib/asid.c @@ -130,9 +130,10 @@ static u64 new_context(struct asid_info *info, atomic64_t *pasid) * @pasid: Pointer to the current ASID batch allocated. It will be updated * with the new ASID batch. * @cpu: current CPU ID. Must have been acquired through get_cpu() + * @ctxt: Context to update when calling update_context */ void asid_new_context(struct asid_info *info, atomic64_t *pasid, - unsigned int cpu) + unsigned int cpu, void *ctxt) { unsigned long flags; u64 asid; @@ -149,6 +150,9 @@ void asid_new_context(struct asid_info *info, atomic64_t *pasid, info->flush_cpu_ctxt_cb(); atomic64_set(&active_asid(info, cpu), asid); + + info->update_ctxt_cb(ctxt); + raw_spin_unlock_irqrestore(&info->lock, flags); } @@ -163,11 +167,13 @@ void asid_new_context(struct asid_info *info, atomic64_t *pasid, */ int asid_allocator_init(struct asid_info *info, u32 bits, unsigned int asid_per_ctxt, - void (*flush_cpu_ctxt_cb)(void)) + void (*flush_cpu_ctxt_cb)(void), + void (*update_ctxt_cb)(void *ctxt)) { info->bits = bits; info->ctxt_shift = ilog2(asid_per_ctxt); info->flush_cpu_ctxt_cb = flush_cpu_ctxt_cb; + info->update_ctxt_cb = update_ctxt_cb; /* * Expect allocation after rollover to fail if we don't have at least * one more ASID than CPUs. ASID #0 is always reserved. diff --git a/arch/arm64/mm/context.c b/arch/arm64/mm/context.c index 95ee7711a2ef..737b4bd7bbe7 100644 --- a/arch/arm64/mm/context.c +++ b/arch/arm64/mm/context.c @@ -82,7 +82,7 @@ void check_and_switch_context(struct mm_struct *mm, unsigned int cpu) if (system_supports_cnp()) cpu_set_reserved_ttbr0(); - asid_check_context(&asid_info, &mm->context.id, cpu); + asid_check_context(&asid_info, &mm->context.id, cpu, mm); arm64_apply_bp_hardening(); @@ -108,12 +108,17 @@ static void asid_flush_cpu_ctxt(void) local_flush_tlb_all(); } +static void asid_update_ctxt(void *ctxt) +{ + /* Nothing to do */ +} + static int asids_init(void) { u32 bits = get_cpu_asid_bits(); - if (!asid_allocator_init(&asid_info, bits, ASID_PER_CONTEXT, - asid_flush_cpu_ctxt)) + if (asid_allocator_init(&asid_info, bits, ASID_PER_CONTEXT, + asid_flush_cpu_ctxt, asid_update_ctxt)) panic("Unable to initialize ASID allocator for %lu ASIDs\n", NUM_ASIDS(&asid_info)); -- 2.11.0 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
next prev parent reply other threads:[~2019-03-21 16:37 UTC|newest] Thread overview: 211+ messages / expand[flat|nested] mbox.gz Atom feed top 2019-03-21 16:36 [PATCH RFC 00/14] kvm/arm: Align the VMID allocation with the arm64 ASID one Julien Grall 2019-03-21 16:36 ` Julien Grall 2019-03-21 16:36 ` [PATCH RFC 01/14] arm64/mm: Introduce asid_info structure and move asid_generation/asid_map to it Julien Grall 2019-03-21 16:36 ` Julien Grall 2019-03-21 17:03 ` Suzuki K Poulose 2019-03-21 17:03 ` Suzuki K Poulose 2019-03-21 17:27 ` Julien Grall 2019-03-21 17:27 ` Julien Grall 2019-03-21 16:36 ` [PATCH RFC 02/14] arm64/mm: Move active_asids and reserved_asids to asid_info Julien Grall 2019-03-21 16:36 ` Julien Grall 2019-03-21 16:36 ` Julien Grall 2019-03-21 16:36 ` [PATCH RFC 03/14] arm64/mm: Move bits " Julien Grall 2019-03-21 16:36 ` Julien Grall 2019-03-21 16:36 ` Julien Grall 2019-03-21 16:36 ` [PATCH RFC 04/14] arm64/mm: Move the variable lock and tlb_flush_pending " Julien Grall 2019-03-21 16:36 ` Julien Grall 2019-03-21 16:36 ` Julien Grall 2019-03-21 16:36 ` [PATCH RFC 05/14] arm64/mm: Remove dependency on MM in new_context Julien Grall 2019-03-21 16:36 ` Julien Grall 2019-03-21 16:36 ` [PATCH RFC 06/14] arm64/mm: Store the number of asid allocated per context Julien Grall 2019-03-21 16:36 ` Julien Grall 2019-03-21 16:36 ` Julien Grall 2019-03-21 16:36 ` [PATCH RFC 07/14] arm64/mm: Introduce NUM_ASIDS Julien Grall 2019-03-21 16:36 ` Julien Grall 2019-03-21 16:36 ` [PATCH RFC 08/14] arm64/mm: Split asid_inits in 2 parts Julien Grall 2019-03-21 16:36 ` Julien Grall 2019-03-21 16:36 ` Julien Grall 2019-03-21 16:36 ` [PATCH RFC 09/14] arm64/mm: Split the function check_and_switch_context in 3 parts Julien Grall 2019-03-21 16:36 ` Julien Grall 2019-03-21 16:36 ` Julien Grall 2019-03-21 16:36 ` [PATCH RFC 10/14] arm64/mm: Introduce a callback to flush the local context Julien Grall 2019-03-21 16:36 ` Julien Grall 2019-03-21 16:36 ` Julien Grall 2019-03-21 16:36 ` [PATCH RFC 11/14] arm64: Move the ASID allocator code in a separate file Julien Grall 2019-03-21 16:36 ` Julien Grall 2019-06-05 16:56 ` Julien Grall 2019-06-05 16:56 ` Julien Grall 2019-06-05 16:56 ` Julien Grall 2019-06-05 16:56 ` Julien Grall 2019-06-05 20:41 ` Palmer Dabbelt 2019-06-05 20:41 ` Palmer Dabbelt 2019-06-05 20:41 ` Palmer Dabbelt 2019-06-05 20:41 ` Palmer Dabbelt 2019-06-11 1:56 ` Gary Guo 2019-06-11 1:56 ` Gary Guo 2019-06-11 1:56 ` Gary Guo 2019-06-11 1:56 ` Gary Guo 2019-06-19 8:07 ` Guo Ren 2019-06-19 8:07 ` Guo Ren 2019-06-19 8:07 ` Guo Ren 2019-06-19 8:07 ` Guo Ren 2019-06-19 8:54 ` Julien Grall 2019-06-19 8:54 ` Julien Grall 2019-06-19 8:54 ` Julien Grall 2019-06-19 8:54 ` Julien Grall 2019-06-19 9:12 ` Will Deacon 2019-06-19 9:12 ` Will Deacon 2019-06-19 9:12 ` Will Deacon 2019-06-19 9:12 ` Will Deacon 2019-06-19 12:18 ` Guo Ren 2019-06-19 12:18 ` Guo Ren 2019-06-19 12:18 ` Guo Ren 2019-06-19 12:18 ` Guo Ren 2019-06-19 12:39 ` Will Deacon 2019-06-19 12:39 ` Will Deacon 2019-06-19 12:39 ` Will Deacon 2019-06-19 12:39 ` Will Deacon 2019-06-20 9:33 ` Guo Ren 2019-06-20 9:33 ` Guo Ren 2019-06-20 9:33 ` Guo Ren 2019-06-20 9:33 ` Guo Ren 2019-06-24 10:40 ` Will Deacon 2019-06-24 10:40 ` Will Deacon 2019-06-24 10:40 ` Will Deacon 2019-06-24 10:40 ` Will Deacon 2019-06-25 7:25 ` Palmer Dabbelt 2019-06-25 7:25 ` Palmer Dabbelt 2019-06-25 7:25 ` Palmer Dabbelt 2019-06-25 7:25 ` Palmer Dabbelt 2019-09-07 23:52 ` Guo Ren 2019-09-07 23:52 ` Guo Ren 2019-09-07 23:52 ` Guo Ren 2019-09-07 23:52 ` Guo Ren 2019-09-07 23:52 ` Guo Ren 2019-09-12 14:02 ` Will Deacon 2019-09-12 14:02 ` Will Deacon 2019-09-12 14:02 ` Will Deacon 2019-09-12 14:02 ` Will Deacon 2019-09-12 14:02 ` Will Deacon 2019-09-12 14:59 ` Guo Ren 2019-09-12 14:59 ` Guo Ren 2019-09-12 14:59 ` Guo Ren 2019-09-12 14:59 ` Guo Ren 2019-09-12 14:59 ` Guo Ren 2019-09-13 7:13 ` Guo Ren 2019-09-13 7:13 ` Guo Ren 2019-09-14 8:49 ` Guo Ren 2019-09-14 8:49 ` Guo Ren 2019-09-14 8:49 ` Guo Ren 2019-09-14 8:49 ` Guo Ren 2019-09-14 8:49 ` Guo Ren 2019-09-16 12:57 ` Jean-Philippe Brucker 2019-09-16 12:57 ` Jean-Philippe Brucker 2019-09-16 12:57 ` Jean-Philippe Brucker 2019-09-16 12:57 ` Jean-Philippe Brucker 2019-09-16 12:57 ` Jean-Philippe Brucker 2019-09-19 13:07 ` Guo Ren 2019-09-19 13:07 ` Guo Ren 2019-09-19 13:07 ` Guo Ren 2019-09-19 13:07 ` Guo Ren 2019-09-19 13:07 ` Guo Ren 2019-09-19 15:18 ` Jean-Philippe Brucker 2019-09-19 15:18 ` Jean-Philippe Brucker 2019-09-19 15:18 ` Jean-Philippe Brucker 2019-09-19 15:18 ` Jean-Philippe Brucker 2019-09-19 15:18 ` Jean-Philippe Brucker 2019-09-20 0:07 ` Guo Ren 2019-09-20 0:07 ` Guo Ren 2019-09-20 0:07 ` Guo Ren 2019-09-20 0:07 ` Guo Ren 2019-09-20 0:07 ` Guo Ren 2019-09-20 7:18 ` Jean-Philippe Brucker 2019-09-20 7:18 ` Jean-Philippe Brucker 2019-09-20 7:18 ` Jean-Philippe Brucker 2019-09-20 7:18 ` Jean-Philippe Brucker 2019-09-20 7:18 ` Jean-Philippe Brucker 2019-09-14 14:01 ` Palmer Dabbelt 2019-09-14 14:01 ` Palmer Dabbelt 2019-09-14 14:01 ` Palmer Dabbelt 2019-09-14 14:01 ` Palmer Dabbelt 2019-09-14 14:01 ` Palmer Dabbelt 2019-09-15 5:03 ` Anup Patel 2019-09-15 5:03 ` Anup Patel 2019-09-15 5:03 ` Anup Patel 2019-09-15 5:03 ` Anup Patel 2019-09-15 5:03 ` Anup Patel 2019-09-16 18:18 ` Will Deacon 2019-09-16 18:18 ` Will Deacon 2019-09-16 18:18 ` Will Deacon 2019-09-16 18:18 ` Will Deacon 2019-09-16 18:18 ` Will Deacon 2019-09-16 18:28 ` Palmer Dabbelt 2019-09-16 18:28 ` Palmer Dabbelt 2019-09-16 18:28 ` Palmer Dabbelt 2019-09-16 18:28 ` Palmer Dabbelt 2019-09-16 18:28 ` Palmer Dabbelt 2019-09-17 3:42 ` Anup Patel 2019-09-17 3:42 ` Anup Patel 2019-09-17 3:42 ` Anup Patel 2019-09-17 3:42 ` Anup Patel 2019-09-17 3:42 ` Anup Patel 2019-09-19 13:36 ` Guo Ren 2019-09-19 13:36 ` Guo Ren 2019-09-19 13:36 ` Guo Ren 2019-09-19 13:36 ` Guo Ren 2019-09-19 13:36 ` Guo Ren 2019-06-19 11:51 ` Guo Ren 2019-06-19 11:51 ` Guo Ren 2019-06-19 11:51 ` Guo Ren 2019-06-19 11:51 ` Guo Ren 2019-06-19 12:52 ` Julien Grall 2019-06-19 12:52 ` Julien Grall 2019-06-19 12:52 ` Julien Grall 2019-06-19 12:52 ` Julien Grall 2019-06-21 14:16 ` Catalin Marinas 2019-06-21 14:16 ` Catalin Marinas 2019-06-21 14:16 ` Catalin Marinas 2019-06-21 14:16 ` Catalin Marinas 2019-06-23 16:35 ` Guo Ren 2019-06-23 16:35 ` Guo Ren 2019-06-23 16:35 ` Guo Ren 2019-06-23 16:35 ` Guo Ren 2019-06-24 10:22 ` Will Deacon 2019-06-24 10:22 ` Will Deacon 2019-06-24 10:22 ` Will Deacon 2019-06-24 10:22 ` Will Deacon 2019-06-27 9:41 ` qi.fuli 2019-06-27 9:41 ` qi.fuli 2019-06-27 9:41 ` qi.fuli 2019-06-27 9:41 ` qi.fuli 2019-06-27 10:26 ` Will Deacon 2019-06-27 10:26 ` Will Deacon 2019-06-27 10:26 ` Will Deacon 2019-06-27 10:26 ` Will Deacon 2019-06-24 15:38 ` Catalin Marinas 2019-06-24 15:38 ` Catalin Marinas 2019-06-24 15:38 ` Catalin Marinas 2019-06-24 15:38 ` Catalin Marinas 2019-06-30 4:29 ` Guo Ren 2019-06-30 4:29 ` Guo Ren 2019-06-30 4:29 ` Guo Ren 2019-06-30 4:29 ` Guo Ren 2019-07-01 9:17 ` Catalin Marinas 2019-07-01 9:17 ` Catalin Marinas 2019-07-01 9:17 ` Catalin Marinas 2019-07-01 9:17 ` Catalin Marinas 2019-07-16 3:31 ` Guo Ren 2019-07-16 3:31 ` Guo Ren 2019-07-16 3:31 ` Guo Ren 2019-07-16 3:31 ` Guo Ren 2019-07-22 16:38 ` Catalin Marinas 2019-07-22 16:38 ` Catalin Marinas 2019-07-22 16:38 ` Catalin Marinas 2019-07-22 16:38 ` Catalin Marinas 2019-03-21 16:36 ` Julien Grall [this message] 2019-03-21 16:36 ` [PATCH RFC 12/14] arm64/lib: asid: Allow user to update the context under the lock Julien Grall 2019-03-21 16:36 ` [PATCH RFC 13/14] arm/kvm: Introduce a new VMID allocator Julien Grall 2019-03-21 16:36 ` Julien Grall 2019-03-21 16:36 ` [PATCH RFC 14/14] kvm/arm: Align the VMID allocation with the arm64 ASID one Julien Grall 2019-03-21 16:36 ` Julien Grall 2019-03-21 16:36 ` Julien Grall
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