* [PATCH] Revert "drm/i915: Introduce private PAT management"
@ 2019-03-22 16:20 Michał Winiarski
2019-03-22 16:41 ` Chris Wilson
` (14 more replies)
0 siblings, 15 replies; 17+ messages in thread
From: Michał Winiarski @ 2019-03-22 16:20 UTC (permalink / raw)
To: intel-gfx
This reverts commit 4395890a48551982549d222d1923e2833dac47cf.
It's been over a year since this was merged, and the actual users of
intel_ppat_get / intel_ppat_put never materialized.
Time to remove it!
Fixes: 4395890a4855 ("drm/i915: Introduce private PAT management")
Signed-off-by: Michał Winiarski <michal.winiarski@intel.com>
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Cc: Zhi Wang <zhi.a.wang@intel.com>
---
drivers/gpu/drm/i915/i915_drv.h | 2 -
drivers/gpu/drm/i915/i915_gem_gtt.c | 278 ++++------------------------
drivers/gpu/drm/i915/i915_gem_gtt.h | 36 ----
3 files changed, 40 insertions(+), 276 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index fefcb39aefc4..d29a3f23f80f 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -1656,8 +1656,6 @@ struct drm_i915_private {
DECLARE_HASHTABLE(mm_structs, 7);
struct mutex mm_lock;
- struct intel_ppat ppat;
-
/* Kernel Modesetting */
struct intel_crtc *plane_to_crtc_mapping[I915_MAX_PIPES];
diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c b/drivers/gpu/drm/i915/i915_gem_gtt.c
index b9e0e3a00223..c773fa65b4c6 100644
--- a/drivers/gpu/drm/i915/i915_gem_gtt.c
+++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
@@ -2881,203 +2881,26 @@ static int ggtt_probe_common(struct i915_ggtt *ggtt, u64 size)
return 0;
}
-static struct intel_ppat_entry *
-__alloc_ppat_entry(struct intel_ppat *ppat, unsigned int index, u8 value)
+static void cnl_setup_private_ppat(struct drm_i915_private *dev_priv)
{
- struct intel_ppat_entry *entry = &ppat->entries[index];
-
- GEM_BUG_ON(index >= ppat->max_entries);
- GEM_BUG_ON(test_bit(index, ppat->used));
-
- entry->ppat = ppat;
- entry->value = value;
- kref_init(&entry->ref);
- set_bit(index, ppat->used);
- set_bit(index, ppat->dirty);
-
- return entry;
-}
-
-static void __free_ppat_entry(struct intel_ppat_entry *entry)
-{
- struct intel_ppat *ppat = entry->ppat;
- unsigned int index = entry - ppat->entries;
-
- GEM_BUG_ON(index >= ppat->max_entries);
- GEM_BUG_ON(!test_bit(index, ppat->used));
-
- entry->value = ppat->clear_value;
- clear_bit(index, ppat->used);
- set_bit(index, ppat->dirty);
-}
-
-/**
- * intel_ppat_get - get a usable PPAT entry
- * @i915: i915 device instance
- * @value: the PPAT value required by the caller
- *
- * The function tries to search if there is an existing PPAT entry which
- * matches with the required value. If perfectly matched, the existing PPAT
- * entry will be used. If only partially matched, it will try to check if
- * there is any available PPAT index. If yes, it will allocate a new PPAT
- * index for the required entry and update the HW. If not, the partially
- * matched entry will be used.
- */
-const struct intel_ppat_entry *
-intel_ppat_get(struct drm_i915_private *i915, u8 value)
-{
- struct intel_ppat *ppat = &i915->ppat;
- struct intel_ppat_entry *entry = NULL;
- unsigned int scanned, best_score;
- int i;
-
- GEM_BUG_ON(!ppat->max_entries);
-
- scanned = best_score = 0;
- for_each_set_bit(i, ppat->used, ppat->max_entries) {
- unsigned int score;
-
- score = ppat->match(ppat->entries[i].value, value);
- if (score > best_score) {
- entry = &ppat->entries[i];
- if (score == INTEL_PPAT_PERFECT_MATCH) {
- kref_get(&entry->ref);
- return entry;
- }
- best_score = score;
- }
- scanned++;
- }
-
- if (scanned == ppat->max_entries) {
- if (!entry)
- return ERR_PTR(-ENOSPC);
-
- kref_get(&entry->ref);
- return entry;
- }
-
- i = find_first_zero_bit(ppat->used, ppat->max_entries);
- entry = __alloc_ppat_entry(ppat, i, value);
- ppat->update_hw(i915);
- return entry;
-}
-
-static void release_ppat(struct kref *kref)
-{
- struct intel_ppat_entry *entry =
- container_of(kref, struct intel_ppat_entry, ref);
- struct drm_i915_private *i915 = entry->ppat->i915;
-
- __free_ppat_entry(entry);
- entry->ppat->update_hw(i915);
-}
-
-/**
- * intel_ppat_put - put back the PPAT entry got from intel_ppat_get()
- * @entry: an intel PPAT entry
- *
- * Put back the PPAT entry got from intel_ppat_get(). If the PPAT index of the
- * entry is dynamically allocated, its reference count will be decreased. Once
- * the reference count becomes into zero, the PPAT index becomes free again.
- */
-void intel_ppat_put(const struct intel_ppat_entry *entry)
-{
- struct intel_ppat *ppat = entry->ppat;
- unsigned int index = entry - ppat->entries;
-
- GEM_BUG_ON(!ppat->max_entries);
-
- kref_put(&ppat->entries[index].ref, release_ppat);
-}
-
-static void cnl_private_pat_update_hw(struct drm_i915_private *dev_priv)
-{
- struct intel_ppat *ppat = &dev_priv->ppat;
- int i;
-
- for_each_set_bit(i, ppat->dirty, ppat->max_entries) {
- I915_WRITE(GEN10_PAT_INDEX(i), ppat->entries[i].value);
- clear_bit(i, ppat->dirty);
- }
-}
-
-static void bdw_private_pat_update_hw(struct drm_i915_private *dev_priv)
-{
- struct intel_ppat *ppat = &dev_priv->ppat;
- u64 pat = 0;
- int i;
-
- for (i = 0; i < ppat->max_entries; i++)
- pat |= GEN8_PPAT(i, ppat->entries[i].value);
-
- bitmap_clear(ppat->dirty, 0, ppat->max_entries);
-
- I915_WRITE(GEN8_PRIVATE_PAT_LO, lower_32_bits(pat));
- I915_WRITE(GEN8_PRIVATE_PAT_HI, upper_32_bits(pat));
-}
-
-static unsigned int bdw_private_pat_match(u8 src, u8 dst)
-{
- unsigned int score = 0;
- enum {
- AGE_MATCH = BIT(0),
- TC_MATCH = BIT(1),
- CA_MATCH = BIT(2),
- };
-
- /* Cache attribute has to be matched. */
- if (GEN8_PPAT_GET_CA(src) != GEN8_PPAT_GET_CA(dst))
- return 0;
-
- score |= CA_MATCH;
-
- if (GEN8_PPAT_GET_TC(src) == GEN8_PPAT_GET_TC(dst))
- score |= TC_MATCH;
-
- if (GEN8_PPAT_GET_AGE(src) == GEN8_PPAT_GET_AGE(dst))
- score |= AGE_MATCH;
-
- if (score == (AGE_MATCH | TC_MATCH | CA_MATCH))
- return INTEL_PPAT_PERFECT_MATCH;
-
- return score;
-}
-
-static unsigned int chv_private_pat_match(u8 src, u8 dst)
-{
- return (CHV_PPAT_GET_SNOOP(src) == CHV_PPAT_GET_SNOOP(dst)) ?
- INTEL_PPAT_PERFECT_MATCH : 0;
-}
-
-static void cnl_setup_private_ppat(struct intel_ppat *ppat)
-{
- ppat->max_entries = 8;
- ppat->update_hw = cnl_private_pat_update_hw;
- ppat->match = bdw_private_pat_match;
- ppat->clear_value = GEN8_PPAT_WB | GEN8_PPAT_LLCELLC | GEN8_PPAT_AGE(3);
-
- __alloc_ppat_entry(ppat, 0, GEN8_PPAT_WB | GEN8_PPAT_LLC);
- __alloc_ppat_entry(ppat, 1, GEN8_PPAT_WC | GEN8_PPAT_LLCELLC);
- __alloc_ppat_entry(ppat, 2, GEN8_PPAT_WT | GEN8_PPAT_LLCELLC);
- __alloc_ppat_entry(ppat, 3, GEN8_PPAT_UC);
- __alloc_ppat_entry(ppat, 4, GEN8_PPAT_WB | GEN8_PPAT_LLCELLC | GEN8_PPAT_AGE(0));
- __alloc_ppat_entry(ppat, 5, GEN8_PPAT_WB | GEN8_PPAT_LLCELLC | GEN8_PPAT_AGE(1));
- __alloc_ppat_entry(ppat, 6, GEN8_PPAT_WB | GEN8_PPAT_LLCELLC | GEN8_PPAT_AGE(2));
- __alloc_ppat_entry(ppat, 7, GEN8_PPAT_WB | GEN8_PPAT_LLCELLC | GEN8_PPAT_AGE(3));
+ I915_WRITE(GEN10_PAT_INDEX(0), GEN8_PPAT_WB | GEN8_PPAT_LLC);
+ I915_WRITE(GEN10_PAT_INDEX(1), GEN8_PPAT_WC | GEN8_PPAT_LLCELLC);
+ I915_WRITE(GEN10_PAT_INDEX(2), GEN8_PPAT_WT | GEN8_PPAT_LLCELLC);
+ I915_WRITE(GEN10_PAT_INDEX(3), GEN8_PPAT_UC);
+ I915_WRITE(GEN10_PAT_INDEX(4), GEN8_PPAT_WB | GEN8_PPAT_LLCELLC | GEN8_PPAT_AGE(0));
+ I915_WRITE(GEN10_PAT_INDEX(5), GEN8_PPAT_WB | GEN8_PPAT_LLCELLC | GEN8_PPAT_AGE(1));
+ I915_WRITE(GEN10_PAT_INDEX(6), GEN8_PPAT_WB | GEN8_PPAT_LLCELLC | GEN8_PPAT_AGE(2));
+ I915_WRITE(GEN10_PAT_INDEX(7), GEN8_PPAT_WB | GEN8_PPAT_LLCELLC | GEN8_PPAT_AGE(3));
}
/* The GGTT and PPGTT need a private PPAT setup in order to handle cacheability
* bits. When using advanced contexts each context stores its own PAT, but
* writing this data shouldn't be harmful even in those cases. */
-static void bdw_setup_private_ppat(struct intel_ppat *ppat)
+static void bdw_setup_private_ppat(struct drm_i915_private *dev_priv)
{
- ppat->max_entries = 8;
- ppat->update_hw = bdw_private_pat_update_hw;
- ppat->match = bdw_private_pat_match;
- ppat->clear_value = GEN8_PPAT_WB | GEN8_PPAT_LLCELLC | GEN8_PPAT_AGE(3);
+ u64 pat;
- if (!HAS_PPGTT(ppat->i915)) {
+ if (!HAS_PPGTT(dev_priv)) {
/* Spec: "For GGTT, there is NO pat_sel[2:0] from the entry,
* so RTL will always use the value corresponding to
* pat_sel = 000".
@@ -3091,26 +2914,25 @@ static void bdw_setup_private_ppat(struct intel_ppat *ppat)
* So we can still hold onto all our assumptions wrt cpu
* clflushing on LLC machines.
*/
- __alloc_ppat_entry(ppat, 0, GEN8_PPAT_UC);
- return;
+ pat = GEN8_PPAT(0, GEN8_PPAT_WB | GEN8_PPAT_LLC); /* for normal objects, no eLLC */
}
- __alloc_ppat_entry(ppat, 0, GEN8_PPAT_WB | GEN8_PPAT_LLC); /* for normal objects, no eLLC */
- __alloc_ppat_entry(ppat, 1, GEN8_PPAT_WC | GEN8_PPAT_LLCELLC); /* for something pointing to ptes? */
- __alloc_ppat_entry(ppat, 2, GEN8_PPAT_WT | GEN8_PPAT_LLCELLC); /* for scanout with eLLC */
- __alloc_ppat_entry(ppat, 3, GEN8_PPAT_UC); /* Uncached objects, mostly for scanout */
- __alloc_ppat_entry(ppat, 4, GEN8_PPAT_WB | GEN8_PPAT_LLCELLC | GEN8_PPAT_AGE(0));
- __alloc_ppat_entry(ppat, 5, GEN8_PPAT_WB | GEN8_PPAT_LLCELLC | GEN8_PPAT_AGE(1));
- __alloc_ppat_entry(ppat, 6, GEN8_PPAT_WB | GEN8_PPAT_LLCELLC | GEN8_PPAT_AGE(2));
- __alloc_ppat_entry(ppat, 7, GEN8_PPAT_WB | GEN8_PPAT_LLCELLC | GEN8_PPAT_AGE(3));
+ pat = GEN8_PPAT(0, GEN8_PPAT_WB | GEN8_PPAT_LLC) | /* for normal objects, no eLLC */
+ GEN8_PPAT(1, GEN8_PPAT_WC | GEN8_PPAT_LLCELLC) | /* for something pointing to ptes? */
+ GEN8_PPAT(2, GEN8_PPAT_WT | GEN8_PPAT_LLCELLC) | /* for scanout with eLLC */
+ GEN8_PPAT(3, GEN8_PPAT_UC) | /* Uncached objects, mostly for scanout */
+ GEN8_PPAT(4, GEN8_PPAT_WB | GEN8_PPAT_LLCELLC | GEN8_PPAT_AGE(0)) |
+ GEN8_PPAT(5, GEN8_PPAT_WB | GEN8_PPAT_LLCELLC | GEN8_PPAT_AGE(1)) |
+ GEN8_PPAT(6, GEN8_PPAT_WB | GEN8_PPAT_LLCELLC | GEN8_PPAT_AGE(2)) |
+ GEN8_PPAT(7, GEN8_PPAT_WB | GEN8_PPAT_LLCELLC | GEN8_PPAT_AGE(3));
+
+ I915_WRITE(GEN8_PRIVATE_PAT_LO, lower_32_bits(pat));
+ I915_WRITE(GEN8_PRIVATE_PAT_HI, upper_32_bits(pat));
}
-static void chv_setup_private_ppat(struct intel_ppat *ppat)
+static void chv_setup_private_ppat(struct drm_i915_private *dev_priv)
{
- ppat->max_entries = 8;
- ppat->update_hw = bdw_private_pat_update_hw;
- ppat->match = chv_private_pat_match;
- ppat->clear_value = CHV_PPAT_SNOOP;
+ u64 pat;
/*
* Map WB on BDW to snooped on CHV.
@@ -3131,14 +2953,17 @@ static void chv_setup_private_ppat(struct intel_ppat *ppat)
* in order to keep the global status page working.
*/
- __alloc_ppat_entry(ppat, 0, CHV_PPAT_SNOOP);
- __alloc_ppat_entry(ppat, 1, 0);
- __alloc_ppat_entry(ppat, 2, 0);
- __alloc_ppat_entry(ppat, 3, 0);
- __alloc_ppat_entry(ppat, 4, CHV_PPAT_SNOOP);
- __alloc_ppat_entry(ppat, 5, CHV_PPAT_SNOOP);
- __alloc_ppat_entry(ppat, 6, CHV_PPAT_SNOOP);
- __alloc_ppat_entry(ppat, 7, CHV_PPAT_SNOOP);
+ pat = GEN8_PPAT(0, CHV_PPAT_SNOOP) |
+ GEN8_PPAT(1, 0) |
+ GEN8_PPAT(2, 0) |
+ GEN8_PPAT(3, 0) |
+ GEN8_PPAT(4, CHV_PPAT_SNOOP) |
+ GEN8_PPAT(5, CHV_PPAT_SNOOP) |
+ GEN8_PPAT(6, CHV_PPAT_SNOOP) |
+ GEN8_PPAT(7, CHV_PPAT_SNOOP);
+
+ I915_WRITE(GEN8_PRIVATE_PAT_LO, lower_32_bits(pat));
+ I915_WRITE(GEN8_PRIVATE_PAT_HI, upper_32_bits(pat));
}
static void gen6_gmch_remove(struct i915_address_space *vm)
@@ -3151,27 +2976,12 @@ static void gen6_gmch_remove(struct i915_address_space *vm)
static void setup_private_pat(struct drm_i915_private *dev_priv)
{
- struct intel_ppat *ppat = &dev_priv->ppat;
- int i;
-
- ppat->i915 = dev_priv;
-
if (INTEL_GEN(dev_priv) >= 10)
- cnl_setup_private_ppat(ppat);
+ cnl_setup_private_ppat(dev_priv);
else if (IS_CHERRYVIEW(dev_priv) || IS_GEN9_LP(dev_priv))
- chv_setup_private_ppat(ppat);
+ chv_setup_private_ppat(dev_priv);
else
- bdw_setup_private_ppat(ppat);
-
- GEM_BUG_ON(ppat->max_entries > INTEL_MAX_PPAT_ENTRIES);
-
- for_each_clear_bit(i, ppat->used, ppat->max_entries) {
- ppat->entries[i].value = ppat->clear_value;
- ppat->entries[i].ppat = ppat;
- set_bit(i, ppat->dirty);
- }
-
- ppat->update_hw(dev_priv);
+ bdw_setup_private_ppat(dev_priv);
}
static int gen8_gmch_probe(struct i915_ggtt *ggtt)
@@ -3517,14 +3327,6 @@ void i915_gem_restore_gtt_mappings(struct drm_i915_private *dev_priv)
i915_ggtt_invalidate(dev_priv);
mutex_unlock(&ggtt->vm.mutex);
-
- if (INTEL_GEN(dev_priv) >= 8) {
- struct intel_ppat *ppat = &dev_priv->ppat;
-
- bitmap_set(ppat->dirty, 0, ppat->max_entries);
- dev_priv->ppat.update_hw(dev_priv);
- return;
- }
}
static struct scatterlist *
diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.h b/drivers/gpu/drm/i915/i915_gem_gtt.h
index b76ab4c2a0e6..e260bd81702e 100644
--- a/drivers/gpu/drm/i915/i915_gem_gtt.h
+++ b/drivers/gpu/drm/i915/i915_gem_gtt.h
@@ -153,11 +153,6 @@ typedef u64 gen8_ppgtt_pml4e_t;
#define GEN8_PPAT_ELLC_OVERRIDE (0<<2)
#define GEN8_PPAT(i, x) ((u64)(x) << ((i) * 8))
-#define GEN8_PPAT_GET_CA(x) ((x) & 3)
-#define GEN8_PPAT_GET_TC(x) ((x) & (3 << 2))
-#define GEN8_PPAT_GET_AGE(x) ((x) & (3 << 4))
-#define CHV_PPAT_GET_SNOOP(x) ((x) & (1 << 6))
-
#define GEN8_PDE_IPS_64K BIT(11)
#define GEN8_PDE_PS_2M BIT(7)
@@ -560,37 +555,6 @@ i915_vm_to_ggtt(struct i915_address_space *vm)
return container_of(vm, struct i915_ggtt, vm);
}
-#define INTEL_MAX_PPAT_ENTRIES 8
-#define INTEL_PPAT_PERFECT_MATCH (~0U)
-
-struct intel_ppat;
-
-struct intel_ppat_entry {
- struct intel_ppat *ppat;
- struct kref ref;
- u8 value;
-};
-
-struct intel_ppat {
- struct intel_ppat_entry entries[INTEL_MAX_PPAT_ENTRIES];
- DECLARE_BITMAP(used, INTEL_MAX_PPAT_ENTRIES);
- DECLARE_BITMAP(dirty, INTEL_MAX_PPAT_ENTRIES);
- unsigned int max_entries;
- u8 clear_value;
- /*
- * Return a score to show how two PPAT values match,
- * a INTEL_PPAT_PERFECT_MATCH indicates a perfect match
- */
- unsigned int (*match)(u8 src, u8 dst);
- void (*update_hw)(struct drm_i915_private *i915);
-
- struct drm_i915_private *i915;
-};
-
-const struct intel_ppat_entry *
-intel_ppat_get(struct drm_i915_private *i915, u8 value);
-void intel_ppat_put(const struct intel_ppat_entry *entry);
-
int i915_gem_init_aliasing_ppgtt(struct drm_i915_private *i915);
void i915_gem_fini_aliasing_ppgtt(struct drm_i915_private *i915);
--
2.20.1
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https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 17+ messages in thread
* Re: [PATCH] Revert "drm/i915: Introduce private PAT management"
2019-03-22 16:20 [PATCH] Revert "drm/i915: Introduce private PAT management" Michał Winiarski
@ 2019-03-22 16:41 ` Chris Wilson
2019-03-22 16:49 ` ✗ Fi.CI.CHECKPATCH: warning for " Patchwork
` (13 subsequent siblings)
14 siblings, 0 replies; 17+ messages in thread
From: Chris Wilson @ 2019-03-22 16:41 UTC (permalink / raw)
To: Michał Winiarski, intel-gfx
Quoting Michał Winiarski (2019-03-22 16:20:37)
> This reverts commit 4395890a48551982549d222d1923e2833dac47cf.
>
> It's been over a year since this was merged, and the actual users of
> intel_ppat_get / intel_ppat_put never materialized.
>
> Time to remove it!
>
> Fixes: 4395890a4855 ("drm/i915: Introduce private PAT management")
> Signed-off-by: Michał Winiarski <michal.winiarski@intel.com>
> Cc: Chris Wilson <chris@chris-wilson.co.uk>
> Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
> Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
> Cc: Zhi Wang <zhi.a.wang@intel.com>
All the magic numbers seem to be intact,
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
-Chris
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^ permalink raw reply [flat|nested] 17+ messages in thread
* ✗ Fi.CI.CHECKPATCH: warning for Revert "drm/i915: Introduce private PAT management"
2019-03-22 16:20 [PATCH] Revert "drm/i915: Introduce private PAT management" Michał Winiarski
2019-03-22 16:41 ` Chris Wilson
@ 2019-03-22 16:49 ` Patchwork
2019-03-22 16:50 ` ✗ Fi.CI.SPARSE: " Patchwork
` (12 subsequent siblings)
14 siblings, 0 replies; 17+ messages in thread
From: Patchwork @ 2019-03-22 16:49 UTC (permalink / raw)
To: Michał Winiarski; +Cc: intel-gfx
== Series Details ==
Series: Revert "drm/i915: Introduce private PAT management"
URL : https://patchwork.freedesktop.org/series/58421/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
a3e8095440a5 Revert "drm/i915: Introduce private PAT management"
-:275: WARNING:LONG_LINE_COMMENT: line over 100 characters
#275: FILE: drivers/gpu/drm/i915/i915_gem_gtt.c:2928:
+ GEN8_PPAT(1, GEN8_PPAT_WC | GEN8_PPAT_LLCELLC) | /* for something pointing to ptes? */
-:277: WARNING:LONG_LINE_COMMENT: line over 100 characters
#277: FILE: drivers/gpu/drm/i915/i915_gem_gtt.c:2930:
+ GEN8_PPAT(3, GEN8_PPAT_UC) | /* Uncached objects, mostly for scanout */
total: 0 errors, 2 warnings, 0 checks, 380 lines checked
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^ permalink raw reply [flat|nested] 17+ messages in thread
* ✗ Fi.CI.SPARSE: warning for Revert "drm/i915: Introduce private PAT management"
2019-03-22 16:20 [PATCH] Revert "drm/i915: Introduce private PAT management" Michał Winiarski
2019-03-22 16:41 ` Chris Wilson
2019-03-22 16:49 ` ✗ Fi.CI.CHECKPATCH: warning for " Patchwork
@ 2019-03-22 16:50 ` Patchwork
2019-03-22 17:11 ` ✗ Fi.CI.BAT: failure " Patchwork
` (11 subsequent siblings)
14 siblings, 0 replies; 17+ messages in thread
From: Patchwork @ 2019-03-22 16:50 UTC (permalink / raw)
To: Michał Winiarski; +Cc: intel-gfx
== Series Details ==
Series: Revert "drm/i915: Introduce private PAT management"
URL : https://patchwork.freedesktop.org/series/58421/
State : warning
== Summary ==
$ dim sparse origin/drm-tip
Sparse version: v0.5.2
Commit: Revert "drm/i915: Introduce private PAT management"
-drivers/gpu/drm/i915/i915_gem_gtt.c:348:14: warning: expression using sizeof(void)
-drivers/gpu/drm/i915/i915_gem_gtt.c:348:14: warning: expression using sizeof(void)
+drivers/gpu/drm/i915/i915_gem_gtt.c:348:14: warning: expression using sizeof(void)
+drivers/gpu/drm/i915/i915_gem_gtt.c:348:14: warning: expression using sizeof(void)
-drivers/gpu/drm/i915/selftests/../i915_drv.h:3575:16: warning: expression using sizeof(void)
+drivers/gpu/drm/i915/selftests/../i915_drv.h:3573:16: warning: expression using sizeof(void)
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Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 17+ messages in thread
* ✗ Fi.CI.BAT: failure for Revert "drm/i915: Introduce private PAT management"
2019-03-22 16:20 [PATCH] Revert "drm/i915: Introduce private PAT management" Michał Winiarski
` (2 preceding siblings ...)
2019-03-22 16:50 ` ✗ Fi.CI.SPARSE: " Patchwork
@ 2019-03-22 17:11 ` Patchwork
2019-03-24 13:11 ` ✗ Fi.CI.CHECKPATCH: warning for Revert "drm/i915: Introduce private PAT management" (rev2) Patchwork
` (10 subsequent siblings)
14 siblings, 0 replies; 17+ messages in thread
From: Patchwork @ 2019-03-22 17:11 UTC (permalink / raw)
To: Michał Winiarski; +Cc: intel-gfx
== Series Details ==
Series: Revert "drm/i915: Introduce private PAT management"
URL : https://patchwork.freedesktop.org/series/58421/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_5795 -> Patchwork_12575
====================================================
Summary
-------
**FAILURE**
Serious unknown changes coming with Patchwork_12575 absolutely need to be
verified manually.
If you think the reported changes have nothing to do with the changes
introduced in Patchwork_12575, please notify your bug team to allow them
to document this new failure mode, which will reduce false positives in CI.
External URL: https://patchwork.freedesktop.org/api/1.0/series/58421/revisions/1/mbox/
Possible new issues
-------------------
Here are the unknown changes that may have been introduced in Patchwork_12575:
### IGT changes ###
#### Possible regressions ####
* igt@gem_exec_suspend@basic-s3:
- fi-bsw-kefka: NOTRUN -> TIMEOUT
- fi-bsw-n3050: NOTRUN -> TIMEOUT
* igt@gem_exec_suspend@basic-s4-devices:
- fi-bxt-j4205: PASS -> TIMEOUT
* igt@gem_render_tiled_blits@basic:
- fi-apl-guc: PASS -> FAIL
* igt@gem_ringfill@basic-default-interruptible:
- fi-bsw-kefka: NOTRUN -> FAIL +6
* igt@gem_sync@basic-all:
- fi-bxt-j4205: PASS -> FAIL +3
* igt@kms_frontbuffer_tracking@basic:
- fi-bsw-n3050: NOTRUN -> FAIL +9
Known issues
------------
Here are the changes found in Patchwork_12575 that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@amdgpu/amd_basic@cs-compute:
- fi-kbl-8809g: NOTRUN -> FAIL [fdo#108094]
* igt@amdgpu/amd_basic@query-info:
- fi-bsw-kefka: NOTRUN -> SKIP [fdo#109271] +56
* igt@amdgpu/amd_cs_nop@sync-fork-compute0:
- fi-icl-u3: NOTRUN -> SKIP [fdo#109315] +17
* igt@gem_exec_basic@basic-bsd2:
- fi-icl-u3: NOTRUN -> SKIP [fdo#109276] +7
* igt@gem_exec_basic@gtt-bsd:
- fi-bwr-2160: NOTRUN -> SKIP [fdo#109271] +103
* igt@gem_exec_basic@readonly-bsd:
- fi-pnv-d510: NOTRUN -> SKIP [fdo#109271] +76
* igt@gem_exec_basic@readonly-bsd1:
- fi-snb-2520m: NOTRUN -> SKIP [fdo#109271] +57
* igt@gem_exec_gttfill@basic:
- fi-skl-gvtdvm: NOTRUN -> SKIP [fdo#109271] +41
* igt@gem_exec_parse@basic-rejected:
- fi-icl-u3: NOTRUN -> SKIP [fdo#109289] +1
* igt@gem_exec_suspend@basic-s3:
- fi-icl-u3: NOTRUN -> FAIL [fdo#103375]
* igt@i915_selftest@live_contexts:
- fi-icl-u3: NOTRUN -> DMESG-FAIL [fdo#108569]
* igt@i915_selftest@live_evict:
- fi-bsw-kefka: NOTRUN -> DMESG-WARN [fdo#107709]
* igt@i915_selftest@live_uncore:
- fi-ivb-3770: PASS -> DMESG-FAIL [fdo#110210]
* igt@kms_busy@basic-flip-a:
- fi-bsw-n3050: NOTRUN -> SKIP [fdo#109271] / [fdo#109278] +1
* igt@kms_busy@basic-flip-c:
- fi-bwr-2160: NOTRUN -> SKIP [fdo#109271] / [fdo#109278]
- fi-bsw-kefka: NOTRUN -> SKIP [fdo#109271] / [fdo#109278]
- fi-pnv-d510: NOTRUN -> SKIP [fdo#109271] / [fdo#109278]
- fi-snb-2520m: NOTRUN -> SKIP [fdo#109271] / [fdo#109278]
* igt@kms_chamelium@hdmi-crc-fast:
- fi-bsw-n3050: NOTRUN -> SKIP [fdo#109271] +63
- fi-icl-u3: NOTRUN -> SKIP [fdo#109284] +8
* igt@kms_force_connector_basic@force-edid:
- fi-kbl-x1275: NOTRUN -> SKIP [fdo#109271] +45
- fi-icl-u3: NOTRUN -> SKIP [fdo#109285] +3
* igt@kms_frontbuffer_tracking@basic:
- fi-icl-u2: PASS -> FAIL [fdo#103167]
- fi-bdw-gvtdvm: PASS -> FAIL [fdo#103167]
- fi-bdw-5557u: PASS -> FAIL [fdo#103167]
* igt@runner@aborted:
- fi-bsw-kefka: NOTRUN -> FAIL [fdo#107709]
#### Possible fixes ####
* igt@amdgpu/amd_basic@userptr:
- fi-kbl-8809g: DMESG-WARN [fdo#108965] -> PASS
#### Warnings ####
* igt@i915_selftest@live_contexts:
- fi-icl-u2: DMESG-FAIL [fdo#108569] -> INCOMPLETE [fdo#108569]
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[fdo#103167]: https://bugs.freedesktop.org/show_bug.cgi?id=103167
[fdo#103375]: https://bugs.freedesktop.org/show_bug.cgi?id=103375
[fdo#107709]: https://bugs.freedesktop.org/show_bug.cgi?id=107709
[fdo#108094]: https://bugs.freedesktop.org/show_bug.cgi?id=108094
[fdo#108569]: https://bugs.freedesktop.org/show_bug.cgi?id=108569
[fdo#108965]: https://bugs.freedesktop.org/show_bug.cgi?id=108965
[fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
[fdo#109276]: https://bugs.freedesktop.org/show_bug.cgi?id=109276
[fdo#109278]: https://bugs.freedesktop.org/show_bug.cgi?id=109278
[fdo#109284]: https://bugs.freedesktop.org/show_bug.cgi?id=109284
[fdo#109285]: https://bugs.freedesktop.org/show_bug.cgi?id=109285
[fdo#109289]: https://bugs.freedesktop.org/show_bug.cgi?id=109289
[fdo#109315]: https://bugs.freedesktop.org/show_bug.cgi?id=109315
[fdo#110210]: https://bugs.freedesktop.org/show_bug.cgi?id=110210
Participating hosts (33 -> 34)
------------------------------
Additional (9): fi-skl-gvtdvm fi-bsw-n3050 fi-bwr-2160 fi-snb-2520m fi-kbl-x1275 fi-icl-u3 fi-pnv-d510 fi-bsw-kefka fi-skl-lmem
Missing (8): fi-kbl-soraka fi-kbl-7567u fi-ilk-m540 fi-hsw-4200u fi-bsw-cyan fi-ctg-p8600 fi-hsw-4770 fi-bdw-samus
Build changes
-------------
* Linux: CI_DRM_5795 -> Patchwork_12575
CI_DRM_5795: 9b13e20521f1b66a20161bd3afd6727f383db604 @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_4899: ba96339c238180b38d05d7fa2dca772d49eee332 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_12575: a3e8095440a591d0b82dd15c8244723844415c7f @ git://anongit.freedesktop.org/gfx-ci/linux
== Linux commits ==
a3e8095440a5 Revert "drm/i915: Introduce private PAT management"
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12575/
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 17+ messages in thread
* ✗ Fi.CI.CHECKPATCH: warning for Revert "drm/i915: Introduce private PAT management" (rev2)
2019-03-22 16:20 [PATCH] Revert "drm/i915: Introduce private PAT management" Michał Winiarski
` (3 preceding siblings ...)
2019-03-22 17:11 ` ✗ Fi.CI.BAT: failure " Patchwork
@ 2019-03-24 13:11 ` Patchwork
2019-03-24 13:12 ` ✗ Fi.CI.SPARSE: " Patchwork
` (9 subsequent siblings)
14 siblings, 0 replies; 17+ messages in thread
From: Patchwork @ 2019-03-24 13:11 UTC (permalink / raw)
To: Michał Winiarski; +Cc: intel-gfx
== Series Details ==
Series: Revert "drm/i915: Introduce private PAT management" (rev2)
URL : https://patchwork.freedesktop.org/series/58421/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
edd034bae76b Revert "drm/i915: Introduce private PAT management"
-:275: WARNING:LONG_LINE_COMMENT: line over 100 characters
#275: FILE: drivers/gpu/drm/i915/i915_gem_gtt.c:2928:
+ GEN8_PPAT(1, GEN8_PPAT_WC | GEN8_PPAT_LLCELLC) | /* for something pointing to ptes? */
-:277: WARNING:LONG_LINE_COMMENT: line over 100 characters
#277: FILE: drivers/gpu/drm/i915/i915_gem_gtt.c:2930:
+ GEN8_PPAT(3, GEN8_PPAT_UC) | /* Uncached objects, mostly for scanout */
total: 0 errors, 2 warnings, 0 checks, 380 lines checked
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 17+ messages in thread
* ✗ Fi.CI.SPARSE: warning for Revert "drm/i915: Introduce private PAT management" (rev2)
2019-03-22 16:20 [PATCH] Revert "drm/i915: Introduce private PAT management" Michał Winiarski
` (4 preceding siblings ...)
2019-03-24 13:11 ` ✗ Fi.CI.CHECKPATCH: warning for Revert "drm/i915: Introduce private PAT management" (rev2) Patchwork
@ 2019-03-24 13:12 ` Patchwork
2019-03-24 13:39 ` ✗ Fi.CI.BAT: failure " Patchwork
` (8 subsequent siblings)
14 siblings, 0 replies; 17+ messages in thread
From: Patchwork @ 2019-03-24 13:12 UTC (permalink / raw)
To: Michał Winiarski; +Cc: intel-gfx
== Series Details ==
Series: Revert "drm/i915: Introduce private PAT management" (rev2)
URL : https://patchwork.freedesktop.org/series/58421/
State : warning
== Summary ==
$ dim sparse origin/drm-tip
Sparse version: v0.5.2
Commit: Revert "drm/i915: Introduce private PAT management"
-drivers/gpu/drm/i915/i915_gem_gtt.c:348:14: warning: expression using sizeof(void)
-drivers/gpu/drm/i915/i915_gem_gtt.c:348:14: warning: expression using sizeof(void)
+drivers/gpu/drm/i915/i915_gem_gtt.c:348:14: warning: expression using sizeof(void)
+drivers/gpu/drm/i915/i915_gem_gtt.c:348:14: warning: expression using sizeof(void)
-drivers/gpu/drm/i915/selftests/../i915_drv.h:3576:16: warning: expression using sizeof(void)
+drivers/gpu/drm/i915/selftests/../i915_drv.h:3574:16: warning: expression using sizeof(void)
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 17+ messages in thread
* ✗ Fi.CI.BAT: failure for Revert "drm/i915: Introduce private PAT management" (rev2)
2019-03-22 16:20 [PATCH] Revert "drm/i915: Introduce private PAT management" Michał Winiarski
` (5 preceding siblings ...)
2019-03-24 13:12 ` ✗ Fi.CI.SPARSE: " Patchwork
@ 2019-03-24 13:39 ` Patchwork
2019-03-24 13:47 ` [PATCH] Revert "drm/i915: Introduce private PAT management" Chris Wilson
` (7 subsequent siblings)
14 siblings, 0 replies; 17+ messages in thread
From: Patchwork @ 2019-03-24 13:39 UTC (permalink / raw)
To: Michał Winiarski; +Cc: intel-gfx
== Series Details ==
Series: Revert "drm/i915: Introduce private PAT management" (rev2)
URL : https://patchwork.freedesktop.org/series/58421/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_5802 -> Patchwork_12584
====================================================
Summary
-------
**FAILURE**
Serious unknown changes coming with Patchwork_12584 absolutely need to be
verified manually.
If you think the reported changes have nothing to do with the changes
introduced in Patchwork_12584, please notify your bug team to allow them
to document this new failure mode, which will reduce false positives in CI.
External URL: https://patchwork.freedesktop.org/api/1.0/series/58421/revisions/2/mbox/
Possible new issues
-------------------
Here are the unknown changes that may have been introduced in Patchwork_12584:
### IGT changes ###
#### Possible regressions ####
* igt@gem_exec_suspend@basic-s3:
- fi-bsw-kefka: PASS -> TIMEOUT +1
* igt@kms_cursor_legacy@basic-busy-flip-before-cursor-legacy:
- fi-bsw-kefka: PASS -> FAIL +6
Known issues
------------
Here are the changes found in Patchwork_12584 that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@gem_ringfill@basic-default-interruptible:
- fi-bsw-kefka: PASS -> SKIP [fdo#109271]
* igt@i915_selftest@live_hangcheck:
- fi-skl-iommu: PASS -> INCOMPLETE [fdo#108602] / [fdo#108744]
* igt@runner@aborted:
- fi-skl-iommu: NOTRUN -> FAIL [fdo#104108] / [fdo#108602]
#### Possible fixes ####
* igt@i915_selftest@live_contexts:
- fi-skl-gvtdvm: DMESG-FAIL -> PASS
[fdo#104108]: https://bugs.freedesktop.org/show_bug.cgi?id=104108
[fdo#108602]: https://bugs.freedesktop.org/show_bug.cgi?id=108602
[fdo#108744]: https://bugs.freedesktop.org/show_bug.cgi?id=108744
[fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
Participating hosts (39 -> 13)
------------------------------
ERROR: It appears as if the changes made in Patchwork_12584 prevented too many machines from booting.
Missing (26): fi-kbl-soraka fi-skl-6770hq fi-bdw-gvtdvm fi-apl-guc fi-bxt-j4205 fi-icl-u3 fi-skl-lmem fi-byt-n2820 fi-bxt-dsi fi-bdw-5557u fi-bsw-n3050 fi-byt-j1900 fi-bwr-2160 fi-ilk-650 fi-hsw-4770 fi-ivb-3770 fi-skl-6700k2 fi-ilk-m540 fi-cfl-8700k fi-hsw-4200u fi-byt-squawks fi-cfl-guc fi-kbl-guc fi-kbl-x1275 fi-cfl-8109u fi-kbl-8809g
Build changes
-------------
* Linux: CI_DRM_5802 -> Patchwork_12584
CI_DRM_5802: 4a20c1b9790798f7bb44cc28e42e2377304ea2fe @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_4900: 09796413394c5490c4adfc5cded5d4344af6af17 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_12584: edd034bae76b9860cbae714d578c0862a45183a7 @ git://anongit.freedesktop.org/gfx-ci/linux
== Linux commits ==
edd034bae76b Revert "drm/i915: Introduce private PAT management"
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12584/
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 17+ messages in thread
* Re: [PATCH] Revert "drm/i915: Introduce private PAT management"
2019-03-22 16:20 [PATCH] Revert "drm/i915: Introduce private PAT management" Michał Winiarski
` (6 preceding siblings ...)
2019-03-24 13:39 ` ✗ Fi.CI.BAT: failure " Patchwork
@ 2019-03-24 13:47 ` Chris Wilson
2019-03-25 11:49 ` Michał Winiarski
2019-03-25 11:49 ` [PATCH v2] " Michał Winiarski
` (6 subsequent siblings)
14 siblings, 1 reply; 17+ messages in thread
From: Chris Wilson @ 2019-03-24 13:47 UTC (permalink / raw)
To: Michał Winiarski, intel-gfx
Quoting Michał Winiarski (2019-03-22 16:20:37)
> static int gen8_gmch_probe(struct i915_ggtt *ggtt)
> @@ -3517,14 +3327,6 @@ void i915_gem_restore_gtt_mappings(struct drm_i915_private *dev_priv)
> i915_ggtt_invalidate(dev_priv);
>
> mutex_unlock(&ggtt->vm.mutex);
> -
> - if (INTEL_GEN(dev_priv) >= 8) {
> - struct intel_ppat *ppat = &dev_priv->ppat;
> -
> - bitmap_set(ppat->dirty, 0, ppat->max_entries);
> - dev_priv->ppat.update_hw(dev_priv);
Missed on the first pass, do we need to keep the restore, i.e. call
setup_private_pat() again?
-Chris
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 17+ messages in thread
* Re: [PATCH] Revert "drm/i915: Introduce private PAT management"
2019-03-24 13:47 ` [PATCH] Revert "drm/i915: Introduce private PAT management" Chris Wilson
@ 2019-03-25 11:49 ` Michał Winiarski
0 siblings, 0 replies; 17+ messages in thread
From: Michał Winiarski @ 2019-03-25 11:49 UTC (permalink / raw)
To: Chris Wilson; +Cc: intel-gfx
On Sun, Mar 24, 2019 at 01:47:08PM +0000, Chris Wilson wrote:
> Quoting Michał Winiarski (2019-03-22 16:20:37)
> > static int gen8_gmch_probe(struct i915_ggtt *ggtt)
> > @@ -3517,14 +3327,6 @@ void i915_gem_restore_gtt_mappings(struct drm_i915_private *dev_priv)
> > i915_ggtt_invalidate(dev_priv);
> >
> > mutex_unlock(&ggtt->vm.mutex);
> > -
> > - if (INTEL_GEN(dev_priv) >= 8) {
> > - struct intel_ppat *ppat = &dev_priv->ppat;
> > -
> > - bitmap_set(ppat->dirty, 0, ppat->max_entries);
> > - dev_priv->ppat.update_hw(dev_priv);
>
> Missed on the first pass, do we need to keep the restore, i.e. call
> setup_private_pat() again?
Yeah, we do, fortunately CI caught it.
Sending v2.
-Michał
> -Chris
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 17+ messages in thread
* [PATCH v2] Revert "drm/i915: Introduce private PAT management"
2019-03-22 16:20 [PATCH] Revert "drm/i915: Introduce private PAT management" Michał Winiarski
` (7 preceding siblings ...)
2019-03-24 13:47 ` [PATCH] Revert "drm/i915: Introduce private PAT management" Chris Wilson
@ 2019-03-25 11:49 ` Michał Winiarski
2019-03-25 12:35 ` ✗ Fi.CI.CHECKPATCH: warning for Revert "drm/i915: Introduce private PAT management" (rev3) Patchwork
` (5 subsequent siblings)
14 siblings, 0 replies; 17+ messages in thread
From: Michał Winiarski @ 2019-03-25 11:49 UTC (permalink / raw)
To: intel-gfx
This reverts commit 4395890a48551982549d222d1923e2833dac47cf.
It's been over a year since this was merged, and the actual users of
intel_ppat_get / intel_ppat_put never materialized.
Time to remove it!
v2: Unbreak suspend (Chris)
Fixes: 4395890a4855 ("drm/i915: Introduce private PAT management")
Signed-off-by: Michał Winiarski <michal.winiarski@intel.com>
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Cc: Zhi Wang <zhi.a.wang@intel.com>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
---
drivers/gpu/drm/i915/i915_drv.h | 2 -
drivers/gpu/drm/i915/i915_gem_gtt.c | 279 +++++-----------------------
drivers/gpu/drm/i915/i915_gem_gtt.h | 36 ----
3 files changed, 42 insertions(+), 275 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index fefcb39aefc4..d29a3f23f80f 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -1656,8 +1656,6 @@ struct drm_i915_private {
DECLARE_HASHTABLE(mm_structs, 7);
struct mutex mm_lock;
- struct intel_ppat ppat;
-
/* Kernel Modesetting */
struct intel_crtc *plane_to_crtc_mapping[I915_MAX_PIPES];
diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c b/drivers/gpu/drm/i915/i915_gem_gtt.c
index b9e0e3a00223..34e87697116b 100644
--- a/drivers/gpu/drm/i915/i915_gem_gtt.c
+++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
@@ -2881,203 +2881,26 @@ static int ggtt_probe_common(struct i915_ggtt *ggtt, u64 size)
return 0;
}
-static struct intel_ppat_entry *
-__alloc_ppat_entry(struct intel_ppat *ppat, unsigned int index, u8 value)
+static void cnl_setup_private_ppat(struct drm_i915_private *dev_priv)
{
- struct intel_ppat_entry *entry = &ppat->entries[index];
-
- GEM_BUG_ON(index >= ppat->max_entries);
- GEM_BUG_ON(test_bit(index, ppat->used));
-
- entry->ppat = ppat;
- entry->value = value;
- kref_init(&entry->ref);
- set_bit(index, ppat->used);
- set_bit(index, ppat->dirty);
-
- return entry;
-}
-
-static void __free_ppat_entry(struct intel_ppat_entry *entry)
-{
- struct intel_ppat *ppat = entry->ppat;
- unsigned int index = entry - ppat->entries;
-
- GEM_BUG_ON(index >= ppat->max_entries);
- GEM_BUG_ON(!test_bit(index, ppat->used));
-
- entry->value = ppat->clear_value;
- clear_bit(index, ppat->used);
- set_bit(index, ppat->dirty);
-}
-
-/**
- * intel_ppat_get - get a usable PPAT entry
- * @i915: i915 device instance
- * @value: the PPAT value required by the caller
- *
- * The function tries to search if there is an existing PPAT entry which
- * matches with the required value. If perfectly matched, the existing PPAT
- * entry will be used. If only partially matched, it will try to check if
- * there is any available PPAT index. If yes, it will allocate a new PPAT
- * index for the required entry and update the HW. If not, the partially
- * matched entry will be used.
- */
-const struct intel_ppat_entry *
-intel_ppat_get(struct drm_i915_private *i915, u8 value)
-{
- struct intel_ppat *ppat = &i915->ppat;
- struct intel_ppat_entry *entry = NULL;
- unsigned int scanned, best_score;
- int i;
-
- GEM_BUG_ON(!ppat->max_entries);
-
- scanned = best_score = 0;
- for_each_set_bit(i, ppat->used, ppat->max_entries) {
- unsigned int score;
-
- score = ppat->match(ppat->entries[i].value, value);
- if (score > best_score) {
- entry = &ppat->entries[i];
- if (score == INTEL_PPAT_PERFECT_MATCH) {
- kref_get(&entry->ref);
- return entry;
- }
- best_score = score;
- }
- scanned++;
- }
-
- if (scanned == ppat->max_entries) {
- if (!entry)
- return ERR_PTR(-ENOSPC);
-
- kref_get(&entry->ref);
- return entry;
- }
-
- i = find_first_zero_bit(ppat->used, ppat->max_entries);
- entry = __alloc_ppat_entry(ppat, i, value);
- ppat->update_hw(i915);
- return entry;
-}
-
-static void release_ppat(struct kref *kref)
-{
- struct intel_ppat_entry *entry =
- container_of(kref, struct intel_ppat_entry, ref);
- struct drm_i915_private *i915 = entry->ppat->i915;
-
- __free_ppat_entry(entry);
- entry->ppat->update_hw(i915);
-}
-
-/**
- * intel_ppat_put - put back the PPAT entry got from intel_ppat_get()
- * @entry: an intel PPAT entry
- *
- * Put back the PPAT entry got from intel_ppat_get(). If the PPAT index of the
- * entry is dynamically allocated, its reference count will be decreased. Once
- * the reference count becomes into zero, the PPAT index becomes free again.
- */
-void intel_ppat_put(const struct intel_ppat_entry *entry)
-{
- struct intel_ppat *ppat = entry->ppat;
- unsigned int index = entry - ppat->entries;
-
- GEM_BUG_ON(!ppat->max_entries);
-
- kref_put(&ppat->entries[index].ref, release_ppat);
-}
-
-static void cnl_private_pat_update_hw(struct drm_i915_private *dev_priv)
-{
- struct intel_ppat *ppat = &dev_priv->ppat;
- int i;
-
- for_each_set_bit(i, ppat->dirty, ppat->max_entries) {
- I915_WRITE(GEN10_PAT_INDEX(i), ppat->entries[i].value);
- clear_bit(i, ppat->dirty);
- }
-}
-
-static void bdw_private_pat_update_hw(struct drm_i915_private *dev_priv)
-{
- struct intel_ppat *ppat = &dev_priv->ppat;
- u64 pat = 0;
- int i;
-
- for (i = 0; i < ppat->max_entries; i++)
- pat |= GEN8_PPAT(i, ppat->entries[i].value);
-
- bitmap_clear(ppat->dirty, 0, ppat->max_entries);
-
- I915_WRITE(GEN8_PRIVATE_PAT_LO, lower_32_bits(pat));
- I915_WRITE(GEN8_PRIVATE_PAT_HI, upper_32_bits(pat));
-}
-
-static unsigned int bdw_private_pat_match(u8 src, u8 dst)
-{
- unsigned int score = 0;
- enum {
- AGE_MATCH = BIT(0),
- TC_MATCH = BIT(1),
- CA_MATCH = BIT(2),
- };
-
- /* Cache attribute has to be matched. */
- if (GEN8_PPAT_GET_CA(src) != GEN8_PPAT_GET_CA(dst))
- return 0;
-
- score |= CA_MATCH;
-
- if (GEN8_PPAT_GET_TC(src) == GEN8_PPAT_GET_TC(dst))
- score |= TC_MATCH;
-
- if (GEN8_PPAT_GET_AGE(src) == GEN8_PPAT_GET_AGE(dst))
- score |= AGE_MATCH;
-
- if (score == (AGE_MATCH | TC_MATCH | CA_MATCH))
- return INTEL_PPAT_PERFECT_MATCH;
-
- return score;
-}
-
-static unsigned int chv_private_pat_match(u8 src, u8 dst)
-{
- return (CHV_PPAT_GET_SNOOP(src) == CHV_PPAT_GET_SNOOP(dst)) ?
- INTEL_PPAT_PERFECT_MATCH : 0;
-}
-
-static void cnl_setup_private_ppat(struct intel_ppat *ppat)
-{
- ppat->max_entries = 8;
- ppat->update_hw = cnl_private_pat_update_hw;
- ppat->match = bdw_private_pat_match;
- ppat->clear_value = GEN8_PPAT_WB | GEN8_PPAT_LLCELLC | GEN8_PPAT_AGE(3);
-
- __alloc_ppat_entry(ppat, 0, GEN8_PPAT_WB | GEN8_PPAT_LLC);
- __alloc_ppat_entry(ppat, 1, GEN8_PPAT_WC | GEN8_PPAT_LLCELLC);
- __alloc_ppat_entry(ppat, 2, GEN8_PPAT_WT | GEN8_PPAT_LLCELLC);
- __alloc_ppat_entry(ppat, 3, GEN8_PPAT_UC);
- __alloc_ppat_entry(ppat, 4, GEN8_PPAT_WB | GEN8_PPAT_LLCELLC | GEN8_PPAT_AGE(0));
- __alloc_ppat_entry(ppat, 5, GEN8_PPAT_WB | GEN8_PPAT_LLCELLC | GEN8_PPAT_AGE(1));
- __alloc_ppat_entry(ppat, 6, GEN8_PPAT_WB | GEN8_PPAT_LLCELLC | GEN8_PPAT_AGE(2));
- __alloc_ppat_entry(ppat, 7, GEN8_PPAT_WB | GEN8_PPAT_LLCELLC | GEN8_PPAT_AGE(3));
+ I915_WRITE(GEN10_PAT_INDEX(0), GEN8_PPAT_WB | GEN8_PPAT_LLC);
+ I915_WRITE(GEN10_PAT_INDEX(1), GEN8_PPAT_WC | GEN8_PPAT_LLCELLC);
+ I915_WRITE(GEN10_PAT_INDEX(2), GEN8_PPAT_WT | GEN8_PPAT_LLCELLC);
+ I915_WRITE(GEN10_PAT_INDEX(3), GEN8_PPAT_UC);
+ I915_WRITE(GEN10_PAT_INDEX(4), GEN8_PPAT_WB | GEN8_PPAT_LLCELLC | GEN8_PPAT_AGE(0));
+ I915_WRITE(GEN10_PAT_INDEX(5), GEN8_PPAT_WB | GEN8_PPAT_LLCELLC | GEN8_PPAT_AGE(1));
+ I915_WRITE(GEN10_PAT_INDEX(6), GEN8_PPAT_WB | GEN8_PPAT_LLCELLC | GEN8_PPAT_AGE(2));
+ I915_WRITE(GEN10_PAT_INDEX(7), GEN8_PPAT_WB | GEN8_PPAT_LLCELLC | GEN8_PPAT_AGE(3));
}
/* The GGTT and PPGTT need a private PPAT setup in order to handle cacheability
* bits. When using advanced contexts each context stores its own PAT, but
* writing this data shouldn't be harmful even in those cases. */
-static void bdw_setup_private_ppat(struct intel_ppat *ppat)
+static void bdw_setup_private_ppat(struct drm_i915_private *dev_priv)
{
- ppat->max_entries = 8;
- ppat->update_hw = bdw_private_pat_update_hw;
- ppat->match = bdw_private_pat_match;
- ppat->clear_value = GEN8_PPAT_WB | GEN8_PPAT_LLCELLC | GEN8_PPAT_AGE(3);
+ u64 pat;
- if (!HAS_PPGTT(ppat->i915)) {
+ if (!HAS_PPGTT(dev_priv)) {
/* Spec: "For GGTT, there is NO pat_sel[2:0] from the entry,
* so RTL will always use the value corresponding to
* pat_sel = 000".
@@ -3091,26 +2914,25 @@ static void bdw_setup_private_ppat(struct intel_ppat *ppat)
* So we can still hold onto all our assumptions wrt cpu
* clflushing on LLC machines.
*/
- __alloc_ppat_entry(ppat, 0, GEN8_PPAT_UC);
- return;
+ pat = GEN8_PPAT(0, GEN8_PPAT_WB | GEN8_PPAT_LLC); /* for normal objects, no eLLC */
}
- __alloc_ppat_entry(ppat, 0, GEN8_PPAT_WB | GEN8_PPAT_LLC); /* for normal objects, no eLLC */
- __alloc_ppat_entry(ppat, 1, GEN8_PPAT_WC | GEN8_PPAT_LLCELLC); /* for something pointing to ptes? */
- __alloc_ppat_entry(ppat, 2, GEN8_PPAT_WT | GEN8_PPAT_LLCELLC); /* for scanout with eLLC */
- __alloc_ppat_entry(ppat, 3, GEN8_PPAT_UC); /* Uncached objects, mostly for scanout */
- __alloc_ppat_entry(ppat, 4, GEN8_PPAT_WB | GEN8_PPAT_LLCELLC | GEN8_PPAT_AGE(0));
- __alloc_ppat_entry(ppat, 5, GEN8_PPAT_WB | GEN8_PPAT_LLCELLC | GEN8_PPAT_AGE(1));
- __alloc_ppat_entry(ppat, 6, GEN8_PPAT_WB | GEN8_PPAT_LLCELLC | GEN8_PPAT_AGE(2));
- __alloc_ppat_entry(ppat, 7, GEN8_PPAT_WB | GEN8_PPAT_LLCELLC | GEN8_PPAT_AGE(3));
+ pat = GEN8_PPAT(0, GEN8_PPAT_WB | GEN8_PPAT_LLC) | /* for normal objects, no eLLC */
+ GEN8_PPAT(1, GEN8_PPAT_WC | GEN8_PPAT_LLCELLC) | /* for something pointing to ptes? */
+ GEN8_PPAT(2, GEN8_PPAT_WT | GEN8_PPAT_LLCELLC) | /* for scanout with eLLC */
+ GEN8_PPAT(3, GEN8_PPAT_UC) | /* Uncached objects, mostly for scanout */
+ GEN8_PPAT(4, GEN8_PPAT_WB | GEN8_PPAT_LLCELLC | GEN8_PPAT_AGE(0)) |
+ GEN8_PPAT(5, GEN8_PPAT_WB | GEN8_PPAT_LLCELLC | GEN8_PPAT_AGE(1)) |
+ GEN8_PPAT(6, GEN8_PPAT_WB | GEN8_PPAT_LLCELLC | GEN8_PPAT_AGE(2)) |
+ GEN8_PPAT(7, GEN8_PPAT_WB | GEN8_PPAT_LLCELLC | GEN8_PPAT_AGE(3));
+
+ I915_WRITE(GEN8_PRIVATE_PAT_LO, lower_32_bits(pat));
+ I915_WRITE(GEN8_PRIVATE_PAT_HI, upper_32_bits(pat));
}
-static void chv_setup_private_ppat(struct intel_ppat *ppat)
+static void chv_setup_private_ppat(struct drm_i915_private *dev_priv)
{
- ppat->max_entries = 8;
- ppat->update_hw = bdw_private_pat_update_hw;
- ppat->match = chv_private_pat_match;
- ppat->clear_value = CHV_PPAT_SNOOP;
+ u64 pat;
/*
* Map WB on BDW to snooped on CHV.
@@ -3131,14 +2953,17 @@ static void chv_setup_private_ppat(struct intel_ppat *ppat)
* in order to keep the global status page working.
*/
- __alloc_ppat_entry(ppat, 0, CHV_PPAT_SNOOP);
- __alloc_ppat_entry(ppat, 1, 0);
- __alloc_ppat_entry(ppat, 2, 0);
- __alloc_ppat_entry(ppat, 3, 0);
- __alloc_ppat_entry(ppat, 4, CHV_PPAT_SNOOP);
- __alloc_ppat_entry(ppat, 5, CHV_PPAT_SNOOP);
- __alloc_ppat_entry(ppat, 6, CHV_PPAT_SNOOP);
- __alloc_ppat_entry(ppat, 7, CHV_PPAT_SNOOP);
+ pat = GEN8_PPAT(0, CHV_PPAT_SNOOP) |
+ GEN8_PPAT(1, 0) |
+ GEN8_PPAT(2, 0) |
+ GEN8_PPAT(3, 0) |
+ GEN8_PPAT(4, CHV_PPAT_SNOOP) |
+ GEN8_PPAT(5, CHV_PPAT_SNOOP) |
+ GEN8_PPAT(6, CHV_PPAT_SNOOP) |
+ GEN8_PPAT(7, CHV_PPAT_SNOOP);
+
+ I915_WRITE(GEN8_PRIVATE_PAT_LO, lower_32_bits(pat));
+ I915_WRITE(GEN8_PRIVATE_PAT_HI, upper_32_bits(pat));
}
static void gen6_gmch_remove(struct i915_address_space *vm)
@@ -3151,27 +2976,12 @@ static void gen6_gmch_remove(struct i915_address_space *vm)
static void setup_private_pat(struct drm_i915_private *dev_priv)
{
- struct intel_ppat *ppat = &dev_priv->ppat;
- int i;
-
- ppat->i915 = dev_priv;
-
if (INTEL_GEN(dev_priv) >= 10)
- cnl_setup_private_ppat(ppat);
+ cnl_setup_private_ppat(dev_priv);
else if (IS_CHERRYVIEW(dev_priv) || IS_GEN9_LP(dev_priv))
- chv_setup_private_ppat(ppat);
+ chv_setup_private_ppat(dev_priv);
else
- bdw_setup_private_ppat(ppat);
-
- GEM_BUG_ON(ppat->max_entries > INTEL_MAX_PPAT_ENTRIES);
-
- for_each_clear_bit(i, ppat->used, ppat->max_entries) {
- ppat->entries[i].value = ppat->clear_value;
- ppat->entries[i].ppat = ppat;
- set_bit(i, ppat->dirty);
- }
-
- ppat->update_hw(dev_priv);
+ bdw_setup_private_ppat(dev_priv);
}
static int gen8_gmch_probe(struct i915_ggtt *ggtt)
@@ -3518,13 +3328,8 @@ void i915_gem_restore_gtt_mappings(struct drm_i915_private *dev_priv)
mutex_unlock(&ggtt->vm.mutex);
- if (INTEL_GEN(dev_priv) >= 8) {
- struct intel_ppat *ppat = &dev_priv->ppat;
-
- bitmap_set(ppat->dirty, 0, ppat->max_entries);
- dev_priv->ppat.update_hw(dev_priv);
- return;
- }
+ if (INTEL_GEN(dev_priv) >= 8)
+ setup_private_pat(dev_priv);
}
static struct scatterlist *
diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.h b/drivers/gpu/drm/i915/i915_gem_gtt.h
index b76ab4c2a0e6..e260bd81702e 100644
--- a/drivers/gpu/drm/i915/i915_gem_gtt.h
+++ b/drivers/gpu/drm/i915/i915_gem_gtt.h
@@ -153,11 +153,6 @@ typedef u64 gen8_ppgtt_pml4e_t;
#define GEN8_PPAT_ELLC_OVERRIDE (0<<2)
#define GEN8_PPAT(i, x) ((u64)(x) << ((i) * 8))
-#define GEN8_PPAT_GET_CA(x) ((x) & 3)
-#define GEN8_PPAT_GET_TC(x) ((x) & (3 << 2))
-#define GEN8_PPAT_GET_AGE(x) ((x) & (3 << 4))
-#define CHV_PPAT_GET_SNOOP(x) ((x) & (1 << 6))
-
#define GEN8_PDE_IPS_64K BIT(11)
#define GEN8_PDE_PS_2M BIT(7)
@@ -560,37 +555,6 @@ i915_vm_to_ggtt(struct i915_address_space *vm)
return container_of(vm, struct i915_ggtt, vm);
}
-#define INTEL_MAX_PPAT_ENTRIES 8
-#define INTEL_PPAT_PERFECT_MATCH (~0U)
-
-struct intel_ppat;
-
-struct intel_ppat_entry {
- struct intel_ppat *ppat;
- struct kref ref;
- u8 value;
-};
-
-struct intel_ppat {
- struct intel_ppat_entry entries[INTEL_MAX_PPAT_ENTRIES];
- DECLARE_BITMAP(used, INTEL_MAX_PPAT_ENTRIES);
- DECLARE_BITMAP(dirty, INTEL_MAX_PPAT_ENTRIES);
- unsigned int max_entries;
- u8 clear_value;
- /*
- * Return a score to show how two PPAT values match,
- * a INTEL_PPAT_PERFECT_MATCH indicates a perfect match
- */
- unsigned int (*match)(u8 src, u8 dst);
- void (*update_hw)(struct drm_i915_private *i915);
-
- struct drm_i915_private *i915;
-};
-
-const struct intel_ppat_entry *
-intel_ppat_get(struct drm_i915_private *i915, u8 value);
-void intel_ppat_put(const struct intel_ppat_entry *entry);
-
int i915_gem_init_aliasing_ppgtt(struct drm_i915_private *i915);
void i915_gem_fini_aliasing_ppgtt(struct drm_i915_private *i915);
--
2.20.1
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 17+ messages in thread
* ✗ Fi.CI.CHECKPATCH: warning for Revert "drm/i915: Introduce private PAT management" (rev3)
2019-03-22 16:20 [PATCH] Revert "drm/i915: Introduce private PAT management" Michał Winiarski
` (8 preceding siblings ...)
2019-03-25 11:49 ` [PATCH v2] " Michał Winiarski
@ 2019-03-25 12:35 ` Patchwork
2019-03-25 12:36 ` ✗ Fi.CI.SPARSE: " Patchwork
` (4 subsequent siblings)
14 siblings, 0 replies; 17+ messages in thread
From: Patchwork @ 2019-03-25 12:35 UTC (permalink / raw)
To: Michał Winiarski; +Cc: intel-gfx
== Series Details ==
Series: Revert "drm/i915: Introduce private PAT management" (rev3)
URL : https://patchwork.freedesktop.org/series/58421/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
ba742ee0d434 Revert "drm/i915: Introduce private PAT management"
-:277: WARNING:LONG_LINE_COMMENT: line over 100 characters
#277: FILE: drivers/gpu/drm/i915/i915_gem_gtt.c:2928:
+ GEN8_PPAT(1, GEN8_PPAT_WC | GEN8_PPAT_LLCELLC) | /* for something pointing to ptes? */
-:279: WARNING:LONG_LINE_COMMENT: line over 100 characters
#279: FILE: drivers/gpu/drm/i915/i915_gem_gtt.c:2930:
+ GEN8_PPAT(3, GEN8_PPAT_UC) | /* Uncached objects, mostly for scanout */
total: 0 errors, 2 warnings, 0 checks, 381 lines checked
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 17+ messages in thread
* ✗ Fi.CI.SPARSE: warning for Revert "drm/i915: Introduce private PAT management" (rev3)
2019-03-22 16:20 [PATCH] Revert "drm/i915: Introduce private PAT management" Michał Winiarski
` (9 preceding siblings ...)
2019-03-25 12:35 ` ✗ Fi.CI.CHECKPATCH: warning for Revert "drm/i915: Introduce private PAT management" (rev3) Patchwork
@ 2019-03-25 12:36 ` Patchwork
2019-03-25 12:57 ` ✗ Fi.CI.BAT: failure " Patchwork
` (3 subsequent siblings)
14 siblings, 0 replies; 17+ messages in thread
From: Patchwork @ 2019-03-25 12:36 UTC (permalink / raw)
To: Michał Winiarski; +Cc: intel-gfx
== Series Details ==
Series: Revert "drm/i915: Introduce private PAT management" (rev3)
URL : https://patchwork.freedesktop.org/series/58421/
State : warning
== Summary ==
$ dim sparse origin/drm-tip
Sparse version: v0.5.2
Commit: Revert "drm/i915: Introduce private PAT management"
-drivers/gpu/drm/i915/i915_gem_gtt.c:348:14: warning: expression using sizeof(void)
-drivers/gpu/drm/i915/i915_gem_gtt.c:348:14: warning: expression using sizeof(void)
+drivers/gpu/drm/i915/i915_gem_gtt.c:348:14: warning: expression using sizeof(void)
+drivers/gpu/drm/i915/i915_gem_gtt.c:348:14: warning: expression using sizeof(void)
-drivers/gpu/drm/i915/selftests/../i915_drv.h:3585:16: warning: expression using sizeof(void)
+drivers/gpu/drm/i915/selftests/../i915_drv.h:3583:16: warning: expression using sizeof(void)
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 17+ messages in thread
* ✗ Fi.CI.BAT: failure for Revert "drm/i915: Introduce private PAT management" (rev3)
2019-03-22 16:20 [PATCH] Revert "drm/i915: Introduce private PAT management" Michał Winiarski
` (10 preceding siblings ...)
2019-03-25 12:36 ` ✗ Fi.CI.SPARSE: " Patchwork
@ 2019-03-25 12:57 ` Patchwork
2019-03-25 14:30 ` ✗ Fi.CI.CHECKPATCH: warning for Revert "drm/i915: Introduce private PAT management" (rev4) Patchwork
` (2 subsequent siblings)
14 siblings, 0 replies; 17+ messages in thread
From: Patchwork @ 2019-03-25 12:57 UTC (permalink / raw)
To: Michał Winiarski; +Cc: intel-gfx
== Series Details ==
Series: Revert "drm/i915: Introduce private PAT management" (rev3)
URL : https://patchwork.freedesktop.org/series/58421/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_5810 -> Patchwork_12591
====================================================
Summary
-------
**FAILURE**
Serious unknown changes coming with Patchwork_12591 absolutely need to be
verified manually.
If you think the reported changes have nothing to do with the changes
introduced in Patchwork_12591, please notify your bug team to allow them
to document this new failure mode, which will reduce false positives in CI.
External URL: https://patchwork.freedesktop.org/api/1.0/series/58421/revisions/3/mbox/
Possible new issues
-------------------
Here are the unknown changes that may have been introduced in Patchwork_12591:
### IGT changes ###
#### Possible regressions ####
* igt@i915_selftest@live_uncore:
- fi-kbl-8809g: PASS -> DMESG-FAIL
Known issues
------------
Here are the changes found in Patchwork_12591 that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@amdgpu/amd_basic@cs-compute:
- fi-cfl-guc: NOTRUN -> SKIP [fdo#109271] +49
- fi-skl-iommu: NOTRUN -> SKIP [fdo#109271] +45
* igt@amdgpu/amd_basic@cs-gfx:
- fi-skl-6700k2: NOTRUN -> SKIP [fdo#109271] +41
* igt@amdgpu/amd_basic@cs-sdma:
- fi-skl-6770hq: NOTRUN -> SKIP [fdo#109271] +37
- fi-kbl-guc: NOTRUN -> SKIP [fdo#109271] +80
* igt@amdgpu/amd_basic@userptr:
- fi-whl-u: NOTRUN -> SKIP [fdo#109271] +41
* igt@amdgpu/amd_cs_nop@sync-compute0:
- fi-bdw-gvtdvm: NOTRUN -> SKIP [fdo#109271] +42
* igt@amdgpu/amd_cs_nop@sync-fork-gfx0:
- fi-skl-6600u: NOTRUN -> SKIP [fdo#109271] +41
* igt@gem_exec_basic@basic-vebox:
- fi-ivb-3770: NOTRUN -> SKIP [fdo#109271] +48
* igt@gem_exec_basic@gtt-bsd:
- fi-bwr-2160: NOTRUN -> SKIP [fdo#109271] +103
* igt@gem_exec_basic@gtt-bsd2:
- fi-kbl-7500u: NOTRUN -> SKIP [fdo#109271] +9
* igt@gem_exec_basic@readonly-bsd:
- fi-pnv-d510: NOTRUN -> SKIP [fdo#109271] +76
* igt@gem_exec_basic@readonly-bsd1:
- fi-snb-2520m: NOTRUN -> SKIP [fdo#109271] +57
* igt@gem_exec_gttfill@basic:
- fi-skl-gvtdvm: NOTRUN -> SKIP [fdo#109271] +41
* igt@gem_exec_store@basic-bsd2:
- fi-hsw-4770: NOTRUN -> SKIP [fdo#109271] +41
* igt@gem_mmap_gtt@basic-write-cpu-read-gtt:
- fi-apl-guc: NOTRUN -> SKIP [fdo#109271] +50
* igt@gem_ringfill@basic-default-fd:
- fi-elk-e7500: NOTRUN -> SKIP [fdo#109271] +73
* igt@i915_selftest@live_contexts:
- fi-bdw-gvtdvm: NOTRUN -> DMESG-FAIL [fdo#110235 ]
* igt@i915_selftest@live_uncore:
- fi-skl-gvtdvm: NOTRUN -> DMESG-FAIL [fdo#110210]
* igt@kms_busy@basic-flip-a:
- fi-bsw-n3050: NOTRUN -> SKIP [fdo#109271] / [fdo#109278] +1
* igt@kms_busy@basic-flip-c:
- fi-kbl-guc: NOTRUN -> SKIP [fdo#109271] / [fdo#109278] +2
- fi-bwr-2160: NOTRUN -> SKIP [fdo#109271] / [fdo#109278]
- fi-pnv-d510: NOTRUN -> SKIP [fdo#109271] / [fdo#109278]
- fi-snb-2520m: NOTRUN -> SKIP [fdo#109271] / [fdo#109278]
- fi-elk-e7500: NOTRUN -> SKIP [fdo#109271] / [fdo#109278]
- fi-ilk-650: NOTRUN -> SKIP [fdo#109271] / [fdo#109278]
- fi-byt-j1900: NOTRUN -> SKIP [fdo#109271] / [fdo#109278]
- fi-byt-n2820: NOTRUN -> SKIP [fdo#109271] / [fdo#109278]
* igt@kms_chamelium@dp-crc-fast:
- fi-kbl-7500u: NOTRUN -> DMESG-WARN [fdo#103841]
* igt@kms_chamelium@dp-edid-read:
- fi-byt-n2820: NOTRUN -> SKIP [fdo#109271] +56
* igt@kms_chamelium@dp-hpd-fast:
- fi-ilk-650: NOTRUN -> SKIP [fdo#109271] +69
* igt@kms_chamelium@hdmi-crc-fast:
- fi-bsw-n3050: NOTRUN -> SKIP [fdo#109271] +62
- fi-byt-j1900: NOTRUN -> SKIP [fdo#109271] +52
* igt@kms_chamelium@vga-edid-read:
- fi-cfl-8700k: NOTRUN -> SKIP [fdo#109271] +45
- fi-hsw-4770r: NOTRUN -> SKIP [fdo#109271] +45
* igt@kms_force_connector_basic@force-edid:
- fi-kbl-x1275: NOTRUN -> SKIP [fdo#109271] +45
* igt@kms_pipe_crc_basic@suspend-read-crc-pipe-a:
- fi-whl-u: NOTRUN -> FAIL [fdo#103375] +3
* igt@kms_psr@cursor_plane_move:
- fi-whl-u: NOTRUN -> FAIL [fdo#107383] +3
* igt@runner@aborted:
- fi-kbl-7500u: NOTRUN -> FAIL [fdo#103841]
- fi-bxt-dsi: NOTRUN -> FAIL [fdo#109516]
[fdo#103375]: https://bugs.freedesktop.org/show_bug.cgi?id=103375
[fdo#103841]: https://bugs.freedesktop.org/show_bug.cgi?id=103841
[fdo#107383]: https://bugs.freedesktop.org/show_bug.cgi?id=107383
[fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
[fdo#109278]: https://bugs.freedesktop.org/show_bug.cgi?id=109278
[fdo#109516]: https://bugs.freedesktop.org/show_bug.cgi?id=109516
[fdo#110210]: https://bugs.freedesktop.org/show_bug.cgi?id=110210
[fdo#110235 ]: https://bugs.freedesktop.org/show_bug.cgi?id=110235
Participating hosts (9 -> 33)
------------------------------
Additional (25): fi-skl-6770hq fi-bdw-gvtdvm fi-apl-guc fi-snb-2520m fi-pnv-d510 fi-byt-n2820 fi-skl-6600u fi-hsw-4770r fi-bxt-dsi fi-bsw-n3050 fi-byt-j1900 fi-bwr-2160 fi-ilk-650 fi-kbl-7500u fi-hsw-4770 fi-ivb-3770 fi-elk-e7500 fi-skl-6700k2 fi-skl-gvtdvm fi-cfl-8700k fi-cfl-guc fi-kbl-guc fi-whl-u fi-kbl-x1275 fi-skl-iommu
Missing (1): fi-kbl-soraka
Build changes
-------------
* Linux: CI_DRM_5810 -> Patchwork_12591
CI_DRM_5810: 5ab8acfb062b61cb361308064c36052fe5f445aa @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_4902: 3d325bb211d8cd84c6862c9945185a937395cb44 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_12591: ba742ee0d434465dced154af53f8676162458596 @ git://anongit.freedesktop.org/gfx-ci/linux
== Linux commits ==
ba742ee0d434 Revert "drm/i915: Introduce private PAT management"
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12591/
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 17+ messages in thread
* ✗ Fi.CI.CHECKPATCH: warning for Revert "drm/i915: Introduce private PAT management" (rev4)
2019-03-22 16:20 [PATCH] Revert "drm/i915: Introduce private PAT management" Michał Winiarski
` (11 preceding siblings ...)
2019-03-25 12:57 ` ✗ Fi.CI.BAT: failure " Patchwork
@ 2019-03-25 14:30 ` Patchwork
2019-03-25 14:31 ` ✗ Fi.CI.SPARSE: " Patchwork
2019-03-25 14:59 ` ✗ Fi.CI.BAT: failure " Patchwork
14 siblings, 0 replies; 17+ messages in thread
From: Patchwork @ 2019-03-25 14:30 UTC (permalink / raw)
To: Michał Winiarski; +Cc: intel-gfx
== Series Details ==
Series: Revert "drm/i915: Introduce private PAT management" (rev4)
URL : https://patchwork.freedesktop.org/series/58421/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
6d96174da189 Revert "drm/i915: Introduce private PAT management"
-:277: WARNING:LONG_LINE_COMMENT: line over 100 characters
#277: FILE: drivers/gpu/drm/i915/i915_gem_gtt.c:2928:
+ GEN8_PPAT(1, GEN8_PPAT_WC | GEN8_PPAT_LLCELLC) | /* for something pointing to ptes? */
-:279: WARNING:LONG_LINE_COMMENT: line over 100 characters
#279: FILE: drivers/gpu/drm/i915/i915_gem_gtt.c:2930:
+ GEN8_PPAT(3, GEN8_PPAT_UC) | /* Uncached objects, mostly for scanout */
total: 0 errors, 2 warnings, 0 checks, 381 lines checked
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 17+ messages in thread
* ✗ Fi.CI.SPARSE: warning for Revert "drm/i915: Introduce private PAT management" (rev4)
2019-03-22 16:20 [PATCH] Revert "drm/i915: Introduce private PAT management" Michał Winiarski
` (12 preceding siblings ...)
2019-03-25 14:30 ` ✗ Fi.CI.CHECKPATCH: warning for Revert "drm/i915: Introduce private PAT management" (rev4) Patchwork
@ 2019-03-25 14:31 ` Patchwork
2019-03-25 14:59 ` ✗ Fi.CI.BAT: failure " Patchwork
14 siblings, 0 replies; 17+ messages in thread
From: Patchwork @ 2019-03-25 14:31 UTC (permalink / raw)
To: Michał Winiarski; +Cc: intel-gfx
== Series Details ==
Series: Revert "drm/i915: Introduce private PAT management" (rev4)
URL : https://patchwork.freedesktop.org/series/58421/
State : warning
== Summary ==
$ dim sparse origin/drm-tip
Sparse version: v0.5.2
Commit: Revert "drm/i915: Introduce private PAT management"
-drivers/gpu/drm/i915/i915_gem_gtt.c:348:14: warning: expression using sizeof(void)
-drivers/gpu/drm/i915/i915_gem_gtt.c:348:14: warning: expression using sizeof(void)
+drivers/gpu/drm/i915/i915_gem_gtt.c:348:14: warning: expression using sizeof(void)
+drivers/gpu/drm/i915/i915_gem_gtt.c:348:14: warning: expression using sizeof(void)
-drivers/gpu/drm/i915/selftests/../i915_drv.h:3586:16: warning: expression using sizeof(void)
+drivers/gpu/drm/i915/selftests/../i915_drv.h:3584:16: warning: expression using sizeof(void)
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 17+ messages in thread
* ✗ Fi.CI.BAT: failure for Revert "drm/i915: Introduce private PAT management" (rev4)
2019-03-22 16:20 [PATCH] Revert "drm/i915: Introduce private PAT management" Michał Winiarski
` (13 preceding siblings ...)
2019-03-25 14:31 ` ✗ Fi.CI.SPARSE: " Patchwork
@ 2019-03-25 14:59 ` Patchwork
14 siblings, 0 replies; 17+ messages in thread
From: Patchwork @ 2019-03-25 14:59 UTC (permalink / raw)
To: Michał Winiarski; +Cc: intel-gfx
== Series Details ==
Series: Revert "drm/i915: Introduce private PAT management" (rev4)
URL : https://patchwork.freedesktop.org/series/58421/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_5811 -> Patchwork_12593
====================================================
Summary
-------
**FAILURE**
Serious unknown changes coming with Patchwork_12593 absolutely need to be
verified manually.
If you think the reported changes have nothing to do with the changes
introduced in Patchwork_12593, please notify your bug team to allow them
to document this new failure mode, which will reduce false positives in CI.
External URL: https://patchwork.freedesktop.org/api/1.0/series/58421/revisions/4/mbox/
Known issues
------------
Here are the changes found in Patchwork_12593 that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@gem_exec_store@basic-bsd2:
- fi-hsw-4770: NOTRUN -> SKIP [fdo#109271] +41
* igt@gem_mmap_gtt@basic-write-cpu-read-gtt:
- fi-apl-guc: NOTRUN -> SKIP [fdo#109271] +50
* igt@i915_selftest@live_execlists:
- fi-apl-guc: NOTRUN -> INCOMPLETE [fdo#103927] / [fdo#109720]
* igt@kms_psr@sprite_plane_onoff:
- fi-skl-iommu: NOTRUN -> SKIP [fdo#109271] +45
* igt@runner@aborted:
- fi-apl-guc: NOTRUN -> FAIL [fdo#108622] / [fdo#109720]
[fdo#103927]: https://bugs.freedesktop.org/show_bug.cgi?id=103927
[fdo#108622]: https://bugs.freedesktop.org/show_bug.cgi?id=108622
[fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
[fdo#109720]: https://bugs.freedesktop.org/show_bug.cgi?id=109720
Participating hosts (18 -> 6)
------------------------------
ERROR: It appears as if the changes made in Patchwork_12593 prevented too many machines from booting.
Additional (3): fi-hsw-4770 fi-skl-iommu fi-apl-guc
Missing (15): fi-hsw-4770r fi-ilk-m540 fi-skl-guc fi-bdw-gvtdvm fi-bwr-2160 fi-kbl-guc fi-kbl-7500u fi-whl-u fi-bxt-j4205 fi-cfl-8109u fi-elk-e7500 fi-kbl-8809g fi-skl-lmem fi-byt-n2820 fi-skl-6700k2
Build changes
-------------
* Linux: CI_DRM_5811 -> Patchwork_12593
CI_DRM_5811: efeb64571b430e74fa6b755fd279b9a991538b9d @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_4902: 3d325bb211d8cd84c6862c9945185a937395cb44 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_12593: 6d96174da189dbbd4875337364afb14642a15fab @ git://anongit.freedesktop.org/gfx-ci/linux
== Linux commits ==
6d96174da189 Revert "drm/i915: Introduce private PAT management"
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12593/
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 17+ messages in thread
end of thread, other threads:[~2019-03-25 14:59 UTC | newest]
Thread overview: 17+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2019-03-22 16:20 [PATCH] Revert "drm/i915: Introduce private PAT management" Michał Winiarski
2019-03-22 16:41 ` Chris Wilson
2019-03-22 16:49 ` ✗ Fi.CI.CHECKPATCH: warning for " Patchwork
2019-03-22 16:50 ` ✗ Fi.CI.SPARSE: " Patchwork
2019-03-22 17:11 ` ✗ Fi.CI.BAT: failure " Patchwork
2019-03-24 13:11 ` ✗ Fi.CI.CHECKPATCH: warning for Revert "drm/i915: Introduce private PAT management" (rev2) Patchwork
2019-03-24 13:12 ` ✗ Fi.CI.SPARSE: " Patchwork
2019-03-24 13:39 ` ✗ Fi.CI.BAT: failure " Patchwork
2019-03-24 13:47 ` [PATCH] Revert "drm/i915: Introduce private PAT management" Chris Wilson
2019-03-25 11:49 ` Michał Winiarski
2019-03-25 11:49 ` [PATCH v2] " Michał Winiarski
2019-03-25 12:35 ` ✗ Fi.CI.CHECKPATCH: warning for Revert "drm/i915: Introduce private PAT management" (rev3) Patchwork
2019-03-25 12:36 ` ✗ Fi.CI.SPARSE: " Patchwork
2019-03-25 12:57 ` ✗ Fi.CI.BAT: failure " Patchwork
2019-03-25 14:30 ` ✗ Fi.CI.CHECKPATCH: warning for Revert "drm/i915: Introduce private PAT management" (rev4) Patchwork
2019-03-25 14:31 ` ✗ Fi.CI.SPARSE: " Patchwork
2019-03-25 14:59 ` ✗ Fi.CI.BAT: failure " Patchwork
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