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From: Will Deacon <will.deacon@arm.com>
To: Shameer Kolothum <shameerali.kolothum.thodi@huawei.com>
Cc: lorenzo.pieralisi@arm.com, robin.murphy@arm.com,
	andrew.murray@arm.com, jean-philippe.brucker@arm.com,
	mark.rutland@arm.com, guohanjun@huawei.com,
	john.garry@huawei.com, pabba@codeaurora.org,
	vkilari@codeaurora.org, rruigrok@codeaurora.org,
	linux-acpi@vger.kernel.org, linux-kernel@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org, linuxarm@huawei.com,
	neil.m.leeder@gmail.com
Subject: Re: [PATCH v7 4/4] perf/smmuv3: Enable HiSilicon Erratum 162001800 quirk
Date: Thu, 4 Apr 2019 13:32:25 +0100	[thread overview]
Message-ID: <20190404123218.GA27823@fuggles.cambridge.arm.com> (raw)
In-Reply-To: <20190326151753.19384-5-shameerali.kolothum.thodi@huawei.com>

On Tue, Mar 26, 2019 at 03:17:53PM +0000, Shameer Kolothum wrote:
> HiSilicon erratum 162001800 describes the limitation of
> SMMUv3 PMCG implementation on HiSilicon Hip08 platforms.
> 
> On these platforms, the PMCG event counter registers
> (SMMU_PMCG_EVCNTRn) are read only and as a result it
> is not possible to set the initial counter period value
> on event monitor start.
> 
> To work around this, the current value of the counter
> is read and used for delta calculations. OEM information
> from ACPI header is used to identify the affected hardware
> platforms.
> 
> Signed-off-by: Shameer Kolothum <shameerali.kolothum.thodi@huawei.com>
> Reviewed-by: Hanjun Guo <hanjun.guo@linaro.org>
> Reviewed-by: Robin Murphy <robin.murphy@arm.com>
> ---
>  drivers/acpi/arm64/iort.c     | 16 ++++++++++++++-
>  drivers/perf/arm_smmuv3_pmu.c | 48 ++++++++++++++++++++++++++++++++++++-------
>  include/linux/acpi_iort.h     |  1 +
>  3 files changed, 57 insertions(+), 8 deletions(-)

I need an Ack from Lorenzo for the IORT parts of this patch.

Will

WARNING: multiple messages have this Message-ID (diff)
From: Will Deacon <will.deacon@arm.com>
To: Shameer Kolothum <shameerali.kolothum.thodi@huawei.com>
Cc: mark.rutland@arm.com, vkilari@codeaurora.org,
	lorenzo.pieralisi@arm.com, neil.m.leeder@gmail.com,
	jean-philippe.brucker@arm.com, pabba@codeaurora.org,
	john.garry@huawei.com, linuxarm@huawei.com,
	rruigrok@codeaurora.org, linux-kernel@vger.kernel.org,
	linux-acpi@vger.kernel.org, guohanjun@huawei.com,
	andrew.murray@arm.com, robin.murphy@arm.com,
	linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH v7 4/4] perf/smmuv3: Enable HiSilicon Erratum 162001800 quirk
Date: Thu, 4 Apr 2019 13:32:25 +0100	[thread overview]
Message-ID: <20190404123218.GA27823@fuggles.cambridge.arm.com> (raw)
In-Reply-To: <20190326151753.19384-5-shameerali.kolothum.thodi@huawei.com>

On Tue, Mar 26, 2019 at 03:17:53PM +0000, Shameer Kolothum wrote:
> HiSilicon erratum 162001800 describes the limitation of
> SMMUv3 PMCG implementation on HiSilicon Hip08 platforms.
> 
> On these platforms, the PMCG event counter registers
> (SMMU_PMCG_EVCNTRn) are read only and as a result it
> is not possible to set the initial counter period value
> on event monitor start.
> 
> To work around this, the current value of the counter
> is read and used for delta calculations. OEM information
> from ACPI header is used to identify the affected hardware
> platforms.
> 
> Signed-off-by: Shameer Kolothum <shameerali.kolothum.thodi@huawei.com>
> Reviewed-by: Hanjun Guo <hanjun.guo@linaro.org>
> Reviewed-by: Robin Murphy <robin.murphy@arm.com>
> ---
>  drivers/acpi/arm64/iort.c     | 16 ++++++++++++++-
>  drivers/perf/arm_smmuv3_pmu.c | 48 ++++++++++++++++++++++++++++++++++++-------
>  include/linux/acpi_iort.h     |  1 +
>  3 files changed, 57 insertions(+), 8 deletions(-)

I need an Ack from Lorenzo for the IORT parts of this patch.

Will

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  reply	other threads:[~2019-04-04 12:32 UTC|newest]

Thread overview: 31+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-03-26 15:17 [PATCH v7 0/4] arm64 SMMUv3 PMU driver with IORT support Shameer Kolothum
2019-03-26 15:17 ` Shameer Kolothum
2019-03-26 15:17 ` Shameer Kolothum
2019-03-26 15:17 ` [PATCH v7 1/4] ACPI/IORT: Add support for PMCG Shameer Kolothum
2019-03-26 15:17   ` Shameer Kolothum
2019-03-26 15:17   ` Shameer Kolothum
2019-03-26 15:17 ` [PATCH v7 2/4] perf/smmuv3: Add arm64 smmuv3 pmu driver Shameer Kolothum
2019-03-26 15:17   ` Shameer Kolothum
2019-03-26 15:17   ` Shameer Kolothum
2019-03-26 16:57   ` Robin Murphy
2019-03-26 16:57     ` Robin Murphy
2019-03-26 17:02     ` Shameerali Kolothum Thodi
2019-03-26 17:02       ` Shameerali Kolothum Thodi
2019-03-26 17:02       ` Shameerali Kolothum Thodi
2019-04-04 15:30   ` Will Deacon
2019-04-04 15:30     ` Will Deacon
2019-03-26 15:17 ` [PATCH v7 3/4] perf/smmuv3: Add MSI irq support Shameer Kolothum
2019-03-26 15:17   ` Shameer Kolothum
2019-03-26 15:17   ` Shameer Kolothum
2019-03-26 15:17 ` [PATCH v7 4/4] perf/smmuv3: Enable HiSilicon Erratum 162001800 quirk Shameer Kolothum
2019-03-26 15:17   ` Shameer Kolothum
2019-03-26 15:17   ` Shameer Kolothum
2019-04-04 12:32   ` Will Deacon [this message]
2019-04-04 12:32     ` Will Deacon
2019-04-04 14:49   ` Lorenzo Pieralisi
2019-04-04 14:49     ` Lorenzo Pieralisi
2019-04-04 15:47   ` Will Deacon
2019-04-04 15:47     ` Will Deacon
2019-04-04 16:31     ` Shameerali Kolothum Thodi
2019-04-04 16:31       ` Shameerali Kolothum Thodi
2019-04-04 16:31       ` Shameerali Kolothum Thodi

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