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From: Shameerali Kolothum Thodi <shameerali.kolothum.thodi@huawei.com>
To: Robin Murphy <robin.murphy@arm.com>,
	"lorenzo.pieralisi@arm.com" <lorenzo.pieralisi@arm.com>
Cc: "andrew.murray@arm.com" <andrew.murray@arm.com>,
	"jean-philippe.brucker@arm.com" <jean-philippe.brucker@arm.com>,
	"will.deacon@arm.com" <will.deacon@arm.com>,
	"mark.rutland@arm.com" <mark.rutland@arm.com>,
	"Guohanjun (Hanjun Guo)" <guohanjun@huawei.com>,
	John Garry <john.garry@huawei.com>,
	"pabba@codeaurora.org" <pabba@codeaurora.org>,
	"vkilari@codeaurora.org" <vkilari@codeaurora.org>,
	"rruigrok@codeaurora.org" <rruigrok@codeaurora.org>,
	"linux-acpi@vger.kernel.org" <linux-acpi@vger.kernel.org>,
	"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
	"linux-arm-kernel@lists.infradead.org"
	<linux-arm-kernel@lists.infradead.org>,
	Linuxarm <linuxarm@huawei.com>,
	"neil.m.leeder@gmail.com" <neil.m.leeder@gmail.com>
Subject: RE: [PATCH v7 2/4] perf/smmuv3: Add arm64 smmuv3 pmu driver
Date: Tue, 26 Mar 2019 17:02:26 +0000	[thread overview]
Message-ID: <5FC3163CFD30C246ABAA99954A238FA8393296D1@lhreml524-mbb.china.huawei.com> (raw)
In-Reply-To: <fa89c332-d420-8fef-5034-518e60571bd9@arm.com>

Hi Robin,

> -----Original Message-----
> From: Robin Murphy [mailto:robin.murphy@arm.com]
> Sent: 26 March 2019 16:58
> To: Shameerali Kolothum Thodi <shameerali.kolothum.thodi@huawei.com>;
> lorenzo.pieralisi@arm.com
> Cc: andrew.murray@arm.com; jean-philippe.brucker@arm.com;
> will.deacon@arm.com; mark.rutland@arm.com; Guohanjun (Hanjun Guo)
> <guohanjun@huawei.com>; John Garry <john.garry@huawei.com>;
> pabba@codeaurora.org; vkilari@codeaurora.org; rruigrok@codeaurora.org;
> linux-acpi@vger.kernel.org; linux-kernel@vger.kernel.org;
> linux-arm-kernel@lists.infradead.org; Linuxarm <linuxarm@huawei.com>;
> neil.m.leeder@gmail.com
> Subject: Re: [PATCH v7 2/4] perf/smmuv3: Add arm64 smmuv3 pmu driver
> 
> Hi Shameer,
> 
> On 26/03/2019 15:17, Shameer Kolothum wrote:
> [...]
> > +static int smmu_pmu_apply_event_filter(struct smmu_pmu *smmu_pmu,
> > +				       struct perf_event *event, int idx)
> > +{
> > +	u32 span, sid;
> > +	unsigned int num_ctrs = smmu_pmu->num_counters;
> > +	bool filter_en = !!get_filter_enable(event);
> > +
> > +	span = filter_en ? get_filter_span(event) :
> > +			   SMMU_PMCG_DEFAULT_FILTER_SPAN;
> > +	sid = filter_en ? get_filter_stream_id(event) :
> > +			   SMMU_PMCG_DEFAULT_FILTER_SID;
> > +
> > +	/* Support individual filter settings */
> > +	if (!smmu_pmu->global_filter) {
> > +		smmu_pmu_set_event_filter(event, idx, span, sid);
> > +		return 0;
> > +	}
> > +
> > +	/* Requested settings same as current global settings*/
> > +	if (span == smmu_pmu->global_filter_span &&
> > +	    sid == smmu_pmu->global_filter_sid)
> > +		return 0;
> > +
> > +	if (!bitmap_empty(smmu_pmu->used_counters, num_ctrs))
> > +		return -EAGAIN;
> > +
> > +	if (idx == 0) {
> > +		smmu_pmu_set_event_filter(event, idx, span, sid);
> > +		smmu_pmu->global_filter_span = span;
> > +		smmu_pmu->global_filter_sid = sid;
> > +		return 0;
> > +	}
> 
> When I suggested dropping the check of idx, I did mean removing it
> entirely, not just moving it further down ;)

Ah..I must confess that I was slightly confused by that suggestion and 
thought that you are making a case for code being more clear to read :)
 
> Nothing to worry about though, I'll just leave this here for Will to
> consider applying on top or squashing.

Thanks for that.

Cheers,
Shameer

> Thanks,
> Robin.
> 
> ----->8-----
> From: Robin Murphy <robin.murphy@arm.com>
> Subject: [PATCH] perf/smmuv3: Relax global filter constraint a little
> 
> Although the current behaviour of smmu_pmu_get_event_idx() effectively
> ensures that the first-allocated counter will be counter 0, there's no
> need to strictly enforce that in smmu_pmu_apply_event_filter(). All that
> matters is that we only ever touch the global filter settings in
> SMMU_PMCG_SMR0 and SMMU_PMCG_EVTYPER0 while no counters are
> active.
> 
> Signed-off-by: Robin Murphy <robin.murphy@arm.com>
> ---
>   drivers/perf/arm_smmuv3_pmu.c | 11 ++++-------
>   1 file changed, 4 insertions(+), 7 deletions(-)
> 
> diff --git a/drivers/perf/arm_smmuv3_pmu.c
> b/drivers/perf/arm_smmuv3_pmu.c
> index 6b3c0ed7ad71..23045ead6de1 100644
> --- a/drivers/perf/arm_smmuv3_pmu.c
> +++ b/drivers/perf/arm_smmuv3_pmu.c
> @@ -286,14 +286,11 @@ static int smmu_pmu_apply_event_filter(struct
> smmu_pmu *smmu_pmu,
>   	if (!bitmap_empty(smmu_pmu->used_counters, num_ctrs))
>   		return -EAGAIN;
> 
> -	if (idx == 0) {
> -		smmu_pmu_set_event_filter(event, idx, span, sid);
> -		smmu_pmu->global_filter_span = span;
> -		smmu_pmu->global_filter_sid = sid;
> -		return 0;
> -	}
> +	smmu_pmu_set_event_filter(event, 0, span, sid);
> +	smmu_pmu->global_filter_span = span;
> +	smmu_pmu->global_filter_sid = sid;
> 
> -	return -EAGAIN;
> +	return 0;
>   }
> 
>   static int smmu_pmu_get_event_idx(struct smmu_pmu *smmu_pmu,
> --
> 2.20.1.dirty

WARNING: multiple messages have this Message-ID (diff)
From: Shameerali Kolothum Thodi <shameerali.kolothum.thodi@huawei.com>
To: Robin Murphy <robin.murphy@arm.com>,
	"lorenzo.pieralisi@arm.com" <lorenzo.pieralisi@arm.com>
Cc: "mark.rutland@arm.com" <mark.rutland@arm.com>,
	"vkilari@codeaurora.org" <vkilari@codeaurora.org>,
	"neil.m.leeder@gmail.com" <neil.m.leeder@gmail.com>,
	"jean-philippe.brucker@arm.com" <jean-philippe.brucker@arm.com>,
	"pabba@codeaurora.org" <pabba@codeaurora.org>,
	John Garry <john.garry@huawei.com>,
	"will.deacon@arm.com" <will.deacon@arm.com>,
	"rruigrok@codeaurora.org" <rruigrok@codeaurora.org>,
	Linuxarm <linuxarm@huawei.com>,
	"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
	"linux-acpi@vger.kernel.org" <linux-acpi@vger.kernel.org>,
	"Guohanjun \(Hanjun Guo\)" <guohanjun@huawei.com>,
	"andrew.murray@arm.com" <andrew.murray@arm.com>,
	"linux-arm-kernel@lists.infradead.org"
	<linux-arm-kernel@lists.infradead.org>
Subject: RE: [PATCH v7 2/4] perf/smmuv3: Add arm64 smmuv3 pmu driver
Date: Tue, 26 Mar 2019 17:02:26 +0000	[thread overview]
Message-ID: <5FC3163CFD30C246ABAA99954A238FA8393296D1@lhreml524-mbb.china.huawei.com> (raw)
In-Reply-To: <fa89c332-d420-8fef-5034-518e60571bd9@arm.com>

Hi Robin,

> -----Original Message-----
> From: Robin Murphy [mailto:robin.murphy@arm.com]
> Sent: 26 March 2019 16:58
> To: Shameerali Kolothum Thodi <shameerali.kolothum.thodi@huawei.com>;
> lorenzo.pieralisi@arm.com
> Cc: andrew.murray@arm.com; jean-philippe.brucker@arm.com;
> will.deacon@arm.com; mark.rutland@arm.com; Guohanjun (Hanjun Guo)
> <guohanjun@huawei.com>; John Garry <john.garry@huawei.com>;
> pabba@codeaurora.org; vkilari@codeaurora.org; rruigrok@codeaurora.org;
> linux-acpi@vger.kernel.org; linux-kernel@vger.kernel.org;
> linux-arm-kernel@lists.infradead.org; Linuxarm <linuxarm@huawei.com>;
> neil.m.leeder@gmail.com
> Subject: Re: [PATCH v7 2/4] perf/smmuv3: Add arm64 smmuv3 pmu driver
> 
> Hi Shameer,
> 
> On 26/03/2019 15:17, Shameer Kolothum wrote:
> [...]
> > +static int smmu_pmu_apply_event_filter(struct smmu_pmu *smmu_pmu,
> > +				       struct perf_event *event, int idx)
> > +{
> > +	u32 span, sid;
> > +	unsigned int num_ctrs = smmu_pmu->num_counters;
> > +	bool filter_en = !!get_filter_enable(event);
> > +
> > +	span = filter_en ? get_filter_span(event) :
> > +			   SMMU_PMCG_DEFAULT_FILTER_SPAN;
> > +	sid = filter_en ? get_filter_stream_id(event) :
> > +			   SMMU_PMCG_DEFAULT_FILTER_SID;
> > +
> > +	/* Support individual filter settings */
> > +	if (!smmu_pmu->global_filter) {
> > +		smmu_pmu_set_event_filter(event, idx, span, sid);
> > +		return 0;
> > +	}
> > +
> > +	/* Requested settings same as current global settings*/
> > +	if (span == smmu_pmu->global_filter_span &&
> > +	    sid == smmu_pmu->global_filter_sid)
> > +		return 0;
> > +
> > +	if (!bitmap_empty(smmu_pmu->used_counters, num_ctrs))
> > +		return -EAGAIN;
> > +
> > +	if (idx == 0) {
> > +		smmu_pmu_set_event_filter(event, idx, span, sid);
> > +		smmu_pmu->global_filter_span = span;
> > +		smmu_pmu->global_filter_sid = sid;
> > +		return 0;
> > +	}
> 
> When I suggested dropping the check of idx, I did mean removing it
> entirely, not just moving it further down ;)

Ah..I must confess that I was slightly confused by that suggestion and 
thought that you are making a case for code being more clear to read :)
 
> Nothing to worry about though, I'll just leave this here for Will to
> consider applying on top or squashing.

Thanks for that.

Cheers,
Shameer

> Thanks,
> Robin.
> 
> ----->8-----
> From: Robin Murphy <robin.murphy@arm.com>
> Subject: [PATCH] perf/smmuv3: Relax global filter constraint a little
> 
> Although the current behaviour of smmu_pmu_get_event_idx() effectively
> ensures that the first-allocated counter will be counter 0, there's no
> need to strictly enforce that in smmu_pmu_apply_event_filter(). All that
> matters is that we only ever touch the global filter settings in
> SMMU_PMCG_SMR0 and SMMU_PMCG_EVTYPER0 while no counters are
> active.
> 
> Signed-off-by: Robin Murphy <robin.murphy@arm.com>
> ---
>   drivers/perf/arm_smmuv3_pmu.c | 11 ++++-------
>   1 file changed, 4 insertions(+), 7 deletions(-)
> 
> diff --git a/drivers/perf/arm_smmuv3_pmu.c
> b/drivers/perf/arm_smmuv3_pmu.c
> index 6b3c0ed7ad71..23045ead6de1 100644
> --- a/drivers/perf/arm_smmuv3_pmu.c
> +++ b/drivers/perf/arm_smmuv3_pmu.c
> @@ -286,14 +286,11 @@ static int smmu_pmu_apply_event_filter(struct
> smmu_pmu *smmu_pmu,
>   	if (!bitmap_empty(smmu_pmu->used_counters, num_ctrs))
>   		return -EAGAIN;
> 
> -	if (idx == 0) {
> -		smmu_pmu_set_event_filter(event, idx, span, sid);
> -		smmu_pmu->global_filter_span = span;
> -		smmu_pmu->global_filter_sid = sid;
> -		return 0;
> -	}
> +	smmu_pmu_set_event_filter(event, 0, span, sid);
> +	smmu_pmu->global_filter_span = span;
> +	smmu_pmu->global_filter_sid = sid;
> 
> -	return -EAGAIN;
> +	return 0;
>   }
> 
>   static int smmu_pmu_get_event_idx(struct smmu_pmu *smmu_pmu,
> --
> 2.20.1.dirty
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

  reply	other threads:[~2019-03-26 17:02 UTC|newest]

Thread overview: 31+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-03-26 15:17 [PATCH v7 0/4] arm64 SMMUv3 PMU driver with IORT support Shameer Kolothum
2019-03-26 15:17 ` Shameer Kolothum
2019-03-26 15:17 ` Shameer Kolothum
2019-03-26 15:17 ` [PATCH v7 1/4] ACPI/IORT: Add support for PMCG Shameer Kolothum
2019-03-26 15:17   ` Shameer Kolothum
2019-03-26 15:17   ` Shameer Kolothum
2019-03-26 15:17 ` [PATCH v7 2/4] perf/smmuv3: Add arm64 smmuv3 pmu driver Shameer Kolothum
2019-03-26 15:17   ` Shameer Kolothum
2019-03-26 15:17   ` Shameer Kolothum
2019-03-26 16:57   ` Robin Murphy
2019-03-26 16:57     ` Robin Murphy
2019-03-26 17:02     ` Shameerali Kolothum Thodi [this message]
2019-03-26 17:02       ` Shameerali Kolothum Thodi
2019-03-26 17:02       ` Shameerali Kolothum Thodi
2019-04-04 15:30   ` Will Deacon
2019-04-04 15:30     ` Will Deacon
2019-03-26 15:17 ` [PATCH v7 3/4] perf/smmuv3: Add MSI irq support Shameer Kolothum
2019-03-26 15:17   ` Shameer Kolothum
2019-03-26 15:17   ` Shameer Kolothum
2019-03-26 15:17 ` [PATCH v7 4/4] perf/smmuv3: Enable HiSilicon Erratum 162001800 quirk Shameer Kolothum
2019-03-26 15:17   ` Shameer Kolothum
2019-03-26 15:17   ` Shameer Kolothum
2019-04-04 12:32   ` Will Deacon
2019-04-04 12:32     ` Will Deacon
2019-04-04 14:49   ` Lorenzo Pieralisi
2019-04-04 14:49     ` Lorenzo Pieralisi
2019-04-04 15:47   ` Will Deacon
2019-04-04 15:47     ` Will Deacon
2019-04-04 16:31     ` Shameerali Kolothum Thodi
2019-04-04 16:31       ` Shameerali Kolothum Thodi
2019-04-04 16:31       ` Shameerali Kolothum Thodi

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