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From: Will Deacon <will.deacon@arm.com>
To: Linus Torvalds <torvalds@linux-foundation.org>
Cc: linux-arch <linux-arch@vger.kernel.org>,
	Linux List Kernel Mailing <linux-kernel@vger.kernel.org>,
	"Paul E. McKenney" <paulmck@linux.ibm.com>,
	Benjamin Herrenschmidt <benh@kernel.crashing.org>,
	Michael Ellerman <mpe@ellerman.id.au>,
	Arnd Bergmann <arnd@arndb.de>,
	Peter Zijlstra <peterz@infradead.org>,
	Andrea Parri <andrea.parri@amarulasolutions.com>,
	Palmer Dabbelt <palmer@sifive.com>,
	Daniel Lustig <dlustig@nvidia.com>,
	David Howells <dhowells@redhat.com>,
	Alan Stern <stern@rowland.harvard.edu>,
	"Maciej W. Rozycki" <macro@linux-mips.org>,
	Paul Burton <paul.burton@mips.com>,
	Ingo Molnar <mingo@kernel.org>,
	Yoshinori Sato <ysato@users.sourceforge.jp>,
	Rich Felker <dalias@libc.org>, Tony Luck <tony.luck@intel.com>,
	Mikulas Patocka <mpatocka@redhat.com>,
	Akira Yokosawa <akiyks@gmail.com>,
	Luis Chamberlain <mcgrof@kernel.org>,
	Nicholas Piggin <npiggin@gmail.com>
Subject: Re: [PATCH v2 00/21] Remove Mysterious Macro Intended to Obscure Weird Behaviours (mmiowb())
Date: Fri, 5 Apr 2019 17:30:27 +0100	[thread overview]
Message-ID: <20190405163027.GA19813@fuggles.cambridge.arm.com> (raw)
In-Reply-To: <CAHk-=wiBQwAL5hoLD9-EmCAf1N9CUmUkuj_jJhUCsboNLy-uLw@mail.gmail.com>

On Fri, Apr 05, 2019 at 06:15:12AM -1000, Linus Torvalds wrote:
> On Fri, Apr 5, 2019 at 6:09 AM Will Deacon <will.deacon@arm.com> wrote:
> > >
> > > Or did I miss something? I think the ia64() mb/rmb/wmb stuff only
> > > works on normal memory on ia64.
> >
> > I was worried about RISC-V, but actually their wmb() is "fence ow,ow"
> > which I think is stronger than their mmiowb() "fence o,w" implementation.
> 
> Also with smp_store_release -> smp_load_acquire kind of ordering?

Hmm, to be honest, I'm not convinced that smp_load_acquire() is ordered
wrt subsequent I/O on RISC-V anyway, so in the pattern of:

CPU 0:
writel(1, dev);
wmb();
smp_store_release(&x, 1);

CPU 1:
if (smp_load_acquire(&x) == 1)
	writel(2, dev)

then I think it's actually the control dependency in CPU 1 that provides
the expected ordering. That's probably quite fragile.

> Again, this is not at all a NAK - I think we should do this - just
> perhaps a request to add a note to the commit and make people aware of
> the issue.

Right, I'll do that.

Will

WARNING: multiple messages have this Message-ID (diff)
From: Will Deacon <will.deacon@arm.com>
To: Linus Torvalds <torvalds@linux-foundation.org>
Cc: linux-arch <linux-arch@vger.kernel.org>,
	Linux List Kernel Mailing <linux-kernel@vger.kernel.org>,
	"Paul E. McKenney" <paulmck@linux.ibm.com>,
	Benjamin Herrenschmidt <benh@kernel.crashing.org>,
	Michael Ellerman <mpe@ellerman.id.au>,
	Arnd Bergmann <arnd@arndb.de>,
	Peter Zijlstra <peterz@infradead.org>,
	Andrea Parri <andrea.parri@amarulasolutions.com>,
	Palmer Dabbelt <palmer@sifive.com>,
	Daniel Lustig <dlustig@nvidia.com>,
	David Howells <dhowells@redhat.com>,
	Alan Stern <stern@rowland.harvard.edu>,
	"Maciej W. Rozycki" <macro@linux-mips.org>,
	Paul Burton <paul.burton@mips.com>,
	Ingo Molnar <mingo@kernel.org>,
	Yoshinori Sato <ysato@users.sourceforge.jp>,
	Rich Felker <dalias@libc.org>, Tony Luck <tony.luck@intel.com>,
	Mikulas Patocka <mpatocka@redhat.com>
Subject: Re: [PATCH v2 00/21] Remove Mysterious Macro Intended to Obscure Weird Behaviours (mmiowb())
Date: Fri, 5 Apr 2019 17:30:27 +0100	[thread overview]
Message-ID: <20190405163027.GA19813@fuggles.cambridge.arm.com> (raw)
In-Reply-To: <CAHk-=wiBQwAL5hoLD9-EmCAf1N9CUmUkuj_jJhUCsboNLy-uLw@mail.gmail.com>

On Fri, Apr 05, 2019 at 06:15:12AM -1000, Linus Torvalds wrote:
> On Fri, Apr 5, 2019 at 6:09 AM Will Deacon <will.deacon@arm.com> wrote:
> > >
> > > Or did I miss something? I think the ia64() mb/rmb/wmb stuff only
> > > works on normal memory on ia64.
> >
> > I was worried about RISC-V, but actually their wmb() is "fence ow,ow"
> > which I think is stronger than their mmiowb() "fence o,w" implementation.
> 
> Also with smp_store_release -> smp_load_acquire kind of ordering?

Hmm, to be honest, I'm not convinced that smp_load_acquire() is ordered
wrt subsequent I/O on RISC-V anyway, so in the pattern of:

CPU 0:
writel(1, dev);
wmb();
smp_store_release(&x, 1);

CPU 1:
if (smp_load_acquire(&x) == 1)
	writel(2, dev)

then I think it's actually the control dependency in CPU 1 that provides
the expected ordering. That's probably quite fragile.

> Again, this is not at all a NAK - I think we should do this - just
> perhaps a request to add a note to the commit and make people aware of
> the issue.

Right, I'll do that.

Will

  reply	other threads:[~2019-04-05 16:30 UTC|newest]

Thread overview: 81+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-04-05 13:59 [PATCH v2 00/21] Remove Mysterious Macro Intended to Obscure Weird Behaviours (mmiowb()) Will Deacon
2019-04-05 13:59 ` Will Deacon
2019-04-05 13:59 ` [PATCH v2 01/21] docs/memory-barriers.txt: Rewrite "KERNEL I/O BARRIER EFFECTS" section Will Deacon
2019-04-05 13:59   ` Will Deacon
2019-04-10 10:58   ` Ingo Molnar
2019-04-10 10:58     ` Ingo Molnar
2019-04-10 12:28     ` Will Deacon
2019-04-10 12:28       ` Will Deacon
2019-04-10 12:28       ` Will Deacon
2019-04-11 11:00       ` Ingo Molnar
2019-04-11 11:00         ` Ingo Molnar
2019-04-11 22:12   ` Benjamin Herrenschmidt
2019-04-11 22:12     ` Benjamin Herrenschmidt
2019-04-11 22:34     ` Linus Torvalds
2019-04-11 22:34       ` Linus Torvalds
2019-04-12  2:07       ` Benjamin Herrenschmidt
2019-04-12  2:07         ` Benjamin Herrenschmidt
2019-04-12 13:17         ` Will Deacon
2019-04-12 13:17           ` Will Deacon
2019-04-15  4:05           ` Benjamin Herrenschmidt
2019-04-15  4:05             ` Benjamin Herrenschmidt
2019-04-16  9:13             ` Will Deacon
2019-04-16  9:13               ` Will Deacon
2019-04-05 13:59 ` [PATCH v2 02/21] asm-generic/mmiowb: Add generic implementation of mmiowb() tracking Will Deacon
2019-04-05 13:59   ` Will Deacon
2019-04-05 13:59 ` [PATCH v2 03/21] arch: Use asm-generic header for asm/mmiowb.h Will Deacon
2019-04-05 13:59   ` Will Deacon
2019-04-05 13:59 ` [PATCH v2 04/21] mmiowb: Hook up mmiowb helpers to spinlocks and generic I/O accessors Will Deacon
2019-04-05 13:59   ` Will Deacon
2019-04-05 13:59 ` [PATCH v2 05/21] ARM/io: Remove useless definition of mmiowb() Will Deacon
2019-04-05 13:59   ` Will Deacon
2019-04-05 13:59 ` [PATCH v2 06/21] arm64/io: " Will Deacon
2019-04-05 13:59   ` Will Deacon
2019-04-05 13:59 ` [PATCH v2 07/21] x86/io: " Will Deacon
2019-04-05 13:59   ` Will Deacon
2019-04-05 14:14   ` Thomas Gleixner
2019-04-05 14:14     ` Thomas Gleixner
2019-04-05 13:59 ` [PATCH v2 08/21] nds32/io: " Will Deacon
2019-04-05 13:59   ` Will Deacon
2019-04-05 13:59 ` [PATCH v2 09/21] m68k/io: " Will Deacon
2019-04-05 13:59   ` Will Deacon
2019-04-05 13:59 ` [PATCH v2 10/21] sh/mmiowb: Add unconditional mmiowb() to arch_spin_unlock() Will Deacon
2019-04-05 13:59   ` Will Deacon
2019-04-05 13:59 ` [PATCH v2 11/21] mips/mmiowb: " Will Deacon
2019-04-05 13:59   ` Will Deacon
2019-04-05 13:59 ` [PATCH v2 12/21] ia64/mmiowb: " Will Deacon
2019-04-05 13:59   ` Will Deacon
2019-04-05 13:59 ` [PATCH v2 13/21] powerpc/mmiowb: Hook up mmwiob() implementation to asm-generic code Will Deacon
2019-04-05 13:59   ` Will Deacon
2019-04-05 13:59 ` [PATCH v2 14/21] riscv/mmiowb: " Will Deacon
2019-04-05 13:59   ` Will Deacon
2019-04-05 13:59 ` [PATCH v2 15/21] Documentation: Kill all references to mmiowb() Will Deacon
2019-04-05 13:59   ` Will Deacon
2019-04-05 13:59 ` [PATCH v2 16/21] drivers: Remove useless trailing comments from mmiowb() invocations Will Deacon
2019-04-05 13:59   ` Will Deacon
2019-04-05 13:59 ` [PATCH v2 17/21] drivers: Remove explicit invocations of mmiowb() Will Deacon
2019-04-05 13:59   ` Will Deacon
2019-04-05 15:50   ` Linus Torvalds
2019-04-05 15:50     ` Linus Torvalds
2019-04-09  9:00     ` Nicholas Piggin
2019-04-09  9:00       ` Nicholas Piggin
2019-04-09 13:46       ` Will Deacon
2019-04-09 13:46         ` Will Deacon
2019-04-10  0:25         ` Nicholas Piggin
2019-04-10  0:25           ` Nicholas Piggin
2019-04-05 13:59 ` [PATCH v2 18/21] scsi/qla1280: Remove stale comment about mmiowb() Will Deacon
2019-04-05 13:59   ` Will Deacon
2019-04-05 13:59 ` [PATCH v2 19/21] i40iw: Redefine i40iw_mmiowb() to do nothing Will Deacon
2019-04-05 13:59   ` Will Deacon
2019-04-05 13:59 ` [PATCH v2 20/21] net/ethernet/silan/sc92031: Remove stale comment about mmiowb() Will Deacon
2019-04-05 13:59   ` Will Deacon
2019-04-05 13:59 ` [PATCH v2 21/21] arch: Remove dummy mmiowb() definitions from arch code Will Deacon
2019-04-05 13:59   ` Will Deacon
2019-04-05 15:55 ` [PATCH v2 00/21] Remove Mysterious Macro Intended to Obscure Weird Behaviours (mmiowb()) Linus Torvalds
2019-04-05 15:55   ` Linus Torvalds
2019-04-05 16:09   ` Will Deacon
2019-04-05 16:09     ` Will Deacon
2019-04-05 16:15     ` Linus Torvalds
2019-04-05 16:15       ` Linus Torvalds
2019-04-05 16:30       ` Will Deacon [this message]
2019-04-05 16:30         ` Will Deacon

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