* [PATCH] drm/i915/ehl: Inherit Ice Lake conditional code @ 2019-04-11 23:08 Rodrigo Vivi 2019-04-11 23:16 ` Souza, Jose ` (3 more replies) 0 siblings, 4 replies; 7+ messages in thread From: Rodrigo Vivi @ 2019-04-11 23:08 UTC (permalink / raw) To: intel-gfx; +Cc: Lucas De Marchi From: Bob Paauwe <bob.j.paauwe@intel.com> Most of the conditional code for ICELAKE also applies to ELKHARTLAKE so use IS_GEN(dev_priv, 11) even for PM and Workarounds for now. v2: - Rename commit (Jose) - Include a wm workaround (Jose and Lucas) - Include display core init (Jose and Lucas) Cc: José Roberto de Souza <jose.souza@intel.com> Cc: Lucas De Marchi <lucas.demarchi@intel.com> Signed-off-by: Bob Paauwe <bob.j.paauwe@intel.com> Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com> --- drivers/gpu/drm/i915/intel_pm.c | 6 +++--- drivers/gpu/drm/i915/intel_runtime_pm.c | 6 +++--- drivers/gpu/drm/i915/intel_workarounds.c | 8 ++++---- 3 files changed, 10 insertions(+), 10 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c index 8e826a6ab62e..7357bddf9ad9 100644 --- a/drivers/gpu/drm/i915/intel_pm.c +++ b/drivers/gpu/drm/i915/intel_pm.c @@ -4530,10 +4530,10 @@ skl_allocate_pipe_ddb(struct intel_crtc_state *cstate, memset(&wm->wm[level], 0, sizeof(wm->wm[level])); /* - * Wa_1408961008:icl + * Wa_1408961008:icl, ehl * Underruns with WM1+ disabled */ - if (IS_ICELAKE(dev_priv) && + if (IS_GEN(dev_priv, 11) && level == 1 && wm->wm[0].plane_en) { wm->wm[level].plane_res_b = wm->wm[0].plane_res_b; wm->wm[level].plane_res_l = wm->wm[0].plane_res_l; @@ -9573,7 +9573,7 @@ static void nop_init_clock_gating(struct drm_i915_private *dev_priv) */ void intel_init_clock_gating_hooks(struct drm_i915_private *dev_priv) { - if (IS_ICELAKE(dev_priv)) + if (IS_GEN(dev_priv, 11)) dev_priv->display.init_clock_gating = icl_init_clock_gating; else if (IS_CANNONLAKE(dev_priv)) dev_priv->display.init_clock_gating = cnl_init_clock_gating; diff --git a/drivers/gpu/drm/i915/intel_runtime_pm.c b/drivers/gpu/drm/i915/intel_runtime_pm.c index 3107a742d8ad..fcd388e8978b 100644 --- a/drivers/gpu/drm/i915/intel_runtime_pm.c +++ b/drivers/gpu/drm/i915/intel_runtime_pm.c @@ -3448,7 +3448,7 @@ int intel_power_domains_init(struct drm_i915_private *dev_priv) * The enabling order will be from lower to higher indexed wells, * the disabling order is reversed. */ - if (IS_ICELAKE(dev_priv)) { + if (IS_GEN(dev_priv, 11)) { err = set_power_wells(power_domains, icl_power_wells); } else if (IS_CANNONLAKE(dev_priv)) { err = set_power_wells(power_domains, cnl_power_wells); @@ -4061,7 +4061,7 @@ void intel_power_domains_init_hw(struct drm_i915_private *i915, bool resume) power_domains->initializing = true; - if (IS_ICELAKE(i915)) { + if (INTEL_GEN(i915) >= 11) { icl_display_core_init(i915, resume); } else if (IS_CANNONLAKE(i915)) { cnl_display_core_init(i915, resume); @@ -4209,7 +4209,7 @@ void intel_power_domains_suspend(struct drm_i915_private *i915, intel_power_domains_verify_state(i915); } - if (IS_ICELAKE(i915)) + if (IS_GEN(i915, 11)) icl_display_core_uninit(i915); else if (IS_CANNONLAKE(i915)) cnl_display_core_uninit(i915); diff --git a/drivers/gpu/drm/i915/intel_workarounds.c b/drivers/gpu/drm/i915/intel_workarounds.c index a04dbc58ec1c..c0977036db79 100644 --- a/drivers/gpu/drm/i915/intel_workarounds.c +++ b/drivers/gpu/drm/i915/intel_workarounds.c @@ -569,7 +569,7 @@ void intel_engine_init_ctx_wa(struct intel_engine_cs *engine) wa_init_start(wal, "context"); - if (IS_ICELAKE(i915)) + if (IS_GEN(i915, 11)) icl_ctx_workarounds_init(engine); else if (IS_CANNONLAKE(i915)) cnl_ctx_workarounds_init(engine); @@ -867,7 +867,7 @@ icl_gt_workarounds_init(struct drm_i915_private *i915, struct i915_wa_list *wal) static void gt_init_workarounds(struct drm_i915_private *i915, struct i915_wa_list *wal) { - if (IS_ICELAKE(i915)) + if (IS_GEN(i915, 11)) icl_gt_workarounds_init(i915, wal); else if (IS_CANNONLAKE(i915)) cnl_gt_workarounds_init(i915, wal); @@ -1064,7 +1064,7 @@ void intel_engine_init_whitelist(struct intel_engine_cs *engine) wa_init_start(w, "whitelist"); - if (IS_ICELAKE(i915)) + if (IS_GEN(i915, 11)) icl_whitelist_build(w); else if (IS_CANNONLAKE(i915)) cnl_whitelist_build(w); @@ -1112,7 +1112,7 @@ rcs_engine_wa_init(struct intel_engine_cs *engine, struct i915_wa_list *wal) { struct drm_i915_private *i915 = engine->i915; - if (IS_ICELAKE(i915)) { + if (IS_GEN(i915, 11)) { /* This is not an Wa. Enable for better image quality */ wa_masked_en(wal, _3D_CHICKEN3, -- 2.20.1 _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply related [flat|nested] 7+ messages in thread
* Re: [PATCH] drm/i915/ehl: Inherit Ice Lake conditional code 2019-04-11 23:08 [PATCH] drm/i915/ehl: Inherit Ice Lake conditional code Rodrigo Vivi @ 2019-04-11 23:16 ` Souza, Jose 2019-04-11 23:51 ` Rodrigo Vivi 2019-04-12 1:22 ` ✓ Fi.CI.BAT: success for " Patchwork ` (2 subsequent siblings) 3 siblings, 1 reply; 7+ messages in thread From: Souza, Jose @ 2019-04-11 23:16 UTC (permalink / raw) To: Vivi, Rodrigo, intel-gfx; +Cc: De Marchi, Lucas [-- Attachment #1.1: Type: text/plain, Size: 5041 bytes --] On Thu, 2019-04-11 at 16:08 -0700, Rodrigo Vivi wrote: > From: Bob Paauwe <bob.j.paauwe@intel.com> > > Most of the conditional code for ICELAKE also applies to ELKHARTLAKE > so use IS_GEN(dev_priv, 11) even for PM and Workarounds for now. > > v2: - Rename commit (Jose) > - Include a wm workaround (Jose and Lucas) > - Include display core init (Jose and Lucas) > > Cc: José Roberto de Souza <jose.souza@intel.com> > Cc: Lucas De Marchi <lucas.demarchi@intel.com> > Signed-off-by: Bob Paauwe <bob.j.paauwe@intel.com> > Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com> > --- > drivers/gpu/drm/i915/intel_pm.c | 6 +++--- > drivers/gpu/drm/i915/intel_runtime_pm.c | 6 +++--- > drivers/gpu/drm/i915/intel_workarounds.c | 8 ++++---- > 3 files changed, 10 insertions(+), 10 deletions(-) > > diff --git a/drivers/gpu/drm/i915/intel_pm.c > b/drivers/gpu/drm/i915/intel_pm.c > index 8e826a6ab62e..7357bddf9ad9 100644 > --- a/drivers/gpu/drm/i915/intel_pm.c > +++ b/drivers/gpu/drm/i915/intel_pm.c > @@ -4530,10 +4530,10 @@ skl_allocate_pipe_ddb(struct intel_crtc_state > *cstate, > memset(&wm->wm[level], 0, sizeof(wm- > >wm[level])); > > /* > - * Wa_1408961008:icl > + * Wa_1408961008:icl, ehl > * Underruns with WM1+ disabled > */ > - if (IS_ICELAKE(dev_priv) && > + if (IS_GEN(dev_priv, 11) && > level == 1 && wm->wm[0].plane_en) { > wm->wm[level].plane_res_b = wm- > >wm[0].plane_res_b; > wm->wm[level].plane_res_l = wm- > >wm[0].plane_res_l; > @@ -9573,7 +9573,7 @@ static void nop_init_clock_gating(struct > drm_i915_private *dev_priv) > */ > void intel_init_clock_gating_hooks(struct drm_i915_private > *dev_priv) > { > - if (IS_ICELAKE(dev_priv)) > + if (IS_GEN(dev_priv, 11)) > dev_priv->display.init_clock_gating = > icl_init_clock_gating; > else if (IS_CANNONLAKE(dev_priv)) > dev_priv->display.init_clock_gating = > cnl_init_clock_gating; > diff --git a/drivers/gpu/drm/i915/intel_runtime_pm.c > b/drivers/gpu/drm/i915/intel_runtime_pm.c > index 3107a742d8ad..fcd388e8978b 100644 > --- a/drivers/gpu/drm/i915/intel_runtime_pm.c > +++ b/drivers/gpu/drm/i915/intel_runtime_pm.c > @@ -3448,7 +3448,7 @@ int intel_power_domains_init(struct > drm_i915_private *dev_priv) > * The enabling order will be from lower to higher indexed > wells, > * the disabling order is reversed. > */ > - if (IS_ICELAKE(dev_priv)) { > + if (IS_GEN(dev_priv, 11)) { > err = set_power_wells(power_domains, icl_power_wells); > } else if (IS_CANNONLAKE(dev_priv)) { > err = set_power_wells(power_domains, cnl_power_wells); > @@ -4061,7 +4061,7 @@ void intel_power_domains_init_hw(struct > drm_i915_private *i915, bool resume) > > power_domains->initializing = true; > > - if (IS_ICELAKE(i915)) { > + if (INTEL_GEN(i915) >= 11) { > icl_display_core_init(i915, resume); > } else if (IS_CANNONLAKE(i915)) { > cnl_display_core_init(i915, resume); > @@ -4209,7 +4209,7 @@ void intel_power_domains_suspend(struct > drm_i915_private *i915, > intel_power_domains_verify_state(i915); > } > > - if (IS_ICELAKE(i915)) > + if (IS_GEN(i915, 11)) To be consistent with init: if (INTEL_GEN(i915) >= 11) Other than that: Reviewed-by: José Roberto de Souza <jose.souza@intel.com> > icl_display_core_uninit(i915); > else if (IS_CANNONLAKE(i915)) > cnl_display_core_uninit(i915); > diff --git a/drivers/gpu/drm/i915/intel_workarounds.c > b/drivers/gpu/drm/i915/intel_workarounds.c > index a04dbc58ec1c..c0977036db79 100644 > --- a/drivers/gpu/drm/i915/intel_workarounds.c > +++ b/drivers/gpu/drm/i915/intel_workarounds.c > @@ -569,7 +569,7 @@ void intel_engine_init_ctx_wa(struct > intel_engine_cs *engine) > > wa_init_start(wal, "context"); > > - if (IS_ICELAKE(i915)) > + if (IS_GEN(i915, 11)) > icl_ctx_workarounds_init(engine); > else if (IS_CANNONLAKE(i915)) > cnl_ctx_workarounds_init(engine); > @@ -867,7 +867,7 @@ icl_gt_workarounds_init(struct drm_i915_private > *i915, struct i915_wa_list *wal) > static void > gt_init_workarounds(struct drm_i915_private *i915, struct > i915_wa_list *wal) > { > - if (IS_ICELAKE(i915)) > + if (IS_GEN(i915, 11)) > icl_gt_workarounds_init(i915, wal); > else if (IS_CANNONLAKE(i915)) > cnl_gt_workarounds_init(i915, wal); > @@ -1064,7 +1064,7 @@ void intel_engine_init_whitelist(struct > intel_engine_cs *engine) > > wa_init_start(w, "whitelist"); > > - if (IS_ICELAKE(i915)) > + if (IS_GEN(i915, 11)) > icl_whitelist_build(w); > else if (IS_CANNONLAKE(i915)) > cnl_whitelist_build(w); > @@ -1112,7 +1112,7 @@ rcs_engine_wa_init(struct intel_engine_cs > *engine, struct i915_wa_list *wal) > { > struct drm_i915_private *i915 = engine->i915; > > - if (IS_ICELAKE(i915)) { > + if (IS_GEN(i915, 11)) { > /* This is not an Wa. Enable for better image quality > */ > wa_masked_en(wal, > _3D_CHICKEN3, [-- Attachment #1.2: This is a digitally signed message part --] [-- Type: application/pgp-signature, Size: 488 bytes --] [-- Attachment #2: Type: text/plain, Size: 159 bytes --] _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [PATCH] drm/i915/ehl: Inherit Ice Lake conditional code 2019-04-11 23:16 ` Souza, Jose @ 2019-04-11 23:51 ` Rodrigo Vivi 2019-04-12 14:32 ` Souza, Jose 0 siblings, 1 reply; 7+ messages in thread From: Rodrigo Vivi @ 2019-04-11 23:51 UTC (permalink / raw) To: Souza, Jose; +Cc: intel-gfx, De Marchi, Lucas On Thu, Apr 11, 2019 at 04:16:41PM -0700, Souza, Jose wrote: > On Thu, 2019-04-11 at 16:08 -0700, Rodrigo Vivi wrote: > > From: Bob Paauwe <bob.j.paauwe@intel.com> > > > > Most of the conditional code for ICELAKE also applies to ELKHARTLAKE > > so use IS_GEN(dev_priv, 11) even for PM and Workarounds for now. > > > > v2: - Rename commit (Jose) > > - Include a wm workaround (Jose and Lucas) > > - Include display core init (Jose and Lucas) > > > > Cc: José Roberto de Souza <jose.souza@intel.com> > > Cc: Lucas De Marchi <lucas.demarchi@intel.com> > > Signed-off-by: Bob Paauwe <bob.j.paauwe@intel.com> > > Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com> > > --- > > drivers/gpu/drm/i915/intel_pm.c | 6 +++--- > > drivers/gpu/drm/i915/intel_runtime_pm.c | 6 +++--- > > drivers/gpu/drm/i915/intel_workarounds.c | 8 ++++---- > > 3 files changed, 10 insertions(+), 10 deletions(-) > > > > diff --git a/drivers/gpu/drm/i915/intel_pm.c > > b/drivers/gpu/drm/i915/intel_pm.c > > index 8e826a6ab62e..7357bddf9ad9 100644 > > --- a/drivers/gpu/drm/i915/intel_pm.c > > +++ b/drivers/gpu/drm/i915/intel_pm.c > > @@ -4530,10 +4530,10 @@ skl_allocate_pipe_ddb(struct intel_crtc_state > > *cstate, > > memset(&wm->wm[level], 0, sizeof(wm- > > >wm[level])); > > > > /* > > - * Wa_1408961008:icl > > + * Wa_1408961008:icl, ehl > > * Underruns with WM1+ disabled > > */ > > - if (IS_ICELAKE(dev_priv) && > > + if (IS_GEN(dev_priv, 11) && > > level == 1 && wm->wm[0].plane_en) { > > wm->wm[level].plane_res_b = wm- > > >wm[0].plane_res_b; > > wm->wm[level].plane_res_l = wm- > > >wm[0].plane_res_l; > > @@ -9573,7 +9573,7 @@ static void nop_init_clock_gating(struct > > drm_i915_private *dev_priv) > > */ > > void intel_init_clock_gating_hooks(struct drm_i915_private > > *dev_priv) > > { > > - if (IS_ICELAKE(dev_priv)) > > + if (IS_GEN(dev_priv, 11)) > > dev_priv->display.init_clock_gating = > > icl_init_clock_gating; > > else if (IS_CANNONLAKE(dev_priv)) > > dev_priv->display.init_clock_gating = > > cnl_init_clock_gating; > > diff --git a/drivers/gpu/drm/i915/intel_runtime_pm.c > > b/drivers/gpu/drm/i915/intel_runtime_pm.c > > index 3107a742d8ad..fcd388e8978b 100644 > > --- a/drivers/gpu/drm/i915/intel_runtime_pm.c > > +++ b/drivers/gpu/drm/i915/intel_runtime_pm.c > > @@ -3448,7 +3448,7 @@ int intel_power_domains_init(struct > > drm_i915_private *dev_priv) > > * The enabling order will be from lower to higher indexed > > wells, > > * the disabling order is reversed. > > */ > > - if (IS_ICELAKE(dev_priv)) { > > + if (IS_GEN(dev_priv, 11)) { > > err = set_power_wells(power_domains, icl_power_wells); > > } else if (IS_CANNONLAKE(dev_priv)) { > > err = set_power_wells(power_domains, cnl_power_wells); > > @@ -4061,7 +4061,7 @@ void intel_power_domains_init_hw(struct > > drm_i915_private *i915, bool resume) > > > > power_domains->initializing = true; > > > > - if (IS_ICELAKE(i915)) { > > + if (INTEL_GEN(i915) >= 11) { > > icl_display_core_init(i915, resume); > > } else if (IS_CANNONLAKE(i915)) { > > cnl_display_core_init(i915, resume); > > @@ -4209,7 +4209,7 @@ void intel_power_domains_suspend(struct > > drm_i915_private *i915, > > intel_power_domains_verify_state(i915); > > } > > > > - if (IS_ICELAKE(i915)) > > + if (IS_GEN(i915, 11)) > > To be consistent with init: if (INTEL_GEN(i915) >= 11) hmmm... I tried to keep power well stuff not using this greater-than behaviour on purpose... Because so far all platforms had different wells, besides gen9_bc group of course... But even display_10 glk and cnl are different on display wells :/ > > Other than that: > > Reviewed-by: José Roberto de Souza <jose.souza@intel.com> > > > icl_display_core_uninit(i915); > > else if (IS_CANNONLAKE(i915)) > > cnl_display_core_uninit(i915); > > diff --git a/drivers/gpu/drm/i915/intel_workarounds.c > > b/drivers/gpu/drm/i915/intel_workarounds.c > > index a04dbc58ec1c..c0977036db79 100644 > > --- a/drivers/gpu/drm/i915/intel_workarounds.c > > +++ b/drivers/gpu/drm/i915/intel_workarounds.c > > @@ -569,7 +569,7 @@ void intel_engine_init_ctx_wa(struct > > intel_engine_cs *engine) > > > > wa_init_start(wal, "context"); > > > > - if (IS_ICELAKE(i915)) > > + if (IS_GEN(i915, 11)) > > icl_ctx_workarounds_init(engine); > > else if (IS_CANNONLAKE(i915)) > > cnl_ctx_workarounds_init(engine); > > @@ -867,7 +867,7 @@ icl_gt_workarounds_init(struct drm_i915_private > > *i915, struct i915_wa_list *wal) > > static void > > gt_init_workarounds(struct drm_i915_private *i915, struct > > i915_wa_list *wal) > > { > > - if (IS_ICELAKE(i915)) > > + if (IS_GEN(i915, 11)) > > icl_gt_workarounds_init(i915, wal); > > else if (IS_CANNONLAKE(i915)) > > cnl_gt_workarounds_init(i915, wal); > > @@ -1064,7 +1064,7 @@ void intel_engine_init_whitelist(struct > > intel_engine_cs *engine) > > > > wa_init_start(w, "whitelist"); > > > > - if (IS_ICELAKE(i915)) > > + if (IS_GEN(i915, 11)) > > icl_whitelist_build(w); > > else if (IS_CANNONLAKE(i915)) > > cnl_whitelist_build(w); > > @@ -1112,7 +1112,7 @@ rcs_engine_wa_init(struct intel_engine_cs > > *engine, struct i915_wa_list *wal) > > { > > struct drm_i915_private *i915 = engine->i915; > > > > - if (IS_ICELAKE(i915)) { > > + if (IS_GEN(i915, 11)) { > > /* This is not an Wa. Enable for better image quality > > */ > > wa_masked_en(wal, > > _3D_CHICKEN3, _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [PATCH] drm/i915/ehl: Inherit Ice Lake conditional code 2019-04-11 23:51 ` Rodrigo Vivi @ 2019-04-12 14:32 ` Souza, Jose 0 siblings, 0 replies; 7+ messages in thread From: Souza, Jose @ 2019-04-12 14:32 UTC (permalink / raw) To: Vivi, Rodrigo; +Cc: intel-gfx, De Marchi, Lucas [-- Attachment #1.1: Type: text/plain, Size: 6388 bytes --] On Thu, 2019-04-11 at 16:51 -0700, Rodrigo Vivi wrote: > On Thu, Apr 11, 2019 at 04:16:41PM -0700, Souza, Jose wrote: > > On Thu, 2019-04-11 at 16:08 -0700, Rodrigo Vivi wrote: > > > From: Bob Paauwe <bob.j.paauwe@intel.com> > > > > > > Most of the conditional code for ICELAKE also applies to > > > ELKHARTLAKE > > > so use IS_GEN(dev_priv, 11) even for PM and Workarounds for now. > > > > > > v2: - Rename commit (Jose) > > > - Include a wm workaround (Jose and Lucas) > > > - Include display core init (Jose and Lucas) > > > > > > Cc: José Roberto de Souza <jose.souza@intel.com> > > > Cc: Lucas De Marchi <lucas.demarchi@intel.com> > > > Signed-off-by: Bob Paauwe <bob.j.paauwe@intel.com> > > > Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com> > > > --- > > > drivers/gpu/drm/i915/intel_pm.c | 6 +++--- > > > drivers/gpu/drm/i915/intel_runtime_pm.c | 6 +++--- > > > drivers/gpu/drm/i915/intel_workarounds.c | 8 ++++---- > > > 3 files changed, 10 insertions(+), 10 deletions(-) > > > > > > diff --git a/drivers/gpu/drm/i915/intel_pm.c > > > b/drivers/gpu/drm/i915/intel_pm.c > > > index 8e826a6ab62e..7357bddf9ad9 100644 > > > --- a/drivers/gpu/drm/i915/intel_pm.c > > > +++ b/drivers/gpu/drm/i915/intel_pm.c > > > @@ -4530,10 +4530,10 @@ skl_allocate_pipe_ddb(struct > > > intel_crtc_state > > > *cstate, > > > memset(&wm->wm[level], 0, sizeof(wm- > > > > wm[level])); > > > > > > /* > > > - * Wa_1408961008:icl > > > + * Wa_1408961008:icl, ehl > > > * Underruns with WM1+ disabled > > > */ > > > - if (IS_ICELAKE(dev_priv) && > > > + if (IS_GEN(dev_priv, 11) && > > > level == 1 && wm->wm[0].plane_en) { > > > wm->wm[level].plane_res_b = wm- > > > > wm[0].plane_res_b; > > > wm->wm[level].plane_res_l = wm- > > > > wm[0].plane_res_l; > > > @@ -9573,7 +9573,7 @@ static void nop_init_clock_gating(struct > > > drm_i915_private *dev_priv) > > > */ > > > void intel_init_clock_gating_hooks(struct drm_i915_private > > > *dev_priv) > > > { > > > - if (IS_ICELAKE(dev_priv)) > > > + if (IS_GEN(dev_priv, 11)) > > > dev_priv->display.init_clock_gating = > > > icl_init_clock_gating; > > > else if (IS_CANNONLAKE(dev_priv)) > > > dev_priv->display.init_clock_gating = > > > cnl_init_clock_gating; > > > diff --git a/drivers/gpu/drm/i915/intel_runtime_pm.c > > > b/drivers/gpu/drm/i915/intel_runtime_pm.c > > > index 3107a742d8ad..fcd388e8978b 100644 > > > --- a/drivers/gpu/drm/i915/intel_runtime_pm.c > > > +++ b/drivers/gpu/drm/i915/intel_runtime_pm.c > > > @@ -3448,7 +3448,7 @@ int intel_power_domains_init(struct > > > drm_i915_private *dev_priv) > > > * The enabling order will be from lower to higher indexed > > > wells, > > > * the disabling order is reversed. > > > */ > > > - if (IS_ICELAKE(dev_priv)) { > > > + if (IS_GEN(dev_priv, 11)) { > > > err = set_power_wells(power_domains, icl_power_wells); > > > } else if (IS_CANNONLAKE(dev_priv)) { > > > err = set_power_wells(power_domains, cnl_power_wells); > > > @@ -4061,7 +4061,7 @@ void intel_power_domains_init_hw(struct > > > drm_i915_private *i915, bool resume) > > > > > > power_domains->initializing = true; > > > > > > - if (IS_ICELAKE(i915)) { > > > + if (INTEL_GEN(i915) >= 11) { > > > icl_display_core_init(i915, resume); > > > } else if (IS_CANNONLAKE(i915)) { > > > cnl_display_core_init(i915, resume); > > > @@ -4209,7 +4209,7 @@ void intel_power_domains_suspend(struct > > > drm_i915_private *i915, > > > intel_power_domains_verify_state(i915); > > > } > > > > > > - if (IS_ICELAKE(i915)) > > > + if (IS_GEN(i915, 11)) > > > > To be consistent with init: if (INTEL_GEN(i915) >= 11) > > hmmm... I tried to keep power well stuff not using this > greater-than behaviour on purpose... Because so far all > platforms had different wells, besides gen9_bc group of course... > > But even display_10 glk and cnl are different on display wells :/ I guess you are talking about different things, I'm talking about the icl_display_core_uninit() call. if (INTEL_GEN(i915) >= 11) { icl_display_core_init(i915, resume); if (IS_GEN(i915, 11)) icl_display_core_uninit(i915); And for core_init/uninit we are able to share the sequence between several platforms of the same GEN. > > > Other than that: > > > > Reviewed-by: José Roberto de Souza <jose.souza@intel.com> > > > > > icl_display_core_uninit(i915); > > > else if (IS_CANNONLAKE(i915)) > > > cnl_display_core_uninit(i915); > > > diff --git a/drivers/gpu/drm/i915/intel_workarounds.c > > > b/drivers/gpu/drm/i915/intel_workarounds.c > > > index a04dbc58ec1c..c0977036db79 100644 > > > --- a/drivers/gpu/drm/i915/intel_workarounds.c > > > +++ b/drivers/gpu/drm/i915/intel_workarounds.c > > > @@ -569,7 +569,7 @@ void intel_engine_init_ctx_wa(struct > > > intel_engine_cs *engine) > > > > > > wa_init_start(wal, "context"); > > > > > > - if (IS_ICELAKE(i915)) > > > + if (IS_GEN(i915, 11)) > > > icl_ctx_workarounds_init(engine); > > > else if (IS_CANNONLAKE(i915)) > > > cnl_ctx_workarounds_init(engine); > > > @@ -867,7 +867,7 @@ icl_gt_workarounds_init(struct > > > drm_i915_private > > > *i915, struct i915_wa_list *wal) > > > static void > > > gt_init_workarounds(struct drm_i915_private *i915, struct > > > i915_wa_list *wal) > > > { > > > - if (IS_ICELAKE(i915)) > > > + if (IS_GEN(i915, 11)) > > > icl_gt_workarounds_init(i915, wal); > > > else if (IS_CANNONLAKE(i915)) > > > cnl_gt_workarounds_init(i915, wal); > > > @@ -1064,7 +1064,7 @@ void intel_engine_init_whitelist(struct > > > intel_engine_cs *engine) > > > > > > wa_init_start(w, "whitelist"); > > > > > > - if (IS_ICELAKE(i915)) > > > + if (IS_GEN(i915, 11)) > > > icl_whitelist_build(w); > > > else if (IS_CANNONLAKE(i915)) > > > cnl_whitelist_build(w); > > > @@ -1112,7 +1112,7 @@ rcs_engine_wa_init(struct intel_engine_cs > > > *engine, struct i915_wa_list *wal) > > > { > > > struct drm_i915_private *i915 = engine->i915; > > > > > > - if (IS_ICELAKE(i915)) { > > > + if (IS_GEN(i915, 11)) { > > > /* This is not an Wa. Enable for better image quality > > > */ > > > wa_masked_en(wal, > > > _3D_CHICKEN3, > > [-- Attachment #1.2: This is a digitally signed message part --] [-- Type: application/pgp-signature, Size: 488 bytes --] [-- Attachment #2: Type: text/plain, Size: 159 bytes --] _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 7+ messages in thread
* ✓ Fi.CI.BAT: success for drm/i915/ehl: Inherit Ice Lake conditional code 2019-04-11 23:08 [PATCH] drm/i915/ehl: Inherit Ice Lake conditional code Rodrigo Vivi 2019-04-11 23:16 ` Souza, Jose @ 2019-04-12 1:22 ` Patchwork 2019-04-12 10:46 ` ✗ Fi.CI.IGT: failure " Patchwork 2019-04-12 11:53 ` Patchwork 3 siblings, 0 replies; 7+ messages in thread From: Patchwork @ 2019-04-12 1:22 UTC (permalink / raw) To: Rodrigo Vivi; +Cc: intel-gfx == Series Details == Series: drm/i915/ehl: Inherit Ice Lake conditional code URL : https://patchwork.freedesktop.org/series/59364/ State : success == Summary == CI Bug Log - changes from CI_DRM_5917 -> Patchwork_12770 ==================================================== Summary ------- **SUCCESS** No regressions found. External URL: https://patchwork.freedesktop.org/api/1.0/series/59364/revisions/1/mbox/ Known issues ------------ Here are the changes found in Patchwork_12770 that come from known issues: ### IGT changes ### #### Issues hit #### * igt@gem_exec_basic@gtt-bsd2: - fi-byt-clapper: NOTRUN -> SKIP [fdo#109271] +52 * igt@gem_exec_basic@readonly-bsd1: - fi-snb-2520m: NOTRUN -> SKIP [fdo#109271] +52 * igt@gem_exec_store@basic-bsd2: - fi-hsw-4770: NOTRUN -> SKIP [fdo#109271] +41 * igt@i915_selftest@live_evict: - fi-bsw-kefka: PASS -> DMESG-WARN [fdo#107709] * igt@kms_busy@basic-flip-c: - fi-byt-clapper: NOTRUN -> SKIP [fdo#109271] / [fdo#109278] - fi-snb-2520m: NOTRUN -> SKIP [fdo#109271] / [fdo#109278] * igt@kms_pipe_crc_basic@hang-read-crc-pipe-a: - fi-byt-clapper: NOTRUN -> FAIL [fdo#103191] * igt@runner@aborted: - fi-bsw-kefka: NOTRUN -> FAIL [fdo#107709] #### Possible fixes #### * igt@i915_selftest@live_contexts: - fi-bdw-gvtdvm: DMESG-FAIL [fdo#110235 ] -> PASS * igt@i915_selftest@live_hangcheck: - fi-icl-y: INCOMPLETE [fdo#108569] -> PASS [fdo#103191]: https://bugs.freedesktop.org/show_bug.cgi?id=103191 [fdo#107709]: https://bugs.freedesktop.org/show_bug.cgi?id=107709 [fdo#108569]: https://bugs.freedesktop.org/show_bug.cgi?id=108569 [fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271 [fdo#109278]: https://bugs.freedesktop.org/show_bug.cgi?id=109278 [fdo#110235 ]: https://bugs.freedesktop.org/show_bug.cgi?id=110235 Participating hosts (47 -> 42) ------------------------------ Additional (3): fi-hsw-4770 fi-byt-clapper fi-snb-2520m Missing (8): fi-kbl-soraka fi-hsw-4200u fi-byt-squawks fi-bsw-cyan fi-kbl-guc fi-ctg-p8600 fi-whl-u fi-bdw-samus Build changes ------------- * Linux: CI_DRM_5917 -> Patchwork_12770 CI_DRM_5917: b01c0e68e8d1092c436dbba4d03b260c828f37c9 @ git://anongit.freedesktop.org/gfx-ci/linux IGT_4944: 9b74b8226e8c108db091bd3b1d105a71dc0fb861 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools Patchwork_12770: c187b9fb7d35b64361cd432dddb89a5a295c6b66 @ git://anongit.freedesktop.org/gfx-ci/linux == Linux commits == c187b9fb7d35 drm/i915/ehl: Inherit Ice Lake conditional code == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12770/ _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 7+ messages in thread
* ✗ Fi.CI.IGT: failure for drm/i915/ehl: Inherit Ice Lake conditional code 2019-04-11 23:08 [PATCH] drm/i915/ehl: Inherit Ice Lake conditional code Rodrigo Vivi 2019-04-11 23:16 ` Souza, Jose 2019-04-12 1:22 ` ✓ Fi.CI.BAT: success for " Patchwork @ 2019-04-12 10:46 ` Patchwork 2019-04-12 11:53 ` Patchwork 3 siblings, 0 replies; 7+ messages in thread From: Patchwork @ 2019-04-12 10:46 UTC (permalink / raw) To: Rodrigo Vivi; +Cc: intel-gfx == Series Details == Series: drm/i915/ehl: Inherit Ice Lake conditional code URL : https://patchwork.freedesktop.org/series/59364/ State : failure == Summary == CI Bug Log - changes from CI_DRM_5917_full -> Patchwork_12770_full ==================================================== Summary ------- **FAILURE** Serious unknown changes coming with Patchwork_12770_full absolutely need to be verified manually. If you think the reported changes have nothing to do with the changes introduced in Patchwork_12770_full, please notify your bug team to allow them to document this new failure mode, which will reduce false positives in CI. Possible new issues ------------------- Here are the unknown changes that may have been introduced in Patchwork_12770_full: ### Piglit changes ### #### Possible regressions #### * spec@arb_tessellation_shader@execution@built-in-functions@tcs-op-assign-mult-mat3-mat3 (NEW): - pig-glk-j5005: NOTRUN -> INCOMPLETE +3 New tests --------- New tests have been introduced between CI_DRM_5917_full and Patchwork_12770_full: ### New Piglit tests (4) ### * spec@arb_tessellation_shader@execution@built-in-functions@tcs-dot-float-float: - Statuses : 1 incomplete(s) - Exec time: [0.0] s * spec@arb_tessellation_shader@execution@built-in-functions@tcs-op-assign-div-mat4x3-mat4x3: - Statuses : 1 incomplete(s) - Exec time: [0.0] s * spec@arb_tessellation_shader@execution@built-in-functions@tcs-op-assign-mult-mat3-mat3: - Statuses : 1 incomplete(s) - Exec time: [0.0] s * spec@arb_tessellation_shader@execution@built-in-functions@tcs-op-bitxor-abs-neg-int-int: - Statuses : 1 incomplete(s) - Exec time: [0.0] s Known issues ------------ Here are the changes found in Patchwork_12770_full that come from known issues: ### IGT changes ### #### Issues hit #### * igt@gem_workarounds@suspend-resume-context: - shard-apl: PASS -> DMESG-WARN [fdo#108566] +5 * igt@i915_pm_rc6_residency@rc6-accuracy: - shard-snb: PASS -> SKIP [fdo#109271] * igt@kms_atomic_interruptible@legacy-setmode: - shard-kbl: PASS -> FAIL [fdo#109495] * igt@kms_atomic_transition@5x-modeset-transitions: - shard-apl: NOTRUN -> SKIP [fdo#109271] / [fdo#109278] +1 * igt@kms_busy@extended-modeset-hang-newfb-render-d: - shard-kbl: NOTRUN -> SKIP [fdo#109271] / [fdo#109278] +1 * igt@kms_chamelium@hdmi-edid-change-during-suspend: - shard-apl: NOTRUN -> SKIP [fdo#109271] +23 * igt@kms_fbcon_fbt@psr: - shard-skl: NOTRUN -> FAIL [fdo#103833] * igt@kms_flip@flip-vs-suspend: - shard-kbl: PASS -> INCOMPLETE [fdo#103665] * igt@kms_flip@flip-vs-suspend-interruptible: - shard-skl: NOTRUN -> INCOMPLETE [fdo#109507] * igt@kms_flip@plain-flip-ts-check-interruptible: - shard-skl: NOTRUN -> FAIL [fdo#100368] * igt@kms_flip@single-buffer-flip-vs-dpms-off-vs-modeset: - shard-kbl: PASS -> SKIP [fdo#109271] * igt@kms_frontbuffer_tracking@fbcpsr-1p-offscren-pri-shrfb-draw-pwrite: - shard-iclb: PASS -> FAIL [fdo#103167] +4 * igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-shrfb-msflip-blt: - shard-apl: NOTRUN -> INCOMPLETE [fdo#103927] * igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-indfb-msflip-blt: - shard-kbl: NOTRUN -> SKIP [fdo#109271] +20 * igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-indfb-plflip-blt: - shard-snb: NOTRUN -> SKIP [fdo#109271] +73 * igt@kms_frontbuffer_tracking@psr-1p-primscrn-pri-indfb-draw-mmap-cpu: - shard-iclb: PASS -> FAIL [fdo#109247] +16 * igt@kms_lease@atomic_implicit_crtc: - shard-skl: NOTRUN -> FAIL [fdo#110279] * igt@kms_lease@cursor_implicit_plane: - shard-skl: NOTRUN -> FAIL [fdo#110278] * igt@kms_pipe_crc_basic@suspend-read-crc-pipe-f: - shard-skl: NOTRUN -> SKIP [fdo#109271] / [fdo#109278] +14 * igt@kms_plane@pixel-format-pipe-a-planes-source-clamping: - shard-glk: PASS -> SKIP [fdo#109271] +1 * igt@kms_plane_alpha_blend@pipe-b-alpha-basic: - shard-apl: NOTRUN -> FAIL [fdo#108145] * igt@kms_plane_alpha_blend@pipe-c-alpha-7efc: - shard-skl: NOTRUN -> FAIL [fdo#108145] +3 * igt@kms_plane_scaling@pipe-a-scaler-with-clipping-clamping: - shard-glk: PASS -> SKIP [fdo#109271] / [fdo#109278] +1 * igt@kms_psr2_su@page_flip: - shard-iclb: PASS -> SKIP [fdo#109642] * igt@kms_psr@primary_mmap_cpu: - shard-iclb: PASS -> FAIL [fdo#107383] / [fdo#110215] +2 * igt@kms_psr@psr2_primary_mmap_cpu: - shard-iclb: PASS -> SKIP [fdo#109441] +2 * igt@kms_rotation_crc@multiplane-rotation-cropping-top: - shard-kbl: PASS -> FAIL [fdo#109016] * igt@kms_setmode@basic: - shard-skl: NOTRUN -> FAIL [fdo#99912] * igt@kms_universal_plane@disable-primary-vs-flip-pipe-d: - shard-snb: NOTRUN -> SKIP [fdo#109271] / [fdo#109278] +11 * igt@perf_pmu@busy-accuracy-50-vcs1: - shard-skl: NOTRUN -> SKIP [fdo#109271] +196 * igt@prime_vgem@wait-vebox: - shard-apl: PASS -> INCOMPLETE [fdo#103927] #### Possible fixes #### * igt@i915_pm_rc6_residency@rc6-accuracy: - shard-kbl: SKIP [fdo#109271] -> PASS * igt@kms_cursor_crc@cursor-128x128-suspend: - shard-skl: INCOMPLETE [fdo#104108] -> PASS * igt@kms_dp_dsc@basic-dsc-enable-edp: - shard-iclb: SKIP [fdo#109349] -> PASS * igt@kms_frontbuffer_tracking@fbc-suspend: - shard-apl: DMESG-WARN [fdo#108566] -> PASS +3 * igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-indfb-pgflip-blt: - shard-iclb: FAIL [fdo#103167] -> PASS +2 * igt@kms_frontbuffer_tracking@psr-rgb101010-draw-blt: - shard-iclb: FAIL [fdo#109247] -> PASS +11 * igt@kms_plane@pixel-format-pipe-b-planes-source-clamping: - shard-glk: SKIP [fdo#109271] -> PASS * igt@kms_plane_alpha_blend@pipe-a-constant-alpha-min: - shard-skl: FAIL [fdo#108145] -> PASS * igt@kms_plane_scaling@pipe-c-scaler-with-pixel-format: - shard-glk: SKIP [fdo#109271] / [fdo#109278] -> PASS * igt@kms_psr@cursor_blt: - shard-iclb: FAIL [fdo#107383] / [fdo#110215] -> PASS * igt@kms_psr@psr2_cursor_plane_onoff: - shard-iclb: SKIP [fdo#109441] -> PASS +1 #### Warnings #### * igt@i915_pm_rpm@pc8-residency: - shard-skl: SKIP [fdo#109271] -> INCOMPLETE [fdo#107807] * igt@kms_chamelium@dp-hpd-storm: - shard-apl: SKIP [fdo#109271] -> INCOMPLETE [fdo#103927] * igt@kms_cursor_crc@cursor-128x128-suspend: - shard-apl: DMESG-WARN [fdo#108566] -> INCOMPLETE [fdo#103927] [fdo#100368]: https://bugs.freedesktop.org/show_bug.cgi?id=100368 [fdo#103167]: https://bugs.freedesktop.org/show_bug.cgi?id=103167 [fdo#103665]: https://bugs.freedesktop.org/show_bug.cgi?id=103665 [fdo#103833]: https://bugs.freedesktop.org/show_bug.cgi?id=103833 [fdo#103927]: https://bugs.freedesktop.org/show_bug.cgi?id=103927 [fdo#104108]: https://bugs.freedesktop.org/show_bug.cgi?id=104108 [fdo#107383]: https://bugs.freedesktop.org/show_bug.cgi?id=107383 [fdo#107807]: https://bugs.freedesktop.org/show_bug.cgi?id=107807 [fdo#108145]: https://bugs.freedesktop.org/show_bug.cgi?id=108145 [fdo#108566]: https://bugs.freedesktop.org/show_bug.cgi?id=108566 [fdo#109016]: https://bugs.freedesktop.org/show_bug.cgi?id=109016 [fdo#109247]: https://bugs.freedesktop.org/show_bug.cgi?id=109247 [fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271 [fdo#109278]: https://bugs.freedesktop.org/show_bug.cgi?id=109278 [fdo#109349]: https://bugs.freedesktop.org/show_bug.cgi?id=109349 [fdo#109441]: https://bugs.freedesktop.org/show_bug.cgi?id=109441 [fdo#109495]: https://bugs.freedesktop.org/show_bug.cgi?id=109495 [fdo#109507]: https://bugs.freedesktop.org/show_bug.cgi?id=109507 [fdo#109642]: https://bugs.freedesktop.org/show_bug.cgi?id=109642 [fdo#110215]: https://bugs.freedesktop.org/show_bug.cgi?id=110215 [fdo#110278]: https://bugs.freedesktop.org/show_bug.cgi?id=110278 [fdo#110279]: https://bugs.freedesktop.org/show_bug.cgi?id=110279 [fdo#99912]: https://bugs.freedesktop.org/show_bug.cgi?id=99912 Participating hosts (10 -> 9) ------------------------------ Missing (1): shard-hsw Build changes ------------- * Linux: CI_DRM_5917 -> Patchwork_12770 CI_DRM_5917: b01c0e68e8d1092c436dbba4d03b260c828f37c9 @ git://anongit.freedesktop.org/gfx-ci/linux IGT_4944: 9b74b8226e8c108db091bd3b1d105a71dc0fb861 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools Patchwork_12770: c187b9fb7d35b64361cd432dddb89a5a295c6b66 @ git://anongit.freedesktop.org/gfx-ci/linux piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12770/ _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 7+ messages in thread
* ✗ Fi.CI.IGT: failure for drm/i915/ehl: Inherit Ice Lake conditional code 2019-04-11 23:08 [PATCH] drm/i915/ehl: Inherit Ice Lake conditional code Rodrigo Vivi ` (2 preceding siblings ...) 2019-04-12 10:46 ` ✗ Fi.CI.IGT: failure " Patchwork @ 2019-04-12 11:53 ` Patchwork 3 siblings, 0 replies; 7+ messages in thread From: Patchwork @ 2019-04-12 11:53 UTC (permalink / raw) To: Rodrigo Vivi; +Cc: intel-gfx == Series Details == Series: drm/i915/ehl: Inherit Ice Lake conditional code URL : https://patchwork.freedesktop.org/series/59364/ State : failure == Summary == CI Bug Log - changes from CI_DRM_5917_full -> Patchwork_12770_full ==================================================== Summary ------- **FAILURE** Serious unknown changes coming with Patchwork_12770_full absolutely need to be verified manually. If you think the reported changes have nothing to do with the changes introduced in Patchwork_12770_full, please notify your bug team to allow them to document this new failure mode, which will reduce false positives in CI. Possible new issues ------------------- Here are the unknown changes that may have been introduced in Patchwork_12770_full: ### Piglit changes ### #### Possible regressions #### * spec@arb_tessellation_shader@execution@built-in-functions@tcs-op-assign-mult-mat3-mat3 (NEW): - pig-glk-j5005: NOTRUN -> INCOMPLETE +3 New tests --------- New tests have been introduced between CI_DRM_5917_full and Patchwork_12770_full: ### New Piglit tests (4) ### * spec@arb_tessellation_shader@execution@built-in-functions@tcs-dot-float-float: - Statuses : 1 incomplete(s) - Exec time: [0.0] s * spec@arb_tessellation_shader@execution@built-in-functions@tcs-op-assign-div-mat4x3-mat4x3: - Statuses : 1 incomplete(s) - Exec time: [0.0] s * spec@arb_tessellation_shader@execution@built-in-functions@tcs-op-assign-mult-mat3-mat3: - Statuses : 1 incomplete(s) - Exec time: [0.0] s * spec@arb_tessellation_shader@execution@built-in-functions@tcs-op-bitxor-abs-neg-int-int: - Statuses : 1 incomplete(s) - Exec time: [0.0] s Known issues ------------ Here are the changes found in Patchwork_12770_full that come from known issues: ### IGT changes ### #### Issues hit #### * igt@gem_workarounds@suspend-resume-context: - shard-apl: PASS -> DMESG-WARN [fdo#108566] +5 * igt@i915_pm_rc6_residency@rc6-accuracy: - shard-snb: PASS -> SKIP [fdo#109271] * igt@kms_atomic_interruptible@legacy-setmode: - shard-kbl: PASS -> FAIL [fdo#109495] * igt@kms_atomic_transition@5x-modeset-transitions: - shard-apl: NOTRUN -> SKIP [fdo#109271] / [fdo#109278] +1 * igt@kms_busy@extended-modeset-hang-newfb-render-d: - shard-kbl: NOTRUN -> SKIP [fdo#109271] / [fdo#109278] +1 * igt@kms_chamelium@hdmi-edid-change-during-suspend: - shard-apl: NOTRUN -> SKIP [fdo#109271] +23 * igt@kms_fbcon_fbt@psr: - shard-skl: NOTRUN -> FAIL [fdo#103833] * igt@kms_flip@flip-vs-suspend: - shard-kbl: PASS -> INCOMPLETE [fdo#103665] * igt@kms_flip@flip-vs-suspend-interruptible: - shard-skl: NOTRUN -> INCOMPLETE [fdo#109507] * igt@kms_flip@plain-flip-ts-check-interruptible: - shard-skl: NOTRUN -> FAIL [fdo#100368] * igt@kms_flip@single-buffer-flip-vs-dpms-off-vs-modeset: - shard-kbl: PASS -> SKIP [fdo#109271] * igt@kms_frontbuffer_tracking@fbcpsr-1p-offscren-pri-shrfb-draw-pwrite: - shard-iclb: PASS -> FAIL [fdo#103167] +4 * igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-shrfb-msflip-blt: - shard-apl: NOTRUN -> INCOMPLETE [fdo#103927] * igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-indfb-msflip-blt: - shard-kbl: NOTRUN -> SKIP [fdo#109271] +20 * igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-indfb-plflip-blt: - shard-snb: NOTRUN -> SKIP [fdo#109271] +73 * igt@kms_frontbuffer_tracking@psr-1p-primscrn-pri-indfb-draw-mmap-cpu: - shard-iclb: PASS -> FAIL [fdo#109247] +16 * igt@kms_lease@atomic_implicit_crtc: - shard-skl: NOTRUN -> FAIL [fdo#110279] * igt@kms_lease@cursor_implicit_plane: - shard-skl: NOTRUN -> FAIL [fdo#110278] * igt@kms_pipe_crc_basic@suspend-read-crc-pipe-f: - shard-skl: NOTRUN -> SKIP [fdo#109271] / [fdo#109278] +14 * igt@kms_plane@pixel-format-pipe-a-planes-source-clamping: - shard-glk: PASS -> SKIP [fdo#109271] +1 * igt@kms_plane_alpha_blend@pipe-b-alpha-basic: - shard-apl: NOTRUN -> FAIL [fdo#108145] * igt@kms_plane_alpha_blend@pipe-c-alpha-7efc: - shard-skl: NOTRUN -> FAIL [fdo#108145] +3 * igt@kms_plane_scaling@pipe-a-scaler-with-clipping-clamping: - shard-glk: PASS -> SKIP [fdo#109271] / [fdo#109278] +1 * igt@kms_psr2_su@page_flip: - shard-iclb: PASS -> SKIP [fdo#109642] * igt@kms_psr@primary_mmap_cpu: - shard-iclb: PASS -> FAIL [fdo#107383] / [fdo#110215] +2 * igt@kms_psr@psr2_primary_mmap_cpu: - shard-iclb: PASS -> SKIP [fdo#109441] +2 * igt@kms_rotation_crc@multiplane-rotation-cropping-top: - shard-kbl: PASS -> FAIL [fdo#109016] * igt@kms_setmode@basic: - shard-skl: NOTRUN -> FAIL [fdo#99912] * igt@kms_universal_plane@disable-primary-vs-flip-pipe-d: - shard-snb: NOTRUN -> SKIP [fdo#109271] / [fdo#109278] +11 * igt@perf_pmu@busy-accuracy-50-vcs1: - shard-skl: NOTRUN -> SKIP [fdo#109271] +196 * igt@prime_vgem@wait-vebox: - shard-apl: PASS -> INCOMPLETE [fdo#103927] #### Possible fixes #### * igt@i915_pm_rc6_residency@rc6-accuracy: - shard-kbl: SKIP [fdo#109271] -> PASS * igt@kms_cursor_crc@cursor-128x128-suspend: - shard-skl: INCOMPLETE [fdo#104108] -> PASS * igt@kms_dp_dsc@basic-dsc-enable-edp: - shard-iclb: SKIP [fdo#109349] -> PASS * igt@kms_frontbuffer_tracking@fbc-suspend: - shard-apl: DMESG-WARN [fdo#108566] -> PASS +3 * igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-indfb-pgflip-blt: - shard-iclb: FAIL [fdo#103167] -> PASS +2 * igt@kms_frontbuffer_tracking@psr-rgb101010-draw-blt: - shard-iclb: FAIL [fdo#109247] -> PASS +11 * igt@kms_plane@pixel-format-pipe-b-planes-source-clamping: - shard-glk: SKIP [fdo#109271] -> PASS * igt@kms_plane_alpha_blend@pipe-a-constant-alpha-min: - shard-skl: FAIL [fdo#108145] -> PASS * igt@kms_plane_scaling@pipe-c-scaler-with-pixel-format: - shard-glk: SKIP [fdo#109271] / [fdo#109278] -> PASS * igt@kms_psr@cursor_blt: - shard-iclb: FAIL [fdo#107383] / [fdo#110215] -> PASS * igt@kms_psr@psr2_cursor_plane_onoff: - shard-iclb: SKIP [fdo#109441] -> PASS +1 #### Warnings #### * igt@i915_pm_rpm@pc8-residency: - shard-skl: SKIP [fdo#109271] -> INCOMPLETE [fdo#107807] * igt@kms_chamelium@dp-hpd-storm: - shard-apl: SKIP [fdo#109271] -> INCOMPLETE [fdo#103927] * igt@kms_cursor_crc@cursor-128x128-suspend: - shard-apl: DMESG-WARN [fdo#108566] -> INCOMPLETE [fdo#103927] [fdo#100368]: https://bugs.freedesktop.org/show_bug.cgi?id=100368 [fdo#103167]: https://bugs.freedesktop.org/show_bug.cgi?id=103167 [fdo#103665]: https://bugs.freedesktop.org/show_bug.cgi?id=103665 [fdo#103833]: https://bugs.freedesktop.org/show_bug.cgi?id=103833 [fdo#103927]: https://bugs.freedesktop.org/show_bug.cgi?id=103927 [fdo#104108]: https://bugs.freedesktop.org/show_bug.cgi?id=104108 [fdo#107383]: https://bugs.freedesktop.org/show_bug.cgi?id=107383 [fdo#107807]: https://bugs.freedesktop.org/show_bug.cgi?id=107807 [fdo#108145]: https://bugs.freedesktop.org/show_bug.cgi?id=108145 [fdo#108566]: https://bugs.freedesktop.org/show_bug.cgi?id=108566 [fdo#109016]: https://bugs.freedesktop.org/show_bug.cgi?id=109016 [fdo#109247]: https://bugs.freedesktop.org/show_bug.cgi?id=109247 [fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271 [fdo#109278]: https://bugs.freedesktop.org/show_bug.cgi?id=109278 [fdo#109349]: https://bugs.freedesktop.org/show_bug.cgi?id=109349 [fdo#109441]: https://bugs.freedesktop.org/show_bug.cgi?id=109441 [fdo#109495]: https://bugs.freedesktop.org/show_bug.cgi?id=109495 [fdo#109507]: https://bugs.freedesktop.org/show_bug.cgi?id=109507 [fdo#109642]: https://bugs.freedesktop.org/show_bug.cgi?id=109642 [fdo#110215]: https://bugs.freedesktop.org/show_bug.cgi?id=110215 [fdo#110278]: https://bugs.freedesktop.org/show_bug.cgi?id=110278 [fdo#110279]: https://bugs.freedesktop.org/show_bug.cgi?id=110279 [fdo#99912]: https://bugs.freedesktop.org/show_bug.cgi?id=99912 Participating hosts (10 -> 9) ------------------------------ Missing (1): shard-hsw Build changes ------------- * Linux: CI_DRM_5917 -> Patchwork_12770 CI_DRM_5917: b01c0e68e8d1092c436dbba4d03b260c828f37c9 @ git://anongit.freedesktop.org/gfx-ci/linux IGT_4944: 9b74b8226e8c108db091bd3b1d105a71dc0fb861 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools Patchwork_12770: c187b9fb7d35b64361cd432dddb89a5a295c6b66 @ git://anongit.freedesktop.org/gfx-ci/linux piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_12770/ _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 7+ messages in thread
end of thread, other threads:[~2019-04-12 14:32 UTC | newest] Thread overview: 7+ messages (download: mbox.gz / follow: Atom feed) -- links below jump to the message on this page -- 2019-04-11 23:08 [PATCH] drm/i915/ehl: Inherit Ice Lake conditional code Rodrigo Vivi 2019-04-11 23:16 ` Souza, Jose 2019-04-11 23:51 ` Rodrigo Vivi 2019-04-12 14:32 ` Souza, Jose 2019-04-12 1:22 ` ✓ Fi.CI.BAT: success for " Patchwork 2019-04-12 10:46 ` ✗ Fi.CI.IGT: failure " Patchwork 2019-04-12 11:53 ` Patchwork
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