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From: "Daniel P. Berrangé" <berrange@redhat.com>
To: Pu Wen <puwen@hygon.cn>
Cc: qemu-devel@nongnu.org, pbonzini@redhat.com, rth@twiddle.net,
	ehabkost@redhat.com, mst@redhat.com, marcel.apfelbaum@gmail.com
Subject: Re: [Qemu-devel] [PATCH v2] i386: Add new Hygon 'Dhyana' CPU model
Date: Mon, 15 Apr 2019 10:25:00 +0100	[thread overview]
Message-ID: <20190415092500.GD5718@redhat.com> (raw)
In-Reply-To: <1555124080-27089-1-git-send-email-puwen@hygon.cn>

On Sat, Apr 13, 2019 at 10:54:40AM +0800, Pu Wen wrote:
> Add a new base CPU model called 'Dhyana' to model processors from Hygon
> Dhyana(family 18h), which derived from AMD EPYC(family 17h).
> 
> The following features bits have been removed compare to AMD EPYC:
> aes, pclmulqdq, sha_ni
> 
> The Hygon Dhyana support to KVM in Linux is already accepted upstream[1].
> So add Hygon Dhyana support to Qemu is necessary to create Hygon's own
> CPU model.
> 
> Reference:
> [1] https://git.kernel.org/tip/fec98069fb72fb656304a3e52265e0c2fc9adf87
> 
> Signed-off-by: Pu Wen <puwen@hygon.cn>
> ---
> v1->v2:
>   - Remove CPU model 'Dhyana' and rename the CPU model 'Dhyana-IBPB' to
>     'Dhyana' because Dhyana CPUs already have the IBPB feature.
> 
>  hw/i386/pc.c      |  3 +++
>  target/i386/cpu.c | 50 ++++++++++++++++++++++++++++++++++++++++++++++++++
>  target/i386/cpu.h |  2 ++
>  3 files changed, 55 insertions(+)
> 
> diff --git a/hw/i386/pc.c b/hw/i386/pc.c
> index f2c15bf..551bec9 100644
> --- a/hw/i386/pc.c
> +++ b/hw/i386/pc.c
> @@ -128,6 +128,8 @@ GlobalProperty pc_compat_3_1[] = {
>      { "EPYC" "-" TYPE_X86_CPU, "nrip-save", "off" },
>      { "EPYC-IBPB" "-" TYPE_X86_CPU, "npt", "off" },
>      { "EPYC-IBPB" "-" TYPE_X86_CPU, "nrip-save", "off" },
> +    { "Dhyana" "-" TYPE_X86_CPU, "npt", "off" },
> +    { "Dhyana" "-" TYPE_X86_CPU, "nrip-save", "off" },
>      { "Skylake-Client" "-" TYPE_X86_CPU,      "mpx", "on" },
>      { "Skylake-Client-IBRS" "-" TYPE_X86_CPU, "mpx", "on" },
>      { "Skylake-Server" "-" TYPE_X86_CPU,      "mpx", "on" },
> @@ -152,6 +154,7 @@ GlobalProperty pc_compat_2_12[] = {
>      { TYPE_X86_CPU, "topoext", "off" },
>      { "EPYC-" TYPE_X86_CPU, "xlevel", "0x8000000a" },
>      { "EPYC-IBPB-" TYPE_X86_CPU, "xlevel", "0x8000000a" },
> +    { "Dhyana-" TYPE_X86_CPU, "xlevel", "0x8000000a" },
>  };
>  const size_t pc_compat_2_12_len = G_N_ELEMENTS(pc_compat_2_12);

You can drop the changes in this file. This CPU model didn't exist
in any older QEMU releases, so there's no machine type backcompat
required, at least from upstream QEMU POV.


Regards,
Daniel
-- 
|: https://berrange.com      -o-    https://www.flickr.com/photos/dberrange :|
|: https://libvirt.org         -o-            https://fstop138.berrange.com :|
|: https://entangle-photo.org    -o-    https://www.instagram.com/dberrange :|

WARNING: multiple messages have this Message-ID (diff)
From: "Daniel P. Berrangé" <berrange@redhat.com>
To: Pu Wen <puwen@hygon.cn>
Cc: ehabkost@redhat.com, mst@redhat.com, qemu-devel@nongnu.org,
	pbonzini@redhat.com, rth@twiddle.net
Subject: Re: [Qemu-devel] [PATCH v2] i386: Add new Hygon 'Dhyana' CPU model
Date: Mon, 15 Apr 2019 10:25:00 +0100	[thread overview]
Message-ID: <20190415092500.GD5718@redhat.com> (raw)
Message-ID: <20190415092500.KyW0g7kBOujIGENjPnSBupldE57pGhG1a_ldT3zHTw0@z> (raw)
In-Reply-To: <1555124080-27089-1-git-send-email-puwen@hygon.cn>

On Sat, Apr 13, 2019 at 10:54:40AM +0800, Pu Wen wrote:
> Add a new base CPU model called 'Dhyana' to model processors from Hygon
> Dhyana(family 18h), which derived from AMD EPYC(family 17h).
> 
> The following features bits have been removed compare to AMD EPYC:
> aes, pclmulqdq, sha_ni
> 
> The Hygon Dhyana support to KVM in Linux is already accepted upstream[1].
> So add Hygon Dhyana support to Qemu is necessary to create Hygon's own
> CPU model.
> 
> Reference:
> [1] https://git.kernel.org/tip/fec98069fb72fb656304a3e52265e0c2fc9adf87
> 
> Signed-off-by: Pu Wen <puwen@hygon.cn>
> ---
> v1->v2:
>   - Remove CPU model 'Dhyana' and rename the CPU model 'Dhyana-IBPB' to
>     'Dhyana' because Dhyana CPUs already have the IBPB feature.
> 
>  hw/i386/pc.c      |  3 +++
>  target/i386/cpu.c | 50 ++++++++++++++++++++++++++++++++++++++++++++++++++
>  target/i386/cpu.h |  2 ++
>  3 files changed, 55 insertions(+)
> 
> diff --git a/hw/i386/pc.c b/hw/i386/pc.c
> index f2c15bf..551bec9 100644
> --- a/hw/i386/pc.c
> +++ b/hw/i386/pc.c
> @@ -128,6 +128,8 @@ GlobalProperty pc_compat_3_1[] = {
>      { "EPYC" "-" TYPE_X86_CPU, "nrip-save", "off" },
>      { "EPYC-IBPB" "-" TYPE_X86_CPU, "npt", "off" },
>      { "EPYC-IBPB" "-" TYPE_X86_CPU, "nrip-save", "off" },
> +    { "Dhyana" "-" TYPE_X86_CPU, "npt", "off" },
> +    { "Dhyana" "-" TYPE_X86_CPU, "nrip-save", "off" },
>      { "Skylake-Client" "-" TYPE_X86_CPU,      "mpx", "on" },
>      { "Skylake-Client-IBRS" "-" TYPE_X86_CPU, "mpx", "on" },
>      { "Skylake-Server" "-" TYPE_X86_CPU,      "mpx", "on" },
> @@ -152,6 +154,7 @@ GlobalProperty pc_compat_2_12[] = {
>      { TYPE_X86_CPU, "topoext", "off" },
>      { "EPYC-" TYPE_X86_CPU, "xlevel", "0x8000000a" },
>      { "EPYC-IBPB-" TYPE_X86_CPU, "xlevel", "0x8000000a" },
> +    { "Dhyana-" TYPE_X86_CPU, "xlevel", "0x8000000a" },
>  };
>  const size_t pc_compat_2_12_len = G_N_ELEMENTS(pc_compat_2_12);

You can drop the changes in this file. This CPU model didn't exist
in any older QEMU releases, so there's no machine type backcompat
required, at least from upstream QEMU POV.


Regards,
Daniel
-- 
|: https://berrange.com      -o-    https://www.flickr.com/photos/dberrange :|
|: https://libvirt.org         -o-            https://fstop138.berrange.com :|
|: https://entangle-photo.org    -o-    https://www.instagram.com/dberrange :|


  reply	other threads:[~2019-04-15  9:25 UTC|newest]

Thread overview: 22+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-04-13  2:54 [Qemu-devel] [PATCH v2] i386: Add new Hygon 'Dhyana' CPU model Pu Wen
2019-04-13  2:54 ` Pu Wen
2019-04-15  9:25 ` Daniel P. Berrangé [this message]
2019-04-15  9:25   ` Daniel P. Berrangé
2019-04-16  6:56   ` Pu Wen
2019-04-16  6:56     ` Pu Wen
2019-04-16  8:18     ` Daniel P. Berrangé
2019-04-16  8:18       ` Daniel P. Berrangé
2019-04-16  9:04       ` Pu Wen
2019-04-16  9:04         ` Pu Wen
2019-04-15 20:39 ` Eduardo Habkost
2019-04-15 20:39   ` Eduardo Habkost
2019-04-16  7:09   ` Pu Wen
2019-04-16  7:09     ` Pu Wen
2019-04-16  8:16   ` Daniel P. Berrangé
2019-04-16  8:16     ` Daniel P. Berrangé
2019-04-16 14:23     ` Eduardo Habkost
2019-04-16 14:23       ` Eduardo Habkost
2019-04-16 14:27       ` Daniel P. Berrangé
2019-04-16 14:27         ` Daniel P. Berrangé
2019-04-16 14:58         ` Eduardo Habkost
2019-04-16 14:58           ` Eduardo Habkost

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