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From: David Gibson <david@gibson.dropbear.id.au>
To: peter.maydell@linaro.org
Cc: gkurz@kaod.org, clg@kaod.org, qemu-devel@nongnu.org,
	qemu-ppc@nongnu.org, David Gibson <david@gibson.dropbear.id.au>,
	Greg Kurz <groug@kaod.org>
Subject: [Qemu-devel] [PULL 18/36] target/ppc: Style fixes for mmu-hash32.[ch]
Date: Fri, 26 Apr 2019 16:06:09 +1000	[thread overview]
Message-ID: <20190426060627.18153-19-david@gibson.dropbear.id.au> (raw)
In-Reply-To: <20190426060627.18153-1-david@gibson.dropbear.id.au>

Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Reviewed-by: Cédric Le Goater <clg@kaod.org>
Reviewed-by: Greg Kurz <groug@kaod.org>
---
 target/ppc/mmu-hash32.c | 22 ++++++++++++++--------
 1 file changed, 14 insertions(+), 8 deletions(-)

diff --git a/target/ppc/mmu-hash32.c b/target/ppc/mmu-hash32.c
index e8562a7c87..3f4dee835e 100644
--- a/target/ppc/mmu-hash32.c
+++ b/target/ppc/mmu-hash32.c
@@ -27,7 +27,7 @@
 #include "mmu-hash32.h"
 #include "exec/log.h"
 
-//#define DEBUG_BAT
+/* #define DEBUG_BAT */
 
 #ifdef DEBUG_BATS
 #  define LOG_BATS(...) qemu_log_mask(CPU_LOG_MMU, __VA_ARGS__)
@@ -228,8 +228,10 @@ static int ppc_hash32_direct_store(PowerPCCPU *cpu, target_ulong sr,
     qemu_log_mask(CPU_LOG_MMU, "direct store...\n");
 
     if ((sr & 0x1FF00000) >> 20 == 0x07f) {
-        /* Memory-forced I/O controller interface access */
-        /* If T=1 and BUID=x'07F', the 601 performs a memory access
+        /*
+         * Memory-forced I/O controller interface access
+         *
+         * If T=1 and BUID=x'07F', the 601 performs a memory access
          * to SR[28-31] LA[4-31], bypassing all protection mechanisms.
          */
         *raddr = ((sr & 0xF) << 28) | (eaddr & 0x0FFFFFFF);
@@ -265,9 +267,11 @@ static int ppc_hash32_direct_store(PowerPCCPU *cpu, target_ulong sr,
         }
         return 1;
     case ACCESS_CACHE:
-        /* dcba, dcbt, dcbtst, dcbf, dcbi, dcbst, dcbz, or icbi */
-        /* Should make the instruction do no-op.
-         * As it already do no-op, it's quite easy :-)
+        /*
+         * dcba, dcbt, dcbtst, dcbf, dcbi, dcbst, dcbz, or icbi
+         *
+         * Should make the instruction do no-op.  As it already do
+         * no-op, it's quite easy :-)
          */
         *raddr = eaddr;
         return 0;
@@ -519,8 +523,10 @@ int ppc_hash32_handle_mmu_fault(PowerPCCPU *cpu, vaddr eaddr, int rwx,
     if (rwx == 1) {
         new_pte1 |= HPTE32_R_C; /* set changed (dirty) bit */
     } else {
-        /* Treat the page as read-only for now, so that a later write
-         * will pass through this function again to set the C bit */
+        /*
+         * Treat the page as read-only for now, so that a later write
+         * will pass through this function again to set the C bit
+         */
         prot &= ~PAGE_WRITE;
     }
 
-- 
2.20.1

WARNING: multiple messages have this Message-ID (diff)
From: David Gibson <david@gibson.dropbear.id.au>
To: peter.maydell@linaro.org
Cc: gkurz@kaod.org, Greg Kurz <groug@kaod.org>,
	qemu-devel@nongnu.org, qemu-ppc@nongnu.org, clg@kaod.org,
	David Gibson <david@gibson.dropbear.id.au>
Subject: [Qemu-devel] [PULL 18/36] target/ppc: Style fixes for mmu-hash32.[ch]
Date: Fri, 26 Apr 2019 16:06:09 +1000	[thread overview]
Message-ID: <20190426060627.18153-19-david@gibson.dropbear.id.au> (raw)
Message-ID: <20190426060609.wRQ245S7lbzUSq0SBsS_7LvZurt3IquVTVXIPObjgmo@z> (raw)
In-Reply-To: <20190426060627.18153-1-david@gibson.dropbear.id.au>

Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Reviewed-by: Cédric Le Goater <clg@kaod.org>
Reviewed-by: Greg Kurz <groug@kaod.org>
---
 target/ppc/mmu-hash32.c | 22 ++++++++++++++--------
 1 file changed, 14 insertions(+), 8 deletions(-)

diff --git a/target/ppc/mmu-hash32.c b/target/ppc/mmu-hash32.c
index e8562a7c87..3f4dee835e 100644
--- a/target/ppc/mmu-hash32.c
+++ b/target/ppc/mmu-hash32.c
@@ -27,7 +27,7 @@
 #include "mmu-hash32.h"
 #include "exec/log.h"
 
-//#define DEBUG_BAT
+/* #define DEBUG_BAT */
 
 #ifdef DEBUG_BATS
 #  define LOG_BATS(...) qemu_log_mask(CPU_LOG_MMU, __VA_ARGS__)
@@ -228,8 +228,10 @@ static int ppc_hash32_direct_store(PowerPCCPU *cpu, target_ulong sr,
     qemu_log_mask(CPU_LOG_MMU, "direct store...\n");
 
     if ((sr & 0x1FF00000) >> 20 == 0x07f) {
-        /* Memory-forced I/O controller interface access */
-        /* If T=1 and BUID=x'07F', the 601 performs a memory access
+        /*
+         * Memory-forced I/O controller interface access
+         *
+         * If T=1 and BUID=x'07F', the 601 performs a memory access
          * to SR[28-31] LA[4-31], bypassing all protection mechanisms.
          */
         *raddr = ((sr & 0xF) << 28) | (eaddr & 0x0FFFFFFF);
@@ -265,9 +267,11 @@ static int ppc_hash32_direct_store(PowerPCCPU *cpu, target_ulong sr,
         }
         return 1;
     case ACCESS_CACHE:
-        /* dcba, dcbt, dcbtst, dcbf, dcbi, dcbst, dcbz, or icbi */
-        /* Should make the instruction do no-op.
-         * As it already do no-op, it's quite easy :-)
+        /*
+         * dcba, dcbt, dcbtst, dcbf, dcbi, dcbst, dcbz, or icbi
+         *
+         * Should make the instruction do no-op.  As it already do
+         * no-op, it's quite easy :-)
          */
         *raddr = eaddr;
         return 0;
@@ -519,8 +523,10 @@ int ppc_hash32_handle_mmu_fault(PowerPCCPU *cpu, vaddr eaddr, int rwx,
     if (rwx == 1) {
         new_pte1 |= HPTE32_R_C; /* set changed (dirty) bit */
     } else {
-        /* Treat the page as read-only for now, so that a later write
-         * will pass through this function again to set the C bit */
+        /*
+         * Treat the page as read-only for now, so that a later write
+         * will pass through this function again to set the C bit
+         */
         prot &= ~PAGE_WRITE;
     }
 
-- 
2.20.1



  parent reply	other threads:[~2019-04-26  6:06 UTC|newest]

Thread overview: 79+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-04-26  6:05 [Qemu-devel] [PULL 00/36] ppc-for-4.1 queue 20190426 David Gibson
2019-04-26  6:05 ` David Gibson
2019-04-26  6:05 ` [Qemu-devel] [PULL 01/36] spapr: Support NVIDIA V100 GPU with NVLink2 David Gibson
2019-04-26  6:05   ` David Gibson
2019-05-17 17:37   ` Laurent Vivier
2019-05-17 17:58     ` Greg Kurz
2019-05-20  6:06     ` David Gibson
2019-04-26  6:05 ` [Qemu-devel] [PULL 02/36] hw/ppc/prep: Drop useless inclusion of "hw/input/i8042.h" David Gibson
2019-04-26  6:05   ` David Gibson
2019-04-26  6:05 ` [Qemu-devel] [PULL 03/36] spapr/rtas: modify spapr_rtas_register() to remove RTAS handlers David Gibson
2019-04-26  6:05   ` David Gibson
2019-04-26  6:05 ` [Qemu-devel] [PULL 04/36] spapr/irq: remove spapr_ics_create() David Gibson
2019-04-26  6:05   ` David Gibson
2019-04-26  6:05 ` [Qemu-devel] [PULL 05/36] target/ppc: Style fixes for ppc-models.[ch] David Gibson
2019-04-26  6:05   ` David Gibson
2019-04-26  6:05 ` [Qemu-devel] [PULL 06/36] target/ppc: Style fixes for cpu.[ch] David Gibson
2019-04-26  6:05   ` David Gibson
2019-04-26  6:05 ` [Qemu-devel] [PULL 07/36] target/ppc: Style fixes for int_helper.c David Gibson
2019-04-26  6:05   ` David Gibson
2019-04-26  6:05 ` [Qemu-devel] [PULL 08/36] target/ppc: Style fixes for fpu_helper.c David Gibson
2019-04-26  6:05   ` David Gibson
2019-04-26  6:06 ` [Qemu-devel] [PULL 09/36] target/ppc: Style fixes for dfp_helper.c David Gibson
2019-04-26  6:06   ` David Gibson
2019-04-26  6:06 ` [Qemu-devel] [PULL 10/36] target/ppc: Style fixes for excp_helper.c David Gibson
2019-04-26  6:06   ` David Gibson
2019-04-26  6:06 ` [Qemu-devel] [PULL 11/36] target/ppc: Style fixes for gdbstub.c David Gibson
2019-04-26  6:06   ` David Gibson
2019-04-26  6:06 ` [Qemu-devel] [PULL 12/36] target/ppc: Style fixes for helper_regs.h David Gibson
2019-04-26  6:06   ` David Gibson
2019-04-26  6:06 ` [Qemu-devel] [PULL 13/36] target/ppc: Style fixes for kvm_ppc.h and kvm.c David Gibson
2019-04-26  6:06   ` David Gibson
2019-04-26  6:06 ` [Qemu-devel] [PULL 14/36] target/ppc: Style fixes for machine.c David Gibson
2019-04-26  6:06   ` David Gibson
2019-04-26  6:06 ` [Qemu-devel] [PULL 15/36] target/ppc: Style fixes for mem_helper.c David Gibson
2019-04-26  6:06   ` David Gibson
2019-04-26  6:06 ` [Qemu-devel] [PULL 16/36] target/ppc: Style fixes for mfrom_table.inc.c & mfrom_table_gen.c David Gibson
2019-04-26  6:06   ` David Gibson
2019-04-26  6:06 ` [Qemu-devel] [PULL 17/36] target/ppc: Style fixes for misc_helper.c David Gibson
2019-04-26  6:06   ` David Gibson
2019-04-26  6:06 ` David Gibson [this message]
2019-04-26  6:06   ` [Qemu-devel] [PULL 18/36] target/ppc: Style fixes for mmu-hash32.[ch] David Gibson
2019-04-26  6:06 ` [Qemu-devel] [PULL 19/36] target/ppc: Style fixes for mmu-hash64.[ch] David Gibson
2019-04-26  6:06   ` David Gibson
2019-04-26  6:06 ` [Qemu-devel] [PULL 20/36] target/ppc: Style fixes for mmu_helper.c David Gibson
2019-04-26  6:06   ` David Gibson
2019-04-26  6:06 ` [Qemu-devel] [PULL 21/36] target/ppc: Style fixes for monitor.c David Gibson
2019-04-26  6:06   ` David Gibson
2019-04-26  6:06 ` [Qemu-devel] [PULL 22/36] target/ppc: Style fixes for translate_init.inc.c David Gibson
2019-04-26  6:06   ` David Gibson
2019-04-26  6:06 ` [Qemu-devel] [PULL 23/36] target/ppc: Style fixes for translate.c David Gibson
2019-04-26  6:06   ` David Gibson
2019-04-26  6:06 ` [Qemu-devel] [PULL 24/36] target/ppc: Style fixes for translate/fp-impl.inc.c David Gibson
2019-04-26  6:06   ` David Gibson
2019-04-26  6:06 ` [Qemu-devel] [PULL 25/36] target/ppc: Style fixes for translate/vsx-impl.inc.c David Gibson
2019-04-26  6:06   ` David Gibson
2019-04-26  6:06 ` [Qemu-devel] [PULL 26/36] target/ppc: Style fixes for translate/vmx-impl.inc.c David Gibson
2019-04-26  6:06   ` David Gibson
2019-04-26  6:06 ` [Qemu-devel] [PULL 27/36] target/ppc: Style fixes for translate/spe-impl.inc.c David Gibson
2019-04-26  6:06   ` David Gibson
2019-04-26  6:06 ` [Qemu-devel] [PULL 28/36] spapr_pci: Get rid of duplicate code for node name creation David Gibson
2019-04-26  6:06   ` David Gibson
2019-04-26  6:06 ` [Qemu-devel] [PULL 29/36] spapr: Drop duplicate PCI swizzle code David Gibson
2019-04-26  6:06   ` David Gibson
2019-04-26  6:06 ` [Qemu-devel] [PULL 30/36] target/ppc/trace-events: Fix trivial typo David Gibson
2019-04-26  6:06   ` David Gibson
2019-04-26  6:06 ` [Qemu-devel] [PULL 31/36] target/ppc/kvm: Convert DPRINTF to traces David Gibson
2019-04-26  6:06   ` David Gibson
2019-04-26  6:06 ` [Qemu-devel] [PULL 32/36] target/ppc: Don't check UPRT in radix mode when in HV real mode David Gibson
2019-04-26  6:06   ` David Gibson
2019-04-26  6:06 ` [Qemu-devel] [PULL 33/36] ppc/spapr: Use proper HPTE accessors for H_READ David Gibson
2019-04-26  6:06   ` David Gibson
2019-04-26  6:06 ` [Qemu-devel] [PULL 34/36] ppc/hash64: Rework R and C bit updates David Gibson
2019-04-26  6:06   ` David Gibson
2019-04-26  6:06 ` [Qemu-devel] [PULL 35/36] ppc/hash32: " David Gibson
2019-04-26  6:06   ` David Gibson
2019-04-26  6:06 ` [Qemu-devel] [PULL 36/36] target/ppc: improve performance of large BAT invalidations David Gibson
2019-04-26  6:06   ` David Gibson
2019-04-28 10:42 ` [Qemu-devel] [PULL 00/36] ppc-for-4.1 queue 20190426 Peter Maydell
2019-04-28 10:42   ` Peter Maydell

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