[U-Boot] [PATCH v4 00/13] clk: Port Linux common clock framework [CCF] to U-boot (tag: 5.0-rc3)

[U-Boot] [PATCH v4 00/13] clk: Port Linux common clock framework [CCF] to U-boot (tag: 5.0-rc3)

[Lukasz Majewski]

This patch series brings the files from Linux kernel to provide clocks support
as it is used on the Linux kernel with common clock framework [CCF] setup.

This series also fixes several problems with current clocks and provides
sandbox tests for functions addded to clk-uclass.c file.

Repository:
https://github.com/lmajewski/u-boot-dfu/commits/CCF-v4


Changes in v4:
- New patch
- None
- None
- None
- New patch
- None
- Port some more Linux code to facilitate imx8 code porting (most notably
  flags)
- Explicitly use container_of() based macro to provide struct clk in various
  places (e.g. gate2, mux, etc)
  Following patches has been squashed:
  http://patchwork.ozlabs.org/patch/1093141/
  http://patchwork.ozlabs.org/patch/1093142/
  http://patchwork.ozlabs.org/patch/1093146/
- New patch

Changes in v3:
- New patch
- The rate information is now cached into struct clk field
- The clk_get_parent() is used to get pointer to the parent struct clk
- Replace -ENODEV with -ENOENT
- Use **clkp instead of **c
- New patch
- New patch

Lukasz Majewski (13):
  clk: doc: Add documentation entry for Common Clock Framework [CCF]
    (i.MX)
  dm: Fix documentation entry as there is no UCLASS_CLOCK uclass
  clk: Remove clock ID check in .get_rate() of clk_fixed_*
  clk: Extend struct clk to provide information regarding clock rate
  clk: Extend struct clk to provide clock type agnostic flags
  clk: Provide struct clk for fixed rate clock (clk_fixed_rate.c)
  dm: clk: Define clk_get_parent() for clk operations
  dm: clk: Define clk_get_parent_rate() for clk operations
  dm: clk: Define clk_get_by_id() for clk operations
  clk: test: Provide unit test for clk_get_by_id() method
  clk: test: Provide unit test for clk_get_parent_rate() method
  clk: Port Linux common clock framework [CCF] for imx6q to U-boot (tag:
    5.0-rc3)
  dm: clk: Extend clk_get_parent_rate() to support CLK_GET_RATE_NOCACHE
    flag

 arch/sandbox/include/asm/clk.h |  16 ++++
 doc/imx/clk/ccf.txt            |  83 +++++++++++++++++++
 drivers/clk/Kconfig            |  14 ++++
 drivers/clk/Makefile           |   2 +
 drivers/clk/clk-divider.c      | 148 ++++++++++++++++++++++++++++++++++
 drivers/clk/clk-fixed-factor.c |  87 ++++++++++++++++++++
 drivers/clk/clk-mux.c          | 164 +++++++++++++++++++++++++++++++++++++
 drivers/clk/clk-uclass.c       |  60 ++++++++++++++
 drivers/clk/clk.c              |  56 +++++++++++++
 drivers/clk/clk_fixed_factor.c |   3 -
 drivers/clk/clk_fixed_rate.c   |   8 +-
 drivers/clk/clk_sandbox_test.c |  49 +++++++++++
 drivers/clk/imx/Kconfig        |   9 +++
 drivers/clk/imx/Makefile       |   2 +
 drivers/clk/imx/clk-gate2.c    | 113 ++++++++++++++++++++++++++
 drivers/clk/imx/clk-imx6q.c    | 179 +++++++++++++++++++++++++++++++++++++++++
 drivers/clk/imx/clk-pfd.c      |  91 +++++++++++++++++++++
 drivers/clk/imx/clk-pllv3.c    |  83 +++++++++++++++++++
 drivers/clk/imx/clk.h          |  75 +++++++++++++++++
 include/clk.h                  |  37 ++++++++-
 include/linux/clk-provider.h   | 115 ++++++++++++++++++++++++++
 test/dm/clk.c                  |   4 +-
 22 files changed, 1390 insertions(+), 8 deletions(-)
 create mode 100644 doc/imx/clk/ccf.txt
 create mode 100644 drivers/clk/clk-divider.c
 create mode 100644 drivers/clk/clk-fixed-factor.c
 create mode 100644 drivers/clk/clk-mux.c
 create mode 100644 drivers/clk/clk.c
 create mode 100644 drivers/clk/imx/clk-gate2.c
 create mode 100644 drivers/clk/imx/clk-imx6q.c
 create mode 100644 drivers/clk/imx/clk-pfd.c
 create mode 100644 drivers/clk/imx/clk-pllv3.c
 create mode 100644 drivers/clk/imx/clk.h
 create mode 100644 include/linux/clk-provider.h

-- 
2.11.0

[U-Boot] [PATCH v4 01/13] clk: doc: Add documentation entry for Common Clock Framework [CCF] (i.MX)

[Lukasz Majewski]

This patch describes the design decisions considerations and taken approach
for porting in a separate documentation entry.

Signed-off-by: Lukasz Majewski <lukma@denx.de>

---

Changes in v4:
- New patch

Changes in v3: None

 doc/imx/clk/ccf.txt | 83 +++++++++++++++++++++++++++++++++++++++++++++++++++++
 1 file changed, 83 insertions(+)
 create mode 100644 doc/imx/clk/ccf.txt

diff --git a/doc/imx/clk/ccf.txt b/doc/imx/clk/ccf.txt
new file mode 100644
index 0000000000..cc167095f7
--- /dev/null
+++ b/doc/imx/clk/ccf.txt
@@ -0,0 +1,83 @@
+Introduction:
+=============
+
+This documentation entry describes the Common Clock Framework [CCF]
+port from Linux kernel (5.0-rc3) to U-Boot.
+
+This code is supposed to bring CCF to IMX based devices (imx6q, imx7
+imx8). Moreover, it also provides some common clock code, which would
+allow easy porting of CCF Linux code to other platforms.
+
+Design decisions:
+=================
+
+* U-boot's DM for clk differs from Linux CCF. The most notably difference
+  is the lack of support for hierarchical clocks and "clock as a manager
+  driver" (single clock DTS node acts as a starting point for all other
+  clocks).
+
+* The clk_get_rate() caches the previously read data if CLK_GET_RATE_NOCACHE
+  is not set (no need for recursive access).
+
+* On purpose the "manager" clk driver (clk-imx6q.c) is not using large
+  table to store pointers to clocks - e.g. clk[IMX6QDL_CLK_USDHC2_SEL] = ....
+  Instead we use udevice's linked list for the same class (UCLASS_CLK).
+
+  Rationale:
+  ----------
+    When porting the code as is from Linux, one would need ~1KiB of RAM to
+    store it. This is way too much if we do plan to use this driver in SPL.
+
+* The "central" structure of this patch series is struct udevice and its
+  driver_data field contains the struct clk pointer (to the originally created
+  one).
+
+* Up till now U-boot's driver model's CLK operates on udevice (main access to
+  clock is by udevice ops)
+  In the CCF the access to struct clk (comprising pointer to *dev) is
+  possible via dev_get_driver_data()
+
+  Storing back pointer (from udevice to struct clk) as driver_data is a
+  convention for CCF.
+
+* I could use *private_alloc_size to allocate driver's 'private"
+  structures (dev->priv) for e.g. divider (struct clk_divider *divider)
+  for IMX6Q clock, but this would change the original structure of the CCF code.
+
+    Question:
+    ---------
+
+    Would it be better to use private_alloc_size (and dev->private) or stay with
+    driver_data to store struct clk pointer?
+
+    The former requires some rewritting in CCF original code (to remove
+    (c)malloc, etc), but comply with u-boot DM. The latter allows re-using the
+    CCF code as is, but introduces some convention special for CCF (I'm not
+    sure thought if dev->priv is NOT another convention as well).
+
+    This port uses the former approach with driver_data storing pointer to
+    struct clk.
+
+* I've added the clk_get_parent(), which reads parent's dev->driver_data to
+  provide parent's struct clk pointer. This seems the easiest way to get
+  child/parent relationship for struct clk in U-boot's udevice
+  based clocks.
+
+* For tests I had to "emulate" CCF code structure to test functionality of
+  clk_get_parent_rate() and clk_get_by_id(). Those functions will not work
+  properly with "standard" (i.e. non CCF) clock setup (with not set
+  dev->driver_data to struct clk).
+
+* Linux's CCF 'struct clk_core' corresponds to u-boot's udevice in 'struct clk'.
+  Clock IP block agnostic flags from 'struct clk_core' (e.g. NOCACHE) have been
+  moved from this struct one level up to 'struct clk'.
+
+To do:
+------
+
+* Use of OF_PLATDATA in the SPL setup for CCF - as it is now - the SPL grows
+  considerably and using CCF in boards with tiny resources (OCRAM) is
+  problematic.
+
+* On demand port other parts of CCF to U-Boot - as now only features _really_
+  needed by DM/DTS converted drivers are used.
-- 
2.11.0

[U-Boot] [PATCH v4 01/13] clk: doc: Add documentation entry for Common Clock Framework [CCF] (i.MX)

[Marek Vasut]

On 5/17/19 12:10 AM, Lukasz Majewski wrote:
> This patch describes the design decisions considerations and taken approach
> for porting in a separate documentation entry.
> 
> Signed-off-by: Lukasz Majewski <lukma@denx.de>
> 
> ---
> 
> Changes in v4:
> - New patch
> 
> Changes in v3: None
> 
>  doc/imx/clk/ccf.txt | 83 +++++++++++++++++++++++++++++++++++++++++++++++++++++
>  1 file changed, 83 insertions(+)
>  create mode 100644 doc/imx/clk/ccf.txt
> 
> diff --git a/doc/imx/clk/ccf.txt b/doc/imx/clk/ccf.txt
> new file mode 100644
> index 0000000000..cc167095f7
> --- /dev/null
> +++ b/doc/imx/clk/ccf.txt
> @@ -0,0 +1,83 @@
> +Introduction:
> +=============
> +
> +This documentation entry describes the Common Clock Framework [CCF]
> +port from Linux kernel (5.0-rc3) to U-Boot.

Can we upgrade this to 5.1.y ?

-- 
Best regards,
Marek Vasut

[U-Boot] [PATCH v4 01/13] clk: doc: Add documentation entry for Common Clock Framework [CCF] (i.MX)

[Peng Fan]

> Subject: [PATCH v4 01/13] clk: doc: Add documentation entry for Common
> Clock Framework [CCF] (i.MX)
> 
> This patch describes the design decisions considerations and taken approach
> for porting in a separate documentation entry.
> 
> Signed-off-by: Lukasz Majewski <lukma@denx.de>
> 
> ---
> 
> Changes in v4:
> - New patch
> 
> Changes in v3: None
> 
>  doc/imx/clk/ccf.txt | 83
> +++++++++++++++++++++++++++++++++++++++++++++++++++++
>  1 file changed, 83 insertions(+)
>  create mode 100644 doc/imx/clk/ccf.txt
> 
> diff --git a/doc/imx/clk/ccf.txt b/doc/imx/clk/ccf.txt new file mode 100644
> index 0000000000..cc167095f7
> --- /dev/null
> +++ b/doc/imx/clk/ccf.txt
> @@ -0,0 +1,83 @@
> +Introduction:
> +=============
> +
> +This documentation entry describes the Common Clock Framework [CCF]
> +port from Linux kernel (5.0-rc3) to U-Boot.
> +
> +This code is supposed to bring CCF to IMX based devices (imx6q, imx7
> +imx8). Moreover, it also provides some common clock code, which would
> +allow easy porting of CCF Linux code to other platforms.
> +
> +Design decisions:
> +=================
> +
> +* U-boot's DM for clk differs from Linux CCF. The most notably
> +difference
> +  is the lack of support for hierarchical clocks and "clock as a
> +manager
> +  driver" (single clock DTS node acts as a starting point for all other
> +  clocks).
> +
> +* The clk_get_rate() caches the previously read data if
> +CLK_GET_RATE_NOCACHE
> +  is not set (no need for recursive access).
> +
> +* On purpose the "manager" clk driver (clk-imx6q.c) is not using large
> +  table to store pointers to clocks - e.g. clk[IMX6QDL_CLK_USDHC2_SEL]
> = ....
> +  Instead we use udevice's linked list for the same class (UCLASS_CLK).
> +
> +  Rationale:
> +  ----------
> +    When porting the code as is from Linux, one would need ~1KiB of RAM
> to
> +    store it. This is way too much if we do plan to use this driver in SPL.
> +
> +* The "central" structure of this patch series is struct udevice and
> +its
> +  driver_data field contains the struct clk pointer (to the originally
> +created
> +  one).
> +
> +* Up till now U-boot's driver model's CLK operates on udevice (main
> +access to
> +  clock is by udevice ops)
> +  In the CCF the access to struct clk (comprising pointer to *dev) is
> +  possible via dev_get_driver_data()
> +
> +  Storing back pointer (from udevice to struct clk) as driver_data is a
> + convention for CCF.
> +
> +* I could use *private_alloc_size to allocate driver's 'private"
> +  structures (dev->priv) for e.g. divider (struct clk_divider *divider)
> +  for IMX6Q clock, but this would change the original structure of the CCF
> code.
> +
> +    Question:
> +    ---------
> +
> +    Would it be better to use private_alloc_size (and dev->private) or stay
> with
> +    driver_data to store struct clk pointer?

I prefer to use driver_data. Not want to bother with malloc failure.

Regards,
Peng

> +
> +    The former requires some rewritting in CCF original code (to remove
> +    (c)malloc, etc), but comply with u-boot DM. The latter allows re-using
> the
> +    CCF code as is, but introduces some convention special for CCF (I'm not
> +    sure thought if dev->priv is NOT another convention as well).
> +
> +    This port uses the former approach with driver_data storing pointer to
> +    struct clk.
> +
> +* I've added the clk_get_parent(), which reads parent's
> +dev->driver_data to
> +  provide parent's struct clk pointer. This seems the easiest way to
> +get
> +  child/parent relationship for struct clk in U-boot's udevice
> +  based clocks.
> +
> +* For tests I had to "emulate" CCF code structure to test functionality
> +of
> +  clk_get_parent_rate() and clk_get_by_id(). Those functions will not
> +work
> +  properly with "standard" (i.e. non CCF) clock setup (with not set
> +  dev->driver_data to struct clk).
> +
> +* Linux's CCF 'struct clk_core' corresponds to u-boot's udevice in 'struct clk'.
> +  Clock IP block agnostic flags from 'struct clk_core' (e.g. NOCACHE)
> +have been
> +  moved from this struct one level up to 'struct clk'.
> +
> +To do:
> +------
> +
> +* Use of OF_PLATDATA in the SPL setup for CCF - as it is now - the SPL
> +grows
> +  considerably and using CCF in boards with tiny resources (OCRAM) is
> +  problematic.
> +
> +* On demand port other parts of CCF to U-Boot - as now only features
> +_really_
> +  needed by DM/DTS converted drivers are used.
> --
> 2.11.0

[U-Boot] [PATCH v4 01/13] clk: doc: Add documentation entry for

[sbabic at denx.de]

> This patch describes the design decisions considerations and taken approach
> for porting in a separate documentation entry.
> Signed-off-by: Lukasz Majewski <lukma@denx.de>

Applied to u-boot-imx, master, thanks !

Best regards,
Stefano Babic

-- 
=====================================================================
DENX Software Engineering GmbH,      Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sbabic at denx.de
=====================================================================

[U-Boot] [PATCH v4 02/13] dm: Fix documentation entry as there is no UCLASS_CLOCK uclass

[Lukasz Majewski]

There is no UCLASS_CLOCK uclass defined. Instead we do use the UCLASS_CLK.

Signed-off-by: Lukasz Majewski <lukma@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>

---

Changes in v4:
- None

Changes in v3: None

 include/clk.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/include/clk.h b/include/clk.h
index d24e99713a..a909b71f1a 100644
--- a/include/clk.h
+++ b/include/clk.h
@@ -20,7 +20,7 @@
  * clock provider. This API provides a standard means for drivers to enable and
  * disable clocks, and to set the rate at which they oscillate.
  *
- * A driver that implements UCLASS_CLOCK is a clock provider. A provider will
+ * A driver that implements UCLASS_CLK is a clock provider. A provider will
  * often implement multiple separate clocks, since the hardware it manages
  * often has this capability. clk-uclass.h describes the interface which
  * clock providers must implement.
-- 
2.11.0

[U-Boot] [PATCH v4 02/13] dm: Fix documentation entry as there is no UCLASS_CLOCK uclass

[Peng Fan]

> Subject: [PATCH v4 02/13] dm: Fix documentation entry as there is no
> UCLASS_CLOCK uclass
> 
> There is no UCLASS_CLOCK uclass defined. Instead we do use the
> UCLASS_CLK.
> 
> Signed-off-by: Lukasz Majewski <lukma@denx.de>
> Reviewed-by: Simon Glass <sjg@chromium.org>
> 
> ---
> 
> Changes in v4:
> - None
> 
> Changes in v3: None
> 
>  include/clk.h | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/include/clk.h b/include/clk.h index d24e99713a..a909b71f1a
> 100644
> --- a/include/clk.h
> +++ b/include/clk.h
> @@ -20,7 +20,7 @@
>   * clock provider. This API provides a standard means for drivers to enable
> and
>   * disable clocks, and to set the rate at which they oscillate.
>   *
> - * A driver that implements UCLASS_CLOCK is a clock provider. A provider will
> + * A driver that implements UCLASS_CLK is a clock provider. A provider
> + will
>   * often implement multiple separate clocks, since the hardware it manages
>   * often has this capability. clk-uclass.h describes the interface which
>   * clock providers must implement.

Reviewed-by: Peng Fan <peng.fan@nxp.com>

> --
> 2.11.0

[U-Boot] [PATCH v4 02/13] dm: Fix documentation entry as there is

[sbabic at denx.de]

> There is no UCLASS_CLOCK uclass defined. Instead we do use the UCLASS_CLK.
> Signed-off-by: Lukasz Majewski <lukma@denx.de>
> Reviewed-by: Simon Glass <sjg@chromium.org>
> Reviewed-by: Peng Fan <peng.fan@nxp.com>

Applied to u-boot-imx, master, thanks !

Best regards,
Stefano Babic

-- 
=====================================================================
DENX Software Engineering GmbH,      Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sbabic at denx.de
=====================================================================

[U-Boot] [PATCH v4 03/13] clk: Remove clock ID check in .get_rate() of clk_fixed_*

[Lukasz Majewski]

This check requires the struct clk passed to .get_rate() to be always
cleared out as any clock with valid ID causes -EINVAL return value.

The return code of fixed clocks shall always be returned.

Signed-off-by: Lukasz Majewski <lukma@denx.de>

---

Changes in v4:
- None

Changes in v3: None

 drivers/clk/clk_fixed_factor.c | 3 ---
 drivers/clk/clk_fixed_rate.c   | 3 ---
 2 files changed, 6 deletions(-)

diff --git a/drivers/clk/clk_fixed_factor.c b/drivers/clk/clk_fixed_factor.c
index 5fa20a84db..dcdb6ddf5c 100644
--- a/drivers/clk/clk_fixed_factor.c
+++ b/drivers/clk/clk_fixed_factor.c
@@ -24,9 +24,6 @@ static ulong clk_fixed_factor_get_rate(struct clk *clk)
 	uint64_t rate;
 	struct clk_fixed_factor *ff = to_clk_fixed_factor(clk->dev);
 
-	if (clk->id != 0)
-		return -EINVAL;
-
 	rate = clk_get_rate(&ff->parent);
 	if (IS_ERR_VALUE(rate))
 		return rate;
diff --git a/drivers/clk/clk_fixed_rate.c b/drivers/clk/clk_fixed_rate.c
index d8d9f86c86..50dbb13655 100644
--- a/drivers/clk/clk_fixed_rate.c
+++ b/drivers/clk/clk_fixed_rate.c
@@ -15,9 +15,6 @@ struct clk_fixed_rate {
 
 static ulong clk_fixed_rate_get_rate(struct clk *clk)
 {
-	if (clk->id != 0)
-		return -EINVAL;
-
 	return to_clk_fixed_rate(clk->dev)->fixed_rate;
 }
 
-- 
2.11.0

[U-Boot] [PATCH v4 03/13] clk: Remove clock ID check in .get_rate() of clk_fixed_*

[Peng Fan]

> Subject: [PATCH v4 03/13] clk: Remove clock ID check in .get_rate() of
> clk_fixed_*
> 
> This check requires the struct clk passed to .get_rate() to be always cleared
> out as any clock with valid ID causes -EINVAL return value.
> 
> The return code of fixed clocks shall always be returned.
> 
> Signed-off-by: Lukasz Majewski <lukma@denx.de>
> 
> ---
> 
> Changes in v4:
> - None
> 
> Changes in v3: None
> 
>  drivers/clk/clk_fixed_factor.c | 3 ---
>  drivers/clk/clk_fixed_rate.c   | 3 ---
>  2 files changed, 6 deletions(-)
> 
> diff --git a/drivers/clk/clk_fixed_factor.c b/drivers/clk/clk_fixed_factor.c index
> 5fa20a84db..dcdb6ddf5c 100644
> --- a/drivers/clk/clk_fixed_factor.c
> +++ b/drivers/clk/clk_fixed_factor.c
> @@ -24,9 +24,6 @@ static ulong clk_fixed_factor_get_rate(struct clk *clk)
>  	uint64_t rate;
>  	struct clk_fixed_factor *ff = to_clk_fixed_factor(clk->dev);
> 
> -	if (clk->id != 0)
> -		return -EINVAL;
> -
>  	rate = clk_get_rate(&ff->parent);
>  	if (IS_ERR_VALUE(rate))
>  		return rate;
> diff --git a/drivers/clk/clk_fixed_rate.c b/drivers/clk/clk_fixed_rate.c index
> d8d9f86c86..50dbb13655 100644
> --- a/drivers/clk/clk_fixed_rate.c
> +++ b/drivers/clk/clk_fixed_rate.c
> @@ -15,9 +15,6 @@ struct clk_fixed_rate {
> 
>  static ulong clk_fixed_rate_get_rate(struct clk *clk)  {
> -	if (clk->id != 0)
> -		return -EINVAL;
> -
>  	return to_clk_fixed_rate(clk->dev)->fixed_rate;
>  }
> 

Reviewed-by: Peng Fan <peng.fan@nxp.com>

> --
> 2.11.0

[U-Boot] [PATCH v4 03/13] clk: Remove clock ID check in .get_rate() of clk_fixed_*

[Stefano Babic]

On 17/05/19 00:10, Lukasz Majewski wrote:
> This check requires the struct clk passed to .get_rate() to be always
> cleared out as any clock with valid ID causes -EINVAL return value.
> 
> The return code of fixed clocks shall always be returned.
> 
> Signed-off-by: Lukasz Majewski <lukma@denx.de>
> 
> ---
> 
> Changes in v4:
> - None
> 
> Changes in v3: None
> 
>  drivers/clk/clk_fixed_factor.c | 3 ---
>  drivers/clk/clk_fixed_rate.c   | 3 ---
>  2 files changed, 6 deletions(-)
> 
> diff --git a/drivers/clk/clk_fixed_factor.c b/drivers/clk/clk_fixed_factor.c
> index 5fa20a84db..dcdb6ddf5c 100644
> --- a/drivers/clk/clk_fixed_factor.c
> +++ b/drivers/clk/clk_fixed_factor.c
> @@ -24,9 +24,6 @@ static ulong clk_fixed_factor_get_rate(struct clk *clk)
>  	uint64_t rate;
>  	struct clk_fixed_factor *ff = to_clk_fixed_factor(clk->dev);
>  
> -	if (clk->id != 0)
> -		return -EINVAL;
> -
>  	rate = clk_get_rate(&ff->parent);
>  	if (IS_ERR_VALUE(rate))
>  		return rate;
> diff --git a/drivers/clk/clk_fixed_rate.c b/drivers/clk/clk_fixed_rate.c
> index d8d9f86c86..50dbb13655 100644
> --- a/drivers/clk/clk_fixed_rate.c
> +++ b/drivers/clk/clk_fixed_rate.c
> @@ -15,9 +15,6 @@ struct clk_fixed_rate {
>  
>  static ulong clk_fixed_rate_get_rate(struct clk *clk)
>  {
> -	if (clk->id != 0)
> -		return -EINVAL;
> -
>  	return to_clk_fixed_rate(clk->dev)->fixed_rate;
>  }
>  
> 

Reviewed-by: Stefano Babic <sbabic@denx.de>

Best regards,
Stefano Babic

-- 
=====================================================================
DENX Software Engineering GmbH,      Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sbabic at denx.de
=====================================================================

[U-Boot] [PATCH v4 03/13] clk: Remove clock ID check in .get_rate()

[sbabic at denx.de]

> This check requires the struct clk passed to .get_rate() to be always
> cleared out as any clock with valid ID causes -EINVAL return value.
> The return code of fixed clocks shall always be returned.
> Signed-off-by: Lukasz Majewski <lukma@denx.de>
> Reviewed-by: Peng Fan <peng.fan@nxp.com>
> Reviewed-by: Stefano Babic <sbabic@denx.de>

Applied to u-boot-imx, master, thanks !

Best regards,
Stefano Babic

-- 
=====================================================================
DENX Software Engineering GmbH,      Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sbabic at denx.de
=====================================================================

[U-Boot] [PATCH v4 04/13] clk: Extend struct clk to provide information regarding clock rate

[Lukasz Majewski]

This commit extends the struct clk to provide information regarding the
clock rate.
As a result the clock tree traversal is performed at most once, and further
reads are using the cached value.

Signed-off-by: Lukasz Majewski <lukma@denx.de>

---

Changes in v4:
- None

Changes in v3: None

 include/clk.h | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/include/clk.h b/include/clk.h
index a909b71f1a..1f2fd15bb5 100644
--- a/include/clk.h
+++ b/include/clk.h
@@ -40,6 +40,7 @@ struct udevice;
  * other clock APIs to identify which clock signal to operate upon.
  *
  * @dev: The device which implements the clock signal.
+ * @rate: The clock rate (in HZ).
  * @id: The clock signal ID within the provider.
  * @data: An optional data field for scenarios where a single integer ID is not
  *	  sufficient. If used, it can be populated through an .of_xlate op and
@@ -55,6 +56,7 @@ struct udevice;
  */
 struct clk {
 	struct udevice *dev;
+	unsigned long rate;	/* in HZ */
 	/*
 	 * Written by of_xlate. In the future, we might add more fields here.
 	 */
-- 
2.11.0

[U-Boot] [PATCH v4 04/13] clk: Extend struct clk to provide information regarding clock rate

[Marek Vasut]

On 5/17/19 12:10 AM, Lukasz Majewski wrote:
> This commit extends the struct clk to provide information regarding the
> clock rate.
> As a result the clock tree traversal is performed at most once, and further
> reads are using the cached value.
> 
> Signed-off-by: Lukasz Majewski <lukma@denx.de>
> 
> ---
> 
> Changes in v4:
> - None
> 
> Changes in v3: None
> 
>  include/clk.h | 2 ++
>  1 file changed, 2 insertions(+)
> 
> diff --git a/include/clk.h b/include/clk.h
> index a909b71f1a..1f2fd15bb5 100644
> --- a/include/clk.h
> +++ b/include/clk.h
> @@ -40,6 +40,7 @@ struct udevice;
>   * other clock APIs to identify which clock signal to operate upon.
>   *
>   * @dev: The device which implements the clock signal.
> + * @rate: The clock rate (in HZ).
>   * @id: The clock signal ID within the provider.
>   * @data: An optional data field for scenarios where a single integer ID is not
>   *	  sufficient. If used, it can be populated through an .of_xlate op and
> @@ -55,6 +56,7 @@ struct udevice;
>   */
>  struct clk {
>  	struct udevice *dev;
> +	unsigned long rate;	/* in HZ */

Can this be unsigned long long ? Think of 3 GHz PLL on arm32 in IDT
Versaclock line of clock synthesisers ; this would overflow right here.

-- 
Best regards,
Marek Vasut

[U-Boot] [PATCH v4 04/13] clk: Extend struct clk to provide information regarding clock rate

[Lukasz Majewski]

Hi Marek,

> On 5/17/19 12:10 AM, Lukasz Majewski wrote:
> > This commit extends the struct clk to provide information regarding
> > the clock rate.
> > As a result the clock tree traversal is performed at most once, and
> > further reads are using the cached value.
> > 
> > Signed-off-by: Lukasz Majewski <lukma@denx.de>
> > 
> > ---
> > 
> > Changes in v4:
> > - None
> > 
> > Changes in v3: None
> > 
> >  include/clk.h | 2 ++
> >  1 file changed, 2 insertions(+)
> > 
> > diff --git a/include/clk.h b/include/clk.h
> > index a909b71f1a..1f2fd15bb5 100644
> > --- a/include/clk.h
> > +++ b/include/clk.h
> > @@ -40,6 +40,7 @@ struct udevice;
> >   * other clock APIs to identify which clock signal to operate upon.
> >   *
> >   * @dev: The device which implements the clock signal.
> > + * @rate: The clock rate (in HZ).
> >   * @id: The clock signal ID within the provider.
> >   * @data: An optional data field for scenarios where a single
> > integer ID is not
> >   *	  sufficient. If used, it can be populated through
> > an .of_xlate op and @@ -55,6 +56,7 @@ struct udevice;
> >   */
> >  struct clk {
> >  	struct udevice *dev;
> > +	unsigned long rate;	/* in HZ */  
> 
> Can this be unsigned long long ? Think of 3 GHz PLL on arm32 in IDT
> Versaclock line of clock synthesisers ; this would overflow right
> here.
> 

Thanks for spotting this - I will use unsigned long long instead.


Best regards,

Lukasz Majewski

--

DENX Software Engineering GmbH,      Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-59 Fax: (+49)-8142-66989-80 Email: lukma at denx.de
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[U-Boot] [PATCH v4 04/13] clk: Extend struct clk to provide information regarding clock rate

[Stefano Babic]

On 17/05/19 00:10, Lukasz Majewski wrote:
> This commit extends the struct clk to provide information regarding the
> clock rate.
> As a result the clock tree traversal is performed at most once, and further
> reads are using the cached value.
> 
> Signed-off-by: Lukasz Majewski <lukma@denx.de>
> 
> ---
> 
> Changes in v4:
> - None
> 
> Changes in v3: None
> 
>  include/clk.h | 2 ++
>  1 file changed, 2 insertions(+)
> 
> diff --git a/include/clk.h b/include/clk.h
> index a909b71f1a..1f2fd15bb5 100644
> --- a/include/clk.h
> +++ b/include/clk.h
> @@ -40,6 +40,7 @@ struct udevice;
>   * other clock APIs to identify which clock signal to operate upon.
>   *
>   * @dev: The device which implements the clock signal.
> + * @rate: The clock rate (in HZ).
>   * @id: The clock signal ID within the provider.
>   * @data: An optional data field for scenarios where a single integer ID is not
>   *	  sufficient. If used, it can be populated through an .of_xlate op and
> @@ -55,6 +56,7 @@ struct udevice;
>   */
>  struct clk {
>  	struct udevice *dev;
> +	unsigned long rate;	/* in HZ */
>  	/*
>  	 * Written by of_xlate. In the future, we might add more fields here.
>  	 */
> 


Reviewed-by: Stefano Babic <sbabic@denx.de>

Best regards,
Stefano Babic

-- 
=====================================================================
DENX Software Engineering GmbH,      Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sbabic at denx.de
=====================================================================

[U-Boot] [PATCH v4 04/13] clk: Extend struct clk to provide

[sbabic at denx.de]

> This commit extends the struct clk to provide information regarding the
> clock rate.
> As a result the clock tree traversal is performed at most once, and further
> reads are using the cached value.
> Signed-off-by: Lukasz Majewski <lukma@denx.de>
> Reviewed-by: Stefano Babic <sbabic@denx.de>

Applied to u-boot-imx, master, thanks !

Best regards,
Stefano Babic

-- 
=====================================================================
DENX Software Engineering GmbH,      Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sbabic at denx.de
=====================================================================

[U-Boot] [PATCH v4 05/13] clk: Extend struct clk to provide clock type agnostic flags

[Lukasz Majewski]

This commit extends the struct clk to provide information regarding the
flags related to this devices.

Those flags are clk device agnostic and indicate generic features
(like e.g. CLK_GET_RATE_NOCACHE - the need to always recalculate the rate).

Signed-off-by: Lukasz Majewski <lukma@denx.de>

---

Changes in v4:
- New patch

Changes in v3: None

 include/clk.h | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/include/clk.h b/include/clk.h
index 1f2fd15bb5..89dc64bfaf 100644
--- a/include/clk.h
+++ b/include/clk.h
@@ -41,6 +41,9 @@ struct udevice;
  *
  * @dev: The device which implements the clock signal.
  * @rate: The clock rate (in HZ).
+ * @flags: Flags used across common clock structure (e.g. CLK_)
+ *         Clock IP blocks specific flags (i.e. mux, div, gate, etc) are defined
+ *         in struct's for those devices (e.g. struct clk_mux).
  * @id: The clock signal ID within the provider.
  * @data: An optional data field for scenarios where a single integer ID is not
  *	  sufficient. If used, it can be populated through an .of_xlate op and
@@ -57,6 +60,7 @@ struct udevice;
 struct clk {
 	struct udevice *dev;
 	unsigned long rate;	/* in HZ */
+	uint32_t flags;
 	/*
 	 * Written by of_xlate. In the future, we might add more fields here.
 	 */
-- 
2.11.0

[U-Boot] [PATCH v4 05/13] clk: Extend struct clk to provide clock type agnostic flags

[Peng Fan]

> Subject: [PATCH v4 05/13] clk: Extend struct clk to provide clock type agnostic
> flags
> 
> This commit extends the struct clk to provide information regarding the flags
> related to this devices.
> 
> Those flags are clk device agnostic and indicate generic features (like e.g.
> CLK_GET_RATE_NOCACHE - the need to always recalculate the rate).
> 
> Signed-off-by: Lukasz Majewski <lukma@denx.de>
> 
> ---
> 
> Changes in v4:
> - New patch
> 
> Changes in v3: None
> 
>  include/clk.h | 4 ++++
>  1 file changed, 4 insertions(+)
> 
> diff --git a/include/clk.h b/include/clk.h index 1f2fd15bb5..89dc64bfaf 100644
> --- a/include/clk.h
> +++ b/include/clk.h
> @@ -41,6 +41,9 @@ struct udevice;
>   *
>   * @dev: The device which implements the clock signal.
>   * @rate: The clock rate (in HZ).
> + * @flags: Flags used across common clock structure (e.g. CLK_)
> + *         Clock IP blocks specific flags (i.e. mux, div, gate, etc) are defined
> + *         in struct's for those devices (e.g. struct clk_mux).
>   * @id: The clock signal ID within the provider.
>   * @data: An optional data field for scenarios where a single integer ID is
> not
>   *	  sufficient. If used, it can be populated through an .of_xlate op and
> @@ -57,6 +60,7 @@ struct udevice;
>  struct clk {
>  	struct udevice *dev;
>  	unsigned long rate;	/* in HZ */
> +	uint32_t flags;
>  	/*
>  	 * Written by of_xlate. In the future, we might add more fields here.
>  	 */

Reviewed-by: Peng Fan <peng.fan@nxp.com>

> --
> 2.11.0

[U-Boot] [PATCH v4 05/13] clk: Extend struct clk to provide clock type agnostic flags

[Stefano Babic]

On 17/05/19 00:10, Lukasz Majewski wrote:
> This commit extends the struct clk to provide information regarding the
> flags related to this devices.
> 
> Those flags are clk device agnostic and indicate generic features
> (like e.g. CLK_GET_RATE_NOCACHE - the need to always recalculate the rate).
> 
> Signed-off-by: Lukasz Majewski <lukma@denx.de>
> 
> ---
> 
> Changes in v4:
> - New patch
> 
> Changes in v3: None
> 
>  include/clk.h | 4 ++++
>  1 file changed, 4 insertions(+)
> 
> diff --git a/include/clk.h b/include/clk.h
> index 1f2fd15bb5..89dc64bfaf 100644
> --- a/include/clk.h
> +++ b/include/clk.h
> @@ -41,6 +41,9 @@ struct udevice;
>   *
>   * @dev: The device which implements the clock signal.
>   * @rate: The clock rate (in HZ).
> + * @flags: Flags used across common clock structure (e.g. CLK_)
> + *         Clock IP blocks specific flags (i.e. mux, div, gate, etc) are defined
> + *         in struct's for those devices (e.g. struct clk_mux).
>   * @id: The clock signal ID within the provider.
>   * @data: An optional data field for scenarios where a single integer ID is not
>   *	  sufficient. If used, it can be populated through an .of_xlate op and
> @@ -57,6 +60,7 @@ struct udevice;
>  struct clk {
>  	struct udevice *dev;
>  	unsigned long rate;	/* in HZ */
> +	uint32_t flags;
>  	/*
>  	 * Written by of_xlate. In the future, we might add more fields here.
>  	 */
> 


Reviewed-by: Stefano Babic <sbabic@denx.de>

Best regards,
Stefano Babic

-- 
=====================================================================
DENX Software Engineering GmbH,      Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sbabic at denx.de
=====================================================================

[U-Boot] [PATCH v4 05/13] clk: Extend struct clk to provide clock

[sbabic at denx.de]

> This commit extends the struct clk to provide information regarding the
> flags related to this devices.
> Those flags are clk device agnostic and indicate generic features
> (like e.g. CLK_GET_RATE_NOCACHE - the need to always recalculate the rate).
> Signed-off-by: Lukasz Majewski <lukma@denx.de>
> Reviewed-by: Peng Fan <peng.fan@nxp.com>
> Reviewed-by: Stefano Babic <sbabic@denx.de>

Applied to u-boot-imx, master, thanks !

Best regards,
Stefano Babic

-- 
=====================================================================
DENX Software Engineering GmbH,      Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sbabic at denx.de
=====================================================================

[U-Boot] [PATCH v4 06/13] clk: Provide struct clk for fixed rate clock (clk_fixed_rate.c)

[Lukasz Majewski]

Up till now the fixed rate clock ('osc') has been added to UCLASS_CLK
without declaring struct clk. As a result it was only accessible by
iterating the udevice's uclass list.

This is a problem for clock code, which operates on pointers to struct
clk (like clk_get_rate()), not udevices.

After this change struct clk is accessible from udevice and udevice from
struct clk.

Signed-off-by: Lukasz Majewski <lukma@denx.de>

---

Changes in v4:
- None

Changes in v3: None

 drivers/clk/clk_fixed_rate.c | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/drivers/clk/clk_fixed_rate.c b/drivers/clk/clk_fixed_rate.c
index 50dbb13655..089f060a23 100644
--- a/drivers/clk/clk_fixed_rate.c
+++ b/drivers/clk/clk_fixed_rate.c
@@ -8,6 +8,7 @@
 #include <dm.h>
 
 struct clk_fixed_rate {
+	struct clk clk;
 	unsigned long fixed_rate;
 };
 
@@ -24,10 +25,14 @@ const struct clk_ops clk_fixed_rate_ops = {
 
 static int clk_fixed_rate_ofdata_to_platdata(struct udevice *dev)
 {
+	struct clk *clk = &to_clk_fixed_rate(dev)->clk;
 #if !CONFIG_IS_ENABLED(OF_PLATDATA)
 	to_clk_fixed_rate(dev)->fixed_rate =
 		dev_read_u32_default(dev, "clock-frequency", 0);
 #endif
+	/* Make fixed rate clock accessible from higher level struct clk */
+	dev->driver_data = (ulong)clk;
+	clk->dev = dev;
 
 	return 0;
 }
-- 
2.11.0

[U-Boot] [PATCH v4 06/13] clk: Provide struct clk for fixed rate clock (clk_fixed_rate.c)

[Peng Fan]

> Subject: [PATCH v4 06/13] clk: Provide struct clk for fixed rate clock
> (clk_fixed_rate.c)
> 
> Up till now the fixed rate clock ('osc') has been added to UCLASS_CLK without
> declaring struct clk. As a result it was only accessible by iterating the
> udevice's uclass list.
> 
> This is a problem for clock code, which operates on pointers to struct clk (like
> clk_get_rate()), not udevices.
> 
> After this change struct clk is accessible from udevice and udevice from struct
> clk.
> 
> Signed-off-by: Lukasz Majewski <lukma@denx.de>
> 
> ---
> 
> Changes in v4:
> - None
> 
> Changes in v3: None
> 
>  drivers/clk/clk_fixed_rate.c | 5 +++++
>  1 file changed, 5 insertions(+)
> 
> diff --git a/drivers/clk/clk_fixed_rate.c b/drivers/clk/clk_fixed_rate.c index
> 50dbb13655..089f060a23 100644
> --- a/drivers/clk/clk_fixed_rate.c
> +++ b/drivers/clk/clk_fixed_rate.c
> @@ -8,6 +8,7 @@
>  #include <dm.h>
> 
>  struct clk_fixed_rate {
> +	struct clk clk;
>  	unsigned long fixed_rate;
>  };
> 
> @@ -24,10 +25,14 @@ const struct clk_ops clk_fixed_rate_ops = {
> 
>  static int clk_fixed_rate_ofdata_to_platdata(struct udevice *dev)  {
> +	struct clk *clk = &to_clk_fixed_rate(dev)->clk;
>  #if !CONFIG_IS_ENABLED(OF_PLATDATA)
>  	to_clk_fixed_rate(dev)->fixed_rate =
>  		dev_read_u32_default(dev, "clock-frequency", 0);  #endif
> +	/* Make fixed rate clock accessible from higher level struct clk */
> +	dev->driver_data = (ulong)clk;
> +	clk->dev = dev;
> 

Reviewed-by: Peng Fan <peng.fan@nxp.com>

>  	return 0;
>  }
> --
> 2.11.0

[U-Boot] [PATCH v4 06/13] clk: Provide struct clk for fixed rate clock (clk_fixed_rate.c)

[Stefano Babic]

On 17/05/19 00:10, Lukasz Majewski wrote:
> Up till now the fixed rate clock ('osc') has been added to UCLASS_CLK
> without declaring struct clk. As a result it was only accessible by
> iterating the udevice's uclass list.
> 
> This is a problem for clock code, which operates on pointers to struct
> clk (like clk_get_rate()), not udevices.
> 
> After this change struct clk is accessible from udevice and udevice from
> struct clk.
> 
> Signed-off-by: Lukasz Majewski <lukma@denx.de>
> 
> ---
> 
> Changes in v4:
> - None
> 
> Changes in v3: None
> 
>  drivers/clk/clk_fixed_rate.c | 5 +++++
>  1 file changed, 5 insertions(+)
> 
> diff --git a/drivers/clk/clk_fixed_rate.c b/drivers/clk/clk_fixed_rate.c
> index 50dbb13655..089f060a23 100644
> --- a/drivers/clk/clk_fixed_rate.c
> +++ b/drivers/clk/clk_fixed_rate.c
> @@ -8,6 +8,7 @@
>  #include <dm.h>
>  
>  struct clk_fixed_rate {
> +	struct clk clk;
>  	unsigned long fixed_rate;
>  };
>  
> @@ -24,10 +25,14 @@ const struct clk_ops clk_fixed_rate_ops = {
>  
>  static int clk_fixed_rate_ofdata_to_platdata(struct udevice *dev)
>  {
> +	struct clk *clk = &to_clk_fixed_rate(dev)->clk;
>  #if !CONFIG_IS_ENABLED(OF_PLATDATA)
>  	to_clk_fixed_rate(dev)->fixed_rate =
>  		dev_read_u32_default(dev, "clock-frequency", 0);
>  #endif
> +	/* Make fixed rate clock accessible from higher level struct clk */
> +	dev->driver_data = (ulong)clk;
> +	clk->dev = dev;
>  
>  	return 0;
>  }
> 

Reviewed-by: Stefano Babic <sbabic@denx.de>

Best regards,
Stefano Babic
-- 
=====================================================================
DENX Software Engineering GmbH,      Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sbabic at denx.de
=====================================================================

[U-Boot] [PATCH v4 06/13] clk: Provide struct clk for fixed rate

[sbabic at denx.de]

> Up till now the fixed rate clock ('osc') has been added to UCLASS_CLK
> without declaring struct clk. As a result it was only accessible by
> iterating the udevice's uclass list.
> This is a problem for clock code, which operates on pointers to struct
> clk (like clk_get_rate()), not udevices.
> After this change struct clk is accessible from udevice and udevice from
> struct clk.
> Signed-off-by: Lukasz Majewski <lukma@denx.de>
> Reviewed-by: Peng Fan <peng.fan@nxp.com>
> Reviewed-by: Stefano Babic <sbabic@denx.de>

Applied to u-boot-imx, master, thanks !

Best regards,
Stefano Babic

-- 
=====================================================================
DENX Software Engineering GmbH,      Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sbabic at denx.de
=====================================================================

[U-Boot] [PATCH v4 07/13] dm: clk: Define clk_get_parent() for clk operations

[Lukasz Majewski]

This commit adds the clk_get_parent() function, which is responsible
for getting the parent's struct clock pointer.

U-boot's DM support for getting parent is different (the parent
relationship is in udevice) than the one in common clock framework (CCF)
in Linux. To obtain the pointer to struct clk of parent the
pdev->driver_data field is read.

Signed-off-by: Lukasz Majewski <lukma@denx.de>

---

Changes in v4: None
Changes in v3:
- New patch

 drivers/clk/clk-uclass.c | 15 +++++++++++++++
 include/clk.h            |  9 +++++++++
 2 files changed, 24 insertions(+)

diff --git a/drivers/clk/clk-uclass.c b/drivers/clk/clk-uclass.c
index 79b3b0494c..1a726dafaa 100644
--- a/drivers/clk/clk-uclass.c
+++ b/drivers/clk/clk-uclass.c
@@ -379,6 +379,21 @@ ulong clk_get_rate(struct clk *clk)
 	return ops->get_rate(clk);
 }
 
+struct clk *clk_get_parent(struct clk *clk)
+{
+	struct udevice *pdev;
+	struct clk *pclk;
+
+	debug("%s(clk=%p)\n", __func__, clk);
+
+	pdev = dev_get_parent(clk->dev);
+	pclk = (struct clk *)dev_get_driver_data(pdev);
+	if (!pclk)
+		return ERR_PTR(-ENODEV);
+
+	return pclk;
+}
+
 ulong clk_set_rate(struct clk *clk, ulong rate)
 {
 	const struct clk_ops *ops = clk_dev_ops(clk->dev);
diff --git a/include/clk.h b/include/clk.h
index 89dc64bfaf..0873b1e507 100644
--- a/include/clk.h
+++ b/include/clk.h
@@ -259,6 +259,15 @@ int clk_free(struct clk *clk);
 ulong clk_get_rate(struct clk *clk);
 
 /**
+ * clk_get_parent() - Get current clock's parent.
+ *
+ * @clk:	A clock struct that was previously successfully requested by
+ *		clk_request/get_by_*().
+ * @return pointer to parent's struct clk, or error code passed as pointer
+ */
+struct clk *clk_get_parent(struct clk *clk);
+
+/**
  * clk_set_rate() - Set current clock rate.
  *
  * @clk:	A clock struct that was previously successfully requested by
-- 
2.11.0

[U-Boot] [PATCH v4 07/13] dm: clk: Define clk_get_parent() for clk operations

[Peng Fan]

> -----Original Message-----
> From: Lukasz Majewski [mailto:lukma at denx.de]
> Sent: 2019年5月17日 6:11
> To: Stefano Babic <sbabic@denx.de>; Fabio Estevam <festevam@gmail.com>;
> Marek Vasut <marex@denx.de>; Simon Glass <sjg@chromium.org>; Tom Rini
> <trini@konsulko.com>; u-boot at lists.denx.de; Jagan Teki
> <jagan@amarulasolutions.com>; Peng Fan <peng.fan@nxp.com>; Marcel
> Ziswiler <marcel.ziswiler@toradex.com>; Adam Ford <aford173@gmail.com>
> Cc: Lukasz Majewski <lukma@denx.de>; Neil Armstrong
> <narmstrong@baylibre.com>; Philipp Tomsich
> <philipp.tomsich@theobroma-systems.com>; Andreas Dannenberg
> <dannenberg@ti.com>; Fabrice Gasnier <fabrice.gasnier@st.com>; Liviu
> Dudau <Liviu.Dudau@foss.arm.com>
> Subject: [PATCH v4 07/13] dm: clk: Define clk_get_parent() for clk operations
> 
> This commit adds the clk_get_parent() function, which is responsible for
> getting the parent's struct clock pointer.
> 
> U-boot's DM support for getting parent is different (the parent relationship is
> in udevice) than the one in common clock framework (CCF) in Linux. To obtain
> the pointer to struct clk of parent the
> pdev->driver_data field is read.
> 
> Signed-off-by: Lukasz Majewski <lukma@denx.de>
> 
> ---
> 
> Changes in v4: None
> Changes in v3:
> - New patch
> 
>  drivers/clk/clk-uclass.c | 15 +++++++++++++++
>  include/clk.h            |  9 +++++++++
>  2 files changed, 24 insertions(+)
> 
> diff --git a/drivers/clk/clk-uclass.c b/drivers/clk/clk-uclass.c index
> 79b3b0494c..1a726dafaa 100644
> --- a/drivers/clk/clk-uclass.c
> +++ b/drivers/clk/clk-uclass.c
> @@ -379,6 +379,21 @@ ulong clk_get_rate(struct clk *clk)
>  	return ops->get_rate(clk);
>  }
> 
> +struct clk *clk_get_parent(struct clk *clk) {
> +	struct udevice *pdev;
> +	struct clk *pclk;
> +
> +	debug("%s(clk=%p)\n", __func__, clk);
> +
> +	pdev = dev_get_parent(clk->dev);
> +	pclk = (struct clk *)dev_get_driver_data(pdev);

This has a trick is that force driver_data to struct clk *,
and this requires all clk wrappers needs take clk
as the first element in the wrapper structure.
So better add a comment here. Then it is fine to me, and

Reviewed-by: Peng Fan <peng.fan@nxp.com>

> +	if (!pclk)
> +		return ERR_PTR(-ENODEV);
> +
> +	return pclk;
> +}
> +
>  ulong clk_set_rate(struct clk *clk, ulong rate)  {
>  	const struct clk_ops *ops = clk_dev_ops(clk->dev); diff --git
> a/include/clk.h b/include/clk.h index 89dc64bfaf..0873b1e507 100644
> --- a/include/clk.h
> +++ b/include/clk.h
> @@ -259,6 +259,15 @@ int clk_free(struct clk *clk);  ulong
> clk_get_rate(struct clk *clk);
> 
>  /**
> + * clk_get_parent() - Get current clock's parent.
> + *
> + * @clk:	A clock struct that was previously successfully requested by
> + *		clk_request/get_by_*().
> + * @return pointer to parent's struct clk, or error code passed as
> +pointer  */ struct clk *clk_get_parent(struct clk *clk);
> +
> +/**
>   * clk_set_rate() - Set current clock rate.
>   *
>   * @clk:	A clock struct that was previously successfully requested by
> --
> 2.11.0

[U-Boot] [PATCH v4 07/13] dm: clk: Define clk_get_parent() for clk operations

[Peng Fan]

> Subject: Re: [U-Boot] [PATCH v4 07/13] dm: clk: Define clk_get_parent() for
> clk operations
> 
> 
> 
> > -----Original Message-----
> > From: Lukasz Majewski [mailto:lukma at denx.de]
> > Sent: 2019年5月17日 6:11
> > To: Stefano Babic <sbabic@denx.de>; Fabio Estevam
> > <festevam@gmail.com>; Marek Vasut <marex@denx.de>; Simon Glass
> > <sjg@chromium.org>; Tom Rini <trini@konsulko.com>;
> > u-boot at lists.denx.de; Jagan Teki <jagan@amarulasolutions.com>; Peng
> > Fan <peng.fan@nxp.com>; Marcel Ziswiler
> <marcel.ziswiler@toradex.com>;
> > Adam Ford <aford173@gmail.com>
> > Cc: Lukasz Majewski <lukma@denx.de>; Neil Armstrong
> > <narmstrong@baylibre.com>; Philipp Tomsich
> > <philipp.tomsich@theobroma-systems.com>; Andreas Dannenberg
> > <dannenberg@ti.com>; Fabrice Gasnier <fabrice.gasnier@st.com>; Liviu
> > Dudau <Liviu.Dudau@foss.arm.com>
> > Subject: [PATCH v4 07/13] dm: clk: Define clk_get_parent() for clk
> > operations
> >
> > This commit adds the clk_get_parent() function, which is responsible
> > for getting the parent's struct clock pointer.
> >
> > U-boot's DM support for getting parent is different (the parent
> > relationship is in udevice) than the one in common clock framework
> > (CCF) in Linux. To obtain the pointer to struct clk of parent the
> > pdev->driver_data field is read.
> >
> > Signed-off-by: Lukasz Majewski <lukma@denx.de>
> >
> > ---
> >
> > Changes in v4: None
> > Changes in v3:
> > - New patch
> >
> >  drivers/clk/clk-uclass.c | 15 +++++++++++++++
> >  include/clk.h            |  9 +++++++++
> >  2 files changed, 24 insertions(+)
> >
> > diff --git a/drivers/clk/clk-uclass.c b/drivers/clk/clk-uclass.c index
> > 79b3b0494c..1a726dafaa 100644
> > --- a/drivers/clk/clk-uclass.c
> > +++ b/drivers/clk/clk-uclass.c
> > @@ -379,6 +379,21 @@ ulong clk_get_rate(struct clk *clk)
> >  	return ops->get_rate(clk);
> >  }
> >
> > +struct clk *clk_get_parent(struct clk *clk) {
> > +	struct udevice *pdev;
> > +	struct clk *pclk;
> > +
> > +	debug("%s(clk=%p)\n", __func__, clk);
> > +
> > +	pdev = dev_get_parent(clk->dev);
> > +	pclk = (struct clk *)dev_get_driver_data(pdev);
> 
> This has a trick is that force driver_data to struct clk *, and this requires all clk
> wrappers needs take clk as the first element in the wrapper structure.
> So better add a comment here. Then it is fine to me, and

Sorry, drop my upper comments. The code is correct.
So Reviewed-by: Peng Fan <peng.fan@nxp.com>

> 
> Reviewed-by: Peng Fan <peng.fan@nxp.com>
> 
> > +	if (!pclk)
> > +		return ERR_PTR(-ENODEV);
> > +
> > +	return pclk;
> > +}
> > +
> >  ulong clk_set_rate(struct clk *clk, ulong rate)  {
> >  	const struct clk_ops *ops = clk_dev_ops(clk->dev); diff --git
> > a/include/clk.h b/include/clk.h index 89dc64bfaf..0873b1e507 100644
> > --- a/include/clk.h
> > +++ b/include/clk.h
> > @@ -259,6 +259,15 @@ int clk_free(struct clk *clk);  ulong
> > clk_get_rate(struct clk *clk);
> >
> >  /**
> > + * clk_get_parent() - Get current clock's parent.
> > + *
> > + * @clk:	A clock struct that was previously successfully requested by
> > + *		clk_request/get_by_*().
> > + * @return pointer to parent's struct clk, or error code passed as
> > +pointer  */ struct clk *clk_get_parent(struct clk *clk);
> > +
> > +/**
> >   * clk_set_rate() - Set current clock rate.
> >   *
> >   * @clk:	A clock struct that was previously successfully requested by
> > --
> > 2.11.0
> 
> _______________________________________________
> U-Boot mailing list
> U-Boot at lists.denx.de
> https://eur01.safelinks.protection.outlook.com/?url=https%3A%2F%2Flists.d
> enx.de%2Flistinfo%2Fu-boot&amp;data=02%7C01%7CPeng.Fan%40nxp.com
> %7C9d8b9fb6d116473a8af508d6da8b1d64%7C686ea1d3bc2b4c6fa92cd99c5
> c301635%7C0%7C0%7C636936688386713361&amp;sdata=68OR%2Fa6jjixt2
> h5bs0darbR4%2B5Yz88JD51RfjSCfK3Q%3D&amp;reserved=0

[U-Boot] [PATCH v4 07/13] dm: clk: Define clk_get_parent() for clk operations

[Peng Fan]

> Subject: [PATCH v4 07/13] dm: clk: Define clk_get_parent() for clk operations
> 
> This commit adds the clk_get_parent() function, which is responsible for
> getting the parent's struct clock pointer.
> 
> U-boot's DM support for getting parent is different (the parent relationship is
> in udevice) than the one in common clock framework (CCF) in Linux. To obtain
> the pointer to struct clk of parent the
> pdev->driver_data field is read.
> 
> Signed-off-by: Lukasz Majewski <lukma@denx.de>
> 
> ---
> 
> Changes in v4: None
> Changes in v3:
> - New patch
> 
>  drivers/clk/clk-uclass.c | 15 +++++++++++++++
>  include/clk.h            |  9 +++++++++
>  2 files changed, 24 insertions(+)
> 
> diff --git a/drivers/clk/clk-uclass.c b/drivers/clk/clk-uclass.c index
> 79b3b0494c..1a726dafaa 100644
> --- a/drivers/clk/clk-uclass.c
> +++ b/drivers/clk/clk-uclass.c
> @@ -379,6 +379,21 @@ ulong clk_get_rate(struct clk *clk)
>  	return ops->get_rate(clk);
>  }
> 
> +struct clk *clk_get_parent(struct clk *clk) {
> +	struct udevice *pdev;
> +	struct clk *pclk;
> +
> +	debug("%s(clk=%p)\n", __func__, clk);
> +
> +	pdev = dev_get_parent(clk->dev);
> +	pclk = (struct clk *)dev_get_driver_data(pdev);
> +	if (!pclk)
> +		return ERR_PTR(-ENODEV);
> +
> +	return pclk;
> +}
> +
>  ulong clk_set_rate(struct clk *clk, ulong rate)  {
>  	const struct clk_ops *ops = clk_dev_ops(clk->dev); diff --git
> a/include/clk.h b/include/clk.h index 89dc64bfaf..0873b1e507 100644
> --- a/include/clk.h
> +++ b/include/clk.h
> @@ -259,6 +259,15 @@ int clk_free(struct clk *clk);  ulong
> clk_get_rate(struct clk *clk);
> 
>  /**
> + * clk_get_parent() - Get current clock's parent.
> + *
> + * @clk:	A clock struct that was previously successfully requested by
> + *		clk_request/get_by_*().
> + * @return pointer to parent's struct clk, or error code passed as
> +pointer  */ struct clk *clk_get_parent(struct clk *clk);
> +
> +/**
>   * clk_set_rate() - Set current clock rate.
>   *
>   * @clk:	A clock struct that was previously successfully requested by
> --

Reviewed-by: Peng Fan <peng.fan@nxp.com>

> 2.11.0

[U-Boot] [PATCH v4 07/13] dm: clk: Define clk_get_parent() for clk operations

[Simon Glass]

On Thu, 16 May 2019 at 16:11, Lukasz Majewski <lukma@denx.de> wrote:
>
> This commit adds the clk_get_parent() function, which is responsible
> for getting the parent's struct clock pointer.
>
> U-boot's DM support for getting parent is different (the parent
> relationship is in udevice) than the one in common clock framework (CCF)
> in Linux. To obtain the pointer to struct clk of parent the
> pdev->driver_data field is read.
>
> Signed-off-by: Lukasz Majewski <lukma@denx.de>
>
> ---
>
> Changes in v4: None
> Changes in v3:
> - New patch
>
>  drivers/clk/clk-uclass.c | 15 +++++++++++++++
>  include/clk.h            |  9 +++++++++
>  2 files changed, 24 insertions(+)

Please can you add a test for this?

Regards,
Simon

[U-Boot] [PATCH v4 07/13] dm: clk: Define clk_get_parent() for clk operations

[Lukasz Majewski]

On Sat, 18 May 2019 10:08:36 -0600
Simon Glass <sjg@chromium.org> wrote:

> On Thu, 16 May 2019 at 16:11, Lukasz Majewski <lukma@denx.de> wrote:
> >
> > This commit adds the clk_get_parent() function, which is responsible
> > for getting the parent's struct clock pointer.
> >
> > U-boot's DM support for getting parent is different (the parent
> > relationship is in udevice) than the one in common clock framework
> > (CCF) in Linux. To obtain the pointer to struct clk of parent the
> > pdev->driver_data field is read.
> >
> > Signed-off-by: Lukasz Majewski <lukma@denx.de>
> >
> > ---
> >
> > Changes in v4: None
> > Changes in v3:
> > - New patch
> >
> >  drivers/clk/clk-uclass.c | 15 +++++++++++++++
> >  include/clk.h            |  9 +++++++++
> >  2 files changed, 24 insertions(+)  
> 
> Please can you add a test for this?

It is implicitly covered here:
http://patchwork.ozlabs.org/patch/1100767/

but maybe shall I add a separate test case?

However, considering the other reply to the driver_data field usage,
those tests would probably need redesign anyway.

> 
> Regards,
> Simon

Best regards,

Lukasz Majewski

--

DENX Software Engineering GmbH,      Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-59 Fax: (+49)-8142-66989-80 Email: lukma at denx.de
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[U-Boot] [PATCH v4 07/13] dm: clk: Define clk_get_parent() for clk operations

[Simon Glass]

Hi Lukasz,

On Sat, 18 May 2019 at 14:52, Lukasz Majewski <lukma@denx.de> wrote:
>
> On Sat, 18 May 2019 10:08:36 -0600
> Simon Glass <sjg@chromium.org> wrote:
>
> > On Thu, 16 May 2019 at 16:11, Lukasz Majewski <lukma@denx.de> wrote:
> > >
> > > This commit adds the clk_get_parent() function, which is responsible
> > > for getting the parent's struct clock pointer.
> > >
> > > U-boot's DM support for getting parent is different (the parent
> > > relationship is in udevice) than the one in common clock framework
> > > (CCF) in Linux. To obtain the pointer to struct clk of parent the
> > > pdev->driver_data field is read.
> > >
> > > Signed-off-by: Lukasz Majewski <lukma@denx.de>
> > >
> > > ---
> > >
> > > Changes in v4: None
> > > Changes in v3:
> > > - New patch
> > >
> > >  drivers/clk/clk-uclass.c | 15 +++++++++++++++
> > >  include/clk.h            |  9 +++++++++
> > >  2 files changed, 24 insertions(+)
> >
> > Please can you add a test for this?
>
> It is implicitly covered here:
> http://patchwork.ozlabs.org/patch/1100767/
>
> but maybe shall I add a separate test case?

That's fine I think. We just want to make sure that if someone breaks
the code we will notice.

>
> However, considering the other reply to the driver_data field usage,
> those tests would probably need redesign anyway.

Yes I really am not keen on that.

Regards,
Simon

[U-Boot] [PATCH v4 07/13] dm: clk: Define clk_get_parent() for clk operations

[Stefano Babic]

On 17/05/19 00:10, Lukasz Majewski wrote:
> This commit adds the clk_get_parent() function, which is responsible
> for getting the parent's struct clock pointer.
> 
> U-boot's DM support for getting parent is different (the parent
> relationship is in udevice) than the one in common clock framework (CCF)
> in Linux. To obtain the pointer to struct clk of parent the
> pdev->driver_data field is read.
> 
> Signed-off-by: Lukasz Majewski <lukma@denx.de>
> 
> ---
> 
> Changes in v4: None
> Changes in v3:
> - New patch
> 
>  drivers/clk/clk-uclass.c | 15 +++++++++++++++
>  include/clk.h            |  9 +++++++++
>  2 files changed, 24 insertions(+)
> 
> diff --git a/drivers/clk/clk-uclass.c b/drivers/clk/clk-uclass.c
> index 79b3b0494c..1a726dafaa 100644
> --- a/drivers/clk/clk-uclass.c
> +++ b/drivers/clk/clk-uclass.c
> @@ -379,6 +379,21 @@ ulong clk_get_rate(struct clk *clk)
>  	return ops->get_rate(clk);
>  }
>  
> +struct clk *clk_get_parent(struct clk *clk)
> +{
> +	struct udevice *pdev;
> +	struct clk *pclk;
> +
> +	debug("%s(clk=%p)\n", __func__, clk);
> +
> +	pdev = dev_get_parent(clk->dev);
> +	pclk = (struct clk *)dev_get_driver_data(pdev);
> +	if (!pclk)
> +		return ERR_PTR(-ENODEV);
> +
> +	return pclk;
> +}
> +
>  ulong clk_set_rate(struct clk *clk, ulong rate)
>  {
>  	const struct clk_ops *ops = clk_dev_ops(clk->dev);
> diff --git a/include/clk.h b/include/clk.h
> index 89dc64bfaf..0873b1e507 100644
> --- a/include/clk.h
> +++ b/include/clk.h
> @@ -259,6 +259,15 @@ int clk_free(struct clk *clk);
>  ulong clk_get_rate(struct clk *clk);
>  
>  /**
> + * clk_get_parent() - Get current clock's parent.
> + *
> + * @clk:	A clock struct that was previously successfully requested by
> + *		clk_request/get_by_*().
> + * @return pointer to parent's struct clk, or error code passed as pointer
> + */
> +struct clk *clk_get_parent(struct clk *clk);
> +
> +/**
>   * clk_set_rate() - Set current clock rate.
>   *
>   * @clk:	A clock struct that was previously successfully requested by
> 

Reviewed-by: Stefano Babic <sbabic@denx.de>

Best regards,
Stefano Babic
-- 
=====================================================================
DENX Software Engineering GmbH,      Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sbabic at denx.de
=====================================================================

[U-Boot] [PATCH v4 07/13] dm: clk: Define clk_get_parent() for clk

[sbabic at denx.de]

> This commit adds the clk_get_parent() function, which is responsible
> for getting the parent's struct clock pointer.
> U-boot's DM support for getting parent is different (the parent
> relationship is in udevice) than the one in common clock framework (CCF)
> in Linux. To obtain the pointer to struct clk of parent the
> pdev->driver_data field is read.
> Signed-off-by: Lukasz Majewski <lukma@denx.de>
> Reviewed-by: Peng Fan <peng.fan@nxp.com>
> Reviewed-by: Peng Fan <peng.fan@nxp.com>
> Reviewed-by: Stefano Babic <sbabic@denx.de>

Applied to u-boot-imx, master, thanks !

Best regards,
Stefano Babic

-- 
=====================================================================
DENX Software Engineering GmbH,      Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sbabic at denx.de
=====================================================================

[U-Boot] [PATCH v4 08/13] dm: clk: Define clk_get_parent_rate() for clk operations

[Lukasz Majewski]

This commit adds the clk_get_parent_rate() function, which is responsible
for getting the rate of parent clock.
Unfortunately, u-boot's DM support for getting parent is different
(the parent relationship is in udevice) than the one in common clock
framework (CCF) in Linux.

To alleviate this problem - the clk_get_parent_rate() function has been
introduced to clk-uclass.c.

Signed-off-by: Lukasz Majewski <lukma@denx.de>

---

Changes in v4: None
Changes in v3:
- The rate information is now cached into struct clk field
- The clk_get_parent() is used to get pointer to the parent struct clk

 drivers/clk/clk-uclass.c | 22 ++++++++++++++++++++++
 include/clk.h            |  9 +++++++++
 2 files changed, 31 insertions(+)

diff --git a/drivers/clk/clk-uclass.c b/drivers/clk/clk-uclass.c
index 1a726dafaa..ea43871112 100644
--- a/drivers/clk/clk-uclass.c
+++ b/drivers/clk/clk-uclass.c
@@ -394,6 +394,28 @@ struct clk *clk_get_parent(struct clk *clk)
 	return pclk;
 }
 
+ulong clk_get_parent_rate(struct clk *clk)
+{
+	const struct clk_ops *ops;
+	struct clk *pclk;
+
+	debug("%s(clk=%p)\n", __func__, clk);
+
+	pclk = clk_get_parent(clk);
+	if (IS_ERR(pclk))
+		return -ENODEV;
+
+	ops = clk_dev_ops(pclk->dev);
+	if (!ops->get_rate)
+		return -ENOSYS;
+
+	/* Read the 'rate' if not already set */
+	if (!pclk->rate)
+		pclk->rate = clk_get_rate(pclk);
+
+	return pclk->rate;
+}
+
 ulong clk_set_rate(struct clk *clk, ulong rate)
 {
 	const struct clk_ops *ops = clk_dev_ops(clk->dev);
diff --git a/include/clk.h b/include/clk.h
index 0873b1e507..955699eb18 100644
--- a/include/clk.h
+++ b/include/clk.h
@@ -268,6 +268,15 @@ ulong clk_get_rate(struct clk *clk);
 struct clk *clk_get_parent(struct clk *clk);
 
 /**
+ * clk_get_parent_rate() - Get parent of current clock rate.
+ *
+ * @clk:	A clock struct that was previously successfully requested by
+ *		clk_request/get_by_*().
+ * @return clock rate in Hz, or -ve error code.
+ */
+ulong clk_get_parent_rate(struct clk *clk);
+
+/**
  * clk_set_rate() - Set current clock rate.
  *
  * @clk:	A clock struct that was previously successfully requested by
-- 
2.11.0

[U-Boot] [PATCH v4 08/13] dm: clk: Define clk_get_parent_rate() for clk operations

[Peng Fan]

> Subject: [PATCH v4 08/13] dm: clk: Define clk_get_parent_rate() for clk
> operations
> 
> This commit adds the clk_get_parent_rate() function, which is responsible for
> getting the rate of parent clock.
> Unfortunately, u-boot's DM support for getting parent is different (the parent
> relationship is in udevice) than the one in common clock framework (CCF) in
> Linux.
> 
> To alleviate this problem - the clk_get_parent_rate() function has been
> introduced to clk-uclass.c.
> 
> Signed-off-by: Lukasz Majewski <lukma@denx.de>
> 
> ---
> 
> Changes in v4: None
> Changes in v3:
> - The rate information is now cached into struct clk field
> - The clk_get_parent() is used to get pointer to the parent struct clk
> 
>  drivers/clk/clk-uclass.c | 22 ++++++++++++++++++++++
>  include/clk.h            |  9 +++++++++
>  2 files changed, 31 insertions(+)
> 
> diff --git a/drivers/clk/clk-uclass.c b/drivers/clk/clk-uclass.c index
> 1a726dafaa..ea43871112 100644
> --- a/drivers/clk/clk-uclass.c
> +++ b/drivers/clk/clk-uclass.c
> @@ -394,6 +394,28 @@ struct clk *clk_get_parent(struct clk *clk)
>  	return pclk;
>  }
> 
> +ulong clk_get_parent_rate(struct clk *clk) {
> +	const struct clk_ops *ops;
> +	struct clk *pclk;
> +
> +	debug("%s(clk=%p)\n", __func__, clk);
> +
> +	pclk = clk_get_parent(clk);
> +	if (IS_ERR(pclk))
> +		return -ENODEV;
> +
> +	ops = clk_dev_ops(pclk->dev);
> +	if (!ops->get_rate)
> +		return -ENOSYS;
> +
> +	/* Read the 'rate' if not already set */
> +	if (!pclk->rate)
> +		pclk->rate = clk_get_rate(pclk);
> +
> +	return pclk->rate;
> +}
> +
>  ulong clk_set_rate(struct clk *clk, ulong rate)  {
>  	const struct clk_ops *ops = clk_dev_ops(clk->dev); diff --git
> a/include/clk.h b/include/clk.h index 0873b1e507..955699eb18 100644
> --- a/include/clk.h
> +++ b/include/clk.h
> @@ -268,6 +268,15 @@ ulong clk_get_rate(struct clk *clk);  struct clk
> *clk_get_parent(struct clk *clk);
> 
>  /**
> + * clk_get_parent_rate() - Get parent of current clock rate.
> + *
> + * @clk:	A clock struct that was previously successfully requested by
> + *		clk_request/get_by_*().
> + * @return clock rate in Hz, or -ve error code.
> + */
> +ulong clk_get_parent_rate(struct clk *clk);
> +
> +/**
>   * clk_set_rate() - Set current clock rate.
>   *
>   * @clk:	A clock struct that was previously successfully requested by

Reviewed-by: Peng Fan <peng.fan@nxp.com>

> --
> 2.11.0

[U-Boot] [PATCH v4 08/13] dm: clk: Define clk_get_parent_rate() for clk operations

[Simon Glass]

Hi Lukasz,

On Thu, 16 May 2019 at 16:11, Lukasz Majewski <lukma@denx.de> wrote:
>
> This commit adds the clk_get_parent_rate() function, which is responsible
> for getting the rate of parent clock.
> Unfortunately, u-boot's DM support for getting parent is different
> (the parent relationship is in udevice) than the one in common clock
> framework (CCF) in Linux.
>
> To alleviate this problem - the clk_get_parent_rate() function has been
> introduced to clk-uclass.c.
>
> Signed-off-by: Lukasz Majewski <lukma@denx.de>
>
> ---
>
> Changes in v4: None
> Changes in v3:
> - The rate information is now cached into struct clk field
> - The clk_get_parent() is used to get pointer to the parent struct clk
>
>  drivers/clk/clk-uclass.c | 22 ++++++++++++++++++++++
>  include/clk.h            |  9 +++++++++
>  2 files changed, 31 insertions(+)
>

This also needs a test.

Regards,
Simon

[U-Boot] [PATCH v4 08/13] dm: clk: Define clk_get_parent_rate() for clk operations

[Lukasz Majewski]

Hi Simon,

> Hi Lukasz,
> 
> On Thu, 16 May 2019 at 16:11, Lukasz Majewski <lukma@denx.de> wrote:
> >
> > This commit adds the clk_get_parent_rate() function, which is
> > responsible for getting the rate of parent clock.
> > Unfortunately, u-boot's DM support for getting parent is different
> > (the parent relationship is in udevice) than the one in common clock
> > framework (CCF) in Linux.
> >
> > To alleviate this problem - the clk_get_parent_rate() function has
> > been introduced to clk-uclass.c.
> >
> > Signed-off-by: Lukasz Majewski <lukma@denx.de>
> >
> > ---
> >
> > Changes in v4: None
> > Changes in v3:
> > - The rate information is now cached into struct clk field
> > - The clk_get_parent() is used to get pointer to the parent struct
> > clk
> >
> >  drivers/clk/clk-uclass.c | 22 ++++++++++++++++++++++
> >  include/clk.h            |  9 +++++++++
> >  2 files changed, 31 insertions(+)
> >  
> 
> This also needs a test.

Please find corresponding test:

http://patchwork.ozlabs.org/patch/1100767/

which covers clk_get_parent() and clk_get_parent_rate() as well.

> 
> Regards,
> Simon




Best regards,

Lukasz Majewski

--

DENX Software Engineering GmbH,      Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-59 Fax: (+49)-8142-66989-80 Email: lukma at denx.de
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[U-Boot] [PATCH v4 08/13] dm: clk: Define clk_get_parent_rate() for

[sbabic at denx.de]

> This commit adds the clk_get_parent_rate() function, which is responsible
> for getting the rate of parent clock.
> Unfortunately, u-boot's DM support for getting parent is different
> (the parent relationship is in udevice) than the one in common clock
> framework (CCF) in Linux.
> To alleviate this problem - the clk_get_parent_rate() function has been
> introduced to clk-uclass.c.
> Signed-off-by: Lukasz Majewski <lukma@denx.de>
> Reviewed-by: Peng Fan <peng.fan@nxp.com>

Applied to u-boot-imx, master, thanks !

Best regards,
Stefano Babic

-- 
=====================================================================
DENX Software Engineering GmbH,      Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sbabic at denx.de
=====================================================================

[U-Boot] [PATCH v4 09/13] dm: clk: Define clk_get_by_id() for clk operations

[Lukasz Majewski]

This commit adds the clk_get_by_id() function, which is responsible
for getting the udevice with matching clk->id. Such approach allows
re-usage of inherit DM list relationship for the same class (UCLASS_CLK).
As a result - we don't need any other external list - it is just enough
to look for UCLASS_CLK related udevices.

Signed-off-by: Lukasz Majewski <lukma@denx.de>

---

Changes in v4: None
Changes in v3:
- Replace -ENODEV with -ENOENT
- Use **clkp instead of **c

 drivers/clk/clk-uclass.c | 22 ++++++++++++++++++++++
 include/clk.h            | 11 +++++++++++
 2 files changed, 33 insertions(+)

diff --git a/drivers/clk/clk-uclass.c b/drivers/clk/clk-uclass.c
index ea43871112..6f054396e3 100644
--- a/drivers/clk/clk-uclass.c
+++ b/drivers/clk/clk-uclass.c
@@ -490,6 +490,28 @@ int clk_disable_bulk(struct clk_bulk *bulk)
 	return 0;
 }
 
+int clk_get_by_id(ulong id, struct clk **clkp)
+{
+	struct udevice *dev;
+	struct uclass *uc;
+	int ret;
+
+	ret = uclass_get(UCLASS_CLK, &uc);
+	if (ret)
+		return ret;
+
+	uclass_foreach_dev(dev, uc) {
+		struct clk *clk = (struct clk *)dev_get_driver_data(dev);
+
+		if (clk && clk->id == id) {
+			*clkp = clk;
+			return 0;
+		}
+	}
+
+	return -ENOENT;
+}
+
 UCLASS_DRIVER(clk) = {
 	.id		= UCLASS_CLK,
 	.name		= "clk",
diff --git a/include/clk.h b/include/clk.h
index 955699eb18..32ac2386ed 100644
--- a/include/clk.h
+++ b/include/clk.h
@@ -345,4 +345,15 @@ static inline bool clk_valid(struct clk *clk)
 {
 	return !!clk->dev;
 }
+
+/**
+ * clk_get_by_id() - Get the clock by its ID
+ *
+ * @id:	The clock ID to search for
+ *
+ * @clkp:	A pointer to clock struct that has been found among added clocks
+ *              to UCLASS_CLK
+ * @return zero on success, or -ENOENT on error
+ */
+int clk_get_by_id(ulong id, struct clk **clkp);
 #endif
-- 
2.11.0

[U-Boot] [PATCH v4 09/13] dm: clk: Define clk_get_by_id() for clk operations

[Peng Fan]

> Subject: [PATCH v4 09/13] dm: clk: Define clk_get_by_id() for clk operations
> 
> This commit adds the clk_get_by_id() function, which is responsible for getting
> the udevice with matching clk->id. Such approach allows re-usage of inherit
> DM list relationship for the same class (UCLASS_CLK).
> As a result - we don't need any other external list - it is just enough to look for
> UCLASS_CLK related udevices.
> 
> Signed-off-by: Lukasz Majewski <lukma@denx.de>
> 
> ---
> 
> Changes in v4: None
> Changes in v3:
> - Replace -ENODEV with -ENOENT
> - Use **clkp instead of **c
> 
>  drivers/clk/clk-uclass.c | 22 ++++++++++++++++++++++
>  include/clk.h            | 11 +++++++++++
>  2 files changed, 33 insertions(+)
> 
> diff --git a/drivers/clk/clk-uclass.c b/drivers/clk/clk-uclass.c index
> ea43871112..6f054396e3 100644
> --- a/drivers/clk/clk-uclass.c
> +++ b/drivers/clk/clk-uclass.c
> @@ -490,6 +490,28 @@ int clk_disable_bulk(struct clk_bulk *bulk)
>  	return 0;
>  }
> 
> +int clk_get_by_id(ulong id, struct clk **clkp) {
> +	struct udevice *dev;
> +	struct uclass *uc;
> +	int ret;
> +
> +	ret = uclass_get(UCLASS_CLK, &uc);
> +	if (ret)
> +		return ret;
> +
> +	uclass_foreach_dev(dev, uc) {
> +		struct clk *clk = (struct clk *)dev_get_driver_data(dev);
> +
> +		if (clk && clk->id == id) {
> +			*clkp = clk;
> +			return 0;
> +		}
> +	}
> +
> +	return -ENOENT;
> +}
> +
>  UCLASS_DRIVER(clk) = {
>  	.id		= UCLASS_CLK,
>  	.name		= "clk",
> diff --git a/include/clk.h b/include/clk.h index 955699eb18..32ac2386ed
> 100644
> --- a/include/clk.h
> +++ b/include/clk.h
> @@ -345,4 +345,15 @@ static inline bool clk_valid(struct clk *clk)  {
>  	return !!clk->dev;
>  }
> +
> +/**
> + * clk_get_by_id() - Get the clock by its ID
> + *
> + * @id:	The clock ID to search for
> + *
> + * @clkp:	A pointer to clock struct that has been found among added
> clocks
> + *              to UCLASS_CLK
> + * @return zero on success, or -ENOENT on error  */ int
> +clk_get_by_id(ulong id, struct clk **clkp);

Reviewed-by: Peng Fan <peng.fan@nxp.com>

>  #endif
> --
> 2.11.0

[U-Boot] [PATCH v4 09/13] dm: clk: Define clk_get_by_id() for clk operations

[Simon Glass]

Hi Lukasz,

On Thu, 16 May 2019 at 16:11, Lukasz Majewski <lukma@denx.de> wrote:
>
> This commit adds the clk_get_by_id() function, which is responsible
> for getting the udevice with matching clk->id. Such approach allows
> re-usage of inherit DM list relationship for the same class (UCLASS_CLK).
> As a result - we don't need any other external list - it is just enough
> to look for UCLASS_CLK related udevices.
>
> Signed-off-by: Lukasz Majewski <lukma@denx.de>
>
> ---
>
> Changes in v4: None
> Changes in v3:
> - Replace -ENODEV with -ENOENT
> - Use **clkp instead of **c
>
>  drivers/clk/clk-uclass.c | 22 ++++++++++++++++++++++
>  include/clk.h            | 11 +++++++++++
>  2 files changed, 33 insertions(+)

Again this new function needs a test. I'll stop commenting now :-)

Regards,
Simon

[U-Boot] [PATCH v4 09/13] dm: clk: Define clk_get_by_id() for clk operations

[Lukasz Majewski]

Hi Simon,

> Hi Lukasz,
> 
> On Thu, 16 May 2019 at 16:11, Lukasz Majewski <lukma@denx.de> wrote:
> >
> > This commit adds the clk_get_by_id() function, which is responsible
> > for getting the udevice with matching clk->id. Such approach allows
> > re-usage of inherit DM list relationship for the same class
> > (UCLASS_CLK). As a result - we don't need any other external list -
> > it is just enough to look for UCLASS_CLK related udevices.
> >
> > Signed-off-by: Lukasz Majewski <lukma@denx.de>
> >
> > ---
> >
> > Changes in v4: None
> > Changes in v3:
> > - Replace -ENODEV with -ENOENT
> > - Use **clkp instead of **c
> >
> >  drivers/clk/clk-uclass.c | 22 ++++++++++++++++++++++
> >  include/clk.h            | 11 +++++++++++
> >  2 files changed, 33 insertions(+)  
> 
> Again this new function needs a test. I'll stop commenting now :-)
> 

Please find corresponding test:
http://patchwork.ozlabs.org/patch/1100769/

> Regards,
> Simon




Best regards,

Lukasz Majewski

--

DENX Software Engineering GmbH,      Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-59 Fax: (+49)-8142-66989-80 Email: lukma at denx.de
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[U-Boot] [PATCH v4 09/13] dm: clk: Define clk_get_by_id() for clk operations

[Stefano Babic]

On 17/05/19 00:10, Lukasz Majewski wrote:
> This commit adds the clk_get_by_id() function, which is responsible
> for getting the udevice with matching clk->id. Such approach allows
> re-usage of inherit DM list relationship for the same class (UCLASS_CLK).
> As a result - we don't need any other external list - it is just enough
> to look for UCLASS_CLK related udevices.
> 
> Signed-off-by: Lukasz Majewski <lukma@denx.de>
> 
> ---
> 
> Changes in v4: None
> Changes in v3:
> - Replace -ENODEV with -ENOENT
> - Use **clkp instead of **c
> 
>  drivers/clk/clk-uclass.c | 22 ++++++++++++++++++++++
>  include/clk.h            | 11 +++++++++++
>  2 files changed, 33 insertions(+)
> 
> diff --git a/drivers/clk/clk-uclass.c b/drivers/clk/clk-uclass.c
> index ea43871112..6f054396e3 100644
> --- a/drivers/clk/clk-uclass.c
> +++ b/drivers/clk/clk-uclass.c
> @@ -490,6 +490,28 @@ int clk_disable_bulk(struct clk_bulk *bulk)
>  	return 0;
>  }
>  
> +int clk_get_by_id(ulong id, struct clk **clkp)
> +{
> +	struct udevice *dev;
> +	struct uclass *uc;
> +	int ret;
> +
> +	ret = uclass_get(UCLASS_CLK, &uc);
> +	if (ret)
> +		return ret;
> +
> +	uclass_foreach_dev(dev, uc) {
> +		struct clk *clk = (struct clk *)dev_get_driver_data(dev);
> +
> +		if (clk && clk->id == id) {
> +			*clkp = clk;
> +			return 0;
> +		}
> +	}
> +
> +	return -ENOENT;
> +}
> +
>  UCLASS_DRIVER(clk) = {
>  	.id		= UCLASS_CLK,
>  	.name		= "clk",
> diff --git a/include/clk.h b/include/clk.h
> index 955699eb18..32ac2386ed 100644
> --- a/include/clk.h
> +++ b/include/clk.h
> @@ -345,4 +345,15 @@ static inline bool clk_valid(struct clk *clk)
>  {
>  	return !!clk->dev;
>  }
> +
> +/**
> + * clk_get_by_id() - Get the clock by its ID
> + *
> + * @id:	The clock ID to search for
> + *
> + * @clkp:	A pointer to clock struct that has been found among added clocks
> + *              to UCLASS_CLK
> + * @return zero on success, or -ENOENT on error
> + */
> +int clk_get_by_id(ulong id, struct clk **clkp);
>  #endif
> 

Reviewed-by: Stefano Babic <sbabic@denx.de>

Best regards,
Stefano Babic
-- 
=====================================================================
DENX Software Engineering GmbH,      Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sbabic at denx.de
=====================================================================

[U-Boot] [PATCH v4 09/13] dm: clk: Define clk_get_by_id() for clk

[sbabic at denx.de]

> This commit adds the clk_get_by_id() function, which is responsible
> for getting the udevice with matching clk->id. Such approach allows
> re-usage of inherit DM list relationship for the same class (UCLASS_CLK).
> As a result - we don't need any other external list - it is just enough
> to look for UCLASS_CLK related udevices.
> Signed-off-by: Lukasz Majewski <lukma@denx.de>
> Reviewed-by: Peng Fan <peng.fan@nxp.com>
> Reviewed-by: Stefano Babic <sbabic@denx.de>

Applied to u-boot-imx, master, thanks !

Best regards,
Stefano Babic

-- 
=====================================================================
DENX Software Engineering GmbH,      Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sbabic at denx.de
=====================================================================

[U-Boot] [PATCH v4 10/13] clk: test: Provide unit test for clk_get_by_id() method

[Lukasz Majewski]

This commit provides sandbox unit test for clk_get_by_id() method.

To test it default test clocks setup had to be adjusted to emulate
structure similar to clocks in the Common Clock Framework [CCF] (for
iMX devices).

The clk_get_by_id() relies on dev->driver_data having the pointer to
struct clk.

Signed-off-by: Lukasz Majewski <lukma@denx.de>

---

Changes in v4: None
Changes in v3:
- New patch

 arch/sandbox/include/asm/clk.h |  8 ++++++++
 drivers/clk/clk_sandbox_test.c | 23 +++++++++++++++++++++++
 test/dm/clk.c                  |  3 ++-
 3 files changed, 33 insertions(+), 1 deletion(-)

diff --git a/arch/sandbox/include/asm/clk.h b/arch/sandbox/include/asm/clk.h
index 2b1c49f783..90f925109f 100644
--- a/arch/sandbox/include/asm/clk.h
+++ b/arch/sandbox/include/asm/clk.h
@@ -63,6 +63,14 @@ int sandbox_clk_query_enable(struct udevice *dev, int id);
  */
 int sandbox_clk_test_get(struct udevice *dev);
 /**
+ * sandbox_clk_test_get_by_id - Ask the sandbox clock test device to request its
+ * clocks by using clock id.
+ *
+ * @dev:	The sandbox clock test (client) devivce.
+ * @return:	0 if OK, or a negative error code.
+ */
+int sandbox_clk_test_get_by_id(struct udevice *dev);
+/**
  * sandbox_clk_test_get_bulk - Ask the sandbox clock test device to request its
  * clocks with the bulk clk API.
  *
diff --git a/drivers/clk/clk_sandbox_test.c b/drivers/clk/clk_sandbox_test.c
index e8465dbfad..4d276f55b9 100644
--- a/drivers/clk/clk_sandbox_test.c
+++ b/drivers/clk/clk_sandbox_test.c
@@ -34,6 +34,29 @@ int sandbox_clk_test_get(struct udevice *dev)
 	return 0;
 }
 
+int sandbox_clk_test_get_by_id(struct udevice *dev)
+{
+	struct sandbox_clk_test *sbct = dev_get_priv(dev);
+	struct clk *clkp, *i2c_clk;
+	ulong driver_data_bkp;
+	const int id = 24;
+	int ret, id_bkp;
+
+	i2c_clk = &sbct->clks[SANDBOX_CLK_TEST_ID_I2C];
+
+	id_bkp = i2c_clk->id;
+	i2c_clk->id = id;
+	driver_data_bkp = i2c_clk->dev->driver_data;
+	i2c_clk->dev->driver_data = (ulong)i2c_clk;
+
+	ret = clk_get_by_id(id, &clkp);
+
+	i2c_clk->id = id_bkp;
+	i2c_clk->dev->driver_data = driver_data_bkp;
+
+	return ret;
+}
+
 int sandbox_clk_test_get_bulk(struct udevice *dev)
 {
 	struct sandbox_clk_test *sbct = dev_get_priv(dev);
diff --git a/test/dm/clk.c b/test/dm/clk.c
index f301ecbb45..1685532259 100644
--- a/test/dm/clk.c
+++ b/test/dm/clk.c
@@ -120,8 +120,9 @@ static int dm_test_clk(struct unit_test_state *uts)
 	ut_asserteq(0, sandbox_clk_query_enable(dev_clk, SANDBOX_CLK_ID_SPI));
 	ut_asserteq(0, sandbox_clk_query_enable(dev_clk, SANDBOX_CLK_ID_I2C));
 
-	ut_assertok(sandbox_clk_test_free(dev_test));
+	ut_asserteq(0, sandbox_clk_test_get_by_id(dev_test));
 
+	ut_assertok(sandbox_clk_test_free(dev_test));
 	return 0;
 }
 DM_TEST(dm_test_clk, DM_TESTF_SCAN_FDT);
-- 
2.11.0

[U-Boot] [PATCH v4 10/13] clk: test: Provide unit test for clk_get_by_id() method

[Peng Fan]

> Subject: [PATCH v4 10/13] clk: test: Provide unit test for clk_get_by_id()
> method
> 
> This commit provides sandbox unit test for clk_get_by_id() method.
> 
> To test it default test clocks setup had to be adjusted to emulate structure
> similar to clocks in the Common Clock Framework [CCF] (for iMX devices).
> 
> The clk_get_by_id() relies on dev->driver_data having the pointer to struct
> clk.
> 
> Signed-off-by: Lukasz Majewski <lukma@denx.de>
> 
> ---
> 
> Changes in v4: None
> Changes in v3:
> - New patch
> 
>  arch/sandbox/include/asm/clk.h |  8 ++++++++
> drivers/clk/clk_sandbox_test.c | 23 +++++++++++++++++++++++
>  test/dm/clk.c                  |  3 ++-
>  3 files changed, 33 insertions(+), 1 deletion(-)
> 
> diff --git a/arch/sandbox/include/asm/clk.h
> b/arch/sandbox/include/asm/clk.h index 2b1c49f783..90f925109f 100644
> --- a/arch/sandbox/include/asm/clk.h
> +++ b/arch/sandbox/include/asm/clk.h
> @@ -63,6 +63,14 @@ int sandbox_clk_query_enable(struct udevice *dev, int
> id);
>   */
>  int sandbox_clk_test_get(struct udevice *dev);
>  /**
> + * sandbox_clk_test_get_by_id - Ask the sandbox clock test device to
> +request its
> + * clocks by using clock id.
> + *
> + * @dev:	The sandbox clock test (client) devivce.
> + * @return:	0 if OK, or a negative error code.
> + */
> +int sandbox_clk_test_get_by_id(struct udevice *dev);
> +/**
>   * sandbox_clk_test_get_bulk - Ask the sandbox clock test device to request
> its
>   * clocks with the bulk clk API.
>   *
> diff --git a/drivers/clk/clk_sandbox_test.c b/drivers/clk/clk_sandbox_test.c
> index e8465dbfad..4d276f55b9 100644
> --- a/drivers/clk/clk_sandbox_test.c
> +++ b/drivers/clk/clk_sandbox_test.c
> @@ -34,6 +34,29 @@ int sandbox_clk_test_get(struct udevice *dev)
>  	return 0;
>  }
> 
> +int sandbox_clk_test_get_by_id(struct udevice *dev) {
> +	struct sandbox_clk_test *sbct = dev_get_priv(dev);
> +	struct clk *clkp, *i2c_clk;
> +	ulong driver_data_bkp;
> +	const int id = 24;
> +	int ret, id_bkp;
> +
> +	i2c_clk = &sbct->clks[SANDBOX_CLK_TEST_ID_I2C];
> +
> +	id_bkp = i2c_clk->id;
> +	i2c_clk->id = id;
> +	driver_data_bkp = i2c_clk->dev->driver_data;
> +	i2c_clk->dev->driver_data = (ulong)i2c_clk;
> +
> +	ret = clk_get_by_id(id, &clkp);
> +
> +	i2c_clk->id = id_bkp;
> +	i2c_clk->dev->driver_data = driver_data_bkp;
> +
> +	return ret;
> +}
> +
>  int sandbox_clk_test_get_bulk(struct udevice *dev)  {
>  	struct sandbox_clk_test *sbct = dev_get_priv(dev); diff --git
> a/test/dm/clk.c b/test/dm/clk.c index f301ecbb45..1685532259 100644
> --- a/test/dm/clk.c
> +++ b/test/dm/clk.c
> @@ -120,8 +120,9 @@ static int dm_test_clk(struct unit_test_state *uts)
>  	ut_asserteq(0, sandbox_clk_query_enable(dev_clk,
> SANDBOX_CLK_ID_SPI));
>  	ut_asserteq(0, sandbox_clk_query_enable(dev_clk,
> SANDBOX_CLK_ID_I2C));
> 
> -	ut_assertok(sandbox_clk_test_free(dev_test));
> +	ut_asserteq(0, sandbox_clk_test_get_by_id(dev_test));
> 
> +	ut_assertok(sandbox_clk_test_free(dev_test));
>  	return 0;

Reviewed-by: Peng Fan <peng.fan@nxp.com>

>  }
>  DM_TEST(dm_test_clk, DM_TESTF_SCAN_FDT);
> --
> 2.11.0

[U-Boot] [PATCH v4 10/13] clk: test: Provide unit test for

[sbabic at denx.de]

> This commit provides sandbox unit test for clk_get_by_id() method.
> To test it default test clocks setup had to be adjusted to emulate
> structure similar to clocks in the Common Clock Framework [CCF] (for
> iMX devices).
> The clk_get_by_id() relies on dev->driver_data having the pointer to
> struct clk.
> Signed-off-by: Lukasz Majewski <lukma@denx.de>
> Reviewed-by: Peng Fan <peng.fan@nxp.com>

Applied to u-boot-imx, master, thanks !

Best regards,
Stefano Babic

-- 
=====================================================================
DENX Software Engineering GmbH,      Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sbabic at denx.de
=====================================================================

[U-Boot] [PATCH v4 11/13] clk: test: Provide unit test for clk_get_parent_rate() method

[Lukasz Majewski]

This commit provides sandbox unit test for clk_get_parent_rate() method.

For testing the default test clocks setup had to be adjusted to emulate
structure similar to clocks in the Common Clock Framework [CCF]
(for iMX devices).

The clk_get_parent_rate() relies on dev->driver_data having the pointer
to proper struct clk.
It uses internally clk_get_parent() method also tested by this test.

Signed-off-by: Lukasz Majewski <lukma@denx.de>

---

Changes in v4: None
Changes in v3:
- New patch

 arch/sandbox/include/asm/clk.h |  8 ++++++++
 drivers/clk/clk_sandbox_test.c | 26 ++++++++++++++++++++++++++
 test/dm/clk.c                  |  1 +
 3 files changed, 35 insertions(+)

diff --git a/arch/sandbox/include/asm/clk.h b/arch/sandbox/include/asm/clk.h
index 90f925109f..1df9534236 100644
--- a/arch/sandbox/include/asm/clk.h
+++ b/arch/sandbox/include/asm/clk.h
@@ -79,6 +79,14 @@ int sandbox_clk_test_get_by_id(struct udevice *dev);
  */
 int sandbox_clk_test_get_bulk(struct udevice *dev);
 /**
+ * sandbox_clk_test_get_parent_rate - Ask the sandbox clock test device to
+ * query a passed clock's parent rate.
+ *
+ * @dev:	The sandbox clock test (client) devivce.
+ * @return:	The rate of the clock
+ */
+ulong sandbox_clk_test_get_parent_rate(struct udevice *dev);
+/**
  * sandbox_clk_test_get_rate - Ask the sandbox clock test device to query a
  * clock's rate.
  *
diff --git a/drivers/clk/clk_sandbox_test.c b/drivers/clk/clk_sandbox_test.c
index 4d276f55b9..8ea15614c1 100644
--- a/drivers/clk/clk_sandbox_test.c
+++ b/drivers/clk/clk_sandbox_test.c
@@ -64,6 +64,32 @@ int sandbox_clk_test_get_bulk(struct udevice *dev)
 	return clk_get_bulk(dev, &sbct->bulk);
 }
 
+ulong sandbox_clk_test_get_parent_rate(struct udevice *dev)
+{
+	struct sandbox_clk_test *sbct = dev_get_priv(dev);
+	struct clk *i2c_clk, *parent_clk;
+	struct udevice *parent_bkp;
+	ulong rate;
+
+	parent_clk = &sbct->clks[SANDBOX_CLK_TEST_ID_FIXED];
+	i2c_clk = &sbct->clks[SANDBOX_CLK_TEST_ID_I2C];
+
+	parent_clk->dev->driver_data = (ulong)parent_clk;
+	parent_bkp = i2c_clk->dev->parent;
+	i2c_clk->dev->parent = parent_clk->dev;
+
+	rate = clk_get_parent_rate(i2c_clk);
+
+	i2c_clk->dev->parent = parent_bkp;
+	parent_clk->dev->driver_data = 0;
+
+	/* Check if cache'd value is correct */
+	if (parent_clk->rate != 1234)
+		return 0;
+
+	return rate;
+}
+
 ulong sandbox_clk_test_get_rate(struct udevice *dev, int id)
 {
 	struct sandbox_clk_test *sbct = dev_get_priv(dev);
diff --git a/test/dm/clk.c b/test/dm/clk.c
index 1685532259..438e4277f0 100644
--- a/test/dm/clk.c
+++ b/test/dm/clk.c
@@ -121,6 +121,7 @@ static int dm_test_clk(struct unit_test_state *uts)
 	ut_asserteq(0, sandbox_clk_query_enable(dev_clk, SANDBOX_CLK_ID_I2C));
 
 	ut_asserteq(0, sandbox_clk_test_get_by_id(dev_test));
+	ut_asserteq(1234, sandbox_clk_test_get_parent_rate(dev_test));
 
 	ut_assertok(sandbox_clk_test_free(dev_test));
 	return 0;
-- 
2.11.0

[U-Boot] [PATCH v4 11/13] clk: test: Provide unit test for clk_get_parent_rate() method

[Simon Glass]

Hi Lukasz,

On Thu, 16 May 2019 at 16:11, Lukasz Majewski <lukma@denx.de> wrote:
>
> This commit provides sandbox unit test for clk_get_parent_rate() method.
>
> For testing the default test clocks setup had to be adjusted to emulate
> structure similar to clocks in the Common Clock Framework [CCF]
> (for iMX devices).
>
> The clk_get_parent_rate() relies on dev->driver_data having the pointer
> to proper struct clk.

Yes, really want to avoid this.

> It uses internally clk_get_parent() method also tested by this test.
>
> Signed-off-by: Lukasz Majewski <lukma@denx.de>
>
> ---
>
> Changes in v4: None
> Changes in v3:
> - New patch
>
>  arch/sandbox/include/asm/clk.h |  8 ++++++++
>  drivers/clk/clk_sandbox_test.c | 26 ++++++++++++++++++++++++++
>  test/dm/clk.c                  |  1 +
>  3 files changed, 35 insertions(+)

Regards,
Simon

[U-Boot] [PATCH v4 11/13] clk: test: Provide unit test for

[sbabic at denx.de]

> This commit provides sandbox unit test for clk_get_parent_rate() method.
> For testing the default test clocks setup had to be adjusted to emulate
> structure similar to clocks in the Common Clock Framework [CCF]
> (for iMX devices).
> The clk_get_parent_rate() relies on dev->driver_data having the pointer
> to proper struct clk.
> It uses internally clk_get_parent() method also tested by this test.
> Signed-off-by: Lukasz Majewski <lukma@denx.de>

Applied to u-boot-imx, master, thanks !

Best regards,
Stefano Babic

-- 
=====================================================================
DENX Software Engineering GmbH,      Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sbabic at denx.de
=====================================================================

[U-Boot] [PATCH v4 12/13] clk: Port Linux common clock framework [CCF] for imx6q to U-boot (tag: 5.0-rc3)

[Lukasz Majewski]

This commit brings the files from Linux kernel to provide clocks support
as it is used on the Linux kernel with common clock framework [CCF] setup.

The directory structure has been preserved. The ported code only supports
reading information from PLL, MUX, Divider, etc and enabling/disabling
the clocks USDHCx/ECSPIx depending on used bus. Moreover, it is agnostic
to the alias numbering as the information about the clock is read from
device tree.

One needs to pay attention to the comments indicating necessary for U-boot's
DM changes.

If needed the code can be extended to support the "set" part of the clock
management.


Signed-off-by: Lukasz Majewski <lukma@denx.de>
---

Changes in v4:
- Port some more Linux code to facilitate imx8 code porting (most notably
  flags)
- Explicitly use container_of() based macro to provide struct clk in various
  places (e.g. gate2, mux, etc)
  Following patches has been squashed:
  http://patchwork.ozlabs.org/patch/1093141/
  http://patchwork.ozlabs.org/patch/1093142/
  http://patchwork.ozlabs.org/patch/1093146/

Changes in v3: None

 drivers/clk/Kconfig            |  14 ++++
 drivers/clk/Makefile           |   2 +
 drivers/clk/clk-divider.c      | 148 ++++++++++++++++++++++++++++++++++
 drivers/clk/clk-fixed-factor.c |  87 ++++++++++++++++++++
 drivers/clk/clk-mux.c          | 164 +++++++++++++++++++++++++++++++++++++
 drivers/clk/clk.c              |  56 +++++++++++++
 drivers/clk/imx/Kconfig        |   9 +++
 drivers/clk/imx/Makefile       |   2 +
 drivers/clk/imx/clk-gate2.c    | 113 ++++++++++++++++++++++++++
 drivers/clk/imx/clk-imx6q.c    | 179 +++++++++++++++++++++++++++++++++++++++++
 drivers/clk/imx/clk-pfd.c      |  91 +++++++++++++++++++++
 drivers/clk/imx/clk-pllv3.c    |  83 +++++++++++++++++++
 drivers/clk/imx/clk.h          |  75 +++++++++++++++++
 include/linux/clk-provider.h   | 115 ++++++++++++++++++++++++++
 14 files changed, 1138 insertions(+)
 create mode 100644 drivers/clk/clk-divider.c
 create mode 100644 drivers/clk/clk-fixed-factor.c
 create mode 100644 drivers/clk/clk-mux.c
 create mode 100644 drivers/clk/clk.c
 create mode 100644 drivers/clk/imx/clk-gate2.c
 create mode 100644 drivers/clk/imx/clk-imx6q.c
 create mode 100644 drivers/clk/imx/clk-pfd.c
 create mode 100644 drivers/clk/imx/clk-pllv3.c
 create mode 100644 drivers/clk/imx/clk.h
 create mode 100644 include/linux/clk-provider.h

diff --git a/drivers/clk/Kconfig b/drivers/clk/Kconfig
index 96969b9e30..344cd4415c 100644
--- a/drivers/clk/Kconfig
+++ b/drivers/clk/Kconfig
@@ -46,6 +46,20 @@ config CLK_BOSTON
 	help
 	  Enable this to support the clocks
 
+config SPL_CLK_CCF
+	bool "SPL Common Clock Framework [CCF] support "
+	depends on SPL_CLK
+	help
+	  Enable this option if you want to (re-)use the Linux kernel's Common
+	  Clock Framework [CCF] code in U-Boot's SPL.
+
+config CLK_CCF
+	bool "Common Clock Framework [CCF] support "
+	depends on CLK
+	help
+	  Enable this option if you want to (re-)use the Linux kernel's Common
+	  Clock Framework [CCF] code in U-Boot's clock driver.
+
 config CLK_STM32F
 	bool "Enable clock driver support for STM32F family"
 	depends on CLK && (STM32F7 || STM32F4)
diff --git a/drivers/clk/Makefile b/drivers/clk/Makefile
index 719b9b8e02..1a45bf3505 100644
--- a/drivers/clk/Makefile
+++ b/drivers/clk/Makefile
@@ -7,6 +7,8 @@
 obj-$(CONFIG_$(SPL_TPL_)CLK) += clk-uclass.o
 obj-$(CONFIG_$(SPL_TPL_)CLK) += clk_fixed_rate.o
 obj-$(CONFIG_$(SPL_TPL_)CLK) += clk_fixed_factor.o
+obj-$(CONFIG_$(SPL_TPL_)CLK_CCF) += clk.o clk-divider.o clk-mux.o
+obj-$(CONFIG_$(SPL_TPL_)CLK_CCF) += clk-fixed-factor.o
 
 obj-y += imx/
 obj-y += tegra/
diff --git a/drivers/clk/clk-divider.c b/drivers/clk/clk-divider.c
new file mode 100644
index 0000000000..1d2c1b1ec4
--- /dev/null
+++ b/drivers/clk/clk-divider.c
@@ -0,0 +1,148 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (C) 2019 DENX Software Engineering
+ * Lukasz Majewski, DENX Software Engineering, lukma at denx.de
+ *
+ * Copyright (C) 2011 Sascha Hauer, Pengutronix <s.hauer@pengutronix.de>
+ * Copyright (C) 2011 Richard Zhao, Linaro <richard.zhao@linaro.org>
+ * Copyright (C) 2011-2012 Mike Turquette, Linaro Ltd <mturquette@linaro.org>
+ *
+ */
+
+#include <common.h>
+#include <asm/io.h>
+#include <malloc.h>
+#include <clk-uclass.h>
+#include <dm/device.h>
+#include <dm/uclass.h>
+#include <dm/lists.h>
+#include <dm/device-internal.h>
+#include <linux/clk-provider.h>
+#include <div64.h>
+#include <clk.h>
+#include "clk.h"
+
+#define UBOOT_DM_CLK_CCF_DIVIDER "ccf_clk_divider"
+
+static unsigned int _get_table_div(const struct clk_div_table *table,
+				   unsigned int val)
+{
+	const struct clk_div_table *clkt;
+
+	for (clkt = table; clkt->div; clkt++)
+		if (clkt->val == val)
+			return clkt->div;
+	return 0;
+}
+
+static unsigned int _get_div(const struct clk_div_table *table,
+			     unsigned int val, unsigned long flags, u8 width)
+{
+	if (flags & CLK_DIVIDER_ONE_BASED)
+		return val;
+	if (flags & CLK_DIVIDER_POWER_OF_TWO)
+		return 1 << val;
+	if (flags & CLK_DIVIDER_MAX_AT_ZERO)
+		return val ? val : clk_div_mask(width) + 1;
+	if (table)
+		return _get_table_div(table, val);
+	return val + 1;
+}
+
+unsigned long divider_recalc_rate(struct clk *hw, unsigned long parent_rate,
+				  unsigned int val,
+				  const struct clk_div_table *table,
+				  unsigned long flags, unsigned long width)
+{
+	unsigned int div;
+
+	div = _get_div(table, val, flags, width);
+	if (!div) {
+		WARN(!(flags & CLK_DIVIDER_ALLOW_ZERO),
+		     "%s: Zero divisor and CLK_DIVIDER_ALLOW_ZERO not set\n",
+		     clk_hw_get_name(hw));
+		return parent_rate;
+	}
+
+	return DIV_ROUND_UP_ULL((u64)parent_rate, div);
+}
+
+static ulong clk_divider_recalc_rate(struct clk *clk)
+{
+	struct clk_divider *divider =
+		to_clk_divider((struct clk *)dev_get_driver_data(clk->dev));
+	unsigned long parent_rate = clk_get_parent_rate(clk);
+	unsigned int val;
+
+	val = readl(divider->reg) >> divider->shift;
+	val &= clk_div_mask(divider->width);
+
+	return divider_recalc_rate(clk, parent_rate, val, divider->table,
+				   divider->flags, divider->width);
+}
+
+const struct clk_ops clk_divider_ops = {
+	.get_rate = clk_divider_recalc_rate,
+};
+
+static struct clk *_register_divider(struct device *dev, const char *name,
+		const char *parent_name, unsigned long flags,
+		void __iomem *reg, u8 shift, u8 width,
+		u8 clk_divider_flags, const struct clk_div_table *table)
+{
+	struct clk_divider *div;
+	struct clk *clk;
+	int ret;
+
+	if (clk_divider_flags & CLK_DIVIDER_HIWORD_MASK) {
+		if (width + shift > 16) {
+			pr_warn("divider value exceeds LOWORD field\n");
+			return ERR_PTR(-EINVAL);
+		}
+	}
+
+	/* allocate the divider */
+	div = kzalloc(sizeof(*div), GFP_KERNEL);
+	if (!div)
+		return ERR_PTR(-ENOMEM);
+
+	/* struct clk_divider assignments */
+	div->reg = reg;
+	div->shift = shift;
+	div->width = width;
+	div->flags = clk_divider_flags;
+	div->table = table;
+
+	/* register the clock */
+	clk = &div->clk;
+
+	ret = clk_register(clk, UBOOT_DM_CLK_CCF_DIVIDER, (ulong)clk,
+			   name, parent_name);
+	if (ret) {
+		kfree(div);
+		return ERR_PTR(ret);
+	}
+
+	return clk;
+}
+
+struct clk *clk_register_divider(struct device *dev, const char *name,
+		const char *parent_name, unsigned long flags,
+		void __iomem *reg, u8 shift, u8 width,
+		u8 clk_divider_flags)
+{
+	struct clk *clk;
+
+	clk =  _register_divider(dev, name, parent_name, flags, reg, shift,
+				 width, clk_divider_flags, NULL);
+	if (IS_ERR(clk))
+		return ERR_CAST(clk);
+	return clk;
+}
+
+U_BOOT_DRIVER(ccf_clk_divider) = {
+	.name	= UBOOT_DM_CLK_CCF_DIVIDER,
+	.id	= UCLASS_CLK,
+	.ops	= &clk_divider_ops,
+	.flags = DM_FLAG_PRE_RELOC,
+};
diff --git a/drivers/clk/clk-fixed-factor.c b/drivers/clk/clk-fixed-factor.c
new file mode 100644
index 0000000000..c535aadc48
--- /dev/null
+++ b/drivers/clk/clk-fixed-factor.c
@@ -0,0 +1,87 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (C) 2019 DENX Software Engineering
+ * Lukasz Majewski, DENX Software Engineering, lukma at denx.de
+ *
+ * Copyright (C) 2011 Sascha Hauer, Pengutronix <s.hauer@pengutronix.de>
+ */
+#include <common.h>
+#include <malloc.h>
+#include <clk-uclass.h>
+#include <dm/device.h>
+#include <linux/clk-provider.h>
+#include <div64.h>
+#include <clk.h>
+#include "clk.h"
+
+#define UBOOT_DM_CLK_IMX_FIXED_FACTOR "ccf_clk_fixed_factor"
+
+static ulong clk_factor_recalc_rate(struct clk *clk)
+{
+	struct clk_fixed_factor *fix =
+		to_clk_fixed_factor((struct clk *)dev_get_driver_data(clk->dev));
+	unsigned long parent_rate = clk_get_parent_rate(clk);
+	unsigned long long int rate;
+
+	rate = (unsigned long long int)parent_rate * fix->mult;
+	do_div(rate, fix->div);
+	return (ulong)rate;
+}
+
+const struct clk_ops ccf_clk_fixed_factor_ops = {
+	.get_rate = clk_factor_recalc_rate,
+};
+
+struct clk *clk_hw_register_fixed_factor(struct device *dev,
+		const char *name, const char *parent_name, unsigned long flags,
+		unsigned int mult, unsigned int div)
+{
+	struct clk_fixed_factor *fix;
+	struct clk *clk;
+	int ret;
+
+	fix = kmalloc(sizeof(*fix), GFP_KERNEL);
+	if (!fix)
+		return ERR_PTR(-ENOMEM);
+
+	/* struct clk_fixed_factor assignments */
+	fix->mult = mult;
+	fix->div = div;
+	clk = &fix->clk;
+
+	/*
+	 * We pass the struct clk *clk pointer (which is the same as
+	 * clk_fixed_factor *fix - by the struct elements alignment) to DM as a
+	 * driver_data, so it can be easily accessible from the udevice level.
+	 * Moreover, the struct clk is only a wrapper on udevice which
+	 * corresponds to the "real" clock device.
+	 */
+	ret = clk_register(clk, UBOOT_DM_CLK_IMX_FIXED_FACTOR, (ulong)clk,
+			   name, parent_name);
+	if (ret) {
+		kfree(fix);
+		return ERR_PTR(ret);
+	}
+
+	return clk;
+}
+
+struct clk *clk_register_fixed_factor(struct device *dev, const char *name,
+		const char *parent_name, unsigned long flags,
+		unsigned int mult, unsigned int div)
+{
+	struct clk *clk;
+
+	clk = clk_hw_register_fixed_factor(dev, name, parent_name, flags, mult,
+					  div);
+	if (IS_ERR(clk))
+		return ERR_CAST(clk);
+	return clk;
+}
+
+U_BOOT_DRIVER(imx_clk_fixed_factor) = {
+	.name	= UBOOT_DM_CLK_IMX_FIXED_FACTOR,
+	.id	= UCLASS_CLK,
+	.ops	= &ccf_clk_fixed_factor_ops,
+	.flags = DM_FLAG_PRE_RELOC,
+};
diff --git a/drivers/clk/clk-mux.c b/drivers/clk/clk-mux.c
new file mode 100644
index 0000000000..2c85f2052c
--- /dev/null
+++ b/drivers/clk/clk-mux.c
@@ -0,0 +1,164 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (C) 2019 DENX Software Engineering
+ * Lukasz Majewski, DENX Software Engineering, lukma at denx.de
+ *
+ * Copyright (C) 2011 Sascha Hauer, Pengutronix <s.hauer@pengutronix.de>
+ * Copyright (C) 2011 Richard Zhao, Linaro <richard.zhao@linaro.org>
+ * Copyright (C) 2011-2012 Mike Turquette, Linaro Ltd <mturquette@linaro.org>
+ *
+ * Simple multiplexer clock implementation
+ */
+
+/*
+ * U-Boot CCF porting node:
+ *
+ * The Linux kernel - as of tag: 5.0-rc3 is using also the imx_clk_fixup_mux()
+ * version of CCF mux. It is used on e.g. imx6q to provide fixes (like
+ * imx_cscmr1_fixup) for broken HW.
+ *
+ * At least for IMX6Q (but NOT IMX6QP) it is important when we set the parent
+ * clock.
+ */
+
+#include <common.h>
+#include <asm/io.h>
+#include <malloc.h>
+#include <clk-uclass.h>
+#include <dm/device.h>
+#include <linux/clk-provider.h>
+#include <clk.h>
+#include "clk.h"
+
+#define UBOOT_DM_CLK_CCF_MUX "ccf_clk_mux"
+
+int clk_mux_val_to_index(struct clk *clk, u32 *table, unsigned int flags,
+			 unsigned int val)
+{
+	struct clk_mux *mux = to_clk_mux(clk);
+	int num_parents = mux->num_parents;
+
+	if (table) {
+		int i;
+
+		for (i = 0; i < num_parents; i++)
+			if (table[i] == val)
+				return i;
+		return -EINVAL;
+	}
+
+	if (val && (flags & CLK_MUX_INDEX_BIT))
+		val = ffs(val) - 1;
+
+	if (val && (flags & CLK_MUX_INDEX_ONE))
+		val--;
+
+	if (val >= num_parents)
+		return -EINVAL;
+
+	return val;
+}
+
+static u8 clk_mux_get_parent(struct clk *clk)
+{
+	struct clk_mux *mux = to_clk_mux(clk);
+	u32 val;
+
+	val = readl(mux->reg) >> mux->shift;
+	val &= mux->mask;
+
+	return clk_mux_val_to_index(clk, mux->table, mux->flags, val);
+}
+
+const struct clk_ops clk_mux_ops = {
+		.get_rate = clk_generic_get_rate,
+};
+
+struct clk *clk_hw_register_mux_table(struct device *dev, const char *name,
+		const char * const *parent_names, u8 num_parents,
+		unsigned long flags,
+		void __iomem *reg, u8 shift, u32 mask,
+		u8 clk_mux_flags, u32 *table)
+{
+	struct clk_mux *mux;
+	struct clk *clk;
+	u8 width = 0;
+	int ret;
+
+	if (clk_mux_flags & CLK_MUX_HIWORD_MASK) {
+		width = fls(mask) - ffs(mask) + 1;
+		if (width + shift > 16) {
+			pr_err("mux value exceeds LOWORD field\n");
+			return ERR_PTR(-EINVAL);
+		}
+	}
+
+	/* allocate the mux */
+	mux = kzalloc(sizeof(*mux), GFP_KERNEL);
+	if (!mux)
+		return ERR_PTR(-ENOMEM);
+
+	/* U-boot specific assignments */
+	mux->parent_names = parent_names;
+	mux->num_parents = num_parents;
+
+	/* struct clk_mux assignments */
+	mux->reg = reg;
+	mux->shift = shift;
+	mux->mask = mask;
+	mux->flags = clk_mux_flags;
+	mux->table = table;
+
+	clk = &mux->clk;
+
+	/*
+	 * Read the current mux setup - so we assign correct parent.
+	 *
+	 * Changing parent would require changing internals of udevice struct
+	 * for the corresponding clock (to do that define .set_parent() method.
+	 */
+	ret = clk_register(clk, UBOOT_DM_CLK_CCF_MUX, (ulong)clk, name,
+			   parent_names[clk_mux_get_parent(clk)]);
+	if (ret) {
+		kfree(mux);
+		return ERR_PTR(ret);
+	}
+
+	return clk;
+}
+
+struct clk *clk_register_mux_table(struct device *dev, const char *name,
+		const char * const *parent_names, u8 num_parents,
+		unsigned long flags,
+		void __iomem *reg, u8 shift, u32 mask,
+		u8 clk_mux_flags, u32 *table)
+{
+	struct clk *clk;
+
+	clk = clk_hw_register_mux_table(dev, name, parent_names, num_parents,
+				       flags, reg, shift, mask, clk_mux_flags,
+				       table);
+	if (IS_ERR(clk))
+		return ERR_CAST(clk);
+	return clk;
+}
+
+struct clk *clk_register_mux(struct device *dev, const char *name,
+		const char * const *parent_names, u8 num_parents,
+		unsigned long flags,
+		void __iomem *reg, u8 shift, u8 width,
+		u8 clk_mux_flags)
+{
+	u32 mask = BIT(width) - 1;
+
+	return clk_register_mux_table(dev, name, parent_names, num_parents,
+				      flags, reg, shift, mask, clk_mux_flags,
+				      NULL);
+}
+
+U_BOOT_DRIVER(ccf_clk_mux) = {
+	.name	= UBOOT_DM_CLK_CCF_MUX,
+	.id	= UCLASS_CLK,
+	.ops	= &clk_mux_ops,
+	.flags = DM_FLAG_PRE_RELOC,
+};
diff --git a/drivers/clk/clk.c b/drivers/clk/clk.c
new file mode 100644
index 0000000000..0a0fffb50b
--- /dev/null
+++ b/drivers/clk/clk.c
@@ -0,0 +1,56 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (C) 2019 DENX Software Engineering
+ * Lukasz Majewski, DENX Software Engineering, lukma at denx.de
+ */
+
+#include <common.h>
+#include <clk-uclass.h>
+#include <dm/device.h>
+#include <dm/uclass.h>
+#include <dm/lists.h>
+#include <dm/device-internal.h>
+#include <clk.h>
+
+int clk_register(struct clk *clk, const char *drv_name,
+		 ulong drv_data, const char *name,
+		 const char *parent_name)
+{
+	struct udevice *parent;
+	struct driver *drv;
+	int ret;
+
+	ret = uclass_get_device_by_name(UCLASS_CLK, parent_name, &parent);
+	if (ret)
+		printf("%s: UCLASS parent: 0x%p\n", __func__, parent);
+
+	debug("%s: name: %s parent: %s [0x%p]\n", __func__, name, parent->name,
+	      parent);
+
+	drv = lists_driver_lookup_name(drv_name);
+	if (!drv) {
+		printf("%s: %s is not a valid driver name\n",
+		       __func__, drv_name);
+		return -ENOENT;
+	}
+
+	ret = device_bind_with_driver_data(parent, drv, name, drv_data,
+					   ofnode_null(), &clk->dev);
+	if (ret) {
+		printf("%s: CLK: %s driver bind error [%d]!\n", __func__, name,
+		       ret);
+		return ret;
+	}
+
+	return 0;
+}
+
+ulong clk_generic_get_rate(struct clk *clk)
+{
+	return clk_get_parent_rate(clk);
+}
+
+const char *clk_hw_get_name(const struct clk *hw)
+{
+	return hw->dev->name;
+}
diff --git a/drivers/clk/imx/Kconfig b/drivers/clk/imx/Kconfig
index a6fb58d6cf..469768b5c3 100644
--- a/drivers/clk/imx/Kconfig
+++ b/drivers/clk/imx/Kconfig
@@ -1,3 +1,12 @@
+config CLK_IMX6Q
+	bool "Clock support for i.MX6Q"
+	depends on ARCH_MX6
+	select CLK
+	select CLK_CCF
+	select SPL_CLK_CCF
+	help
+	  This enables DM/DTS support for clock driver in i.MX6Q platforms.
+
 config CLK_IMX8
 	bool "Clock support for i.MX8"
 	depends on ARCH_IMX8
diff --git a/drivers/clk/imx/Makefile b/drivers/clk/imx/Makefile
index eb379c188a..64f1846b4d 100644
--- a/drivers/clk/imx/Makefile
+++ b/drivers/clk/imx/Makefile
@@ -2,6 +2,8 @@
 #
 # SPDX-License-Identifier: GPL-2.0
 
+obj-$(CONFIG_$(SPL_TPL_)CLK_CCF) += clk-gate2.o clk-pllv3.o clk-pfd.o
+obj-$(CONFIG_CLK_IMX6Q) += clk-imx6q.o
 obj-$(CONFIG_CLK_IMX8) += clk-imx8.o
 
 ifdef CONFIG_CLK_IMX8
diff --git a/drivers/clk/imx/clk-gate2.c b/drivers/clk/imx/clk-gate2.c
new file mode 100644
index 0000000000..83589b9206
--- /dev/null
+++ b/drivers/clk/imx/clk-gate2.c
@@ -0,0 +1,113 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (C) 2019 DENX Software Engineering
+ * Lukasz Majewski, DENX Software Engineering, lukma at denx.de
+ *
+ * Copyright (C) 2010-2011 Canonical Ltd <jeremy.kerr@canonical.com>
+ * Copyright (C) 2011-2012 Mike Turquette, Linaro Ltd <mturquette@linaro.org>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * Gated clock implementation
+ *
+ */
+
+#include <common.h>
+#include <asm/io.h>
+#include <malloc.h>
+#include <clk-uclass.h>
+#include <dm/device.h>
+#include <linux/clk-provider.h>
+#include <clk.h>
+#include "clk.h"
+
+#define UBOOT_DM_CLK_IMX_GATE2 "imx_clk_gate2"
+
+struct clk_gate2 {
+	struct clk clk;
+	void __iomem	*reg;
+	u8		bit_idx;
+	u8		cgr_val;
+	u8		flags;
+};
+
+#define to_clk_gate2(_clk) container_of(_clk, struct clk_gate2, clk)
+
+static int clk_gate2_enable(struct clk *clk)
+{
+	struct clk_gate2 *gate =
+		to_clk_gate2((struct clk *)dev_get_driver_data(clk->dev));
+	u32 reg;
+
+	reg = readl(gate->reg);
+	reg &= ~(3 << gate->bit_idx);
+	reg |= gate->cgr_val << gate->bit_idx;
+	writel(reg, gate->reg);
+
+	return 0;
+}
+
+static int clk_gate2_disable(struct clk *clk)
+{
+	struct clk_gate2 *gate =
+		to_clk_gate2((struct clk *)dev_get_driver_data(clk->dev));
+	u32 reg;
+
+	reg = readl(gate->reg);
+	reg &= ~(3 << gate->bit_idx);
+	writel(reg, gate->reg);
+
+	return 0;
+}
+
+static const struct clk_ops clk_gate2_ops = {
+	.enable = clk_gate2_enable,
+	.disable = clk_gate2_disable,
+	.get_rate = clk_generic_get_rate,
+};
+
+struct clk *clk_register_gate2(struct device *dev, const char *name,
+		const char *parent_name, unsigned long flags,
+		void __iomem *reg, u8 bit_idx, u8 cgr_val,
+		u8 clk_gate2_flags)
+{
+	struct clk_gate2 *gate;
+	struct clk *clk;
+	int ret;
+
+	gate = kzalloc(sizeof(*gate), GFP_KERNEL);
+	if (!gate)
+		return ERR_PTR(-ENOMEM);
+
+	/* struct clk_gate2 assignments */
+	gate->reg = reg;
+	gate->bit_idx = bit_idx;
+	gate->cgr_val = cgr_val;
+	gate->flags = clk_gate2_flags;
+
+	/*
+	 * U-boot DM adjustments:
+	 *
+	 * clk and gate reslove to the same address - lets pass clock
+	 * for better readability.
+	 */
+	clk = &gate->clk;
+
+	ret = clk_register(clk, UBOOT_DM_CLK_IMX_GATE2, (ulong)clk,
+			   name, parent_name);
+	if (ret) {
+		kfree(gate);
+		return ERR_PTR(ret);
+	}
+
+	return clk;
+}
+
+U_BOOT_DRIVER(clk_gate2) = {
+	.name	= UBOOT_DM_CLK_IMX_GATE2,
+	.id	= UCLASS_CLK,
+	.ops	= &clk_gate2_ops,
+	.flags = DM_FLAG_PRE_RELOC,
+};
diff --git a/drivers/clk/imx/clk-imx6q.c b/drivers/clk/imx/clk-imx6q.c
new file mode 100644
index 0000000000..92e9337d44
--- /dev/null
+++ b/drivers/clk/imx/clk-imx6q.c
@@ -0,0 +1,179 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (C) 2019 DENX Software Engineering
+ * Lukasz Majewski, DENX Software Engineering, lukma at denx.de
+ */
+
+#include <common.h>
+#include <clk-uclass.h>
+#include <dm.h>
+#include <asm/arch/clock.h>
+#include <asm/arch/imx-regs.h>
+#include <dt-bindings/clock/imx6qdl-clock.h>
+
+#include "clk.h"
+
+static int imx6q_check_id(ulong id)
+{
+	if (id < IMX6QDL_CLK_DUMMY || id >= IMX6QDL_CLK_END) {
+		printf("%s: Invalid clk ID #%lu\n", __func__, id);
+		return -EINVAL;
+	}
+
+	return 0;
+}
+
+static ulong imx6q_clk_get_rate(struct clk *clk)
+{
+	struct clk *c;
+	int ret;
+
+	debug("%s(#%lu)\n", __func__, clk->id);
+
+	ret = imx6q_check_id(clk->id);
+	if (ret)
+		return ret;
+
+	ret = clk_get_by_id(clk->id, &c);
+	if (ret)
+		return ret;
+
+	return clk_get_rate(c);
+}
+
+static ulong imx6q_clk_set_rate(struct clk *clk, unsigned long rate)
+{
+	debug("%s(#%lu), rate: %lu\n", __func__, clk->id, rate);
+
+	return rate;
+}
+
+static int __imx6q_clk_enable(struct clk *clk, bool enable)
+{
+	struct clk *c;
+	int ret = 0;
+
+	debug("%s(#%lu) en: %d\n", __func__, clk->id, enable);
+
+	ret = imx6q_check_id(clk->id);
+	if (ret)
+		return ret;
+
+	ret = clk_get_by_id(clk->id, &c);
+	if (ret)
+		return ret;
+
+	if (enable)
+		ret = clk_enable(c);
+	else
+		ret = clk_disable(c);
+
+	return ret;
+}
+
+static int imx6q_clk_disable(struct clk *clk)
+{
+	return __imx6q_clk_enable(clk, 0);
+}
+
+static int imx6q_clk_enable(struct clk *clk)
+{
+	return __imx6q_clk_enable(clk, 1);
+}
+
+static struct clk_ops imx6q_clk_ops = {
+	.set_rate = imx6q_clk_set_rate,
+	.get_rate = imx6q_clk_get_rate,
+	.enable = imx6q_clk_enable,
+	.disable = imx6q_clk_disable,
+};
+
+static const char *const usdhc_sels[] = { "pll2_pfd2_396m", "pll2_pfd0_352m", };
+
+static int imx6q_clk_probe(struct udevice *dev)
+{
+	void *base;
+
+	/* Anatop clocks */
+	base = (void *)ANATOP_BASE_ADDR;
+
+	clk_dm(IMX6QDL_CLK_PLL2,
+	       imx_clk_pllv3(IMX_PLLV3_GENERIC, "pll2_bus", "osc",
+			     base + 0x30, 0x1));
+	clk_dm(IMX6QDL_CLK_PLL3_USB_OTG,
+	       imx_clk_pllv3(IMX_PLLV3_USB, "pll3_usb_otg", "osc",
+			     base + 0x10, 0x3));
+	clk_dm(IMX6QDL_CLK_PLL3_60M,
+	       imx_clk_fixed_factor("pll3_60m",  "pll3_usb_otg",   1, 8));
+	clk_dm(IMX6QDL_CLK_PLL2_PFD0_352M,
+	       imx_clk_pfd("pll2_pfd0_352m", "pll2_bus", base + 0x100, 0));
+	clk_dm(IMX6QDL_CLK_PLL2_PFD2_396M,
+	       imx_clk_pfd("pll2_pfd2_396m", "pll2_bus", base + 0x100, 2));
+
+	/* CCM clocks */
+	base = dev_read_addr_ptr(dev);
+	if (base == (void *)FDT_ADDR_T_NONE)
+		return -EINVAL;
+
+	clk_dm(IMX6QDL_CLK_USDHC1_SEL,
+	       imx_clk_mux("usdhc1_sel", base + 0x1c, 16, 1,
+			   usdhc_sels, ARRAY_SIZE(usdhc_sels)));
+	clk_dm(IMX6QDL_CLK_USDHC2_SEL,
+	       imx_clk_mux("usdhc2_sel", base + 0x1c, 17, 1,
+			   usdhc_sels, ARRAY_SIZE(usdhc_sels)));
+	clk_dm(IMX6QDL_CLK_USDHC3_SEL,
+	       imx_clk_mux("usdhc3_sel", base + 0x1c, 18, 1,
+			   usdhc_sels, ARRAY_SIZE(usdhc_sels)));
+	clk_dm(IMX6QDL_CLK_USDHC4_SEL,
+	       imx_clk_mux("usdhc4_sel", base + 0x1c, 19, 1,
+			   usdhc_sels, ARRAY_SIZE(usdhc_sels)));
+
+	clk_dm(IMX6QDL_CLK_USDHC1_PODF,
+	       imx_clk_divider("usdhc1_podf", "usdhc1_sel",
+			       base + 0x24, 11, 3));
+	clk_dm(IMX6QDL_CLK_USDHC2_PODF,
+	       imx_clk_divider("usdhc2_podf", "usdhc2_sel",
+			       base + 0x24, 16, 3));
+	clk_dm(IMX6QDL_CLK_USDHC3_PODF,
+	       imx_clk_divider("usdhc3_podf", "usdhc3_sel",
+			       base + 0x24, 19, 3));
+	clk_dm(IMX6QDL_CLK_USDHC4_PODF,
+	       imx_clk_divider("usdhc4_podf", "usdhc4_sel",
+			       base + 0x24, 22, 3));
+
+	clk_dm(IMX6QDL_CLK_ECSPI_ROOT,
+	       imx_clk_divider("ecspi_root", "pll3_60m", base + 0x38, 19, 6));
+
+	clk_dm(IMX6QDL_CLK_ECSPI1,
+	       imx_clk_gate2("ecspi1", "ecspi_root", base + 0x6c, 0));
+	clk_dm(IMX6QDL_CLK_ECSPI2,
+	       imx_clk_gate2("ecspi2", "ecspi_root", base + 0x6c, 2));
+	clk_dm(IMX6QDL_CLK_ECSPI3,
+	       imx_clk_gate2("ecspi3", "ecspi_root", base + 0x6c, 4));
+	clk_dm(IMX6QDL_CLK_ECSPI4,
+	       imx_clk_gate2("ecspi4", "ecspi_root", base + 0x6c, 6));
+	clk_dm(IMX6QDL_CLK_USDHC1,
+	       imx_clk_gate2("usdhc1", "usdhc1_podf", base + 0x80, 2));
+	clk_dm(IMX6QDL_CLK_USDHC2,
+	       imx_clk_gate2("usdhc2", "usdhc2_podf", base + 0x80, 4));
+	clk_dm(IMX6QDL_CLK_USDHC3,
+	       imx_clk_gate2("usdhc3", "usdhc3_podf", base + 0x80, 6));
+	clk_dm(IMX6QDL_CLK_USDHC4,
+	       imx_clk_gate2("usdhc4", "usdhc4_podf", base + 0x80, 8));
+
+	return 0;
+}
+
+static const struct udevice_id imx6q_clk_ids[] = {
+	{ .compatible = "fsl,imx6q-ccm" },
+	{ },
+};
+
+U_BOOT_DRIVER(imx6q_clk) = {
+	.name = "clk_imx6q",
+	.id = UCLASS_CLK,
+	.of_match = imx6q_clk_ids,
+	.ops = &imx6q_clk_ops,
+	.probe = imx6q_clk_probe,
+	.flags = DM_FLAG_PRE_RELOC,
+};
diff --git a/drivers/clk/imx/clk-pfd.c b/drivers/clk/imx/clk-pfd.c
new file mode 100644
index 0000000000..51521ccee6
--- /dev/null
+++ b/drivers/clk/imx/clk-pfd.c
@@ -0,0 +1,91 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (C) 2019 DENX Software Engineering
+ * Lukasz Majewski, DENX Software Engineering, lukma at denx.de
+ *
+ * Copyright 2012 Freescale Semiconductor, Inc.
+ * Copyright 2012 Linaro Ltd.
+ *
+ * The code contained herein is licensed under the GNU General Public
+ * License. You may obtain a copy of the GNU General Public License
+ * Version 2 or later at the following locations:
+ *
+ * http://www.opensource.org/licenses/gpl-license.html
+ * http://www.gnu.org/copyleft/gpl.html
+ */
+
+#include <common.h>
+#include <asm/io.h>
+#include <malloc.h>
+#include <clk-uclass.h>
+#include <dm/device.h>
+#include <linux/clk-provider.h>
+#include <div64.h>
+#include <clk.h>
+#include "clk.h"
+
+#define UBOOT_DM_CLK_IMX_PFD "imx_clk_pfd"
+
+struct clk_pfd {
+	struct clk	clk;
+	void __iomem	*reg;
+	u8		idx;
+};
+
+#define to_clk_pfd(_clk) container_of(_clk, struct clk_pfd, clk)
+
+#define SET	0x4
+#define CLR	0x8
+#define OTG	0xc
+
+static unsigned long clk_pfd_recalc_rate(struct clk *clk)
+{
+	struct clk_pfd *pfd =
+		to_clk_pfd((struct clk *)dev_get_driver_data(clk->dev));
+	unsigned long parent_rate = clk_get_parent_rate(clk);
+	u64 tmp = parent_rate;
+	u8 frac = (readl(pfd->reg) >> (pfd->idx * 8)) & 0x3f;
+
+	tmp *= 18;
+	do_div(tmp, frac);
+
+	return tmp;
+}
+
+static const struct clk_ops clk_pfd_ops = {
+	.get_rate	= clk_pfd_recalc_rate,
+};
+
+struct clk *imx_clk_pfd(const char *name, const char *parent_name,
+			void __iomem *reg, u8 idx)
+{
+	struct clk_pfd *pfd;
+	struct clk *clk;
+	int ret;
+
+	pfd = kzalloc(sizeof(*pfd), GFP_KERNEL);
+	if (!pfd)
+		return ERR_PTR(-ENOMEM);
+
+	pfd->reg = reg;
+	pfd->idx = idx;
+
+	/* register the clock */
+	clk = &pfd->clk;
+
+	ret = clk_register(clk, UBOOT_DM_CLK_IMX_PFD, (ulong)clk,
+			   name, parent_name);
+	if (ret) {
+		kfree(pfd);
+		return ERR_PTR(ret);
+	}
+
+	return clk;
+}
+
+U_BOOT_DRIVER(clk_pfd) = {
+	.name	= UBOOT_DM_CLK_IMX_PFD,
+	.id	= UCLASS_CLK,
+	.ops	= &clk_pfd_ops,
+	.flags = DM_FLAG_PRE_RELOC,
+};
diff --git a/drivers/clk/imx/clk-pllv3.c b/drivers/clk/imx/clk-pllv3.c
new file mode 100644
index 0000000000..28c0439878
--- /dev/null
+++ b/drivers/clk/imx/clk-pllv3.c
@@ -0,0 +1,83 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (C) 2019 DENX Software Engineering
+ * Lukasz Majewski, DENX Software Engineering, lukma at denx.de
+ */
+
+#include <common.h>
+#include <asm/io.h>
+#include <malloc.h>
+#include <clk-uclass.h>
+#include <dm/device.h>
+#include <dm/uclass.h>
+#include <clk.h>
+#include "clk.h"
+
+#define UBOOT_DM_CLK_IMX_PLLV3 "imx_clk_pllv3"
+
+struct clk_pllv3 {
+	struct clk	clk;
+	void __iomem	*base;
+	u32		div_mask;
+	u32		div_shift;
+};
+
+#define to_clk_pllv3(_clk) container_of(_clk, struct clk_pllv3, clk)
+
+static ulong clk_pllv3_get_rate(struct clk *clk)
+{
+	struct clk_pllv3 *pll =
+		to_clk_pllv3((struct clk *)dev_get_driver_data(clk->dev));
+	unsigned long parent_rate = clk_get_parent_rate(clk);
+
+	u32 div = (readl(pll->base) >> pll->div_shift) & pll->div_mask;
+
+	return (div == 1) ? parent_rate * 22 : parent_rate * 20;
+}
+
+static const struct clk_ops clk_pllv3_generic_ops = {
+	.get_rate       = clk_pllv3_get_rate,
+};
+
+struct clk *imx_clk_pllv3(enum imx_pllv3_type type, const char *name,
+			  const char *parent_name, void __iomem *base,
+			  u32 div_mask)
+{
+	struct clk_pllv3 *pll;
+	struct clk *clk;
+	char *drv_name;
+	int ret;
+
+	pll = kzalloc(sizeof(*pll), GFP_KERNEL);
+	if (!pll)
+		return ERR_PTR(-ENOMEM);
+
+	switch (type) {
+	case IMX_PLLV3_GENERIC:
+	case IMX_PLLV3_USB:
+		drv_name = UBOOT_DM_CLK_IMX_PLLV3;
+		break;
+	default:
+		kfree(pll);
+		return ERR_PTR(-ENOTSUPP);
+	}
+
+	pll->base = base;
+	pll->div_mask = div_mask;
+	clk = &pll->clk;
+
+	ret = clk_register(clk, drv_name, (ulong)clk, name, parent_name);
+	if (ret) {
+		kfree(pll);
+		return ERR_PTR(ret);
+	}
+
+	return clk;
+}
+
+U_BOOT_DRIVER(clk_pllv3_generic) = {
+	.name	= UBOOT_DM_CLK_IMX_PLLV3,
+	.id	= UCLASS_CLK,
+	.ops	= &clk_pllv3_generic_ops,
+	.flags = DM_FLAG_PRE_RELOC,
+};
diff --git a/drivers/clk/imx/clk.h b/drivers/clk/imx/clk.h
new file mode 100644
index 0000000000..864a215a22
--- /dev/null
+++ b/drivers/clk/imx/clk.h
@@ -0,0 +1,75 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (C) 2019 DENX Software Engineering
+ * Lukasz Majewski, DENX Software Engineering, lukma at denx.de
+ */
+#ifndef __MACH_IMX_CLK_H
+#define __MACH_IMX_CLK_H
+
+#include <linux/clk-provider.h>
+
+static inline void clk_dm(ulong id, struct clk *clk)
+{
+	if (!IS_ERR(clk))
+		clk->id = id;
+}
+
+enum imx_pllv3_type {
+	IMX_PLLV3_GENERIC,
+	IMX_PLLV3_SYS,
+	IMX_PLLV3_USB,
+	IMX_PLLV3_USB_VF610,
+	IMX_PLLV3_AV,
+	IMX_PLLV3_ENET,
+	IMX_PLLV3_ENET_IMX7,
+	IMX_PLLV3_SYS_VF610,
+	IMX_PLLV3_DDR_IMX7,
+};
+
+struct clk *clk_register_gate2(struct device *dev, const char *name,
+		const char *parent_name, unsigned long flags,
+		void __iomem *reg, u8 bit_idx, u8 cgr_val,
+		u8 clk_gate_flags);
+
+struct clk *imx_clk_pllv3(enum imx_pllv3_type type, const char *name,
+			  const char *parent_name, void __iomem *base,
+			  u32 div_mask);
+
+static inline struct clk *imx_clk_gate2(const char *name, const char *parent,
+					void __iomem *reg, u8 shift)
+{
+	return clk_register_gate2(NULL, name, parent, CLK_SET_RATE_PARENT, reg,
+			shift, 0x3, 0);
+}
+
+static inline struct clk *imx_clk_fixed_factor(const char *name,
+		const char *parent, unsigned int mult, unsigned int div)
+{
+	return clk_register_fixed_factor(NULL, name, parent,
+			CLK_SET_RATE_PARENT, mult, div);
+}
+
+static inline struct clk *imx_clk_divider(const char *name, const char *parent,
+		void __iomem *reg, u8 shift, u8 width)
+{
+	return clk_register_divider(NULL, name, parent, CLK_SET_RATE_PARENT,
+			reg, shift, width, 0);
+}
+
+struct clk *imx_clk_pfd(const char *name, const char *parent_name,
+			void __iomem *reg, u8 idx);
+
+struct clk *imx_clk_fixup_mux(const char *name, void __iomem *reg,
+			      u8 shift, u8 width, const char * const *parents,
+			      int num_parents, void (*fixup)(u32 *val));
+
+static inline struct clk *imx_clk_mux(const char *name, void __iomem *reg,
+			u8 shift, u8 width, const char * const *parents,
+			int num_parents)
+{
+	return clk_register_mux(NULL, name, parents, num_parents,
+			CLK_SET_RATE_NO_REPARENT, reg, shift,
+			width, 0);
+}
+
+#endif /* __MACH_IMX_CLK_H */
diff --git a/include/linux/clk-provider.h b/include/linux/clk-provider.h
new file mode 100644
index 0000000000..3458746a60
--- /dev/null
+++ b/include/linux/clk-provider.h
@@ -0,0 +1,115 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (C) 2019 DENX Software Engineering
+ * Lukasz Majewski, DENX Software Engineering, lukma at denx.de
+ *
+ * Copyright (c) 2010-2011 Jeremy Kerr <jeremy.kerr@canonical.com>
+ * Copyright (C) 2011-2012 Linaro Ltd <mturquette@linaro.org>
+ */
+#ifndef __LINUX_CLK_PROVIDER_H
+#define __LINUX_CLK_PROVIDER_H
+
+/*
+ * flags used across common struct clk.  these flags should only affect the
+ * top-level framework.  custom flags for dealing with hardware specifics
+ * belong in struct clk_foo
+ *
+ * Please update clk_flags[] in drivers/clk/clk.c when making changes here!
+ */
+#define CLK_SET_RATE_GATE	BIT(0) /* must be gated across rate change */
+#define CLK_SET_PARENT_GATE	BIT(1) /* must be gated across re-parent */
+#define CLK_SET_RATE_PARENT	BIT(2) /* propagate rate change up one level */
+#define CLK_IGNORE_UNUSED	BIT(3) /* do not gate even if unused */
+				/* unused */
+#define CLK_IS_BASIC		BIT(5) /* Basic clk, can't do a to_clk_foo() */
+#define CLK_GET_RATE_NOCACHE	BIT(6) /* do not use the cached clk rate */
+#define CLK_SET_RATE_NO_REPARENT BIT(7) /* don't re-parent on rate change */
+#define CLK_GET_ACCURACY_NOCACHE BIT(8) /* do not use the cached clk accuracy */
+#define CLK_RECALC_NEW_RATES	BIT(9) /* recalc rates after notifications */
+#define CLK_SET_RATE_UNGATE	BIT(10) /* clock needs to run to set rate */
+#define CLK_IS_CRITICAL		BIT(11) /* do not gate, ever */
+/* parents need enable during gate/ungate, set rate and re-parent */
+#define CLK_OPS_PARENT_ENABLE	BIT(12)
+/* duty cycle call may be forwarded to the parent clock */
+#define CLK_DUTY_CYCLE_PARENT	BIT(13)
+
+#define CLK_MUX_INDEX_ONE		BIT(0)
+#define CLK_MUX_INDEX_BIT		BIT(1)
+#define CLK_MUX_HIWORD_MASK		BIT(2)
+#define CLK_MUX_READ_ONLY		BIT(3) /* mux can't be changed */
+#define CLK_MUX_ROUND_CLOSEST		BIT(4)
+
+struct clk_mux {
+	struct clk	clk;
+	void __iomem	*reg;
+	u32		*table;
+	u32		mask;
+	u8		shift;
+	u8		flags;
+
+	/*
+	 * Fields from struct clk_init_data - this struct has been
+	 * omitted to avoid too deep level of CCF for bootloader
+	 */
+	const char	* const *parent_names;
+	u8		num_parents;
+};
+
+#define to_clk_mux(_clk) container_of(_clk, struct clk_mux, clk)
+
+struct clk_div_table {
+	unsigned int	val;
+	unsigned int	div;
+};
+
+struct clk_divider {
+	struct clk	clk;
+	void __iomem	*reg;
+	u8		shift;
+	u8		width;
+	u8		flags;
+	const struct clk_div_table	*table;
+};
+
+#define clk_div_mask(width)	((1 << (width)) - 1)
+#define to_clk_divider(_clk) container_of(_clk, struct clk_divider, clk)
+
+#define CLK_DIVIDER_ONE_BASED		BIT(0)
+#define CLK_DIVIDER_POWER_OF_TWO	BIT(1)
+#define CLK_DIVIDER_ALLOW_ZERO		BIT(2)
+#define CLK_DIVIDER_HIWORD_MASK		BIT(3)
+#define CLK_DIVIDER_ROUND_CLOSEST	BIT(4)
+#define CLK_DIVIDER_READ_ONLY		BIT(5)
+#define CLK_DIVIDER_MAX_AT_ZERO		BIT(6)
+
+struct clk_fixed_factor {
+	struct clk	clk;
+	unsigned int	mult;
+	unsigned int	div;
+};
+
+#define to_clk_fixed_factor(_clk) container_of(_clk, struct clk_fixed_factor,\
+					       clk)
+
+int clk_register(struct clk *clk, const char *drv_name,
+		 ulong drv_data, const char *name,
+		 const char *parent_name);
+
+struct clk *clk_register_fixed_factor(struct device *dev, const char *name,
+		const char *parent_name, unsigned long flags,
+		unsigned int mult, unsigned int div);
+
+struct clk *clk_register_divider(struct device *dev, const char *name,
+		const char *parent_name, unsigned long flags,
+		void __iomem *reg, u8 shift, u8 width,
+		u8 clk_divider_flags);
+
+struct clk *clk_register_mux(struct device *dev, const char *name,
+		const char * const *parent_names, u8 num_parents,
+		unsigned long flags,
+		void __iomem *reg, u8 shift, u8 width,
+		u8 clk_mux_flags);
+
+const char *clk_hw_get_name(const struct clk *hw);
+ulong clk_generic_get_rate(struct clk *clk);
+#endif /* __LINUX_CLK_PROVIDER_H */
-- 
2.11.0

[U-Boot] [PATCH v4 12/13] clk: Port Linux common clock framework [CCF] for imx6q to U-boot (tag: 5.0-rc3)

[Bin Meng]

Hi Lukasz,

On Fri, May 17, 2019 at 6:16 AM Lukasz Majewski <lukma@denx.de> wrote:
>
> This commit brings the files from Linux kernel to provide clocks support
> as it is used on the Linux kernel with common clock framework [CCF] setup.
>
> The directory structure has been preserved. The ported code only supports
> reading information from PLL, MUX, Divider, etc and enabling/disabling
> the clocks USDHCx/ECSPIx depending on used bus. Moreover, it is agnostic
> to the alias numbering as the information about the clock is read from
> device tree.
>
> One needs to pay attention to the comments indicating necessary for U-boot's

nits: it's U-Boot. Please fix this globally in the commit message, as
well as in the code comments in this commit.

> DM changes.
>
> If needed the code can be extended to support the "set" part of the clock
> management.
>
>
> Signed-off-by: Lukasz Majewski <lukma@denx.de>
> ---
>
> Changes in v4:
> - Port some more Linux code to facilitate imx8 code porting (most notably
>   flags)
> - Explicitly use container_of() based macro to provide struct clk in various
>   places (e.g. gate2, mux, etc)
>   Following patches has been squashed:
>   http://patchwork.ozlabs.org/patch/1093141/
>   http://patchwork.ozlabs.org/patch/1093142/
>   http://patchwork.ozlabs.org/patch/1093146/
>
> Changes in v3: None
>
>  drivers/clk/Kconfig            |  14 ++++
>  drivers/clk/Makefile           |   2 +
>  drivers/clk/clk-divider.c      | 148 ++++++++++++++++++++++++++++++++++
>  drivers/clk/clk-fixed-factor.c |  87 ++++++++++++++++++++
>  drivers/clk/clk-mux.c          | 164 +++++++++++++++++++++++++++++++++++++
>  drivers/clk/clk.c              |  56 +++++++++++++
>  drivers/clk/imx/Kconfig        |   9 +++
>  drivers/clk/imx/Makefile       |   2 +
>  drivers/clk/imx/clk-gate2.c    | 113 ++++++++++++++++++++++++++
>  drivers/clk/imx/clk-imx6q.c    | 179 +++++++++++++++++++++++++++++++++++++++++
>  drivers/clk/imx/clk-pfd.c      |  91 +++++++++++++++++++++
>  drivers/clk/imx/clk-pllv3.c    |  83 +++++++++++++++++++
>  drivers/clk/imx/clk.h          |  75 +++++++++++++++++
>  include/linux/clk-provider.h   | 115 ++++++++++++++++++++++++++
>  14 files changed, 1138 insertions(+)
>  create mode 100644 drivers/clk/clk-divider.c
>  create mode 100644 drivers/clk/clk-fixed-factor.c
>  create mode 100644 drivers/clk/clk-mux.c
>  create mode 100644 drivers/clk/clk.c
>  create mode 100644 drivers/clk/imx/clk-gate2.c
>  create mode 100644 drivers/clk/imx/clk-imx6q.c
>  create mode 100644 drivers/clk/imx/clk-pfd.c
>  create mode 100644 drivers/clk/imx/clk-pllv3.c
>  create mode 100644 drivers/clk/imx/clk.h
>  create mode 100644 include/linux/clk-provider.h
>

Regards,
Bin

[U-Boot] [PATCH v4 12/13] clk: Port Linux common clock framework [CCF] for imx6q to U-boot (tag: 5.0-rc3)

[Adam Ford]

On Thu, May 16, 2019 at 9:48 PM Bin Meng <bmeng.cn@gmail.com> wrote:
>
> Hi Lukasz,
>
> On Fri, May 17, 2019 at 6:16 AM Lukasz Majewski <lukma@denx.de> wrote:
> >
> > This commit brings the files from Linux kernel to provide clocks support
> > as it is used on the Linux kernel with common clock framework [CCF] setup.
> >


Two issues / questions:

1)  I tried to test this on the imx6q_logic board, and I enabled
CLK_IMX6Q in the menu config, but when I save the defconfig, it
appears there are unmet dependencies.

WARNING: unmet direct dependencies detected for SPL_CLK_CCF
  Depends on [n]: SPL_CLK [=n]
  Selected by [y]:
  - CLK_IMX6Q [=y] && ARCH_MX6 [=y]

WARNING: unmet direct dependencies detected for SPL_CLK_CCF
  Depends on [n]: SPL_CLK [=n]
  Selected by [y]:
  - CLK_IMX6Q [=y] && ARCH_MX6 [=y]

you may want to consider implying the correct functions if ARCH_MX6 &&
CLK_IMX6Q or select the proper SPL_CLK info.  My board doesn't do DM
in SPL right now, but I assume the CLK driver you ported is using DM.

2)  I didn't attempt to load the SPL portion, but when I loaded the
u-boot-dtb.img file, it didn't appear to boot.


U-Boot SPL 2019.01 (May 13 2019 - 16:57:41 -0500)
Trying to boot from MMC1
spl_load_image_fat_os: error reading image args, err - -2


(hang)

Other than enabling CLK_IMX6Q, are there other items I need to enable?
 My board has OF_CONTROL in U-Boot with DM support working in the
U-Boot portion.

adam
> > The directory structure has been preserved. The ported code only supports
> > reading information from PLL, MUX, Divider, etc and enabling/disabling
> > the clocks USDHCx/ECSPIx depending on used bus. Moreover, it is agnostic
> > to the alias numbering as the information about the clock is read from
> > device tree.
> >
> > One needs to pay attention to the comments indicating necessary for U-boot's
>
> nits: it's U-Boot. Please fix this globally in the commit message, as
> well as in the code comments in this commit.
>
> > DM changes.
> >
> > If needed the code can be extended to support the "set" part of the clock
> > management.
> >
> >
> > Signed-off-by: Lukasz Majewski <lukma@denx.de>
> > ---
> >
> > Changes in v4:
> > - Port some more Linux code to facilitate imx8 code porting (most notably
> >   flags)
> > - Explicitly use container_of() based macro to provide struct clk in various
> >   places (e.g. gate2, mux, etc)
> >   Following patches has been squashed:
> >   http://patchwork.ozlabs.org/patch/1093141/
> >   http://patchwork.ozlabs.org/patch/1093142/
> >   http://patchwork.ozlabs.org/patch/1093146/
> >
> > Changes in v3: None
> >
> >  drivers/clk/Kconfig            |  14 ++++
> >  drivers/clk/Makefile           |   2 +
> >  drivers/clk/clk-divider.c      | 148 ++++++++++++++++++++++++++++++++++
> >  drivers/clk/clk-fixed-factor.c |  87 ++++++++++++++++++++
> >  drivers/clk/clk-mux.c          | 164 +++++++++++++++++++++++++++++++++++++
> >  drivers/clk/clk.c              |  56 +++++++++++++
> >  drivers/clk/imx/Kconfig        |   9 +++
> >  drivers/clk/imx/Makefile       |   2 +
> >  drivers/clk/imx/clk-gate2.c    | 113 ++++++++++++++++++++++++++
> >  drivers/clk/imx/clk-imx6q.c    | 179 +++++++++++++++++++++++++++++++++++++++++
> >  drivers/clk/imx/clk-pfd.c      |  91 +++++++++++++++++++++
> >  drivers/clk/imx/clk-pllv3.c    |  83 +++++++++++++++++++
> >  drivers/clk/imx/clk.h          |  75 +++++++++++++++++
> >  include/linux/clk-provider.h   | 115 ++++++++++++++++++++++++++
> >  14 files changed, 1138 insertions(+)
> >  create mode 100644 drivers/clk/clk-divider.c
> >  create mode 100644 drivers/clk/clk-fixed-factor.c
> >  create mode 100644 drivers/clk/clk-mux.c
> >  create mode 100644 drivers/clk/clk.c
> >  create mode 100644 drivers/clk/imx/clk-gate2.c
> >  create mode 100644 drivers/clk/imx/clk-imx6q.c
> >  create mode 100644 drivers/clk/imx/clk-pfd.c
> >  create mode 100644 drivers/clk/imx/clk-pllv3.c
> >  create mode 100644 drivers/clk/imx/clk.h
> >  create mode 100644 include/linux/clk-provider.h
> >
>
> Regards,
> Bin

[U-Boot] [PATCH v4 12/13] clk: Port Linux common clock framework [CCF] for imx6q to U-boot (tag: 5.0-rc3)

[Lukasz Majewski]

On Fri, 17 May 2019 07:31:38 -0500
Adam Ford <aford173@gmail.com> wrote:

> On Thu, May 16, 2019 at 9:48 PM Bin Meng <bmeng.cn@gmail.com> wrote:
> >
> > Hi Lukasz,
> >
> > On Fri, May 17, 2019 at 6:16 AM Lukasz Majewski <lukma@denx.de>
> > wrote:  
> > >
> > > This commit brings the files from Linux kernel to provide clocks
> > > support as it is used on the Linux kernel with common clock
> > > framework [CCF] setup. 
> 
> 
> Two issues / questions:
> 
> 1)  I tried to test this on the imx6q_logic board, and I enabled
> CLK_IMX6Q in the menu config, but when I save the defconfig, it
> appears there are unmet dependencies.
> 
> WARNING: unmet direct dependencies detected for SPL_CLK_CCF
>   Depends on [n]: SPL_CLK [=n]
>   Selected by [y]:
>   - CLK_IMX6Q [=y] && ARCH_MX6 [=y]
> 
> WARNING: unmet direct dependencies detected for SPL_CLK_CCF
>   Depends on [n]: SPL_CLK [=n]
>   Selected by [y]:
>   - CLK_IMX6Q [=y] && ARCH_MX6 [=y]
> 
> you may want to consider implying the correct functions if ARCH_MX6 &&
> CLK_IMX6Q or select the proper SPL_CLK info.  My board doesn't do DM
> in SPL right now, but I assume the CLK driver you ported is using DM.

Ok. I will look into the Kconfig options.

> 
> 2)  I didn't attempt to load the SPL portion, but when I loaded the
> u-boot-dtb.img file, it didn't appear to boot.
> 
> 
> U-Boot SPL 2019.01 (May 13 2019 - 16:57:41 -0500)
> Trying to boot from MMC1
> spl_load_image_fat_os: error reading image args, err - -2
> 
> 
> (hang)
> 
> Other than enabling CLK_IMX6Q, are there other items I need to enable?
>  My board has OF_CONTROL in U-Boot with DM support working in the
> U-Boot portion.
> 

The CCF shall work also with a setup where it is enabled only in u-boot
proper (CONFIG_CLK_CCF).

Please look into following TPC DM/DTS port as a reference:
https://github.com/lmajewski/u-boot-dfu/commits/DM-SPL-TPC70

This board is fully converted and uses DM/DTS in SPL and u-boot proper
(with CCF).

> adam
> > > The directory structure has been preserved. The ported code only
> > > supports reading information from PLL, MUX, Divider, etc and
> > > enabling/disabling the clocks USDHCx/ECSPIx depending on used
> > > bus. Moreover, it is agnostic to the alias numbering as the
> > > information about the clock is read from device tree.
> > >
> > > One needs to pay attention to the comments indicating necessary
> > > for U-boot's  
> >
> > nits: it's U-Boot. Please fix this globally in the commit message,
> > as well as in the code comments in this commit.
> >  
> > > DM changes.
> > >
> > > If needed the code can be extended to support the "set" part of
> > > the clock management.
> > >
> > >
> > > Signed-off-by: Lukasz Majewski <lukma@denx.de>
> > > ---
> > >
> > > Changes in v4:
> > > - Port some more Linux code to facilitate imx8 code porting (most
> > > notably flags)
> > > - Explicitly use container_of() based macro to provide struct clk
> > > in various places (e.g. gate2, mux, etc)
> > >   Following patches has been squashed:
> > >   http://patchwork.ozlabs.org/patch/1093141/
> > >   http://patchwork.ozlabs.org/patch/1093142/
> > >   http://patchwork.ozlabs.org/patch/1093146/
> > >
> > > Changes in v3: None
> > >
> > >  drivers/clk/Kconfig            |  14 ++++
> > >  drivers/clk/Makefile           |   2 +
> > >  drivers/clk/clk-divider.c      | 148
> > > ++++++++++++++++++++++++++++++++++ drivers/clk/clk-fixed-factor.c
> > > |  87 ++++++++++++++++++++ drivers/clk/clk-mux.c          | 164
> > > +++++++++++++++++++++++++++++++++++++
> > > drivers/clk/clk.c              |  56 +++++++++++++
> > > drivers/clk/imx/Kconfig        |   9 +++
> > > drivers/clk/imx/Makefile       |   2 +
> > > drivers/clk/imx/clk-gate2.c    | 113 ++++++++++++++++++++++++++
> > > drivers/clk/imx/clk-imx6q.c    | 179
> > > +++++++++++++++++++++++++++++++++++++++++
> > > drivers/clk/imx/clk-pfd.c      |  91 +++++++++++++++++++++
> > > drivers/clk/imx/clk-pllv3.c    |  83 +++++++++++++++++++
> > > drivers/clk/imx/clk.h          |  75 +++++++++++++++++
> > > include/linux/clk-provider.h   | 115 ++++++++++++++++++++++++++
> > > 14 files changed, 1138 insertions(+) create mode 100644
> > > drivers/clk/clk-divider.c create mode 100644
> > > drivers/clk/clk-fixed-factor.c create mode 100644
> > > drivers/clk/clk-mux.c create mode 100644 drivers/clk/clk.c create
> > > mode 100644 drivers/clk/imx/clk-gate2.c create mode 100644
> > > drivers/clk/imx/clk-imx6q.c create mode 100644
> > > drivers/clk/imx/clk-pfd.c create mode 100644
> > > drivers/clk/imx/clk-pllv3.c create mode 100644
> > > drivers/clk/imx/clk.h create mode 100644
> > > include/linux/clk-provider.h 
> >
> > Regards,
> > Bin  




Best regards,

Lukasz Majewski

--

DENX Software Engineering GmbH,      Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-59 Fax: (+49)-8142-66989-80 Email: lukma at denx.de
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[U-Boot] [PATCH v4 12/13] clk: Port Linux common clock framework

[sbabic at denx.de]

> This commit brings the files from Linux kernel to provide clocks support
> as it is used on the Linux kernel with common clock framework [CCF] setup.
> The directory structure has been preserved. The ported code only supports
> reading information from PLL, MUX, Divider, etc and enabling/disabling
> the clocks USDHCx/ECSPIx depending on used bus. Moreover, it is agnostic
> to the alias numbering as the information about the clock is read from
> device tree.
> One needs to pay attention to the comments indicating necessary for U-boot's
> DM changes.
> If needed the code can be extended to support the "set" part of the clock
> management.
> Signed-off-by: Lukasz Majewski <lukma@denx.de>

Applied to u-boot-imx, master, thanks !

Best regards,
Stefano Babic

-- 
=====================================================================
DENX Software Engineering GmbH,      Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sbabic at denx.de
=====================================================================

[U-Boot] [PATCH v4 12/13] clk: Port Linux common clock framework

[Lukasz Majewski]

Hi Stefano,

> > This commit brings the files from Linux kernel to provide clocks
> > support as it is used on the Linux kernel with common clock
> > framework [CCF] setup. The directory structure has been preserved.
> > The ported code only supports reading information from PLL, MUX,
> > Divider, etc and enabling/disabling the clocks USDHCx/ECSPIx
> > depending on used bus. Moreover, it is agnostic to the alias
> > numbering as the information about the clock is read from device
> > tree. One needs to pay attention to the comments indicating
> > necessary for U-boot's DM changes.
> > If needed the code can be extended to support the "set" part of the
> > clock management.
> > Signed-off-by: Lukasz Majewski <lukma@denx.de>  
> 
> Applied to u-boot-imx, master, thanks !

Thanks for pulling this code, but the v4 is not the final one.

Simon had some comments regarding the overall design and architecture
of this port. Unfortunately I did not have time to address them yet.

I'm planning to do it ASAP, but IMHO it would be best to drop this
series (so the final one would be applied from the outset).

Sorry for trouble.

> 
> Best regards,
> Stefano Babic
> 




Best regards,

Lukasz Majewski

--

DENX Software Engineering GmbH,      Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-59 Fax: (+49)-8142-66989-80 Email: lukma at denx.de
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[U-Boot] [PATCH v4 12/13] clk: Port Linux common clock framework

[Stefano Babic]

On 10/06/19 23:36, Lukasz Majewski wrote:
> Hi Stefano,
> 
>>> This commit brings the files from Linux kernel to provide clocks
>>> support as it is used on the Linux kernel with common clock
>>> framework [CCF] setup. The directory structure has been preserved.
>>> The ported code only supports reading information from PLL, MUX,
>>> Divider, etc and enabling/disabling the clocks USDHCx/ECSPIx
>>> depending on used bus. Moreover, it is agnostic to the alias
>>> numbering as the information about the clock is read from device
>>> tree. One needs to pay attention to the comments indicating
>>> necessary for U-boot's DM changes.
>>> If needed the code can be extended to support the "set" part of the
>>> clock management.
>>> Signed-off-by: Lukasz Majewski <lukma@denx.de>  
>>
>> Applied to u-boot-imx, master, thanks !
> 
> Thanks for pulling this code, but the v4 is not the final one.
> 
> Simon had some comments regarding the overall design and architecture
> of this port. Unfortunately I did not have time to address them yet.
> 

Ouch...I have not seen this, my mistake !

> I'm planning to do it ASAP, but IMHO it would be best to drop this
> series (so the final one would be applied from the outset).
> 

Right - I will drop the series, even if this means a rebase for u-boot-imx.

> Sorry for trouble.
> 

Best regards,
Stefano Babic


-- 
=====================================================================
DENX Software Engineering GmbH,      Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sbabic at denx.de
=====================================================================

[U-Boot] [PATCH v4 13/13] dm: clk: Extend clk_get_parent_rate() to support CLK_GET_RATE_NOCACHE flag

[Lukasz Majewski]

If the CLK_GET_RATE_NOCACHE flag is set - the clk_get_parent_rate()
provides recalculated clock value without considering the cache setting.

This may be necessary for some clocks tightly coupled with power domains
(i.e. imx8), and prevents from reading invalid cached values.

Signed-off-by: Lukasz Majewski <lukma@denx.de>

---

Changes in v4:
- New patch

Changes in v3: None

 drivers/clk/clk-uclass.c | 5 +++--
 1 file changed, 3 insertions(+), 2 deletions(-)

diff --git a/drivers/clk/clk-uclass.c b/drivers/clk/clk-uclass.c
index 6f054396e3..3dcfae85c4 100644
--- a/drivers/clk/clk-uclass.c
+++ b/drivers/clk/clk-uclass.c
@@ -13,6 +13,7 @@
 #include <dm/read.h>
 #include <dt-structs.h>
 #include <errno.h>
+#include <linux/clk-provider.h>
 
 static inline const struct clk_ops *clk_dev_ops(struct udevice *dev)
 {
@@ -409,8 +410,8 @@ ulong clk_get_parent_rate(struct clk *clk)
 	if (!ops->get_rate)
 		return -ENOSYS;
 
-	/* Read the 'rate' if not already set */
-	if (!pclk->rate)
+	/* Read the 'rate' if not already set or if proper flag set*/
+	if (!pclk->rate || pclk->flags & CLK_GET_RATE_NOCACHE)
 		pclk->rate = clk_get_rate(pclk);
 
 	return pclk->rate;
-- 
2.11.0

[U-Boot] [PATCH v4 13/13] dm: clk: Extend clk_get_parent_rate() to support CLK_GET_RATE_NOCACHE flag

[Peng Fan]

> Subject: [PATCH v4 13/13] dm: clk: Extend clk_get_parent_rate() to support
> CLK_GET_RATE_NOCACHE flag
> 
> If the CLK_GET_RATE_NOCACHE flag is set - the clk_get_parent_rate()
> provides recalculated clock value without considering the cache setting.
> 
> This may be necessary for some clocks tightly coupled with power domains
> (i.e. imx8), and prevents from reading invalid cached values.
> 
> Signed-off-by: Lukasz Majewski <lukma@denx.de>
> 
> ---
> 
> Changes in v4:
> - New patch
> 
> Changes in v3: None
> 
>  drivers/clk/clk-uclass.c | 5 +++--
>  1 file changed, 3 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/clk/clk-uclass.c b/drivers/clk/clk-uclass.c index
> 6f054396e3..3dcfae85c4 100644
> --- a/drivers/clk/clk-uclass.c
> +++ b/drivers/clk/clk-uclass.c
> @@ -13,6 +13,7 @@
>  #include <dm/read.h>
>  #include <dt-structs.h>
>  #include <errno.h>
> +#include <linux/clk-provider.h>
> 
>  static inline const struct clk_ops *clk_dev_ops(struct udevice *dev)  { @@
> -409,8 +410,8 @@ ulong clk_get_parent_rate(struct clk *clk)
>  	if (!ops->get_rate)
>  		return -ENOSYS;
> 
> -	/* Read the 'rate' if not already set */
> -	if (!pclk->rate)
> +	/* Read the 'rate' if not already set or if proper flag set*/
> +	if (!pclk->rate || pclk->flags & CLK_GET_RATE_NOCACHE)
>  		pclk->rate = clk_get_rate(pclk);

Reviewed-by: Peng Fan <peng.fan@nxp.com>

> 
>  	return pclk->rate;
> --
> 2.11.0

[U-Boot] [PATCH v4 13/13] dm: clk: Extend clk_get_parent_rate() to

[sbabic at denx.de]

> If the CLK_GET_RATE_NOCACHE flag is set - the clk_get_parent_rate()
> provides recalculated clock value without considering the cache setting.
> This may be necessary for some clocks tightly coupled with power domains
> (i.e. imx8), and prevents from reading invalid cached values.
> Signed-off-by: Lukasz Majewski <lukma@denx.de>
> Reviewed-by: Peng Fan <peng.fan@nxp.com>

Applied to u-boot-imx, master, thanks !

Best regards,
Stefano Babic

-- 
=====================================================================
DENX Software Engineering GmbH,      Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sbabic at denx.de
=====================================================================

[U-Boot] [PATCH v4 00/13] clk: Port Linux common clock framework [CCF] to U-boot (tag: 5.0-rc3)

[Simon Glass]

kHi Lukasz,

On Thu, 16 May 2019 at 16:11, Lukasz Majewski <lukma@denx.de> wrote:
>
> This patch series brings the files from Linux kernel to provide clocks support
> as it is used on the Linux kernel with common clock framework [CCF] setup.
>
> This series also fixes several problems with current clocks and provides
> sandbox tests for functions addded to clk-uclass.c file.
>
> Repository:
> https://github.com/lmajewski/u-boot-dfu/commits/CCF-v4
>
>
> Changes in v4:
> - New patch
> - None
> - None
> - None
> - New patch
> - None
> - Port some more Linux code to facilitate imx8 code porting (most notably
>   flags)
> - Explicitly use container_of() based macro to provide struct clk in various
>   places (e.g. gate2, mux, etc)
>   Following patches has been squashed:
>   http://patchwork.ozlabs.org/patch/1093141/
>   http://patchwork.ozlabs.org/patch/1093142/
>   http://patchwork.ozlabs.org/patch/1093146/
> - New patch
>
> Changes in v3:
> - New patch
> - The rate information is now cached into struct clk field
> - The clk_get_parent() is used to get pointer to the parent struct clk
> - Replace -ENODEV with -ENOENT
> - Use **clkp instead of **c
> - New patch
> - New patch
>
> Lukasz Majewski (13):
>   clk: doc: Add documentation entry for Common Clock Framework [CCF]
>     (i.MX)
>   dm: Fix documentation entry as there is no UCLASS_CLOCK uclass
>   clk: Remove clock ID check in .get_rate() of clk_fixed_*
>   clk: Extend struct clk to provide information regarding clock rate
>   clk: Extend struct clk to provide clock type agnostic flags
>   clk: Provide struct clk for fixed rate clock (clk_fixed_rate.c)
>   dm: clk: Define clk_get_parent() for clk operations
>   dm: clk: Define clk_get_parent_rate() for clk operations
>   dm: clk: Define clk_get_by_id() for clk operations
>   clk: test: Provide unit test for clk_get_by_id() method
>   clk: test: Provide unit test for clk_get_parent_rate() method
>   clk: Port Linux common clock framework [CCF] for imx6q to U-boot (tag:
>     5.0-rc3)
>   dm: clk: Extend clk_get_parent_rate() to support CLK_GET_RATE_NOCACHE
>     flag
>
>  arch/sandbox/include/asm/clk.h |  16 ++++
>  doc/imx/clk/ccf.txt            |  83 +++++++++++++++++++
>  drivers/clk/Kconfig            |  14 ++++
>  drivers/clk/Makefile           |   2 +
>  drivers/clk/clk-divider.c      | 148 ++++++++++++++++++++++++++++++++++
>  drivers/clk/clk-fixed-factor.c |  87 ++++++++++++++++++++
>  drivers/clk/clk-mux.c          | 164 +++++++++++++++++++++++++++++++++++++
>  drivers/clk/clk-uclass.c       |  60 ++++++++++++++
>  drivers/clk/clk.c              |  56 +++++++++++++
>  drivers/clk/clk_fixed_factor.c |   3 -
>  drivers/clk/clk_fixed_rate.c   |   8 +-
>  drivers/clk/clk_sandbox_test.c |  49 +++++++++++
>  drivers/clk/imx/Kconfig        |   9 +++
>  drivers/clk/imx/Makefile       |   2 +
>  drivers/clk/imx/clk-gate2.c    | 113 ++++++++++++++++++++++++++
>  drivers/clk/imx/clk-imx6q.c    | 179 +++++++++++++++++++++++++++++++++++++++++
>  drivers/clk/imx/clk-pfd.c      |  91 +++++++++++++++++++++
>  drivers/clk/imx/clk-pllv3.c    |  83 +++++++++++++++++++
>  drivers/clk/imx/clk.h          |  75 +++++++++++++++++
>  include/clk.h                  |  37 ++++++++-
>  include/linux/clk-provider.h   | 115 ++++++++++++++++++++++++++
>  test/dm/clk.c                  |   4 +-
>  22 files changed, 1390 insertions(+), 8 deletions(-)
>  create mode 100644 doc/imx/clk/ccf.txt
>  create mode 100644 drivers/clk/clk-divider.c
>  create mode 100644 drivers/clk/clk-fixed-factor.c
>  create mode 100644 drivers/clk/clk-mux.c
>  create mode 100644 drivers/clk/clk.c
>  create mode 100644 drivers/clk/imx/clk-gate2.c
>  create mode 100644 drivers/clk/imx/clk-imx6q.c
>  create mode 100644 drivers/clk/imx/clk-pfd.c
>  create mode 100644 drivers/clk/imx/clk-pllv3.c
>  create mode 100644 drivers/clk/imx/clk.h
>  create mode 100644 include/linux/clk-provider.h

I don't see any new tests here other a trivial change in test/dm/clk.c

When adding new functionality to the generic clock code, tests should
be added to cover this code. The sandbox clock driver should be
enhanced as needed.

Regards,
Simon

[U-Boot] [PATCH v4 00/13] clk: Port Linux common clock framework [CCF] to U-boot (tag: 5.0-rc3)

[Lukasz Majewski]

Hi Simon,

> kHi Lukasz,
> 
> On Thu, 16 May 2019 at 16:11, Lukasz Majewski <lukma@denx.de> wrote:
> >
> > This patch series brings the files from Linux kernel to provide
> > clocks support as it is used on the Linux kernel with common clock
> > framework [CCF] setup.
> >
> > This series also fixes several problems with current clocks and
> > provides sandbox tests for functions addded to clk-uclass.c file.
> >
> > Repository:
> > https://github.com/lmajewski/u-boot-dfu/commits/CCF-v4
> >
> >
> > Changes in v4:
> > - New patch
> > - None
> > - None
> > - None
> > - New patch
> > - None
> > - Port some more Linux code to facilitate imx8 code porting (most
> > notably flags)
> > - Explicitly use container_of() based macro to provide struct clk
> > in various places (e.g. gate2, mux, etc)
> >   Following patches has been squashed:
> >   http://patchwork.ozlabs.org/patch/1093141/
> >   http://patchwork.ozlabs.org/patch/1093142/
> >   http://patchwork.ozlabs.org/patch/1093146/
> > - New patch
> >
> > Changes in v3:
> > - New patch
> > - The rate information is now cached into struct clk field
> > - The clk_get_parent() is used to get pointer to the parent struct
> > clk
> > - Replace -ENODEV with -ENOENT
> > - Use **clkp instead of **c
> > - New patch
> > - New patch
> >
> > Lukasz Majewski (13):
> >   clk: doc: Add documentation entry for Common Clock Framework [CCF]
> >     (i.MX)
> >   dm: Fix documentation entry as there is no UCLASS_CLOCK uclass
> >   clk: Remove clock ID check in .get_rate() of clk_fixed_*
> >   clk: Extend struct clk to provide information regarding clock rate
> >   clk: Extend struct clk to provide clock type agnostic flags
> >   clk: Provide struct clk for fixed rate clock (clk_fixed_rate.c)
> >   dm: clk: Define clk_get_parent() for clk operations
> >   dm: clk: Define clk_get_parent_rate() for clk operations
> >   dm: clk: Define clk_get_by_id() for clk operations
> >   clk: test: Provide unit test for clk_get_by_id() method
> >   clk: test: Provide unit test for clk_get_parent_rate() method
> >   clk: Port Linux common clock framework [CCF] for imx6q to U-boot
> > (tag: 5.0-rc3)
> >   dm: clk: Extend clk_get_parent_rate() to support
> > CLK_GET_RATE_NOCACHE flag
> >
> >  arch/sandbox/include/asm/clk.h |  16 ++++
> >  doc/imx/clk/ccf.txt            |  83 +++++++++++++++++++
> >  drivers/clk/Kconfig            |  14 ++++
> >  drivers/clk/Makefile           |   2 +
> >  drivers/clk/clk-divider.c      | 148
> > ++++++++++++++++++++++++++++++++++ drivers/clk/clk-fixed-factor.c
> > |  87 ++++++++++++++++++++ drivers/clk/clk-mux.c          | 164
> > +++++++++++++++++++++++++++++++++++++
> > drivers/clk/clk-uclass.c       |  60 ++++++++++++++
> > drivers/clk/clk.c              |  56 +++++++++++++
> > drivers/clk/clk_fixed_factor.c |   3 -
> > drivers/clk/clk_fixed_rate.c   |   8 +-
> > drivers/clk/clk_sandbox_test.c |  49 +++++++++++
> > drivers/clk/imx/Kconfig        |   9 +++
> > drivers/clk/imx/Makefile       |   2 +
> > drivers/clk/imx/clk-gate2.c    | 113 ++++++++++++++++++++++++++
> > drivers/clk/imx/clk-imx6q.c    | 179
> > +++++++++++++++++++++++++++++++++++++++++
> > drivers/clk/imx/clk-pfd.c      |  91 +++++++++++++++++++++
> > drivers/clk/imx/clk-pllv3.c    |  83 +++++++++++++++++++
> > drivers/clk/imx/clk.h          |  75 +++++++++++++++++
> > include/clk.h                  |  37 ++++++++-
> > include/linux/clk-provider.h   | 115 ++++++++++++++++++++++++++
> > test/dm/clk.c                  |   4 +- 22 files changed, 1390
> > insertions(+), 8 deletions(-) create mode 100644
> > doc/imx/clk/ccf.txt create mode 100644 drivers/clk/clk-divider.c
> > create mode 100644 drivers/clk/clk-fixed-factor.c create mode
> > 100644 drivers/clk/clk-mux.c create mode 100644 drivers/clk/clk.c
> >  create mode 100644 drivers/clk/imx/clk-gate2.c
> >  create mode 100644 drivers/clk/imx/clk-imx6q.c
> >  create mode 100644 drivers/clk/imx/clk-pfd.c
> >  create mode 100644 drivers/clk/imx/clk-pllv3.c
> >  create mode 100644 drivers/clk/imx/clk.h
> >  create mode 100644 include/linux/clk-provider.h  
> 
> I don't see any new tests here other a trivial change in test/dm/clk.c
> 
> When adding new functionality to the generic clock code, tests should
> be added to cover this code. The sandbox clock driver should be
> enhanced as needed.

Please correct me if I'm wrong (or provide not enough code for those
use cases), but I've added some tests here:

http://patchwork.ozlabs.org/patch/1100767/
http://patchwork.ozlabs.org/patch/1100769/

Are those not exhaustive enough? Have I overlooked something?

> 
> Regards,
> Simon




Best regards,

Lukasz Majewski

--

DENX Software Engineering GmbH,      Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-59 Fax: (+49)-8142-66989-80 Email: lukma at denx.de
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[U-Boot] [PATCH v4 00/13] clk: Port Linux common clock framework [CCF] to U-boot (tag: 5.0-rc3)

[Simon Glass]

Hi Lukasz,

On Sat, 18 May 2019 at 14:49, Lukasz Majewski <lukma@denx.de> wrote:
>
> Hi Simon,
>
> > kHi Lukasz,
> >
> > On Thu, 16 May 2019 at 16:11, Lukasz Majewski <lukma@denx.de> wrote:
> > >
> > > This patch series brings the files from Linux kernel to provide
> > > clocks support as it is used on the Linux kernel with common clock
> > > framework [CCF] setup.
> > >
> > > This series also fixes several problems with current clocks and
> > > provides sandbox tests for functions addded to clk-uclass.c file.
> > >
> > > Repository:
> > > https://github.com/lmajewski/u-boot-dfu/commits/CCF-v4
> > >
> > >
> > > Changes in v4:
> > > - New patch
> > > - None
> > > - None
> > > - None
> > > - New patch
> > > - None
> > > - Port some more Linux code to facilitate imx8 code porting (most
> > > notably flags)
> > > - Explicitly use container_of() based macro to provide struct clk
> > > in various places (e.g. gate2, mux, etc)
> > >   Following patches has been squashed:
> > >   http://patchwork.ozlabs.org/patch/1093141/
> > >   http://patchwork.ozlabs.org/patch/1093142/
> > >   http://patchwork.ozlabs.org/patch/1093146/
> > > - New patch
> > >
> > > Changes in v3:
> > > - New patch
> > > - The rate information is now cached into struct clk field
> > > - The clk_get_parent() is used to get pointer to the parent struct
> > > clk
> > > - Replace -ENODEV with -ENOENT
> > > - Use **clkp instead of **c
> > > - New patch
> > > - New patch
> > >
> > > Lukasz Majewski (13):
> > >   clk: doc: Add documentation entry for Common Clock Framework [CCF]
> > >     (i.MX)
> > >   dm: Fix documentation entry as there is no UCLASS_CLOCK uclass
> > >   clk: Remove clock ID check in .get_rate() of clk_fixed_*
> > >   clk: Extend struct clk to provide information regarding clock rate
> > >   clk: Extend struct clk to provide clock type agnostic flags
> > >   clk: Provide struct clk for fixed rate clock (clk_fixed_rate.c)
> > >   dm: clk: Define clk_get_parent() for clk operations
> > >   dm: clk: Define clk_get_parent_rate() for clk operations
> > >   dm: clk: Define clk_get_by_id() for clk operations
> > >   clk: test: Provide unit test for clk_get_by_id() method
> > >   clk: test: Provide unit test for clk_get_parent_rate() method
> > >   clk: Port Linux common clock framework [CCF] for imx6q to U-boot
> > > (tag: 5.0-rc3)
> > >   dm: clk: Extend clk_get_parent_rate() to support
> > > CLK_GET_RATE_NOCACHE flag
> > >
> > >  arch/sandbox/include/asm/clk.h |  16 ++++
> > >  doc/imx/clk/ccf.txt            |  83 +++++++++++++++++++
> > >  drivers/clk/Kconfig            |  14 ++++
> > >  drivers/clk/Makefile           |   2 +
> > >  drivers/clk/clk-divider.c      | 148
> > > ++++++++++++++++++++++++++++++++++ drivers/clk/clk-fixed-factor.c
> > > |  87 ++++++++++++++++++++ drivers/clk/clk-mux.c          | 164
> > > +++++++++++++++++++++++++++++++++++++
> > > drivers/clk/clk-uclass.c       |  60 ++++++++++++++
> > > drivers/clk/clk.c              |  56 +++++++++++++
> > > drivers/clk/clk_fixed_factor.c |   3 -
> > > drivers/clk/clk_fixed_rate.c   |   8 +-
> > > drivers/clk/clk_sandbox_test.c |  49 +++++++++++
> > > drivers/clk/imx/Kconfig        |   9 +++
> > > drivers/clk/imx/Makefile       |   2 +
> > > drivers/clk/imx/clk-gate2.c    | 113 ++++++++++++++++++++++++++
> > > drivers/clk/imx/clk-imx6q.c    | 179
> > > +++++++++++++++++++++++++++++++++++++++++
> > > drivers/clk/imx/clk-pfd.c      |  91 +++++++++++++++++++++
> > > drivers/clk/imx/clk-pllv3.c    |  83 +++++++++++++++++++
> > > drivers/clk/imx/clk.h          |  75 +++++++++++++++++
> > > include/clk.h                  |  37 ++++++++-
> > > include/linux/clk-provider.h   | 115 ++++++++++++++++++++++++++
> > > test/dm/clk.c                  |   4 +- 22 files changed, 1390
> > > insertions(+), 8 deletions(-) create mode 100644
> > > doc/imx/clk/ccf.txt create mode 100644 drivers/clk/clk-divider.c
> > > create mode 100644 drivers/clk/clk-fixed-factor.c create mode
> > > 100644 drivers/clk/clk-mux.c create mode 100644 drivers/clk/clk.c
> > >  create mode 100644 drivers/clk/imx/clk-gate2.c
> > >  create mode 100644 drivers/clk/imx/clk-imx6q.c
> > >  create mode 100644 drivers/clk/imx/clk-pfd.c
> > >  create mode 100644 drivers/clk/imx/clk-pllv3.c
> > >  create mode 100644 drivers/clk/imx/clk.h
> > >  create mode 100644 include/linux/clk-provider.h
> >
> > I don't see any new tests here other a trivial change in test/dm/clk.c
> >
> > When adding new functionality to the generic clock code, tests should
> > be added to cover this code. The sandbox clock driver should be
> > enhanced as needed.
>
> Please correct me if I'm wrong (or provide not enough code for those
> use cases), but I've added some tests here:
>
> http://patchwork.ozlabs.org/patch/1100767/
> http://patchwork.ozlabs.org/patch/1100769/
>
> Are those not exhaustive enough? Have I overlooked something?

Sorry...I even looked at those patches but missed that they were
tests. I think it would be better if the test code were in test/dm
instead of drivers/clk/clk_sandbox_test.c.

I made a comment about the driver_data thing though.

I wonder if we should try to put tests (code in test/dm/... at least)
in with the change that introduces new functionality? Or would that be
too painful?

Regards,
Simon

[U-Boot] [PATCH v4 00/13] clk: Port Linux common clock framework [CCF] to U-boot (tag: 5.0-rc3)

[Lukasz Majewski]

Hi Simon,

> Hi Lukasz,
> 
> On Sat, 18 May 2019 at 14:49, Lukasz Majewski <lukma@denx.de> wrote:
> >
> > Hi Simon,
> >  
> > > kHi Lukasz,
> > >
> > > On Thu, 16 May 2019 at 16:11, Lukasz Majewski <lukma@denx.de>
> > > wrote:  
> > > >
> > > > This patch series brings the files from Linux kernel to provide
> > > > clocks support as it is used on the Linux kernel with common
> > > > clock framework [CCF] setup.
> > > >
> > > > This series also fixes several problems with current clocks and
> > > > provides sandbox tests for functions addded to clk-uclass.c
> > > > file.
> > > >
> > > > Repository:
> > > > https://github.com/lmajewski/u-boot-dfu/commits/CCF-v4
> > > >
> > > >
> > > > Changes in v4:
> > > > - New patch
> > > > - None
> > > > - None
> > > > - None
> > > > - New patch
> > > > - None
> > > > - Port some more Linux code to facilitate imx8 code porting
> > > > (most notably flags)
> > > > - Explicitly use container_of() based macro to provide struct
> > > > clk in various places (e.g. gate2, mux, etc)
> > > >   Following patches has been squashed:
> > > >   http://patchwork.ozlabs.org/patch/1093141/
> > > >   http://patchwork.ozlabs.org/patch/1093142/
> > > >   http://patchwork.ozlabs.org/patch/1093146/
> > > > - New patch
> > > >
> > > > Changes in v3:
> > > > - New patch
> > > > - The rate information is now cached into struct clk field
> > > > - The clk_get_parent() is used to get pointer to the parent
> > > > struct clk
> > > > - Replace -ENODEV with -ENOENT
> > > > - Use **clkp instead of **c
> > > > - New patch
> > > > - New patch
> > > >
> > > > Lukasz Majewski (13):
> > > >   clk: doc: Add documentation entry for Common Clock Framework
> > > > [CCF] (i.MX)
> > > >   dm: Fix documentation entry as there is no UCLASS_CLOCK uclass
> > > >   clk: Remove clock ID check in .get_rate() of clk_fixed_*
> > > >   clk: Extend struct clk to provide information regarding clock
> > > > rate clk: Extend struct clk to provide clock type agnostic flags
> > > >   clk: Provide struct clk for fixed rate clock
> > > > (clk_fixed_rate.c) dm: clk: Define clk_get_parent() for clk
> > > > operations dm: clk: Define clk_get_parent_rate() for clk
> > > > operations dm: clk: Define clk_get_by_id() for clk operations
> > > >   clk: test: Provide unit test for clk_get_by_id() method
> > > >   clk: test: Provide unit test for clk_get_parent_rate() method
> > > >   clk: Port Linux common clock framework [CCF] for imx6q to
> > > > U-boot (tag: 5.0-rc3)
> > > >   dm: clk: Extend clk_get_parent_rate() to support
> > > > CLK_GET_RATE_NOCACHE flag
> > > >
> > > >  arch/sandbox/include/asm/clk.h |  16 ++++
> > > >  doc/imx/clk/ccf.txt            |  83 +++++++++++++++++++
> > > >  drivers/clk/Kconfig            |  14 ++++
> > > >  drivers/clk/Makefile           |   2 +
> > > >  drivers/clk/clk-divider.c      | 148
> > > > ++++++++++++++++++++++++++++++++++
> > > > drivers/clk/clk-fixed-factor.c |  87 ++++++++++++++++++++
> > > > drivers/clk/clk-mux.c          | 164
> > > > +++++++++++++++++++++++++++++++++++++
> > > > drivers/clk/clk-uclass.c       |  60 ++++++++++++++
> > > > drivers/clk/clk.c              |  56 +++++++++++++
> > > > drivers/clk/clk_fixed_factor.c |   3 -
> > > > drivers/clk/clk_fixed_rate.c   |   8 +-
> > > > drivers/clk/clk_sandbox_test.c |  49 +++++++++++
> > > > drivers/clk/imx/Kconfig        |   9 +++
> > > > drivers/clk/imx/Makefile       |   2 +
> > > > drivers/clk/imx/clk-gate2.c    | 113 ++++++++++++++++++++++++++
> > > > drivers/clk/imx/clk-imx6q.c    | 179
> > > > +++++++++++++++++++++++++++++++++++++++++
> > > > drivers/clk/imx/clk-pfd.c      |  91 +++++++++++++++++++++
> > > > drivers/clk/imx/clk-pllv3.c    |  83 +++++++++++++++++++
> > > > drivers/clk/imx/clk.h          |  75 +++++++++++++++++
> > > > include/clk.h                  |  37 ++++++++-
> > > > include/linux/clk-provider.h   | 115 ++++++++++++++++++++++++++
> > > > test/dm/clk.c                  |   4 +- 22 files changed, 1390
> > > > insertions(+), 8 deletions(-) create mode 100644
> > > > doc/imx/clk/ccf.txt create mode 100644
> > > > drivers/clk/clk-divider.c create mode 100644
> > > > drivers/clk/clk-fixed-factor.c create mode 100644
> > > > drivers/clk/clk-mux.c create mode 100644 drivers/clk/clk.c
> > > > create mode 100644 drivers/clk/imx/clk-gate2.c create mode
> > > > 100644 drivers/clk/imx/clk-imx6q.c create mode 100644
> > > > drivers/clk/imx/clk-pfd.c create mode 100644
> > > > drivers/clk/imx/clk-pllv3.c create mode 100644
> > > > drivers/clk/imx/clk.h create mode 100644
> > > > include/linux/clk-provider.h  
> > >
> > > I don't see any new tests here other a trivial change in
> > > test/dm/clk.c
> > >
> > > When adding new functionality to the generic clock code, tests
> > > should be added to cover this code. The sandbox clock driver
> > > should be enhanced as needed.  
> >
> > Please correct me if I'm wrong (or provide not enough code for those
> > use cases), but I've added some tests here:
> >
> > http://patchwork.ozlabs.org/patch/1100767/
> > http://patchwork.ozlabs.org/patch/1100769/
> >
> > Are those not exhaustive enough? Have I overlooked something?  
> 
> Sorry...I even looked at those patches but missed that they were
> tests. I think it would be better if the test code were in test/dm
> instead of drivers/clk/clk_sandbox_test.c.

I've added those tests in the same place as original clk_get_rate().
However, there is no issue from my side to add them to test/dm if this
is a better place.

> 
> I made a comment about the driver_data thing though.
> 
> I wonder if we should try to put tests (code in test/dm/... at least)
> in with the change that introduces new functionality? Or would that be
> too painful?

As I said above - if the test/dm/ directory is a better place (than
drivers/clk/clk_sandbox_test.c) to place CCF (clk) related tests - then
I'm fine with it.

> 
> Regards,
> Simon




Best regards,

Lukasz Majewski

--

DENX Software Engineering GmbH,      Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-59 Fax: (+49)-8142-66989-80 Email: lukma at denx.de
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[U-Boot] [PATCH v4 00/13] clk: Port Linux common clock framework [CCF] to U-boot (tag: 5.0-rc3)

[Simon Glass]

Hi Lukasz,

On Sun, 19 May 2019 at 08:35, Lukasz Majewski <lukma@denx.de> wrote:
>
> Hi Simon,
>
> > Hi Lukasz,
> >
> > On Sat, 18 May 2019 at 14:49, Lukasz Majewski <lukma@denx.de> wrote:
> > >
> > > Hi Simon,
> > >
> > > > kHi Lukasz,
> > > >
> > > > On Thu, 16 May 2019 at 16:11, Lukasz Majewski <lukma@denx.de>
> > > > wrote:
> > > > >
> > > > > This patch series brings the files from Linux kernel to provide
> > > > > clocks support as it is used on the Linux kernel with common
> > > > > clock framework [CCF] setup.
> > > > >
> > > > > This series also fixes several problems with current clocks and
> > > > > provides sandbox tests for functions addded to clk-uclass.c
> > > > > file.
> > > > >
> > > > > Repository:
> > > > > https://github.com/lmajewski/u-boot-dfu/commits/CCF-v4
> > > > >
> > > > >
> > > > > Changes in v4:
> > > > > - New patch
> > > > > - None
> > > > > - None
> > > > > - None
> > > > > - New patch
> > > > > - None
> > > > > - Port some more Linux code to facilitate imx8 code porting
> > > > > (most notably flags)
> > > > > - Explicitly use container_of() based macro to provide struct
> > > > > clk in various places (e.g. gate2, mux, etc)
> > > > >   Following patches has been squashed:
> > > > >   http://patchwork.ozlabs.org/patch/1093141/
> > > > >   http://patchwork.ozlabs.org/patch/1093142/
> > > > >   http://patchwork.ozlabs.org/patch/1093146/
> > > > > - New patch
> > > > >
> > > > > Changes in v3:
> > > > > - New patch
> > > > > - The rate information is now cached into struct clk field
> > > > > - The clk_get_parent() is used to get pointer to the parent
> > > > > struct clk
> > > > > - Replace -ENODEV with -ENOENT
> > > > > - Use **clkp instead of **c
> > > > > - New patch
> > > > > - New patch
> > > > >
> > > > > Lukasz Majewski (13):
> > > > >   clk: doc: Add documentation entry for Common Clock Framework
> > > > > [CCF] (i.MX)
> > > > >   dm: Fix documentation entry as there is no UCLASS_CLOCK uclass
> > > > >   clk: Remove clock ID check in .get_rate() of clk_fixed_*
> > > > >   clk: Extend struct clk to provide information regarding clock
> > > > > rate clk: Extend struct clk to provide clock type agnostic flags
> > > > >   clk: Provide struct clk for fixed rate clock
> > > > > (clk_fixed_rate.c) dm: clk: Define clk_get_parent() for clk
> > > > > operations dm: clk: Define clk_get_parent_rate() for clk
> > > > > operations dm: clk: Define clk_get_by_id() for clk operations
> > > > >   clk: test: Provide unit test for clk_get_by_id() method
> > > > >   clk: test: Provide unit test for clk_get_parent_rate() method
> > > > >   clk: Port Linux common clock framework [CCF] for imx6q to
> > > > > U-boot (tag: 5.0-rc3)
> > > > >   dm: clk: Extend clk_get_parent_rate() to support
> > > > > CLK_GET_RATE_NOCACHE flag
> > > > >
> > > > >  arch/sandbox/include/asm/clk.h |  16 ++++
> > > > >  doc/imx/clk/ccf.txt            |  83 +++++++++++++++++++
> > > > >  drivers/clk/Kconfig            |  14 ++++
> > > > >  drivers/clk/Makefile           |   2 +
> > > > >  drivers/clk/clk-divider.c      | 148
> > > > > ++++++++++++++++++++++++++++++++++
> > > > > drivers/clk/clk-fixed-factor.c |  87 ++++++++++++++++++++
> > > > > drivers/clk/clk-mux.c          | 164
> > > > > +++++++++++++++++++++++++++++++++++++
> > > > > drivers/clk/clk-uclass.c       |  60 ++++++++++++++
> > > > > drivers/clk/clk.c              |  56 +++++++++++++
> > > > > drivers/clk/clk_fixed_factor.c |   3 -
> > > > > drivers/clk/clk_fixed_rate.c   |   8 +-
> > > > > drivers/clk/clk_sandbox_test.c |  49 +++++++++++
> > > > > drivers/clk/imx/Kconfig        |   9 +++
> > > > > drivers/clk/imx/Makefile       |   2 +
> > > > > drivers/clk/imx/clk-gate2.c    | 113 ++++++++++++++++++++++++++
> > > > > drivers/clk/imx/clk-imx6q.c    | 179
> > > > > +++++++++++++++++++++++++++++++++++++++++
> > > > > drivers/clk/imx/clk-pfd.c      |  91 +++++++++++++++++++++
> > > > > drivers/clk/imx/clk-pllv3.c    |  83 +++++++++++++++++++
> > > > > drivers/clk/imx/clk.h          |  75 +++++++++++++++++
> > > > > include/clk.h                  |  37 ++++++++-
> > > > > include/linux/clk-provider.h   | 115 ++++++++++++++++++++++++++
> > > > > test/dm/clk.c                  |   4 +- 22 files changed, 1390
> > > > > insertions(+), 8 deletions(-) create mode 100644
> > > > > doc/imx/clk/ccf.txt create mode 100644
> > > > > drivers/clk/clk-divider.c create mode 100644
> > > > > drivers/clk/clk-fixed-factor.c create mode 100644
> > > > > drivers/clk/clk-mux.c create mode 100644 drivers/clk/clk.c
> > > > > create mode 100644 drivers/clk/imx/clk-gate2.c create mode
> > > > > 100644 drivers/clk/imx/clk-imx6q.c create mode 100644
> > > > > drivers/clk/imx/clk-pfd.c create mode 100644
> > > > > drivers/clk/imx/clk-pllv3.c create mode 100644
> > > > > drivers/clk/imx/clk.h create mode 100644
> > > > > include/linux/clk-provider.h
> > > >
> > > > I don't see any new tests here other a trivial change in
> > > > test/dm/clk.c
> > > >
> > > > When adding new functionality to the generic clock code, tests
> > > > should be added to cover this code. The sandbox clock driver
> > > > should be enhanced as needed.
> > >
> > > Please correct me if I'm wrong (or provide not enough code for those
> > > use cases), but I've added some tests here:
> > >
> > > http://patchwork.ozlabs.org/patch/1100767/
> > > http://patchwork.ozlabs.org/patch/1100769/
> > >
> > > Are those not exhaustive enough? Have I overlooked something?
> >
> > Sorry...I even looked at those patches but missed that they were
> > tests. I think it would be better if the test code were in test/dm
> > instead of drivers/clk/clk_sandbox_test.c.
>
> I've added those tests in the same place as original clk_get_rate().
> However, there is no issue from my side to add them to test/dm if this
> is a better place.
>
> >
> > I made a comment about the driver_data thing though.
> >
> > I wonder if we should try to put tests (code in test/dm/... at least)
> > in with the change that introduces new functionality? Or would that be
> > too painful?
>
> As I said above - if the test/dm/ directory is a better place (than
> drivers/clk/clk_sandbox_test.c) to place CCF (clk) related tests - then
> I'm fine with it.

Well that file is strange. It seems to be a driver and not a test. But
why can't it use the normal sandbox clock drivers?

Regards,
Simon