* Re: [PATCH] RISC-V: defconfig: Enable NO_HZ_IDLE and HIGH_RES_TIMERS
@ 2019-05-28 17:47 ` Palmer Dabbelt
0 siblings, 0 replies; 16+ messages in thread
From: Palmer Dabbelt @ 2019-05-28 17:47 UTC (permalink / raw)
To: anup, Paul Walmsley
Cc: aou, Anup Patel, linux-kernel, Christoph Hellwig, Atish Patra,
linux-riscv
On Mon, 20 May 2019 01:05:22 PDT (-0700), anup@brainfault.org wrote:
> On Wed, May 15, 2019 at 12:00 PM Anup Patel <Anup.Patel@wdc.com> wrote:
>>
>> This patch enables NO_HZ_IDLE (idle dynamic ticks) and HIGH_RES_TIMERS
>> (hrtimers) in RV32 and RV64 defconfigs.
>>
>> Both of the above options are enabled by default for architectures
>> such as x86, ARM, and ARM64.
>>
>> The idle dynamic ticks helps use save power by stopping timer ticks
>> when the system is idle whereas hrtimers is a much improved timer
>> subsystem compared to the old "timer wheel" based system.
>>
>> This patch is tested on SiFive Unleashed board and QEMU Virt machine.
>>
>> Signed-off-by: Anup Patel <anup.patel@wdc.com>
>> ---
>> arch/riscv/configs/defconfig | 2 ++
>> arch/riscv/configs/rv32_defconfig | 2 ++
>> 2 files changed, 4 insertions(+)
>>
>> diff --git a/arch/riscv/configs/defconfig b/arch/riscv/configs/defconfig
>> index 2fd3461e50ab..f254c352ec57 100644
>> --- a/arch/riscv/configs/defconfig
>> +++ b/arch/riscv/configs/defconfig
>> @@ -1,5 +1,7 @@
>> CONFIG_SYSVIPC=y
>> CONFIG_POSIX_MQUEUE=y
>> +CONFIG_NO_HZ_IDLE=y
>> +CONFIG_HIGH_RES_TIMERS=y
>> CONFIG_IKCONFIG=y
>> CONFIG_IKCONFIG_PROC=y
>> CONFIG_CGROUPS=y
>> diff --git a/arch/riscv/configs/rv32_defconfig b/arch/riscv/configs/rv32_defconfig
>> index 1a911ed8e772..d5449ef805a3 100644
>> --- a/arch/riscv/configs/rv32_defconfig
>> +++ b/arch/riscv/configs/rv32_defconfig
>> @@ -1,5 +1,7 @@
>> CONFIG_SYSVIPC=y
>> CONFIG_POSIX_MQUEUE=y
>> +CONFIG_NO_HZ_IDLE=y
>> +CONFIG_HIGH_RES_TIMERS=y
>> CONFIG_IKCONFIG=y
>> CONFIG_IKCONFIG_PROC=y
>> CONFIG_CGROUPS=y
>> --
>> 2.17.1
>>
>
> Hi All,
>
> Any comments on this one?
>
> @Palmer, It would be nice to have this in Linux-5.2
My only issue here is testing: IIRC last time we tried this it ended up causing
trouble. I'm in the process of switching to Yocto right now for my tests, so
it'll be a bit slow.
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^ permalink raw reply [flat|nested] 16+ messages in thread
* Re: [PATCH] RISC-V: defconfig: Enable NO_HZ_IDLE and HIGH_RES_TIMERS
2019-05-28 17:47 ` Palmer Dabbelt
@ 2019-05-28 19:39 ` Atish Patra
-1 siblings, 0 replies; 16+ messages in thread
From: Atish Patra @ 2019-05-28 19:39 UTC (permalink / raw)
To: Palmer Dabbelt, anup, Paul Walmsley
Cc: Anup Patel, aou, Christoph Hellwig, linux-riscv, linux-kernel
> On 5/28/19 10:47 AM, Palmer Dabbelt wrote:
>> On Mon, 20 May 2019 01:05:22 PDT (-0700), anup@brainfault.org wrote:
>>> On Wed, May 15, 2019 at 12:00 PM Anup Patel <Anup.Patel@wdc.com> wrote:
>>>
>>> This patch enables NO_HZ_IDLE (idle dynamic ticks) and HIGH_RES_TIMERS
>>> (hrtimers) in RV32 and RV64 defconfigs.
>>>
>>> Both of the above options are enabled by default for architectures
>>> such as x86, ARM, and ARM64.
>>>
>>> The idle dynamic ticks helps use save power by stopping timer ticks
>>> when the system is idle whereas hrtimers is a much improved timer
>>> subsystem compared to the old "timer wheel" based system.
>>>
>>> This patch is tested on SiFive Unleashed board and QEMU Virt machine.
>>>
>>> Signed-off-by: Anup Patel <anup.patel@wdc.com>
>>> ---
>>> arch/riscv/configs/defconfig | 2 ++
>>> arch/riscv/configs/rv32_defconfig | 2 ++
>>> 2 files changed, 4 insertions(+)
>>>
>>> diff --git a/arch/riscv/configs/defconfig b/arch/riscv/configs/defconfig
>>> index 2fd3461e50ab..f254c352ec57 100644
>>> --- a/arch/riscv/configs/defconfig
>>> +++ b/arch/riscv/configs/defconfig
>>> @@ -1,5 +1,7 @@
>>> CONFIG_SYSVIPC=y
>>> CONFIG_POSIX_MQUEUE=y
>>> +CONFIG_NO_HZ_IDLE=y
>>> +CONFIG_HIGH_RES_TIMERS=y
>>> CONFIG_IKCONFIG=y
>>> CONFIG_IKCONFIG_PROC=y
>>> CONFIG_CGROUPS=y
>>> diff --git a/arch/riscv/configs/rv32_defconfig b/arch/riscv/configs/rv32_defconfig
>>> index 1a911ed8e772..d5449ef805a3 100644
>>> --- a/arch/riscv/configs/rv32_defconfig
>>> +++ b/arch/riscv/configs/rv32_defconfig
>>> @@ -1,5 +1,7 @@
>>> CONFIG_SYSVIPC=y
>>> CONFIG_POSIX_MQUEUE=y
>>> +CONFIG_NO_HZ_IDLE=y
>>> +CONFIG_HIGH_RES_TIMERS=y
>>> CONFIG_IKCONFIG=y
>>> CONFIG_IKCONFIG_PROC=y
>>> CONFIG_CGROUPS=y
>>> --
>>> 2.17.1
>>
>> Hi All,
>>
>> Any comments on this one?
>>
>> @Palmer, It would be nice to have this in Linux-5.2
> My only issue here is testing: IIRC last time we tried this it ended up causing
> trouble.
Are you talking about the trouble with CONFIG_NO_HZ_IDLE we were seeing last year or something else ?
CONFIG_NO_HZ_IDLE was well tested and fixed last year.
I'm in the process of switching to Yocto right now for my tests, so
> it'll be a bit slow.
--
Regards,
Atish
^ permalink raw reply [flat|nested] 16+ messages in thread
* Re: [PATCH] RISC-V: defconfig: Enable NO_HZ_IDLE and HIGH_RES_TIMERS
@ 2019-05-28 19:39 ` Atish Patra
0 siblings, 0 replies; 16+ messages in thread
From: Atish Patra @ 2019-05-28 19:39 UTC (permalink / raw)
To: Palmer Dabbelt, anup, Paul Walmsley
Cc: Christoph Hellwig, linux-riscv, Anup Patel, linux-kernel, aou
> On 5/28/19 10:47 AM, Palmer Dabbelt wrote:
>> On Mon, 20 May 2019 01:05:22 PDT (-0700), anup@brainfault.org wrote:
>>> On Wed, May 15, 2019 at 12:00 PM Anup Patel <Anup.Patel@wdc.com> wrote:
>>>
>>> This patch enables NO_HZ_IDLE (idle dynamic ticks) and HIGH_RES_TIMERS
>>> (hrtimers) in RV32 and RV64 defconfigs.
>>>
>>> Both of the above options are enabled by default for architectures
>>> such as x86, ARM, and ARM64.
>>>
>>> The idle dynamic ticks helps use save power by stopping timer ticks
>>> when the system is idle whereas hrtimers is a much improved timer
>>> subsystem compared to the old "timer wheel" based system.
>>>
>>> This patch is tested on SiFive Unleashed board and QEMU Virt machine.
>>>
>>> Signed-off-by: Anup Patel <anup.patel@wdc.com>
>>> ---
>>> arch/riscv/configs/defconfig | 2 ++
>>> arch/riscv/configs/rv32_defconfig | 2 ++
>>> 2 files changed, 4 insertions(+)
>>>
>>> diff --git a/arch/riscv/configs/defconfig b/arch/riscv/configs/defconfig
>>> index 2fd3461e50ab..f254c352ec57 100644
>>> --- a/arch/riscv/configs/defconfig
>>> +++ b/arch/riscv/configs/defconfig
>>> @@ -1,5 +1,7 @@
>>> CONFIG_SYSVIPC=y
>>> CONFIG_POSIX_MQUEUE=y
>>> +CONFIG_NO_HZ_IDLE=y
>>> +CONFIG_HIGH_RES_TIMERS=y
>>> CONFIG_IKCONFIG=y
>>> CONFIG_IKCONFIG_PROC=y
>>> CONFIG_CGROUPS=y
>>> diff --git a/arch/riscv/configs/rv32_defconfig b/arch/riscv/configs/rv32_defconfig
>>> index 1a911ed8e772..d5449ef805a3 100644
>>> --- a/arch/riscv/configs/rv32_defconfig
>>> +++ b/arch/riscv/configs/rv32_defconfig
>>> @@ -1,5 +1,7 @@
>>> CONFIG_SYSVIPC=y
>>> CONFIG_POSIX_MQUEUE=y
>>> +CONFIG_NO_HZ_IDLE=y
>>> +CONFIG_HIGH_RES_TIMERS=y
>>> CONFIG_IKCONFIG=y
>>> CONFIG_IKCONFIG_PROC=y
>>> CONFIG_CGROUPS=y
>>> --
>>> 2.17.1
>>
>> Hi All,
>>
>> Any comments on this one?
>>
>> @Palmer, It would be nice to have this in Linux-5.2
> My only issue here is testing: IIRC last time we tried this it ended up causing
> trouble.
Are you talking about the trouble with CONFIG_NO_HZ_IDLE we were seeing last year or something else ?
CONFIG_NO_HZ_IDLE was well tested and fixed last year.
I'm in the process of switching to Yocto right now for my tests, so
> it'll be a bit slow.
--
Regards,
Atish
_______________________________________________
linux-riscv mailing list
linux-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-riscv
^ permalink raw reply [flat|nested] 16+ messages in thread
* Re: [PATCH] RISC-V: defconfig: Enable NO_HZ_IDLE and HIGH_RES_TIMERS
2019-05-28 17:47 ` Palmer Dabbelt
@ 2019-05-29 8:00 ` Andreas Schwab
-1 siblings, 0 replies; 16+ messages in thread
From: Andreas Schwab @ 2019-05-29 8:00 UTC (permalink / raw)
To: Palmer Dabbelt
Cc: anup, Paul Walmsley, Anup Patel, aou, Atish Patra,
Christoph Hellwig, linux-riscv, linux-kernel
On Mai 28 2019, Palmer Dabbelt <palmer@sifive.com> wrote:
> My only issue here is testing: IIRC last time we tried this it ended up causing
> trouble.
I've been running kernels with these settings since the beginning, and
never seen any trouble.
Andreas.
--
Andreas Schwab, SUSE Labs, schwab@suse.de
GPG Key fingerprint = 0196 BAD8 1CE9 1970 F4BE 1748 E4D4 88E3 0EEA B9D7
"And now for something completely different."
^ permalink raw reply [flat|nested] 16+ messages in thread
* Re: [PATCH] RISC-V: defconfig: Enable NO_HZ_IDLE and HIGH_RES_TIMERS
@ 2019-05-29 8:00 ` Andreas Schwab
0 siblings, 0 replies; 16+ messages in thread
From: Andreas Schwab @ 2019-05-29 8:00 UTC (permalink / raw)
To: Palmer Dabbelt
Cc: aou, anup, Anup Patel, linux-kernel, Christoph Hellwig,
Atish Patra, Paul Walmsley, linux-riscv
On Mai 28 2019, Palmer Dabbelt <palmer@sifive.com> wrote:
> My only issue here is testing: IIRC last time we tried this it ended up causing
> trouble.
I've been running kernels with these settings since the beginning, and
never seen any trouble.
Andreas.
--
Andreas Schwab, SUSE Labs, schwab@suse.de
GPG Key fingerprint = 0196 BAD8 1CE9 1970 F4BE 1748 E4D4 88E3 0EEA B9D7
"And now for something completely different."
_______________________________________________
linux-riscv mailing list
linux-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-riscv
^ permalink raw reply [flat|nested] 16+ messages in thread
* Re: [PATCH] RISC-V: defconfig: Enable NO_HZ_IDLE and HIGH_RES_TIMERS
2019-05-29 8:00 ` Andreas Schwab
@ 2019-05-31 20:35 ` Palmer Dabbelt
-1 siblings, 0 replies; 16+ messages in thread
From: Palmer Dabbelt @ 2019-05-31 20:35 UTC (permalink / raw)
To: schwab
Cc: anup, Paul Walmsley, Anup.Patel, aou, Atish Patra,
Christoph Hellwig, linux-riscv, linux-kernel
On Wed, 29 May 2019 01:00:35 PDT (-0700), schwab@suse.de wrote:
> On Mai 28 2019, Palmer Dabbelt <palmer@sifive.com> wrote:
>
>> My only issue here is testing: IIRC last time we tried this it ended up causing
>> trouble.
>
> I've been running kernels with these settings since the beginning, and
> never seen any trouble.
OK, I'm happy with it.
Reviewed-by: Palmer Dabbelt <palmer@sifive.com>
^ permalink raw reply [flat|nested] 16+ messages in thread
* Re: [PATCH] RISC-V: defconfig: Enable NO_HZ_IDLE and HIGH_RES_TIMERS
@ 2019-05-31 20:35 ` Palmer Dabbelt
0 siblings, 0 replies; 16+ messages in thread
From: Palmer Dabbelt @ 2019-05-31 20:35 UTC (permalink / raw)
To: schwab
Cc: aou, anup, Anup.Patel, linux-kernel, Christoph Hellwig,
Atish Patra, Paul Walmsley, linux-riscv
On Wed, 29 May 2019 01:00:35 PDT (-0700), schwab@suse.de wrote:
> On Mai 28 2019, Palmer Dabbelt <palmer@sifive.com> wrote:
>
>> My only issue here is testing: IIRC last time we tried this it ended up causing
>> trouble.
>
> I've been running kernels with these settings since the beginning, and
> never seen any trouble.
OK, I'm happy with it.
Reviewed-by: Palmer Dabbelt <palmer@sifive.com>
_______________________________________________
linux-riscv mailing list
linux-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-riscv
^ permalink raw reply [flat|nested] 16+ messages in thread
* Re: [PATCH] RISC-V: defconfig: Enable NO_HZ_IDLE and HIGH_RES_TIMERS
2019-05-31 20:35 ` Palmer Dabbelt
@ 2019-06-03 16:44 ` Paul Walmsley
-1 siblings, 0 replies; 16+ messages in thread
From: Paul Walmsley @ 2019-06-03 16:44 UTC (permalink / raw)
To: Anup.Patel
Cc: schwab, Palmer Dabbelt, anup, aou, Atish Patra,
Christoph Hellwig, linux-riscv, linux-kernel
On Fri, 31 May 2019, Palmer Dabbelt wrote:
> On Wed, 29 May 2019 01:00:35 PDT (-0700), schwab@suse.de wrote:
> > On Mai 28 2019, Palmer Dabbelt <palmer@sifive.com> wrote:
> >
> > > My only issue here is testing: IIRC last time we tried this it ended up
> > > causing
> > > trouble.
> >
> > I've been running kernels with these settings since the beginning, and
> > never seen any trouble.
>
> OK, I'm happy with it.
>
> Reviewed-by: Palmer Dabbelt <palmer@sifive.com>
Thanks, queued for v5.3.
- Paul
^ permalink raw reply [flat|nested] 16+ messages in thread
* Re: [PATCH] RISC-V: defconfig: Enable NO_HZ_IDLE and HIGH_RES_TIMERS
@ 2019-06-03 16:44 ` Paul Walmsley
0 siblings, 0 replies; 16+ messages in thread
From: Paul Walmsley @ 2019-06-03 16:44 UTC (permalink / raw)
To: Anup.Patel
Cc: aou, schwab, Palmer Dabbelt, linux-kernel, Christoph Hellwig,
Atish Patra, anup, linux-riscv
On Fri, 31 May 2019, Palmer Dabbelt wrote:
> On Wed, 29 May 2019 01:00:35 PDT (-0700), schwab@suse.de wrote:
> > On Mai 28 2019, Palmer Dabbelt <palmer@sifive.com> wrote:
> >
> > > My only issue here is testing: IIRC last time we tried this it ended up
> > > causing
> > > trouble.
> >
> > I've been running kernels with these settings since the beginning, and
> > never seen any trouble.
>
> OK, I'm happy with it.
>
> Reviewed-by: Palmer Dabbelt <palmer@sifive.com>
Thanks, queued for v5.3.
- Paul
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linux-riscv mailing list
linux-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-riscv
^ permalink raw reply [flat|nested] 16+ messages in thread
* Re: [PATCH] RISC-V: defconfig: Enable NO_HZ_IDLE and HIGH_RES_TIMERS
2019-06-03 16:44 ` Paul Walmsley
@ 2019-06-04 6:41 ` Christoph Hellwig
-1 siblings, 0 replies; 16+ messages in thread
From: Christoph Hellwig @ 2019-06-04 6:41 UTC (permalink / raw)
To: Paul Walmsley
Cc: Anup.Patel, aou, schwab, Palmer Dabbelt, linux-kernel,
Christoph Hellwig, Atish Patra, anup, linux-riscv
On Mon, Jun 03, 2019 at 09:44:44AM -0700, Paul Walmsley wrote:
> > Reviewed-by: Palmer Dabbelt <palmer@sifive.com>
>
> Thanks, queued for v5.3.
Where do you apply these patches to? Is there a chance we could just
set up a multi commiter riscv tree insted of growing the number of
trees?
^ permalink raw reply [flat|nested] 16+ messages in thread
* Re: [PATCH] RISC-V: defconfig: Enable NO_HZ_IDLE and HIGH_RES_TIMERS
@ 2019-06-04 6:41 ` Christoph Hellwig
0 siblings, 0 replies; 16+ messages in thread
From: Christoph Hellwig @ 2019-06-04 6:41 UTC (permalink / raw)
To: Paul Walmsley
Cc: Palmer Dabbelt, schwab, Anup.Patel, linux-kernel,
Christoph Hellwig, Atish Patra, aou, anup, linux-riscv
On Mon, Jun 03, 2019 at 09:44:44AM -0700, Paul Walmsley wrote:
> > Reviewed-by: Palmer Dabbelt <palmer@sifive.com>
>
> Thanks, queued for v5.3.
Where do you apply these patches to? Is there a chance we could just
set up a multi commiter riscv tree insted of growing the number of
trees?
_______________________________________________
linux-riscv mailing list
linux-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-riscv
^ permalink raw reply [flat|nested] 16+ messages in thread