From: Alan Kao <alankao@andestech.com>
To: Atish Patra <Atish.Patra@wdc.com>
Cc: "hch@infradead.org" <hch@infradead.org>,
"aou@eecs.berkeley.edu" <aou@eecs.berkeley.edu>,
"anup@brainfault.org" <anup@brainfault.org>,
"palmer@sifive.com" <palmer@sifive.com>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
"schwab@linux-m68k.org" <schwab@linux-m68k.org>,
"paul.walmsley@sifive.com" <paul.walmsley@sifive.com>,
"linux-riscv@lists.infradead.org"
<linux-riscv@lists.infradead.org>,
"allison@lohutok.net" <allison@lohutok.net>
Subject: Re: [v2 PATCH] RISC-V: Optimize tlb flush path.
Date: Wed, 21 Aug 2019 09:29:22 +0800 [thread overview]
Message-ID: <20190821012921.GA30187@andestech.com> (raw)
In-Reply-To: <76467815b464709f4c899444c957d921ebac87db.camel@wdc.com>
On Tue, Aug 20, 2019 at 08:28:36PM +0000, Atish Patra wrote:
> On Tue, 2019-08-20 at 02:22 -0700, hch@infradead.org wrote:
> > On Tue, Aug 20, 2019 at 08:42:19AM +0000, Atish Patra wrote:
> > > cmask NULL is pretty common case and we would be unnecessarily
> > > executing bunch of instructions everytime while not saving much.
> > > Kernel
> > > still have to make an SBI call and OpenSBI is doing a local flush
> > > anyways.
> > >
> > > Looking at the code again, I think we can just use cpumask_weight
> > > and
> > > do local tlb flush only if local cpu is the only cpu present.
> > >
> > > Otherwise, it will just fall through and call
> > > sbi_remote_sfence_vma().
> >
> > Maybe it is just time to split the different cases at a higher level.
> > The idea to multiple everything onto a single function always seemed
> > odd to me.
> >
> > FYI, here is what I do for the IPI based tlbflush for the native S-
> > mode
> > clint prototype, which seems much easier to understand:
> >
> > http://git.infradead.org/users/hch/riscv.git/commitdiff/ea4067ae61e20fcfcf46a6f6bd1cc25710ce3afe
>
> This does seem a lot cleaner to me. We can reuse some of the code for
> this patch as well. Based on NATIVE_CLINT configuration, it will send
> an IPI or SBI call.
IMHO, this approach should be avoided because CLINT is compatible to but
not mandatory in the privileged spec. In other words, it is possible that
a Linux-capable RISC-V platform does not contain a CLINT component but
rely on some other mechanism to deal with SW/timer interrupts.
>
> I can rebase my patch on top of yours and I can send it together or you
> can include in your series.
>
> Let me know your preference.
>
> --
> Regards,
> Atish
Best,
Alan
WARNING: multiple messages have this Message-ID (diff)
From: Alan Kao <alankao@andestech.com>
To: Atish Patra <Atish.Patra@wdc.com>
Cc: "aou@eecs.berkeley.edu" <aou@eecs.berkeley.edu>,
"anup@brainfault.org" <anup@brainfault.org>,
"palmer@sifive.com" <palmer@sifive.com>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
"hch@infradead.org" <hch@infradead.org>,
"schwab@linux-m68k.org" <schwab@linux-m68k.org>,
"paul.walmsley@sifive.com" <paul.walmsley@sifive.com>,
"linux-riscv@lists.infradead.org"
<linux-riscv@lists.infradead.org>,
"allison@lohutok.net" <allison@lohutok.net>
Subject: Re: [v2 PATCH] RISC-V: Optimize tlb flush path.
Date: Wed, 21 Aug 2019 09:29:22 +0800 [thread overview]
Message-ID: <20190821012921.GA30187@andestech.com> (raw)
In-Reply-To: <76467815b464709f4c899444c957d921ebac87db.camel@wdc.com>
On Tue, Aug 20, 2019 at 08:28:36PM +0000, Atish Patra wrote:
> On Tue, 2019-08-20 at 02:22 -0700, hch@infradead.org wrote:
> > On Tue, Aug 20, 2019 at 08:42:19AM +0000, Atish Patra wrote:
> > > cmask NULL is pretty common case and we would be unnecessarily
> > > executing bunch of instructions everytime while not saving much.
> > > Kernel
> > > still have to make an SBI call and OpenSBI is doing a local flush
> > > anyways.
> > >
> > > Looking at the code again, I think we can just use cpumask_weight
> > > and
> > > do local tlb flush only if local cpu is the only cpu present.
> > >
> > > Otherwise, it will just fall through and call
> > > sbi_remote_sfence_vma().
> >
> > Maybe it is just time to split the different cases at a higher level.
> > The idea to multiple everything onto a single function always seemed
> > odd to me.
> >
> > FYI, here is what I do for the IPI based tlbflush for the native S-
> > mode
> > clint prototype, which seems much easier to understand:
> >
> > http://git.infradead.org/users/hch/riscv.git/commitdiff/ea4067ae61e20fcfcf46a6f6bd1cc25710ce3afe
>
> This does seem a lot cleaner to me. We can reuse some of the code for
> this patch as well. Based on NATIVE_CLINT configuration, it will send
> an IPI or SBI call.
IMHO, this approach should be avoided because CLINT is compatible to but
not mandatory in the privileged spec. In other words, it is possible that
a Linux-capable RISC-V platform does not contain a CLINT component but
rely on some other mechanism to deal with SW/timer interrupts.
>
> I can rebase my patch on top of yours and I can send it together or you
> can include in your series.
>
> Let me know your preference.
>
> --
> Regards,
> Atish
Best,
Alan
_______________________________________________
linux-riscv mailing list
linux-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-riscv
next prev parent reply other threads:[~2019-08-21 1:30 UTC|newest]
Thread overview: 40+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-08-20 0:47 [v2 PATCH] RISC-V: Optimize tlb flush path Atish Patra
2019-08-20 0:47 ` Atish Patra
2019-08-20 3:06 ` hch
2019-08-20 3:06 ` hch
2019-08-20 7:14 ` Andreas Schwab
2019-08-20 7:14 ` Andreas Schwab
2019-08-20 7:16 ` hch
2019-08-20 7:16 ` hch
2019-08-20 7:46 ` Andreas Schwab
2019-08-20 7:46 ` Andreas Schwab
2019-08-20 8:42 ` Atish Patra
2019-08-20 8:42 ` Atish Patra
2019-08-20 8:51 ` Andreas Schwab
2019-08-20 8:51 ` Andreas Schwab
2019-08-20 9:22 ` hch
2019-08-20 9:22 ` hch
2019-08-20 20:28 ` Atish Patra
2019-08-20 20:28 ` Atish Patra
2019-08-20 22:18 ` hch
2019-08-20 22:18 ` hch
2019-08-20 22:24 ` Atish Patra
2019-08-20 22:24 ` Atish Patra
2019-08-21 1:29 ` Alan Kao [this message]
2019-08-21 1:29 ` Alan Kao
2019-08-21 1:40 ` hch
2019-08-21 1:40 ` hch
2019-08-21 3:52 ` Anup Patel
2019-08-21 3:52 ` Anup Patel
2019-08-21 7:18 ` hch
2019-08-21 7:18 ` hch
2019-08-20 8:51 ` Anup Patel
2019-08-20 8:51 ` Anup Patel
2019-08-20 20:29 ` Atish Patra
2019-08-20 20:29 ` Atish Patra
2019-08-21 14:41 ` hch
2019-08-21 14:41 ` hch
2019-08-21 14:45 ` hch
2019-08-21 14:45 ` hch
2019-08-21 17:36 ` Atish Patra
2019-08-21 17:36 ` Atish Patra
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20190821012921.GA30187@andestech.com \
--to=alankao@andestech.com \
--cc=Atish.Patra@wdc.com \
--cc=allison@lohutok.net \
--cc=anup@brainfault.org \
--cc=aou@eecs.berkeley.edu \
--cc=hch@infradead.org \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-riscv@lists.infradead.org \
--cc=palmer@sifive.com \
--cc=paul.walmsley@sifive.com \
--cc=schwab@linux-m68k.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.