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From: Animesh Manna <animesh.manna@intel.com>
To: intel-gfx@lists.freedesktop.org
Cc: Jani Nikula <jani.nikula@intel.com>
Subject: [PATCH v4 01/10] drm/i915/dsb: feature flag added for display state buffer.
Date: Fri, 30 Aug 2019 18:15:24 +0530	[thread overview]
Message-ID: <20190830124533.26573-2-animesh.manna@intel.com> (raw)
In-Reply-To: <20190830124533.26573-1-animesh.manna@intel.com>

Display State Buffer(DSB) is a new hardware capability, introduced
in GEN12 display. DSB allows a driver to batch-program display HW
registers.

Cc: Jani Nikula <jani.nikula@intel.com>
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Animesh Manna <animesh.manna@intel.com>
---
 drivers/gpu/drm/i915/i915_drv.h          | 2 ++
 drivers/gpu/drm/i915/intel_device_info.h | 1 +
 2 files changed, 3 insertions(+)

diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index db7480831e52..804bfe7aec2b 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -1857,6 +1857,8 @@ static inline struct drm_i915_private *pdev_to_i915(struct pci_dev *pdev)
 	(BUILD_BUG_ON_ZERO(!__builtin_constant_p(n)) + \
 	 INTEL_INFO(dev_priv)->gen == (n))
 
+#define HAS_DSB(dev_priv)	(INTEL_INFO(dev_priv)->display.has_dsb)
+
 /*
  * Return true if revision is in range [since,until] inclusive.
  *
diff --git a/drivers/gpu/drm/i915/intel_device_info.h b/drivers/gpu/drm/i915/intel_device_info.h
index 92e0c2e0954c..e206f298f48e 100644
--- a/drivers/gpu/drm/i915/intel_device_info.h
+++ b/drivers/gpu/drm/i915/intel_device_info.h
@@ -135,6 +135,7 @@ enum intel_ppgtt_type {
 	func(has_csr); \
 	func(has_ddi); \
 	func(has_dp_mst); \
+	func(has_dsb); \
 	func(has_fbc); \
 	func(has_gmch); \
 	func(has_hotplug); \
-- 
2.22.0

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  reply	other threads:[~2019-08-30 12:53 UTC|newest]

Thread overview: 26+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-08-30 12:45 [PATCH v4 00/10] DSB enablement Animesh Manna
2019-08-30 12:45 ` Animesh Manna [this message]
2019-08-30 12:45 ` [PATCH v4 02/10] drm/i915/dsb: DSB context creation Animesh Manna
2019-08-30 13:35   ` Jani Nikula
2019-09-03  3:55     ` Sharma, Shashank
2019-09-03 10:45     ` Animesh Manna
2019-09-03 11:22       ` Jani Nikula
2019-08-30 12:45 ` [PATCH v4 03/10] drm/i915/dsb: single register write function for DSB Animesh Manna
2019-08-30 12:45 ` [PATCH v4 04/10] drm/i915/dsb: Indexed " Animesh Manna
2019-08-30 12:45 ` [PATCH v4 05/10] drm/i915/dsb: Check DSB engine status Animesh Manna
2019-08-30 12:45 ` [PATCH v4 06/10] drm/i915/dsb: functions to enable/disable DSB engine Animesh Manna
2019-08-30 12:45 ` [PATCH v4 07/10] drm/i915/dsb: function to trigger workload execution of DSB Animesh Manna
2019-08-30 12:45 ` [PATCH v4 08/10] drm/i915/dsb: Enable gamma lut programming using DSB Animesh Manna
2019-08-30 13:32   ` Jani Nikula
2019-09-03  4:00     ` Sharma, Shashank
     [not found]       ` <8736hd6c9g.fsf@intel.com>
2019-09-03  8:02         ` Sharma, Shashank
2019-09-03  8:08     ` Jani Nikula
2019-09-03 11:05       ` Animesh Manna
2019-09-03 11:14         ` Jani Nikula
2019-09-04 10:30     ` Animesh Manna
2019-08-30 12:45 ` [PATCH v4 09/10] drm/i915/dsb: Enable DSB for gen12 Animesh Manna
2019-08-30 12:45 ` [PATCH v4 10/10] drm/i915/dsb: Documentation for DSB Animesh Manna
2019-08-30 12:59 ` ✗ Fi.CI.CHECKPATCH: warning for DSB enablement. (rev4) Patchwork
2019-08-30 13:00 ` ✗ Fi.CI.SPARSE: " Patchwork
2019-08-30 13:46 ` ✓ Fi.CI.BAT: success " Patchwork
2019-08-31  9:02 ` ✓ Fi.CI.IGT: " Patchwork

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