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From: "Cédric Le Goater" <clg@kaod.org>
To: David Gibson <david@gibson.dropbear.id.au>
Cc: "Cédric Le Goater" <clg@kaod.org>,
	qemu-ppc@nongnu.org, qemu-devel@nongnu.org,
	"Greg Kurz" <groug@kaod.org>
Subject: [Qemu-devel] [PATCH v4 02/25] ppc/xive: Implement the XivePresenter interface
Date: Wed, 18 Sep 2019 18:06:22 +0200	[thread overview]
Message-ID: <20190918160645.25126-3-clg@kaod.org> (raw)
In-Reply-To: <20190918160645.25126-1-clg@kaod.org>

Each XIVE Router model, sPAPR and PowerNV, now implements the 'match_nvt'
handler of the XivePresenter QOM interface. This is simply moving code
and taking into account the new API.

To be noted that the xive_router_get_tctx() helper is not used anymore
when doing CAM matching and will be removed later on after other changes.

The XIVE presenter model is still too simple for the PowerNV machine
and the CAM matching algo is not correct on multichip system. Subsequent
patches will introduce more changes to scan all chips of the system.

Signed-off-by: Cédric Le Goater <clg@kaod.org>
---
 hw/intc/pnv_xive.c   | 41 +++++++++++++++++++++++++++++++++++++++++
 hw/intc/spapr_xive.c | 41 +++++++++++++++++++++++++++++++++++++++++
 hw/intc/xive.c       | 43 +++++++------------------------------------
 3 files changed, 89 insertions(+), 36 deletions(-)

diff --git a/hw/intc/pnv_xive.c b/hw/intc/pnv_xive.c
index ed6e9d71bbfa..ae449aa1119b 100644
--- a/hw/intc/pnv_xive.c
+++ b/hw/intc/pnv_xive.c
@@ -392,6 +392,45 @@ static int pnv_xive_get_eas(XiveRouter *xrtr, uint8_t blk, uint32_t idx,
     return pnv_xive_vst_read(xive, VST_TSEL_IVT, blk, idx, eas);
 }
 
+static int pnv_xive_match_nvt(XivePresenter *xptr, uint8_t format,
+                              uint8_t nvt_blk, uint32_t nvt_idx,
+                              bool cam_ignore, uint8_t priority,
+                              uint32_t logic_serv, XiveTCTXMatch *match)
+{
+    CPUState *cs;
+    int count = 0;
+
+    CPU_FOREACH(cs) {
+        PowerPCCPU *cpu = POWERPC_CPU(cs);
+        XiveTCTX *tctx = XIVE_TCTX(pnv_cpu_state(cpu)->intc);
+        int ring;
+
+        /*
+         * Check the thread context CAM lines and record matches.
+         */
+        ring = xive_presenter_tctx_match(xptr, tctx, format, nvt_blk, nvt_idx,
+                                         cam_ignore, logic_serv);
+        /*
+         * Save the context and follow on to catch duplicates, that we
+         * don't support yet.
+         */
+        if (ring != -1) {
+            if (match->tctx) {
+                qemu_log_mask(LOG_GUEST_ERROR, "XIVE: already found a "
+                              "thread context NVT %x/%x\n",
+                              nvt_blk, nvt_idx);
+                return -1;
+            }
+
+            match->ring = ring;
+            match->tctx = tctx;
+            count++;
+        }
+    }
+
+    return count;
+}
+
 static XiveTCTX *pnv_xive_get_tctx(XiveRouter *xrtr, CPUState *cs)
 {
     PowerPCCPU *cpu = POWERPC_CPU(cs);
@@ -1797,6 +1836,7 @@ static void pnv_xive_class_init(ObjectClass *klass, void *data)
     PnvXScomInterfaceClass *xdc = PNV_XSCOM_INTERFACE_CLASS(klass);
     XiveRouterClass *xrc = XIVE_ROUTER_CLASS(klass);
     XiveNotifierClass *xnc = XIVE_NOTIFIER_CLASS(klass);
+    XivePresenterClass *xpc = XIVE_PRESENTER_CLASS(klass);
 
     xdc->dt_xscom = pnv_xive_dt_xscom;
 
@@ -1812,6 +1852,7 @@ static void pnv_xive_class_init(ObjectClass *klass, void *data)
     xrc->get_tctx = pnv_xive_get_tctx;
 
     xnc->notify = pnv_xive_notify;
+    xpc->match_nvt  = pnv_xive_match_nvt;
 };
 
 static const TypeInfo pnv_xive_info = {
diff --git a/hw/intc/spapr_xive.c b/hw/intc/spapr_xive.c
index c1c97192a7d2..eefc0d4c36b9 100644
--- a/hw/intc/spapr_xive.c
+++ b/hw/intc/spapr_xive.c
@@ -422,6 +422,44 @@ static XiveTCTX *spapr_xive_get_tctx(XiveRouter *xrtr, CPUState *cs)
     return spapr_cpu_state(cpu)->tctx;
 }
 
+static int spapr_xive_match_nvt(XivePresenter *xptr, uint8_t format,
+                                uint8_t nvt_blk, uint32_t nvt_idx,
+                                bool cam_ignore, uint8_t priority,
+                                uint32_t logic_serv, XiveTCTXMatch *match)
+{
+    CPUState *cs;
+    int count = 0;
+
+    CPU_FOREACH(cs) {
+        PowerPCCPU *cpu = POWERPC_CPU(cs);
+        XiveTCTX *tctx = spapr_cpu_state(cpu)->tctx;
+        int ring;
+
+        /*
+         * Check the thread context CAM lines and record matches.
+         */
+        ring = xive_presenter_tctx_match(xptr, tctx, format, nvt_blk, nvt_idx,
+                                         cam_ignore, logic_serv);
+        /*
+         * Save the matching thread interrupt context and follow on to
+         * check for duplicates which are invalid.
+         */
+        if (ring != -1) {
+            if (match->tctx) {
+                qemu_log_mask(LOG_GUEST_ERROR, "XIVE: already found a thread "
+                              "context NVT %x/%x\n", nvt_blk, nvt_idx);
+                return -1;
+            }
+
+            match->ring = ring;
+            match->tctx = tctx;
+            count++;
+        }
+    }
+
+    return count;
+}
+
 static const VMStateDescription vmstate_spapr_xive_end = {
     .name = TYPE_SPAPR_XIVE "/end",
     .version_id = 1,
@@ -499,6 +537,7 @@ static void spapr_xive_class_init(ObjectClass *klass, void *data)
 {
     DeviceClass *dc = DEVICE_CLASS(klass);
     XiveRouterClass *xrc = XIVE_ROUTER_CLASS(klass);
+    XivePresenterClass *xpc = XIVE_PRESENTER_CLASS(klass);
 
     dc->desc    = "sPAPR XIVE Interrupt Controller";
     dc->props   = spapr_xive_properties;
@@ -511,6 +550,8 @@ static void spapr_xive_class_init(ObjectClass *klass, void *data)
     xrc->get_nvt = spapr_xive_get_nvt;
     xrc->write_nvt = spapr_xive_write_nvt;
     xrc->get_tctx = spapr_xive_get_tctx;
+
+    xpc->match_nvt  = spapr_xive_match_nvt;
 }
 
 static const TypeInfo spapr_xive_info = {
diff --git a/hw/intc/xive.c b/hw/intc/xive.c
index aa45ac2e06cb..fff50429f8ac 100644
--- a/hw/intc/xive.c
+++ b/hw/intc/xive.c
@@ -1381,43 +1381,14 @@ static bool xive_presenter_match(XiveRouter *xrtr, uint8_t format,
                                  bool cam_ignore, uint8_t priority,
                                  uint32_t logic_serv, XiveTCTXMatch *match)
 {
-    CPUState *cs;
+    XivePresenter *xptr = XIVE_PRESENTER(xrtr);
+    XivePresenterClass *xpc = XIVE_PRESENTER_GET_CLASS(xptr);
+    int count;
 
-    /*
-     * TODO (PowerNV): handle chip_id overwrite of block field for
-     * hardwired CAM compares
-     */
-
-    CPU_FOREACH(cs) {
-        XiveTCTX *tctx = xive_router_get_tctx(xrtr, cs);
-        int ring;
-
-        /*
-         * HW checks that the CPU is enabled in the Physical Thread
-         * Enable Register (PTER).
-         */
-
-        /*
-         * Check the thread context CAM lines and record matches. We
-         * will handle CPU exception delivery later
-         */
-        ring = xive_presenter_tctx_match(XIVE_PRESENTER(xrtr), tctx, format,
-                                         nvt_blk, nvt_idx,
-                                         cam_ignore, logic_serv);
-        /*
-         * Save the context and follow on to catch duplicates, that we
-         * don't support yet.
-         */
-        if (ring != -1) {
-            if (match->tctx) {
-                qemu_log_mask(LOG_GUEST_ERROR, "XIVE: already found a thread "
-                              "context NVT %x/%x\n", nvt_blk, nvt_idx);
-                return false;
-            }
-
-            match->ring = ring;
-            match->tctx = tctx;
-        }
+    count = xpc->match_nvt(xptr, format, nvt_blk, nvt_idx, cam_ignore,
+                           priority, logic_serv, match);
+    if (count < 0) {
+        return false;
     }
 
     if (!match->tctx) {
-- 
2.21.0



  parent reply	other threads:[~2019-09-18 16:50 UTC|newest]

Thread overview: 51+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-09-18 16:06 [Qemu-devel] [PATCH v4 00/25] ppc/pnv: add XIVE support for KVM guests Cédric Le Goater
2019-09-18 16:06 ` [Qemu-devel] [PATCH v4 01/25] ppc/xive: Introduce a XivePresenter interface Cédric Le Goater
2019-09-18 16:06 ` Cédric Le Goater [this message]
2019-09-18 16:06 ` [Qemu-devel] [PATCH v4 03/25] ppc/pnv: Introduce a PNV_CHIP_CPU_FOREACH() helper Cédric Le Goater
2019-10-03  1:50   ` David Gibson
2019-10-03  9:42     ` Cédric Le Goater
2019-09-18 16:06 ` [Qemu-devel] [PATCH v4 04/25] ppc/pnv: Introduce a pnv_xive_is_cpu_enabled() helper Cédric Le Goater
2019-10-03  1:51   ` David Gibson
2019-09-18 16:06 ` [Qemu-devel] [PATCH v4 05/25] ppc/xive: Introduce a XiveFabric interface Cédric Le Goater
2019-10-03  1:54   ` David Gibson
2019-10-03  9:46     ` Cédric Le Goater
2019-09-18 16:06 ` [Qemu-devel] [PATCH v4 06/25] ppc/pnv: Implement the " Cédric Le Goater
2019-10-03  1:55   ` David Gibson
2019-10-03  9:47     ` Cédric Le Goater
2019-10-04  9:05   ` Greg Kurz
2019-09-18 16:06 ` [Qemu-devel] [PATCH v4 07/25] ppc/spapr: " Cédric Le Goater
2019-10-03  1:58   ` David Gibson
2019-10-03  9:50     ` Cédric Le Goater
2019-09-18 16:06 ` [Qemu-devel] [PATCH v4 08/25] ppc/xive: Use the XiveFabric and XivePresenter interfaces Cédric Le Goater
2019-09-18 16:06 ` [Qemu-devel] [PATCH v4 09/25] ppc/xive: Extend the TIMA operation with a XivePresenter parameter Cédric Le Goater
2019-09-18 16:06 ` [Qemu-devel] [PATCH v4 10/25] ppc/pnv: Clarify how the TIMA is accessed on a multichip system Cédric Le Goater
2019-09-18 16:06 ` [Qemu-devel] [PATCH v4 11/25] ppc/xive: Move the TIMA operations to the controller model Cédric Le Goater
2019-10-03  2:08   ` David Gibson
2019-10-03 10:57     ` Cédric Le Goater
2019-09-18 16:06 ` [Qemu-devel] [PATCH v4 12/25] ppc/xive: Remove the get_tctx() XiveRouter handler Cédric Le Goater
2019-09-18 16:06 ` [Qemu-devel] [PATCH v4 13/25] ppc/xive: Introduce a xive_tctx_ipb_update() helper Cédric Le Goater
2019-10-03  2:11   ` David Gibson
2019-10-03  9:30     ` Cédric Le Goater
2019-09-18 16:06 ` [Qemu-devel] [PATCH v4 14/25] ppc/xive: Introduce helpers for the NVT id Cédric Le Goater
2019-10-03  2:12   ` David Gibson
2019-10-03  9:23     ` Cédric Le Goater
2019-09-18 16:06 ` [Qemu-devel] [PATCH v4 15/25] ppc/xive: Synthesize interrupt from the saved IPB in the NVT Cédric Le Goater
2019-09-18 16:06 ` [Qemu-devel] [PATCH v4 16/25] ppc/pnv: Remove pnv_xive_vst_size() routine Cédric Le Goater
2019-10-03  2:20   ` David Gibson
2019-10-03  9:12     ` Cédric Le Goater
2019-09-18 16:06 ` [Qemu-devel] [PATCH v4 17/25] ppc/pnv: Dump the XIVE NVT table Cédric Le Goater
2019-09-18 16:06 ` [Qemu-devel] [PATCH v4 18/25] ppc/pnv: Skip empty slots of " Cédric Le Goater
2019-10-03  2:22   ` David Gibson
2019-10-03  8:46     ` Cédric Le Goater
2019-09-18 16:06 ` [Qemu-devel] [PATCH v4 19/25] ppc/pnv: Introduce a pnv_xive_block_id() helper Cédric Le Goater
2019-10-03  2:25   ` David Gibson
2019-09-18 16:06 ` [Qemu-devel] [PATCH v4 20/25] ppc/pnv: Extend XiveRouter with a get_block_id() handler Cédric Le Goater
2019-09-18 16:06 ` [Qemu-devel] [PATCH v4 21/25] ppc/pnv: Quiesce some XIVE errors Cédric Le Goater
2019-09-18 16:06 ` [Qemu-devel] [PATCH v4 22/25] ppc/xive: Introduce a xive_os_cam_decode() helper Cédric Le Goater
2019-10-03  2:34   ` David Gibson
2019-10-03  8:39     ` Cédric Le Goater
2019-09-18 16:06 ` [Qemu-devel] [PATCH v4 23/25] ppc/xive: Check V bit in TM_PULL_POOL_CTX Cédric Le Goater
2019-09-18 16:06 ` [Qemu-devel] [PATCH v4 24/25] ppc/pnv: Improve trigger data definition Cédric Le Goater
2019-10-03  2:41   ` David Gibson
2019-10-03  8:30     ` Cédric Le Goater
2019-09-18 16:06 ` [Qemu-devel] [PATCH v4 25/25] ppc/pnv: Use the EAS trigger bit when triggering an interrupt from PSI Cédric Le Goater

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