* [PATCH v2 0/2] crypto: sun4i-ss: Enable power management @ 2019-09-19 5:10 ` Corentin Labbe 0 siblings, 0 replies; 10+ messages in thread From: Corentin Labbe @ 2019-09-19 5:10 UTC (permalink / raw) To: davem, herbert, mripard, wens Cc: linux-arm-kernel, linux-crypto, linux-kernel, linux-sunxi, Corentin Labbe Hello This serie enables power management in the sun4i-ss driver. Regards Changes since v1: - Fixed style in patch #1 - Check more return code of PM functions - Add PM support in hash/prng - reworked the probe order of PM functions and the PM strategy Corentin Labbe (2): crypto: sun4i-ss: simplify enable/disable of the device crypto: sun4i-ss: enable pm_runtime drivers/crypto/sunxi-ss/sun4i-ss-cipher.c | 9 ++ drivers/crypto/sunxi-ss/sun4i-ss-core.c | 157 ++++++++++++++++------ drivers/crypto/sunxi-ss/sun4i-ss-hash.c | 12 ++ drivers/crypto/sunxi-ss/sun4i-ss-prng.c | 9 +- drivers/crypto/sunxi-ss/sun4i-ss.h | 2 + 5 files changed, 149 insertions(+), 40 deletions(-) -- 2.21.0 ^ permalink raw reply [flat|nested] 10+ messages in thread
* [PATCH v2 0/2] crypto: sun4i-ss: Enable power management @ 2019-09-19 5:10 ` Corentin Labbe 0 siblings, 0 replies; 10+ messages in thread From: Corentin Labbe @ 2019-09-19 5:10 UTC (permalink / raw) To: davem, herbert, mripard, wens Cc: linux-sunxi, Corentin Labbe, linux-crypto, linux-arm-kernel, linux-kernel Hello This serie enables power management in the sun4i-ss driver. Regards Changes since v1: - Fixed style in patch #1 - Check more return code of PM functions - Add PM support in hash/prng - reworked the probe order of PM functions and the PM strategy Corentin Labbe (2): crypto: sun4i-ss: simplify enable/disable of the device crypto: sun4i-ss: enable pm_runtime drivers/crypto/sunxi-ss/sun4i-ss-cipher.c | 9 ++ drivers/crypto/sunxi-ss/sun4i-ss-core.c | 157 ++++++++++++++++------ drivers/crypto/sunxi-ss/sun4i-ss-hash.c | 12 ++ drivers/crypto/sunxi-ss/sun4i-ss-prng.c | 9 +- drivers/crypto/sunxi-ss/sun4i-ss.h | 2 + 5 files changed, 149 insertions(+), 40 deletions(-) -- 2.21.0 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel ^ permalink raw reply [flat|nested] 10+ messages in thread
* [PATCH v2 1/2] crypto: sun4i-ss: simplify enable/disable of the device 2019-09-19 5:10 ` Corentin Labbe @ 2019-09-19 5:10 ` Corentin Labbe -1 siblings, 0 replies; 10+ messages in thread From: Corentin Labbe @ 2019-09-19 5:10 UTC (permalink / raw) To: davem, herbert, mripard, wens Cc: linux-arm-kernel, linux-crypto, linux-kernel, linux-sunxi, Corentin Labbe This patch regroups resource enabling/disabling in dedicated function. This simplify error handling and will permit to support power management. Signed-off-by: Corentin Labbe <clabbe.montjoie@gmail.com> Acked-by: Maxime Ripard <mripard@kernel.org> --- drivers/crypto/sunxi-ss/sun4i-ss-core.c | 77 +++++++++++++++---------- 1 file changed, 46 insertions(+), 31 deletions(-) diff --git a/drivers/crypto/sunxi-ss/sun4i-ss-core.c b/drivers/crypto/sunxi-ss/sun4i-ss-core.c index 9aa6fe081a27..6c2db5d83b06 100644 --- a/drivers/crypto/sunxi-ss/sun4i-ss-core.c +++ b/drivers/crypto/sunxi-ss/sun4i-ss-core.c @@ -223,6 +223,45 @@ static struct sun4i_ss_alg_template ss_algs[] = { #endif }; +static void sun4i_ss_disable(struct sun4i_ss_ctx *ss) +{ + if (ss->reset) + reset_control_assert(ss->reset); + + clk_disable_unprepare(ss->ssclk); + clk_disable_unprepare(ss->busclk); +} + +static int sun4i_ss_enable(struct sun4i_ss_ctx *ss) +{ + int err; + + err = clk_prepare_enable(ss->busclk); + if (err) { + dev_err(ss->dev, "Cannot prepare_enable busclk\n"); + goto err_enable; + } + + err = clk_prepare_enable(ss->ssclk); + if (err) { + dev_err(ss->dev, "Cannot prepare_enable ssclk\n"); + goto err_enable; + } + + if (ss->reset) { + err = reset_control_deassert(ss->reset); + if (err) { + dev_err(ss->dev, "Cannot deassert reset control\n"); + goto err_enable; + } + } + + return err; +err_enable: + sun4i_ss_disable(ss); + return err; +} + static int sun4i_ss_probe(struct platform_device *pdev) { u32 v; @@ -269,17 +308,9 @@ static int sun4i_ss_probe(struct platform_device *pdev) ss->reset = NULL; } - /* Enable both clocks */ - err = clk_prepare_enable(ss->busclk); - if (err) { - dev_err(&pdev->dev, "Cannot prepare_enable busclk\n"); - return err; - } - err = clk_prepare_enable(ss->ssclk); - if (err) { - dev_err(&pdev->dev, "Cannot prepare_enable ssclk\n"); - goto error_ssclk; - } + err = sun4i_ss_enable(ss); + if (err) + goto error_enable; /* * Check that clock have the correct rates given in the datasheet @@ -288,16 +319,7 @@ static int sun4i_ss_probe(struct platform_device *pdev) err = clk_set_rate(ss->ssclk, cr_mod); if (err) { dev_err(&pdev->dev, "Cannot set clock rate to ssclk\n"); - goto error_clk; - } - - /* Deassert reset if we have a reset control */ - if (ss->reset) { - err = reset_control_deassert(ss->reset); - if (err) { - dev_err(&pdev->dev, "Cannot deassert reset control\n"); - goto error_clk; - } + goto error_enable; } /* @@ -387,12 +409,8 @@ static int sun4i_ss_probe(struct platform_device *pdev) break; } } - if (ss->reset) - reset_control_assert(ss->reset); -error_clk: - clk_disable_unprepare(ss->ssclk); -error_ssclk: - clk_disable_unprepare(ss->busclk); +error_enable: + sun4i_ss_disable(ss); return err; } @@ -416,10 +434,7 @@ static int sun4i_ss_remove(struct platform_device *pdev) } writel(0, ss->base + SS_CTL); - if (ss->reset) - reset_control_assert(ss->reset); - clk_disable_unprepare(ss->busclk); - clk_disable_unprepare(ss->ssclk); + sun4i_ss_disable(ss); return 0; } -- 2.21.0 ^ permalink raw reply related [flat|nested] 10+ messages in thread
* [PATCH v2 1/2] crypto: sun4i-ss: simplify enable/disable of the device @ 2019-09-19 5:10 ` Corentin Labbe 0 siblings, 0 replies; 10+ messages in thread From: Corentin Labbe @ 2019-09-19 5:10 UTC (permalink / raw) To: davem, herbert, mripard, wens Cc: linux-sunxi, Corentin Labbe, linux-crypto, linux-arm-kernel, linux-kernel This patch regroups resource enabling/disabling in dedicated function. This simplify error handling and will permit to support power management. Signed-off-by: Corentin Labbe <clabbe.montjoie@gmail.com> Acked-by: Maxime Ripard <mripard@kernel.org> --- drivers/crypto/sunxi-ss/sun4i-ss-core.c | 77 +++++++++++++++---------- 1 file changed, 46 insertions(+), 31 deletions(-) diff --git a/drivers/crypto/sunxi-ss/sun4i-ss-core.c b/drivers/crypto/sunxi-ss/sun4i-ss-core.c index 9aa6fe081a27..6c2db5d83b06 100644 --- a/drivers/crypto/sunxi-ss/sun4i-ss-core.c +++ b/drivers/crypto/sunxi-ss/sun4i-ss-core.c @@ -223,6 +223,45 @@ static struct sun4i_ss_alg_template ss_algs[] = { #endif }; +static void sun4i_ss_disable(struct sun4i_ss_ctx *ss) +{ + if (ss->reset) + reset_control_assert(ss->reset); + + clk_disable_unprepare(ss->ssclk); + clk_disable_unprepare(ss->busclk); +} + +static int sun4i_ss_enable(struct sun4i_ss_ctx *ss) +{ + int err; + + err = clk_prepare_enable(ss->busclk); + if (err) { + dev_err(ss->dev, "Cannot prepare_enable busclk\n"); + goto err_enable; + } + + err = clk_prepare_enable(ss->ssclk); + if (err) { + dev_err(ss->dev, "Cannot prepare_enable ssclk\n"); + goto err_enable; + } + + if (ss->reset) { + err = reset_control_deassert(ss->reset); + if (err) { + dev_err(ss->dev, "Cannot deassert reset control\n"); + goto err_enable; + } + } + + return err; +err_enable: + sun4i_ss_disable(ss); + return err; +} + static int sun4i_ss_probe(struct platform_device *pdev) { u32 v; @@ -269,17 +308,9 @@ static int sun4i_ss_probe(struct platform_device *pdev) ss->reset = NULL; } - /* Enable both clocks */ - err = clk_prepare_enable(ss->busclk); - if (err) { - dev_err(&pdev->dev, "Cannot prepare_enable busclk\n"); - return err; - } - err = clk_prepare_enable(ss->ssclk); - if (err) { - dev_err(&pdev->dev, "Cannot prepare_enable ssclk\n"); - goto error_ssclk; - } + err = sun4i_ss_enable(ss); + if (err) + goto error_enable; /* * Check that clock have the correct rates given in the datasheet @@ -288,16 +319,7 @@ static int sun4i_ss_probe(struct platform_device *pdev) err = clk_set_rate(ss->ssclk, cr_mod); if (err) { dev_err(&pdev->dev, "Cannot set clock rate to ssclk\n"); - goto error_clk; - } - - /* Deassert reset if we have a reset control */ - if (ss->reset) { - err = reset_control_deassert(ss->reset); - if (err) { - dev_err(&pdev->dev, "Cannot deassert reset control\n"); - goto error_clk; - } + goto error_enable; } /* @@ -387,12 +409,8 @@ static int sun4i_ss_probe(struct platform_device *pdev) break; } } - if (ss->reset) - reset_control_assert(ss->reset); -error_clk: - clk_disable_unprepare(ss->ssclk); -error_ssclk: - clk_disable_unprepare(ss->busclk); +error_enable: + sun4i_ss_disable(ss); return err; } @@ -416,10 +434,7 @@ static int sun4i_ss_remove(struct platform_device *pdev) } writel(0, ss->base + SS_CTL); - if (ss->reset) - reset_control_assert(ss->reset); - clk_disable_unprepare(ss->busclk); - clk_disable_unprepare(ss->ssclk); + sun4i_ss_disable(ss); return 0; } -- 2.21.0 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel ^ permalink raw reply related [flat|nested] 10+ messages in thread
* [PATCH v2 2/2] crypto: sun4i-ss: enable pm_runtime 2019-09-19 5:10 ` Corentin Labbe @ 2019-09-19 5:10 ` Corentin Labbe -1 siblings, 0 replies; 10+ messages in thread From: Corentin Labbe @ 2019-09-19 5:10 UTC (permalink / raw) To: davem, herbert, mripard, wens Cc: linux-arm-kernel, linux-crypto, linux-kernel, linux-sunxi, Corentin Labbe This patch enables power management on the Security System. Signed-off-by: Corentin Labbe <clabbe.montjoie@gmail.com> --- drivers/crypto/sunxi-ss/sun4i-ss-cipher.c | 9 +++ drivers/crypto/sunxi-ss/sun4i-ss-core.c | 94 +++++++++++++++++++---- drivers/crypto/sunxi-ss/sun4i-ss-hash.c | 12 +++ drivers/crypto/sunxi-ss/sun4i-ss-prng.c | 9 ++- drivers/crypto/sunxi-ss/sun4i-ss.h | 2 + 5 files changed, 110 insertions(+), 16 deletions(-) diff --git a/drivers/crypto/sunxi-ss/sun4i-ss-cipher.c b/drivers/crypto/sunxi-ss/sun4i-ss-cipher.c index fa4b1b47822e..c9799cbe0530 100644 --- a/drivers/crypto/sunxi-ss/sun4i-ss-cipher.c +++ b/drivers/crypto/sunxi-ss/sun4i-ss-cipher.c @@ -480,6 +480,7 @@ int sun4i_ss_cipher_init(struct crypto_tfm *tfm) struct sun4i_tfm_ctx *op = crypto_tfm_ctx(tfm); struct sun4i_ss_alg_template *algt; const char *name = crypto_tfm_alg_name(tfm); + int err; memset(op, 0, sizeof(struct sun4i_tfm_ctx)); @@ -497,13 +498,21 @@ int sun4i_ss_cipher_init(struct crypto_tfm *tfm) return PTR_ERR(op->fallback_tfm); } + err = pm_runtime_get_sync(op->ss->dev); + if (err < 0) + goto error_pm; return 0; +error_pm: + crypto_free_sync_skcipher(op->fallback_tfm); + return err; } void sun4i_ss_cipher_exit(struct crypto_tfm *tfm) { struct sun4i_tfm_ctx *op = crypto_tfm_ctx(tfm); + crypto_free_sync_skcipher(op->fallback_tfm); + pm_runtime_put(op->ss->dev); } /* check and set the AES key, prepare the mode to be used */ diff --git a/drivers/crypto/sunxi-ss/sun4i-ss-core.c b/drivers/crypto/sunxi-ss/sun4i-ss-core.c index 6c2db5d83b06..311c2653a9c3 100644 --- a/drivers/crypto/sunxi-ss/sun4i-ss-core.c +++ b/drivers/crypto/sunxi-ss/sun4i-ss-core.c @@ -44,7 +44,8 @@ static struct sun4i_ss_alg_template ss_algs[] = { .cra_blocksize = MD5_HMAC_BLOCK_SIZE, .cra_ctxsize = sizeof(struct sun4i_req_ctx), .cra_module = THIS_MODULE, - .cra_init = sun4i_hash_crainit + .cra_init = sun4i_hash_crainit, + .cra_exit = sun4i_hash_craexit } } } @@ -70,7 +71,8 @@ static struct sun4i_ss_alg_template ss_algs[] = { .cra_blocksize = SHA1_BLOCK_SIZE, .cra_ctxsize = sizeof(struct sun4i_req_ctx), .cra_module = THIS_MODULE, - .cra_init = sun4i_hash_crainit + .cra_init = sun4i_hash_crainit, + .cra_exit = sun4i_hash_craexit } } } @@ -262,6 +264,61 @@ static int sun4i_ss_enable(struct sun4i_ss_ctx *ss) return err; } +/* + * Power management strategy: The device is suspended unless a TFM exists for + * one of the algorithms proposed by this driver. + */ +#if defined(CONFIG_PM) +static int sun4i_ss_pm_suspend(struct device *dev) +{ + struct sun4i_ss_ctx *ss = dev_get_drvdata(dev); + + sun4i_ss_disable(ss); + return 0; +} + +static int sun4i_ss_pm_resume(struct device *dev) +{ + struct sun4i_ss_ctx *ss = dev_get_drvdata(dev); + + return sun4i_ss_enable(ss); +} +#endif + +const struct dev_pm_ops sun4i_ss_pm_ops = { + SET_RUNTIME_PM_OPS(sun4i_ss_pm_suspend, sun4i_ss_pm_resume, NULL) +}; + +/* + * When power management is enabled, this function enables the PM and set the + * device as suspended + * When power management is disabled, this function just enables the device + */ +static int sun4i_ss_pm_init(struct sun4i_ss_ctx *ss) +{ + int err; + + pm_runtime_use_autosuspend(ss->dev); + pm_runtime_set_autosuspend_delay(ss->dev, 2000); + + err = pm_runtime_set_suspended(ss->dev); + if (err) + return err; + pm_runtime_enable(ss->dev); +#if !defined(CONFIG_PM) + err = sun4i_ss_enable(ss); +#endif + return err; +} + +static void sun4i_ss_pm_exit(struct sun4i_ss_ctx *ss) +{ + pm_runtime_disable(ss->dev); +#if !defined(CONFIG_PM) + sun4i_ss_disable(ss); +#endif +} + static int sun4i_ss_probe(struct platform_device *pdev) { u32 v; @@ -308,10 +365,6 @@ static int sun4i_ss_probe(struct platform_device *pdev) ss->reset = NULL; } - err = sun4i_ss_enable(ss); - if (err) - goto error_enable; - /* * Check that clock have the correct rates given in the datasheet * Try to set the clock to the maximum allowed @@ -319,7 +372,7 @@ static int sun4i_ss_probe(struct platform_device *pdev) err = clk_set_rate(ss->ssclk, cr_mod); if (err) { dev_err(&pdev->dev, "Cannot set clock rate to ssclk\n"); - goto error_enable; + return err; } /* @@ -347,12 +400,26 @@ static int sun4i_ss_probe(struct platform_device *pdev) dev_warn(&pdev->dev, "Clock ss is at %lu (%lu MHz) (must be <= %lu)\n", cr, cr / 1000000, cr_mod); + ss->dev = &pdev->dev; + platform_set_drvdata(pdev, ss); + + spin_lock_init(&ss->slock); + + err = sun4i_ss_pm_init(ss); + if (err) + return err; + /* * Datasheet named it "Die Bonding ID" * I expect to be a sort of Security System Revision number. * Since the A80 seems to have an other version of SS * this info could be useful */ + + err = pm_runtime_get_sync(ss->dev); + if (err < 0) + goto error_pm; + writel(SS_ENABLED, ss->base + SS_CTL); v = readl(ss->base + SS_CTL); v >>= 16; @@ -360,9 +427,7 @@ static int sun4i_ss_probe(struct platform_device *pdev) dev_info(&pdev->dev, "Die ID %d\n", v); writel(0, ss->base + SS_CTL); - ss->dev = &pdev->dev; - - spin_lock_init(&ss->slock); + pm_runtime_put_sync(ss->dev); for (i = 0; i < ARRAY_SIZE(ss_algs); i++) { ss_algs[i].ss = ss; @@ -392,7 +457,6 @@ static int sun4i_ss_probe(struct platform_device *pdev) break; } } - platform_set_drvdata(pdev, ss); return 0; error_alg: i--; @@ -409,8 +473,8 @@ static int sun4i_ss_probe(struct platform_device *pdev) break; } } -error_enable: - sun4i_ss_disable(ss); +error_pm: + sun4i_ss_pm_exit(ss); return err; } @@ -433,8 +497,7 @@ static int sun4i_ss_remove(struct platform_device *pdev) } } - writel(0, ss->base + SS_CTL); - sun4i_ss_disable(ss); + sun4i_ss_pm_exit(ss); return 0; } @@ -449,6 +512,7 @@ static struct platform_driver sun4i_ss_driver = { .remove = sun4i_ss_remove, .driver = { .name = "sun4i-ss", + .pm = &sun4i_ss_pm_ops, .of_match_table = a20ss_crypto_of_match_table, }, }; diff --git a/drivers/crypto/sunxi-ss/sun4i-ss-hash.c b/drivers/crypto/sunxi-ss/sun4i-ss-hash.c index fcffba5ef927..9930c9ce8971 100644 --- a/drivers/crypto/sunxi-ss/sun4i-ss-hash.c +++ b/drivers/crypto/sunxi-ss/sun4i-ss-hash.c @@ -19,17 +19,29 @@ int sun4i_hash_crainit(struct crypto_tfm *tfm) struct sun4i_tfm_ctx *op = crypto_tfm_ctx(tfm); struct ahash_alg *alg = __crypto_ahash_alg(tfm->__crt_alg); struct sun4i_ss_alg_template *algt; + int err; memset(op, 0, sizeof(struct sun4i_tfm_ctx)); algt = container_of(alg, struct sun4i_ss_alg_template, alg.hash); op->ss = algt->ss; + err = pm_runtime_get_sync(op->ss->dev); + if (err < 0) + return err; + crypto_ahash_set_reqsize(__crypto_ahash_cast(tfm), sizeof(struct sun4i_req_ctx)); return 0; } +void sun4i_hash_craexit(struct crypto_tfm *tfm) +{ + struct sun4i_tfm_ctx *op = crypto_tfm_ctx(tfm); + + pm_runtime_put(op->ss->dev); +} + /* sun4i_hash_init: initialize request context */ int sun4i_hash_init(struct ahash_request *areq) { diff --git a/drivers/crypto/sunxi-ss/sun4i-ss-prng.c b/drivers/crypto/sunxi-ss/sun4i-ss-prng.c index 63d636424161..729aafdbea84 100644 --- a/drivers/crypto/sunxi-ss/sun4i-ss-prng.c +++ b/drivers/crypto/sunxi-ss/sun4i-ss-prng.c @@ -17,7 +17,7 @@ int sun4i_ss_prng_generate(struct crypto_rng *tfm, const u8 *src, { struct sun4i_ss_alg_template *algt; struct rng_alg *alg = crypto_rng_alg(tfm); - int i; + int i, err; u32 v; u32 *data = (u32 *)dst; const u32 mode = SS_OP_PRNG | SS_PRNG_CONTINUE | SS_ENABLED; @@ -28,6 +28,10 @@ int sun4i_ss_prng_generate(struct crypto_rng *tfm, const u8 *src, algt = container_of(alg, struct sun4i_ss_alg_template, alg.rng); ss = algt->ss; + err = pm_runtime_get_sync(ss->dev); + if (err < 0) + return err; + spin_lock_bh(&ss->slock); writel(mode, ss->base + SS_CTL); @@ -52,5 +56,8 @@ int sun4i_ss_prng_generate(struct crypto_rng *tfm, const u8 *src, writel(0, ss->base + SS_CTL); spin_unlock_bh(&ss->slock); + + pm_runtime_put(ss->dev); + return 0; } diff --git a/drivers/crypto/sunxi-ss/sun4i-ss.h b/drivers/crypto/sunxi-ss/sun4i-ss.h index 35a27a7145f8..60425ac75d90 100644 --- a/drivers/crypto/sunxi-ss/sun4i-ss.h +++ b/drivers/crypto/sunxi-ss/sun4i-ss.h @@ -22,6 +22,7 @@ #include <linux/scatterlist.h> #include <linux/interrupt.h> #include <linux/delay.h> +#include <linux/pm_runtime.h> #include <crypto/md5.h> #include <crypto/skcipher.h> #include <crypto/sha.h> @@ -177,6 +178,7 @@ struct sun4i_req_ctx { }; int sun4i_hash_crainit(struct crypto_tfm *tfm); +void sun4i_hash_craexit(struct crypto_tfm *tfm); int sun4i_hash_init(struct ahash_request *areq); int sun4i_hash_update(struct ahash_request *areq); int sun4i_hash_final(struct ahash_request *areq); -- 2.21.0 ^ permalink raw reply related [flat|nested] 10+ messages in thread
* [PATCH v2 2/2] crypto: sun4i-ss: enable pm_runtime @ 2019-09-19 5:10 ` Corentin Labbe 0 siblings, 0 replies; 10+ messages in thread From: Corentin Labbe @ 2019-09-19 5:10 UTC (permalink / raw) To: davem, herbert, mripard, wens Cc: linux-sunxi, Corentin Labbe, linux-crypto, linux-arm-kernel, linux-kernel This patch enables power management on the Security System. Signed-off-by: Corentin Labbe <clabbe.montjoie@gmail.com> --- drivers/crypto/sunxi-ss/sun4i-ss-cipher.c | 9 +++ drivers/crypto/sunxi-ss/sun4i-ss-core.c | 94 +++++++++++++++++++---- drivers/crypto/sunxi-ss/sun4i-ss-hash.c | 12 +++ drivers/crypto/sunxi-ss/sun4i-ss-prng.c | 9 ++- drivers/crypto/sunxi-ss/sun4i-ss.h | 2 + 5 files changed, 110 insertions(+), 16 deletions(-) diff --git a/drivers/crypto/sunxi-ss/sun4i-ss-cipher.c b/drivers/crypto/sunxi-ss/sun4i-ss-cipher.c index fa4b1b47822e..c9799cbe0530 100644 --- a/drivers/crypto/sunxi-ss/sun4i-ss-cipher.c +++ b/drivers/crypto/sunxi-ss/sun4i-ss-cipher.c @@ -480,6 +480,7 @@ int sun4i_ss_cipher_init(struct crypto_tfm *tfm) struct sun4i_tfm_ctx *op = crypto_tfm_ctx(tfm); struct sun4i_ss_alg_template *algt; const char *name = crypto_tfm_alg_name(tfm); + int err; memset(op, 0, sizeof(struct sun4i_tfm_ctx)); @@ -497,13 +498,21 @@ int sun4i_ss_cipher_init(struct crypto_tfm *tfm) return PTR_ERR(op->fallback_tfm); } + err = pm_runtime_get_sync(op->ss->dev); + if (err < 0) + goto error_pm; return 0; +error_pm: + crypto_free_sync_skcipher(op->fallback_tfm); + return err; } void sun4i_ss_cipher_exit(struct crypto_tfm *tfm) { struct sun4i_tfm_ctx *op = crypto_tfm_ctx(tfm); + crypto_free_sync_skcipher(op->fallback_tfm); + pm_runtime_put(op->ss->dev); } /* check and set the AES key, prepare the mode to be used */ diff --git a/drivers/crypto/sunxi-ss/sun4i-ss-core.c b/drivers/crypto/sunxi-ss/sun4i-ss-core.c index 6c2db5d83b06..311c2653a9c3 100644 --- a/drivers/crypto/sunxi-ss/sun4i-ss-core.c +++ b/drivers/crypto/sunxi-ss/sun4i-ss-core.c @@ -44,7 +44,8 @@ static struct sun4i_ss_alg_template ss_algs[] = { .cra_blocksize = MD5_HMAC_BLOCK_SIZE, .cra_ctxsize = sizeof(struct sun4i_req_ctx), .cra_module = THIS_MODULE, - .cra_init = sun4i_hash_crainit + .cra_init = sun4i_hash_crainit, + .cra_exit = sun4i_hash_craexit } } } @@ -70,7 +71,8 @@ static struct sun4i_ss_alg_template ss_algs[] = { .cra_blocksize = SHA1_BLOCK_SIZE, .cra_ctxsize = sizeof(struct sun4i_req_ctx), .cra_module = THIS_MODULE, - .cra_init = sun4i_hash_crainit + .cra_init = sun4i_hash_crainit, + .cra_exit = sun4i_hash_craexit } } } @@ -262,6 +264,61 @@ static int sun4i_ss_enable(struct sun4i_ss_ctx *ss) return err; } +/* + * Power management strategy: The device is suspended unless a TFM exists for + * one of the algorithms proposed by this driver. + */ +#if defined(CONFIG_PM) +static int sun4i_ss_pm_suspend(struct device *dev) +{ + struct sun4i_ss_ctx *ss = dev_get_drvdata(dev); + + sun4i_ss_disable(ss); + return 0; +} + +static int sun4i_ss_pm_resume(struct device *dev) +{ + struct sun4i_ss_ctx *ss = dev_get_drvdata(dev); + + return sun4i_ss_enable(ss); +} +#endif + +const struct dev_pm_ops sun4i_ss_pm_ops = { + SET_RUNTIME_PM_OPS(sun4i_ss_pm_suspend, sun4i_ss_pm_resume, NULL) +}; + +/* + * When power management is enabled, this function enables the PM and set the + * device as suspended + * When power management is disabled, this function just enables the device + */ +static int sun4i_ss_pm_init(struct sun4i_ss_ctx *ss) +{ + int err; + + pm_runtime_use_autosuspend(ss->dev); + pm_runtime_set_autosuspend_delay(ss->dev, 2000); + + err = pm_runtime_set_suspended(ss->dev); + if (err) + return err; + pm_runtime_enable(ss->dev); +#if !defined(CONFIG_PM) + err = sun4i_ss_enable(ss); +#endif + return err; +} + +static void sun4i_ss_pm_exit(struct sun4i_ss_ctx *ss) +{ + pm_runtime_disable(ss->dev); +#if !defined(CONFIG_PM) + sun4i_ss_disable(ss); +#endif +} + static int sun4i_ss_probe(struct platform_device *pdev) { u32 v; @@ -308,10 +365,6 @@ static int sun4i_ss_probe(struct platform_device *pdev) ss->reset = NULL; } - err = sun4i_ss_enable(ss); - if (err) - goto error_enable; - /* * Check that clock have the correct rates given in the datasheet * Try to set the clock to the maximum allowed @@ -319,7 +372,7 @@ static int sun4i_ss_probe(struct platform_device *pdev) err = clk_set_rate(ss->ssclk, cr_mod); if (err) { dev_err(&pdev->dev, "Cannot set clock rate to ssclk\n"); - goto error_enable; + return err; } /* @@ -347,12 +400,26 @@ static int sun4i_ss_probe(struct platform_device *pdev) dev_warn(&pdev->dev, "Clock ss is at %lu (%lu MHz) (must be <= %lu)\n", cr, cr / 1000000, cr_mod); + ss->dev = &pdev->dev; + platform_set_drvdata(pdev, ss); + + spin_lock_init(&ss->slock); + + err = sun4i_ss_pm_init(ss); + if (err) + return err; + /* * Datasheet named it "Die Bonding ID" * I expect to be a sort of Security System Revision number. * Since the A80 seems to have an other version of SS * this info could be useful */ + + err = pm_runtime_get_sync(ss->dev); + if (err < 0) + goto error_pm; + writel(SS_ENABLED, ss->base + SS_CTL); v = readl(ss->base + SS_CTL); v >>= 16; @@ -360,9 +427,7 @@ static int sun4i_ss_probe(struct platform_device *pdev) dev_info(&pdev->dev, "Die ID %d\n", v); writel(0, ss->base + SS_CTL); - ss->dev = &pdev->dev; - - spin_lock_init(&ss->slock); + pm_runtime_put_sync(ss->dev); for (i = 0; i < ARRAY_SIZE(ss_algs); i++) { ss_algs[i].ss = ss; @@ -392,7 +457,6 @@ static int sun4i_ss_probe(struct platform_device *pdev) break; } } - platform_set_drvdata(pdev, ss); return 0; error_alg: i--; @@ -409,8 +473,8 @@ static int sun4i_ss_probe(struct platform_device *pdev) break; } } -error_enable: - sun4i_ss_disable(ss); +error_pm: + sun4i_ss_pm_exit(ss); return err; } @@ -433,8 +497,7 @@ static int sun4i_ss_remove(struct platform_device *pdev) } } - writel(0, ss->base + SS_CTL); - sun4i_ss_disable(ss); + sun4i_ss_pm_exit(ss); return 0; } @@ -449,6 +512,7 @@ static struct platform_driver sun4i_ss_driver = { .remove = sun4i_ss_remove, .driver = { .name = "sun4i-ss", + .pm = &sun4i_ss_pm_ops, .of_match_table = a20ss_crypto_of_match_table, }, }; diff --git a/drivers/crypto/sunxi-ss/sun4i-ss-hash.c b/drivers/crypto/sunxi-ss/sun4i-ss-hash.c index fcffba5ef927..9930c9ce8971 100644 --- a/drivers/crypto/sunxi-ss/sun4i-ss-hash.c +++ b/drivers/crypto/sunxi-ss/sun4i-ss-hash.c @@ -19,17 +19,29 @@ int sun4i_hash_crainit(struct crypto_tfm *tfm) struct sun4i_tfm_ctx *op = crypto_tfm_ctx(tfm); struct ahash_alg *alg = __crypto_ahash_alg(tfm->__crt_alg); struct sun4i_ss_alg_template *algt; + int err; memset(op, 0, sizeof(struct sun4i_tfm_ctx)); algt = container_of(alg, struct sun4i_ss_alg_template, alg.hash); op->ss = algt->ss; + err = pm_runtime_get_sync(op->ss->dev); + if (err < 0) + return err; + crypto_ahash_set_reqsize(__crypto_ahash_cast(tfm), sizeof(struct sun4i_req_ctx)); return 0; } +void sun4i_hash_craexit(struct crypto_tfm *tfm) +{ + struct sun4i_tfm_ctx *op = crypto_tfm_ctx(tfm); + + pm_runtime_put(op->ss->dev); +} + /* sun4i_hash_init: initialize request context */ int sun4i_hash_init(struct ahash_request *areq) { diff --git a/drivers/crypto/sunxi-ss/sun4i-ss-prng.c b/drivers/crypto/sunxi-ss/sun4i-ss-prng.c index 63d636424161..729aafdbea84 100644 --- a/drivers/crypto/sunxi-ss/sun4i-ss-prng.c +++ b/drivers/crypto/sunxi-ss/sun4i-ss-prng.c @@ -17,7 +17,7 @@ int sun4i_ss_prng_generate(struct crypto_rng *tfm, const u8 *src, { struct sun4i_ss_alg_template *algt; struct rng_alg *alg = crypto_rng_alg(tfm); - int i; + int i, err; u32 v; u32 *data = (u32 *)dst; const u32 mode = SS_OP_PRNG | SS_PRNG_CONTINUE | SS_ENABLED; @@ -28,6 +28,10 @@ int sun4i_ss_prng_generate(struct crypto_rng *tfm, const u8 *src, algt = container_of(alg, struct sun4i_ss_alg_template, alg.rng); ss = algt->ss; + err = pm_runtime_get_sync(ss->dev); + if (err < 0) + return err; + spin_lock_bh(&ss->slock); writel(mode, ss->base + SS_CTL); @@ -52,5 +56,8 @@ int sun4i_ss_prng_generate(struct crypto_rng *tfm, const u8 *src, writel(0, ss->base + SS_CTL); spin_unlock_bh(&ss->slock); + + pm_runtime_put(ss->dev); + return 0; } diff --git a/drivers/crypto/sunxi-ss/sun4i-ss.h b/drivers/crypto/sunxi-ss/sun4i-ss.h index 35a27a7145f8..60425ac75d90 100644 --- a/drivers/crypto/sunxi-ss/sun4i-ss.h +++ b/drivers/crypto/sunxi-ss/sun4i-ss.h @@ -22,6 +22,7 @@ #include <linux/scatterlist.h> #include <linux/interrupt.h> #include <linux/delay.h> +#include <linux/pm_runtime.h> #include <crypto/md5.h> #include <crypto/skcipher.h> #include <crypto/sha.h> @@ -177,6 +178,7 @@ struct sun4i_req_ctx { }; int sun4i_hash_crainit(struct crypto_tfm *tfm); +void sun4i_hash_craexit(struct crypto_tfm *tfm); int sun4i_hash_init(struct ahash_request *areq); int sun4i_hash_update(struct ahash_request *areq); int sun4i_hash_final(struct ahash_request *areq); -- 2.21.0 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel ^ permalink raw reply related [flat|nested] 10+ messages in thread
* Re: [PATCH v2 2/2] crypto: sun4i-ss: enable pm_runtime 2019-09-19 5:10 ` Corentin Labbe @ 2019-09-19 16:55 ` Maxime Ripard -1 siblings, 0 replies; 10+ messages in thread From: Maxime Ripard @ 2019-09-19 16:55 UTC (permalink / raw) To: Corentin Labbe Cc: davem, herbert, wens, linux-arm-kernel, linux-crypto, linux-kernel, linux-sunxi [-- Attachment #1: Type: text/plain, Size: 4286 bytes --] Hi, On Thu, Sep 19, 2019 at 07:10:35AM +0200, Corentin Labbe wrote: > This patch enables power management on the Security System. > > Signed-off-by: Corentin Labbe <clabbe.montjoie@gmail.com> > --- > drivers/crypto/sunxi-ss/sun4i-ss-cipher.c | 9 +++ > drivers/crypto/sunxi-ss/sun4i-ss-core.c | 94 +++++++++++++++++++---- > drivers/crypto/sunxi-ss/sun4i-ss-hash.c | 12 +++ > drivers/crypto/sunxi-ss/sun4i-ss-prng.c | 9 ++- > drivers/crypto/sunxi-ss/sun4i-ss.h | 2 + > 5 files changed, 110 insertions(+), 16 deletions(-) > > diff --git a/drivers/crypto/sunxi-ss/sun4i-ss-cipher.c b/drivers/crypto/sunxi-ss/sun4i-ss-cipher.c > index fa4b1b47822e..c9799cbe0530 100644 > --- a/drivers/crypto/sunxi-ss/sun4i-ss-cipher.c > +++ b/drivers/crypto/sunxi-ss/sun4i-ss-cipher.c > @@ -480,6 +480,7 @@ int sun4i_ss_cipher_init(struct crypto_tfm *tfm) > struct sun4i_tfm_ctx *op = crypto_tfm_ctx(tfm); > struct sun4i_ss_alg_template *algt; > const char *name = crypto_tfm_alg_name(tfm); > + int err; > > memset(op, 0, sizeof(struct sun4i_tfm_ctx)); > > @@ -497,13 +498,21 @@ int sun4i_ss_cipher_init(struct crypto_tfm *tfm) > return PTR_ERR(op->fallback_tfm); > } > > + err = pm_runtime_get_sync(op->ss->dev); > + if (err < 0) > + goto error_pm; > return 0; Newline here > +error_pm: > + crypto_free_sync_skcipher(op->fallback_tfm); > + return err; > } > > void sun4i_ss_cipher_exit(struct crypto_tfm *tfm) > { > struct sun4i_tfm_ctx *op = crypto_tfm_ctx(tfm); > + > crypto_free_sync_skcipher(op->fallback_tfm); > + pm_runtime_put(op->ss->dev); > } > > /* check and set the AES key, prepare the mode to be used */ > diff --git a/drivers/crypto/sunxi-ss/sun4i-ss-core.c b/drivers/crypto/sunxi-ss/sun4i-ss-core.c > index 6c2db5d83b06..311c2653a9c3 100644 > --- a/drivers/crypto/sunxi-ss/sun4i-ss-core.c > +++ b/drivers/crypto/sunxi-ss/sun4i-ss-core.c > @@ -44,7 +44,8 @@ static struct sun4i_ss_alg_template ss_algs[] = { > .cra_blocksize = MD5_HMAC_BLOCK_SIZE, > .cra_ctxsize = sizeof(struct sun4i_req_ctx), > .cra_module = THIS_MODULE, > - .cra_init = sun4i_hash_crainit > + .cra_init = sun4i_hash_crainit, > + .cra_exit = sun4i_hash_craexit You should add a comma at the end to prevent having to modify it again > } > } > } > @@ -70,7 +71,8 @@ static struct sun4i_ss_alg_template ss_algs[] = { > .cra_blocksize = SHA1_BLOCK_SIZE, > .cra_ctxsize = sizeof(struct sun4i_req_ctx), > .cra_module = THIS_MODULE, > - .cra_init = sun4i_hash_crainit > + .cra_init = sun4i_hash_crainit, > + .cra_exit = sun4i_hash_craexit Ditto > } > } > } > @@ -262,6 +264,61 @@ static int sun4i_ss_enable(struct sun4i_ss_ctx *ss) > return err; > } > > +/* > + * Power management strategy: The device is suspended unless a TFM exists for > + * one of the algorithms proposed by this driver. > + */ > +#if defined(CONFIG_PM) > +static int sun4i_ss_pm_suspend(struct device *dev) > +{ > + struct sun4i_ss_ctx *ss = dev_get_drvdata(dev); > + > + sun4i_ss_disable(ss); > + return 0; > +} > + > +static int sun4i_ss_pm_resume(struct device *dev) > +{ > + struct sun4i_ss_ctx *ss = dev_get_drvdata(dev); > + > + return sun4i_ss_enable(ss); > +} > +#endif > + Why not just have the suspend and resume function and the enable / disable functions merged together, you're not using them directy as far as I can see. > +const struct dev_pm_ops sun4i_ss_pm_ops = { > + SET_RUNTIME_PM_OPS(sun4i_ss_pm_suspend, sun4i_ss_pm_resume, NULL) > +}; > + > +/* > + * When power management is enabled, this function enables the PM and set the > + * device as suspended > + * When power management is disabled, this function just enables the device > + */ > +static int sun4i_ss_pm_init(struct sun4i_ss_ctx *ss) > +{ > + int err; > + > + pm_runtime_use_autosuspend(ss->dev); > + pm_runtime_set_autosuspend_delay(ss->dev, 2000); > + > + err = pm_runtime_set_suspended(ss->dev); > + if (err) > + return err; > + pm_runtime_enable(ss->dev); > +#if !defined(CONFIG_PM) > + err = sun4i_ss_enable(ss); > +#endif > + return err; > +} This looks nicer: https://elixir.bootlin.com/linux/latest/source/drivers/spi/spi-sun4i.c#L492 Or, just make it depend on CONFIG_PM, we should probably do it anyway at the ARCH level anyway. Maxime [-- Attachment #2: signature.asc --] [-- Type: application/pgp-signature, Size: 228 bytes --] ^ permalink raw reply [flat|nested] 10+ messages in thread
* Re: [PATCH v2 2/2] crypto: sun4i-ss: enable pm_runtime @ 2019-09-19 16:55 ` Maxime Ripard 0 siblings, 0 replies; 10+ messages in thread From: Maxime Ripard @ 2019-09-19 16:55 UTC (permalink / raw) To: Corentin Labbe Cc: herbert, linux-sunxi, linux-kernel, wens, linux-crypto, davem, linux-arm-kernel [-- Attachment #1.1: Type: text/plain, Size: 4286 bytes --] Hi, On Thu, Sep 19, 2019 at 07:10:35AM +0200, Corentin Labbe wrote: > This patch enables power management on the Security System. > > Signed-off-by: Corentin Labbe <clabbe.montjoie@gmail.com> > --- > drivers/crypto/sunxi-ss/sun4i-ss-cipher.c | 9 +++ > drivers/crypto/sunxi-ss/sun4i-ss-core.c | 94 +++++++++++++++++++---- > drivers/crypto/sunxi-ss/sun4i-ss-hash.c | 12 +++ > drivers/crypto/sunxi-ss/sun4i-ss-prng.c | 9 ++- > drivers/crypto/sunxi-ss/sun4i-ss.h | 2 + > 5 files changed, 110 insertions(+), 16 deletions(-) > > diff --git a/drivers/crypto/sunxi-ss/sun4i-ss-cipher.c b/drivers/crypto/sunxi-ss/sun4i-ss-cipher.c > index fa4b1b47822e..c9799cbe0530 100644 > --- a/drivers/crypto/sunxi-ss/sun4i-ss-cipher.c > +++ b/drivers/crypto/sunxi-ss/sun4i-ss-cipher.c > @@ -480,6 +480,7 @@ int sun4i_ss_cipher_init(struct crypto_tfm *tfm) > struct sun4i_tfm_ctx *op = crypto_tfm_ctx(tfm); > struct sun4i_ss_alg_template *algt; > const char *name = crypto_tfm_alg_name(tfm); > + int err; > > memset(op, 0, sizeof(struct sun4i_tfm_ctx)); > > @@ -497,13 +498,21 @@ int sun4i_ss_cipher_init(struct crypto_tfm *tfm) > return PTR_ERR(op->fallback_tfm); > } > > + err = pm_runtime_get_sync(op->ss->dev); > + if (err < 0) > + goto error_pm; > return 0; Newline here > +error_pm: > + crypto_free_sync_skcipher(op->fallback_tfm); > + return err; > } > > void sun4i_ss_cipher_exit(struct crypto_tfm *tfm) > { > struct sun4i_tfm_ctx *op = crypto_tfm_ctx(tfm); > + > crypto_free_sync_skcipher(op->fallback_tfm); > + pm_runtime_put(op->ss->dev); > } > > /* check and set the AES key, prepare the mode to be used */ > diff --git a/drivers/crypto/sunxi-ss/sun4i-ss-core.c b/drivers/crypto/sunxi-ss/sun4i-ss-core.c > index 6c2db5d83b06..311c2653a9c3 100644 > --- a/drivers/crypto/sunxi-ss/sun4i-ss-core.c > +++ b/drivers/crypto/sunxi-ss/sun4i-ss-core.c > @@ -44,7 +44,8 @@ static struct sun4i_ss_alg_template ss_algs[] = { > .cra_blocksize = MD5_HMAC_BLOCK_SIZE, > .cra_ctxsize = sizeof(struct sun4i_req_ctx), > .cra_module = THIS_MODULE, > - .cra_init = sun4i_hash_crainit > + .cra_init = sun4i_hash_crainit, > + .cra_exit = sun4i_hash_craexit You should add a comma at the end to prevent having to modify it again > } > } > } > @@ -70,7 +71,8 @@ static struct sun4i_ss_alg_template ss_algs[] = { > .cra_blocksize = SHA1_BLOCK_SIZE, > .cra_ctxsize = sizeof(struct sun4i_req_ctx), > .cra_module = THIS_MODULE, > - .cra_init = sun4i_hash_crainit > + .cra_init = sun4i_hash_crainit, > + .cra_exit = sun4i_hash_craexit Ditto > } > } > } > @@ -262,6 +264,61 @@ static int sun4i_ss_enable(struct sun4i_ss_ctx *ss) > return err; > } > > +/* > + * Power management strategy: The device is suspended unless a TFM exists for > + * one of the algorithms proposed by this driver. > + */ > +#if defined(CONFIG_PM) > +static int sun4i_ss_pm_suspend(struct device *dev) > +{ > + struct sun4i_ss_ctx *ss = dev_get_drvdata(dev); > + > + sun4i_ss_disable(ss); > + return 0; > +} > + > +static int sun4i_ss_pm_resume(struct device *dev) > +{ > + struct sun4i_ss_ctx *ss = dev_get_drvdata(dev); > + > + return sun4i_ss_enable(ss); > +} > +#endif > + Why not just have the suspend and resume function and the enable / disable functions merged together, you're not using them directy as far as I can see. > +const struct dev_pm_ops sun4i_ss_pm_ops = { > + SET_RUNTIME_PM_OPS(sun4i_ss_pm_suspend, sun4i_ss_pm_resume, NULL) > +}; > + > +/* > + * When power management is enabled, this function enables the PM and set the > + * device as suspended > + * When power management is disabled, this function just enables the device > + */ > +static int sun4i_ss_pm_init(struct sun4i_ss_ctx *ss) > +{ > + int err; > + > + pm_runtime_use_autosuspend(ss->dev); > + pm_runtime_set_autosuspend_delay(ss->dev, 2000); > + > + err = pm_runtime_set_suspended(ss->dev); > + if (err) > + return err; > + pm_runtime_enable(ss->dev); > +#if !defined(CONFIG_PM) > + err = sun4i_ss_enable(ss); > +#endif > + return err; > +} This looks nicer: https://elixir.bootlin.com/linux/latest/source/drivers/spi/spi-sun4i.c#L492 Or, just make it depend on CONFIG_PM, we should probably do it anyway at the ARCH level anyway. Maxime [-- Attachment #1.2: signature.asc --] [-- Type: application/pgp-signature, Size: 228 bytes --] [-- Attachment #2: Type: text/plain, Size: 176 bytes --] _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel ^ permalink raw reply [flat|nested] 10+ messages in thread
* Re: [PATCH v2 2/2] crypto: sun4i-ss: enable pm_runtime 2019-09-19 16:55 ` Maxime Ripard @ 2019-09-23 7:53 ` Corentin Labbe -1 siblings, 0 replies; 10+ messages in thread From: Corentin Labbe @ 2019-09-23 7:53 UTC (permalink / raw) To: Maxime Ripard Cc: davem, herbert, wens, linux-arm-kernel, linux-crypto, linux-kernel, linux-sunxi On Thu, Sep 19, 2019 at 06:55:59PM +0200, Maxime Ripard wrote: > Hi, > > On Thu, Sep 19, 2019 at 07:10:35AM +0200, Corentin Labbe wrote: > > This patch enables power management on the Security System. > > > > Signed-off-by: Corentin Labbe <clabbe.montjoie@gmail.com> > > --- > > drivers/crypto/sunxi-ss/sun4i-ss-cipher.c | 9 +++ > > drivers/crypto/sunxi-ss/sun4i-ss-core.c | 94 +++++++++++++++++++---- > > drivers/crypto/sunxi-ss/sun4i-ss-hash.c | 12 +++ > > drivers/crypto/sunxi-ss/sun4i-ss-prng.c | 9 ++- > > drivers/crypto/sunxi-ss/sun4i-ss.h | 2 + > > 5 files changed, 110 insertions(+), 16 deletions(-) > > > > diff --git a/drivers/crypto/sunxi-ss/sun4i-ss-cipher.c b/drivers/crypto/sunxi-ss/sun4i-ss-cipher.c > > index fa4b1b47822e..c9799cbe0530 100644 > > --- a/drivers/crypto/sunxi-ss/sun4i-ss-cipher.c > > +++ b/drivers/crypto/sunxi-ss/sun4i-ss-cipher.c > > @@ -480,6 +480,7 @@ int sun4i_ss_cipher_init(struct crypto_tfm *tfm) > > struct sun4i_tfm_ctx *op = crypto_tfm_ctx(tfm); > > struct sun4i_ss_alg_template *algt; > > const char *name = crypto_tfm_alg_name(tfm); > > + int err; > > > > memset(op, 0, sizeof(struct sun4i_tfm_ctx)); > > > > @@ -497,13 +498,21 @@ int sun4i_ss_cipher_init(struct crypto_tfm *tfm) > > return PTR_ERR(op->fallback_tfm); > > } > > > > + err = pm_runtime_get_sync(op->ss->dev); > > + if (err < 0) > > + goto error_pm; > > return 0; > > Newline here > > > +error_pm: > > + crypto_free_sync_skcipher(op->fallback_tfm); > > + return err; > > } > > > > void sun4i_ss_cipher_exit(struct crypto_tfm *tfm) > > { > > struct sun4i_tfm_ctx *op = crypto_tfm_ctx(tfm); > > + > > crypto_free_sync_skcipher(op->fallback_tfm); > > + pm_runtime_put(op->ss->dev); > > } > > > > /* check and set the AES key, prepare the mode to be used */ > > diff --git a/drivers/crypto/sunxi-ss/sun4i-ss-core.c b/drivers/crypto/sunxi-ss/sun4i-ss-core.c > > index 6c2db5d83b06..311c2653a9c3 100644 > > --- a/drivers/crypto/sunxi-ss/sun4i-ss-core.c > > +++ b/drivers/crypto/sunxi-ss/sun4i-ss-core.c > > @@ -44,7 +44,8 @@ static struct sun4i_ss_alg_template ss_algs[] = { > > .cra_blocksize = MD5_HMAC_BLOCK_SIZE, > > .cra_ctxsize = sizeof(struct sun4i_req_ctx), > > .cra_module = THIS_MODULE, > > - .cra_init = sun4i_hash_crainit > > + .cra_init = sun4i_hash_crainit, > > + .cra_exit = sun4i_hash_craexit > > You should add a comma at the end to prevent having to modify it again > > > } > > } > > } > > @@ -70,7 +71,8 @@ static struct sun4i_ss_alg_template ss_algs[] = { > > .cra_blocksize = SHA1_BLOCK_SIZE, > > .cra_ctxsize = sizeof(struct sun4i_req_ctx), > > .cra_module = THIS_MODULE, > > - .cra_init = sun4i_hash_crainit > > + .cra_init = sun4i_hash_crainit, > > + .cra_exit = sun4i_hash_craexit > > Ditto > > > } > > } > > } > > @@ -262,6 +264,61 @@ static int sun4i_ss_enable(struct sun4i_ss_ctx *ss) > > return err; > > } > > > > +/* > > + * Power management strategy: The device is suspended unless a TFM exists for > > + * one of the algorithms proposed by this driver. > > + */ > > +#if defined(CONFIG_PM) > > +static int sun4i_ss_pm_suspend(struct device *dev) > > +{ > > + struct sun4i_ss_ctx *ss = dev_get_drvdata(dev); > > + > > + sun4i_ss_disable(ss); > > + return 0; > > +} > > + > > +static int sun4i_ss_pm_resume(struct device *dev) > > +{ > > + struct sun4i_ss_ctx *ss = dev_get_drvdata(dev); > > + > > + return sun4i_ss_enable(ss); > > +} > > +#endif > > + > > Why not just have the suspend and resume function and the enable / > disable functions merged together, you're not using them directy as > far as I can see. > > > +const struct dev_pm_ops sun4i_ss_pm_ops = { > > + SET_RUNTIME_PM_OPS(sun4i_ss_pm_suspend, sun4i_ss_pm_resume, NULL) > > +}; > > + > > +/* > > + * When power management is enabled, this function enables the PM and set the > > + * device as suspended > > + * When power management is disabled, this function just enables the device > > + */ > > +static int sun4i_ss_pm_init(struct sun4i_ss_ctx *ss) > > +{ > > + int err; > > + > > + pm_runtime_use_autosuspend(ss->dev); > > + pm_runtime_set_autosuspend_delay(ss->dev, 2000); > > + > > + err = pm_runtime_set_suspended(ss->dev); > > + if (err) > > + return err; > > + pm_runtime_enable(ss->dev); > > +#if !defined(CONFIG_PM) > > + err = sun4i_ss_enable(ss); > > +#endif > > + return err; > > +} > > This looks nicer: > https://elixir.bootlin.com/linux/latest/source/drivers/spi/spi-sun4i.c#L492 > > Or, just make it depend on CONFIG_PM, we should probably do it anyway > at the ARCH level anyway. > Hello I usually prefer to give choice (PM vs not PM), but it simplify a lot the code to depend on PM, so I will go for it. Thanks ^ permalink raw reply [flat|nested] 10+ messages in thread
* Re: [PATCH v2 2/2] crypto: sun4i-ss: enable pm_runtime @ 2019-09-23 7:53 ` Corentin Labbe 0 siblings, 0 replies; 10+ messages in thread From: Corentin Labbe @ 2019-09-23 7:53 UTC (permalink / raw) To: Maxime Ripard Cc: herbert, linux-sunxi, linux-kernel, wens, linux-crypto, davem, linux-arm-kernel On Thu, Sep 19, 2019 at 06:55:59PM +0200, Maxime Ripard wrote: > Hi, > > On Thu, Sep 19, 2019 at 07:10:35AM +0200, Corentin Labbe wrote: > > This patch enables power management on the Security System. > > > > Signed-off-by: Corentin Labbe <clabbe.montjoie@gmail.com> > > --- > > drivers/crypto/sunxi-ss/sun4i-ss-cipher.c | 9 +++ > > drivers/crypto/sunxi-ss/sun4i-ss-core.c | 94 +++++++++++++++++++---- > > drivers/crypto/sunxi-ss/sun4i-ss-hash.c | 12 +++ > > drivers/crypto/sunxi-ss/sun4i-ss-prng.c | 9 ++- > > drivers/crypto/sunxi-ss/sun4i-ss.h | 2 + > > 5 files changed, 110 insertions(+), 16 deletions(-) > > > > diff --git a/drivers/crypto/sunxi-ss/sun4i-ss-cipher.c b/drivers/crypto/sunxi-ss/sun4i-ss-cipher.c > > index fa4b1b47822e..c9799cbe0530 100644 > > --- a/drivers/crypto/sunxi-ss/sun4i-ss-cipher.c > > +++ b/drivers/crypto/sunxi-ss/sun4i-ss-cipher.c > > @@ -480,6 +480,7 @@ int sun4i_ss_cipher_init(struct crypto_tfm *tfm) > > struct sun4i_tfm_ctx *op = crypto_tfm_ctx(tfm); > > struct sun4i_ss_alg_template *algt; > > const char *name = crypto_tfm_alg_name(tfm); > > + int err; > > > > memset(op, 0, sizeof(struct sun4i_tfm_ctx)); > > > > @@ -497,13 +498,21 @@ int sun4i_ss_cipher_init(struct crypto_tfm *tfm) > > return PTR_ERR(op->fallback_tfm); > > } > > > > + err = pm_runtime_get_sync(op->ss->dev); > > + if (err < 0) > > + goto error_pm; > > return 0; > > Newline here > > > +error_pm: > > + crypto_free_sync_skcipher(op->fallback_tfm); > > + return err; > > } > > > > void sun4i_ss_cipher_exit(struct crypto_tfm *tfm) > > { > > struct sun4i_tfm_ctx *op = crypto_tfm_ctx(tfm); > > + > > crypto_free_sync_skcipher(op->fallback_tfm); > > + pm_runtime_put(op->ss->dev); > > } > > > > /* check and set the AES key, prepare the mode to be used */ > > diff --git a/drivers/crypto/sunxi-ss/sun4i-ss-core.c b/drivers/crypto/sunxi-ss/sun4i-ss-core.c > > index 6c2db5d83b06..311c2653a9c3 100644 > > --- a/drivers/crypto/sunxi-ss/sun4i-ss-core.c > > +++ b/drivers/crypto/sunxi-ss/sun4i-ss-core.c > > @@ -44,7 +44,8 @@ static struct sun4i_ss_alg_template ss_algs[] = { > > .cra_blocksize = MD5_HMAC_BLOCK_SIZE, > > .cra_ctxsize = sizeof(struct sun4i_req_ctx), > > .cra_module = THIS_MODULE, > > - .cra_init = sun4i_hash_crainit > > + .cra_init = sun4i_hash_crainit, > > + .cra_exit = sun4i_hash_craexit > > You should add a comma at the end to prevent having to modify it again > > > } > > } > > } > > @@ -70,7 +71,8 @@ static struct sun4i_ss_alg_template ss_algs[] = { > > .cra_blocksize = SHA1_BLOCK_SIZE, > > .cra_ctxsize = sizeof(struct sun4i_req_ctx), > > .cra_module = THIS_MODULE, > > - .cra_init = sun4i_hash_crainit > > + .cra_init = sun4i_hash_crainit, > > + .cra_exit = sun4i_hash_craexit > > Ditto > > > } > > } > > } > > @@ -262,6 +264,61 @@ static int sun4i_ss_enable(struct sun4i_ss_ctx *ss) > > return err; > > } > > > > +/* > > + * Power management strategy: The device is suspended unless a TFM exists for > > + * one of the algorithms proposed by this driver. > > + */ > > +#if defined(CONFIG_PM) > > +static int sun4i_ss_pm_suspend(struct device *dev) > > +{ > > + struct sun4i_ss_ctx *ss = dev_get_drvdata(dev); > > + > > + sun4i_ss_disable(ss); > > + return 0; > > +} > > + > > +static int sun4i_ss_pm_resume(struct device *dev) > > +{ > > + struct sun4i_ss_ctx *ss = dev_get_drvdata(dev); > > + > > + return sun4i_ss_enable(ss); > > +} > > +#endif > > + > > Why not just have the suspend and resume function and the enable / > disable functions merged together, you're not using them directy as > far as I can see. > > > +const struct dev_pm_ops sun4i_ss_pm_ops = { > > + SET_RUNTIME_PM_OPS(sun4i_ss_pm_suspend, sun4i_ss_pm_resume, NULL) > > +}; > > + > > +/* > > + * When power management is enabled, this function enables the PM and set the > > + * device as suspended > > + * When power management is disabled, this function just enables the device > > + */ > > +static int sun4i_ss_pm_init(struct sun4i_ss_ctx *ss) > > +{ > > + int err; > > + > > + pm_runtime_use_autosuspend(ss->dev); > > + pm_runtime_set_autosuspend_delay(ss->dev, 2000); > > + > > + err = pm_runtime_set_suspended(ss->dev); > > + if (err) > > + return err; > > + pm_runtime_enable(ss->dev); > > +#if !defined(CONFIG_PM) > > + err = sun4i_ss_enable(ss); > > +#endif > > + return err; > > +} > > This looks nicer: > https://elixir.bootlin.com/linux/latest/source/drivers/spi/spi-sun4i.c#L492 > > Or, just make it depend on CONFIG_PM, we should probably do it anyway > at the ARCH level anyway. > Hello I usually prefer to give choice (PM vs not PM), but it simplify a lot the code to depend on PM, so I will go for it. Thanks _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel ^ permalink raw reply [flat|nested] 10+ messages in thread
end of thread, other threads:[~2019-09-23 7:53 UTC | newest] Thread overview: 10+ messages (download: mbox.gz / follow: Atom feed) -- links below jump to the message on this page -- 2019-09-19 5:10 [PATCH v2 0/2] crypto: sun4i-ss: Enable power management Corentin Labbe 2019-09-19 5:10 ` Corentin Labbe 2019-09-19 5:10 ` [PATCH v2 1/2] crypto: sun4i-ss: simplify enable/disable of the device Corentin Labbe 2019-09-19 5:10 ` Corentin Labbe 2019-09-19 5:10 ` [PATCH v2 2/2] crypto: sun4i-ss: enable pm_runtime Corentin Labbe 2019-09-19 5:10 ` Corentin Labbe 2019-09-19 16:55 ` Maxime Ripard 2019-09-19 16:55 ` Maxime Ripard 2019-09-23 7:53 ` Corentin Labbe 2019-09-23 7:53 ` Corentin Labbe
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