From: JC Kuo <jckuo@nvidia.com>
To: gregkh@linuxfoundation.org, thierry.reding@gmail.com,
jonathanh@nvidia.com
Cc: linux-tegra@vger.kernel.org, linux-usb@vger.kernel.org,
linux-kernel@vger.kernel.org, devicetree@vger.kernel.org,
nkristam@nvidia.com, skomatineni@nvidia.com,
JC Kuo <jckuo@nvidia.com>
Subject: [PATCH v2 5/7] dt-bindings: phy: tegra: Add Tegra194 support
Date: Fri, 4 Oct 2019 16:19:39 +0800 [thread overview]
Message-ID: <20191004081941.4831-6-jckuo@nvidia.com> (raw)
In-Reply-To: <20191004081941.4831-1-jckuo@nvidia.com>
Extend the bindings to cover the set of features found in Tegra194.
Note that, technically, there are four more supplies connected to the
XUSB pad controller (DVDD_PEX, DVDD_PEX_PLL, HVDD_PEX and HVDD_PEX_PLL)
, but the power sequencing requirements of Tegra194 require these to be
under the control of the PMIC.
Tegra194 XUSB PADCTL supports up to USB 3.1 Gen 2 speed, however, it is
possible for some platforms have long signal trace that could not
provide sufficient electrical environment for Gen 2 speed. To deal with
this, a new device node property "nvidia,disable-gen2" was added to
Tegra194 that be used to specifically disable Gen 2 speed for a
particular USB 3.0 port so that the port can be limited to Gen 1 speed
and avoid the instability.
Signed-off-by: JC Kuo <jckuo@nvidia.com>
---
Changes in v2:
- fix a typo
.../bindings/phy/nvidia,tegra124-xusb-padctl.txt | 16 ++++++++++++++++
1 file changed, 16 insertions(+)
diff --git a/Documentation/devicetree/bindings/phy/nvidia,tegra124-xusb-padctl.txt b/Documentation/devicetree/bindings/phy/nvidia,tegra124-xusb-padctl.txt
index 9fb682e47c29..59d870fa42e9 100644
--- a/Documentation/devicetree/bindings/phy/nvidia,tegra124-xusb-padctl.txt
+++ b/Documentation/devicetree/bindings/phy/nvidia,tegra124-xusb-padctl.txt
@@ -37,6 +37,7 @@ Required properties:
- Tegra132: "nvidia,tegra132-xusb-padctl", "nvidia,tegra124-xusb-padctl"
- Tegra210: "nvidia,tegra210-xusb-padctl"
- Tegra186: "nvidia,tegra186-xusb-padctl"
+ - Tegra194: "nvidia,tegra194-xusb-padctl"
- reg: Physical base address and length of the controller's registers.
- resets: Must contain an entry for each entry in reset-names.
- reset-names: Must include the following entries:
@@ -62,6 +63,10 @@ For Tegra186:
- vclamp-usb-supply: Bias rail for USB pad. Must supply 1.8 V.
- vddio-hsic-supply: HSIC PHY power supply. Must supply 1.2 V.
+For Tegra194:
+- avdd-usb-supply: USB I/Os, VBUS, ID, REXT, D+/D- power supply. Must supply
+ 3.3 V.
+- vclamp-usb-supply: Bias rail for USB pad. Must supply 1.8 V.
Pad nodes:
==========
@@ -154,6 +159,11 @@ For Tegra210, the list of valid PHY nodes is given below:
- sata: sata-0
- functions: "usb3-ss", "sata"
+For Tegra194, the list of valid PHY nodes is given below:
+- usb2: usb2-0, usb2-1, usb2-2, usb2-3
+ - functions: "xusb"
+- usb3: usb3-0, usb3-1, usb3-2, usb3-3
+ - functions: "xusb"
Port nodes:
===========
@@ -221,6 +231,9 @@ Optional properties:
is internal. In the absence of this property the port is considered to be
external.
+- nvidia,disable-gen2: A boolean property whose presence determines that a port
+ should be limited to USB 3.1 Gen 1. This property is only for Tegra194.
+
For Tegra124 and Tegra132, the XUSB pad controller exposes the following
ports:
- 3x USB2: usb2-0, usb2-1, usb2-2
@@ -233,6 +246,9 @@ For Tegra210, the XUSB pad controller exposes the following ports:
- 2x HSIC: hsic-0, hsic-1
- 4x super-speed USB: usb3-0, usb3-1, usb3-2, usb3-3
+For Tegra194, the XUSB pad controller exposes the following ports:
+- 4x USB2: usb2-0, usb2-1, usb2-2, usb2-3
+- 4x super-speed USB: usb3-0, usb3-1, usb3-2, usb3-3
Examples:
=========
--
2.17.1
WARNING: multiple messages have this Message-ID (diff)
From: JC Kuo <jckuo@nvidia.com>
To: <gregkh@linuxfoundation.org>, <thierry.reding@gmail.com>,
<jonathanh@nvidia.com>
Cc: <linux-tegra@vger.kernel.org>, <linux-usb@vger.kernel.org>,
<linux-kernel@vger.kernel.org>, <devicetree@vger.kernel.org>,
<nkristam@nvidia.com>, <skomatineni@nvidia.com>,
JC Kuo <jckuo@nvidia.com>
Subject: [PATCH v2 5/7] dt-bindings: phy: tegra: Add Tegra194 support
Date: Fri, 4 Oct 2019 16:19:39 +0800 [thread overview]
Message-ID: <20191004081941.4831-6-jckuo@nvidia.com> (raw)
In-Reply-To: <20191004081941.4831-1-jckuo@nvidia.com>
Extend the bindings to cover the set of features found in Tegra194.
Note that, technically, there are four more supplies connected to the
XUSB pad controller (DVDD_PEX, DVDD_PEX_PLL, HVDD_PEX and HVDD_PEX_PLL)
, but the power sequencing requirements of Tegra194 require these to be
under the control of the PMIC.
Tegra194 XUSB PADCTL supports up to USB 3.1 Gen 2 speed, however, it is
possible for some platforms have long signal trace that could not
provide sufficient electrical environment for Gen 2 speed. To deal with
this, a new device node property "nvidia,disable-gen2" was added to
Tegra194 that be used to specifically disable Gen 2 speed for a
particular USB 3.0 port so that the port can be limited to Gen 1 speed
and avoid the instability.
Signed-off-by: JC Kuo <jckuo@nvidia.com>
---
Changes in v2:
- fix a typo
.../bindings/phy/nvidia,tegra124-xusb-padctl.txt | 16 ++++++++++++++++
1 file changed, 16 insertions(+)
diff --git a/Documentation/devicetree/bindings/phy/nvidia,tegra124-xusb-padctl.txt b/Documentation/devicetree/bindings/phy/nvidia,tegra124-xusb-padctl.txt
index 9fb682e47c29..59d870fa42e9 100644
--- a/Documentation/devicetree/bindings/phy/nvidia,tegra124-xusb-padctl.txt
+++ b/Documentation/devicetree/bindings/phy/nvidia,tegra124-xusb-padctl.txt
@@ -37,6 +37,7 @@ Required properties:
- Tegra132: "nvidia,tegra132-xusb-padctl", "nvidia,tegra124-xusb-padctl"
- Tegra210: "nvidia,tegra210-xusb-padctl"
- Tegra186: "nvidia,tegra186-xusb-padctl"
+ - Tegra194: "nvidia,tegra194-xusb-padctl"
- reg: Physical base address and length of the controller's registers.
- resets: Must contain an entry for each entry in reset-names.
- reset-names: Must include the following entries:
@@ -62,6 +63,10 @@ For Tegra186:
- vclamp-usb-supply: Bias rail for USB pad. Must supply 1.8 V.
- vddio-hsic-supply: HSIC PHY power supply. Must supply 1.2 V.
+For Tegra194:
+- avdd-usb-supply: USB I/Os, VBUS, ID, REXT, D+/D- power supply. Must supply
+ 3.3 V.
+- vclamp-usb-supply: Bias rail for USB pad. Must supply 1.8 V.
Pad nodes:
==========
@@ -154,6 +159,11 @@ For Tegra210, the list of valid PHY nodes is given below:
- sata: sata-0
- functions: "usb3-ss", "sata"
+For Tegra194, the list of valid PHY nodes is given below:
+- usb2: usb2-0, usb2-1, usb2-2, usb2-3
+ - functions: "xusb"
+- usb3: usb3-0, usb3-1, usb3-2, usb3-3
+ - functions: "xusb"
Port nodes:
===========
@@ -221,6 +231,9 @@ Optional properties:
is internal. In the absence of this property the port is considered to be
external.
+- nvidia,disable-gen2: A boolean property whose presence determines that a port
+ should be limited to USB 3.1 Gen 1. This property is only for Tegra194.
+
For Tegra124 and Tegra132, the XUSB pad controller exposes the following
ports:
- 3x USB2: usb2-0, usb2-1, usb2-2
@@ -233,6 +246,9 @@ For Tegra210, the XUSB pad controller exposes the following ports:
- 2x HSIC: hsic-0, hsic-1
- 4x super-speed USB: usb3-0, usb3-1, usb3-2, usb3-3
+For Tegra194, the XUSB pad controller exposes the following ports:
+- 4x USB2: usb2-0, usb2-1, usb2-2, usb2-3
+- 4x super-speed USB: usb3-0, usb3-1, usb3-2, usb3-3
Examples:
=========
--
2.17.1
next prev parent reply other threads:[~2019-10-04 8:19 UTC|newest]
Thread overview: 19+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-10-04 8:19 [PATCH v2 0/7] add Tegra194 XUSB host and pad controller support JC Kuo
2019-10-04 8:19 ` JC Kuo
2019-10-04 8:19 ` [PATCH v2 1/7] xhci: tegra: Parameterize mailbox register addresses JC Kuo
2019-10-04 8:19 ` JC Kuo
2019-10-04 8:19 ` [PATCH v2 2/7] usb: host: xhci-tegra: Add Tegra194 XHCI support JC Kuo
2019-10-04 8:19 ` JC Kuo
2019-10-04 8:19 ` [PATCH v2 3/7] phy: tegra: xusb: Protect Tegra186 soc with config JC Kuo
2019-10-04 8:19 ` JC Kuo
2019-10-04 8:19 ` [PATCH v2 4/7] phy: tegra: xusb: Add Tegra194 support JC Kuo
2019-10-04 8:19 ` JC Kuo
2019-10-04 8:19 ` JC Kuo [this message]
2019-10-04 8:19 ` [PATCH v2 5/7] dt-bindings: phy: tegra: " JC Kuo
2019-10-04 8:19 ` [PATCH v2 6/7] arm64: tegra: Add XUSB and pad controller on Tegra194 JC Kuo
2019-10-04 8:19 ` JC Kuo
2019-10-04 8:19 ` [PATCH v2 7/7] arm64: tegra: Enable XUSB host in P2972-0000 board JC Kuo
2019-10-04 8:19 ` JC Kuo
2019-10-04 12:23 ` [PATCH v2 0/7] add Tegra194 XUSB host and pad controller support Greg KH
2019-10-04 16:08 ` JC Kuo
2019-10-04 16:08 ` JC Kuo
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