* [cip-dev] [isar-cip-core PATCH 1/4] kas: Increase Isar version
2019-11-06 12:44 [cip-dev] [isar-cip-core PATCH 0/4] Add rzg2m support Q. Gylstorff
@ 2019-11-06 12:44 ` Q. Gylstorff
2019-11-06 12:44 ` [cip-dev] [isar-cip-core PATCH 2/4] classes: add wic-targz-img.bbclass Q. Gylstorff
` (3 subsequent siblings)
4 siblings, 0 replies; 22+ messages in thread
From: Q. Gylstorff @ 2019-11-06 12:44 UTC (permalink / raw)
To: cip-dev
From: Quirin Gylstorff <quirin.gylstorff@siemens.com>
Add fix for manifest generation to avoid errors during build.
Signed-off-by: Quirin Gylstorff <quirin.gylstorff@siemens.com>
---
kas.yml | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/kas.yml b/kas.yml
index 4904715..aa7ddda 100644
--- a/kas.yml
+++ b/kas.yml
@@ -19,7 +19,7 @@ repos:
isar:
url: https://github.com/ilbers/isar
- refspec: c1bae4c7ae9dee4d2cf5fd77d0c5560d9e52d5e1
+ refspec: 20a5e368021d988d8f0dcd1951b395d194a37ebb
layers:
meta:
--
2.20.1
^ permalink raw reply related [flat|nested] 22+ messages in thread* [cip-dev] [isar-cip-core PATCH 2/4] classes: add wic-targz-img.bbclass
2019-11-06 12:44 [cip-dev] [isar-cip-core PATCH 0/4] Add rzg2m support Q. Gylstorff
2019-11-06 12:44 ` [cip-dev] [isar-cip-core PATCH 1/4] kas: Increase Isar version Q. Gylstorff
@ 2019-11-06 12:44 ` Q. Gylstorff
2019-11-06 12:44 ` [cip-dev] [isar-cip-core PATCH 3/4] hihope-rzg2m: Add board support Q. Gylstorff
` (2 subsequent siblings)
4 siblings, 0 replies; 22+ messages in thread
From: Q. Gylstorff @ 2019-11-06 12:44 UTC (permalink / raw)
To: cip-dev
From: Quirin Gylstorff <quirin.gylstorff@siemens.com>
The Linaro Automated Validation Architecture (LAVA) uses tarballs
as root file-systems to modify the file-system during the deployment.
Add a new bbclass to build tarballs and wic images at the same time to
feed the build output of isar-cip-core directly into LAVA tests.
Signed-off-by: Quirin Gylstorff <quirin.gylstorff@siemens.com>
---
classes/wic-targz-img.bbclass | 13 +++++++++++++
conf/machine/bbb.conf | 2 +-
conf/machine/iwg20m.conf | 2 +-
conf/machine/qemu-amd64.conf | 2 +-
conf/machine/simatic-ipc227e.conf | 2 +-
opt-targz-img.yml | 20 ++++++++++++++++++++
scripts/deploy-cip-core.sh | 4 ++++
7 files changed, 41 insertions(+), 4 deletions(-)
create mode 100644 classes/wic-targz-img.bbclass
create mode 100644 opt-targz-img.yml
diff --git a/classes/wic-targz-img.bbclass b/classes/wic-targz-img.bbclass
new file mode 100644
index 0000000..4e9f89d
--- /dev/null
+++ b/classes/wic-targz-img.bbclass
@@ -0,0 +1,13 @@
+#
+# CIP Core, generic profile
+#
+# Copyright (c) Siemens AG, 2019
+#
+# Authors:
+# Quirin Gylstorff <quirin.gylstorff@siemens.com>
+#
+# SPDX-License-Identifier: MIT
+#
+
+inherit wic-img
+inherit targz-img
diff --git a/conf/machine/bbb.conf b/conf/machine/bbb.conf
index c945aac..a9b460e 100644
--- a/conf/machine/bbb.conf
+++ b/conf/machine/bbb.conf
@@ -8,7 +8,7 @@
DISTRO_ARCH = "armhf"
-IMAGE_TYPE = "wic-img"
+IMAGE_TYPE ?= "wic-img"
IMAGER_INSTALL += "u-boot-omap"
# On stretch, select U-Boot from buster which comes with distro-boot support
diff --git a/conf/machine/iwg20m.conf b/conf/machine/iwg20m.conf
index 2f91771..6c1a227 100644
--- a/conf/machine/iwg20m.conf
+++ b/conf/machine/iwg20m.conf
@@ -8,7 +8,7 @@
DISTRO_ARCH = "armhf"
# see wic/iwg20m.wks
-IMAGE_TYPE = "wic-img"
+IMAGE_TYPE ?= "wic-img"
# sets serial login getty
MACHINE_SERIAL = "ttySC0"
diff --git a/conf/machine/qemu-amd64.conf b/conf/machine/qemu-amd64.conf
index 90325d6..7cbd55b 100644
--- a/conf/machine/qemu-amd64.conf
+++ b/conf/machine/qemu-amd64.conf
@@ -8,4 +8,4 @@
DISTRO_ARCH = "amd64"
-IMAGE_TYPE = "ext4-img"
+IMAGE_TYPE ?= "ext4-img"
diff --git a/conf/machine/simatic-ipc227e.conf b/conf/machine/simatic-ipc227e.conf
index 73dac33..473e6c5 100644
--- a/conf/machine/simatic-ipc227e.conf
+++ b/conf/machine/simatic-ipc227e.conf
@@ -8,5 +8,5 @@
DISTRO_ARCH = "amd64"
-IMAGE_TYPE = "wic-img"
+IMAGE_TYPE ?= "wic-img"
IMAGER_INSTALL += "${GRUB_BOOTLOADER_INSTALL}"
diff --git a/opt-targz-img.yml b/opt-targz-img.yml
new file mode 100644
index 0000000..1a73024
--- /dev/null
+++ b/opt-targz-img.yml
@@ -0,0 +1,20 @@
+#
+# CIP Core, generic profile
+#
+# Copyright (c) Siemens AG, 2019
+#
+# Authors:
+# Quirin Gylstorff <quirin.gylstorff@siemens.com>
+#
+# SPDX-License-Identifier: MIT
+#
+
+header:
+ version: 8
+
+# lava uses nfs to deploy the image. For this we need a tarball instead of
+# full image
+
+local_conf_header:
+ image-type: |
+ IMAGE_TYPE = "wic-targz-img"
diff --git a/scripts/deploy-cip-core.sh b/scripts/deploy-cip-core.sh
index 081dc9d..e5c09ef 100755
--- a/scripts/deploy-cip-core.sh
+++ b/scripts/deploy-cip-core.sh
@@ -26,6 +26,10 @@ xz -9 -k $BASE_PATH.wic.img
echo "Uploading artifacts..."
aws s3 cp --no-progress $BASE_PATH.wic.img.xz s3://download.cip-project.org/cip-core/$TARGET/
+if [ -f $BASE_PATH.tar.gz ]; then
+ aws s3 cp --no-progress $BASE_PATH.tar.gz s3://download.cip-project.org/cip-core/$TARGET/
+fi
+
KERNEL_IMAGE=$BASE_PATH-vmlinuz
# iwg20m workaround
if [ -f build/tmp/deploy/images/$TARGET/zImage ]; then
--
2.20.1
^ permalink raw reply related [flat|nested] 22+ messages in thread* [cip-dev] [isar-cip-core PATCH 3/4] hihope-rzg2m: Add board support
2019-11-06 12:44 [cip-dev] [isar-cip-core PATCH 0/4] Add rzg2m support Q. Gylstorff
2019-11-06 12:44 ` [cip-dev] [isar-cip-core PATCH 1/4] kas: Increase Isar version Q. Gylstorff
2019-11-06 12:44 ` [cip-dev] [isar-cip-core PATCH 2/4] classes: add wic-targz-img.bbclass Q. Gylstorff
@ 2019-11-06 12:44 ` Q. Gylstorff
2019-11-06 15:38 ` Chris Paterson
2019-11-06 12:44 ` [cip-dev] [isar-cip-core PATCH 4/4] ci: add hihope-rzg2m to ci chain Q. Gylstorff
2019-11-06 14:12 ` [cip-dev] [isar-cip-core PATCH 0/4] Add rzg2m support Jan Kiszka
4 siblings, 1 reply; 22+ messages in thread
From: Q. Gylstorff @ 2019-11-06 12:44 UTC (permalink / raw)
To: cip-dev
From: Quirin Gylstorff <quirin.gylstorff@siemens.com>
The hihope-rzg2m is a ARM64 reference platform for the CIP project.
Signed-off-by: Quirin Gylstorff <quirin.gylstorff@siemens.com>
---
board-rzg2m.yml | 16 +
conf/machine/hihope-rzg2m.conf | 17 +
.../linux/files/hihope-rzg2m_defconfig | 330 ++++++++++++++++++
wic/hihope-rzg2m.wks | 15 +
4 files changed, 378 insertions(+)
create mode 100644 board-rzg2m.yml
create mode 100644 conf/machine/hihope-rzg2m.conf
create mode 100644 recipes-kernel/linux/files/hihope-rzg2m_defconfig
create mode 100644 wic/hihope-rzg2m.wks
diff --git a/board-rzg2m.yml b/board-rzg2m.yml
new file mode 100644
index 0000000..f68c7b8
--- /dev/null
+++ b/board-rzg2m.yml
@@ -0,0 +1,16 @@
+#
+# CIP Core, generic profile
+#
+# Copyright (c) Siemens AG, 2019
+#
+# Authors:
+# Quirin Gylstorff <quirin.gylstorff@siemens.com>
+#
+# SPDX-License-Identifier: MIT
+#
+
+header:
+ version: 8
+
+machine: hihope-rzg2m
+target: cip-core-image
diff --git a/conf/machine/hihope-rzg2m.conf b/conf/machine/hihope-rzg2m.conf
new file mode 100644
index 0000000..5c456c7
--- /dev/null
+++ b/conf/machine/hihope-rzg2m.conf
@@ -0,0 +1,17 @@
+#
+# CIP Core, generic profile
+#
+# Copyright (c) Siemens AG, 2019
+#
+# Authors:
+# Quirin Gylstorff <quirin.gylstorff@siemens.com>
+#
+# SPDX-License-Identifier: MIT
+#
+
+DISTRO_ARCH = "arm64"
+
+IMAGE_TYPE ?= "wic-img"
+
+DTB_FILE = "r8a774a1-hihope-rzg2m.dtb"
+IMAGE_BOOT_FILES = "${KERNEL_IMAGE} ${DTB_FILE}"
diff --git a/recipes-kernel/linux/files/hihope-rzg2m_defconfig b/recipes-kernel/linux/files/hihope-rzg2m_defconfig
new file mode 100644
index 0000000..f35793c
--- /dev/null
+++ b/recipes-kernel/linux/files/hihope-rzg2m_defconfig
@@ -0,0 +1,330 @@
+CONFIG_SYSVIPC=y
+CONFIG_POSIX_MQUEUE=y
+CONFIG_AUDIT=y
+CONFIG_NO_HZ_IDLE=y
+CONFIG_HIGH_RES_TIMERS=y
+CONFIG_PREEMPT=y
+CONFIG_IRQ_TIME_ACCOUNTING=y
+CONFIG_BSD_PROCESS_ACCT=y
+CONFIG_BSD_PROCESS_ACCT_V3=y
+CONFIG_TASKSTATS=y
+CONFIG_TASK_DELAY_ACCT=y
+CONFIG_TASK_XACCT=y
+CONFIG_TASK_IO_ACCOUNTING=y
+CONFIG_IKCONFIG=y
+CONFIG_IKCONFIG_PROC=y
+CONFIG_MEMCG=y
+CONFIG_MEMCG_SWAP=y
+CONFIG_BLK_CGROUP=y
+CONFIG_CGROUP_PIDS=y
+CONFIG_CGROUP_HUGETLB=y
+CONFIG_CPUSETS=y
+CONFIG_CGROUP_DEVICE=y
+CONFIG_CGROUP_CPUACCT=y
+CONFIG_CGROUP_PERF=y
+CONFIG_USER_NS=y
+CONFIG_SCHED_AUTOGROUP=y
+CONFIG_BLK_DEV_INITRD=y
+# CONFIG_COMPAT_BRK is not set
+CONFIG_PROFILING=y
+CONFIG_ARCH_RENESAS=y
+CONFIG_ARCH_R8A774A1=y
+CONFIG_ARCH_R8A774C0=y
+CONFIG_PCI=y
+CONFIG_PCIEPORTBUS=y
+CONFIG_HOTPLUG_PCI_PCIE=y
+CONFIG_PCI_IOV=y
+CONFIG_HOTPLUG_PCI=y
+CONFIG_PCIE_RCAR=y
+CONFIG_PCI_HOST_GENERIC=y
+# CONFIG_CAVIUM_ERRATUM_22375 is not set
+# CONFIG_CAVIUM_ERRATUM_23154 is not set
+# CONFIG_CAVIUM_ERRATUM_27456 is not set
+# CONFIG_CAVIUM_ERRATUM_30115 is not set
+# CONFIG_QCOM_FALKOR_ERRATUM_1003 is not set
+# CONFIG_QCOM_FALKOR_ERRATUM_1009 is not set
+# CONFIG_QCOM_QDF2400_ERRATUM_0065 is not set
+# CONFIG_SOCIONEXT_SYNQUACER_PREITS is not set
+# CONFIG_HISILICON_ERRATUM_161600802 is not set
+CONFIG_ARM64_VA_BITS_48=y
+CONFIG_SCHED_MC=y
+CONFIG_NR_CPUS=8
+CONFIG_SECCOMP=y
+CONFIG_KEXEC=y
+CONFIG_CRASH_DUMP=y
+CONFIG_XEN=y
+# CONFIG_ARM64_LSE_ATOMICS is not set
+# CONFIG_ARM64_RAS_EXTN is not set
+CONFIG_COMPAT=y
+CONFIG_HIBERNATION=y
+CONFIG_WQ_POWER_EFFICIENT_DEFAULT=y
+CONFIG_CPU_IDLE=y
+CONFIG_ARM_CPUIDLE=y
+CONFIG_CPU_FREQ=y
+CONFIG_CPUFREQ_DT=y
+# CONFIG_DMIID is not set
+CONFIG_VIRTUALIZATION=y
+CONFIG_KVM=y
+CONFIG_ARM64_CRYPTO=y
+CONFIG_CRYPTO_SHA1_ARM64_CE=y
+CONFIG_CRYPTO_SHA2_ARM64_CE=y
+CONFIG_CRYPTO_GHASH_ARM64_CE=y
+CONFIG_CRYPTO_AES_ARM64_CE_CCM=y
+CONFIG_CRYPTO_AES_ARM64_CE_BLK=y
+CONFIG_JUMP_LABEL=y
+CONFIG_BLK_DEV_INTEGRITY=y
+# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
+CONFIG_KSM=y
+CONFIG_TRANSPARENT_HUGEPAGE=y
+CONFIG_CMA=y
+CONFIG_NET=y
+CONFIG_PACKET=y
+CONFIG_UNIX=y
+CONFIG_INET=y
+CONFIG_IP_MULTICAST=y
+CONFIG_IP_PNP=y
+CONFIG_IP_PNP_DHCP=y
+CONFIG_IP_PNP_BOOTP=y
+# CONFIG_IPV6 is not set
+CONFIG_NETFILTER=y
+CONFIG_CAN=y
+CONFIG_CAN_RCAR=y
+CONFIG_CAN_RCAR_CANFD=y
+CONFIG_DEVTMPFS=y
+CONFIG_DEVTMPFS_MOUNT=y
+CONFIG_DMA_CMA=y
+CONFIG_CMA_SIZE_MBYTES=128
+CONFIG_CMA_ALIGNMENT=9
+CONFIG_MTD=y
+CONFIG_MTD_BLOCK=y
+CONFIG_MTD_SPI_NOR=y
+CONFIG_BLK_DEV_LOOP=y
+CONFIG_VIRTIO_BLK=y
+CONFIG_SRAM=y
+# CONFIG_SCSI_PROC_FS is not set
+CONFIG_BLK_DEV_SD=y
+CONFIG_SCSI_SAS_LIBSAS=y
+CONFIG_SCSI_SAS_ATA=y
+CONFIG_ATA=y
+# CONFIG_SATA_PMP is not set
+CONFIG_SATA_RCAR=y
+CONFIG_NETDEVICES=y
+CONFIG_TUN=y
+CONFIG_VIRTIO_NET=y
+# CONFIG_CAVIUM_PTP is not set
+CONFIG_RAVB=y
+CONFIG_MDIO_BUS_MUX_MMIOREG=y
+CONFIG_MICREL_PHY=y
+CONFIG_REALTEK_PHY=y
+# CONFIG_WLAN is not set
+CONFIG_INPUT_MATRIXKMAP=y
+CONFIG_INPUT_EVDEV=y
+# CONFIG_KEYBOARD_ATKBD is not set
+CONFIG_KEYBOARD_GPIO=y
+# CONFIG_MOUSE_PS2 is not set
+CONFIG_INPUT_MISC=y
+# CONFIG_SERIO is not set
+CONFIG_SERIAL_SH_SCI=y
+CONFIG_VIRTIO_CONSOLE=y
+# CONFIG_HW_RANDOM is not set
+CONFIG_I2C_CHARDEV=y
+CONFIG_I2C_MUX=y
+CONFIG_I2C_MUX_PCA954x=y
+CONFIG_I2C_DESIGNWARE_PLATFORM=y
+CONFIG_I2C_SH_MOBILE=y
+CONFIG_I2C_RCAR=y
+CONFIG_SPI=y
+CONFIG_SPI_SH_MSIOF=y
+CONFIG_SPI_SPIDEV=y
+CONFIG_SPMI=y
+CONFIG_PINCTRL_SINGLE=y
+CONFIG_GPIO_GENERIC_PLATFORM=y
+CONFIG_GPIO_RCAR=y
+CONFIG_GPIO_PCA953X=y
+CONFIG_GPIO_BD9571MWV=y
+CONFIG_THERMAL=y
+CONFIG_THERMAL_GOV_POWER_ALLOCATOR=y
+CONFIG_CPU_THERMAL=y
+CONFIG_THERMAL_EMULATION=y
+CONFIG_RCAR_THERMAL=y
+CONFIG_RCAR_GEN3_THERMAL=y
+CONFIG_WATCHDOG=y
+CONFIG_RENESAS_WDT=y
+CONFIG_MFD_BD9571MWV=y
+CONFIG_REGULATOR=y
+CONFIG_REGULATOR_FIXED_VOLTAGE=y
+CONFIG_REGULATOR_BD9571MWV=y
+CONFIG_REGULATOR_GPIO=y
+CONFIG_REGULATOR_PWM=y
+CONFIG_MEDIA_SUPPORT=y
+CONFIG_MEDIA_CAMERA_SUPPORT=y
+CONFIG_MEDIA_SDR_SUPPORT=y
+CONFIG_MEDIA_CONTROLLER=y
+CONFIG_VIDEO_V4L2_SUBDEV_API=y
+CONFIG_V4L_PLATFORM_DRIVERS=y
+CONFIG_VIDEO_RCAR_CSI2=y
+CONFIG_VIDEO_RCAR_VIN=y
+CONFIG_V4L_MEM2MEM_DRIVERS=y
+CONFIG_VIDEO_RENESAS_FDP1=y
+CONFIG_VIDEO_RENESAS_FCP=y
+CONFIG_VIDEO_RENESAS_VSP1=y
+CONFIG_SDR_PLATFORM_DRIVERS=y
+CONFIG_VIDEO_RCAR_DRIF=y
+# CONFIG_MEDIA_SUBDRV_AUTOSELECT is not set
+CONFIG_VIDEO_ADV748X=y
+# CONFIG_MEDIA_TUNER_SIMPLE is not set
+# CONFIG_MEDIA_TUNER_TDA18250 is not set
+# CONFIG_MEDIA_TUNER_TDA8290 is not set
+# CONFIG_MEDIA_TUNER_TDA827X is not set
+# CONFIG_MEDIA_TUNER_TDA18271 is not set
+# CONFIG_MEDIA_TUNER_TDA9887 is not set
+# CONFIG_MEDIA_TUNER_TEA5761 is not set
+# CONFIG_MEDIA_TUNER_TEA5767 is not set
+# CONFIG_MEDIA_TUNER_MSI001 is not set
+# CONFIG_MEDIA_TUNER_MT20XX is not set
+# CONFIG_MEDIA_TUNER_MT2060 is not set
+# CONFIG_MEDIA_TUNER_MT2063 is not set
+# CONFIG_MEDIA_TUNER_MT2266 is not set
+# CONFIG_MEDIA_TUNER_MT2131 is not set
+# CONFIG_MEDIA_TUNER_QT1010 is not set
+# CONFIG_MEDIA_TUNER_XC2028 is not set
+# CONFIG_MEDIA_TUNER_XC5000 is not set
+# CONFIG_MEDIA_TUNER_XC4000 is not set
+# CONFIG_MEDIA_TUNER_MXL5005S is not set
+# CONFIG_MEDIA_TUNER_MXL5007T is not set
+# CONFIG_MEDIA_TUNER_MC44S803 is not set
+# CONFIG_MEDIA_TUNER_MAX2165 is not set
+# CONFIG_MEDIA_TUNER_TDA18218 is not set
+# CONFIG_MEDIA_TUNER_FC0011 is not set
+# CONFIG_MEDIA_TUNER_FC0012 is not set
+# CONFIG_MEDIA_TUNER_FC0013 is not set
+# CONFIG_MEDIA_TUNER_TDA18212 is not set
+# CONFIG_MEDIA_TUNER_E4000 is not set
+# CONFIG_MEDIA_TUNER_FC2580 is not set
+# CONFIG_MEDIA_TUNER_M88RS6000T is not set
+# CONFIG_MEDIA_TUNER_TUA9001 is not set
+# CONFIG_MEDIA_TUNER_SI2157 is not set
+# CONFIG_MEDIA_TUNER_IT913X is not set
+# CONFIG_MEDIA_TUNER_R820T is not set
+# CONFIG_MEDIA_TUNER_MXL301RF is not set
+# CONFIG_MEDIA_TUNER_QM1D1C0042 is not set
+# CONFIG_MEDIA_TUNER_QM1D1B0004 is not set
+CONFIG_DRM=y
+CONFIG_DRM_I2C_NXP_TDA998X=y
+CONFIG_DRM_RCAR_DU=y
+CONFIG_DRM_RCAR_DW_HDMI=y
+CONFIG_DRM_RCAR_LVDS=y
+CONFIG_DRM_DUMB_VGA_DAC=y
+CONFIG_DRM_THINE_THC63LVD1024=y
+CONFIG_DRM_DW_HDMI_AHB_AUDIO=y
+CONFIG_DRM_DW_HDMI_I2S_AUDIO=y
+CONFIG_DRM_DW_HDMI_CEC=y
+CONFIG_FB_MODE_HELPERS=y
+CONFIG_BACKLIGHT_LCD_SUPPORT=y
+# CONFIG_LCD_CLASS_DEVICE is not set
+# CONFIG_BACKLIGHT_GENERIC is not set
+CONFIG_BACKLIGHT_PWM=y
+CONFIG_LOGO=y
+# CONFIG_LOGO_LINUX_MONO is not set
+# CONFIG_LOGO_LINUX_VGA16 is not set
+CONFIG_SOUND=y
+CONFIG_SND=y
+# CONFIG_SND_SPI is not set
+# CONFIG_SND_USB is not set
+CONFIG_SND_SOC=y
+CONFIG_SND_SOC_RCAR=y
+CONFIG_SND_SOC_AK4613=y
+CONFIG_SND_SOC_PCM3168A_I2C=y
+CONFIG_SND_SIMPLE_CARD=y
+CONFIG_SND_SIMPLE_SCU_CARD=y
+CONFIG_SND_AUDIO_GRAPH_CARD=y
+CONFIG_USB=y
+CONFIG_USB_OTG=y
+CONFIG_USB_XHCI_HCD=y
+CONFIG_USB_XHCI_PLATFORM=y
+CONFIG_USB_EHCI_HCD=y
+CONFIG_USB_EHCI_ROOT_HUB_TT=y
+CONFIG_USB_EHCI_HCD_PLATFORM=y
+CONFIG_USB_OHCI_HCD=y
+CONFIG_USB_OHCI_HCD_PLATFORM=y
+CONFIG_USB_RENESAS_USBHS_HCD=y
+CONFIG_USB_RENESAS_USBHS=y
+CONFIG_USB_STORAGE=y
+CONFIG_USB_HSIC_USB3503=y
+CONFIG_NOP_USB_XCEIV=y
+CONFIG_USB_ULPI=y
+CONFIG_USB_GADGET=y
+CONFIG_USB_RENESAS_USBHS_UDC=y
+CONFIG_USB_RENESAS_USB3=y
+CONFIG_USB_SNP_UDC_PLAT=y
+CONFIG_USB_BDC_UDC=y
+CONFIG_MMC=y
+CONFIG_MMC_SDHI=y
+CONFIG_NEW_LEDS=y
+CONFIG_LEDS_CLASS=y
+CONFIG_LEDS_GPIO=y
+CONFIG_LEDS_PWM=y
+CONFIG_LEDS_TRIGGERS=y
+CONFIG_LEDS_TRIGGER_HEARTBEAT=y
+CONFIG_LEDS_TRIGGER_CPU=y
+CONFIG_LEDS_TRIGGER_DEFAULT_ON=y
+CONFIG_EDAC=y
+CONFIG_RTC_CLASS=y
+CONFIG_RTC_DRV_RX8581=y
+CONFIG_DMADEVICES=y
+CONFIG_RCAR_DMAC=y
+CONFIG_RENESAS_USB_DMAC=y
+CONFIG_VFIO=y
+CONFIG_VFIO_PCI=y
+CONFIG_VIRTIO_PCI=y
+CONFIG_VIRTIO_BALLOON=y
+CONFIG_VIRTIO_MMIO=y
+CONFIG_CHROME_PLATFORMS=y
+CONFIG_COMMON_CLK_CS2000_CP=y
+# CONFIG_COMMON_CLK_XGENE is not set
+CONFIG_COMMON_CLK_VC5=y
+CONFIG_CLK_RCAR_USB2_CLOCK_SEL=y
+CONFIG_HWSPINLOCK=y
+# CONFIG_FSL_ERRATUM_A008585 is not set
+# CONFIG_HISILICON_ERRATUM_161010101 is not set
+# CONFIG_ARM64_ERRATUM_858921 is not set
+CONFIG_MAILBOX=y
+CONFIG_IOMMU_IO_PGTABLE_LPAE=y
+CONFIG_EXTCON_USB_GPIO=y
+CONFIG_IIO=y
+CONFIG_MAX9611=y
+CONFIG_PWM=y
+CONFIG_PWM_RCAR=y
+CONFIG_RESET_CONTROLLER=y
+CONFIG_PHY_RCAR_GEN3_PCIE=y
+CONFIG_PHY_RCAR_GEN3_USB2=y
+CONFIG_PHY_RCAR_GEN3_USB3=y
+CONFIG_TEE=y
+CONFIG_OPTEE=y
+CONFIG_EXT4_FS=y
+CONFIG_EXT4_FS_POSIX_ACL=y
+CONFIG_FANOTIFY=y
+CONFIG_QUOTA=y
+CONFIG_AUTOFS4_FS=y
+CONFIG_VFAT_FS=y
+CONFIG_TMPFS=y
+CONFIG_HUGETLBFS=y
+CONFIG_CONFIGFS_FS=y
+CONFIG_SQUASHFS=y
+CONFIG_NFS_FS=y
+CONFIG_NFS_V4=y
+CONFIG_NFS_V4_1=y
+CONFIG_NFS_V4_2=y
+CONFIG_ROOT_NFS=y
+CONFIG_NLS_CODEPAGE_437=y
+CONFIG_NLS_ISO8859_1=y
+CONFIG_CRYPTO_ANSI_CPRNG=y
+# CONFIG_CRYPTO_DEV_VIRTIO is not set
+CONFIG_CRYPTO_DEV_CCREE=y
+CONFIG_PRINTK_TIME=y
+CONFIG_MAGIC_SYSRQ=y
+CONFIG_DEBUG_KERNEL=y
+# CONFIG_SCHED_DEBUG is not set
+# CONFIG_DEBUG_PREEMPT is not set
+CONFIG_PROVE_LOCKING=y
+# CONFIG_FTRACE is not set
diff --git a/wic/hihope-rzg2m.wks b/wic/hihope-rzg2m.wks
new file mode 100644
index 0000000..c0a9f77
--- /dev/null
+++ b/wic/hihope-rzg2m.wks
@@ -0,0 +1,15 @@
+#
+# CIP Core, generic profile
+#
+# Copyright (c) Siemens AG, 2019
+#
+# Authors:
+# Quirin Gylstorff <quirin.gylstorff@siemens.com>
+#
+# SPDX-License-Identifier: MIT
+#
+
+part /boot --source bootimg-partition --ondisk mmcblk0 --fstype vfat --label boot --align 1 --size 32M --extra-space 0
+
+# Rootfs partition
+part / --source rootfs --ondisk mmcblk0 --fstype ext4 --label root --align 1024 --size 2G --active
--
2.20.1
^ permalink raw reply related [flat|nested] 22+ messages in thread* [cip-dev] [isar-cip-core PATCH 3/4] hihope-rzg2m: Add board support
2019-11-06 12:44 ` [cip-dev] [isar-cip-core PATCH 3/4] hihope-rzg2m: Add board support Q. Gylstorff
@ 2019-11-06 15:38 ` Chris Paterson
2019-11-06 15:53 ` Gylstorff Quirin
0 siblings, 1 reply; 22+ messages in thread
From: Chris Paterson @ 2019-11-06 15:38 UTC (permalink / raw)
To: cip-dev
Hello Quirin,
Thank you for the patch.
> From: cip-dev-bounces at lists.cip-project.org <cip-dev-bounces@lists.cip-
> project.org> On Behalf Of Q. Gylstorff
> Sent: 06 November 2019 12:45
>
> From: Quirin Gylstorff <quirin.gylstorff@siemens.com>
>
> The hihope-rzg2m is a ARM64 reference platform for the CIP project.
>
> Signed-off-by: Quirin Gylstorff <quirin.gylstorff@siemens.com>
> ---
> board-rzg2m.yml | 16 +
> conf/machine/hihope-rzg2m.conf | 17 +
> .../linux/files/hihope-rzg2m_defconfig | 330 ++++++++++++++++++
> wic/hihope-rzg2m.wks | 15 +
> 4 files changed, 378 insertions(+)
> create mode 100644 board-rzg2m.yml
> create mode 100644 conf/machine/hihope-rzg2m.conf
> create mode 100644 recipes-kernel/linux/files/hihope-rzg2m_defconfig
> create mode 100644 wic/hihope-rzg2m.wks
>
> diff --git a/board-rzg2m.yml b/board-rzg2m.yml
> new file mode 100644
> index 0000000..f68c7b8
> --- /dev/null
> +++ b/board-rzg2m.yml
> @@ -0,0 +1,16 @@
> +#
> +# CIP Core, generic profile
> +#
> +# Copyright (c) Siemens AG, 2019
> +#
> +# Authors:
> +# Quirin Gylstorff <quirin.gylstorff@siemens.com>
> +#
> +# SPDX-License-Identifier: MIT
> +#
> +
> +header:
> + version: 8
> +
> +machine: hihope-rzg2m
> +target: cip-core-image
> diff --git a/conf/machine/hihope-rzg2m.conf b/conf/machine/hihope-
> rzg2m.conf
> new file mode 100644
> index 0000000..5c456c7
> --- /dev/null
> +++ b/conf/machine/hihope-rzg2m.conf
> @@ -0,0 +1,17 @@
> +#
> +# CIP Core, generic profile
> +#
> +# Copyright (c) Siemens AG, 2019
> +#
> +# Authors:
> +# Quirin Gylstorff <quirin.gylstorff@siemens.com>
> +#
> +# SPDX-License-Identifier: MIT
> +#
> +
> +DISTRO_ARCH = "arm64"
> +
> +IMAGE_TYPE ?= "wic-img"
> +
> +DTB_FILE = "r8a774a1-hihope-rzg2m.dtb"
Should be r8a774a1-hihope-rzg2m-ex.dtb. The 'ex' is the sub-board that adds Ethernet/PCIe/CAN etc.
> +IMAGE_BOOT_FILES = "${KERNEL_IMAGE} ${DTB_FILE}"
> diff --git a/recipes-kernel/linux/files/hihope-rzg2m_defconfig b/recipes-
> kernel/linux/files/hihope-rzg2m_defconfig
> new file mode 100644
> index 0000000..f35793c
> --- /dev/null
> +++ b/recipes-kernel/linux/files/hihope-rzg2m_defconfig
Just to check, where did you copy this config from?
Is there a way that the configuration could be taken directly from cip-kernel-config[0] rather than creating a copy that will need separate maintenance here?
I ask because there is currently a merge request open[1] that will update renesas_defconfig.
[0] https://gitlab.com/cip-project/cip-kernel/cip-kernel-config/blob/master/4.19.y-cip/arm64/renesas_defconfig
[1] https://gitlab.com/cip-project/cip-kernel/cip-kernel-config/merge_requests/15
Kind regards, Chris
> @@ -0,0 +1,330 @@
> +CONFIG_SYSVIPC=y
> +CONFIG_POSIX_MQUEUE=y
> +CONFIG_AUDIT=y
> +CONFIG_NO_HZ_IDLE=y
> +CONFIG_HIGH_RES_TIMERS=y
> +CONFIG_PREEMPT=y
> +CONFIG_IRQ_TIME_ACCOUNTING=y
> +CONFIG_BSD_PROCESS_ACCT=y
> +CONFIG_BSD_PROCESS_ACCT_V3=y
> +CONFIG_TASKSTATS=y
> +CONFIG_TASK_DELAY_ACCT=y
> +CONFIG_TASK_XACCT=y
> +CONFIG_TASK_IO_ACCOUNTING=y
> +CONFIG_IKCONFIG=y
> +CONFIG_IKCONFIG_PROC=y
> +CONFIG_MEMCG=y
> +CONFIG_MEMCG_SWAP=y
> +CONFIG_BLK_CGROUP=y
> +CONFIG_CGROUP_PIDS=y
> +CONFIG_CGROUP_HUGETLB=y
> +CONFIG_CPUSETS=y
> +CONFIG_CGROUP_DEVICE=y
> +CONFIG_CGROUP_CPUACCT=y
> +CONFIG_CGROUP_PERF=y
> +CONFIG_USER_NS=y
> +CONFIG_SCHED_AUTOGROUP=y
> +CONFIG_BLK_DEV_INITRD=y
> +# CONFIG_COMPAT_BRK is not set
> +CONFIG_PROFILING=y
> +CONFIG_ARCH_RENESAS=y
> +CONFIG_ARCH_R8A774A1=y
> +CONFIG_ARCH_R8A774C0=y
> +CONFIG_PCI=y
> +CONFIG_PCIEPORTBUS=y
> +CONFIG_HOTPLUG_PCI_PCIE=y
> +CONFIG_PCI_IOV=y
> +CONFIG_HOTPLUG_PCI=y
> +CONFIG_PCIE_RCAR=y
> +CONFIG_PCI_HOST_GENERIC=y
> +# CONFIG_CAVIUM_ERRATUM_22375 is not set
> +# CONFIG_CAVIUM_ERRATUM_23154 is not set
> +# CONFIG_CAVIUM_ERRATUM_27456 is not set
> +# CONFIG_CAVIUM_ERRATUM_30115 is not set
> +# CONFIG_QCOM_FALKOR_ERRATUM_1003 is not set
> +# CONFIG_QCOM_FALKOR_ERRATUM_1009 is not set
> +# CONFIG_QCOM_QDF2400_ERRATUM_0065 is not set
> +# CONFIG_SOCIONEXT_SYNQUACER_PREITS is not set
> +# CONFIG_HISILICON_ERRATUM_161600802 is not set
> +CONFIG_ARM64_VA_BITS_48=y
> +CONFIG_SCHED_MC=y
> +CONFIG_NR_CPUS=8
> +CONFIG_SECCOMP=y
> +CONFIG_KEXEC=y
> +CONFIG_CRASH_DUMP=y
> +CONFIG_XEN=y
> +# CONFIG_ARM64_LSE_ATOMICS is not set
> +# CONFIG_ARM64_RAS_EXTN is not set
> +CONFIG_COMPAT=y
> +CONFIG_HIBERNATION=y
> +CONFIG_WQ_POWER_EFFICIENT_DEFAULT=y
> +CONFIG_CPU_IDLE=y
> +CONFIG_ARM_CPUIDLE=y
> +CONFIG_CPU_FREQ=y
> +CONFIG_CPUFREQ_DT=y
> +# CONFIG_DMIID is not set
> +CONFIG_VIRTUALIZATION=y
> +CONFIG_KVM=y
> +CONFIG_ARM64_CRYPTO=y
> +CONFIG_CRYPTO_SHA1_ARM64_CE=y
> +CONFIG_CRYPTO_SHA2_ARM64_CE=y
> +CONFIG_CRYPTO_GHASH_ARM64_CE=y
> +CONFIG_CRYPTO_AES_ARM64_CE_CCM=y
> +CONFIG_CRYPTO_AES_ARM64_CE_BLK=y
> +CONFIG_JUMP_LABEL=y
> +CONFIG_BLK_DEV_INTEGRITY=y
> +# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
> +CONFIG_KSM=y
> +CONFIG_TRANSPARENT_HUGEPAGE=y
> +CONFIG_CMA=y
> +CONFIG_NET=y
> +CONFIG_PACKET=y
> +CONFIG_UNIX=y
> +CONFIG_INET=y
> +CONFIG_IP_MULTICAST=y
> +CONFIG_IP_PNP=y
> +CONFIG_IP_PNP_DHCP=y
> +CONFIG_IP_PNP_BOOTP=y
> +# CONFIG_IPV6 is not set
> +CONFIG_NETFILTER=y
> +CONFIG_CAN=y
> +CONFIG_CAN_RCAR=y
> +CONFIG_CAN_RCAR_CANFD=y
> +CONFIG_DEVTMPFS=y
> +CONFIG_DEVTMPFS_MOUNT=y
> +CONFIG_DMA_CMA=y
> +CONFIG_CMA_SIZE_MBYTES=128
> +CONFIG_CMA_ALIGNMENT=9
> +CONFIG_MTD=y
> +CONFIG_MTD_BLOCK=y
> +CONFIG_MTD_SPI_NOR=y
> +CONFIG_BLK_DEV_LOOP=y
> +CONFIG_VIRTIO_BLK=y
> +CONFIG_SRAM=y
> +# CONFIG_SCSI_PROC_FS is not set
> +CONFIG_BLK_DEV_SD=y
> +CONFIG_SCSI_SAS_LIBSAS=y
> +CONFIG_SCSI_SAS_ATA=y
> +CONFIG_ATA=y
> +# CONFIG_SATA_PMP is not set
> +CONFIG_SATA_RCAR=y
> +CONFIG_NETDEVICES=y
> +CONFIG_TUN=y
> +CONFIG_VIRTIO_NET=y
> +# CONFIG_CAVIUM_PTP is not set
> +CONFIG_RAVB=y
> +CONFIG_MDIO_BUS_MUX_MMIOREG=y
> +CONFIG_MICREL_PHY=y
> +CONFIG_REALTEK_PHY=y
> +# CONFIG_WLAN is not set
> +CONFIG_INPUT_MATRIXKMAP=y
> +CONFIG_INPUT_EVDEV=y
> +# CONFIG_KEYBOARD_ATKBD is not set
> +CONFIG_KEYBOARD_GPIO=y
> +# CONFIG_MOUSE_PS2 is not set
> +CONFIG_INPUT_MISC=y
> +# CONFIG_SERIO is not set
> +CONFIG_SERIAL_SH_SCI=y
> +CONFIG_VIRTIO_CONSOLE=y
> +# CONFIG_HW_RANDOM is not set
> +CONFIG_I2C_CHARDEV=y
> +CONFIG_I2C_MUX=y
> +CONFIG_I2C_MUX_PCA954x=y
> +CONFIG_I2C_DESIGNWARE_PLATFORM=y
> +CONFIG_I2C_SH_MOBILE=y
> +CONFIG_I2C_RCAR=y
> +CONFIG_SPI=y
> +CONFIG_SPI_SH_MSIOF=y
> +CONFIG_SPI_SPIDEV=y
> +CONFIG_SPMI=y
> +CONFIG_PINCTRL_SINGLE=y
> +CONFIG_GPIO_GENERIC_PLATFORM=y
> +CONFIG_GPIO_RCAR=y
> +CONFIG_GPIO_PCA953X=y
> +CONFIG_GPIO_BD9571MWV=y
> +CONFIG_THERMAL=y
> +CONFIG_THERMAL_GOV_POWER_ALLOCATOR=y
> +CONFIG_CPU_THERMAL=y
> +CONFIG_THERMAL_EMULATION=y
> +CONFIG_RCAR_THERMAL=y
> +CONFIG_RCAR_GEN3_THERMAL=y
> +CONFIG_WATCHDOG=y
> +CONFIG_RENESAS_WDT=y
> +CONFIG_MFD_BD9571MWV=y
> +CONFIG_REGULATOR=y
> +CONFIG_REGULATOR_FIXED_VOLTAGE=y
> +CONFIG_REGULATOR_BD9571MWV=y
> +CONFIG_REGULATOR_GPIO=y
> +CONFIG_REGULATOR_PWM=y
> +CONFIG_MEDIA_SUPPORT=y
> +CONFIG_MEDIA_CAMERA_SUPPORT=y
> +CONFIG_MEDIA_SDR_SUPPORT=y
> +CONFIG_MEDIA_CONTROLLER=y
> +CONFIG_VIDEO_V4L2_SUBDEV_API=y
> +CONFIG_V4L_PLATFORM_DRIVERS=y
> +CONFIG_VIDEO_RCAR_CSI2=y
> +CONFIG_VIDEO_RCAR_VIN=y
> +CONFIG_V4L_MEM2MEM_DRIVERS=y
> +CONFIG_VIDEO_RENESAS_FDP1=y
> +CONFIG_VIDEO_RENESAS_FCP=y
> +CONFIG_VIDEO_RENESAS_VSP1=y
> +CONFIG_SDR_PLATFORM_DRIVERS=y
> +CONFIG_VIDEO_RCAR_DRIF=y
> +# CONFIG_MEDIA_SUBDRV_AUTOSELECT is not set
> +CONFIG_VIDEO_ADV748X=y
> +# CONFIG_MEDIA_TUNER_SIMPLE is not set
> +# CONFIG_MEDIA_TUNER_TDA18250 is not set
> +# CONFIG_MEDIA_TUNER_TDA8290 is not set
> +# CONFIG_MEDIA_TUNER_TDA827X is not set
> +# CONFIG_MEDIA_TUNER_TDA18271 is not set
> +# CONFIG_MEDIA_TUNER_TDA9887 is not set
> +# CONFIG_MEDIA_TUNER_TEA5761 is not set
> +# CONFIG_MEDIA_TUNER_TEA5767 is not set
> +# CONFIG_MEDIA_TUNER_MSI001 is not set
> +# CONFIG_MEDIA_TUNER_MT20XX is not set
> +# CONFIG_MEDIA_TUNER_MT2060 is not set
> +# CONFIG_MEDIA_TUNER_MT2063 is not set
> +# CONFIG_MEDIA_TUNER_MT2266 is not set
> +# CONFIG_MEDIA_TUNER_MT2131 is not set
> +# CONFIG_MEDIA_TUNER_QT1010 is not set
> +# CONFIG_MEDIA_TUNER_XC2028 is not set
> +# CONFIG_MEDIA_TUNER_XC5000 is not set
> +# CONFIG_MEDIA_TUNER_XC4000 is not set
> +# CONFIG_MEDIA_TUNER_MXL5005S is not set
> +# CONFIG_MEDIA_TUNER_MXL5007T is not set
> +# CONFIG_MEDIA_TUNER_MC44S803 is not set
> +# CONFIG_MEDIA_TUNER_MAX2165 is not set
> +# CONFIG_MEDIA_TUNER_TDA18218 is not set
> +# CONFIG_MEDIA_TUNER_FC0011 is not set
> +# CONFIG_MEDIA_TUNER_FC0012 is not set
> +# CONFIG_MEDIA_TUNER_FC0013 is not set
> +# CONFIG_MEDIA_TUNER_TDA18212 is not set
> +# CONFIG_MEDIA_TUNER_E4000 is not set
> +# CONFIG_MEDIA_TUNER_FC2580 is not set
> +# CONFIG_MEDIA_TUNER_M88RS6000T is not set
> +# CONFIG_MEDIA_TUNER_TUA9001 is not set
> +# CONFIG_MEDIA_TUNER_SI2157 is not set
> +# CONFIG_MEDIA_TUNER_IT913X is not set
> +# CONFIG_MEDIA_TUNER_R820T is not set
> +# CONFIG_MEDIA_TUNER_MXL301RF is not set
> +# CONFIG_MEDIA_TUNER_QM1D1C0042 is not set
> +# CONFIG_MEDIA_TUNER_QM1D1B0004 is not set
> +CONFIG_DRM=y
> +CONFIG_DRM_I2C_NXP_TDA998X=y
> +CONFIG_DRM_RCAR_DU=y
> +CONFIG_DRM_RCAR_DW_HDMI=y
> +CONFIG_DRM_RCAR_LVDS=y
> +CONFIG_DRM_DUMB_VGA_DAC=y
> +CONFIG_DRM_THINE_THC63LVD1024=y
> +CONFIG_DRM_DW_HDMI_AHB_AUDIO=y
> +CONFIG_DRM_DW_HDMI_I2S_AUDIO=y
> +CONFIG_DRM_DW_HDMI_CEC=y
> +CONFIG_FB_MODE_HELPERS=y
> +CONFIG_BACKLIGHT_LCD_SUPPORT=y
> +# CONFIG_LCD_CLASS_DEVICE is not set
> +# CONFIG_BACKLIGHT_GENERIC is not set
> +CONFIG_BACKLIGHT_PWM=y
> +CONFIG_LOGO=y
> +# CONFIG_LOGO_LINUX_MONO is not set
> +# CONFIG_LOGO_LINUX_VGA16 is not set
> +CONFIG_SOUND=y
> +CONFIG_SND=y
> +# CONFIG_SND_SPI is not set
> +# CONFIG_SND_USB is not set
> +CONFIG_SND_SOC=y
> +CONFIG_SND_SOC_RCAR=y
> +CONFIG_SND_SOC_AK4613=y
> +CONFIG_SND_SOC_PCM3168A_I2C=y
> +CONFIG_SND_SIMPLE_CARD=y
> +CONFIG_SND_SIMPLE_SCU_CARD=y
> +CONFIG_SND_AUDIO_GRAPH_CARD=y
> +CONFIG_USB=y
> +CONFIG_USB_OTG=y
> +CONFIG_USB_XHCI_HCD=y
> +CONFIG_USB_XHCI_PLATFORM=y
> +CONFIG_USB_EHCI_HCD=y
> +CONFIG_USB_EHCI_ROOT_HUB_TT=y
> +CONFIG_USB_EHCI_HCD_PLATFORM=y
> +CONFIG_USB_OHCI_HCD=y
> +CONFIG_USB_OHCI_HCD_PLATFORM=y
> +CONFIG_USB_RENESAS_USBHS_HCD=y
> +CONFIG_USB_RENESAS_USBHS=y
> +CONFIG_USB_STORAGE=y
> +CONFIG_USB_HSIC_USB3503=y
> +CONFIG_NOP_USB_XCEIV=y
> +CONFIG_USB_ULPI=y
> +CONFIG_USB_GADGET=y
> +CONFIG_USB_RENESAS_USBHS_UDC=y
> +CONFIG_USB_RENESAS_USB3=y
> +CONFIG_USB_SNP_UDC_PLAT=y
> +CONFIG_USB_BDC_UDC=y
> +CONFIG_MMC=y
> +CONFIG_MMC_SDHI=y
> +CONFIG_NEW_LEDS=y
> +CONFIG_LEDS_CLASS=y
> +CONFIG_LEDS_GPIO=y
> +CONFIG_LEDS_PWM=y
> +CONFIG_LEDS_TRIGGERS=y
> +CONFIG_LEDS_TRIGGER_HEARTBEAT=y
> +CONFIG_LEDS_TRIGGER_CPU=y
> +CONFIG_LEDS_TRIGGER_DEFAULT_ON=y
> +CONFIG_EDAC=y
> +CONFIG_RTC_CLASS=y
> +CONFIG_RTC_DRV_RX8581=y
> +CONFIG_DMADEVICES=y
> +CONFIG_RCAR_DMAC=y
> +CONFIG_RENESAS_USB_DMAC=y
> +CONFIG_VFIO=y
> +CONFIG_VFIO_PCI=y
> +CONFIG_VIRTIO_PCI=y
> +CONFIG_VIRTIO_BALLOON=y
> +CONFIG_VIRTIO_MMIO=y
> +CONFIG_CHROME_PLATFORMS=y
> +CONFIG_COMMON_CLK_CS2000_CP=y
> +# CONFIG_COMMON_CLK_XGENE is not set
> +CONFIG_COMMON_CLK_VC5=y
> +CONFIG_CLK_RCAR_USB2_CLOCK_SEL=y
> +CONFIG_HWSPINLOCK=y
> +# CONFIG_FSL_ERRATUM_A008585 is not set
> +# CONFIG_HISILICON_ERRATUM_161010101 is not set
> +# CONFIG_ARM64_ERRATUM_858921 is not set
> +CONFIG_MAILBOX=y
> +CONFIG_IOMMU_IO_PGTABLE_LPAE=y
> +CONFIG_EXTCON_USB_GPIO=y
> +CONFIG_IIO=y
> +CONFIG_MAX9611=y
> +CONFIG_PWM=y
> +CONFIG_PWM_RCAR=y
> +CONFIG_RESET_CONTROLLER=y
> +CONFIG_PHY_RCAR_GEN3_PCIE=y
> +CONFIG_PHY_RCAR_GEN3_USB2=y
> +CONFIG_PHY_RCAR_GEN3_USB3=y
> +CONFIG_TEE=y
> +CONFIG_OPTEE=y
> +CONFIG_EXT4_FS=y
> +CONFIG_EXT4_FS_POSIX_ACL=y
> +CONFIG_FANOTIFY=y
> +CONFIG_QUOTA=y
> +CONFIG_AUTOFS4_FS=y
> +CONFIG_VFAT_FS=y
> +CONFIG_TMPFS=y
> +CONFIG_HUGETLBFS=y
> +CONFIG_CONFIGFS_FS=y
> +CONFIG_SQUASHFS=y
> +CONFIG_NFS_FS=y
> +CONFIG_NFS_V4=y
> +CONFIG_NFS_V4_1=y
> +CONFIG_NFS_V4_2=y
> +CONFIG_ROOT_NFS=y
> +CONFIG_NLS_CODEPAGE_437=y
> +CONFIG_NLS_ISO8859_1=y
> +CONFIG_CRYPTO_ANSI_CPRNG=y
> +# CONFIG_CRYPTO_DEV_VIRTIO is not set
> +CONFIG_CRYPTO_DEV_CCREE=y
> +CONFIG_PRINTK_TIME=y
> +CONFIG_MAGIC_SYSRQ=y
> +CONFIG_DEBUG_KERNEL=y
> +# CONFIG_SCHED_DEBUG is not set
> +# CONFIG_DEBUG_PREEMPT is not set
> +CONFIG_PROVE_LOCKING=y
> +# CONFIG_FTRACE is not set
> diff --git a/wic/hihope-rzg2m.wks b/wic/hihope-rzg2m.wks
> new file mode 100644
> index 0000000..c0a9f77
> --- /dev/null
> +++ b/wic/hihope-rzg2m.wks
> @@ -0,0 +1,15 @@
> +#
> +# CIP Core, generic profile
> +#
> +# Copyright (c) Siemens AG, 2019
> +#
> +# Authors:
> +# Quirin Gylstorff <quirin.gylstorff@siemens.com>
> +#
> +# SPDX-License-Identifier: MIT
> +#
> +
> +part /boot --source bootimg-partition --ondisk mmcblk0 --fstype vfat --label
> boot --align 1 --size 32M --extra-space 0
> +
> +# Rootfs partition
> +part / --source rootfs --ondisk mmcblk0 --fstype ext4 --label root --align 1024 --
> size 2G --active
> --
> 2.20.1
>
> _______________________________________________
> cip-dev mailing list
> cip-dev at lists.cip-project.org
> https://lists.cip-project.org/mailman/listinfo/cip-dev
^ permalink raw reply [flat|nested] 22+ messages in thread* [cip-dev] [isar-cip-core PATCH 3/4] hihope-rzg2m: Add board support
2019-11-06 15:38 ` Chris Paterson
@ 2019-11-06 15:53 ` Gylstorff Quirin
2019-11-07 2:29 ` kazuhiro3.hayashi at toshiba.co.jp
0 siblings, 1 reply; 22+ messages in thread
From: Gylstorff Quirin @ 2019-11-06 15:53 UTC (permalink / raw)
To: cip-dev
On 11/6/19 4:38 PM, Chris Paterson wrote:
> Hello Quirin,
>
> Thank you for the patch.
>
>> From: cip-dev-bounces at lists.cip-project.org <cip-dev-bounces@lists.cip-
>> project.org> On Behalf Of Q. Gylstorff
>> Sent: 06 November 2019 12:45
>>
>> From: Quirin Gylstorff <quirin.gylstorff@siemens.com>
>>
>> The hihope-rzg2m is a ARM64 reference platform for the CIP project.
>>
>> Signed-off-by: Quirin Gylstorff <quirin.gylstorff@siemens.com>
>> ---
>> board-rzg2m.yml | 16 +
>> conf/machine/hihope-rzg2m.conf | 17 +
>> .../linux/files/hihope-rzg2m_defconfig | 330 ++++++++++++++++++
>> wic/hihope-rzg2m.wks | 15 +
>> 4 files changed, 378 insertions(+)
>> create mode 100644 board-rzg2m.yml
>> create mode 100644 conf/machine/hihope-rzg2m.conf
>> create mode 100644 recipes-kernel/linux/files/hihope-rzg2m_defconfig
>> create mode 100644 wic/hihope-rzg2m.wks
>>
>> diff --git a/board-rzg2m.yml b/board-rzg2m.yml
>> new file mode 100644
>> index 0000000..f68c7b8
>> --- /dev/null
>> +++ b/board-rzg2m.yml
>> @@ -0,0 +1,16 @@
>> +#
>> +# CIP Core, generic profile
>> +#
>> +# Copyright (c) Siemens AG, 2019
>> +#
>> +# Authors:
>> +# Quirin Gylstorff <quirin.gylstorff@siemens.com>
>> +#
>> +# SPDX-License-Identifier: MIT
>> +#
>> +
>> +header:
>> + version: 8
>> +
>> +machine: hihope-rzg2m
>> +target: cip-core-image
>> diff --git a/conf/machine/hihope-rzg2m.conf b/conf/machine/hihope-
>> rzg2m.conf
>> new file mode 100644
>> index 0000000..5c456c7
>> --- /dev/null
>> +++ b/conf/machine/hihope-rzg2m.conf
>> @@ -0,0 +1,17 @@
>> +#
>> +# CIP Core, generic profile
>> +#
>> +# Copyright (c) Siemens AG, 2019
>> +#
>> +# Authors:
>> +# Quirin Gylstorff <quirin.gylstorff@siemens.com>
>> +#
>> +# SPDX-License-Identifier: MIT
>> +#
>> +
>> +DISTRO_ARCH = "arm64"
>> +
>> +IMAGE_TYPE ?= "wic-img"
>> +
>> +DTB_FILE = "r8a774a1-hihope-rzg2m.dtb"
>
> Should be r8a774a1-hihope-rzg2m-ex.dtb. The 'ex' is the sub-board that adds Ethernet/PCIe/CAN etc.
OK, I will change both occurences and post a version 2.
>
>> +IMAGE_BOOT_FILES = "${KERNEL_IMAGE} ${DTB_FILE}"
>> diff --git a/recipes-kernel/linux/files/hihope-rzg2m_defconfig b/recipes-
>> kernel/linux/files/hihope-rzg2m_defconfig
>> new file mode 100644
>> index 0000000..f35793c
>> --- /dev/null
>> +++ b/recipes-kernel/linux/files/hihope-rzg2m_defconfig
>
> Just to check, where did you copy this config from?
I used [0] as base.
>
> Is there a way that the configuration could be taken directly from cip-kernel-config[0] rather than creating a copy that will need separate maintenance here?
> I ask because there is currently a merge request open[1] that will update renesas_defconfig.
>
> [0] https://gitlab.com/cip-project/cip-kernel/cip-kernel-config/blob/master/4.19.y-cip/arm64/renesas_defconfig
> [1] https://gitlab.com/cip-project/cip-kernel/cip-kernel-config/merge_requests/15
>
I will look into it using the cip-kernel-config instead of using copies
in isar.
Quirin
^ permalink raw reply [flat|nested] 22+ messages in thread* [cip-dev] [isar-cip-core PATCH 3/4] hihope-rzg2m: Add board support
2019-11-06 15:53 ` Gylstorff Quirin
@ 2019-11-07 2:29 ` kazuhiro3.hayashi at toshiba.co.jp
2019-11-07 15:53 ` Gylstorff Quirin
0 siblings, 1 reply; 22+ messages in thread
From: kazuhiro3.hayashi at toshiba.co.jp @ 2019-11-07 2:29 UTC (permalink / raw)
To: cip-dev
Hello Quirin,
> I will look into it using the cip-kernel-config instead of using copies
> in isar.
Are you planning to "fetch" required config(s) for each target from cip-kernel-config?
or, keep copies of the configs in isar-cip-core then synchronize them at the specific point?
Deby also has its own kernel configs (arm64 defconfig + Tiny hihope-rzg2m.config)
for HiHope RZG2M:
https://gitlab.com/cip-project/cip-core/deby/blob/cip-core-buster/meta-hihope-rzg2m/recipes-kernel/linux/linux-base_git.bbappend
but they also should be replaced by the common kernel configs in CIP.
As the first step, I would provide configs by the same way as isar-cip-core.
Best regards,
Kazu
> On 11/6/19 4:38 PM, Chris Paterson wrote:
> > Hello Quirin,
> >
> > Thank you for the patch.
> >
> >> From: cip-dev-bounces at lists.cip-project.org <cip-dev-bounces@lists.cip-
> >> project.org> On Behalf Of Q. Gylstorff
> >> Sent: 06 November 2019 12:45
> >>
> >> From: Quirin Gylstorff <quirin.gylstorff@siemens.com>
> >>
> >> The hihope-rzg2m is a ARM64 reference platform for the CIP project.
> >>
> >> Signed-off-by: Quirin Gylstorff <quirin.gylstorff@siemens.com>
> >> ---
> >> board-rzg2m.yml | 16 +
> >> conf/machine/hihope-rzg2m.conf | 17 +
> >> .../linux/files/hihope-rzg2m_defconfig | 330 ++++++++++++++++++
> >> wic/hihope-rzg2m.wks | 15 +
> >> 4 files changed, 378 insertions(+)
> >> create mode 100644 board-rzg2m.yml
> >> create mode 100644 conf/machine/hihope-rzg2m.conf
> >> create mode 100644 recipes-kernel/linux/files/hihope-rzg2m_defconfig
> >> create mode 100644 wic/hihope-rzg2m.wks
> >>
> >> diff --git a/board-rzg2m.yml b/board-rzg2m.yml
> >> new file mode 100644
> >> index 0000000..f68c7b8
> >> --- /dev/null
> >> +++ b/board-rzg2m.yml
> >> @@ -0,0 +1,16 @@
> >> +#
> >> +# CIP Core, generic profile
> >> +#
> >> +# Copyright (c) Siemens AG, 2019
> >> +#
> >> +# Authors:
> >> +# Quirin Gylstorff <quirin.gylstorff@siemens.com>
> >> +#
> >> +# SPDX-License-Identifier: MIT
> >> +#
> >> +
> >> +header:
> >> + version: 8
> >> +
> >> +machine: hihope-rzg2m
> >> +target: cip-core-image
> >> diff --git a/conf/machine/hihope-rzg2m.conf b/conf/machine/hihope-
> >> rzg2m.conf
> >> new file mode 100644
> >> index 0000000..5c456c7
> >> --- /dev/null
> >> +++ b/conf/machine/hihope-rzg2m.conf
> >> @@ -0,0 +1,17 @@
> >> +#
> >> +# CIP Core, generic profile
> >> +#
> >> +# Copyright (c) Siemens AG, 2019
> >> +#
> >> +# Authors:
> >> +# Quirin Gylstorff <quirin.gylstorff@siemens.com>
> >> +#
> >> +# SPDX-License-Identifier: MIT
> >> +#
> >> +
> >> +DISTRO_ARCH = "arm64"
> >> +
> >> +IMAGE_TYPE ?= "wic-img"
> >> +
> >> +DTB_FILE = "r8a774a1-hihope-rzg2m.dtb"
> >
> > Should be r8a774a1-hihope-rzg2m-ex.dtb. The 'ex' is the sub-board that adds Ethernet/PCIe/CAN etc.
>
> OK, I will change both occurences and post a version 2.
> >
> >> +IMAGE_BOOT_FILES = "${KERNEL_IMAGE} ${DTB_FILE}"
> >> diff --git a/recipes-kernel/linux/files/hihope-rzg2m_defconfig b/recipes-
> >> kernel/linux/files/hihope-rzg2m_defconfig
> >> new file mode 100644
> >> index 0000000..f35793c
> >> --- /dev/null
> >> +++ b/recipes-kernel/linux/files/hihope-rzg2m_defconfig
> >
> > Just to check, where did you copy this config from?
>
> I used [0] as base.
> >
> > Is there a way that the configuration could be taken directly from cip-kernel-config[0] rather than creating a copy
> that will need separate maintenance here?
> > I ask because there is currently a merge request open[1] that will update renesas_defconfig.
> >
> > [0] https://gitlab.com/cip-project/cip-kernel/cip-kernel-config/blob/master/4.19.y-cip/arm64/renesas_defconfig
> > [1] https://gitlab.com/cip-project/cip-kernel/cip-kernel-config/merge_requests/15
> >
> I will look into it using the cip-kernel-config instead of using copies
> in isar.
>
>
> Quirin
> _______________________________________________
> cip-dev mailing list
> cip-dev at lists.cip-project.org
> https://lists.cip-project.org/mailman/listinfo/cip-dev
^ permalink raw reply [flat|nested] 22+ messages in thread* [cip-dev] [isar-cip-core PATCH 3/4] hihope-rzg2m: Add board support
2019-11-07 2:29 ` kazuhiro3.hayashi at toshiba.co.jp
@ 2019-11-07 15:53 ` Gylstorff Quirin
2019-11-08 21:29 ` Pavel Machek
2019-11-11 6:18 ` kazuhiro3.hayashi at toshiba.co.jp
0 siblings, 2 replies; 22+ messages in thread
From: Gylstorff Quirin @ 2019-11-07 15:53 UTC (permalink / raw)
To: cip-dev
On 11/7/19 3:29 AM, kazuhiro3.hayashi at toshiba.co.jp wrote:
> Hello Quirin,
>
>> I will look into it using the cip-kernel-config instead of using copies
>> in isar.
>
> Are you planning to "fetch" required config(s) for each target from cip-kernel-config?
> or, keep copies of the configs in isar-cip-core then synchronize them at the specific point?
I try to fetch the configuration for each target from cip-kernel-config.
Currently I need to patch the config as Isar doesn't allow setting
CONFIG_LOCALVERSION in the kernel configuration.
>
> Deby also has its own kernel configs (arm64 defconfig + Tiny hihope-rzg2m.config)
> for HiHope RZG2M:
> https://gitlab.com/cip-project/cip-core/deby/blob/cip-core-buster/meta-hihope-rzg2m/recipes-kernel/linux/linux-base_git.bbappend
> but they also should be replaced by the common kernel configs in CIP.
> As the first step, I would provide configs by the same way as isar-cip-core.
>
> Best regards,
> Kazu
>
>
Quirin
^ permalink raw reply [flat|nested] 22+ messages in thread
* [cip-dev] [isar-cip-core PATCH 3/4] hihope-rzg2m: Add board support
2019-11-07 15:53 ` Gylstorff Quirin
@ 2019-11-08 21:29 ` Pavel Machek
2019-11-11 6:18 ` kazuhiro3.hayashi at toshiba.co.jp
1 sibling, 0 replies; 22+ messages in thread
From: Pavel Machek @ 2019-11-08 21:29 UTC (permalink / raw)
To: cip-dev
Hi!
> > > I will look into it using the cip-kernel-config instead of using copies
> > > in isar.
> >
> > Are you planning to "fetch" required config(s) for each target from cip-kernel-config?
> > or, keep copies of the configs in isar-cip-core then synchronize them at the specific point?
>
> I try to fetch the configuration for each target from cip-kernel-config.
> Currently I need to patch the config as Isar doesn't allow setting
> CONFIG_LOCALVERSION in the kernel configuration.
I have feeling that configurations in cip-kernel-config are a good
start, but it is what we use for testing, and production needs may be
slightly different.
Best regards,
Pavel
--
DENX Software Engineering GmbH, Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
-------------- next part --------------
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^ permalink raw reply [flat|nested] 22+ messages in thread
* [cip-dev] [isar-cip-core PATCH 3/4] hihope-rzg2m: Add board support
2019-11-07 15:53 ` Gylstorff Quirin
2019-11-08 21:29 ` Pavel Machek
@ 2019-11-11 6:18 ` kazuhiro3.hayashi at toshiba.co.jp
1 sibling, 0 replies; 22+ messages in thread
From: kazuhiro3.hayashi at toshiba.co.jp @ 2019-11-11 6:18 UTC (permalink / raw)
To: cip-dev
Hello Quirin,
> On 11/7/19 3:29 AM, kazuhiro3.hayashi at toshiba.co.jp wrote:
> > Hello Quirin,
> >
> >> I will look into it using the cip-kernel-config instead of using copies
> >> in isar.
> >
> > Are you planning to "fetch" required config(s) for each target from cip-kernel-config?
> > or, keep copies of the configs in isar-cip-core then synchronize them at the specific point?
>
> I try to fetch the configuration for each target from cip-kernel-config.
Thanks!
As the first step, I will do the same way in deby to use existing configs in cip-kernel-config.
Best regards,
Kazu
> Currently I need to patch the config as Isar doesn't allow setting
> CONFIG_LOCALVERSION in the kernel configuration.
>
> >
> > Deby also has its own kernel configs (arm64 defconfig + Tiny hihope-rzg2m.config)
> > for HiHope RZG2M:
> >
> https://gitlab.com/cip-project/cip-core/deby/blob/cip-core-buster/meta-hihope-rzg2m/recipes-kernel/linux/linux-ba
> se_git.bbappend
> > but they also should be replaced by the common kernel configs in CIP.
> > As the first step, I would provide configs by the same way as isar-cip-core.
> >
> > Best regards,
> > Kazu
> >
> >
>
> Quirin
^ permalink raw reply [flat|nested] 22+ messages in thread
* [cip-dev] [isar-cip-core PATCH 4/4] ci: add hihope-rzg2m to ci chain
2019-11-06 12:44 [cip-dev] [isar-cip-core PATCH 0/4] Add rzg2m support Q. Gylstorff
` (2 preceding siblings ...)
2019-11-06 12:44 ` [cip-dev] [isar-cip-core PATCH 3/4] hihope-rzg2m: Add board support Q. Gylstorff
@ 2019-11-06 12:44 ` Q. Gylstorff
2019-11-06 15:43 ` Chris Paterson
2019-11-06 14:12 ` [cip-dev] [isar-cip-core PATCH 0/4] Add rzg2m support Jan Kiszka
4 siblings, 1 reply; 22+ messages in thread
From: Q. Gylstorff @ 2019-11-06 12:44 UTC (permalink / raw)
To: cip-dev
From: Quirin Gylstorff <quirin.gylstorff@siemens.com>
Signed-off-by: Quirin Gylstorff <quirin.gylstorff@siemens.com>
---
.gitlab-ci.yml | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/.gitlab-ci.yml b/.gitlab-ci.yml
index 36c152a..991862b 100644
--- a/.gitlab-ci.yml
+++ b/.gitlab-ci.yml
@@ -23,3 +23,7 @@ all:
- sudo rm -rf build/tmp
- kas build kas.yml:board-iwg20m.yml:opt-rt.yml
- scripts/deploy-cip-core.sh buster iwg20m r8a7743-iwg20d-q7-dbcm-ca.dtb
+
+ - sudo rm -rf build/tmp
+ - kas build kas.yml:board-rzg2m.yml:opt-rt.yml
+ - scripts/deploy-cip-core.sh buster hihope-rz2gm r8a774a1-hihope-rzg2m.dtb
--
2.20.1
^ permalink raw reply related [flat|nested] 22+ messages in thread* [cip-dev] [isar-cip-core PATCH 4/4] ci: add hihope-rzg2m to ci chain
2019-11-06 12:44 ` [cip-dev] [isar-cip-core PATCH 4/4] ci: add hihope-rzg2m to ci chain Q. Gylstorff
@ 2019-11-06 15:43 ` Chris Paterson
2019-11-07 16:39 ` [cip-dev] [isar-cip-core PATCH v2 0/4] Add rzg2m support Q. Gylstorff
` (4 more replies)
0 siblings, 5 replies; 22+ messages in thread
From: Chris Paterson @ 2019-11-06 15:43 UTC (permalink / raw)
To: cip-dev
Hello Quirin,
> From: cip-dev-bounces at lists.cip-project.org <cip-dev-bounces@lists.cip-
> project.org> On Behalf Of Q. Gylstorff
> Sent: 06 November 2019 12:45
>
> From: Quirin Gylstorff <quirin.gylstorff@siemens.com>
>
> Signed-off-by: Quirin Gylstorff <quirin.gylstorff@siemens.com>
> ---
> .gitlab-ci.yml | 4 ++++
> 1 file changed, 4 insertions(+)
>
> diff --git a/.gitlab-ci.yml b/.gitlab-ci.yml
> index 36c152a..991862b 100644
> --- a/.gitlab-ci.yml
> +++ b/.gitlab-ci.yml
> @@ -23,3 +23,7 @@ all:
> - sudo rm -rf build/tmp
> - kas build kas.yml:board-iwg20m.yml:opt-rt.yml
> - scripts/deploy-cip-core.sh buster iwg20m r8a7743-iwg20d-q7-dbcm-ca.dtb
> +
> + - sudo rm -rf build/tmp
> + - kas build kas.yml:board-rzg2m.yml:opt-rt.yml
> + - scripts/deploy-cip-core.sh buster hihope-rz2gm r8a774a1-hihope-
> rzg2m.dtb
This'll need to be r8a774a1-hihope-rzg2m-ex.dtb
Kind regards, Chris
> --
> 2.20.1
>
> _______________________________________________
> cip-dev mailing list
> cip-dev at lists.cip-project.org
> https://lists.cip-project.org/mailman/listinfo/cip-dev
^ permalink raw reply [flat|nested] 22+ messages in thread* [cip-dev] [isar-cip-core PATCH v2 0/4] Add rzg2m support
2019-11-06 15:43 ` Chris Paterson
@ 2019-11-07 16:39 ` Q. Gylstorff
2019-11-22 7:22 ` Jan Kiszka
2019-11-07 16:39 ` [cip-dev] [isar-cip-core PATCH v2 1/4] kas: Increase Isar version Q. Gylstorff
` (3 subsequent siblings)
4 siblings, 1 reply; 22+ messages in thread
From: Q. Gylstorff @ 2019-11-07 16:39 UTC (permalink / raw)
To: cip-dev
From: Quirin Gylstorff <quirin.gylstorff@siemens.com>
Add the rzg2m reference board.
Add the option to build rootfs tarballs for LAVA tests.
This option needs to be activated in the gitlab-ci.yml by
adding it to the builds for testing.
Version 2:
Change used devicetree to r8a774a1-hihope-rzg2m-ex.dtb.
The changes to fetch the cip-kernel configuration instead
of using copies stored in the repository will be a seperate
patch set.
Quirin Gylstorff (4):
kas: Increase Isar version
classes: add wic-targz-img.bbclass
hihope-rzg2m: Add board support
ci: add hihope-rzg2m to ci chain
.gitlab-ci.yml | 4 +
board-rzg2m.yml | 16 +
classes/wic-targz-img.bbclass | 13 +
conf/machine/bbb.conf | 2 +-
conf/machine/hihope-rzg2m.conf | 18 +
conf/machine/iwg20m.conf | 2 +-
conf/machine/qemu-amd64.conf | 2 +-
conf/machine/simatic-ipc227e.conf | 2 +-
kas.yml | 2 +-
opt-targz-img.yml | 20 ++
.../linux/files/hihope-rzg2m_defconfig | 330 ++++++++++++++++++
scripts/deploy-cip-core.sh | 4 +
wic/hihope-rzg2m.wks | 15 +
13 files changed, 425 insertions(+), 5 deletions(-)
create mode 100644 board-rzg2m.yml
create mode 100644 classes/wic-targz-img.bbclass
create mode 100644 conf/machine/hihope-rzg2m.conf
create mode 100644 opt-targz-img.yml
create mode 100644 recipes-kernel/linux/files/hihope-rzg2m_defconfig
create mode 100644 wic/hihope-rzg2m.wks
--
2.20.1
^ permalink raw reply [flat|nested] 22+ messages in thread* [cip-dev] [isar-cip-core PATCH v2 0/4] Add rzg2m support
2019-11-07 16:39 ` [cip-dev] [isar-cip-core PATCH v2 0/4] Add rzg2m support Q. Gylstorff
@ 2019-11-22 7:22 ` Jan Kiszka
0 siblings, 0 replies; 22+ messages in thread
From: Jan Kiszka @ 2019-11-22 7:22 UTC (permalink / raw)
To: cip-dev
On 07.11.19 17:39, Q. Gylstorff wrote:
> From: Quirin Gylstorff <quirin.gylstorff@siemens.com>
>
> Add the rzg2m reference board.
> Add the option to build rootfs tarballs for LAVA tests.
> This option needs to be activated in the gitlab-ci.yml by
> adding it to the builds for testing.
>
> Version 2:
> Change used devicetree to r8a774a1-hihope-rzg2m-ex.dtb.
> The changes to fetch the cip-kernel configuration instead
> of using copies stored in the repository will be a seperate
> patch set.
>
>
> Quirin Gylstorff (4):
> kas: Increase Isar version
> classes: add wic-targz-img.bbclass
> hihope-rzg2m: Add board support
> ci: add hihope-rzg2m to ci chain
>
> .gitlab-ci.yml | 4 +
> board-rzg2m.yml | 16 +
> classes/wic-targz-img.bbclass | 13 +
> conf/machine/bbb.conf | 2 +-
> conf/machine/hihope-rzg2m.conf | 18 +
> conf/machine/iwg20m.conf | 2 +-
> conf/machine/qemu-amd64.conf | 2 +-
> conf/machine/simatic-ipc227e.conf | 2 +-
> kas.yml | 2 +-
> opt-targz-img.yml | 20 ++
> .../linux/files/hihope-rzg2m_defconfig | 330 ++++++++++++++++++
> scripts/deploy-cip-core.sh | 4 +
> wic/hihope-rzg2m.wks | 15 +
> 13 files changed, 425 insertions(+), 5 deletions(-)
> create mode 100644 board-rzg2m.yml
> create mode 100644 classes/wic-targz-img.bbclass
> create mode 100644 conf/machine/hihope-rzg2m.conf
> create mode 100644 opt-targz-img.yml
> create mode 100644 recipes-kernel/linux/files/hihope-rzg2m_defconfig
> create mode 100644 wic/hihope-rzg2m.wks
>
Thanks, merged.
Jan
--
Siemens AG, Corporate Technology, CT RDA IOT SES-DE
Corporate Competence Center Embedded Linux
^ permalink raw reply [flat|nested] 22+ messages in thread
* [cip-dev] [isar-cip-core PATCH v2 1/4] kas: Increase Isar version
2019-11-06 15:43 ` Chris Paterson
2019-11-07 16:39 ` [cip-dev] [isar-cip-core PATCH v2 0/4] Add rzg2m support Q. Gylstorff
@ 2019-11-07 16:39 ` Q. Gylstorff
2019-11-07 16:39 ` [cip-dev] [isar-cip-core PATCH v2 2/4] classes: add wic-targz-img.bbclass Q. Gylstorff
` (2 subsequent siblings)
4 siblings, 0 replies; 22+ messages in thread
From: Q. Gylstorff @ 2019-11-07 16:39 UTC (permalink / raw)
To: cip-dev
From: Quirin Gylstorff <quirin.gylstorff@siemens.com>
Add fix for manifest generation to avoid errors during build.
Signed-off-by: Quirin Gylstorff <quirin.gylstorff@siemens.com>
---
kas.yml | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/kas.yml b/kas.yml
index 4904715..aa7ddda 100644
--- a/kas.yml
+++ b/kas.yml
@@ -19,7 +19,7 @@ repos:
isar:
url: https://github.com/ilbers/isar
- refspec: c1bae4c7ae9dee4d2cf5fd77d0c5560d9e52d5e1
+ refspec: 20a5e368021d988d8f0dcd1951b395d194a37ebb
layers:
meta:
--
2.20.1
^ permalink raw reply related [flat|nested] 22+ messages in thread* [cip-dev] [isar-cip-core PATCH v2 2/4] classes: add wic-targz-img.bbclass
2019-11-06 15:43 ` Chris Paterson
2019-11-07 16:39 ` [cip-dev] [isar-cip-core PATCH v2 0/4] Add rzg2m support Q. Gylstorff
2019-11-07 16:39 ` [cip-dev] [isar-cip-core PATCH v2 1/4] kas: Increase Isar version Q. Gylstorff
@ 2019-11-07 16:39 ` Q. Gylstorff
2019-11-07 16:39 ` [cip-dev] [isar-cip-core PATCH v2 3/4] hihope-rzg2m: Add board support Q. Gylstorff
2019-11-07 16:39 ` [cip-dev] [isar-cip-core PATCH v2 4/4] ci: add hihope-rzg2m to ci chain Q. Gylstorff
4 siblings, 0 replies; 22+ messages in thread
From: Q. Gylstorff @ 2019-11-07 16:39 UTC (permalink / raw)
To: cip-dev
From: Quirin Gylstorff <quirin.gylstorff@siemens.com>
The Linaro Automated Validation Architecture (LAVA) uses tarballs
as root file-systems to modify the file-system during the deployment.
Add a new bbclass to build tarballs and wic images at the same time to
feed the build output of isar-cip-core directly into LAVA tests.
Signed-off-by: Quirin Gylstorff <quirin.gylstorff@siemens.com>
---
classes/wic-targz-img.bbclass | 13 +++++++++++++
conf/machine/bbb.conf | 2 +-
conf/machine/iwg20m.conf | 2 +-
conf/machine/qemu-amd64.conf | 2 +-
conf/machine/simatic-ipc227e.conf | 2 +-
opt-targz-img.yml | 20 ++++++++++++++++++++
scripts/deploy-cip-core.sh | 4 ++++
7 files changed, 41 insertions(+), 4 deletions(-)
create mode 100644 classes/wic-targz-img.bbclass
create mode 100644 opt-targz-img.yml
diff --git a/classes/wic-targz-img.bbclass b/classes/wic-targz-img.bbclass
new file mode 100644
index 0000000..4e9f89d
--- /dev/null
+++ b/classes/wic-targz-img.bbclass
@@ -0,0 +1,13 @@
+#
+# CIP Core, generic profile
+#
+# Copyright (c) Siemens AG, 2019
+#
+# Authors:
+# Quirin Gylstorff <quirin.gylstorff@siemens.com>
+#
+# SPDX-License-Identifier: MIT
+#
+
+inherit wic-img
+inherit targz-img
diff --git a/conf/machine/bbb.conf b/conf/machine/bbb.conf
index c945aac..a9b460e 100644
--- a/conf/machine/bbb.conf
+++ b/conf/machine/bbb.conf
@@ -8,7 +8,7 @@
DISTRO_ARCH = "armhf"
-IMAGE_TYPE = "wic-img"
+IMAGE_TYPE ?= "wic-img"
IMAGER_INSTALL += "u-boot-omap"
# On stretch, select U-Boot from buster which comes with distro-boot support
diff --git a/conf/machine/iwg20m.conf b/conf/machine/iwg20m.conf
index 2f91771..6c1a227 100644
--- a/conf/machine/iwg20m.conf
+++ b/conf/machine/iwg20m.conf
@@ -8,7 +8,7 @@
DISTRO_ARCH = "armhf"
# see wic/iwg20m.wks
-IMAGE_TYPE = "wic-img"
+IMAGE_TYPE ?= "wic-img"
# sets serial login getty
MACHINE_SERIAL = "ttySC0"
diff --git a/conf/machine/qemu-amd64.conf b/conf/machine/qemu-amd64.conf
index 90325d6..7cbd55b 100644
--- a/conf/machine/qemu-amd64.conf
+++ b/conf/machine/qemu-amd64.conf
@@ -8,4 +8,4 @@
DISTRO_ARCH = "amd64"
-IMAGE_TYPE = "ext4-img"
+IMAGE_TYPE ?= "ext4-img"
diff --git a/conf/machine/simatic-ipc227e.conf b/conf/machine/simatic-ipc227e.conf
index 73dac33..473e6c5 100644
--- a/conf/machine/simatic-ipc227e.conf
+++ b/conf/machine/simatic-ipc227e.conf
@@ -8,5 +8,5 @@
DISTRO_ARCH = "amd64"
-IMAGE_TYPE = "wic-img"
+IMAGE_TYPE ?= "wic-img"
IMAGER_INSTALL += "${GRUB_BOOTLOADER_INSTALL}"
diff --git a/opt-targz-img.yml b/opt-targz-img.yml
new file mode 100644
index 0000000..1a73024
--- /dev/null
+++ b/opt-targz-img.yml
@@ -0,0 +1,20 @@
+#
+# CIP Core, generic profile
+#
+# Copyright (c) Siemens AG, 2019
+#
+# Authors:
+# Quirin Gylstorff <quirin.gylstorff@siemens.com>
+#
+# SPDX-License-Identifier: MIT
+#
+
+header:
+ version: 8
+
+# lava uses nfs to deploy the image. For this we need a tarball instead of
+# full image
+
+local_conf_header:
+ image-type: |
+ IMAGE_TYPE = "wic-targz-img"
diff --git a/scripts/deploy-cip-core.sh b/scripts/deploy-cip-core.sh
index 081dc9d..e5c09ef 100755
--- a/scripts/deploy-cip-core.sh
+++ b/scripts/deploy-cip-core.sh
@@ -26,6 +26,10 @@ xz -9 -k $BASE_PATH.wic.img
echo "Uploading artifacts..."
aws s3 cp --no-progress $BASE_PATH.wic.img.xz s3://download.cip-project.org/cip-core/$TARGET/
+if [ -f $BASE_PATH.tar.gz ]; then
+ aws s3 cp --no-progress $BASE_PATH.tar.gz s3://download.cip-project.org/cip-core/$TARGET/
+fi
+
KERNEL_IMAGE=$BASE_PATH-vmlinuz
# iwg20m workaround
if [ -f build/tmp/deploy/images/$TARGET/zImage ]; then
--
2.20.1
^ permalink raw reply related [flat|nested] 22+ messages in thread* [cip-dev] [isar-cip-core PATCH v2 3/4] hihope-rzg2m: Add board support
2019-11-06 15:43 ` Chris Paterson
` (2 preceding siblings ...)
2019-11-07 16:39 ` [cip-dev] [isar-cip-core PATCH v2 2/4] classes: add wic-targz-img.bbclass Q. Gylstorff
@ 2019-11-07 16:39 ` Q. Gylstorff
2019-11-07 16:39 ` [cip-dev] [isar-cip-core PATCH v2 4/4] ci: add hihope-rzg2m to ci chain Q. Gylstorff
4 siblings, 0 replies; 22+ messages in thread
From: Q. Gylstorff @ 2019-11-07 16:39 UTC (permalink / raw)
To: cip-dev
From: Quirin Gylstorff <quirin.gylstorff@siemens.com>
The hihope-rzg2m is a ARM64 reference platform for the CIP project.
Signed-off-by: Quirin Gylstorff <quirin.gylstorff@siemens.com>
---
board-rzg2m.yml | 16 +
conf/machine/hihope-rzg2m.conf | 18 +
.../linux/files/hihope-rzg2m_defconfig | 330 ++++++++++++++++++
wic/hihope-rzg2m.wks | 15 +
4 files changed, 379 insertions(+)
create mode 100644 board-rzg2m.yml
create mode 100644 conf/machine/hihope-rzg2m.conf
create mode 100644 recipes-kernel/linux/files/hihope-rzg2m_defconfig
create mode 100644 wic/hihope-rzg2m.wks
diff --git a/board-rzg2m.yml b/board-rzg2m.yml
new file mode 100644
index 0000000..f68c7b8
--- /dev/null
+++ b/board-rzg2m.yml
@@ -0,0 +1,16 @@
+#
+# CIP Core, generic profile
+#
+# Copyright (c) Siemens AG, 2019
+#
+# Authors:
+# Quirin Gylstorff <quirin.gylstorff@siemens.com>
+#
+# SPDX-License-Identifier: MIT
+#
+
+header:
+ version: 8
+
+machine: hihope-rzg2m
+target: cip-core-image
diff --git a/conf/machine/hihope-rzg2m.conf b/conf/machine/hihope-rzg2m.conf
new file mode 100644
index 0000000..8b8849f
--- /dev/null
+++ b/conf/machine/hihope-rzg2m.conf
@@ -0,0 +1,18 @@
+#
+# CIP Core, generic profile
+#
+# Copyright (c) Siemens AG, 2019
+#
+# Authors:
+# Quirin Gylstorff <quirin.gylstorff@siemens.com>
+#
+# SPDX-License-Identifier: MIT
+#
+
+DISTRO_ARCH = "arm64"
+
+IMAGE_TYPE ?= "wic-img"
+
+KERNEL_DEFCONFIG = "https://gitlab.com/cip-project/cip-kernel/cip-kernel-config/raw/693be1bfb92e6c0ef813cf29431ac49eab0e15be/4.19.y-cip/arm64/renesas_defconfig"
+DTB_FILE = "r8a774a1-hihope-rzg2m-ex.dtb"
+IMAGE_BOOT_FILES = "${KERNEL_IMAGE} ${DTB_FILE}"
diff --git a/recipes-kernel/linux/files/hihope-rzg2m_defconfig b/recipes-kernel/linux/files/hihope-rzg2m_defconfig
new file mode 100644
index 0000000..f35793c
--- /dev/null
+++ b/recipes-kernel/linux/files/hihope-rzg2m_defconfig
@@ -0,0 +1,330 @@
+CONFIG_SYSVIPC=y
+CONFIG_POSIX_MQUEUE=y
+CONFIG_AUDIT=y
+CONFIG_NO_HZ_IDLE=y
+CONFIG_HIGH_RES_TIMERS=y
+CONFIG_PREEMPT=y
+CONFIG_IRQ_TIME_ACCOUNTING=y
+CONFIG_BSD_PROCESS_ACCT=y
+CONFIG_BSD_PROCESS_ACCT_V3=y
+CONFIG_TASKSTATS=y
+CONFIG_TASK_DELAY_ACCT=y
+CONFIG_TASK_XACCT=y
+CONFIG_TASK_IO_ACCOUNTING=y
+CONFIG_IKCONFIG=y
+CONFIG_IKCONFIG_PROC=y
+CONFIG_MEMCG=y
+CONFIG_MEMCG_SWAP=y
+CONFIG_BLK_CGROUP=y
+CONFIG_CGROUP_PIDS=y
+CONFIG_CGROUP_HUGETLB=y
+CONFIG_CPUSETS=y
+CONFIG_CGROUP_DEVICE=y
+CONFIG_CGROUP_CPUACCT=y
+CONFIG_CGROUP_PERF=y
+CONFIG_USER_NS=y
+CONFIG_SCHED_AUTOGROUP=y
+CONFIG_BLK_DEV_INITRD=y
+# CONFIG_COMPAT_BRK is not set
+CONFIG_PROFILING=y
+CONFIG_ARCH_RENESAS=y
+CONFIG_ARCH_R8A774A1=y
+CONFIG_ARCH_R8A774C0=y
+CONFIG_PCI=y
+CONFIG_PCIEPORTBUS=y
+CONFIG_HOTPLUG_PCI_PCIE=y
+CONFIG_PCI_IOV=y
+CONFIG_HOTPLUG_PCI=y
+CONFIG_PCIE_RCAR=y
+CONFIG_PCI_HOST_GENERIC=y
+# CONFIG_CAVIUM_ERRATUM_22375 is not set
+# CONFIG_CAVIUM_ERRATUM_23154 is not set
+# CONFIG_CAVIUM_ERRATUM_27456 is not set
+# CONFIG_CAVIUM_ERRATUM_30115 is not set
+# CONFIG_QCOM_FALKOR_ERRATUM_1003 is not set
+# CONFIG_QCOM_FALKOR_ERRATUM_1009 is not set
+# CONFIG_QCOM_QDF2400_ERRATUM_0065 is not set
+# CONFIG_SOCIONEXT_SYNQUACER_PREITS is not set
+# CONFIG_HISILICON_ERRATUM_161600802 is not set
+CONFIG_ARM64_VA_BITS_48=y
+CONFIG_SCHED_MC=y
+CONFIG_NR_CPUS=8
+CONFIG_SECCOMP=y
+CONFIG_KEXEC=y
+CONFIG_CRASH_DUMP=y
+CONFIG_XEN=y
+# CONFIG_ARM64_LSE_ATOMICS is not set
+# CONFIG_ARM64_RAS_EXTN is not set
+CONFIG_COMPAT=y
+CONFIG_HIBERNATION=y
+CONFIG_WQ_POWER_EFFICIENT_DEFAULT=y
+CONFIG_CPU_IDLE=y
+CONFIG_ARM_CPUIDLE=y
+CONFIG_CPU_FREQ=y
+CONFIG_CPUFREQ_DT=y
+# CONFIG_DMIID is not set
+CONFIG_VIRTUALIZATION=y
+CONFIG_KVM=y
+CONFIG_ARM64_CRYPTO=y
+CONFIG_CRYPTO_SHA1_ARM64_CE=y
+CONFIG_CRYPTO_SHA2_ARM64_CE=y
+CONFIG_CRYPTO_GHASH_ARM64_CE=y
+CONFIG_CRYPTO_AES_ARM64_CE_CCM=y
+CONFIG_CRYPTO_AES_ARM64_CE_BLK=y
+CONFIG_JUMP_LABEL=y
+CONFIG_BLK_DEV_INTEGRITY=y
+# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
+CONFIG_KSM=y
+CONFIG_TRANSPARENT_HUGEPAGE=y
+CONFIG_CMA=y
+CONFIG_NET=y
+CONFIG_PACKET=y
+CONFIG_UNIX=y
+CONFIG_INET=y
+CONFIG_IP_MULTICAST=y
+CONFIG_IP_PNP=y
+CONFIG_IP_PNP_DHCP=y
+CONFIG_IP_PNP_BOOTP=y
+# CONFIG_IPV6 is not set
+CONFIG_NETFILTER=y
+CONFIG_CAN=y
+CONFIG_CAN_RCAR=y
+CONFIG_CAN_RCAR_CANFD=y
+CONFIG_DEVTMPFS=y
+CONFIG_DEVTMPFS_MOUNT=y
+CONFIG_DMA_CMA=y
+CONFIG_CMA_SIZE_MBYTES=128
+CONFIG_CMA_ALIGNMENT=9
+CONFIG_MTD=y
+CONFIG_MTD_BLOCK=y
+CONFIG_MTD_SPI_NOR=y
+CONFIG_BLK_DEV_LOOP=y
+CONFIG_VIRTIO_BLK=y
+CONFIG_SRAM=y
+# CONFIG_SCSI_PROC_FS is not set
+CONFIG_BLK_DEV_SD=y
+CONFIG_SCSI_SAS_LIBSAS=y
+CONFIG_SCSI_SAS_ATA=y
+CONFIG_ATA=y
+# CONFIG_SATA_PMP is not set
+CONFIG_SATA_RCAR=y
+CONFIG_NETDEVICES=y
+CONFIG_TUN=y
+CONFIG_VIRTIO_NET=y
+# CONFIG_CAVIUM_PTP is not set
+CONFIG_RAVB=y
+CONFIG_MDIO_BUS_MUX_MMIOREG=y
+CONFIG_MICREL_PHY=y
+CONFIG_REALTEK_PHY=y
+# CONFIG_WLAN is not set
+CONFIG_INPUT_MATRIXKMAP=y
+CONFIG_INPUT_EVDEV=y
+# CONFIG_KEYBOARD_ATKBD is not set
+CONFIG_KEYBOARD_GPIO=y
+# CONFIG_MOUSE_PS2 is not set
+CONFIG_INPUT_MISC=y
+# CONFIG_SERIO is not set
+CONFIG_SERIAL_SH_SCI=y
+CONFIG_VIRTIO_CONSOLE=y
+# CONFIG_HW_RANDOM is not set
+CONFIG_I2C_CHARDEV=y
+CONFIG_I2C_MUX=y
+CONFIG_I2C_MUX_PCA954x=y
+CONFIG_I2C_DESIGNWARE_PLATFORM=y
+CONFIG_I2C_SH_MOBILE=y
+CONFIG_I2C_RCAR=y
+CONFIG_SPI=y
+CONFIG_SPI_SH_MSIOF=y
+CONFIG_SPI_SPIDEV=y
+CONFIG_SPMI=y
+CONFIG_PINCTRL_SINGLE=y
+CONFIG_GPIO_GENERIC_PLATFORM=y
+CONFIG_GPIO_RCAR=y
+CONFIG_GPIO_PCA953X=y
+CONFIG_GPIO_BD9571MWV=y
+CONFIG_THERMAL=y
+CONFIG_THERMAL_GOV_POWER_ALLOCATOR=y
+CONFIG_CPU_THERMAL=y
+CONFIG_THERMAL_EMULATION=y
+CONFIG_RCAR_THERMAL=y
+CONFIG_RCAR_GEN3_THERMAL=y
+CONFIG_WATCHDOG=y
+CONFIG_RENESAS_WDT=y
+CONFIG_MFD_BD9571MWV=y
+CONFIG_REGULATOR=y
+CONFIG_REGULATOR_FIXED_VOLTAGE=y
+CONFIG_REGULATOR_BD9571MWV=y
+CONFIG_REGULATOR_GPIO=y
+CONFIG_REGULATOR_PWM=y
+CONFIG_MEDIA_SUPPORT=y
+CONFIG_MEDIA_CAMERA_SUPPORT=y
+CONFIG_MEDIA_SDR_SUPPORT=y
+CONFIG_MEDIA_CONTROLLER=y
+CONFIG_VIDEO_V4L2_SUBDEV_API=y
+CONFIG_V4L_PLATFORM_DRIVERS=y
+CONFIG_VIDEO_RCAR_CSI2=y
+CONFIG_VIDEO_RCAR_VIN=y
+CONFIG_V4L_MEM2MEM_DRIVERS=y
+CONFIG_VIDEO_RENESAS_FDP1=y
+CONFIG_VIDEO_RENESAS_FCP=y
+CONFIG_VIDEO_RENESAS_VSP1=y
+CONFIG_SDR_PLATFORM_DRIVERS=y
+CONFIG_VIDEO_RCAR_DRIF=y
+# CONFIG_MEDIA_SUBDRV_AUTOSELECT is not set
+CONFIG_VIDEO_ADV748X=y
+# CONFIG_MEDIA_TUNER_SIMPLE is not set
+# CONFIG_MEDIA_TUNER_TDA18250 is not set
+# CONFIG_MEDIA_TUNER_TDA8290 is not set
+# CONFIG_MEDIA_TUNER_TDA827X is not set
+# CONFIG_MEDIA_TUNER_TDA18271 is not set
+# CONFIG_MEDIA_TUNER_TDA9887 is not set
+# CONFIG_MEDIA_TUNER_TEA5761 is not set
+# CONFIG_MEDIA_TUNER_TEA5767 is not set
+# CONFIG_MEDIA_TUNER_MSI001 is not set
+# CONFIG_MEDIA_TUNER_MT20XX is not set
+# CONFIG_MEDIA_TUNER_MT2060 is not set
+# CONFIG_MEDIA_TUNER_MT2063 is not set
+# CONFIG_MEDIA_TUNER_MT2266 is not set
+# CONFIG_MEDIA_TUNER_MT2131 is not set
+# CONFIG_MEDIA_TUNER_QT1010 is not set
+# CONFIG_MEDIA_TUNER_XC2028 is not set
+# CONFIG_MEDIA_TUNER_XC5000 is not set
+# CONFIG_MEDIA_TUNER_XC4000 is not set
+# CONFIG_MEDIA_TUNER_MXL5005S is not set
+# CONFIG_MEDIA_TUNER_MXL5007T is not set
+# CONFIG_MEDIA_TUNER_MC44S803 is not set
+# CONFIG_MEDIA_TUNER_MAX2165 is not set
+# CONFIG_MEDIA_TUNER_TDA18218 is not set
+# CONFIG_MEDIA_TUNER_FC0011 is not set
+# CONFIG_MEDIA_TUNER_FC0012 is not set
+# CONFIG_MEDIA_TUNER_FC0013 is not set
+# CONFIG_MEDIA_TUNER_TDA18212 is not set
+# CONFIG_MEDIA_TUNER_E4000 is not set
+# CONFIG_MEDIA_TUNER_FC2580 is not set
+# CONFIG_MEDIA_TUNER_M88RS6000T is not set
+# CONFIG_MEDIA_TUNER_TUA9001 is not set
+# CONFIG_MEDIA_TUNER_SI2157 is not set
+# CONFIG_MEDIA_TUNER_IT913X is not set
+# CONFIG_MEDIA_TUNER_R820T is not set
+# CONFIG_MEDIA_TUNER_MXL301RF is not set
+# CONFIG_MEDIA_TUNER_QM1D1C0042 is not set
+# CONFIG_MEDIA_TUNER_QM1D1B0004 is not set
+CONFIG_DRM=y
+CONFIG_DRM_I2C_NXP_TDA998X=y
+CONFIG_DRM_RCAR_DU=y
+CONFIG_DRM_RCAR_DW_HDMI=y
+CONFIG_DRM_RCAR_LVDS=y
+CONFIG_DRM_DUMB_VGA_DAC=y
+CONFIG_DRM_THINE_THC63LVD1024=y
+CONFIG_DRM_DW_HDMI_AHB_AUDIO=y
+CONFIG_DRM_DW_HDMI_I2S_AUDIO=y
+CONFIG_DRM_DW_HDMI_CEC=y
+CONFIG_FB_MODE_HELPERS=y
+CONFIG_BACKLIGHT_LCD_SUPPORT=y
+# CONFIG_LCD_CLASS_DEVICE is not set
+# CONFIG_BACKLIGHT_GENERIC is not set
+CONFIG_BACKLIGHT_PWM=y
+CONFIG_LOGO=y
+# CONFIG_LOGO_LINUX_MONO is not set
+# CONFIG_LOGO_LINUX_VGA16 is not set
+CONFIG_SOUND=y
+CONFIG_SND=y
+# CONFIG_SND_SPI is not set
+# CONFIG_SND_USB is not set
+CONFIG_SND_SOC=y
+CONFIG_SND_SOC_RCAR=y
+CONFIG_SND_SOC_AK4613=y
+CONFIG_SND_SOC_PCM3168A_I2C=y
+CONFIG_SND_SIMPLE_CARD=y
+CONFIG_SND_SIMPLE_SCU_CARD=y
+CONFIG_SND_AUDIO_GRAPH_CARD=y
+CONFIG_USB=y
+CONFIG_USB_OTG=y
+CONFIG_USB_XHCI_HCD=y
+CONFIG_USB_XHCI_PLATFORM=y
+CONFIG_USB_EHCI_HCD=y
+CONFIG_USB_EHCI_ROOT_HUB_TT=y
+CONFIG_USB_EHCI_HCD_PLATFORM=y
+CONFIG_USB_OHCI_HCD=y
+CONFIG_USB_OHCI_HCD_PLATFORM=y
+CONFIG_USB_RENESAS_USBHS_HCD=y
+CONFIG_USB_RENESAS_USBHS=y
+CONFIG_USB_STORAGE=y
+CONFIG_USB_HSIC_USB3503=y
+CONFIG_NOP_USB_XCEIV=y
+CONFIG_USB_ULPI=y
+CONFIG_USB_GADGET=y
+CONFIG_USB_RENESAS_USBHS_UDC=y
+CONFIG_USB_RENESAS_USB3=y
+CONFIG_USB_SNP_UDC_PLAT=y
+CONFIG_USB_BDC_UDC=y
+CONFIG_MMC=y
+CONFIG_MMC_SDHI=y
+CONFIG_NEW_LEDS=y
+CONFIG_LEDS_CLASS=y
+CONFIG_LEDS_GPIO=y
+CONFIG_LEDS_PWM=y
+CONFIG_LEDS_TRIGGERS=y
+CONFIG_LEDS_TRIGGER_HEARTBEAT=y
+CONFIG_LEDS_TRIGGER_CPU=y
+CONFIG_LEDS_TRIGGER_DEFAULT_ON=y
+CONFIG_EDAC=y
+CONFIG_RTC_CLASS=y
+CONFIG_RTC_DRV_RX8581=y
+CONFIG_DMADEVICES=y
+CONFIG_RCAR_DMAC=y
+CONFIG_RENESAS_USB_DMAC=y
+CONFIG_VFIO=y
+CONFIG_VFIO_PCI=y
+CONFIG_VIRTIO_PCI=y
+CONFIG_VIRTIO_BALLOON=y
+CONFIG_VIRTIO_MMIO=y
+CONFIG_CHROME_PLATFORMS=y
+CONFIG_COMMON_CLK_CS2000_CP=y
+# CONFIG_COMMON_CLK_XGENE is not set
+CONFIG_COMMON_CLK_VC5=y
+CONFIG_CLK_RCAR_USB2_CLOCK_SEL=y
+CONFIG_HWSPINLOCK=y
+# CONFIG_FSL_ERRATUM_A008585 is not set
+# CONFIG_HISILICON_ERRATUM_161010101 is not set
+# CONFIG_ARM64_ERRATUM_858921 is not set
+CONFIG_MAILBOX=y
+CONFIG_IOMMU_IO_PGTABLE_LPAE=y
+CONFIG_EXTCON_USB_GPIO=y
+CONFIG_IIO=y
+CONFIG_MAX9611=y
+CONFIG_PWM=y
+CONFIG_PWM_RCAR=y
+CONFIG_RESET_CONTROLLER=y
+CONFIG_PHY_RCAR_GEN3_PCIE=y
+CONFIG_PHY_RCAR_GEN3_USB2=y
+CONFIG_PHY_RCAR_GEN3_USB3=y
+CONFIG_TEE=y
+CONFIG_OPTEE=y
+CONFIG_EXT4_FS=y
+CONFIG_EXT4_FS_POSIX_ACL=y
+CONFIG_FANOTIFY=y
+CONFIG_QUOTA=y
+CONFIG_AUTOFS4_FS=y
+CONFIG_VFAT_FS=y
+CONFIG_TMPFS=y
+CONFIG_HUGETLBFS=y
+CONFIG_CONFIGFS_FS=y
+CONFIG_SQUASHFS=y
+CONFIG_NFS_FS=y
+CONFIG_NFS_V4=y
+CONFIG_NFS_V4_1=y
+CONFIG_NFS_V4_2=y
+CONFIG_ROOT_NFS=y
+CONFIG_NLS_CODEPAGE_437=y
+CONFIG_NLS_ISO8859_1=y
+CONFIG_CRYPTO_ANSI_CPRNG=y
+# CONFIG_CRYPTO_DEV_VIRTIO is not set
+CONFIG_CRYPTO_DEV_CCREE=y
+CONFIG_PRINTK_TIME=y
+CONFIG_MAGIC_SYSRQ=y
+CONFIG_DEBUG_KERNEL=y
+# CONFIG_SCHED_DEBUG is not set
+# CONFIG_DEBUG_PREEMPT is not set
+CONFIG_PROVE_LOCKING=y
+# CONFIG_FTRACE is not set
diff --git a/wic/hihope-rzg2m.wks b/wic/hihope-rzg2m.wks
new file mode 100644
index 0000000..c0a9f77
--- /dev/null
+++ b/wic/hihope-rzg2m.wks
@@ -0,0 +1,15 @@
+#
+# CIP Core, generic profile
+#
+# Copyright (c) Siemens AG, 2019
+#
+# Authors:
+# Quirin Gylstorff <quirin.gylstorff@siemens.com>
+#
+# SPDX-License-Identifier: MIT
+#
+
+part /boot --source bootimg-partition --ondisk mmcblk0 --fstype vfat --label boot --align 1 --size 32M --extra-space 0
+
+# Rootfs partition
+part / --source rootfs --ondisk mmcblk0 --fstype ext4 --label root --align 1024 --size 2G --active
--
2.20.1
^ permalink raw reply related [flat|nested] 22+ messages in thread* [cip-dev] [isar-cip-core PATCH v2 4/4] ci: add hihope-rzg2m to ci chain
2019-11-06 15:43 ` Chris Paterson
` (3 preceding siblings ...)
2019-11-07 16:39 ` [cip-dev] [isar-cip-core PATCH v2 3/4] hihope-rzg2m: Add board support Q. Gylstorff
@ 2019-11-07 16:39 ` Q. Gylstorff
4 siblings, 0 replies; 22+ messages in thread
From: Q. Gylstorff @ 2019-11-07 16:39 UTC (permalink / raw)
To: cip-dev
From: Quirin Gylstorff <quirin.gylstorff@siemens.com>
Signed-off-by: Quirin Gylstorff <quirin.gylstorff@siemens.com>
---
.gitlab-ci.yml | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/.gitlab-ci.yml b/.gitlab-ci.yml
index 36c152a..319c5a2 100644
--- a/.gitlab-ci.yml
+++ b/.gitlab-ci.yml
@@ -23,3 +23,7 @@ all:
- sudo rm -rf build/tmp
- kas build kas.yml:board-iwg20m.yml:opt-rt.yml
- scripts/deploy-cip-core.sh buster iwg20m r8a7743-iwg20d-q7-dbcm-ca.dtb
+
+ - sudo rm -rf build/tmp
+ - kas build kas.yml:board-rzg2m.yml:opt-rt.yml
+ - scripts/deploy-cip-core.sh buster hihope-rz2gm r8a774a1-hihope-rzg2m-ex.dtb
--
2.20.1
^ permalink raw reply related [flat|nested] 22+ messages in thread
* [cip-dev] [isar-cip-core PATCH 0/4] Add rzg2m support
2019-11-06 12:44 [cip-dev] [isar-cip-core PATCH 0/4] Add rzg2m support Q. Gylstorff
` (3 preceding siblings ...)
2019-11-06 12:44 ` [cip-dev] [isar-cip-core PATCH 4/4] ci: add hihope-rzg2m to ci chain Q. Gylstorff
@ 2019-11-06 14:12 ` Jan Kiszka
2019-11-06 14:37 ` Gylstorff Quirin
4 siblings, 1 reply; 22+ messages in thread
From: Jan Kiszka @ 2019-11-06 14:12 UTC (permalink / raw)
To: cip-dev
On 06.11.19 13:44, Q. Gylstorff wrote:
> From: Quirin Gylstorff <quirin.gylstorff@siemens.com>
>
> Add the rzg2m reference board.
> Add the option to build rootfs tarballs for LAVA tests.
> This option needs to be activated in the gitlab-ci.yml by
> adding it to the builds for testing.
>
Nice! Beyond building and actually deploying this, what else would be
missing to hook up the result with a board in the lab?
Jan
>
> Quirin Gylstorff (4):
> kas: Increase Isar version
> classes: add wic-targz-img.bbclass
> hihope-rzg2m: Add board support
> ci: add hihope-rzg2m to ci chain
>
> .gitlab-ci.yml | 4 +
> board-rzg2m.yml | 16 +
> classes/wic-targz-img.bbclass | 13 +
> conf/machine/bbb.conf | 2 +-
> conf/machine/hihope-rzg2m.conf | 17 +
> conf/machine/iwg20m.conf | 2 +-
> conf/machine/qemu-amd64.conf | 2 +-
> conf/machine/simatic-ipc227e.conf | 2 +-
> kas.yml | 2 +-
> opt-targz-img.yml | 20 ++
> .../linux/files/hihope-rzg2m_defconfig | 330 ++++++++++++++++++
> scripts/deploy-cip-core.sh | 4 +
> wic/hihope-rzg2m.wks | 15 +
> 13 files changed, 424 insertions(+), 5 deletions(-)
> create mode 100644 board-rzg2m.yml
> create mode 100644 classes/wic-targz-img.bbclass
> create mode 100644 conf/machine/hihope-rzg2m.conf
> create mode 100644 opt-targz-img.yml
> create mode 100644 recipes-kernel/linux/files/hihope-rzg2m_defconfig
> create mode 100644 wic/hihope-rzg2m.wks
>
--
Siemens AG, Corporate Technology, CT RDA IOT SES-DE
Corporate Competence Center Embedded Linux
^ permalink raw reply [flat|nested] 22+ messages in thread* [cip-dev] [isar-cip-core PATCH 0/4] Add rzg2m support
2019-11-06 14:12 ` [cip-dev] [isar-cip-core PATCH 0/4] Add rzg2m support Jan Kiszka
@ 2019-11-06 14:37 ` Gylstorff Quirin
2019-11-06 16:19 ` Chris Paterson
0 siblings, 1 reply; 22+ messages in thread
From: Gylstorff Quirin @ 2019-11-06 14:37 UTC (permalink / raw)
To: cip-dev
On 11/6/19 3:12 PM, Jan Kiszka wrote:
> Nice! Beyond building and actually deploying this, what else would be
> missing to hook up the result with a board in the lab?
We would need to change the configuration of the LAVA jobs in [1] to
use the tarballs generated by the build.
[1]:
https://gitlab.com/cip-project/cip-testing/linux-cip-ci/blob/next/lava_templates/
From what I see the actions use a hardcoded rootfs url to boot via nfs.
We could use the same template mechanism from Chris for dtb and Kernel
for the rootfs.
Kind regards,
Quirin
^ permalink raw reply [flat|nested] 22+ messages in thread
* [cip-dev] [isar-cip-core PATCH 0/4] Add rzg2m support
2019-11-06 14:37 ` Gylstorff Quirin
@ 2019-11-06 16:19 ` Chris Paterson
2019-11-08 12:57 ` Gylstorff Quirin
0 siblings, 1 reply; 22+ messages in thread
From: Chris Paterson @ 2019-11-06 16:19 UTC (permalink / raw)
To: cip-dev
Hello,
> From: Gylstorff Quirin <quirin.gylstorff@siemens.com>
> Sent: 06 November 2019 14:37
>
>
>
> On 11/6/19 3:12 PM, Jan Kiszka wrote:
> > Nice! Beyond building and actually deploying this, what else would be
> > missing to hook up the result with a board in the lab?
>
> We would need to change the configuration of the LAVA jobs in [1] to
> use the tarballs generated by the build.
Yes, at the moment they are painfully hardcoded. I plan to at least have them point to the 'latest' CIP Core.
However for your use case, you'll want to test the binaries you just created.
I guess we should decide on whether we want to re-use linux-cip-ci for CIP Core testing, or just end up creating a separate version for CIP Core.
Linux-cip-ci could easily be modified to support both CIP Linux & Core testing (we could just add another version of submit_tests.sh for CIP Core), and I think this would be easier to maintain down the line.
Is this something you'd like to have a go at?
I'm happy to do it, but I may struggle to find time in the next few weeks.
Kind regards, Chris
>
> [1]:
> https://gitlab.com/cip-project/cip-testing/linux-cip-
> ci/blob/next/lava_templates/
>
> From what I see the actions use a hardcoded rootfs url to boot via nfs.
> We could use the same template mechanism from Chris for dtb and Kernel
> for the rootfs.
>
> Kind regards,
>
> Quirin
^ permalink raw reply [flat|nested] 22+ messages in thread
* [cip-dev] [isar-cip-core PATCH 0/4] Add rzg2m support
2019-11-06 16:19 ` Chris Paterson
@ 2019-11-08 12:57 ` Gylstorff Quirin
0 siblings, 0 replies; 22+ messages in thread
From: Gylstorff Quirin @ 2019-11-08 12:57 UTC (permalink / raw)
To: cip-dev
On 11/6/19 5:19 PM, Chris Paterson wrote:
> Hello,
>
>> From: Gylstorff Quirin <quirin.gylstorff@siemens.com>
>> Sent: 06 November 2019 14:37
>>
>>
>>
>> On 11/6/19 3:12 PM, Jan Kiszka wrote:
>>> Nice! Beyond building and actually deploying this, what else would be
>>> missing to hook up the result with a board in the lab?
>>
>> We would need to change the configuration of the LAVA jobs in [1] to
>> use the tarballs generated by the build.
>
> Yes, at the moment they are painfully hardcoded. I plan to at least have them point to the 'latest' CIP Core.
> However for your use case, you'll want to test the binaries you just created.
>
> I guess we should decide on whether we want to re-use linux-cip-ci for CIP Core testing, or just end up creating a separate version for CIP Core.
> Linux-cip-ci could easily be modified to support both CIP Linux & Core testing (we could just add another version of submit_tests.sh for CIP Core), and I think this would be easier to maintain down the line.
>
> Is this something you'd like to have a go at?
> I'm happy to do it, but I may struggle to find time in the next few weeks.
I have some other projects in the next weeks. Afterwards if time permits
I will try to look into it. We can sync each other when one of use can
start with it.
Kind regards,
Quirn
^ permalink raw reply [flat|nested] 22+ messages in thread