* [igt-dev] [PATCH i-g-t v4 0/3] GEN12 render decompression @ 2019-11-08 11:41 Mika Kahola 2019-11-08 11:41 ` [igt-dev] [PATCH i-g-t v4 1/3] Format modifier for Intel Gen-12 render compression Mika Kahola ` (3 more replies) 0 siblings, 4 replies; 10+ messages in thread From: Mika Kahola @ 2019-11-08 11:41 UTC (permalink / raw) To: igt-dev Gen-12 render decompression is supported with Y-tiled main surface. The patch series introduces CCS support for IGT tests. This patch series requires Imre's series https://patchwork.freedesktop.org/series/68890/ v2: Added new subtests for each format modifier. v3: Add IGT description for each subtest (GitLab) v4: Fix kms_ccs errornouse subtest execution and listing Mika Kahola (3): Format modifier for Intel Gen-12 render compression lib/igt_fb.c: Update tile sizes for GEN12 CCS tests/kms_ccs: Add GEN12 CCS render compression format modifiers include/drm-uapi/drm_fourcc.h | 1 + lib/igt_fb.c | 34 ++++++++++- lib/ioctl_wrappers.h | 1 + tests/kms_ccs.c | 107 ++++++++++++++++++++-------------- 4 files changed, 97 insertions(+), 46 deletions(-) -- 2.17.1 _______________________________________________ igt-dev mailing list igt-dev@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/igt-dev ^ permalink raw reply [flat|nested] 10+ messages in thread
* [igt-dev] [PATCH i-g-t v4 1/3] Format modifier for Intel Gen-12 render compression 2019-11-08 11:41 [igt-dev] [PATCH i-g-t v4 0/3] GEN12 render decompression Mika Kahola @ 2019-11-08 11:41 ` Mika Kahola 2019-11-08 11:41 ` [igt-dev] [PATCH i-g-t v4 2/3] lib/igt_fb.c: Update tile sizes for GEN12 CCS Mika Kahola ` (2 subsequent siblings) 3 siblings, 0 replies; 10+ messages in thread From: Mika Kahola @ 2019-11-08 11:41 UTC (permalink / raw) To: igt-dev Gen-12 has a new compression format for render compression. For this, a new modifier is needed to indicate that. Signed-off-by: Mika Kahola <mika.kahola@intel.com> Reviewed-by: Radhakrishna Sripada <radhakrishna.sripada@intel.com> --- include/drm-uapi/drm_fourcc.h | 1 + lib/ioctl_wrappers.h | 1 + 2 files changed, 2 insertions(+) diff --git a/include/drm-uapi/drm_fourcc.h b/include/drm-uapi/drm_fourcc.h index 3feeaa3f..b93eb2d4 100644 --- a/include/drm-uapi/drm_fourcc.h +++ b/include/drm-uapi/drm_fourcc.h @@ -409,6 +409,7 @@ extern "C" { */ #define I915_FORMAT_MOD_Y_TILED_CCS fourcc_mod_code(INTEL, 4) #define I915_FORMAT_MOD_Yf_TILED_CCS fourcc_mod_code(INTEL, 5) +#define I915_FORMAT_MOD_Y_TILED_GEN12_RC_CCS fourcc_mod_code(INTEL, 6) /* * Tiled, NV12MT, grouped in 64 (pixels) x 32 (lines) -sized macroblocks diff --git a/lib/ioctl_wrappers.h b/lib/ioctl_wrappers.h index 03211c97..f2412d78 100644 --- a/lib/ioctl_wrappers.h +++ b/lib/ioctl_wrappers.h @@ -200,6 +200,7 @@ struct local_drm_mode_fb_cmd2 { #define LOCAL_I915_FORMAT_MOD_Yf_TILED local_fourcc_mod_code(INTEL, 3) #define LOCAL_I915_FORMAT_MOD_Y_TILED_CCS local_fourcc_mod_code(INTEL, 4) #define LOCAL_I915_FORMAT_MOD_Yf_TILED_CCS local_fourcc_mod_code(INTEL, 5) +#define LOCAL_I915_FORMAT_MOD_Y_TILED_GEN12_RC_CCS fourcc_mod_code(INTEL, 6) #define LOCAL_DRM_IOCTL_MODE_ADDFB2 DRM_IOWR(0xB8, \ struct local_drm_mode_fb_cmd2) -- 2.17.1 _______________________________________________ igt-dev mailing list igt-dev@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/igt-dev ^ permalink raw reply related [flat|nested] 10+ messages in thread
* [igt-dev] [PATCH i-g-t v4 2/3] lib/igt_fb.c: Update tile sizes for GEN12 CCS 2019-11-08 11:41 [igt-dev] [PATCH i-g-t v4 0/3] GEN12 render decompression Mika Kahola 2019-11-08 11:41 ` [igt-dev] [PATCH i-g-t v4 1/3] Format modifier for Intel Gen-12 render compression Mika Kahola @ 2019-11-08 11:41 ` Mika Kahola 2019-11-08 11:41 ` [igt-dev] [PATCH i-g-t v4 3/3] tests/kms_ccs: Add GEN12 CCS render compression format modifiers Mika Kahola 2019-11-08 12:15 ` [igt-dev] ✗ GitLab.Pipeline: warning for GEN12 render decompression (rev3) Patchwork 3 siblings, 0 replies; 10+ messages in thread From: Mika Kahola @ 2019-11-08 11:41 UTC (permalink / raw) To: igt-dev Update tile sizes for GEN12 CCS. BSpec: 47709 Signed-off-by: Mika Kahola <mika.kahola@intel.com> Reviewed-by: Radhakrishna Sripada <radhakrishna.sripada@intel.com> --- lib/igt_fb.c | 34 ++++++++++++++++++++++++++++++++-- 1 file changed, 32 insertions(+), 2 deletions(-) diff --git a/lib/igt_fb.c b/lib/igt_fb.c index 4adca967..77030d49 100644 --- a/lib/igt_fb.c +++ b/lib/igt_fb.c @@ -413,6 +413,33 @@ void igt_get_fb_tile_size(int fd, uint64_t modifier, int fb_bpp, *height_ret = 32; } break; + case LOCAL_I915_FORMAT_MOD_Y_TILED_GEN12_RC_CCS: + igt_require_intel(fd); + switch (fb_bpp) { + case 8: + *width_ret = 512; + *height_ret = 32; + break; + case 16: + *width_ret = 256; + *height_ret = 32; + break; + case 32: + *width_ret = 128; + *height_ret = 32; + break; + case 64: + *width_ret = 64; + *height_ret = 32; + break; + case 128: + *width_ret = 32; + *height_ret = 32; + break; + default: + igt_assert(false); + } + break; case LOCAL_I915_FORMAT_MOD_Yf_TILED: case LOCAL_I915_FORMAT_MOD_Yf_TILED_CCS: igt_require_intel(fd); @@ -467,8 +494,10 @@ void igt_get_fb_tile_size(int fd, uint64_t modifier, int fb_bpp, static bool is_ccs_modifier(uint64_t modifier) { - return modifier == LOCAL_I915_FORMAT_MOD_Y_TILED_CCS || - modifier == LOCAL_I915_FORMAT_MOD_Yf_TILED_CCS; + + return modifier == I915_FORMAT_MOD_Y_TILED_GEN12_RC_CCS || + modifier == I915_FORMAT_MOD_Y_TILED_CCS || + modifier == I915_FORMAT_MOD_Yf_TILED_CCS; } static unsigned fb_plane_width(const struct igt_fb *fb, int plane) @@ -687,6 +716,7 @@ uint64_t igt_fb_mod_to_tiling(uint64_t modifier) return I915_TILING_X; case LOCAL_I915_FORMAT_MOD_Y_TILED: case LOCAL_I915_FORMAT_MOD_Y_TILED_CCS: + case LOCAL_I915_FORMAT_MOD_Y_TILED_GEN12_RC_CCS: return I915_TILING_Y; case LOCAL_I915_FORMAT_MOD_Yf_TILED: case LOCAL_I915_FORMAT_MOD_Yf_TILED_CCS: -- 2.17.1 _______________________________________________ igt-dev mailing list igt-dev@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/igt-dev ^ permalink raw reply related [flat|nested] 10+ messages in thread
* [igt-dev] [PATCH i-g-t v4 3/3] tests/kms_ccs: Add GEN12 CCS render compression format modifiers 2019-11-08 11:41 [igt-dev] [PATCH i-g-t v4 0/3] GEN12 render decompression Mika Kahola 2019-11-08 11:41 ` [igt-dev] [PATCH i-g-t v4 1/3] Format modifier for Intel Gen-12 render compression Mika Kahola 2019-11-08 11:41 ` [igt-dev] [PATCH i-g-t v4 2/3] lib/igt_fb.c: Update tile sizes for GEN12 CCS Mika Kahola @ 2019-11-08 11:41 ` Mika Kahola 2019-11-08 12:15 ` [igt-dev] ✗ GitLab.Pipeline: warning for GEN12 render decompression (rev3) Patchwork 3 siblings, 0 replies; 10+ messages in thread From: Mika Kahola @ 2019-11-08 11:41 UTC (permalink / raw) To: igt-dev Add GEN12 CCS format modifiers for render compression. Render compression is not supported for 90/270 rotation. v2: Added new subtests for each format modifier. v3: Add IGT description for each subtest (GitLab) v4: Fix errorneous subtest execution and listing Bspec: 49252 Signed-off-by: Mika Kahola <mika.kahola@intel.com> --- tests/kms_ccs.c | 107 ++++++++++++++++++++++++++++-------------------- 1 file changed, 63 insertions(+), 44 deletions(-) diff --git a/tests/kms_ccs.c b/tests/kms_ccs.c index 1ce66cde..c5a37df8 100644 --- a/tests/kms_ccs.c +++ b/tests/kms_ccs.c @@ -70,10 +70,14 @@ static const struct { {0.0, 1.0, 0.0} }; -static const uint64_t ccs_modifiers[] = { - LOCAL_I915_FORMAT_MOD_Y_TILED_CCS, - LOCAL_I915_FORMAT_MOD_Yf_TILED_CCS, -}; +static const struct { + uint64_t modifier; + char name[8]; +} ccs_modifiers[3] = { + {LOCAL_I915_FORMAT_MOD_Y_TILED_CCS, "Y"}, + {LOCAL_I915_FORMAT_MOD_Yf_TILED_CCS, "Yf"}, + {LOCAL_I915_FORMAT_MOD_Y_TILED_GEN12_RC_CCS, "Y-rc"}, + }; /* * Limit maximum used sprite plane width so this test will not mistakenly @@ -300,17 +304,14 @@ static int test_ccs(data_t *data) static int __test_output(data_t *data) { igt_display_t *display = &data->display; - int i, valid_tests = 0; + int valid_tests = 0; data->output = igt_get_single_output_for_pipe(display, data->pipe); igt_require(data->output); igt_output_set_pipe(data->output, data->pipe); - for (i = 0; i < ARRAY_SIZE(ccs_modifiers); i++) { - data->ccs_modifier = ccs_modifiers[i]; - valid_tests += test_ccs(data); - } + valid_tests += test_ccs(data); igt_output_set_pipe(data->output, PIPE_NONE); igt_display_commit2(display, display->is_atomic ? COMMIT_ATOMIC : COMMIT_LEGACY); @@ -328,12 +329,14 @@ static data_t data; igt_main { + int i, gen; enum pipe pipe; igt_fixture { data.drm_fd = drm_open_driver_master(DRIVER_INTEL); - igt_require(intel_gen(intel_get_drm_devid(data.drm_fd)) >= 9); + gen = intel_gen(intel_get_drm_devid(data.drm_fd)); + igt_require(gen >= 9); kmstest_set_vt_graphics_mode(); igt_require_pipe_crc(data.drm_fd); @@ -345,51 +348,67 @@ igt_main data.pipe = pipe; - data.flags = TEST_BAD_PIXEL_FORMAT; - igt_subtest_f("pipe-%s-bad-pixel-format", pipe_name) - test_output(&data); + for (i = 0; i < ARRAY_SIZE(ccs_modifiers); i++) { + if (!igt_display_has_format_mod(&data.display, DRM_FORMAT_XRGB8888, + ccs_modifiers[i].modifier)) + continue; - data.flags = TEST_BAD_ROTATION_90; - igt_subtest_f("pipe-%s-bad-rotation-90", pipe_name) - test_output(&data); + data.ccs_modifier = ccs_modifiers[i].modifier; - data.flags = TEST_CRC; - igt_subtest_f("pipe-%s-crc-primary-basic", pipe_name) - test_output(&data); + data.flags = TEST_BAD_PIXEL_FORMAT; + igt_describe("Test bad pixel format with given CCS modifier"); + igt_subtest_f("pipe-%s-tiling-%s-bad-pixel-format", pipe_name, ccs_modifiers[i].name) + test_output(&data); - data.flags = TEST_CRC | TEST_ROTATE_180; - igt_subtest_f("pipe-%s-crc-primary-rotation-180", pipe_name) - test_output(&data); + data.flags = TEST_BAD_ROTATION_90; + igt_describe("Test 90 degree rotation with given CCS modifier"); + igt_subtest_f("pipe-%s-tiling-%s-bad-rotation-90", pipe_name, ccs_modifiers[i].name) + test_output(&data); - data.flags = TEST_CRC; - igt_subtest_f("pipe-%s-crc-sprite-planes-basic", pipe_name) { - int valid_tests = 0; + data.flags = TEST_CRC; + igt_describe("Test primary plane CRC compatibility with given CCS modifier"); + igt_subtest_f("pipe-%s-tiling-%s-crc-primary-basic", pipe_name, ccs_modifiers[i].name) + test_output(&data); - igt_display_require_output_on_pipe(&data.display, data.pipe); + data.flags = TEST_CRC | TEST_ROTATE_180; + igt_describe("Test 180 degree rotation with given CCS modifier"); + igt_subtest_f("pipe-%s-tiling-%s-crc-primary-rotation-180", pipe_name, ccs_modifiers[i].name) + test_output(&data); - for_each_plane_on_pipe(&data.display, data.pipe, data.plane) { - if (data.plane->type == DRM_PLANE_TYPE_PRIMARY) - continue; - valid_tests += __test_output(&data); - } + data.flags = TEST_CRC; + igt_describe("Test sprite plane CRC compatibility with given CCS modifier"); + igt_subtest_f("pipe-%s-tiling-%s-crc-sprite-planes-basic", pipe_name, ccs_modifiers[i].name) { + int valid_tests = 0; - igt_require_f(valid_tests > 0, - "CCS not supported, skipping\n"); - } + igt_display_require_output_on_pipe(&data.display, data.pipe); + + for_each_plane_on_pipe(&data.display, data.pipe, data.plane) { + if (data.plane->type == DRM_PLANE_TYPE_PRIMARY) + continue; + valid_tests += __test_output(&data); + } - data.plane = NULL; + igt_require_f(valid_tests > 0, + "CCS not supported, skipping\n"); + } - data.flags = TEST_NO_AUX_BUFFER; - igt_subtest_f("pipe-%s-missing-ccs-buffer", pipe_name) - test_output(&data); + data.plane = NULL; - data.flags = TEST_BAD_CCS_HANDLE; - igt_subtest_f("pipe-%s-ccs-on-another-bo", pipe_name) - test_output(&data); + data.flags = TEST_NO_AUX_BUFFER; + igt_describe("Test missing CCS buffer with given CCS modifier"); + igt_subtest_f("pipe-%s-tiling-%s-missing-ccs-buffer", pipe_name, ccs_modifiers[i].name) + test_output(&data); - data.flags = TEST_BAD_AUX_STRIDE; - igt_subtest_f("pipe-%s-bad-aux-stride", pipe_name) - test_output(&data); + data.flags = TEST_BAD_CCS_HANDLE; + igt_describe("Test CCS with different BO with given modifier"); + igt_subtest_f("pipe-%s-tiling-%s-ccs-on-another-bo", pipe_name, ccs_modifiers[i].name) + test_output(&data); + + data.flags = TEST_BAD_AUX_STRIDE; + igt_describe("Test with bad AUX stride with given CCS modifier"); + igt_subtest_f("pipe-%s-tiling-%s-bad-aux-stride", pipe_name, ccs_modifiers[i].name) + test_output(&data); + } } igt_fixture -- 2.17.1 _______________________________________________ igt-dev mailing list igt-dev@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/igt-dev ^ permalink raw reply related [flat|nested] 10+ messages in thread
* [igt-dev] ✗ GitLab.Pipeline: warning for GEN12 render decompression (rev3) 2019-11-08 11:41 [igt-dev] [PATCH i-g-t v4 0/3] GEN12 render decompression Mika Kahola ` (2 preceding siblings ...) 2019-11-08 11:41 ` [igt-dev] [PATCH i-g-t v4 3/3] tests/kms_ccs: Add GEN12 CCS render compression format modifiers Mika Kahola @ 2019-11-08 12:15 ` Patchwork 3 siblings, 0 replies; 10+ messages in thread From: Patchwork @ 2019-11-08 12:15 UTC (permalink / raw) To: Mika Kahola; +Cc: igt-dev == Series Details == Series: GEN12 render decompression (rev3) URL : https://patchwork.freedesktop.org/series/68937/ State : warning == Summary == Did not get list of undocumented tests for this run, something is wrong! Other than that, pipeline status: FAILED. see https://gitlab.freedesktop.org/gfx-ci/igt-ci-tags/pipelines/77412 for more details == Logs == For more details see: https://gitlab.freedesktop.org/gfx-ci/igt-ci-tags/pipelines/77412 _______________________________________________ igt-dev mailing list igt-dev@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/igt-dev ^ permalink raw reply [flat|nested] 10+ messages in thread
* [igt-dev] [PATCH i-g-t v4 0/3] GEN12 render decompression @ 2019-11-11 11:00 Mika Kahola 2019-11-11 11:00 ` [igt-dev] [PATCH i-g-t v4 2/3] lib/igt_fb.c: Update tile sizes for GEN12 CCS Mika Kahola 0 siblings, 1 reply; 10+ messages in thread From: Mika Kahola @ 2019-11-11 11:00 UTC (permalink / raw) To: igt-dev Gen-12 render decompression is supported with Y-tiled main surface. The patch series introduces CCS support for IGT tests. This patch series requires Imre's series https://patchwork.freedesktop.org/series/68890/ v2: Added new subtests for each format modifier. v3: Add IGT description for each subtest (GitLab) v4: Fix kms_ccs errornouse subtest execution and listing Mika Kahola (3): Format modifier for Intel Gen-12 render compression lib/igt_fb.c: Update tile sizes for GEN12 CCS tests/kms_ccs: Add GEN12 CCS render compression format modifiers include/drm-uapi/drm_fourcc.h | 1 + lib/igt_fb.c | 34 ++++++++++- lib/ioctl_wrappers.h | 1 + tests/kms_ccs.c | 110 ++++++++++++++++++++-------------- 4 files changed, 99 insertions(+), 47 deletions(-) -- 2.17.1 _______________________________________________ igt-dev mailing list igt-dev@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/igt-dev ^ permalink raw reply [flat|nested] 10+ messages in thread
* [igt-dev] [PATCH i-g-t v4 2/3] lib/igt_fb.c: Update tile sizes for GEN12 CCS 2019-11-11 11:00 [igt-dev] [PATCH i-g-t v4 0/3] GEN12 render decompression Mika Kahola @ 2019-11-11 11:00 ` Mika Kahola 2019-11-11 15:22 ` Imre Deak 0 siblings, 1 reply; 10+ messages in thread From: Mika Kahola @ 2019-11-11 11:00 UTC (permalink / raw) To: igt-dev Update tile sizes for GEN12 CCS. BSpec: 47709 Signed-off-by: Mika Kahola <mika.kahola@intel.com> Reviewed-by: Radhakrishna Sripada <radhakrishna.sripada@intel.com> --- lib/igt_fb.c | 34 ++++++++++++++++++++++++++++++++-- 1 file changed, 32 insertions(+), 2 deletions(-) diff --git a/lib/igt_fb.c b/lib/igt_fb.c index 4adca967..77030d49 100644 --- a/lib/igt_fb.c +++ b/lib/igt_fb.c @@ -413,6 +413,33 @@ void igt_get_fb_tile_size(int fd, uint64_t modifier, int fb_bpp, *height_ret = 32; } break; + case LOCAL_I915_FORMAT_MOD_Y_TILED_GEN12_RC_CCS: + igt_require_intel(fd); + switch (fb_bpp) { + case 8: + *width_ret = 512; + *height_ret = 32; + break; + case 16: + *width_ret = 256; + *height_ret = 32; + break; + case 32: + *width_ret = 128; + *height_ret = 32; + break; + case 64: + *width_ret = 64; + *height_ret = 32; + break; + case 128: + *width_ret = 32; + *height_ret = 32; + break; + default: + igt_assert(false); + } + break; case LOCAL_I915_FORMAT_MOD_Yf_TILED: case LOCAL_I915_FORMAT_MOD_Yf_TILED_CCS: igt_require_intel(fd); @@ -467,8 +494,10 @@ void igt_get_fb_tile_size(int fd, uint64_t modifier, int fb_bpp, static bool is_ccs_modifier(uint64_t modifier) { - return modifier == LOCAL_I915_FORMAT_MOD_Y_TILED_CCS || - modifier == LOCAL_I915_FORMAT_MOD_Yf_TILED_CCS; + + return modifier == I915_FORMAT_MOD_Y_TILED_GEN12_RC_CCS || + modifier == I915_FORMAT_MOD_Y_TILED_CCS || + modifier == I915_FORMAT_MOD_Yf_TILED_CCS; } static unsigned fb_plane_width(const struct igt_fb *fb, int plane) @@ -687,6 +716,7 @@ uint64_t igt_fb_mod_to_tiling(uint64_t modifier) return I915_TILING_X; case LOCAL_I915_FORMAT_MOD_Y_TILED: case LOCAL_I915_FORMAT_MOD_Y_TILED_CCS: + case LOCAL_I915_FORMAT_MOD_Y_TILED_GEN12_RC_CCS: return I915_TILING_Y; case LOCAL_I915_FORMAT_MOD_Yf_TILED: case LOCAL_I915_FORMAT_MOD_Yf_TILED_CCS: -- 2.17.1 _______________________________________________ igt-dev mailing list igt-dev@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/igt-dev ^ permalink raw reply related [flat|nested] 10+ messages in thread
* Re: [igt-dev] [PATCH i-g-t v4 2/3] lib/igt_fb.c: Update tile sizes for GEN12 CCS 2019-11-11 11:00 ` [igt-dev] [PATCH i-g-t v4 2/3] lib/igt_fb.c: Update tile sizes for GEN12 CCS Mika Kahola @ 2019-11-11 15:22 ` Imre Deak 2019-11-11 15:51 ` Imre Deak 0 siblings, 1 reply; 10+ messages in thread From: Imre Deak @ 2019-11-11 15:22 UTC (permalink / raw) To: Mika Kahola; +Cc: igt-dev Hi, On Mon, Nov 11, 2019 at 01:00:48PM +0200, Mika Kahola wrote: > Update tile sizes for GEN12 CCS. > > BSpec: 47709 > > Signed-off-by: Mika Kahola <mika.kahola@intel.com> > Reviewed-by: Radhakrishna Sripada <radhakrishna.sripada@intel.com> > --- > lib/igt_fb.c | 34 ++++++++++++++++++++++++++++++++-- > 1 file changed, 32 insertions(+), 2 deletions(-) > > diff --git a/lib/igt_fb.c b/lib/igt_fb.c > index 4adca967..77030d49 100644 > --- a/lib/igt_fb.c > +++ b/lib/igt_fb.c > @@ -413,6 +413,33 @@ void igt_get_fb_tile_size(int fd, uint64_t modifier, int fb_bpp, > *height_ret = 32; > } > break; > + case LOCAL_I915_FORMAT_MOD_Y_TILED_GEN12_RC_CCS: > + igt_require_intel(fd); > + switch (fb_bpp) { > + case 8: > + *width_ret = 512; > + *height_ret = 32; > + break; > + case 16: > + *width_ret = 256; > + *height_ret = 32; > + break; > + case 32: > + *width_ret = 128; > + *height_ret = 32; > + break; > + case 64: > + *width_ret = 64; > + *height_ret = 32; > + break; > + case 128: > + *width_ret = 32; > + *height_ret = 32; > + break; > + default: > + igt_assert(false); > + } > + break; The above look wrong to me, tiles are always 4kB. So the GEN12 y-tiled tile width, height (CCS or not) are the same as on other platforms. OTOH, we should align both the main surface and AUX surface width and height for CCS. Those are setup in igt_init_fb()->fb_plane_height() and ->fb_plane_width(). The main surface (plane 0) should be aligned to 4x4 tiles (128x128 pixels). The AUX surface (plane 1) width/height should match this, so for that in fb_plane_width(): return DIV_ROUND_UP(fb->width, 128) * 64; and in fb_plane_height(): return DIV_ROUND_UP(fb->height, 128) * 4; > case LOCAL_I915_FORMAT_MOD_Yf_TILED: > case LOCAL_I915_FORMAT_MOD_Yf_TILED_CCS: > igt_require_intel(fd); > @@ -467,8 +494,10 @@ void igt_get_fb_tile_size(int fd, uint64_t modifier, int fb_bpp, > > static bool is_ccs_modifier(uint64_t modifier) > { > - return modifier == LOCAL_I915_FORMAT_MOD_Y_TILED_CCS || > - modifier == LOCAL_I915_FORMAT_MOD_Yf_TILED_CCS; > + > + return modifier == I915_FORMAT_MOD_Y_TILED_GEN12_RC_CCS || > + modifier == I915_FORMAT_MOD_Y_TILED_CCS || > + modifier == I915_FORMAT_MOD_Yf_TILED_CCS; > } > > static unsigned fb_plane_width(const struct igt_fb *fb, int plane) > @@ -687,6 +716,7 @@ uint64_t igt_fb_mod_to_tiling(uint64_t modifier) > return I915_TILING_X; > case LOCAL_I915_FORMAT_MOD_Y_TILED: > case LOCAL_I915_FORMAT_MOD_Y_TILED_CCS: > + case LOCAL_I915_FORMAT_MOD_Y_TILED_GEN12_RC_CCS: > return I915_TILING_Y; > case LOCAL_I915_FORMAT_MOD_Yf_TILED: > case LOCAL_I915_FORMAT_MOD_Yf_TILED_CCS: > -- > 2.17.1 > _______________________________________________ igt-dev mailing list igt-dev@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/igt-dev ^ permalink raw reply [flat|nested] 10+ messages in thread
* Re: [igt-dev] [PATCH i-g-t v4 2/3] lib/igt_fb.c: Update tile sizes for GEN12 CCS 2019-11-11 15:22 ` Imre Deak @ 2019-11-11 15:51 ` Imre Deak 2019-11-12 7:40 ` Kahola, Mika 0 siblings, 1 reply; 10+ messages in thread From: Imre Deak @ 2019-11-11 15:51 UTC (permalink / raw) To: Mika Kahola; +Cc: igt-dev On Mon, Nov 11, 2019 at 05:22:32PM +0200, Imre Deak wrote: > Hi, > > On Mon, Nov 11, 2019 at 01:00:48PM +0200, Mika Kahola wrote: > > Update tile sizes for GEN12 CCS. > > > > BSpec: 47709 > > > > Signed-off-by: Mika Kahola <mika.kahola@intel.com> > > Reviewed-by: Radhakrishna Sripada <radhakrishna.sripada@intel.com> > > --- > > lib/igt_fb.c | 34 ++++++++++++++++++++++++++++++++-- > > 1 file changed, 32 insertions(+), 2 deletions(-) > > > > diff --git a/lib/igt_fb.c b/lib/igt_fb.c > > index 4adca967..77030d49 100644 > > --- a/lib/igt_fb.c > > +++ b/lib/igt_fb.c > > @@ -413,6 +413,33 @@ void igt_get_fb_tile_size(int fd, uint64_t modifier, int fb_bpp, > > *height_ret = 32; > > } > > break; > > + case LOCAL_I915_FORMAT_MOD_Y_TILED_GEN12_RC_CCS: > > + igt_require_intel(fd); > > + switch (fb_bpp) { > > + case 8: > > + *width_ret = 512; > > + *height_ret = 32; > > + break; > > + case 16: > > + *width_ret = 256; > > + *height_ret = 32; > > + break; > > + case 32: > > + *width_ret = 128; > > + *height_ret = 32; > > + break; > > + case 64: > > + *width_ret = 64; > > + *height_ret = 32; > > + break; > > + case 128: > > + *width_ret = 32; > > + *height_ret = 32; > > + break; > > + default: > > + igt_assert(false); > > + } > > + break; > > The above look wrong to me, tiles are always 4kB. So the GEN12 y-tiled > tile width, height (CCS or not) are the same as on other platforms. > > OTOH, we should align both the main surface and AUX surface width and > height for CCS. Those are setup in igt_init_fb()->fb_plane_height() and > ->fb_plane_width(). The main surface (plane 0) should be aligned to 4x4 > tiles (128x128 pixels). and 128x128 is the case for 32bpp. For all bpps: bpp width height 8 512 128 16 256 128 32 128 128 64 64 128 128 32 128 > The AUX surface (plane 1) width/height should match this, so for that > in fb_plane_width(): > > return DIV_ROUND_UP(fb->width, 128) * 64; and here the divisor is based on the bpp as above. > > and in fb_plane_height(): > > return DIV_ROUND_UP(fb->height, 128) * 4; > > > > case LOCAL_I915_FORMAT_MOD_Yf_TILED: > > case LOCAL_I915_FORMAT_MOD_Yf_TILED_CCS: > > igt_require_intel(fd); > > @@ -467,8 +494,10 @@ void igt_get_fb_tile_size(int fd, uint64_t modifier, int fb_bpp, > > > > static bool is_ccs_modifier(uint64_t modifier) > > { > > - return modifier == LOCAL_I915_FORMAT_MOD_Y_TILED_CCS || > > - modifier == LOCAL_I915_FORMAT_MOD_Yf_TILED_CCS; > > + > > + return modifier == I915_FORMAT_MOD_Y_TILED_GEN12_RC_CCS || > > + modifier == I915_FORMAT_MOD_Y_TILED_CCS || > > + modifier == I915_FORMAT_MOD_Yf_TILED_CCS; > > } > > > > static unsigned fb_plane_width(const struct igt_fb *fb, int plane) > > @@ -687,6 +716,7 @@ uint64_t igt_fb_mod_to_tiling(uint64_t modifier) > > return I915_TILING_X; > > case LOCAL_I915_FORMAT_MOD_Y_TILED: > > case LOCAL_I915_FORMAT_MOD_Y_TILED_CCS: > > + case LOCAL_I915_FORMAT_MOD_Y_TILED_GEN12_RC_CCS: > > return I915_TILING_Y; > > case LOCAL_I915_FORMAT_MOD_Yf_TILED: > > case LOCAL_I915_FORMAT_MOD_Yf_TILED_CCS: > > -- > > 2.17.1 > > > _______________________________________________ > igt-dev mailing list > igt-dev@lists.freedesktop.org > https://lists.freedesktop.org/mailman/listinfo/igt-dev _______________________________________________ igt-dev mailing list igt-dev@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/igt-dev ^ permalink raw reply [flat|nested] 10+ messages in thread
* Re: [igt-dev] [PATCH i-g-t v4 2/3] lib/igt_fb.c: Update tile sizes for GEN12 CCS 2019-11-11 15:51 ` Imre Deak @ 2019-11-12 7:40 ` Kahola, Mika 2019-11-13 12:52 ` Imre Deak 0 siblings, 1 reply; 10+ messages in thread From: Kahola, Mika @ 2019-11-12 7:40 UTC (permalink / raw) To: Deak, Imre; +Cc: igt-dev On Mon, 2019-11-11 at 17:51 +0200, Imre Deak wrote: > On Mon, Nov 11, 2019 at 05:22:32PM +0200, Imre Deak wrote: > > Hi, > > > > On Mon, Nov 11, 2019 at 01:00:48PM +0200, Mika Kahola wrote: > > > Update tile sizes for GEN12 CCS. > > > > > > BSpec: 47709 > > > > > > Signed-off-by: Mika Kahola <mika.kahola@intel.com> > > > Reviewed-by: Radhakrishna Sripada <radhakrishna.sripada@intel.com > > > > > > > --- > > > lib/igt_fb.c | 34 ++++++++++++++++++++++++++++++++-- > > > 1 file changed, 32 insertions(+), 2 deletions(-) > > > > > > diff --git a/lib/igt_fb.c b/lib/igt_fb.c > > > index 4adca967..77030d49 100644 > > > --- a/lib/igt_fb.c > > > +++ b/lib/igt_fb.c > > > @@ -413,6 +413,33 @@ void igt_get_fb_tile_size(int fd, uint64_t > > > modifier, int fb_bpp, > > > *height_ret = 32; > > > } > > > break; > > > + case LOCAL_I915_FORMAT_MOD_Y_TILED_GEN12_RC_CCS: > > > + igt_require_intel(fd); > > > + switch (fb_bpp) { > > > + case 8: > > > + *width_ret = 512; > > > + *height_ret = 32; > > > + break; > > > + case 16: > > > + *width_ret = 256; > > > + *height_ret = 32; > > > + break; > > > + case 32: > > > + *width_ret = 128; > > > + *height_ret = 32; > > > + break; > > > + case 64: > > > + *width_ret = 64; > > > + *height_ret = 32; > > > + break; > > > + case 128: > > > + *width_ret = 32; > > > + *height_ret = 32; > > > + break; > > > + default: > > > + igt_assert(false); > > > + } > > > + break; > > > > The above look wrong to me, tiles are always 4kB. So the GEN12 y- > > tiled > > tile width, height (CCS or not) are the same as on other platforms. > > > > OTOH, we should align both the main surface and AUX surface width > > and > > height for CCS. Those are setup in igt_init_fb()->fb_plane_height() > > and > > ->fb_plane_width(). The main surface (plane 0) should be aligned to > > 4x4 > > tiles (128x128 pixels). > > and 128x128 is the case for 32bpp. For all bpps: > > bpp width height > 8 512 128 > 16 256 128 > 32 128 128 > 64 64 128 > 128 32 128 Ok, the numbers that I wrote originally above was found from BSpec. Since the tiles are always 4kB, I could update the patch with the numbers you provided. > > > The AUX surface (plane 1) width/height should match this, so for > > that > > in fb_plane_width(): > > > > return DIV_ROUND_UP(fb->width, 128) * 64; > > and here the divisor is based on the bpp as above. > > > > > and in fb_plane_height(): > > > > return DIV_ROUND_UP(fb->height, 128) * 4; > > > > > > > case LOCAL_I915_FORMAT_MOD_Yf_TILED: > > > case LOCAL_I915_FORMAT_MOD_Yf_TILED_CCS: > > > igt_require_intel(fd); > > > @@ -467,8 +494,10 @@ void igt_get_fb_tile_size(int fd, uint64_t > > > modifier, int fb_bpp, > > > > > > static bool is_ccs_modifier(uint64_t modifier) > > > { > > > - return modifier == LOCAL_I915_FORMAT_MOD_Y_TILED_CCS || > > > - modifier == LOCAL_I915_FORMAT_MOD_Yf_TILED_CCS; > > > + > > > + return modifier == I915_FORMAT_MOD_Y_TILED_GEN12_RC_CCS || > > > + modifier == I915_FORMAT_MOD_Y_TILED_CCS || > > > + modifier == I915_FORMAT_MOD_Yf_TILED_CCS; > > > } > > > > > > static unsigned fb_plane_width(const struct igt_fb *fb, int > > > plane) > > > @@ -687,6 +716,7 @@ uint64_t igt_fb_mod_to_tiling(uint64_t > > > modifier) > > > return I915_TILING_X; > > > case LOCAL_I915_FORMAT_MOD_Y_TILED: > > > case LOCAL_I915_FORMAT_MOD_Y_TILED_CCS: > > > + case LOCAL_I915_FORMAT_MOD_Y_TILED_GEN12_RC_CCS: > > > return I915_TILING_Y; > > > case LOCAL_I915_FORMAT_MOD_Yf_TILED: > > > case LOCAL_I915_FORMAT_MOD_Yf_TILED_CCS: > > > -- > > > 2.17.1 > > > > > > > _______________________________________________ > > igt-dev mailing list > > igt-dev@lists.freedesktop.org > > https://lists.freedesktop.org/mailman/listinfo/igt-dev _______________________________________________ igt-dev mailing list igt-dev@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/igt-dev ^ permalink raw reply [flat|nested] 10+ messages in thread
* Re: [igt-dev] [PATCH i-g-t v4 2/3] lib/igt_fb.c: Update tile sizes for GEN12 CCS 2019-11-12 7:40 ` Kahola, Mika @ 2019-11-13 12:52 ` Imre Deak 0 siblings, 0 replies; 10+ messages in thread From: Imre Deak @ 2019-11-13 12:52 UTC (permalink / raw) To: Kahola, Mika; +Cc: igt-dev On Tue, Nov 12, 2019 at 09:40:10AM +0200, Kahola, Mika wrote: > On Mon, 2019-11-11 at 17:51 +0200, Imre Deak wrote: > > On Mon, Nov 11, 2019 at 05:22:32PM +0200, Imre Deak wrote: > > > Hi, > > > > > > On Mon, Nov 11, 2019 at 01:00:48PM +0200, Mika Kahola wrote: > > > > Update tile sizes for GEN12 CCS. > > > > > > > > BSpec: 47709 > > > > > > > > Signed-off-by: Mika Kahola <mika.kahola@intel.com> > > > > Reviewed-by: Radhakrishna Sripada <radhakrishna.sripada@intel.com > > > > > > > > > --- > > > > lib/igt_fb.c | 34 ++++++++++++++++++++++++++++++++-- > > > > 1 file changed, 32 insertions(+), 2 deletions(-) > > > > > > > > diff --git a/lib/igt_fb.c b/lib/igt_fb.c > > > > index 4adca967..77030d49 100644 > > > > --- a/lib/igt_fb.c > > > > +++ b/lib/igt_fb.c > > > > @@ -413,6 +413,33 @@ void igt_get_fb_tile_size(int fd, uint64_t > > > > modifier, int fb_bpp, > > > > *height_ret = 32; > > > > } > > > > break; > > > > + case LOCAL_I915_FORMAT_MOD_Y_TILED_GEN12_RC_CCS: > > > > + igt_require_intel(fd); > > > > + switch (fb_bpp) { > > > > + case 8: > > > > + *width_ret = 512; > > > > + *height_ret = 32; > > > > + break; > > > > + case 16: > > > > + *width_ret = 256; > > > > + *height_ret = 32; > > > > + break; > > > > + case 32: > > > > + *width_ret = 128; > > > > + *height_ret = 32; > > > > + break; > > > > + case 64: > > > > + *width_ret = 64; > > > > + *height_ret = 32; > > > > + break; > > > > + case 128: > > > > + *width_ret = 32; > > > > + *height_ret = 32; > > > > + break; > > > > + default: > > > > + igt_assert(false); > > > > + } > > > > + break; > > > > > > The above look wrong to me, tiles are always 4kB. So the GEN12 y- > > > tiled tile width, height (CCS or not) are the same as on other > > > platforms. > > > > OTOH, we should align both the main surface and AUX surface width > > > and height for CCS. Those are setup in > > > igt_init_fb()->fb_plane_height() and ->fb_plane_width(). The main > > > surface (plane 0) should be aligned to 4x4 tiles (128x128 pixels). > > > > and 128x128 is the case for 32bpp. For all bpps: > > > > bpp width height > > 8 512 128 > > 16 256 128 > > 32 128 128 > > 64 64 128 > > 128 32 128 > > Ok, the numbers that I wrote originally above was found from BSpec. > Since the tiles are always 4kB, I could update the patch with the > numbers you provided. The BSpec list is correct, but it's about the plane size alignment not about tile sizes and it specifies width in pixels not in bytes as igt_get_fb_tile_size(). I think we should keep the tile size what it actually is (so 4kB or 128 bytes x 32 rows) and enforce the plane size alignment in calc_plane_stride() and calc_plane_size(). > > > The AUX surface (plane 1) width/height should match this, so for > > > that > > > in fb_plane_width(): > > > > > > return DIV_ROUND_UP(fb->width, 128) * 64; > > > > and here the divisor is based on the bpp as above. > > > > > > > > and in fb_plane_height(): > > > > > > return DIV_ROUND_UP(fb->height, 128) * 4; > > > > > > > > > > case LOCAL_I915_FORMAT_MOD_Yf_TILED: > > > > case LOCAL_I915_FORMAT_MOD_Yf_TILED_CCS: > > > > igt_require_intel(fd); > > > > @@ -467,8 +494,10 @@ void igt_get_fb_tile_size(int fd, uint64_t > > > > modifier, int fb_bpp, > > > > > > > > static bool is_ccs_modifier(uint64_t modifier) > > > > { > > > > - return modifier == LOCAL_I915_FORMAT_MOD_Y_TILED_CCS || > > > > - modifier == LOCAL_I915_FORMAT_MOD_Yf_TILED_CCS; > > > > + > > > > + return modifier == I915_FORMAT_MOD_Y_TILED_GEN12_RC_CCS || > > > > + modifier == I915_FORMAT_MOD_Y_TILED_CCS || > > > > + modifier == I915_FORMAT_MOD_Yf_TILED_CCS; > > > > } > > > > > > > > static unsigned fb_plane_width(const struct igt_fb *fb, int > > > > plane) > > > > @@ -687,6 +716,7 @@ uint64_t igt_fb_mod_to_tiling(uint64_t > > > > modifier) > > > > return I915_TILING_X; > > > > case LOCAL_I915_FORMAT_MOD_Y_TILED: > > > > case LOCAL_I915_FORMAT_MOD_Y_TILED_CCS: > > > > + case LOCAL_I915_FORMAT_MOD_Y_TILED_GEN12_RC_CCS: > > > > return I915_TILING_Y; > > > > case LOCAL_I915_FORMAT_MOD_Yf_TILED: > > > > case LOCAL_I915_FORMAT_MOD_Yf_TILED_CCS: > > > > -- > > > > 2.17.1 > > > > > > > > > > _______________________________________________ > > > igt-dev mailing list > > > igt-dev@lists.freedesktop.org > > > https://lists.freedesktop.org/mailman/listinfo/igt-dev _______________________________________________ igt-dev mailing list igt-dev@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/igt-dev ^ permalink raw reply [flat|nested] 10+ messages in thread
end of thread, other threads:[~2019-11-13 12:54 UTC | newest] Thread overview: 10+ messages (download: mbox.gz / follow: Atom feed) -- links below jump to the message on this page -- 2019-11-08 11:41 [igt-dev] [PATCH i-g-t v4 0/3] GEN12 render decompression Mika Kahola 2019-11-08 11:41 ` [igt-dev] [PATCH i-g-t v4 1/3] Format modifier for Intel Gen-12 render compression Mika Kahola 2019-11-08 11:41 ` [igt-dev] [PATCH i-g-t v4 2/3] lib/igt_fb.c: Update tile sizes for GEN12 CCS Mika Kahola 2019-11-08 11:41 ` [igt-dev] [PATCH i-g-t v4 3/3] tests/kms_ccs: Add GEN12 CCS render compression format modifiers Mika Kahola 2019-11-08 12:15 ` [igt-dev] ✗ GitLab.Pipeline: warning for GEN12 render decompression (rev3) Patchwork 2019-11-11 11:00 [igt-dev] [PATCH i-g-t v4 0/3] GEN12 render decompression Mika Kahola 2019-11-11 11:00 ` [igt-dev] [PATCH i-g-t v4 2/3] lib/igt_fb.c: Update tile sizes for GEN12 CCS Mika Kahola 2019-11-11 15:22 ` Imre Deak 2019-11-11 15:51 ` Imre Deak 2019-11-12 7:40 ` Kahola, Mika 2019-11-13 12:52 ` Imre Deak
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