* [U-Boot] [RESEND PATCH 00/10] GE boards initial DM conversion @ 2019-11-12 19:15 Robert Beckett 2019-11-12 19:15 ` [U-Boot] [RESEND PATCH 01/10] board: ge: bx50v3: sync devicetrees from Linux Robert Beckett 0 siblings, 1 reply; 24+ messages in thread From: Robert Beckett @ 2019-11-12 19:15 UTC (permalink / raw) To: u-boot This searies syncs the device trees from Linux, fixes a couple of issues and starts enabling DM features for GE boards. Denis Zalevskiy (2): configs: ppd: DM for USB and regulators PPD board: ge: bx50v3: Enable DM for PCI and ethernet Ian Ray (4): configs: bx50v3: Fix boot hang with video board: ge: bx50v3: Fix run-time warning board: ge: bx50v3: Fix message output to video console board: ge: pass rtc_status via device tree Robert Beckett (4): board: ge: bx50v3: sync devicetrees from Linux board: ge: ppd: sync device tree from Linux board: ge: bx50v3: use imx wdt board: ge: mx53ppd: use imx wdt arch/arm/dts/Makefile | 7 +- arch/arm/dts/imx53-ppd-uboot.dtsi | 12 + arch/arm/dts/imx53-ppd.dts | 1081 +++++++++++++++++++++++++- arch/arm/dts/imx6q-b450v3.dts | 160 ++++ arch/arm/dts/imx6q-b650v3.dts | 159 ++++ arch/arm/dts/imx6q-b850v3.dts | 302 +++++++ arch/arm/dts/imx6q-ba16.dtsi | 640 +++++++++++++++ arch/arm/dts/imx6q-bx50v3-uboot.dtsi | 12 + arch/arm/dts/imx6q-bx50v3.dts | 78 +- arch/arm/dts/imx6q-bx50v3.dtsi | 381 +++++++++ board/ge/bx50v3/bx50v3.c | 160 ++-- board/ge/common/ge_common.c | 20 +- board/ge/mx53ppd/mx53ppd.c | 8 +- configs/ge_bx50v3_defconfig | 18 + configs/mx53ppd_defconfig | 5 + include/configs/ge_bx50v3.h | 23 +- include/configs/mx53ppd.h | 2 +- 17 files changed, 2865 insertions(+), 203 deletions(-) create mode 100644 arch/arm/dts/imx53-ppd-uboot.dtsi create mode 100644 arch/arm/dts/imx6q-b450v3.dts create mode 100644 arch/arm/dts/imx6q-b650v3.dts create mode 100644 arch/arm/dts/imx6q-b850v3.dts create mode 100644 arch/arm/dts/imx6q-ba16.dtsi create mode 100644 arch/arm/dts/imx6q-bx50v3-uboot.dtsi create mode 100644 arch/arm/dts/imx6q-bx50v3.dtsi -- 2.20.1 ^ permalink raw reply [flat|nested] 24+ messages in thread
* [U-Boot] [RESEND PATCH 01/10] board: ge: bx50v3: sync devicetrees from Linux 2019-11-12 19:15 [U-Boot] [RESEND PATCH 00/10] GE boards initial DM conversion Robert Beckett @ 2019-11-12 19:15 ` Robert Beckett 2019-11-12 19:15 ` [U-Boot] [RESEND PATCH 02/10] board: ge: ppd: sync device tree " Robert Beckett ` (2 more replies) 0 siblings, 3 replies; 24+ messages in thread From: Robert Beckett @ 2019-11-12 19:15 UTC (permalink / raw) To: u-boot Copy device trees from linux, keeping them as separate files for each board to ease future sync. Update board code to use generic bx50v3 dt initially, then select the specific dt based on board detection. Signed-off-by: Robert Beckett <bob.beckett@collabora.com> --- arch/arm/dts/Makefile | 7 +- arch/arm/dts/imx6q-b450v3.dts | 160 +++++++++ arch/arm/dts/imx6q-b650v3.dts | 159 ++++++++ arch/arm/dts/imx6q-b850v3.dts | 302 ++++++++++++++++ arch/arm/dts/imx6q-ba16.dtsi | 640 +++++++++++++++++++++++++++++++++ arch/arm/dts/imx6q-bx50v3.dts | 78 +--- arch/arm/dts/imx6q-bx50v3.dtsi | 380 ++++++++++++++++++++ board/ge/bx50v3/bx50v3.c | 34 +- configs/ge_bx50v3_defconfig | 5 + 9 files changed, 1689 insertions(+), 76 deletions(-) create mode 100644 arch/arm/dts/imx6q-b450v3.dts create mode 100644 arch/arm/dts/imx6q-b650v3.dts create mode 100644 arch/arm/dts/imx6q-b850v3.dts create mode 100644 arch/arm/dts/imx6q-ba16.dtsi create mode 100644 arch/arm/dts/imx6q-bx50v3.dtsi diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index 85ef00a2bd..1ee7fa197d 100644 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile @@ -829,7 +829,12 @@ dtb-$(CONFIG_ARCH_MEDIATEK) += \ mt7629-rfb.dtb \ mt8516-pumpkin.dtb -dtb-$(CONFIG_TARGET_GE_BX50V3) += imx6q-bx50v3.dtb +dtb-$(CONFIG_TARGET_GE_BX50V3) += \ + imx6q-bx50v3.dtb \ + imx6q-b850v3.dtb \ + imx6q-b650v3.dtb \ + imx6q-b450v3.dtb + dtb-$(CONFIG_TARGET_MX53PPD) += imx53-ppd.dtb dtb-$(CONFIG_TARGET_VEXPRESS_CA5X2) += vexpress-v2p-ca5s.dtb diff --git a/arch/arm/dts/imx6q-b450v3.dts b/arch/arm/dts/imx6q-b450v3.dts new file mode 100644 index 0000000000..7fca833cbf --- /dev/null +++ b/arch/arm/dts/imx6q-b450v3.dts @@ -0,0 +1,160 @@ +// SPDX-License-Identifier: GPL-2.0+ OR X11 +/* + * Copyright 2015 Timesys Corporation. + * Copyright 2015 General Electric Company + * + * This file is dual-licensed: you can use it either under the terms + * of the GPL or the X11 license, at your option. Note that this dual + * licensing only applies to this file, and not this project as a + * whole. + * + * a) This file is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This file is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * Or, alternatively, + * + * b) Permission is hereby granted, free of charge, to any person + * obtaining a copy of this software and associated documentation + * files (the "Software"), to deal in the Software without + * restriction, including without limitation the rights to use, + * copy, modify, merge, publish, distribute, sublicense, and/or + * sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following + * conditions: + * + * The above copyright notice and this permission notice shall be + * included in all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR + * OTHER DEALINGS IN THE SOFTWARE. + */ + +/dts-v1/; + +#include "imx6q-bx50v3.dtsi" + +/ { + model = "General Electric B450v3"; + compatible = "ge,imx6q-b450v3", "advantech,imx6q-ba16", "fsl,imx6q"; + + chosen { + stdout-path = &uart3; + }; + + panel-lvds0 { + compatible = "innolux,g121x1-l03"; + backlight = <&backlight_lvds>; + power-supply = <®_lvds>; + + port { + panel_in_lvds0: endpoint { + remote-endpoint = <&lvds0_out>; + }; + }; + }; +}; + +&clks { + assigned-clocks = <&clks IMX6QDL_CLK_LDB_DI0_SEL>, + <&clks IMX6QDL_CLK_LDB_DI1_SEL>; + assigned-clock-parents = <&clks IMX6QDL_CLK_PLL3_USB_OTG>, + <&clks IMX6QDL_CLK_PLL3_USB_OTG>; +}; + +&ldb { + status = "okay"; + + lvds0: lvds-channel at 0 { + fsl,data-mapping = "spwg"; + fsl,data-width = <24>; + status = "okay"; + + port at 4 { + reg = <4>; + + lvds0_out: endpoint { + remote-endpoint = <&panel_in_lvds0>; + }; + }; + }; +}; + +&pca9539 { + P04 { + gpio-hog; + gpios = <4 0>; + output-low; + line-name = "PCA9539-P04"; + }; + + P07 { + gpio-hog; + gpios = <7 0>; + output-low; + line-name = "PCA9539-P07"; + }; +}; + +&pci_root { + /* Intel Corporation I210 Gigabit Network Connection */ + switch_nic: ethernet at 3,0 { + compatible = "pci8086,1533"; + reg = <0x00010000 0 0 0 0>; + }; +}; + +&switch_ports { + port at 0 { + reg = <0>; + label = "enacq"; + phy-handle = <&switchphy0>; + }; + + port at 1 { + reg = <1>; + label = "eneport1"; + phy-handle = <&switchphy1>; + }; + + port at 2 { + reg = <2>; + label = "enix"; + phy-handle = <&switchphy2>; + }; + + port at 3 { + reg = <3>; + label = "enid"; + phy-handle = <&switchphy3>; + }; + + port at 4 { + reg = <4>; + label = "cpu"; + ethernet = <&switch_nic>; + phy-handle = <&switchphy4>; + }; + + port at 5 { + reg = <5>; + label = "enembc"; + + /* connected to Ethernet MAC of AT91RM9200 in MII mode */ + fixed-link { + speed = <100>; + full-duplex; + }; + }; +}; diff --git a/arch/arm/dts/imx6q-b650v3.dts b/arch/arm/dts/imx6q-b650v3.dts new file mode 100644 index 0000000000..ba12e9be5f --- /dev/null +++ b/arch/arm/dts/imx6q-b650v3.dts @@ -0,0 +1,159 @@ +// SPDX-License-Identifier: GPL-2.0+ OR X11 +/* + * Copyright 2015 Timesys Corporation. + * Copyright 2015 General Electric Company + * + * This file is dual-licensed: you can use it either under the terms + * of the GPL or the X11 license, at your option. Note that this dual + * licensing only applies to this file, and not this project as a + * whole. + * + * a) This file is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This file is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * Or, alternatively, + * + * b) Permission is hereby granted, free of charge, to any person + * obtaining a copy of this software and associated documentation + * files (the "Software"), to deal in the Software without + * restriction, including without limitation the rights to use, + * copy, modify, merge, publish, distribute, sublicense, and/or + * sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following + * conditions: + * + * The above copyright notice and this permission notice shall be + * included in all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR + * OTHER DEALINGS IN THE SOFTWARE. + */ + +/dts-v1/; + +#include "imx6q-bx50v3.dtsi" + +/ { + model = "General Electric B650v3"; + compatible = "ge,imx6q-b650v3", "advantech,imx6q-ba16", "fsl,imx6q"; + + chosen { + stdout-path = &uart3; + }; + + panel-lvds0 { + compatible = "innolux,g121x1-l03"; + backlight = <&backlight_lvds>; + power-supply = <®_lvds>; + + port { + panel_in_lvds0: endpoint { + remote-endpoint = <&lvds0_out>; + }; + }; + }; +}; + +&clks { + assigned-clocks = <&clks IMX6QDL_CLK_LDB_DI0_SEL>, + <&clks IMX6QDL_CLK_LDB_DI1_SEL>; + assigned-clock-parents = <&clks IMX6QDL_CLK_PLL3_USB_OTG>, + <&clks IMX6QDL_CLK_PLL3_USB_OTG>; +}; + +&ldb { + status = "okay"; + + lvds0: lvds-channel at 0 { + fsl,data-mapping = "spwg"; + fsl,data-width = <24>; + status = "okay"; + + port at 4 { + reg = <4>; + + lvds0_out: endpoint { + remote-endpoint = <&panel_in_lvds0>; + }; + }; + }; +}; + +&pca9539 { + P07 { + gpio-hog; + gpios = <7 0>; + output-low; + line-name = "PCA9539-P07"; + }; +}; + +&usbphy1 { + fsl,tx-cal-45-dn-ohms = <55>; + fsl,tx-cal-45-dp-ohms = <55>; + fsl,tx-d-cal = <100>; +}; + +&pci_root { + /* Intel Corporation I210 Gigabit Network Connection */ + switch_nic: ethernet at 3,0 { + compatible = "pci8086,1533"; + reg = <0x00010000 0 0 0 0>; + }; +}; + +&switch_ports { + port at 0 { + reg = <0>; + label = "enacq"; + phy-handle = <&switchphy0>; + }; + + port at 1 { + reg = <1>; + label = "eneport1"; + phy-handle = <&switchphy1>; + }; + + port at 2 { + reg = <2>; + label = "enix"; + phy-handle = <&switchphy2>; + }; + + port at 3 { + reg = <3>; + label = "enid"; + phy-handle = <&switchphy3>; + }; + + port at 4 { + reg = <4>; + label = "cpu"; + ethernet = <&switch_nic>; + phy-handle = <&switchphy4>; + }; + + port at 5 { + reg = <5>; + label = "enembc"; + + /* connected to Ethernet MAC of AT91RM9200 in MII mode */ + fixed-link { + speed = <100>; + full-duplex; + }; + }; +}; diff --git a/arch/arm/dts/imx6q-b850v3.dts b/arch/arm/dts/imx6q-b850v3.dts new file mode 100644 index 0000000000..0a98552691 --- /dev/null +++ b/arch/arm/dts/imx6q-b850v3.dts @@ -0,0 +1,302 @@ +// SPDX-License-Identifier: GPL-2.0+ OR X11 +/* + * Copyright 2015 Timesys Corporation. + * Copyright 2015 General Electric Company + * + * This file is dual-licensed: you can use it either under the terms + * of the GPL or the X11 license, at your option. Note that this dual + * licensing only applies to this file, and not this project as a + * whole. + * + * a) This file is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This file is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * Or, alternatively, + * + * b) Permission is hereby granted, free of charge, to any person + * obtaining a copy of this software and associated documentation + * files (the "Software"), to deal in the Software without + * restriction, including without limitation the rights to use, + * copy, modify, merge, publish, distribute, sublicense, and/or + * sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following + * conditions: + * + * The above copyright notice and this permission notice shall be + * included in all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR + * OTHER DEALINGS IN THE SOFTWARE. + */ + +/dts-v1/; + +#include "imx6q-bx50v3.dtsi" + +/ { + model = "General Electric B850v3"; + compatible = "ge,imx6q-b850v3", "advantech,imx6q-ba16", "fsl,imx6q"; + + chosen { + stdout-path = &uart3; + }; +}; + +&clks { + assigned-clocks = <&clks IMX6QDL_CLK_LDB_DI0_SEL>, + <&clks IMX6QDL_CLK_LDB_DI1_SEL>, + <&clks IMX6QDL_CLK_IPU1_DI0_PRE_SEL>, + <&clks IMX6QDL_CLK_IPU2_DI0_PRE_SEL>; + assigned-clock-parents = <&clks IMX6QDL_CLK_PLL5_VIDEO_DIV>, + <&clks IMX6QDL_CLK_PLL5_VIDEO_DIV>, + <&clks IMX6QDL_CLK_PLL2_PFD2_396M>, + <&clks IMX6QDL_CLK_PLL2_PFD2_396M>; +}; + +&ldb { + fsl,dual-channel; + status = "okay"; + + lvds0: lvds-channel at 0 { + fsl,data-mapping = "spwg"; + fsl,data-width = <24>; + status = "okay"; + + port at 4 { + reg = <4>; + + lvds0_out: endpoint { + remote-endpoint = <&stdp4028_in>; + }; + }; + }; +}; + +&i2c2 { + pca9547_ddc: mux at 70 { + compatible = "nxp,pca9547"; + reg = <0x70>; + #address-cells = <1>; + #size-cells = <0>; + + mux2_i2c1: i2c at 0 { + #address-cells = <1>; + #size-cells = <0>; + reg = <0x0>; + }; + + mux2_i2c2: i2c at 1 { + #address-cells = <1>; + #size-cells = <0>; + reg = <0x1>; + }; + + mux2_i2c3: i2c at 2 { + #address-cells = <1>; + #size-cells = <0>; + reg = <0x2>; + }; + + mux2_i2c4: i2c at 3 { + #address-cells = <1>; + #size-cells = <0>; + reg = <0x3>; + }; + + mux2_i2c5: i2c at 4 { + #address-cells = <1>; + #size-cells = <0>; + reg = <0x4>; + }; + + mux2_i2c6: i2c at 5 { + #address-cells = <1>; + #size-cells = <0>; + reg = <0x5>; + }; + + mux2_i2c7: i2c at 6 { + #address-cells = <1>; + #size-cells = <0>; + reg = <0x6>; + }; + + mux2_i2c8: i2c at 7 { + #address-cells = <1>; + #size-cells = <0>; + reg = <0x7>; + }; + }; +}; + +&hdmi { + ddc-i2c-bus = <&mux2_i2c1>; +}; + +&mux1_i2c1 { + ads7830 at 4a { + compatible = "ti,ads7830"; + reg = <0x4a>; + }; +}; + +&mux2_i2c2 { + clock-frequency = <100000>; + + stdp2690 at 72 { + compatible = "megachips,stdp2690-ge-b850v3-fw"; + reg = <0x72>; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port at 0 { + reg = <0>; + + stdp2690_in: endpoint { + remote-endpoint = <&stdp4028_out>; + }; + }; + + port at 1 { + reg = <1>; + + stdp2690_out: endpoint { + /* Connector for external display */ + }; + }; + }; + }; + + stdp4028 at 73 { + compatible = "megachips,stdp4028-ge-b850v3-fw"; + reg = <0x73>; + interrupt-parent = <&gpio2>; + interrupts = <0 IRQ_TYPE_LEVEL_HIGH>; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port at 0 { + reg = <0>; + + stdp4028_in: endpoint { + remote-endpoint = <&lvds0_out>; + }; + }; + + port at 1 { + reg = <1>; + + stdp4028_out: endpoint { + remote-endpoint = <&stdp2690_in>; + }; + }; + }; + }; +}; + +&pca9539 { + P10 { + gpio-hog; + gpios = <8 0>; + output-low; + line-name = "PCA9539-P10"; + }; + + P11 { + gpio-hog; + gpios = <9 0>; + output-low; + line-name = "PCA9539-P11"; + }; +}; + +&pci_root { + /* PLX Technology, Inc. PEX 8605 PCI Express 4-port Gen2 Switch */ + bridge at 1,0 { + compatible = "pci10b5,8605"; + reg = <0x00010000 0 0 0 0>; + + #address-cells = <3>; + #size-cells = <2>; + #interrupt-cells = <1>; + + bridge at 2,1 { + compatible = "pci10b5,8605"; + reg = <0x00020800 0 0 0 0>; + + #address-cells = <3>; + #size-cells = <2>; + #interrupt-cells = <1>; + + /* Intel Corporation I210 Gigabit Network Connection */ + ethernet at 3,0 { + compatible = "pci8086,1533"; + reg = <0x00030000 0 0 0 0>; + }; + }; + + bridge at 2,2 { + compatible = "pci10b5,8605"; + reg = <0x00021000 0 0 0 0>; + + #address-cells = <3>; + #size-cells = <2>; + #interrupt-cells = <1>; + + /* Intel Corporation I210 Gigabit Network Connection */ + switch_nic: ethernet at 4,0 { + compatible = "pci8086,1533"; + reg = <0x00040000 0 0 0 0>; + }; + }; + }; +}; + +&switch_ports { + port at 0 { + reg = <0>; + label = "eneport1"; + phy-handle = <&switchphy0>; + }; + + port at 1 { + reg = <1>; + label = "eneport2"; + phy-handle = <&switchphy1>; + }; + + port at 2 { + reg = <2>; + label = "enix"; + phy-handle = <&switchphy2>; + }; + + port at 3 { + reg = <3>; + label = "enid"; + phy-handle = <&switchphy3>; + }; + + port at 4 { + reg = <4>; + label = "cpu"; + ethernet = <&switch_nic>; + phy-handle = <&switchphy4>; + }; +}; diff --git a/arch/arm/dts/imx6q-ba16.dtsi b/arch/arm/dts/imx6q-ba16.dtsi new file mode 100644 index 0000000000..7d8f61f2fd --- /dev/null +++ b/arch/arm/dts/imx6q-ba16.dtsi @@ -0,0 +1,640 @@ +// SPDX-License-Identifier: GPL-2.0+ OR X11 +/* + * Support for imx6 based Advantech DMS-BA16 Qseven module + * + * Copyright 2015 Timesys Corporation. + * Copyright 2015 General Electric Company + * + * This file is dual-licensed: you can use it either under the terms + * of the GPL or the X11 license, at your option. Note that this dual + * licensing only applies to this file, and not this project as a + * whole. + * + * a) This file is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This file is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * Or, alternatively, + * + * b) Permission is hereby granted, free of charge, to any person + * obtaining a copy of this software and associated documentation + * files (the "Software"), to deal in the Software without + * restriction, including without limitation the rights to use, + * copy, modify, merge, publish, distribute, sublicense, and/or + * sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following + * conditions: + * + * The above copyright notice and this permission notice shall be + * included in all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR + * OTHER DEALINGS IN THE SOFTWARE. + */ + +#include "imx6q.dtsi" +#include <dt-bindings/gpio/gpio.h> + +/ { + memory at 10000000 { + device_type = "memory"; + reg = <0x10000000 0x40000000>; + }; + + backlight_lvds: backlight { + compatible = "pwm-backlight"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_display>; + pwms = <&pwm1 0 5000000>; + brightness-levels = < 0 1 2 3 4 5 6 7 8 9 + 10 11 12 13 14 15 16 17 18 19 + 20 21 22 23 24 25 26 27 28 29 + 30 31 32 33 34 35 36 37 38 39 + 40 41 42 43 44 45 46 47 48 49 + 50 51 52 53 54 55 56 57 58 59 + 60 61 62 63 64 65 66 67 68 69 + 70 71 72 73 74 75 76 77 78 79 + 80 81 82 83 84 85 86 87 88 89 + 90 91 92 93 94 95 96 97 98 99 + 100 101 102 103 104 105 106 107 108 109 + 110 111 112 113 114 115 116 117 118 119 + 120 121 122 123 124 125 126 127 128 129 + 130 131 132 133 134 135 136 137 138 139 + 140 141 142 143 144 145 146 147 148 149 + 150 151 152 153 154 155 156 157 158 159 + 160 161 162 163 164 165 166 167 168 169 + 170 171 172 173 174 175 176 177 178 179 + 180 181 182 183 184 185 186 187 188 189 + 190 191 192 193 194 195 196 197 198 199 + 200 201 202 203 204 205 206 207 208 209 + 210 211 212 213 214 215 216 217 218 219 + 220 221 222 223 224 225 226 227 228 229 + 230 231 232 233 234 235 236 237 238 239 + 240 241 242 243 244 245 246 247 248 249 + 250 251 252 253 254 255>; + default-brightness-level = <255>; + enable-gpios = <&gpio1 0 GPIO_ACTIVE_HIGH>; + }; + + reg_1p8v: regulator-1p8v { + compatible = "regulator-fixed"; + regulator-name = "1P8V"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-always-on; + }; + + reg_3p3v: regulator-3p3v { + compatible = "regulator-fixed"; + regulator-name = "3P3V"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-always-on; + }; + + reg_lvds: regulator-lvds { + compatible = "regulator-fixed"; + regulator-name = "lvds_ppen"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-boot-on; + gpio = <&gpio3 22 GPIO_ACTIVE_HIGH>; + enable-active-high; + }; + + reg_usb_h1_vbus: regulator-usbh1vbus { + compatible = "regulator-fixed"; + regulator-name = "usb_h1_vbus"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + }; + + reg_usb_otg_vbus: regulator-usbotgvbus { + compatible = "regulator-fixed"; + regulator-name = "usb_otg_vbus"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + }; +}; + +&audmux { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_audmux>; + status = "okay"; +}; + +&ecspi1 { + cs-gpios = <&gpio2 30 GPIO_ACTIVE_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_ecspi1>; + status = "okay"; + + flash: n25q032 at 0 { + compatible = "jedec,spi-nor"; + #address-cells = <1>; + #size-cells = <1>; + spi-max-frequency = <20000000>; + reg = <0>; + + partition at 0 { + label = "U-Boot"; + reg = <0x0 0xc0000>; + }; + + partition at c0000 { + label = "env"; + reg = <0xc0000 0x10000>; + }; + + partition at d0000 { + label = "spare"; + reg = <0xd0000 0x320000>; + }; + + partition at 3f0000 { + label = "mfg"; + reg = <0x3f0000 0x10000>; + }; + }; +}; + +&fec { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_enet>; + phy-mode = "rgmii-id"; + status = "okay"; +}; + +&hdmi { + ddc-i2c-bus = <&i2c2>; + status = "okay"; +}; + +&i2c1 { + clock-frequency = <100000>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_i2c1>; + status = "okay"; +}; + +&i2c2 { + clock-frequency = <100000>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_i2c2>; + status = "okay"; +}; + +&i2c3 { + clock-frequency = <100000>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_i2c3>; + status = "okay"; + + pmic at 58 { + compatible = "dlg,da9063"; + reg = <0x58>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_pmic>; + interrupt-parent = <&gpio7>; + interrupts = <13 IRQ_TYPE_LEVEL_LOW>; + + onkey { + compatible = "dlg,da9063-onkey"; + }; + + regulators { + vdd_bcore1: bcore1 { + regulator-min-microvolt = <1420000>; + regulator-max-microvolt = <1420000>; + regulator-always-on; + regulator-boot-on; + }; + + vdd_bcore2: bcore2 { + regulator-min-microvolt = <1420000>; + regulator-max-microvolt = <1420000>; + regulator-always-on; + regulator-boot-on; + }; + + vdd_bpro: bpro { + regulator-min-microvolt = <1500000>; + regulator-max-microvolt = <1500000>; + regulator-always-on; + regulator-boot-on; + }; + + vdd_bmem: bmem { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-always-on; + regulator-boot-on; + }; + + vdd_bio: bio { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-always-on; + regulator-boot-on; + }; + + vdd_bperi: bperi { + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-always-on; + regulator-boot-on; + }; + + vdd_ldo1: ldo1 { + regulator-min-microvolt = <600000>; + regulator-max-microvolt = <1860000>; + }; + + vdd_ldo2: ldo2 { + regulator-min-microvolt = <600000>; + regulator-max-microvolt = <1860000>; + }; + + vdd_ldo3: ldo3 { + regulator-min-microvolt = <900000>; + regulator-max-microvolt = <3440000>; + }; + + vdd_ldo4: ldo4 { + regulator-min-microvolt = <900000>; + regulator-max-microvolt = <3440000>; + }; + + vdd_ldo5: ldo5 { + regulator-min-microvolt = <900000>; + regulator-max-microvolt = <3600000>; + }; + + vdd_ldo6: ldo6 { + regulator-min-microvolt = <900000>; + regulator-max-microvolt = <3600000>; + }; + + vdd_ldo7: ldo7 { + regulator-min-microvolt = <900000>; + regulator-max-microvolt = <3600000>; + }; + + vdd_ldo8: ldo8 { + regulator-min-microvolt = <900000>; + regulator-max-microvolt = <3600000>; + }; + + vdd_ldo9: ldo9 { + regulator-min-microvolt = <950000>; + regulator-max-microvolt = <3600000>; + }; + + vdd_ldo10: ldo10 { + regulator-min-microvolt = <900000>; + regulator-max-microvolt = <3600000>; + }; + + vdd_ldo11: ldo11 { + regulator-min-microvolt = <900000>; + regulator-max-microvolt = <3600000>; + regulator-always-on; + regulator-boot-on; + }; + }; + }; + + rtc at 32 { + compatible = "epson,rx8010"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_rtc>; + reg = <0x32>; + interrupt-parent = <&gpio4>; + interrupts = <10 IRQ_TYPE_LEVEL_HIGH>; + }; +}; + +&pcie { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_pcie>; + reset-gpio = <&gpio7 12 GPIO_ACTIVE_LOW>; + fsl,tx-swing-full = <103>; + fsl,tx-swing-low = <103>; + status = "okay"; +}; + +&pwm1 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_pwm1>; + status = "okay"; +}; + +&pwm2 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_pwm2>; + status = "disabled"; +}; + +&sata { + status = "okay"; +}; + +&ssi1 { + status = "okay"; +}; + +&uart3 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_uart3>; + uart-has-rtscts; + status = "okay"; +}; + +&uart4 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_uart4>; + status = "okay"; +}; + +&usbh1 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_usbhub>; + vbus-supply = <®_usb_h1_vbus>; + reset-gpios = <&gpio7 11 GPIO_ACTIVE_HIGH>; + status = "okay"; +}; + +&usbotg { + vbus-supply = <®_usb_otg_vbus>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_usbotg>; + disable-over-current; + status = "okay"; +}; + +&usdhc2 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_usdhc2>; + cd-gpios = <&gpio1 4 GPIO_ACTIVE_LOW>; + no-1-8-v; + keep-power-in-suspend; + wakeup-source; + status = "okay"; +}; + +&usdhc3 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_usdhc3 &pinctrl_usdhc3_reset>; + bus-width = <8>; + vmmc-supply = <&vdd_bperi>; + non-removable; + keep-power-in-suspend; + status = "okay"; +}; + +&wdog1 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_wdog>; + fsl,ext-reset-output; +}; + +&iomuxc { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_hog>; + + pinctrl_audmux: audmuxgrp { + fsl,pins = < + MX6QDL_PAD_DISP0_DAT20__AUD4_TXC 0x130b0 + MX6QDL_PAD_DISP0_DAT21__AUD4_TXD 0x130b0 + MX6QDL_PAD_DISP0_DAT22__AUD4_TXFS 0x130b0 + MX6QDL_PAD_DISP0_DAT23__AUD4_RXD 0x130b0 + >; + }; + + pinctrl_display: dispgrp { + fsl,pins = < + /* BLEN_OUT */ + MX6QDL_PAD_GPIO_0__GPIO1_IO00 0x1b0b0 + /* LVDS_PPEN_OUT */ + MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x1b0b0 + >; + }; + + pinctrl_ecspi1: ecspi1grp { + fsl,pins = < + MX6QDL_PAD_EIM_D17__ECSPI1_MISO 0x100b1 + MX6QDL_PAD_EIM_D18__ECSPI1_MOSI 0x100b1 + MX6QDL_PAD_EIM_D16__ECSPI1_SCLK 0x100b1 + /* SPI1 CS */ + MX6QDL_PAD_EIM_EB2__GPIO2_IO30 0x1b0b0 + >; + }; + + pinctrl_ecspi5: ecspi5grp { + fsl,pins = < + MX6QDL_PAD_SD1_DAT0__ECSPI5_MISO 0x1b0b0 + MX6QDL_PAD_SD1_CMD__ECSPI5_MOSI 0x1b0b0 + MX6QDL_PAD_SD1_CLK__ECSPI5_SCLK 0x1b0b0 + MX6QDL_PAD_SD1_DAT1__GPIO1_IO17 0x1b0b0 + >; + }; + + pinctrl_enet: enetgrp { + fsl,pins = < + MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x100b0 + MX6QDL_PAD_ENET_MDC__ENET_MDC 0x100b0 + MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x10030 + MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x10030 + MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x10030 + MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x10030 + MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x10030 + MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x10030 + MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x100b0 + MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b030 + MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b030 + MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b030 + MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b030 + MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b030 + MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b030 + /* FEC Reset */ + MX6QDL_PAD_ENET_TX_EN__GPIO1_IO28 0x1b0b0 + /* AR8033 Interrupt */ + MX6QDL_PAD_GPIO_19__GPIO4_IO05 0x1b0b0 + >; + }; + + pinctrl_hog: hoggrp { + fsl,pins = < + /* GPIO 0-7 */ + MX6QDL_PAD_NANDF_D0__GPIO2_IO00 0x1b0b0 + MX6QDL_PAD_NANDF_D1__GPIO2_IO01 0x1b0b0 + MX6QDL_PAD_NANDF_D2__GPIO2_IO02 0x1b0b0 + MX6QDL_PAD_NANDF_D3__GPIO2_IO03 0x1b0b0 + MX6QDL_PAD_NANDF_D4__GPIO2_IO04 0x1b0b0 + MX6QDL_PAD_NANDF_D5__GPIO2_IO05 0x1b0b0 + MX6QDL_PAD_NANDF_D6__GPIO2_IO06 0x1b0b0 + MX6QDL_PAD_NANDF_D7__GPIO2_IO07 0x1b0b0 + /* SUS_S3_OUT to CPLD */ + MX6QDL_PAD_KEY_ROW2__GPIO4_IO11 0x1b0b0 + >; + }; + + pinctrl_i2c1: i2c1grp { + fsl,pins = < + MX6QDL_PAD_CSI0_DAT8__I2C1_SDA 0x4001b8b1 + MX6QDL_PAD_CSI0_DAT9__I2C1_SCL 0x4001b8b1 + >; + }; + + pinctrl_i2c2: i2c2grp { + fsl,pins = < + MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1 + MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1 + >; + }; + + pinctrl_i2c3: i2c3grp { + fsl,pins = < + MX6QDL_PAD_GPIO_3__I2C3_SCL 0x4001b8b1 + MX6QDL_PAD_GPIO_6__I2C3_SDA 0x4001b8b1 + >; + }; + + pinctrl_pcie: pciegrp { + fsl,pins = < + /* PCIe Reset */ + MX6QDL_PAD_GPIO_17__GPIO7_IO12 0x1b0b0 + /* PCIe Wake */ + MX6QDL_PAD_GPIO_5__GPIO1_IO05 0x1b0b0 + >; + }; + + pinctrl_pmic: pmicgrp { + fsl,pins = < + /* PMIC Interrupt */ + MX6QDL_PAD_GPIO_18__GPIO7_IO13 0x1b0b0 + >; + }; + + pinctrl_pwm1: pwm1grp { + fsl,pins = < + MX6QDL_PAD_SD1_DAT3__PWM1_OUT 0x1b0b1 + >; + }; + + pinctrl_pwm2: pwm2grp { + fsl,pins = < + MX6QDL_PAD_GPIO_1__PWM2_OUT 0x1b0b1 + >; + }; + + pinctrl_rtc: rtcgrp { + fsl,pins = < + /* RTC_INT */ + MX6QDL_PAD_KEY_COL2__GPIO4_IO10 0x1b0b0 + >; + }; + + pinctrl_uart3: uart3grp { + fsl,pins = < + MX6QDL_PAD_EIM_D25__UART3_RX_DATA 0x1b0b1 + MX6QDL_PAD_EIM_D24__UART3_TX_DATA 0x1b0b1 + MX6QDL_PAD_EIM_D23__UART3_CTS_B 0x1b0b1 + MX6QDL_PAD_EIM_D31__UART3_RTS_B 0x1b0b1 + >; + }; + + pinctrl_uart4: uart4grp { + fsl,pins = < + MX6QDL_PAD_KEY_COL0__UART4_TX_DATA 0x1b0b1 + MX6QDL_PAD_KEY_ROW0__UART4_RX_DATA 0x1b0b1 + >; + }; + + pinctrl_usbhub: usbhubgrp { + fsl,pins = < + /* HUB_RESET */ + MX6QDL_PAD_GPIO_16__GPIO7_IO11 0x1b0b0 + >; + }; + + pinctrl_usbotg: usbotggrp { + fsl,pins = < + MX6QDL_PAD_ENET_RX_ER__USB_OTG_ID 0x17059 + >; + }; + + pinctrl_usdhc2: usdhc2grp { + fsl,pins = < + MX6QDL_PAD_SD2_CMD__SD2_CMD 0x17059 + MX6QDL_PAD_SD2_CLK__SD2_CLK 0x10059 + MX6QDL_PAD_SD2_DAT0__SD2_DATA0 0x17059 + MX6QDL_PAD_SD2_DAT1__SD2_DATA1 0x17059 + MX6QDL_PAD_SD2_DAT2__SD2_DATA2 0x17059 + MX6QDL_PAD_SD2_DAT3__SD2_DATA3 0x17059 + /* uSDHC2 CD */ + MX6QDL_PAD_GPIO_4__GPIO1_IO04 0x1b0b0 + >; + }; + + pinctrl_usdhc3: usdhc3grp { + fsl,pins = < + MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059 + MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10059 + MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059 + MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059 + MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059 + MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059 + MX6QDL_PAD_SD3_DAT4__SD3_DATA4 0x17059 + MX6QDL_PAD_SD3_DAT5__SD3_DATA5 0x17059 + MX6QDL_PAD_SD3_DAT6__SD3_DATA6 0x17059 + MX6QDL_PAD_SD3_DAT7__SD3_DATA7 0x17059 + >; + }; + + pinctrl_usdhc3_reset: usdhc3grp-reset { + fsl,pins = < + MX6QDL_PAD_SD3_RST__SD3_RESET 0x170F9 + >; + }; + + pinctrl_usdhc4: usdhc4grp { + fsl,pins = < + MX6QDL_PAD_SD4_CMD__SD4_CMD 0x17059 + MX6QDL_PAD_SD4_CLK__SD4_CLK 0x17059 + MX6QDL_PAD_SD4_DAT0__SD4_DATA0 0x17059 + MX6QDL_PAD_SD4_DAT1__SD4_DATA1 0x17059 + MX6QDL_PAD_SD4_DAT2__SD4_DATA2 0x17059 + MX6QDL_PAD_SD4_DAT3__SD4_DATA3 0x17059 + MX6QDL_PAD_SD4_DAT4__SD4_DATA4 0x17059 + MX6QDL_PAD_SD4_DAT5__SD4_DATA5 0x17059 + MX6QDL_PAD_SD4_DAT6__SD4_DATA6 0x17059 + MX6QDL_PAD_SD4_DAT7__SD4_DATA7 0x17059 + /* uSDHC4 CD */ + MX6QDL_PAD_NANDF_CS0__GPIO6_IO11 0x1b0b0 + /* uSDHC4 SDIO PWR */ + MX6QDL_PAD_NANDF_CS1__GPIO6_IO14 0x1b0b0 + /* uSDHC4 SDIO WP */ + MX6QDL_PAD_NANDF_CS2__GPIO6_IO15 0x1b0b0 + /* uSDHC4 SDIO LED */ + MX6QDL_PAD_NANDF_CS3__GPIO6_IO16 0x1b0b0 + >; + }; + + pinctrl_wdog: wdoggrp { + fsl,pins = < + MX6QDL_PAD_GPIO_9__WDOG1_B 0x1b0b0 + >; + }; +}; diff --git a/arch/arm/dts/imx6q-bx50v3.dts b/arch/arm/dts/imx6q-bx50v3.dts index deaec63509..a44d7004cb 100644 --- a/arch/arm/dts/imx6q-bx50v3.dts +++ b/arch/arm/dts/imx6q-bx50v3.dts @@ -1,4 +1,4 @@ -/* SPDX-License-Identifier: GPL-2.0+ OR X11 */ +// SPDX-License-Identifier: GPL-2.0+ OR X11 /* * Copyright 2015 Timesys Corporation. * Copyright 2018 General Electric Company @@ -7,83 +7,13 @@ /dts-v1/; -#include "imx6q.dtsi" -#include <dt-bindings/gpio/gpio.h> +#include "imx6q-bx50v3.dtsi" / { model = "General Electric Bx50v3"; compatible = "ge,imx6q-bx50v3", "advantech,imx6q-ba16", "fsl,imx6q"; -}; - -&iomuxc { - pinctrl-names = "default"; - - pinctrl_ecspi1: ecspi1grp { - fsl,pins = < - MX6QDL_PAD_EIM_D17__ECSPI1_MISO 0x100b1 - MX6QDL_PAD_EIM_D18__ECSPI1_MOSI 0x100b1 - MX6QDL_PAD_EIM_D16__ECSPI1_SCLK 0x100b1 - /* SPI1 CS */ - MX6QDL_PAD_EIM_EB2__GPIO2_IO30 0x1b0b0 - >; - }; - - pinctrl_usdhc3: usdhc3grp { - fsl,pins = < - MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059 - MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10059 - MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059 - MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059 - MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059 - MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059 - MX6QDL_PAD_SD3_DAT4__SD3_DATA4 0x17059 - MX6QDL_PAD_SD3_DAT5__SD3_DATA5 0x17059 - MX6QDL_PAD_SD3_DAT6__SD3_DATA6 0x17059 - MX6QDL_PAD_SD3_DAT7__SD3_DATA7 0x17059 - >; - }; - - pinctrl_usdhc3_reset: usdhc3grp-reset { - fsl,pins = < - MX6QDL_PAD_SD3_RST__SD3_RESET 0x170F9 - >; - }; -}; - -&usdhc1 { - status = "disabled"; -}; - -&usdhc2 { - status = "disabled"; -}; - -/* eMMC */ -&usdhc3 { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_usdhc3 &pinctrl_usdhc3_reset>; - bus-width = <8>; - non-removable; - keep-power-in-suspend; - status = "okay"; -}; - -&usdhc4 { - status = "disabled"; -}; - -/* SPI NOR */ -&ecspi1 { - cs-gpios = <&gpio2 30 GPIO_ACTIVE_LOW>; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_ecspi1>; - status = "okay"; - flash: n25q032 at 0 { - compatible = "jedec,spi-nor"; - #address-cells = <1>; - #size-cells = <1>; - spi-max-frequency = <20000000>; - reg = <0>; + chosen { + stdout-path = &uart3; }; }; diff --git a/arch/arm/dts/imx6q-bx50v3.dtsi b/arch/arm/dts/imx6q-bx50v3.dtsi new file mode 100644 index 0000000000..009f88e305 --- /dev/null +++ b/arch/arm/dts/imx6q-bx50v3.dtsi @@ -0,0 +1,380 @@ +// SPDX-License-Identifier: GPL-2.0+ OR X11 +/* + * Copyright 2015 Timesys Corporation. + * Copyright 2015 General Electric Company + * + * This file is dual-licensed: you can use it either under the terms + * of the GPL or the X11 license, at your option. Note that this dual + * licensing only applies to this file, and not this project as a + * whole. + * + * a) This file is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This file is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * Or, alternatively, + * + * b) Permission is hereby granted, free of charge, to any person + * obtaining a copy of this software and associated documentation + * files (the "Software"), to deal in the Software without + * restriction, including without limitation the rights to use, + * copy, modify, merge, publish, distribute, sublicense, and/or + * sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following + * conditions: + * + * The above copyright notice and this permission notice shall be + * included in all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR + * OTHER DEALINGS IN THE SOFTWARE. + */ + +#include "imx6q-ba16.dtsi" + +/ { + mclk: clock-mclk { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <22000000>; + }; + + gpio-poweroff { + compatible = "gpio-poweroff"; + gpios = <&gpio4 11 GPIO_ACTIVE_LOW>; + status = "okay"; + }; + + reg_wl18xx_vmmc: regulator-wl18xx { + compatible = "regulator-fixed"; + regulator-name = "vwl1807"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + gpio = <&pca9539 3 GPIO_ACTIVE_HIGH>; + startup-delay-us = <70000>; + enable-active-high; + }; + + reg_wlan: regulator-wlan { + compatible = "regulator-fixed"; + regulator-name = "3P3V_wlan"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-always-on; + regulator-boot-on; + gpio = <&gpio6 14 GPIO_ACTIVE_HIGH>; + }; + + sound { + compatible = "fsl,imx6q-ba16-sgtl5000", + "fsl,imx-audio-sgtl5000"; + model = "imx6q-ba16-sgtl5000"; + ssi-controller = <&ssi1>; + audio-codec = <&sgtl5000>; + audio-routing = + "MIC_IN", "Mic Jack", + "Mic Jack", "Mic Bias", + "LINE_IN", "Line In Jack", + "Headphone Jack", "HP_OUT"; + mux-int-port = <1>; + mux-ext-port = <4>; + }; + + aliases { + mdio-gpio0 = &mdio0; + }; + + mdio0: mdio-gpio { + compatible = "virtual,mdio-gpio"; + gpios = <&gpio2 5 GPIO_ACTIVE_HIGH>, /* mdc */ + <&gpio2 7 GPIO_ACTIVE_HIGH>; /* mdio */ + + #address-cells = <1>; + #size-cells = <0>; + + switch at 0 { + compatible = "marvell,mv88e6085"; /* 88e6240*/ + reg = <0>; + + switch_ports: ports { + #address-cells = <1>; + #size-cells = <0>; + }; + + mdio { + #address-cells = <1>; + #size-cells = <0>; + + switchphy0: switchphy at 0 { + reg = <0>; + }; + + switchphy1: switchphy at 1 { + reg = <1>; + }; + + switchphy2: switchphy at 2 { + reg = <2>; + }; + + switchphy3: switchphy at 3 { + reg = <3>; + }; + + switchphy4: switchphy at 4 { + reg = <4>; + }; + }; + }; + }; +}; + +&ecspi5 { + cs-gpios = <&gpio1 17 GPIO_ACTIVE_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_ecspi5>; + status = "okay"; + + m25_eeprom: m25p80 at 0 { + compatible = "atmel,at25"; + spi-max-frequency = <10000000>; + size = <0x8000>; + pagesize = <64>; + reg = <0>; + address-width = <16>; + }; +}; + +&i2c1 { + pinctrl-names = "default", "gpio"; + pinctrl-1 = <&pinctrl_i2c1_gpio>; + sda-gpios = <&gpio5 26 GPIO_ACTIVE_HIGH>; + scl-gpios = <&gpio5 27 GPIO_ACTIVE_HIGH>; + + pca9547: mux at 70 { + compatible = "nxp,pca9547"; + reg = <0x70>; + #address-cells = <1>; + #size-cells = <0>; + + mux1_i2c1: i2c at 0 { + #address-cells = <1>; + #size-cells = <0>; + reg = <0x0>; + + ads7830: ads7830 at 48 { + compatible = "ti,ads7830"; + reg = <0x48>; + }; + + mma8453: mma8453 at 1c { + compatible = "fsl,mma8453"; + reg = <0x1c>; + }; + }; + + mux1_i2c2: i2c at 1 { + #address-cells = <1>; + #size-cells = <0>; + reg = <0x1>; + + eeprom: eeprom at 50 { + compatible = "atmel,24c08"; + reg = <0x50>; + }; + + mpl3115: mpl3115 at 60 { + compatible = "fsl,mpl3115"; + reg = <0x60>; + }; + }; + + mux1_i2c3: i2c at 2 { + #address-cells = <1>; + #size-cells = <0>; + reg = <0x2>; + }; + + mux1_i2c4: i2c at 3 { + #address-cells = <1>; + #size-cells = <0>; + reg = <0x3>; + + sgtl5000: codec at a { + compatible = "fsl,sgtl5000"; + reg = <0x0a>; + clocks = <&mclk>; + VDDA-supply = <®_1p8v>; + VDDIO-supply = <®_3p3v>; + }; + }; + + mux1_i2c5: i2c at 4 { + #address-cells = <1>; + #size-cells = <0>; + reg = <0x4>; + + pca9539: pca9539 at 74 { + compatible = "nxp,pca9539"; + reg = <0x74>; + gpio-controller; + #gpio-cells = <2>; + interrupt-controller; + interrupt-parent = <&gpio2>; + interrupts = <3 IRQ_TYPE_LEVEL_LOW>; + + P12 { + gpio-hog; + gpios = <10 0>; + output-low; + line-name = "PCA9539-P12"; + }; + + P13 { + gpio-hog; + gpios = <11 0>; + output-low; + line-name = "PCA9539-P13"; + }; + + P14 { + gpio-hog; + gpios = <12 0>; + output-low; + line-name = "PCA9539-P14"; + }; + + P15 { + gpio-hog; + gpios = <13 0>; + output-low; + line-name = "PCA9539-P15"; + }; + + P16 { + gpio-hog; + gpios = <14 0>; + output-low; + line-name = "PCA9539-P16"; + }; + + P17 { + gpio-hog; + gpios = <15 0>; + output-low; + line-name = "PCA9539-P17"; + }; + }; + }; + + mux1_i2c6: i2c at 5 { + #address-cells = <1>; + #size-cells = <0>; + reg = <0x5>; + }; + + mux1_i2c7: i2c at 6 { + #address-cells = <1>; + #size-cells = <0>; + reg = <0x6>; + }; + + mux1_i2c8: i2c at 7 { + #address-cells = <1>; + #size-cells = <0>; + reg = <0x7>; + }; + }; +}; + +&i2c2 { + pinctrl-names = "default", "gpio"; + pinctrl-1 = <&pinctrl_i2c2_gpio>; + sda-gpios = <&gpio4 13 GPIO_ACTIVE_HIGH>; + scl-gpios = <&gpio4 12 GPIO_ACTIVE_HIGH>; +}; + +&i2c3 { + pinctrl-names = "default", "gpio"; + pinctrl-1 = <&pinctrl_i2c3_gpio>; + sda-gpios = <&gpio1 6 GPIO_ACTIVE_HIGH>; + scl-gpios = <&gpio1 3 GPIO_ACTIVE_HIGH>; +}; + +&iomuxc { + pinctrl_i2c1_gpio: i2c1gpiogrp { + fsl,pins = < + MX6QDL_PAD_CSI0_DAT8__GPIO5_IO26 0x1b0b0 + MX6QDL_PAD_CSI0_DAT9__GPIO5_IO27 0x1b0b0 + >; + }; + + pinctrl_i2c2_gpio: i2c2gpiogrp { + fsl,pins = < + MX6QDL_PAD_KEY_COL3__GPIO4_IO12 0x1b0b0 + MX6QDL_PAD_KEY_ROW3__GPIO4_IO13 0x1b0b0 + >; + }; + + pinctrl_i2c3_gpio: i2c3gpiogrp { + fsl,pins = < + MX6QDL_PAD_GPIO_3__GPIO1_IO03 0x1b0b0 + MX6QDL_PAD_GPIO_6__GPIO1_IO06 0x1b0b0 + >; + }; +}; + +&pmu { + secure-reg-access; +}; + +&usdhc2 { + status = "disabled"; +}; + +&usdhc4 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_usdhc4>; + bus-width = <4>; + vmmc-supply = <®_wl18xx_vmmc>; + no-1-8-v; + non-removable; + wakeup-source; + keep-power-in-suspend; + cap-power-off-card; + max-frequency = <25000000>; + #address-cells = <1>; + #size-cells = <0>; + status = "okay"; + + wlcore: wlcore at 2 { + compatible = "ti,wl1837"; + reg = <2>; + interrupt-parent = <&gpio2>; + interrupts = <6 IRQ_TYPE_LEVEL_HIGH>; + tcxo-clock-frequency = <26000000>; + }; +}; + +&pcie { + /* Synopsys, Inc. Device */ + pci_root: root at 0,0 { + compatible = "pci16c3,abcd"; + reg = <0x00000000 0 0 0 0>; + + #address-cells = <3>; + #size-cells = <2>; + #interrupt-cells = <1>; + }; +}; diff --git a/board/ge/bx50v3/bx50v3.c b/board/ge/bx50v3/bx50v3.c index 917ecc4c18..530b106ba5 100644 --- a/board/ge/bx50v3/bx50v3.c +++ b/board/ge/bx50v3/bx50v3.c @@ -31,12 +31,13 @@ #include <pwm.h> #include <version.h> #include <stdlib.h> +#include <dm/root.h> #include "../common/ge_common.h" #include "../common/vpd_reader.h" #include "../../../drivers/net/e1000.h" DECLARE_GLOBAL_DATA_PTR; -static int confidx = 3; /* Default to b850v3. */ +static int confidx; /* Default to generic. */ static struct vpd_cache vpd; #define NC_PAD_CTRL (PAD_CTL_PUS_100K_UP | \ @@ -552,8 +553,16 @@ int board_init(void) setup_i2c(2, CONFIG_SYS_I2C_SPEED, 0x7f, &i2c_pad_info3); if (!read_vpd(&vpd, vpd_callback)) { + int ret, rescan; + vpd.is_read = true; set_confidx(&vpd); + + ret = fdtdec_resetup(&rescan); + if (!ret && rescan) { + dm_uninit(); + dm_init_and_scan(false); + } } gpio_request(SUS_S3_OUT, "sus_s3_out"); @@ -728,3 +737,26 @@ U_BOOT_CMD( "enable Bx50 backlight", "" ); + +int board_fit_config_name_match(const char *name) +{ + if (!vpd.is_read) + return strcmp(name, "imx6q-bx50v3"); + + switch (vpd.product_id) { + case VPD_PRODUCT_B450: + return strcmp(name, "imx6q-b450v3"); + case VPD_PRODUCT_B650: + return strcmp(name, "imx6q-b650v3"); + case VPD_PRODUCT_B850: + return strcmp(name, "imx6q-b850v3"); + default: + return -1; + } +} + +int embedded_dtb_select(void) +{ + vpd.is_read = false; + return fdtdec_setup(); +} diff --git a/configs/ge_bx50v3_defconfig b/configs/ge_bx50v3_defconfig index 38f72bf8ef..94ad193393 100644 --- a/configs/ge_bx50v3_defconfig +++ b/configs/ge_bx50v3_defconfig @@ -13,6 +13,8 @@ CONFIG_OF_BOARD_SETUP=y CONFIG_BOOTDELAY=1 CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE=y CONFIG_SUPPORT_RAW_INITRD=y +# CONFIG_DISPLAY_BOARDINFO is not set +CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_BOUNCE_BUFFER=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_LAST_STAGE_INIT=y @@ -33,6 +35,9 @@ CONFIG_CMD_FS_GENERIC=y CONFIG_DOS_PARTITION=y CONFIG_OF_CONTROL=y CONFIG_DEFAULT_DEVICE_TREE="imx6q-bx50v3" +CONFIG_OF_LIST="imx6q-bx50v3 imx6q-b850v3 imx6q-b650v3 imx6q-b450v3" +CONFIG_DTB_RESELECT=y +CONFIG_MULTI_DTB_FIT=y CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_DM=y CONFIG_BOOTCOUNT_LIMIT=y -- 2.20.1 ^ permalink raw reply related [flat|nested] 24+ messages in thread
* [U-Boot] [RESEND PATCH 02/10] board: ge: ppd: sync device tree from Linux 2019-11-12 19:15 ` [U-Boot] [RESEND PATCH 01/10] board: ge: bx50v3: sync devicetrees from Linux Robert Beckett @ 2019-11-12 19:15 ` Robert Beckett 2019-11-12 19:15 ` [U-Boot] [RESEND PATCH 03/10] configs: bx50v3: Fix boot hang with video Robert Beckett 2019-12-29 10:27 ` [U-Boot] [RESEND PATCH 02/10] board: ge: ppd: sync device tree from Linux sbabic at denx.de 2019-12-27 13:53 ` [U-Boot][RESEND PATCH 01/10] board: ge: bx50v3: sync devicetrees " Stefano Babic 2019-12-29 10:27 ` [U-Boot] [RESEND " sbabic at denx.de 2 siblings, 2 replies; 24+ messages in thread From: Robert Beckett @ 2019-11-12 19:15 UTC (permalink / raw) To: u-boot Copy device tree from linux for PPD. Signed-off-by: Robert Beckett <bob.beckett@collabora.com> --- arch/arm/dts/imx53-ppd.dts | 1080 +++++++++++++++++++++++++++++++++++- 1 file changed, 1061 insertions(+), 19 deletions(-) diff --git a/arch/arm/dts/imx53-ppd.dts b/arch/arm/dts/imx53-ppd.dts index f89d6f4672..8f3864998c 100644 --- a/arch/arm/dts/imx53-ppd.dts +++ b/arch/arm/dts/imx53-ppd.dts @@ -1,43 +1,1085 @@ -/* SPDX-License-Identifier: GPL-2.0+ OR X11 */ +// SPDX-License-Identifier: GPL-2.0+ /* - * Copyright 2018 General Electric Company - * Based on imx53-ppd.dts from kernel 4.20.5. + * Copyright 2014 General Electric Company + * + * This file is dual-licensed: you can use it either under the terms + * of the GPL or the X11 license, at your option. Note that this dual + * licensing only applies to this file, and not this project as a + * whole. + * + * a) This file is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This file is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * Or, alternatively, + * + * b) Permission is hereby granted, free of charge, to any person + * obtaining a copy of this software and associated documentation + * files (the "Software"), to deal in the Software without + * restriction, including without limitation the rights to use, + * copy, modify, merge, publish, distribute, sublicense, and/or + * sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following + * conditions: + * + * The above copyright notice and this permission notice shall be + * included in all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR + * OTHER DEALINGS IN THE SOFTWARE. */ /dts-v1/; #include "imx53.dtsi" +#include <dt-bindings/input/input.h> / { model = "General Electric CS ONE"; compatible = "ge,imx53-cpuvo", "fsl,imx53"; + + aliases { + spi0 = &cspi; + spi1 = &ecspi1; + spi2 = &ecspi2; + }; + + chosen { + stdout-path = "serial0:115200n8"; + }; + + memory at 70000000 { + device_type = "memory"; + reg = <0x70000000 0x20000000>, + <0xb0000000 0x20000000>; + }; + + cko2_11M: sgtl-clock-cko2 { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <11289600>; + }; + + sgtlsound: sound { + compatible = "fsl,imx53-cpuvo-sgtl5000", + "fsl,imx-audio-sgtl5000"; + model = "imx53-cpuvo-sgtl5000"; + ssi-controller = <&ssi2>; + audio-codec = <&sgtl5000>; + audio-routing = + "MIC_IN", "Mic Jack", + "Mic Jack", "Mic Bias", + "Headphone Jack", "HP_OUT"; + mux-int-port = <2>; + mux-ext-port = <6>; + }; + + reg_sgtl5k: regulator-sgtl5k { + compatible = "regulator-fixed"; + regulator-name = "regulator-sgtl5k"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-always-on; + }; + + reg_usb_otg_vbus: regulator-usb-otg-vbus { + compatible = "regulator-fixed"; + regulator-name = "usbotg_vbus"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + pinctrl-0 = <&pinctrl_usb_otg_vbus>; + gpio = <&gpio4 15 GPIO_ACTIVE_HIGH>; + enable-active-high; + }; + + reg_usb_vbus: regulator-usb-vbus { + compatible = "regulator-fixed"; + regulator-name = "usbh1_vbus"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + regulator-always-on; + }; + + reg_usbh2_vbus: regulator-usbh2-vbus { + compatible = "regulator-fixed"; + regulator-name = "usbh2_vbus"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_usbh2_vbus>; + gpio = <&gpio3 31 GPIO_ACTIVE_HIGH>; + enable-active-high; + }; + + reg_usbh3_vbus: regulator-usbh3-vbus { + compatible = "regulator-fixed"; + regulator-name = "usbh3_vbus"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_usbh3_vbus>; + gpio = <&gpio5 27 GPIO_ACTIVE_HIGH>; + enable-active-high; + }; + + reg_tsiref: regulator-tsiref { + compatible = "regulator-fixed"; + regulator-name = "tsiref"; + regulator-min-microvolt = <2500000>; + regulator-max-microvolt = <2500000>; + regulator-always-on; + }; + + reg_3v3: regulator-3v3 { + /* TPS54320 */ + compatible = "regulator-fixed"; + regulator-name = "3V3"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-always-on; + }; + + reg_3v3_lcd: regulator-3v3-lcd { + /* MIC2009 */ + compatible = "regulator-fixed"; + regulator-name = "LCD_3V3"; + vin-supply = <®_3v3>; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-always-on; + }; + + pwm_bl: backlight { + compatible = "pwm-backlight"; + pwms = <&pwm2 0 50000>; + brightness-levels = <0 2 5 7 10 12 15 17 20 22 25 28 30 33 35 + 38 40 43 45 48 51 53 56 58 61 63 66 68 71 + 73 76 79 81 84 86 89 91 94 96 99 102 104 + 107 109 112 114 117 119 122 124 127 130 + 132 135 137 140 142 145 147 150 153 155 + 158 160 163 165 168 170 173 175 178 181 + 183 186 188 191 193 196 198 201 204 206 + 209 211 214 216 219 221 224 226 229 232 + 234 237 239 242 244 247 249 252 255>; + default-brightness-level = <0>; + enable-gpios = <&gpio5 29 GPIO_ACTIVE_HIGH>; + power-supply = <®_3v3_lcd>; + }; + + leds { + compatible = "pwm-leds"; + + alarm-brightness { + pwms = <&pwm1 0 100000>; + max-brightness = <255>; + }; + }; + + gpio-poweroff { + compatible = "gpio-poweroff"; + gpios = <&gpio3 9 GPIO_ACTIVE_HIGH>; + }; + + gpio-restart { + compatible = "gpio-restart"; + gpios = <&gpio3 8 GPIO_ACTIVE_HIGH>; + active-delay = <100>; + inactive-delay = <10>; + wait-delay = <100>; + }; + + power-gpio-keys { + compatible = "gpio-keys"; + + power-button { + label = "Power button"; + gpios = <&gpio4 13 GPIO_ACTIVE_HIGH>; + linux,code = <KEY_POWER>; + }; + }; + + touch-lock-key { + compatible = "gpio-keys"; + + touch-lock-button { + label = "Touch lock button"; + gpios = <&gpio5 2 GPIO_ACTIVE_LOW>; + linux,code = <KEY_F12>; + }; + }; + + usbphy2: usbphy-2 { + compatible = "usb-nop-xceiv"; + vcc-supply = <®_3v3>; + reset-gpios = <&gpio4 4 GPIO_ACTIVE_LOW>; + clock-names = "main_clk"; + clock-frequency = <24000000>; + clocks = <&clks IMX5_CLK_CKO2>; + assigned-clocks = <&clks IMX5_CLK_CKO2_SEL>, <&clks IMX5_CLK_OSC>; + assigned-clock-parents = <&clks IMX5_CLK_OSC>; + }; + + usbphy3: usbphy-3 { + compatible = "usb-nop-xceiv"; + vcc-supply = <®_3v3>; + reset-gpios = <&gpio2 19 GPIO_ACTIVE_LOW>; + clock-names = "main_clk"; + + clock-frequency = <24000000>; + clocks = <&clks IMX5_CLK_CKO2>; + assigned-clocks = <&clks IMX5_CLK_CKO2_SEL>, <&clks IMX5_CLK_OSC>; + assigned-clock-parents = <&clks IMX5_CLK_OSC>; + }; + + panel-lvds0 { + compatible = "nvd,9128"; + power-supply = <®_3v3_lcd>; + + port { + panel_in_lvds0: endpoint { + remote-endpoint = <&lvds0_out>; + }; + }; + }; }; -&iomuxc { +&usbphy0 { + vcc-supply = <®_3v3>; +}; + +&usbphy1 { + vcc-supply = <®_3v3>; +}; + +&audmux { pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_audmux>; + status = "okay"; +}; - pinctrl_esdhc3: esdhc3grp { - fsl,pins = < - MX53_PAD_PATA_DATA8__ESDHC3_DAT0 0x1d5 - MX53_PAD_PATA_DATA9__ESDHC3_DAT1 0x1d5 - MX53_PAD_PATA_DATA10__ESDHC3_DAT2 0x1d5 - MX53_PAD_PATA_DATA11__ESDHC3_DAT3 0x1d5 - MX53_PAD_PATA_DATA0__ESDHC3_DAT4 0x1d5 - MX53_PAD_PATA_DATA1__ESDHC3_DAT5 0x1d5 - MX53_PAD_PATA_DATA2__ESDHC3_DAT6 0x1d5 - MX53_PAD_PATA_DATA3__ESDHC3_DAT7 0x1d5 - MX53_PAD_PATA_RESET_B__ESDHC3_CMD 0x1d5 - MX53_PAD_PATA_IORDY__ESDHC3_CLK 0x1d5 - >; +&cpu0 { + /* CPU rated to 1GHz, not 1.2GHz as per the default settings */ + operating-points = < + /* kHz uV */ + 166666 850000 + 400000 900000 + 800000 1050000 + 1000000 1200000 + >; +}; + +&ecspi1 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_ecspi1>; + cs-gpios = <&gpio5 17 GPIO_ACTIVE_LOW + &gpio4 10 GPIO_ACTIVE_LOW + &gpio4 11 GPIO_ACTIVE_LOW + &gpio4 12 GPIO_ACTIVE_LOW>; + status = "okay"; + + spidev0: spi at 0 { + compatible = "ge,achc"; + reg = <0>; + spi-max-frequency = <1000000>; + }; + + spidev1: spi at 1 { + compatible = "ge,achc"; + reg = <1>; + spi-max-frequency = <1000000>; + }; + + gpioxra0: gpio at 2 { + compatible = "exar,xra1403"; + reg = <2>; + gpio-controller; + #gpio-cells = <2>; + spi-max-frequency = <1000000>; + }; + + gpioxra1: gpio at 3 { + compatible = "exar,xra1403"; + reg = <3>; + gpio-controller; + #gpio-cells = <2>; + spi-max-frequency = <1000000>; + }; +}; + +&ecspi2 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_ecspi2>; + cs-gpios = <&gpio2 26 GPIO_ACTIVE_LOW>; + status = "okay"; + + da9053 at 0 { + compatible = "dlg,da9053-aa"; + reg = <0>; + interrupt-parent = <&gpio3>; + interrupts = <12 IRQ_TYPE_LEVEL_LOW>; + spi-max-frequency = <1000000>; + dlg,tsi-as-adc; + tsiref-supply = <®_tsiref>; + + regulators { + buck1_reg: buck1 { + regulator-name = "BUCKCORE"; + regulator-min-microvolt = <500000>; + regulator-max-microvolt = <2075000>; + regulator-always-on; + }; + + buck2_reg: buck2 { + regulator-name = "BUCKPRO"; + regulator-min-microvolt = <500000>; + regulator-max-microvolt = <2075000>; + regulator-always-on; + }; + + buck3_reg: buck3 { + regulator-name = "BUCKMEM"; + regulator-min-microvolt = <925000>; + regulator-max-microvolt = <2500000>; + regulator-always-on; + }; + + buck4_reg: buck4 { + regulator-name = "BUCKPERI"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <3600000>; + regulator-always-on; + }; + + ldo1_reg: ldo1 { + regulator-name = "ldo1_1v3"; + regulator-min-microvolt = <600000>; + regulator-max-microvolt = <1800000>; + regulator-always-on; + }; + + ldo2_reg: ldo2 { + regulator-name = "ldo2_1v3"; + regulator-min-microvolt = <600000>; + regulator-max-microvolt = <1800000>; + regulator-always-on; + }; + + ldo3_reg: ldo3 { + regulator-name = "ldo3_3v3"; + regulator-min-microvolt = <1725000>; + regulator-max-microvolt = <3300000>; + regulator-always-on; + }; + + ldo4_reg: ldo4 { + regulator-name = "ldo4_2v775"; + regulator-min-microvolt = <1725000>; + regulator-max-microvolt = <3300000>; + regulator-always-on; + }; + + ldo5_reg: ldo5 { + regulator-name = "ldo5_3v3"; + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <3600000>; + regulator-always-on; + }; + + ldo6_reg: ldo6 { + regulator-name = "ldo6_1v3"; + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <3600000>; + regulator-always-on; + }; + + ldo7_reg: ldo7 { + regulator-name = "ldo7_2v75"; + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <3600000>; + regulator-always-on; + }; + + ldo8_reg: ldo8 { + regulator-name = "ldo8_1v8"; + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <3600000>; + regulator-always-on; + }; + + ldo9_reg: ldo9 { + regulator-name = "ldo9_1v5"; + regulator-min-microvolt = <1250000>; + regulator-max-microvolt = <3650000>; + regulator-always-on; + }; + + ldo10_reg: ldo10 { + regulator-name = "ldo10_1v3"; + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <3600000>; + regulator-always-on; + }; + }; }; + }; -/* eMMC */ &esdhc3 { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_esdhc3>; - compatible = "fsl,esdhc"; bus-width = <8>; non-removable; status = "okay"; }; + +&fec { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_fec>; + phy-supply = <®_3v3>; + phy-mode = "rmii"; + phy-reset-gpios = <&gpio2 16 GPIO_ACTIVE_LOW>; + status = "okay"; +}; + +&i2c1 { + pinctrl-names = "default", "gpio"; + pinctrl-0 = <&pinctrl_i2c1>; + pinctrl-1 = <&pinctrl_i2c1_gpio>; + sda-gpios = <&gpio3 28 GPIO_ACTIVE_HIGH>; + scl-gpios = <&gpio3 21 GPIO_ACTIVE_HIGH>; + status = "okay"; + + i2c-switch at 70 { + compatible = "nxp,pca9547"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x70>; + reset-gpios = <&gpio2 18 GPIO_ACTIVE_LOW>; + + i2c4: i2c at 0 { + #address-cells = <1>; + #size-cells = <0>; + reg = <0>; + + sgtl5000: codec at a { + compatible = "fsl,sgtl5000"; + reg = <0xa>; + #sound-dai-cells = <0>; + VDDA-supply = <®_sgtl5k>; + VDDIO-supply = <®_sgtl5k>; + clocks = <&cko2_11M>; + status = "okay"; + }; + }; + + i2c5: i2c at 1 { + #address-cells = <1>; + #size-cells = <0>; + reg = <1>; + + rtc at 30 { + compatible = "sii,s35390a"; + reg = <0x30>; + }; + + temp at 48 { + compatible = "ti,tmp112"; + reg = <0x48>; + }; + + mma8453q: accelerometer at 1c { + compatible = "fsl,mma8453"; + reg = <0x1c>; + interrupt-parent = <&gpio1>; + interrupts = <6 IRQ_TYPE_NONE>; + interrupt-names = "INT1"; + }; + + mpl3115: pressure-sensor at 60 { + compatible = "fsl,mpl3115"; + reg = <0x60>; + }; + + eeprom: eeprom at 50 { + compatible = "atmel,24c08"; + reg = <0x50>; + }; + }; + + i2c6: i2c at 2 { + #address-cells = <1>; + #size-cells = <0>; + reg = <2>; + }; + + i2c7: i2c at 3 { + #address-cells = <1>; + #size-cells = <0>; + reg = <3>; + }; + + i2c8: i2c at 4 { + #address-cells = <1>; + #size-cells = <0>; + reg = <4>; + }; + + i2c9: i2c at 5 { + #address-cells = <1>; + #size-cells = <0>; + reg = <5>; + }; + + i2c10: i2c at 6 { + #address-cells = <1>; + #size-cells = <0>; + reg = <6>; + }; + + i2c11: i2c at 7 { + #address-cells = <1>; + #size-cells = <0>; + reg = <7>; + }; + }; +}; + +&i2c2 { + pinctrl-names = "default", "gpio"; + pinctrl-0 = <&pinctrl_i2c2>; + pinctrl-1 = <&pinctrl_i2c2_gpio>; + sda-gpios = <&gpio3 16 GPIO_ACTIVE_HIGH>; + scl-gpios = <&gpio2 30 GPIO_ACTIVE_HIGH>; + status = "okay"; + + touchscreen at 4b { + compatible = "atmel,maxtouch"; + reset-gpio = <&gpio5 19 GPIO_ACTIVE_HIGH>; + reg = <0x4b>; + interrupt-parent = <&gpio5>; + interrupts = <4 IRQ_TYPE_LEVEL_LOW>; + }; +}; + +&i2c3 { + pinctrl-names = "default", "gpio"; + pinctrl-0 = <&pinctrl_i2c3>; + pinctrl-1 = <&pinctrl_i2c3_gpio>; + sda-gpios = <&gpio3 18 GPIO_ACTIVE_HIGH>; + scl-gpios = <&gpio3 17 GPIO_ACTIVE_HIGH>; + status = "okay"; +}; + +&ldb { + status = "okay"; + + lvds0: lvds-channel at 0 { + status = "okay"; + + port at 2 { + lvds0_out: endpoint { + remote-endpoint = <&panel_in_lvds0>; + }; + }; + }; +}; + +&pmu { + secure-reg-access; +}; + +&pwm1 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_pwm1>; + status = "okay"; +}; + +&pwm2 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_pwm2>; + status = "okay"; +}; + +&ssi2 { + status = "okay"; +}; + +&uart1 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_uart1>; + status = "okay"; +}; + +&uart2 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_uart2>; + status = "okay"; +}; + +&uart3 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_uart3>; + uart-has-rtscts; + status = "okay"; +}; + +&uart4 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_uart4>; + status = "okay"; +}; + +&uart5 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_uart5>; + status = "okay"; +}; + +&usbotg { + dr_mode = "otg"; + phy_type = "utmi"; + vbus-supply = <®_usb_otg_vbus>; + pinctrl-0 = <&pinctrl_usb_otg>; + status = "okay"; +}; + +&usbh1 { + vbus-supply = <®_usb_vbus>; + phy_type = "utmi"; + dr_mode = "host"; + status = "okay"; +}; + +&usbh2 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_usbh2>; + phy_type = "ulpi"; + dr_mode = "host"; + fsl,usbphy = <&usbphy2>; + vbus-supply = <®_usbh2_vbus>; + status = "okay"; +}; + +&usbh3 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_usbh3>; + phy_type = "ulpi"; + dr_mode = "host"; + vbus-supply = <®_usbh3_vbus>; + fsl,usbphy = <&usbphy3>; + status = "okay"; +}; + +&iomuxc { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_hog_rev6>; + + pinctrl_audmux: audmuxgrp { + fsl,pins = < + MX53_PAD_DISP0_DAT19__AUDMUX_AUD5_RXD 0x400 + MX53_PAD_DISP0_DAT17__AUDMUX_AUD5_TXD 0x400 + MX53_PAD_DISP0_DAT16__AUDMUX_AUD5_TXC 0x400 + MX53_PAD_DISP0_DAT18__AUDMUX_AUD5_TXFS 0x400 + MX53_PAD_DI0_PIN15__AUDMUX_AUD6_TXC 0x400 + MX53_PAD_DI0_PIN3__AUDMUX_AUD6_TXFS 0x400 + MX53_PAD_DI0_PIN4__AUDMUX_AUD6_RXD 0x400 + MX53_PAD_DI0_PIN2__AUDMUX_AUD6_TXD 0x400 + >; + }; + + pinctrl_ecspi1: ecspi1grp { + fsl,pins = < + MX53_PAD_DISP0_DAT21__ECSPI1_MOSI 0x400 + MX53_PAD_DISP0_DAT22__ECSPI1_MISO 0x400 + MX53_PAD_DISP0_DAT20__ECSPI1_SCLK 0x400 + /* ECSPI1_SS0, must treat as GPIO for EzPort */ + MX53_PAD_DISP0_DAT23__GPIO5_17 0x400 + MX53_PAD_KEY_COL2__GPIO4_10 0x0 + MX53_PAD_KEY_ROW2__GPIO4_11 0x0 + MX53_PAD_KEY_COL3__GPIO4_12 0x0 + >; + }; + + pinctrl_ecspi2: ecspi2grp { + fsl,pins = < + MX53_PAD_EIM_CS1__ECSPI2_MOSI 0x0 + MX53_PAD_EIM_OE__ECSPI2_MISO 0x0 + MX53_PAD_EIM_CS0__ECSPI2_SCLK 0x0 + MX53_PAD_EIM_RW__GPIO2_26 0x0 + >; + }; + + pinctrl_esdhc1: esdhc1grp { + fsl,pins = < + MX53_PAD_SD1_DATA0__ESDHC1_DAT0 0x1d5 + MX53_PAD_SD1_DATA1__ESDHC1_DAT1 0x1d5 + MX53_PAD_SD1_DATA2__ESDHC1_DAT2 0x1d5 + MX53_PAD_SD1_DATA3__ESDHC1_DAT3 0x1d5 + MX53_PAD_SD1_CMD__ESDHC1_CMD 0x1d5 + MX53_PAD_SD1_CLK__ESDHC1_CLK 0x1d5 + >; + }; + + pinctrl_esdhc3: esdhc3grp { + fsl,pins = < + MX53_PAD_PATA_DATA8__ESDHC3_DAT0 0x1d5 + MX53_PAD_PATA_DATA9__ESDHC3_DAT1 0x1d5 + MX53_PAD_PATA_DATA10__ESDHC3_DAT2 0x1d5 + MX53_PAD_PATA_DATA11__ESDHC3_DAT3 0x1d5 + MX53_PAD_PATA_DATA0__ESDHC3_DAT4 0x1d5 + MX53_PAD_PATA_DATA1__ESDHC3_DAT5 0x1d5 + MX53_PAD_PATA_DATA2__ESDHC3_DAT6 0x1d5 + MX53_PAD_PATA_DATA3__ESDHC3_DAT7 0x1d5 + MX53_PAD_PATA_RESET_B__ESDHC3_CMD 0x1d5 + MX53_PAD_PATA_IORDY__ESDHC3_CLK 0x1d5 + >; + }; + + pinctrl_fec: fecgrp { + fsl,pins = < + MX53_PAD_FEC_MDC__FEC_MDC 0x0 + MX53_PAD_FEC_MDIO__FEC_MDIO 0x0 + MX53_PAD_FEC_REF_CLK__FEC_TX_CLK 0x0 + MX53_PAD_FEC_RX_ER__FEC_RX_ER 0x0 + MX53_PAD_FEC_CRS_DV__FEC_RX_DV 0x0 + MX53_PAD_FEC_RXD1__FEC_RDATA_1 0x0 + MX53_PAD_FEC_RXD0__FEC_RDATA_0 0x0 + MX53_PAD_FEC_TX_EN__FEC_TX_EN 0x0 + MX53_PAD_FEC_TXD1__FEC_TDATA_1 0x0 + MX53_PAD_FEC_TXD0__FEC_TDATA_0 0x0 + >; + }; + + pinctrl_hog_rev6: hoggrp { + fsl,pins = < + /* CKO2 */ + MX53_PAD_GPIO_3__CCM_CLKO2 0x4 + /* DEFIB_SYNC_MARKER_IN_IRQ */ + MX53_PAD_GPIO_5__GPIO1_5 0x0 + /* ACCELEROMETER_DATA_RDY_N */ + MX53_PAD_GPIO_6__GPIO1_6 0x0 + /* TEMPERATURE_ALERT_N */ + MX53_PAD_GPIO_7__GPIO1_7 0x0 + /* BAROMETRIC_PRESSURE_DATA_RDY_N */ + MX53_PAD_GPIO_8__GPIO1_8 0x0 + /* DOCKING_I2C_INTERFACE_IRQ_N */ + MX53_PAD_PATA_DATA4__GPIO2_4 0x0 + /* PWR_OUT_TO_DOCK_FAULT_N */ + MX53_PAD_PATA_DATA5__GPIO2_5 0x0 + /* ENABLE_PWR_TO_DOCK_N */ + MX53_PAD_PATA_DATA6__GPIO2_6 0x0 + /* HOST_CONTROLLED_RESET_TO_DOCKING_CONNECTOR_N */ + MX53_PAD_PATA_DATA7__GPIO2_7 0x0 + /* REMOTE_ON_REQUEST_FROM_DOCKING_CONNECTOR_IS_ACTIVE_N */ + MX53_PAD_PATA_DATA12__GPIO2_12 0x0 + /* DOCK_PRESENT_N */ + MX53_PAD_PATA_DATA13__GPIO2_13 0x0 + /* ECG_MARKER_IN_FROM_DOCKING_CONNECTOR_IRQ */ + MX53_PAD_PATA_DATA14__GPIO2_14 0x0 + /* ENABLE_ECG_MARKER_INTERFACE_TO_DOCKING_CONNECTOR */ + MX53_PAD_PATA_DATA15__GPIO2_15 0x0 + /* RESET_IMX535_ETHERNET_PHY_N */ + MX53_PAD_EIM_A22__GPIO2_16 0x0 + /* ENABLE_PWR_TO_LCD_AND_UI_INTERFACE */ + MX53_PAD_EIM_A21__GPIO2_17 0x0 + /* RESET_I2C1_BUS_SEGMENT_MUX_N */ + MX53_PAD_EIM_A20__GPIO2_18 0x0 + /* RESET_IMX535_USB_HOST3_PHY_N */ + MX53_PAD_EIM_A19__GPIO2_19 0x0 + /* ESDHC3_EMMC_NAND_RST_N */ + MX53_PAD_EIM_A18__GPIO2_20 0x0 + /* LCD_AND_UI_INTERFACE_PWR_FAULT_N */ + MX53_PAD_EIM_A17__GPIO2_21 0x0 + /* POWER_DOWN_LVDS0_DESERIALIZER_N */ + MX53_PAD_EIM_A16__GPIO2_22 0x0 + /* POWER_DOWN_LVDS1_DESERIALIZER_N */ + MX53_PAD_EIM_LBA__GPIO2_27 0x0 + /* RESET_DP0_TRANSMITTER_N */ + MX53_PAD_EIM_EB0__GPIO2_28 0x0 + /* RESET_DP1_TRANSMITTER_N */ + MX53_PAD_EIM_EB1__GPIO2_29 0x0 + /* ENABLE_SPDIF_AUDIO_TO_DP0 */ + MX53_PAD_EIM_DA0__GPIO3_0 0x0 + /* ENABLE_SPDIF_AUDIO_TO_DP1 */ + MX53_PAD_EIM_DA1__GPIO3_1 0x0 + /* LVDS1_MUX_CTRL */ + MX53_PAD_EIM_DA2__GPIO3_2 0x0 + /* LVDS0_MUX_CTRL */ + MX53_PAD_EIM_DA3__GPIO3_3 0x0 + /* DP1_TRANSMITTER_IRQ */ + MX53_PAD_EIM_DA4__GPIO3_4 0x0 + /* DP0_TRANSMITTER_IRQ */ + MX53_PAD_EIM_DA5__GPIO3_5 0x0 + /* USB_RESET_N */ + MX53_PAD_EIM_DA6__GPIO3_6 0x0 + /* ENABLE_BATTERY_CHARGER */ + MX53_PAD_EIM_DA7__GPIO3_7 0x0 + /* SOFTWARE_CONTROLLED_PWR_CYCLE */ + MX53_PAD_EIM_DA8__GPIO3_8 0x0 + /* SOFTWARE_CONTROLLED_POWERDOWN */ + MX53_PAD_EIM_DA9__GPIO3_9 0x0 + /* DC_PWR_IN_OK */ + MX53_PAD_EIM_DA10__GPIO3_10 0x0 + /* BATT_PRESENT_N */ + MX53_PAD_EIM_DA11__GPIO3_11 0xe4 + /* PMIC_IRQ_N */ + MX53_PAD_EIM_DA12__GPIO3_12 0x0 + /* PMIC_VDD_FAULT_STATUS_N */ + MX53_PAD_EIM_DA13__GPIO3_13 0x0 + /* IMX535_ETHERNET_PHY_STATUS_IRQ_N */ + MX53_PAD_EIM_DA14__GPIO3_14 0x0 + /* NOT USED - AVAILABLE 3.3V GPIO */ + MX53_PAD_EIM_DA15__GPIO3_15 0x0 + /* NOT USED - AVAILABLE 3.3V GPIO */ + MX53_PAD_EIM_D22__GPIO3_22 0x0 + /* NOT USED - AVAILABLE 3.3V GPIO */ + MX53_PAD_EIM_D24__GPIO3_24 0x0 + /* NBP_PUMP_VALVE_PWR_ENABLE */ + MX53_PAD_EIM_D25__GPIO3_25 0x0 + /* NIBP_RESET_N */ + MX53_PAD_EIM_D26__GPIO3_26 0x0 + /* LATCHED_OVERPRESSURE_N */ + MX53_PAD_EIM_D27__GPIO3_27 0x0 + /* NBP_SBWTCLK */ + MX53_PAD_EIM_D29__GPIO3_29 0x0 + /* ENABLE_WIFI_MODULE */ + MX53_PAD_GPIO_11__GPIO4_1 0x400 + /* WIFI_MODULE_IRQ_N */ + MX53_PAD_GPIO_12__GPIO4_2 0x400 + /* ENABLE_BLUETOOTH_MODULE */ + MX53_PAD_GPIO_13__GPIO4_3 0x400 + /* RESET_IMX535_USB_HOST2_PHY_N */ + MX53_PAD_GPIO_14__GPIO4_4 0x400 + /* ONKEY_IS_DEPRESSED */ + MX53_PAD_KEY_ROW3__GPIO4_13 0x0 + /* UNUSED_GPIO_TO_ALARM_LIGHT_BOARD */ + MX53_PAD_EIM_WAIT__GPIO5_0 0x0 + /* DISPLAY_LOCK_BUTTON_IS_DEPRESSED_N */ + MX53_PAD_EIM_A25__GPIO5_2 0x0 + /* I2C_PCAP_TOUCHSCREEN_IRQ_N */ + MX53_PAD_EIM_A24__GPIO5_4 0x0 + /* NOT USED - AVAILABLE 1.8V GPIO */ + MX53_PAD_DISP0_DAT13__GPIO5_7 0x400 + /* NOT USED - AVAILABLE 1.8V GPIO */ + MX53_PAD_DISP0_DAT14__GPIO5_8 0x400 + /* NOT USED - AVAILABLE 1.8V GPIO */ + MX53_PAD_DISP0_DAT15__GPIO5_9 0x400 + /* HOST_CONTROLLED_RESET_TO_LCD_N */ + MX53_PAD_CSI0_PIXCLK__GPIO5_18 0x0 + /* HOST_CONTROLLED_RESET_TO_PCAP_N */ + MX53_PAD_CSI0_MCLK__GPIO5_19 0x0 + /* LR_SCAN_CTRL */ + MX53_PAD_CSI0_DATA_EN__GPIO5_20 0x0 + /* UD_SCAN_CTRL */ + MX53_PAD_CSI0_VSYNC__GPIO5_21 0x0 + /* DATA_WIDTH_CTRL */ + MX53_PAD_CSI0_DAT10__GPIO5_28 0x0 + /* BACKLIGHT_ENABLE */ + MX53_PAD_CSI0_DAT11__GPIO5_29 0x0 + /* MED_USB_PORT_1_HOST_SELECT */ + MX53_PAD_EIM_A23__GPIO6_6 0x0 + /* MED_USB_PORT_2_HOST_SELECT */ + MX53_PAD_NANDF_CLE__GPIO6_7 0x0 + /* MED_USB_PORT_3_HOST_SELECT */ + MX53_PAD_NANDF_ALE__GPIO6_8 0x0 + /* MED_USB_PORT_4_HOST_SELECT */ + MX53_PAD_NANDF_WP_B__GPIO6_9 0x0 + /* MED_USB_PORT_5_HOST_SELECT */ + MX53_PAD_NANDF_RB0__GPIO6_10 0x0 + /* MED_USB_PORT_6_HOST_SELECT */ + MX53_PAD_NANDF_CS0__GPIO6_11 0x0 + /* MED_USB_PORT_7_HOST_SELECT */ + MX53_PAD_NANDF_WE_B__GPIO6_12 0x0 + /* MED_USB_PORT_8_HOST_SELECT */ + MX53_PAD_NANDF_RE_B__GPIO6_13 0x0 + /* MED_USB_PORT_TO_IMX_SELECT_0 */ + MX53_PAD_NANDF_CS1__GPIO6_14 0x0 + /* MED_USB_PORT_TO_IMX_SELECT_1 */ + MX53_PAD_NANDF_CS2__GPIO6_15 0x0 + /* MED_USB_PORT_TO_IMX_SELECT_2 */ + MX53_PAD_NANDF_CS3__GPIO6_16 0x0 + /* POWER_AND_BOOT_STATUS_INDICATOR */ + MX53_PAD_PATA_INTRQ__GPIO7_2 0x1e4 + /* ACTIVATE_ALARM_LIGHT_RED */ + MX53_PAD_PATA_DIOR__GPIO7_3 0x0 + /* ACTIVATE_ALARM_LIGHT_YELLOW */ + MX53_PAD_PATA_DA_1__GPIO7_7 0x0 + /* ACTIVATE_ALARM_LIGHT_CYAN */ + MX53_PAD_PATA_DA_2__GPIO7_8 0x0 + /* RUNNING_ON_BATTERY_INDICATOR_GREEN */ + MX53_PAD_GPIO_16__GPIO7_11 0x0 + /* BATTERY_STATUS_INDICATOR_AMBER */ + MX53_PAD_GPIO_17__GPIO7_12 0x0 + /* AUDIO_ALARMS_SILENCED_INDICATOR */ + MX53_PAD_GPIO_18__GPIO7_13 0x0 + >; + }; + + pinctrl_i2c1: i2c1grp { + fsl,pins = < + MX53_PAD_EIM_D21__I2C1_SCL 0x400001e4 + MX53_PAD_EIM_D28__I2C1_SDA 0x400001e4 + >; + }; + + pinctrl_i2c1_gpio: i2c1gpiogrp { + fsl,pins = < + MX53_PAD_EIM_D28__GPIO3_28 0x1e4 + MX53_PAD_EIM_D21__GPIO3_21 0x1e4 + >; + }; + + pinctrl_i2c2: i2c2grp { + fsl,pins = < + MX53_PAD_EIM_EB2__I2C2_SCL 0x400001e4 + MX53_PAD_EIM_D16__I2C2_SDA 0x400001e4 + >; + }; + + pinctrl_i2c2_gpio: i2c2gpiogrp { + fsl,pins = < + MX53_PAD_EIM_D16__GPIO3_16 0x1e4 + MX53_PAD_EIM_EB2__GPIO2_30 0x1e4 + >; + }; + + pinctrl_i2c3: i2c3grp { + fsl,pins = < + MX53_PAD_EIM_D17__I2C3_SCL 0x400001e4 + MX53_PAD_EIM_D18__I2C3_SDA 0x400001e4 + >; + }; + + pinctrl_i2c3_gpio: i2c3gpiogrp { + fsl,pins = < + MX53_PAD_EIM_D18__GPIO3_18 0x1e4 + MX53_PAD_EIM_D17__GPIO3_17 0x1e4 + >; + }; + + pinctrl_pwm1: pwm1grp { + fsl,pins = < + MX53_PAD_GPIO_9__PWM1_PWMO 0x5 + >; + }; + + pinctrl_pwm2: pwm2grp { + fsl,pins = < + MX53_PAD_DISP0_DAT9__PWM2_PWMO 0x5 + >; + }; + + pinctrl_uart1: uart1grp { + fsl,pins = < + MX53_PAD_PATA_DIOW__UART1_TXD_MUX 0x1e4 + MX53_PAD_PATA_DMACK__UART1_RXD_MUX 0x1e4 + >; + }; + + pinctrl_uart2: uart2grp { + fsl,pins = < + MX53_PAD_PATA_DMARQ__UART2_TXD_MUX 0x1e4 + MX53_PAD_PATA_BUFFER_EN__UART2_RXD_MUX 0x1e4 + >; + }; + + pinctrl_uart3: uart3grp { + fsl,pins = < + MX53_PAD_PATA_CS_0__UART3_TXD_MUX 0x1e4 + MX53_PAD_PATA_CS_1__UART3_RXD_MUX 0x1e4 + MX53_PAD_EIM_D23__UART3_CTS 0x1e4 + MX53_PAD_EIM_EB3__UART3_RTS 0x1e4 + >; + }; + + pinctrl_uart4: uart4grp { + fsl,pins = < + MX53_PAD_KEY_COL0__UART4_TXD_MUX 0x1e4 + MX53_PAD_KEY_ROW0__UART4_RXD_MUX 0x1e4 + >; + }; + + pinctrl_uart5: uart5grp { + fsl,pins = < + MX53_PAD_KEY_COL1__UART5_TXD_MUX 0x1e4 + MX53_PAD_KEY_ROW1__UART5_RXD_MUX 0x1e4 + >; + }; + + pinctrl_usb_otg_vbus: usb-otg-vbusgrp { + fsl,pins = < + /* USB_HS_OTG_VBUS_ENABLE */ + MX53_PAD_KEY_ROW4__GPIO4_15 0x1c4 + >; + }; + + pinctrl_usbh2: usbh2grp { + fsl,pins = < + /* USB H2 */ + MX53_PAD_DISP0_DAT0__USBOH3_USBH2_DATA_0 0x180 + MX53_PAD_DISP0_DAT1__USBOH3_USBH2_DATA_1 0x180 + MX53_PAD_DISP0_DAT2__USBOH3_USBH2_DATA_2 0x180 + MX53_PAD_DISP0_DAT3__USBOH3_USBH2_DATA_3 0x180 + MX53_PAD_DISP0_DAT4__USBOH3_USBH2_DATA_4 0x180 + MX53_PAD_DISP0_DAT5__USBOH3_USBH2_DATA_5 0x180 + MX53_PAD_DISP0_DAT6__USBOH3_USBH2_DATA_6 0x180 + MX53_PAD_DISP0_DAT7__USBOH3_USBH2_DATA_7 0x180 + MX53_PAD_DISP0_DAT10__USBOH3_USBH2_STP 0x180 + MX53_PAD_DISP0_DAT11__USBOH3_USBH2_NXT 0x180 + MX53_PAD_DISP0_DAT12__USBOH3_USBH2_CLK 0x180 + MX53_PAD_DI0_DISP_CLK__USBOH3_USBH2_DIR 0x5 + MX53_PAD_EIM_D30__USBOH3_USBH2_OC 0x180 + >; + }; + + pinctrl_usbh2_vbus: usbh2-vbusgrp { + fsl,pins = < + /* USB_HS_HOST2_VBUS_ENABLE */ + MX53_PAD_EIM_D31__GPIO3_31 0x0 + >; + }; + + pinctrl_usbh3_vbus: usbh3-vbusgrp { + fsl,pins = < + /* USB_HS_HOST3_VBUS_ENABLE */ + MX53_PAD_CSI0_DAT9__GPIO5_27 0x0 + >; + }; + + pinctrl_usbh3: usbh3grp { + fsl,pins = < + /* USB H3 */ + MX53_PAD_CSI0_DAT12__USBOH3_USBH3_DATA_0 0x180 + MX53_PAD_CSI0_DAT13__USBOH3_USBH3_DATA_1 0x180 + MX53_PAD_CSI0_DAT14__USBOH3_USBH3_DATA_2 0x180 + MX53_PAD_CSI0_DAT15__USBOH3_USBH3_DATA_3 0x180 + MX53_PAD_CSI0_DAT16__USBOH3_USBH3_DATA_4 0x180 + MX53_PAD_CSI0_DAT17__USBOH3_USBH3_DATA_5 0x180 + MX53_PAD_CSI0_DAT18__USBOH3_USBH3_DATA_6 0x180 + MX53_PAD_CSI0_DAT19__USBOH3_USBH3_DATA_7 0x180 + MX53_PAD_CSI0_DAT7__USBOH3_USBH3_DIR 0x5 + MX53_PAD_CSI0_DAT6__USBOH3_USBH3_CLK 0x180 + MX53_PAD_CSI0_DAT5__USBOH3_USBH3_NXT 0x180 + MX53_PAD_CSI0_DAT4__USBOH3_USBH3_STP 0x180 + MX53_PAD_CSI0_DAT8__USBOH3_USBH3_OC 0x180 + >; + }; + + pinctrl_usb_otg: usbotggrp { + fsl,pins = < + /* USB_OTG_FAULT_N */ + MX53_PAD_KEY_COL4__USBOH3_USBOTG_OC 0x180 + >; + }; +}; -- 2.20.1 ^ permalink raw reply related [flat|nested] 24+ messages in thread
* [U-Boot] [RESEND PATCH 03/10] configs: bx50v3: Fix boot hang with video 2019-11-12 19:15 ` [U-Boot] [RESEND PATCH 02/10] board: ge: ppd: sync device tree " Robert Beckett @ 2019-11-12 19:15 ` Robert Beckett 2019-11-12 19:15 ` [U-Boot] [RESEND PATCH 04/10] board: ge: bx50v3: Fix run-time warning Robert Beckett 2019-12-29 10:27 ` [U-Boot] [RESEND PATCH 03/10] configs: bx50v3: Fix boot hang with video sbabic at denx.de 2019-12-29 10:27 ` [U-Boot] [RESEND PATCH 02/10] board: ge: ppd: sync device tree from Linux sbabic at denx.de 1 sibling, 2 replies; 24+ messages in thread From: Robert Beckett @ 2019-11-12 19:15 UTC (permalink / raw) To: u-boot From: Ian Ray <ian.ray@ge.com> Fixes commit: 0b09f7b15052bb419e318e38da453be46e5a13e5, which converted to DM_VIDEO, but requires more memory. [Inspired by 9002e735e71754a90adbb9676c0ffb1964dbc288] Signed-off-by: Ian Ray <ian.ray@ge.com> Signed-off-by: Robert Beckett <bob.beckett@collabora.com> --- configs/ge_bx50v3_defconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/configs/ge_bx50v3_defconfig b/configs/ge_bx50v3_defconfig index 94ad193393..bc268367ed 100644 --- a/configs/ge_bx50v3_defconfig +++ b/configs/ge_bx50v3_defconfig @@ -67,3 +67,4 @@ CONFIG_VIDEO_IPUV3=y CONFIG_WATCHDOG_TIMEOUT_MSECS=6000 CONFIG_IMX_WATCHDOG=y # CONFIG_EFI_LOADER is not set +CONFIG_SYS_MALLOC_F_LEN=0x4000 -- 2.20.1 ^ permalink raw reply related [flat|nested] 24+ messages in thread
* [U-Boot] [RESEND PATCH 04/10] board: ge: bx50v3: Fix run-time warning 2019-11-12 19:15 ` [U-Boot] [RESEND PATCH 03/10] configs: bx50v3: Fix boot hang with video Robert Beckett @ 2019-11-12 19:15 ` Robert Beckett 2019-11-12 19:15 ` [U-Boot] [RESEND PATCH 05/10] board: ge: bx50v3: Fix message output to video console Robert Beckett 2019-12-29 10:26 ` [U-Boot] [RESEND PATCH 04/10] board: ge: bx50v3: Fix run-time warning sbabic at denx.de 2019-12-29 10:27 ` [U-Boot] [RESEND PATCH 03/10] configs: bx50v3: Fix boot hang with video sbabic at denx.de 1 sibling, 2 replies; 24+ messages in thread From: Robert Beckett @ 2019-11-12 19:15 UTC (permalink / raw) To: u-boot From: Ian Ray <ian.ray@ge.com> Fix GPIO reservation warning on code paths that do not need LVDS power. Signed-off-by: Ian Ray <ian.ray@ge.com> Signed-off-by: Robert Beckett <bob.beckett@collabora.com> --- board/ge/bx50v3/bx50v3.c | 23 +++++++++++++---------- 1 file changed, 13 insertions(+), 10 deletions(-) diff --git a/board/ge/bx50v3/bx50v3.c b/board/ge/bx50v3/bx50v3.c index 530b106ba5..747171bf19 100644 --- a/board/ge/bx50v3/bx50v3.c +++ b/board/ge/bx50v3/bx50v3.c @@ -713,20 +713,23 @@ int ft_board_setup(void *blob, bd_t *bd) static int do_backlight_enable(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) { #ifdef CONFIG_VIDEO_IPUV3 - /* We need at least 200ms between power on and backlight on - * as per specifications from CHI MEI */ - mdelay(250); + if (!is_b850v3()) { + /* We need at least 200ms between power on and backlight on + * as per specifications from CHI MEI + */ + mdelay(250); - /* enable backlight PWM 1 */ - pwm_init(0, 0, 0); + /* enable backlight PWM 1 */ + pwm_init(0, 0, 0); - /* duty cycle 5000000ns, period: 5000000ns */ - pwm_config(0, 5000000, 5000000); + /* duty cycle 5000000ns, period: 5000000ns */ + pwm_config(0, 5000000, 5000000); - /* Backlight Power */ - gpio_direction_output(LVDS_BACKLIGHT_GP, 1); + /* Backlight Power */ + gpio_direction_output(LVDS_BACKLIGHT_GP, 1); - pwm_enable(0); + pwm_enable(0); + } #endif return 0; -- 2.20.1 ^ permalink raw reply related [flat|nested] 24+ messages in thread
* [U-Boot] [RESEND PATCH 05/10] board: ge: bx50v3: Fix message output to video console 2019-11-12 19:15 ` [U-Boot] [RESEND PATCH 04/10] board: ge: bx50v3: Fix run-time warning Robert Beckett @ 2019-11-12 19:15 ` Robert Beckett 2019-11-12 19:15 ` [U-Boot] [RESEND PATCH 06/10] configs: ppd: DM for USB and regulators PPD Robert Beckett 2019-12-29 10:24 ` [U-Boot] [RESEND PATCH 05/10] board: ge: bx50v3: Fix message output to video console sbabic at denx.de 2019-12-29 10:26 ` [U-Boot] [RESEND PATCH 04/10] board: ge: bx50v3: Fix run-time warning sbabic at denx.de 1 sibling, 2 replies; 24+ messages in thread From: Robert Beckett @ 2019-11-12 19:15 UTC (permalink / raw) To: u-boot From: Ian Ray <ian.ray@ge.com> Use vidconsole for output to the LCD, now that DM_VIDEO is used. Write white text on a black background, like before migrating to DM_VIDEO. Signed-off-by: Ian Ray <ian.ray@ge.com> Signed-off-by: Robert Beckett <bob.beckett@collabora.com> --- board/ge/bx50v3/bx50v3.c | 21 ++++++++++++++------- configs/ge_bx50v3_defconfig | 1 + include/configs/ge_bx50v3.h | 9 ++++----- 3 files changed, 19 insertions(+), 12 deletions(-) diff --git a/board/ge/bx50v3/bx50v3.c b/board/ge/bx50v3/bx50v3.c index 747171bf19..988d3b19b5 100644 --- a/board/ge/bx50v3/bx50v3.c +++ b/board/ge/bx50v3/bx50v3.c @@ -218,13 +218,6 @@ static void do_enable_hdmi(struct display_info_t const *dev) imx_enable_hdmi_phy(); } -int board_cfb_skip(void) -{ - gpio_direction_output(LVDS_POWER_GP, 1); - - return 0; -} - static int is_b850v3(void) { return confidx == 3; @@ -712,8 +705,14 @@ int ft_board_setup(void *blob, bd_t *bd) static int do_backlight_enable(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) { +#if CONFIG_IS_ENABLED(DM_VIDEO) + int ret; + struct udevice *dev; + #ifdef CONFIG_VIDEO_IPUV3 if (!is_b850v3()) { + gpio_direction_output(LVDS_POWER_GP, 1); + /* We need at least 200ms between power on and backlight on * as per specifications from CHI MEI */ @@ -732,6 +731,14 @@ static int do_backlight_enable(cmd_tbl_t *cmdtp, int flag, int argc, char * cons } #endif + /* Probe, to find a video device to be used to show a message on + * the vidconsole. + */ + ret = uclass_get_device(UCLASS_VIDEO, 0, &dev); + if (ret) + return ret; +#endif + return 0; } diff --git a/configs/ge_bx50v3_defconfig b/configs/ge_bx50v3_defconfig index bc268367ed..2cf6e77e12 100644 --- a/configs/ge_bx50v3_defconfig +++ b/configs/ge_bx50v3_defconfig @@ -68,3 +68,4 @@ CONFIG_WATCHDOG_TIMEOUT_MSECS=6000 CONFIG_IMX_WATCHDOG=y # CONFIG_EFI_LOADER is not set CONFIG_SYS_MALLOC_F_LEN=0x4000 +CONFIG_SYS_WHITE_ON_BLACK=y diff --git a/include/configs/ge_bx50v3.h b/include/configs/ge_bx50v3.h index 6de5119d7f..92a927bb82 100644 --- a/include/configs/ge_bx50v3.h +++ b/include/configs/ge_bx50v3.h @@ -114,12 +114,11 @@ "swappartitions=" \ "setexpr partnum 3 - ${partnum}\0" \ "failbootcmd=" \ + "echo reached failbootcmd; " \ "bx50_backlight_enable; " \ - "msg=\"Monitor failed to start. Try again, or contact GE Service for support.\"; " \ - "echo $msg; " \ - "setenv stdout vga; " \ - "echo \"\n\n\n\n \" $msg; " \ - "setenv stdout serial; " \ + "setcurs 5 4; " \ + "lcdputs \"Monitor failed to start. " \ + "Try again, or contact GE Service for support.\"; " \ "mw.b 0x7000A000 0xbc; " \ "mw.b 0x7000A001 0x00; " \ "ext4write ${dev} ${devnum}:5 0x7000A000 /boot/failures 2\0" \ -- 2.20.1 ^ permalink raw reply related [flat|nested] 24+ messages in thread
* [U-Boot] [RESEND PATCH 06/10] configs: ppd: DM for USB and regulators PPD 2019-11-12 19:15 ` [U-Boot] [RESEND PATCH 05/10] board: ge: bx50v3: Fix message output to video console Robert Beckett @ 2019-11-12 19:15 ` Robert Beckett 2019-11-12 19:15 ` [U-Boot] [RESEND PATCH 07/10] board: ge: bx50v3: Enable DM for PCI and ethernet Robert Beckett 2019-12-29 10:27 ` [U-Boot] [RESEND PATCH 06/10] configs: ppd: DM for USB and regulators PPD sbabic at denx.de 2019-12-29 10:24 ` [U-Boot] [RESEND PATCH 05/10] board: ge: bx50v3: Fix message output to video console sbabic at denx.de 1 sibling, 2 replies; 24+ messages in thread From: Robert Beckett @ 2019-11-12 19:15 UTC (permalink / raw) To: u-boot From: Denis Zalevskiy <denis.zalevskiy@ge.com> DM should be used for USB since 2019.07, it also requires DM for regulators. Signed-off-by: Denis Zalevskiy <denis.zalevskiy@ge.com> Signed-off-by: Robert Beckett <bob.beckett@collabora.com> --- configs/mx53ppd_defconfig | 2 ++ 1 file changed, 2 insertions(+) diff --git a/configs/mx53ppd_defconfig b/configs/mx53ppd_defconfig index 7f293c8e9a..e1992e91ad 100644 --- a/configs/mx53ppd_defconfig +++ b/configs/mx53ppd_defconfig @@ -52,3 +52,5 @@ CONFIG_VIDEO=y # CONFIG_VIDEO_SW_CURSOR is not set CONFIG_WATCHDOG_TIMEOUT_MSECS=8000 CONFIG_IMX_WATCHDOG=y +CONFIG_DM_REGULATOR=y +CONFIG_DM_USB=y -- 2.20.1 ^ permalink raw reply related [flat|nested] 24+ messages in thread
* [U-Boot] [RESEND PATCH 07/10] board: ge: bx50v3: Enable DM for PCI and ethernet 2019-11-12 19:15 ` [U-Boot] [RESEND PATCH 06/10] configs: ppd: DM for USB and regulators PPD Robert Beckett @ 2019-11-12 19:15 ` Robert Beckett 2019-11-12 19:15 ` [U-Boot] [RESEND PATCH 08/10] board: ge: pass rtc_status via device tree Robert Beckett 2019-12-29 10:26 ` [U-Boot] [RESEND PATCH 07/10] board: ge: bx50v3: Enable DM for PCI and ethernet sbabic at denx.de 2019-12-29 10:27 ` [U-Boot] [RESEND PATCH 06/10] configs: ppd: DM for USB and regulators PPD sbabic at denx.de 1 sibling, 2 replies; 24+ messages in thread From: Robert Beckett @ 2019-11-12 19:15 UTC (permalink / raw) To: u-boot From: Denis Zalevskiy <denis.zalevskiy@ge.com> DM for PCI pulls DM for ethernet that also needs other changes described below to build u-boot and keep existing functionality - ability to update MAC addresses of FEC ethernet adapter and I210 adapter connected to the Marvell switch. - fec_mxc driver with DM needs PHYLIB; - configuration items are moved from ge_bx50v3.h to ge_bx50v3_defconfig; - FEC is marked as eth0 because it is always present, so indices changed: I210 are still probed in the same order; - board_eth_init() was used by legacy ethernet, setup for enet iomux and pcie is moved to the board_late_init(); - pci_init() is called from the board_late_init() to initiate PCI bus probing, so I210 devices are propagated to the device tree; Signed-off-by: Denis Zalevskiy <denis.zalevskiy@ge.com> [Describe PHY reset in device tree] Signed-off-by: Ian Ray <ian.ray@ge.com> Signed-off-by: Robert Beckett <bob.beckett@collabora.com> --- board/ge/bx50v3/bx50v3.c | 75 +++++++------------------------------ configs/ge_bx50v3_defconfig | 8 ++++ include/configs/ge_bx50v3.h | 12 ------ 3 files changed, 21 insertions(+), 74 deletions(-) diff --git a/board/ge/bx50v3/bx50v3.c b/board/ge/bx50v3/bx50v3.c index 988d3b19b5..05fa792ed8 100644 --- a/board/ge/bx50v3/bx50v3.c +++ b/board/ge/bx50v3/bx50v3.c @@ -35,6 +35,8 @@ #include "../common/ge_common.h" #include "../common/vpd_reader.h" #include "../../../drivers/net/e1000.h" +#include <pci.h> + DECLARE_GLOBAL_DATA_PTR; static int confidx; /* Default to generic. */ @@ -82,38 +84,6 @@ static iomux_v3_cfg_t const uart4_pads[] = { MX6_PAD_KEY_ROW0__UART4_RX_DATA | MUX_PAD_CTRL(UART_PAD_CTRL), }; -static iomux_v3_cfg_t const enet_pads[] = { - MX6_PAD_ENET_MDIO__ENET_MDIO | MUX_PAD_CTRL(ENET_PAD_CTRL), - MX6_PAD_ENET_MDC__ENET_MDC | MUX_PAD_CTRL(ENET_PAD_CTRL), - MX6_PAD_RGMII_TXC__RGMII_TXC | MUX_PAD_CTRL(ENET_PAD_CTRL), - MX6_PAD_RGMII_TD0__RGMII_TD0 | MUX_PAD_CTRL(ENET_PAD_CTRL), - MX6_PAD_RGMII_TD1__RGMII_TD1 | MUX_PAD_CTRL(ENET_PAD_CTRL), - MX6_PAD_RGMII_TD2__RGMII_TD2 | MUX_PAD_CTRL(ENET_PAD_CTRL), - MX6_PAD_RGMII_TD3__RGMII_TD3 | MUX_PAD_CTRL(ENET_PAD_CTRL), - MX6_PAD_RGMII_TX_CTL__RGMII_TX_CTL | MUX_PAD_CTRL(ENET_PAD_CTRL), - MX6_PAD_ENET_REF_CLK__ENET_TX_CLK | MUX_PAD_CTRL(ENET_CLK_PAD_CTRL), - MX6_PAD_RGMII_RXC__RGMII_RXC | MUX_PAD_CTRL(ENET_RX_PAD_CTRL), - MX6_PAD_RGMII_RD0__RGMII_RD0 | MUX_PAD_CTRL(ENET_RX_PAD_CTRL), - MX6_PAD_RGMII_RD1__RGMII_RD1 | MUX_PAD_CTRL(ENET_RX_PAD_CTRL), - MX6_PAD_RGMII_RD2__RGMII_RD2 | MUX_PAD_CTRL(ENET_RX_PAD_CTRL), - MX6_PAD_RGMII_RD3__RGMII_RD3 | MUX_PAD_CTRL(ENET_RX_PAD_CTRL), - MX6_PAD_RGMII_RX_CTL__RGMII_RX_CTL | MUX_PAD_CTRL(ENET_RX_PAD_CTRL), - /* AR8033 PHY Reset */ - MX6_PAD_ENET_TX_EN__GPIO1_IO28 | MUX_PAD_CTRL(NO_PAD_CTRL), -}; - -static void setup_iomux_enet(void) -{ - imx_iomux_v3_setup_multiple_pads(enet_pads, ARRAY_SIZE(enet_pads)); - - /* Reset AR8033 PHY */ - gpio_request(IMX_GPIO_NR(1, 28), "fec_rst"); - gpio_direction_output(IMX_GPIO_NR(1, 28), 0); - mdelay(10); - gpio_set_value(IMX_GPIO_NR(1, 28), 1); - mdelay(1); -} - static struct i2c_pads_info i2c_pad_info1 = { .scl = { .i2c_mode = MX6_PAD_CSI0_DAT9__I2C1_SCL | I2C_PAD, @@ -153,16 +123,6 @@ static struct i2c_pads_info i2c_pad_info3 = { } }; -static iomux_v3_cfg_t const pcie_pads[] = { - MX6_PAD_GPIO_5__GPIO1_IO05 | MUX_PAD_CTRL(NO_PAD_CTRL), - MX6_PAD_GPIO_17__GPIO7_IO12 | MUX_PAD_CTRL(NO_PAD_CTRL), -}; - -static void setup_pcie(void) -{ - imx_iomux_v3_setup_multiple_pads(pcie_pads, ARRAY_SIZE(pcie_pads)); -} - static void setup_iomux_uart(void) { imx_iomux_v3_setup_multiple_pads(uart3_pads, ARRAY_SIZE(uart3_pads)); @@ -454,7 +414,7 @@ static int vpd_callback(struct vpd_cache *vpd, u8 id, u8 version, u8 type, static void process_vpd(struct vpd_cache *vpd) { - int fec_index = -1; + int fec_index = 0; int i210_index = -1; if (!vpd->is_read) { @@ -462,41 +422,30 @@ static void process_vpd(struct vpd_cache *vpd) return; } + if (vpd->has & VPD_HAS_MAC1) + eth_env_set_enetaddr_by_index("eth", fec_index, vpd->mac1); + + env_set("ethact", "eth0"); + switch (vpd->product_id) { case VPD_PRODUCT_B450: env_set("confidx", "1"); - i210_index = 0; - fec_index = 1; + i210_index = 1; break; case VPD_PRODUCT_B650: env_set("confidx", "2"); - i210_index = 0; - fec_index = 1; + i210_index = 1; break; case VPD_PRODUCT_B850: env_set("confidx", "3"); - i210_index = 1; - fec_index = 2; + i210_index = 2; break; } - if (fec_index >= 0 && (vpd->has & VPD_HAS_MAC1)) - eth_env_set_enetaddr_by_index("eth", fec_index, vpd->mac1); - if (i210_index >= 0 && (vpd->has & VPD_HAS_MAC2)) eth_env_set_enetaddr_by_index("eth", i210_index, vpd->mac2); } -int board_eth_init(bd_t *bis) -{ - setup_iomux_enet(); - setup_pcie(); - - e1000_initialize(bis); - - return cpu_eth_init(bis); -} - static iomux_v3_cfg_t const misc_pads[] = { MX6_PAD_KEY_ROW2__GPIO4_IO11 | MUX_PAD_CTRL(NO_PAD_CTRL), MX6_PAD_EIM_A25__GPIO5_IO02 | MUX_PAD_CTRL(NC_PAD_CTRL), @@ -658,6 +607,8 @@ int board_late_init(void) check_time(); + pci_init(); + return 0; } diff --git a/configs/ge_bx50v3_defconfig b/configs/ge_bx50v3_defconfig index 2cf6e77e12..4ba63ba6bb 100644 --- a/configs/ge_bx50v3_defconfig +++ b/configs/ge_bx50v3_defconfig @@ -69,3 +69,11 @@ CONFIG_IMX_WATCHDOG=y # CONFIG_EFI_LOADER is not set CONFIG_SYS_MALLOC_F_LEN=0x4000 CONFIG_SYS_WHITE_ON_BLACK=y +CONFIG_PCI=y +CONFIG_DM_PCI=y +CONFIG_PCI_PNP=y +CONFIG_DM_ETH=y +CONFIG_PHYLIB=y +CONFIG_PHY_ATHEROS=y +CONFIG_FEC_MXC=y +CONFIG_ETHPRIME="FEC" diff --git a/include/configs/ge_bx50v3.h b/include/configs/ge_bx50v3.h index 92a927bb82..d572424831 100644 --- a/include/configs/ge_bx50v3.h +++ b/include/configs/ge_bx50v3.h @@ -49,16 +49,6 @@ #define CONFIG_USB_GADGET_MASS_STORAGE #endif -/* Networking Configs */ -#ifdef CONFIG_NET -#define CONFIG_FEC_MXC -#define IMX_FEC_BASE ENET_BASE_ADDR -#define CONFIG_FEC_XCV_TYPE RGMII -#define CONFIG_ETHPRIME "FEC" -#define CONFIG_FEC_MXC_PHYADDR 4 -#define CONFIG_PHY_ATHEROS -#endif - /* Serial Flash */ /* allow to overwrite serial and ethaddr */ @@ -197,8 +187,6 @@ #define CONFIG_IMX6_PWM_PER_CLK 66000000 -#define CONFIG_PCI -#define CONFIG_PCI_PNP #define CONFIG_PCI_SCAN_SHOW #define CONFIG_PCIE_IMX #define CONFIG_PCIE_IMX_PERST_GPIO IMX_GPIO_NR(7, 12) -- 2.20.1 ^ permalink raw reply related [flat|nested] 24+ messages in thread
* [U-Boot] [RESEND PATCH 08/10] board: ge: pass rtc_status via device tree 2019-11-12 19:15 ` [U-Boot] [RESEND PATCH 07/10] board: ge: bx50v3: Enable DM for PCI and ethernet Robert Beckett @ 2019-11-12 19:15 ` Robert Beckett 2019-11-12 19:15 ` [U-Boot] [RESEND PATCH 09/10] board: ge: bx50v3: use imx wdt Robert Beckett ` (2 more replies) 2019-12-29 10:26 ` [U-Boot] [RESEND PATCH 07/10] board: ge: bx50v3: Enable DM for PCI and ethernet sbabic at denx.de 1 sibling, 3 replies; 24+ messages in thread From: Robert Beckett @ 2019-11-12 19:15 UTC (permalink / raw) To: u-boot From: Ian Ray <ian.ray@ge.com> Pass rtc_status via the device tree, instead of on kernel command line. Additionally, the 2038 mitigation is reported, if applied successfully. Signed-off-by: Ian Ray <ian.ray@ge.com> Signed-off-by: Robert Beckett <bob.beckett@collabora.com> --- board/ge/bx50v3/bx50v3.c | 7 ++++++- board/ge/common/ge_common.c | 20 +++++++++++++------- board/ge/mx53ppd/mx53ppd.c | 7 ++++++- include/configs/ge_bx50v3.h | 2 +- include/configs/mx53ppd.h | 2 +- 5 files changed, 27 insertions(+), 11 deletions(-) diff --git a/board/ge/bx50v3/bx50v3.c b/board/ge/bx50v3/bx50v3.c index 05fa792ed8..ea2564ecf3 100644 --- a/board/ge/bx50v3/bx50v3.c +++ b/board/ge/bx50v3/bx50v3.c @@ -648,8 +648,13 @@ int checkboard(void) #ifdef CONFIG_OF_BOARD_SETUP int ft_board_setup(void *blob, bd_t *bd) { + char *rtc_status = env_get("rtc_status"); + fdt_setprop(blob, 0, "ge,boot-ver", version_string, - strlen(version_string) + 1); + strlen(version_string) + 1); + + fdt_setprop(blob, 0, "ge,rtc-status", rtc_status, + strlen(rtc_status) + 1); return 0; } #endif diff --git a/board/ge/common/ge_common.c b/board/ge/common/ge_common.c index 501c8b2daf..d7e21deca7 100644 --- a/board/ge/common/ge_common.c +++ b/board/ge/common/ge_common.c @@ -17,8 +17,10 @@ void check_time(void) unsigned int current_i2c_bus = i2c_get_bus_num(); ret = i2c_set_bus_num(CONFIG_SYS_RTC_BUS_NUM); - if (ret < 0) + if (ret < 0) { + env_set("rtc_status", "FAIL"); return; + } rtc_init(); @@ -28,10 +30,7 @@ void check_time(void) break; } - if (ret < 0) - env_set("rtc_status", "RTC_ERROR"); - - if (tm.tm_year > 2037) { + if (!ret && tm.tm_year > 2037) { tm.tm_sec = 0; tm.tm_min = 0; tm.tm_hour = 0; @@ -46,10 +45,17 @@ void check_time(void) break; } - if (ret < 0) - env_set("rtc_status", "RTC_ERROR"); + if (ret >= 0) + ret = 2038; } + if (ret < 0) + env_set("rtc_status", "FAIL"); + else if (ret == 2038) + env_set("rtc_status", "2038"); + else + env_set("rtc_status", "OK"); + i2c_set_bus_num(current_i2c_bus); } diff --git a/board/ge/mx53ppd/mx53ppd.c b/board/ge/mx53ppd/mx53ppd.c index 5448567298..b4d08a11ee 100644 --- a/board/ge/mx53ppd/mx53ppd.c +++ b/board/ge/mx53ppd/mx53ppd.c @@ -313,8 +313,13 @@ int checkboard(void) #ifdef CONFIG_OF_BOARD_SETUP int ft_board_setup(void *blob, bd_t *bd) { + char *rtc_status = env_get("rtc_status"); + fdt_setprop(blob, 0, "ge,boot-ver", version_string, - strlen(version_string) + 1); + strlen(version_string) + 1); + + fdt_setprop(blob, 0, "ge,rtc-status", rtc_status, + strlen(rtc_status) + 1); return 0; } #endif diff --git a/include/configs/ge_bx50v3.h b/include/configs/ge_bx50v3.h index d572424831..7c26608aa7 100644 --- a/include/configs/ge_bx50v3.h +++ b/include/configs/ge_bx50v3.h @@ -93,7 +93,7 @@ "setargs=setenv bootargs root=/dev/${rootdev}${partnum} " \ "ro rootwait cma=128M " \ "bootcause=${bootcause} " \ - "${quiet} console=${console} ${rtc_status} " \ + "${quiet} console=${console} " \ "${videoargs}" "\0" \ "doquiet=" \ "if ext2load ${dev} ${devnum}:5 0x7000A000 /boot/console; " \ diff --git a/include/configs/mx53ppd.h b/include/configs/mx53ppd.h index 59988efc9b..26e4b729bb 100644 --- a/include/configs/mx53ppd.h +++ b/include/configs/mx53ppd.h @@ -101,7 +101,7 @@ "lvds=ldb\0" \ "setargs=setenv bootargs ${lvds} jtag=on mem=2G " \ "vt.global_cursor_default=0 bootcause=${bootcause} ${quiet} " \ - "console=${console} ${rtc_status}\0" \ + "console=${console}\0" \ "bootargs_emmc=setenv bootargs root=/dev/${rootdev}${partnum} ro " \ "rootwait ${bootargs}\0" \ "doquiet=if ext2load ${dev} ${devnum}:5 0x7000A000 /boot/console; " \ -- 2.20.1 ^ permalink raw reply related [flat|nested] 24+ messages in thread
* [U-Boot] [RESEND PATCH 09/10] board: ge: bx50v3: use imx wdt 2019-11-12 19:15 ` [U-Boot] [RESEND PATCH 08/10] board: ge: pass rtc_status via device tree Robert Beckett @ 2019-11-12 19:15 ` Robert Beckett 2019-11-12 19:15 ` [U-Boot] [RESEND PATCH 10/10] board: ge: mx53ppd: " Robert Beckett 2019-12-29 10:28 ` [U-Boot] [RESEND PATCH 09/10] board: ge: bx50v3: " sbabic at denx.de 2019-12-27 16:41 ` [U-Boot][RESEND PATCH 08/10] board: ge: pass rtc_status via device tree Simon Glass 2019-12-29 10:28 ` [U-Boot] [RESEND " sbabic at denx.de 2 siblings, 2 replies; 24+ messages in thread From: Robert Beckett @ 2019-11-12 19:15 UTC (permalink / raw) To: u-boot Enable DM imx WDT Enable SYSRESET_WATCHDOG to maintain WDT based reset ability Signed-off-by: Robert Beckett <bob.beckett@collabora.com> --- arch/arm/dts/imx6q-bx50v3-uboot.dtsi | 12 ++++++++++++ arch/arm/dts/imx6q-bx50v3.dtsi | 1 + configs/ge_bx50v3_defconfig | 3 +++ 3 files changed, 16 insertions(+) create mode 100644 arch/arm/dts/imx6q-bx50v3-uboot.dtsi diff --git a/arch/arm/dts/imx6q-bx50v3-uboot.dtsi b/arch/arm/dts/imx6q-bx50v3-uboot.dtsi new file mode 100644 index 0000000000..88dd7e2939 --- /dev/null +++ b/arch/arm/dts/imx6q-bx50v3-uboot.dtsi @@ -0,0 +1,12 @@ +// SPDX-License-Identifier: GPL-2.0+ OR X11 +/* + * Copyright 2019 Collabora Ltd + * Copyright 2019 General Electric Company + */ + +/ { + wdt-reboot { + compatible = "wdt-reboot"; + wdt = <&wdog1>; + }; +}; diff --git a/arch/arm/dts/imx6q-bx50v3.dtsi b/arch/arm/dts/imx6q-bx50v3.dtsi index 009f88e305..bb8f562307 100644 --- a/arch/arm/dts/imx6q-bx50v3.dtsi +++ b/arch/arm/dts/imx6q-bx50v3.dtsi @@ -42,6 +42,7 @@ */ #include "imx6q-ba16.dtsi" +#include "imx6q-bx50v3-uboot.dtsi" / { mclk: clock-mclk { diff --git a/configs/ge_bx50v3_defconfig b/configs/ge_bx50v3_defconfig index 4ba63ba6bb..9ea6e339c6 100644 --- a/configs/ge_bx50v3_defconfig +++ b/configs/ge_bx50v3_defconfig @@ -66,6 +66,9 @@ CONFIG_DM_VIDEO=y CONFIG_VIDEO_IPUV3=y CONFIG_WATCHDOG_TIMEOUT_MSECS=6000 CONFIG_IMX_WATCHDOG=y +CONFIG_WDT=y +CONFIG_SYSRESET=y +CONFIG_SYSRESET_WATCHDOG=y # CONFIG_EFI_LOADER is not set CONFIG_SYS_MALLOC_F_LEN=0x4000 CONFIG_SYS_WHITE_ON_BLACK=y -- 2.20.1 ^ permalink raw reply related [flat|nested] 24+ messages in thread
* [U-Boot] [RESEND PATCH 10/10] board: ge: mx53ppd: use imx wdt 2019-11-12 19:15 ` [U-Boot] [RESEND PATCH 09/10] board: ge: bx50v3: use imx wdt Robert Beckett @ 2019-11-12 19:15 ` Robert Beckett 2019-12-27 16:41 ` [U-Boot][RESEND " Simon Glass 2019-12-29 10:24 ` [U-Boot] [RESEND " sbabic at denx.de 2019-12-29 10:28 ` [U-Boot] [RESEND PATCH 09/10] board: ge: bx50v3: " sbabic at denx.de 1 sibling, 2 replies; 24+ messages in thread From: Robert Beckett @ 2019-11-12 19:15 UTC (permalink / raw) To: u-boot Enable DM imx WDT Enable SYSRESET_WATCHDOG to maintain WDT based reset ability Signed-off-by: Robert Beckett <bob.beckett@collabora.com> --- arch/arm/dts/imx53-ppd-uboot.dtsi | 12 ++++++++++++ arch/arm/dts/imx53-ppd.dts | 1 + board/ge/mx53ppd/mx53ppd.c | 1 - configs/mx53ppd_defconfig | 3 +++ 4 files changed, 16 insertions(+), 1 deletion(-) create mode 100644 arch/arm/dts/imx53-ppd-uboot.dtsi diff --git a/arch/arm/dts/imx53-ppd-uboot.dtsi b/arch/arm/dts/imx53-ppd-uboot.dtsi new file mode 100644 index 0000000000..88dd7e2939 --- /dev/null +++ b/arch/arm/dts/imx53-ppd-uboot.dtsi @@ -0,0 +1,12 @@ +// SPDX-License-Identifier: GPL-2.0+ OR X11 +/* + * Copyright 2019 Collabora Ltd + * Copyright 2019 General Electric Company + */ + +/ { + wdt-reboot { + compatible = "wdt-reboot"; + wdt = <&wdog1>; + }; +}; diff --git a/arch/arm/dts/imx53-ppd.dts b/arch/arm/dts/imx53-ppd.dts index 8f3864998c..ae98361f9a 100644 --- a/arch/arm/dts/imx53-ppd.dts +++ b/arch/arm/dts/imx53-ppd.dts @@ -43,6 +43,7 @@ /dts-v1/; #include "imx53.dtsi" +#include "imx53-ppd-uboot.dtsi" #include <dt-bindings/input/input.h> / { diff --git a/board/ge/mx53ppd/mx53ppd.c b/board/ge/mx53ppd/mx53ppd.c index b4d08a11ee..ad37995624 100644 --- a/board/ge/mx53ppd/mx53ppd.c +++ b/board/ge/mx53ppd/mx53ppd.c @@ -296,7 +296,6 @@ int board_late_init(void) return res; print_cpuinfo(); - hw_watchdog_init(); check_time(); diff --git a/configs/mx53ppd_defconfig b/configs/mx53ppd_defconfig index e1992e91ad..8822b74864 100644 --- a/configs/mx53ppd_defconfig +++ b/configs/mx53ppd_defconfig @@ -52,5 +52,8 @@ CONFIG_VIDEO=y # CONFIG_VIDEO_SW_CURSOR is not set CONFIG_WATCHDOG_TIMEOUT_MSECS=8000 CONFIG_IMX_WATCHDOG=y +CONFIG_WDT=y +CONFIG_SYSRESET=y +CONFIG_SYSRESET_WATCHDOG=y CONFIG_DM_REGULATOR=y CONFIG_DM_USB=y -- 2.20.1 ^ permalink raw reply related [flat|nested] 24+ messages in thread
* [U-Boot][RESEND PATCH 10/10] board: ge: mx53ppd: use imx wdt 2019-11-12 19:15 ` [U-Boot] [RESEND PATCH 10/10] board: ge: mx53ppd: " Robert Beckett @ 2019-12-27 16:41 ` Simon Glass 2019-12-29 10:24 ` [U-Boot] [RESEND " sbabic at denx.de 1 sibling, 0 replies; 24+ messages in thread From: Simon Glass @ 2019-12-27 16:41 UTC (permalink / raw) To: u-boot On Tue, 12 Nov 2019 at 12:16, Robert Beckett <bob.beckett@collabora.com> wrote: > > Enable DM imx WDT > Enable SYSRESET_WATCHDOG to maintain WDT based reset ability > > Signed-off-by: Robert Beckett <bob.beckett@collabora.com> > --- > > arch/arm/dts/imx53-ppd-uboot.dtsi | 12 ++++++++++++ > arch/arm/dts/imx53-ppd.dts | 1 + > board/ge/mx53ppd/mx53ppd.c | 1 - > configs/mx53ppd_defconfig | 3 +++ > 4 files changed, 16 insertions(+), 1 deletion(-) > create mode 100644 arch/arm/dts/imx53-ppd-uboot.dtsi Reviewed-by: Simon Glass <sjg@chromium.org> ^ permalink raw reply [flat|nested] 24+ messages in thread
* [U-Boot] [RESEND PATCH 10/10] board: ge: mx53ppd: use imx wdt 2019-11-12 19:15 ` [U-Boot] [RESEND PATCH 10/10] board: ge: mx53ppd: " Robert Beckett 2019-12-27 16:41 ` [U-Boot][RESEND " Simon Glass @ 2019-12-29 10:24 ` sbabic at denx.de 1 sibling, 0 replies; 24+ messages in thread From: sbabic at denx.de @ 2019-12-29 10:24 UTC (permalink / raw) To: u-boot > Enable DM imx WDT > Enable SYSRESET_WATCHDOG to maintain WDT based reset ability > Signed-off-by: Robert Beckett <bob.beckett@collabora.com> > Reviewed-by: Simon Glass <sjg@chromium.org> Applied to u-boot-imx, -next, thanks ! Best regards, Stefano Babic -- ===================================================================== DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sbabic at denx.de ===================================================================== ^ permalink raw reply [flat|nested] 24+ messages in thread
* [U-Boot] [RESEND PATCH 09/10] board: ge: bx50v3: use imx wdt 2019-11-12 19:15 ` [U-Boot] [RESEND PATCH 09/10] board: ge: bx50v3: use imx wdt Robert Beckett 2019-11-12 19:15 ` [U-Boot] [RESEND PATCH 10/10] board: ge: mx53ppd: " Robert Beckett @ 2019-12-29 10:28 ` sbabic at denx.de 1 sibling, 0 replies; 24+ messages in thread From: sbabic at denx.de @ 2019-12-29 10:28 UTC (permalink / raw) To: u-boot > Enable DM imx WDT > Enable SYSRESET_WATCHDOG to maintain WDT based reset ability > Signed-off-by: Robert Beckett <bob.beckett@collabora.com> Applied to u-boot-imx, -next, thanks ! Best regards, Stefano Babic -- ===================================================================== DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sbabic at denx.de ===================================================================== ^ permalink raw reply [flat|nested] 24+ messages in thread
* [U-Boot][RESEND PATCH 08/10] board: ge: pass rtc_status via device tree 2019-11-12 19:15 ` [U-Boot] [RESEND PATCH 08/10] board: ge: pass rtc_status via device tree Robert Beckett 2019-11-12 19:15 ` [U-Boot] [RESEND PATCH 09/10] board: ge: bx50v3: use imx wdt Robert Beckett @ 2019-12-27 16:41 ` Simon Glass 2019-12-29 10:28 ` [U-Boot] [RESEND " sbabic at denx.de 2 siblings, 0 replies; 24+ messages in thread From: Simon Glass @ 2019-12-27 16:41 UTC (permalink / raw) To: u-boot Hi Robert, On Tue, 12 Nov 2019 at 12:16, Robert Beckett <bob.beckett@collabora.com> wrote: > > From: Ian Ray <ian.ray@ge.com> > > Pass rtc_status via the device tree, instead of on kernel command line. > Additionally, the 2038 mitigation is reported, if applied successfully. > > Signed-off-by: Ian Ray <ian.ray@ge.com> > Signed-off-by: Robert Beckett <bob.beckett@collabora.com> > --- > > board/ge/bx50v3/bx50v3.c | 7 ++++++- > board/ge/common/ge_common.c | 20 +++++++++++++------- > board/ge/mx53ppd/mx53ppd.c | 7 ++++++- > include/configs/ge_bx50v3.h | 2 +- > include/configs/mx53ppd.h | 2 +- > 5 files changed, 27 insertions(+), 11 deletions(-) Reviewed-by: Simon Glass <sjg@chromium.org> Should this go in the /chosen node? Regards, Simon ^ permalink raw reply [flat|nested] 24+ messages in thread
* [U-Boot] [RESEND PATCH 08/10] board: ge: pass rtc_status via device tree 2019-11-12 19:15 ` [U-Boot] [RESEND PATCH 08/10] board: ge: pass rtc_status via device tree Robert Beckett 2019-11-12 19:15 ` [U-Boot] [RESEND PATCH 09/10] board: ge: bx50v3: use imx wdt Robert Beckett 2019-12-27 16:41 ` [U-Boot][RESEND PATCH 08/10] board: ge: pass rtc_status via device tree Simon Glass @ 2019-12-29 10:28 ` sbabic at denx.de 2 siblings, 0 replies; 24+ messages in thread From: sbabic at denx.de @ 2019-12-29 10:28 UTC (permalink / raw) To: u-boot > From: Ian Ray <ian.ray@ge.com> > Pass rtc_status via the device tree, instead of on kernel command line. > Additionally, the 2038 mitigation is reported, if applied successfully. > Signed-off-by: Ian Ray <ian.ray@ge.com> > Signed-off-by: Robert Beckett <bob.beckett@collabora.com> > Reviewed-by: Simon Glass <sjg@chromium.org> Applied to u-boot-imx, -next, thanks ! Best regards, Stefano Babic -- ===================================================================== DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sbabic at denx.de ===================================================================== ^ permalink raw reply [flat|nested] 24+ messages in thread
* [U-Boot] [RESEND PATCH 07/10] board: ge: bx50v3: Enable DM for PCI and ethernet 2019-11-12 19:15 ` [U-Boot] [RESEND PATCH 07/10] board: ge: bx50v3: Enable DM for PCI and ethernet Robert Beckett 2019-11-12 19:15 ` [U-Boot] [RESEND PATCH 08/10] board: ge: pass rtc_status via device tree Robert Beckett @ 2019-12-29 10:26 ` sbabic at denx.de 1 sibling, 0 replies; 24+ messages in thread From: sbabic at denx.de @ 2019-12-29 10:26 UTC (permalink / raw) To: u-boot > From: Denis Zalevskiy <denis.zalevskiy@ge.com> > DM for PCI pulls DM for ethernet that also needs other changes described > below to build u-boot and keep existing functionality - ability to update > MAC addresses of FEC ethernet adapter and I210 adapter connected to the > Marvell switch. > - fec_mxc driver with DM needs PHYLIB; > - configuration items are moved from ge_bx50v3.h to ge_bx50v3_defconfig; > - FEC is marked as eth0 because it is always present, so indices changed: > I210 are still probed in the same order; > - board_eth_init() was used by legacy ethernet, setup for enet iomux and > pcie is moved to the board_late_init(); > - pci_init() is called from the board_late_init() to initiate PCI bus > probing, so I210 devices are propagated to the device tree; > Signed-off-by: Denis Zalevskiy <denis.zalevskiy@ge.com> > [Describe PHY reset in device tree] > Signed-off-by: Ian Ray <ian.ray@ge.com> > Signed-off-by: Robert Beckett <bob.beckett@collabora.com> Applied to u-boot-imx, -next, thanks ! Best regards, Stefano Babic -- ===================================================================== DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sbabic at denx.de ===================================================================== ^ permalink raw reply [flat|nested] 24+ messages in thread
* [U-Boot] [RESEND PATCH 06/10] configs: ppd: DM for USB and regulators PPD 2019-11-12 19:15 ` [U-Boot] [RESEND PATCH 06/10] configs: ppd: DM for USB and regulators PPD Robert Beckett 2019-11-12 19:15 ` [U-Boot] [RESEND PATCH 07/10] board: ge: bx50v3: Enable DM for PCI and ethernet Robert Beckett @ 2019-12-29 10:27 ` sbabic at denx.de 1 sibling, 0 replies; 24+ messages in thread From: sbabic at denx.de @ 2019-12-29 10:27 UTC (permalink / raw) To: u-boot > From: Denis Zalevskiy <denis.zalevskiy@ge.com> > DM should be used for USB since 2019.07, it also requires DM for > regulators. > Signed-off-by: Denis Zalevskiy <denis.zalevskiy@ge.com> > Signed-off-by: Robert Beckett <bob.beckett@collabora.com> Applied to u-boot-imx, -next, thanks ! Best regards, Stefano Babic -- ===================================================================== DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sbabic at denx.de ===================================================================== ^ permalink raw reply [flat|nested] 24+ messages in thread
* [U-Boot] [RESEND PATCH 05/10] board: ge: bx50v3: Fix message output to video console 2019-11-12 19:15 ` [U-Boot] [RESEND PATCH 05/10] board: ge: bx50v3: Fix message output to video console Robert Beckett 2019-11-12 19:15 ` [U-Boot] [RESEND PATCH 06/10] configs: ppd: DM for USB and regulators PPD Robert Beckett @ 2019-12-29 10:24 ` sbabic at denx.de 1 sibling, 0 replies; 24+ messages in thread From: sbabic at denx.de @ 2019-12-29 10:24 UTC (permalink / raw) To: u-boot > From: Ian Ray <ian.ray@ge.com> > Use vidconsole for output to the LCD, now that DM_VIDEO is used. Write > white text on a black background, like before migrating to DM_VIDEO. > Signed-off-by: Ian Ray <ian.ray@ge.com> > Signed-off-by: Robert Beckett <bob.beckett@collabora.com> Applied to u-boot-imx, -next, thanks ! Best regards, Stefano Babic -- ===================================================================== DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sbabic at denx.de ===================================================================== ^ permalink raw reply [flat|nested] 24+ messages in thread
* [U-Boot] [RESEND PATCH 04/10] board: ge: bx50v3: Fix run-time warning 2019-11-12 19:15 ` [U-Boot] [RESEND PATCH 04/10] board: ge: bx50v3: Fix run-time warning Robert Beckett 2019-11-12 19:15 ` [U-Boot] [RESEND PATCH 05/10] board: ge: bx50v3: Fix message output to video console Robert Beckett @ 2019-12-29 10:26 ` sbabic at denx.de 1 sibling, 0 replies; 24+ messages in thread From: sbabic at denx.de @ 2019-12-29 10:26 UTC (permalink / raw) To: u-boot > From: Ian Ray <ian.ray@ge.com> > Fix GPIO reservation warning on code paths that do not need LVDS power. > Signed-off-by: Ian Ray <ian.ray@ge.com> > Signed-off-by: Robert Beckett <bob.beckett@collabora.com> Applied to u-boot-imx, -next, thanks ! Best regards, Stefano Babic -- ===================================================================== DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sbabic at denx.de ===================================================================== ^ permalink raw reply [flat|nested] 24+ messages in thread
* [U-Boot] [RESEND PATCH 03/10] configs: bx50v3: Fix boot hang with video 2019-11-12 19:15 ` [U-Boot] [RESEND PATCH 03/10] configs: bx50v3: Fix boot hang with video Robert Beckett 2019-11-12 19:15 ` [U-Boot] [RESEND PATCH 04/10] board: ge: bx50v3: Fix run-time warning Robert Beckett @ 2019-12-29 10:27 ` sbabic at denx.de 1 sibling, 0 replies; 24+ messages in thread From: sbabic at denx.de @ 2019-12-29 10:27 UTC (permalink / raw) To: u-boot > From: Ian Ray <ian.ray@ge.com> > Fixes commit: 0b09f7b15052bb419e318e38da453be46e5a13e5, which converted > to DM_VIDEO, but requires more memory. > [Inspired by 9002e735e71754a90adbb9676c0ffb1964dbc288] > Signed-off-by: Ian Ray <ian.ray@ge.com> > Signed-off-by: Robert Beckett <bob.beckett@collabora.com> Applied to u-boot-imx, -next, thanks ! Best regards, Stefano Babic -- ===================================================================== DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sbabic at denx.de ===================================================================== ^ permalink raw reply [flat|nested] 24+ messages in thread
* [U-Boot] [RESEND PATCH 02/10] board: ge: ppd: sync device tree from Linux 2019-11-12 19:15 ` [U-Boot] [RESEND PATCH 02/10] board: ge: ppd: sync device tree " Robert Beckett 2019-11-12 19:15 ` [U-Boot] [RESEND PATCH 03/10] configs: bx50v3: Fix boot hang with video Robert Beckett @ 2019-12-29 10:27 ` sbabic at denx.de 1 sibling, 0 replies; 24+ messages in thread From: sbabic at denx.de @ 2019-12-29 10:27 UTC (permalink / raw) To: u-boot > Copy device tree from linux for PPD. > Signed-off-by: Robert Beckett <bob.beckett@collabora.com> Applied to u-boot-imx, -next, thanks ! Best regards, Stefano Babic -- ===================================================================== DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sbabic at denx.de ===================================================================== ^ permalink raw reply [flat|nested] 24+ messages in thread
* [U-Boot][RESEND PATCH 01/10] board: ge: bx50v3: sync devicetrees from Linux 2019-11-12 19:15 ` [U-Boot] [RESEND PATCH 01/10] board: ge: bx50v3: sync devicetrees from Linux Robert Beckett 2019-11-12 19:15 ` [U-Boot] [RESEND PATCH 02/10] board: ge: ppd: sync device tree " Robert Beckett @ 2019-12-27 13:53 ` Stefano Babic 2019-12-29 10:27 ` [U-Boot] [RESEND " sbabic at denx.de 2 siblings, 0 replies; 24+ messages in thread From: Stefano Babic @ 2019-12-27 13:53 UTC (permalink / raw) To: u-boot Hi Robert, I merged this series into -next branch, sorry for delay. Anyway, this series makes obsolete (at least in part) the previous one: https://patchwork.ozlabs.org/patch/1182350/ I will mark that series as superseeded in patchwork, please repost the missing patches on top of the (u-boot-imx) -next branch, thanks ! Best regards, Stefano Babic On 12/11/19 20:15, Robert Beckett wrote: > Copy device trees from linux, keeping them as separate files for > each board to ease future sync. > > Update board code to use generic bx50v3 dt initially, then select > the specific dt based on board detection. > > Signed-off-by: Robert Beckett <bob.beckett@collabora.com> > --- > > arch/arm/dts/Makefile | 7 +- > arch/arm/dts/imx6q-b450v3.dts | 160 +++++++++ > arch/arm/dts/imx6q-b650v3.dts | 159 ++++++++ > arch/arm/dts/imx6q-b850v3.dts | 302 ++++++++++++++++ > arch/arm/dts/imx6q-ba16.dtsi | 640 +++++++++++++++++++++++++++++++++ > arch/arm/dts/imx6q-bx50v3.dts | 78 +--- > arch/arm/dts/imx6q-bx50v3.dtsi | 380 ++++++++++++++++++++ > board/ge/bx50v3/bx50v3.c | 34 +- > configs/ge_bx50v3_defconfig | 5 + > 9 files changed, 1689 insertions(+), 76 deletions(-) > create mode 100644 arch/arm/dts/imx6q-b450v3.dts > create mode 100644 arch/arm/dts/imx6q-b650v3.dts > create mode 100644 arch/arm/dts/imx6q-b850v3.dts > create mode 100644 arch/arm/dts/imx6q-ba16.dtsi > create mode 100644 arch/arm/dts/imx6q-bx50v3.dtsi > > diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile > index 85ef00a2bd..1ee7fa197d 100644 > --- a/arch/arm/dts/Makefile > +++ b/arch/arm/dts/Makefile > @@ -829,7 +829,12 @@ dtb-$(CONFIG_ARCH_MEDIATEK) += \ > mt7629-rfb.dtb \ > mt8516-pumpkin.dtb > > -dtb-$(CONFIG_TARGET_GE_BX50V3) += imx6q-bx50v3.dtb > +dtb-$(CONFIG_TARGET_GE_BX50V3) += \ > + imx6q-bx50v3.dtb \ > + imx6q-b850v3.dtb \ > + imx6q-b650v3.dtb \ > + imx6q-b450v3.dtb > + > dtb-$(CONFIG_TARGET_MX53PPD) += imx53-ppd.dtb > > dtb-$(CONFIG_TARGET_VEXPRESS_CA5X2) += vexpress-v2p-ca5s.dtb > diff --git a/arch/arm/dts/imx6q-b450v3.dts b/arch/arm/dts/imx6q-b450v3.dts > new file mode 100644 > index 0000000000..7fca833cbf > --- /dev/null > +++ b/arch/arm/dts/imx6q-b450v3.dts > @@ -0,0 +1,160 @@ > +// SPDX-License-Identifier: GPL-2.0+ OR X11 > +/* > + * Copyright 2015 Timesys Corporation. > + * Copyright 2015 General Electric Company > + * > + * This file is dual-licensed: you can use it either under the terms > + * of the GPL or the X11 license, at your option. Note that this dual > + * licensing only applies to this file, and not this project as a > + * whole. > + * > + * a) This file is free software; you can redistribute it and/or > + * modify it under the terms of the GNU General Public License > + * version 2 as published by the Free Software Foundation. > + * > + * This file is distributed in the hope that it will be useful, > + * but WITHOUT ANY WARRANTY; without even the implied warranty of > + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the > + * GNU General Public License for more details. > + * > + * Or, alternatively, > + * > + * b) Permission is hereby granted, free of charge, to any person > + * obtaining a copy of this software and associated documentation > + * files (the "Software"), to deal in the Software without > + * restriction, including without limitation the rights to use, > + * copy, modify, merge, publish, distribute, sublicense, and/or > + * sell copies of the Software, and to permit persons to whom the > + * Software is furnished to do so, subject to the following > + * conditions: > + * > + * The above copyright notice and this permission notice shall be > + * included in all copies or substantial portions of the Software. > + * > + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, > + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES > + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND > + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT > + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, > + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING > + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR > + * OTHER DEALINGS IN THE SOFTWARE. > + */ > + > +/dts-v1/; > + > +#include "imx6q-bx50v3.dtsi" > + > +/ { > + model = "General Electric B450v3"; > + compatible = "ge,imx6q-b450v3", "advantech,imx6q-ba16", "fsl,imx6q"; > + > + chosen { > + stdout-path = &uart3; > + }; > + > + panel-lvds0 { > + compatible = "innolux,g121x1-l03"; > + backlight = <&backlight_lvds>; > + power-supply = <®_lvds>; > + > + port { > + panel_in_lvds0: endpoint { > + remote-endpoint = <&lvds0_out>; > + }; > + }; > + }; > +}; > + > +&clks { > + assigned-clocks = <&clks IMX6QDL_CLK_LDB_DI0_SEL>, > + <&clks IMX6QDL_CLK_LDB_DI1_SEL>; > + assigned-clock-parents = <&clks IMX6QDL_CLK_PLL3_USB_OTG>, > + <&clks IMX6QDL_CLK_PLL3_USB_OTG>; > +}; > + > +&ldb { > + status = "okay"; > + > + lvds0: lvds-channel at 0 { > + fsl,data-mapping = "spwg"; > + fsl,data-width = <24>; > + status = "okay"; > + > + port at 4 { > + reg = <4>; > + > + lvds0_out: endpoint { > + remote-endpoint = <&panel_in_lvds0>; > + }; > + }; > + }; > +}; > + > +&pca9539 { > + P04 { > + gpio-hog; > + gpios = <4 0>; > + output-low; > + line-name = "PCA9539-P04"; > + }; > + > + P07 { > + gpio-hog; > + gpios = <7 0>; > + output-low; > + line-name = "PCA9539-P07"; > + }; > +}; > + > +&pci_root { > + /* Intel Corporation I210 Gigabit Network Connection */ > + switch_nic: ethernet at 3,0 { > + compatible = "pci8086,1533"; > + reg = <0x00010000 0 0 0 0>; > + }; > +}; > + > +&switch_ports { > + port at 0 { > + reg = <0>; > + label = "enacq"; > + phy-handle = <&switchphy0>; > + }; > + > + port at 1 { > + reg = <1>; > + label = "eneport1"; > + phy-handle = <&switchphy1>; > + }; > + > + port at 2 { > + reg = <2>; > + label = "enix"; > + phy-handle = <&switchphy2>; > + }; > + > + port at 3 { > + reg = <3>; > + label = "enid"; > + phy-handle = <&switchphy3>; > + }; > + > + port at 4 { > + reg = <4>; > + label = "cpu"; > + ethernet = <&switch_nic>; > + phy-handle = <&switchphy4>; > + }; > + > + port at 5 { > + reg = <5>; > + label = "enembc"; > + > + /* connected to Ethernet MAC of AT91RM9200 in MII mode */ > + fixed-link { > + speed = <100>; > + full-duplex; > + }; > + }; > +}; > diff --git a/arch/arm/dts/imx6q-b650v3.dts b/arch/arm/dts/imx6q-b650v3.dts > new file mode 100644 > index 0000000000..ba12e9be5f > --- /dev/null > +++ b/arch/arm/dts/imx6q-b650v3.dts > @@ -0,0 +1,159 @@ > +// SPDX-License-Identifier: GPL-2.0+ OR X11 > +/* > + * Copyright 2015 Timesys Corporation. > + * Copyright 2015 General Electric Company > + * > + * This file is dual-licensed: you can use it either under the terms > + * of the GPL or the X11 license, at your option. Note that this dual > + * licensing only applies to this file, and not this project as a > + * whole. > + * > + * a) This file is free software; you can redistribute it and/or > + * modify it under the terms of the GNU General Public License > + * version 2 as published by the Free Software Foundation. > + * > + * This file is distributed in the hope that it will be useful, > + * but WITHOUT ANY WARRANTY; without even the implied warranty of > + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the > + * GNU General Public License for more details. > + * > + * Or, alternatively, > + * > + * b) Permission is hereby granted, free of charge, to any person > + * obtaining a copy of this software and associated documentation > + * files (the "Software"), to deal in the Software without > + * restriction, including without limitation the rights to use, > + * copy, modify, merge, publish, distribute, sublicense, and/or > + * sell copies of the Software, and to permit persons to whom the > + * Software is furnished to do so, subject to the following > + * conditions: > + * > + * The above copyright notice and this permission notice shall be > + * included in all copies or substantial portions of the Software. > + * > + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, > + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES > + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND > + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT > + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, > + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING > + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR > + * OTHER DEALINGS IN THE SOFTWARE. > + */ > + > +/dts-v1/; > + > +#include "imx6q-bx50v3.dtsi" > + > +/ { > + model = "General Electric B650v3"; > + compatible = "ge,imx6q-b650v3", "advantech,imx6q-ba16", "fsl,imx6q"; > + > + chosen { > + stdout-path = &uart3; > + }; > + > + panel-lvds0 { > + compatible = "innolux,g121x1-l03"; > + backlight = <&backlight_lvds>; > + power-supply = <®_lvds>; > + > + port { > + panel_in_lvds0: endpoint { > + remote-endpoint = <&lvds0_out>; > + }; > + }; > + }; > +}; > + > +&clks { > + assigned-clocks = <&clks IMX6QDL_CLK_LDB_DI0_SEL>, > + <&clks IMX6QDL_CLK_LDB_DI1_SEL>; > + assigned-clock-parents = <&clks IMX6QDL_CLK_PLL3_USB_OTG>, > + <&clks IMX6QDL_CLK_PLL3_USB_OTG>; > +}; > + > +&ldb { > + status = "okay"; > + > + lvds0: lvds-channel at 0 { > + fsl,data-mapping = "spwg"; > + fsl,data-width = <24>; > + status = "okay"; > + > + port at 4 { > + reg = <4>; > + > + lvds0_out: endpoint { > + remote-endpoint = <&panel_in_lvds0>; > + }; > + }; > + }; > +}; > + > +&pca9539 { > + P07 { > + gpio-hog; > + gpios = <7 0>; > + output-low; > + line-name = "PCA9539-P07"; > + }; > +}; > + > +&usbphy1 { > + fsl,tx-cal-45-dn-ohms = <55>; > + fsl,tx-cal-45-dp-ohms = <55>; > + fsl,tx-d-cal = <100>; > +}; > + > +&pci_root { > + /* Intel Corporation I210 Gigabit Network Connection */ > + switch_nic: ethernet at 3,0 { > + compatible = "pci8086,1533"; > + reg = <0x00010000 0 0 0 0>; > + }; > +}; > + > +&switch_ports { > + port at 0 { > + reg = <0>; > + label = "enacq"; > + phy-handle = <&switchphy0>; > + }; > + > + port at 1 { > + reg = <1>; > + label = "eneport1"; > + phy-handle = <&switchphy1>; > + }; > + > + port at 2 { > + reg = <2>; > + label = "enix"; > + phy-handle = <&switchphy2>; > + }; > + > + port at 3 { > + reg = <3>; > + label = "enid"; > + phy-handle = <&switchphy3>; > + }; > + > + port at 4 { > + reg = <4>; > + label = "cpu"; > + ethernet = <&switch_nic>; > + phy-handle = <&switchphy4>; > + }; > + > + port at 5 { > + reg = <5>; > + label = "enembc"; > + > + /* connected to Ethernet MAC of AT91RM9200 in MII mode */ > + fixed-link { > + speed = <100>; > + full-duplex; > + }; > + }; > +}; > diff --git a/arch/arm/dts/imx6q-b850v3.dts b/arch/arm/dts/imx6q-b850v3.dts > new file mode 100644 > index 0000000000..0a98552691 > --- /dev/null > +++ b/arch/arm/dts/imx6q-b850v3.dts > @@ -0,0 +1,302 @@ > +// SPDX-License-Identifier: GPL-2.0+ OR X11 > +/* > + * Copyright 2015 Timesys Corporation. > + * Copyright 2015 General Electric Company > + * > + * This file is dual-licensed: you can use it either under the terms > + * of the GPL or the X11 license, at your option. Note that this dual > + * licensing only applies to this file, and not this project as a > + * whole. > + * > + * a) This file is free software; you can redistribute it and/or > + * modify it under the terms of the GNU General Public License > + * version 2 as published by the Free Software Foundation. > + * > + * This file is distributed in the hope that it will be useful, > + * but WITHOUT ANY WARRANTY; without even the implied warranty of > + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the > + * GNU General Public License for more details. > + * > + * Or, alternatively, > + * > + * b) Permission is hereby granted, free of charge, to any person > + * obtaining a copy of this software and associated documentation > + * files (the "Software"), to deal in the Software without > + * restriction, including without limitation the rights to use, > + * copy, modify, merge, publish, distribute, sublicense, and/or > + * sell copies of the Software, and to permit persons to whom the > + * Software is furnished to do so, subject to the following > + * conditions: > + * > + * The above copyright notice and this permission notice shall be > + * included in all copies or substantial portions of the Software. > + * > + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, > + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES > + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND > + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT > + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, > + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING > + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR > + * OTHER DEALINGS IN THE SOFTWARE. > + */ > + > +/dts-v1/; > + > +#include "imx6q-bx50v3.dtsi" > + > +/ { > + model = "General Electric B850v3"; > + compatible = "ge,imx6q-b850v3", "advantech,imx6q-ba16", "fsl,imx6q"; > + > + chosen { > + stdout-path = &uart3; > + }; > +}; > + > +&clks { > + assigned-clocks = <&clks IMX6QDL_CLK_LDB_DI0_SEL>, > + <&clks IMX6QDL_CLK_LDB_DI1_SEL>, > + <&clks IMX6QDL_CLK_IPU1_DI0_PRE_SEL>, > + <&clks IMX6QDL_CLK_IPU2_DI0_PRE_SEL>; > + assigned-clock-parents = <&clks IMX6QDL_CLK_PLL5_VIDEO_DIV>, > + <&clks IMX6QDL_CLK_PLL5_VIDEO_DIV>, > + <&clks IMX6QDL_CLK_PLL2_PFD2_396M>, > + <&clks IMX6QDL_CLK_PLL2_PFD2_396M>; > +}; > + > +&ldb { > + fsl,dual-channel; > + status = "okay"; > + > + lvds0: lvds-channel at 0 { > + fsl,data-mapping = "spwg"; > + fsl,data-width = <24>; > + status = "okay"; > + > + port at 4 { > + reg = <4>; > + > + lvds0_out: endpoint { > + remote-endpoint = <&stdp4028_in>; > + }; > + }; > + }; > +}; > + > +&i2c2 { > + pca9547_ddc: mux at 70 { > + compatible = "nxp,pca9547"; > + reg = <0x70>; > + #address-cells = <1>; > + #size-cells = <0>; > + > + mux2_i2c1: i2c at 0 { > + #address-cells = <1>; > + #size-cells = <0>; > + reg = <0x0>; > + }; > + > + mux2_i2c2: i2c at 1 { > + #address-cells = <1>; > + #size-cells = <0>; > + reg = <0x1>; > + }; > + > + mux2_i2c3: i2c at 2 { > + #address-cells = <1>; > + #size-cells = <0>; > + reg = <0x2>; > + }; > + > + mux2_i2c4: i2c at 3 { > + #address-cells = <1>; > + #size-cells = <0>; > + reg = <0x3>; > + }; > + > + mux2_i2c5: i2c at 4 { > + #address-cells = <1>; > + #size-cells = <0>; > + reg = <0x4>; > + }; > + > + mux2_i2c6: i2c at 5 { > + #address-cells = <1>; > + #size-cells = <0>; > + reg = <0x5>; > + }; > + > + mux2_i2c7: i2c at 6 { > + #address-cells = <1>; > + #size-cells = <0>; > + reg = <0x6>; > + }; > + > + mux2_i2c8: i2c at 7 { > + #address-cells = <1>; > + #size-cells = <0>; > + reg = <0x7>; > + }; > + }; > +}; > + > +&hdmi { > + ddc-i2c-bus = <&mux2_i2c1>; > +}; > + > +&mux1_i2c1 { > + ads7830 at 4a { > + compatible = "ti,ads7830"; > + reg = <0x4a>; > + }; > +}; > + > +&mux2_i2c2 { > + clock-frequency = <100000>; > + > + stdp2690 at 72 { > + compatible = "megachips,stdp2690-ge-b850v3-fw"; > + reg = <0x72>; > + > + ports { > + #address-cells = <1>; > + #size-cells = <0>; > + > + port at 0 { > + reg = <0>; > + > + stdp2690_in: endpoint { > + remote-endpoint = <&stdp4028_out>; > + }; > + }; > + > + port at 1 { > + reg = <1>; > + > + stdp2690_out: endpoint { > + /* Connector for external display */ > + }; > + }; > + }; > + }; > + > + stdp4028 at 73 { > + compatible = "megachips,stdp4028-ge-b850v3-fw"; > + reg = <0x73>; > + interrupt-parent = <&gpio2>; > + interrupts = <0 IRQ_TYPE_LEVEL_HIGH>; > + > + ports { > + #address-cells = <1>; > + #size-cells = <0>; > + > + port at 0 { > + reg = <0>; > + > + stdp4028_in: endpoint { > + remote-endpoint = <&lvds0_out>; > + }; > + }; > + > + port at 1 { > + reg = <1>; > + > + stdp4028_out: endpoint { > + remote-endpoint = <&stdp2690_in>; > + }; > + }; > + }; > + }; > +}; > + > +&pca9539 { > + P10 { > + gpio-hog; > + gpios = <8 0>; > + output-low; > + line-name = "PCA9539-P10"; > + }; > + > + P11 { > + gpio-hog; > + gpios = <9 0>; > + output-low; > + line-name = "PCA9539-P11"; > + }; > +}; > + > +&pci_root { > + /* PLX Technology, Inc. PEX 8605 PCI Express 4-port Gen2 Switch */ > + bridge at 1,0 { > + compatible = "pci10b5,8605"; > + reg = <0x00010000 0 0 0 0>; > + > + #address-cells = <3>; > + #size-cells = <2>; > + #interrupt-cells = <1>; > + > + bridge at 2,1 { > + compatible = "pci10b5,8605"; > + reg = <0x00020800 0 0 0 0>; > + > + #address-cells = <3>; > + #size-cells = <2>; > + #interrupt-cells = <1>; > + > + /* Intel Corporation I210 Gigabit Network Connection */ > + ethernet at 3,0 { > + compatible = "pci8086,1533"; > + reg = <0x00030000 0 0 0 0>; > + }; > + }; > + > + bridge at 2,2 { > + compatible = "pci10b5,8605"; > + reg = <0x00021000 0 0 0 0>; > + > + #address-cells = <3>; > + #size-cells = <2>; > + #interrupt-cells = <1>; > + > + /* Intel Corporation I210 Gigabit Network Connection */ > + switch_nic: ethernet at 4,0 { > + compatible = "pci8086,1533"; > + reg = <0x00040000 0 0 0 0>; > + }; > + }; > + }; > +}; > + > +&switch_ports { > + port at 0 { > + reg = <0>; > + label = "eneport1"; > + phy-handle = <&switchphy0>; > + }; > + > + port at 1 { > + reg = <1>; > + label = "eneport2"; > + phy-handle = <&switchphy1>; > + }; > + > + port at 2 { > + reg = <2>; > + label = "enix"; > + phy-handle = <&switchphy2>; > + }; > + > + port at 3 { > + reg = <3>; > + label = "enid"; > + phy-handle = <&switchphy3>; > + }; > + > + port at 4 { > + reg = <4>; > + label = "cpu"; > + ethernet = <&switch_nic>; > + phy-handle = <&switchphy4>; > + }; > +}; > diff --git a/arch/arm/dts/imx6q-ba16.dtsi b/arch/arm/dts/imx6q-ba16.dtsi > new file mode 100644 > index 0000000000..7d8f61f2fd > --- /dev/null > +++ b/arch/arm/dts/imx6q-ba16.dtsi > @@ -0,0 +1,640 @@ > +// SPDX-License-Identifier: GPL-2.0+ OR X11 > +/* > + * Support for imx6 based Advantech DMS-BA16 Qseven module > + * > + * Copyright 2015 Timesys Corporation. > + * Copyright 2015 General Electric Company > + * > + * This file is dual-licensed: you can use it either under the terms > + * of the GPL or the X11 license, at your option. Note that this dual > + * licensing only applies to this file, and not this project as a > + * whole. > + * > + * a) This file is free software; you can redistribute it and/or > + * modify it under the terms of the GNU General Public License > + * version 2 as published by the Free Software Foundation. > + * > + * This file is distributed in the hope that it will be useful, > + * but WITHOUT ANY WARRANTY; without even the implied warranty of > + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the > + * GNU General Public License for more details. > + * > + * Or, alternatively, > + * > + * b) Permission is hereby granted, free of charge, to any person > + * obtaining a copy of this software and associated documentation > + * files (the "Software"), to deal in the Software without > + * restriction, including without limitation the rights to use, > + * copy, modify, merge, publish, distribute, sublicense, and/or > + * sell copies of the Software, and to permit persons to whom the > + * Software is furnished to do so, subject to the following > + * conditions: > + * > + * The above copyright notice and this permission notice shall be > + * included in all copies or substantial portions of the Software. > + * > + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, > + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES > + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND > + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT > + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, > + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING > + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR > + * OTHER DEALINGS IN THE SOFTWARE. > + */ > + > +#include "imx6q.dtsi" > +#include <dt-bindings/gpio/gpio.h> > + > +/ { > + memory at 10000000 { > + device_type = "memory"; > + reg = <0x10000000 0x40000000>; > + }; > + > + backlight_lvds: backlight { > + compatible = "pwm-backlight"; > + pinctrl-names = "default"; > + pinctrl-0 = <&pinctrl_display>; > + pwms = <&pwm1 0 5000000>; > + brightness-levels = < 0 1 2 3 4 5 6 7 8 9 > + 10 11 12 13 14 15 16 17 18 19 > + 20 21 22 23 24 25 26 27 28 29 > + 30 31 32 33 34 35 36 37 38 39 > + 40 41 42 43 44 45 46 47 48 49 > + 50 51 52 53 54 55 56 57 58 59 > + 60 61 62 63 64 65 66 67 68 69 > + 70 71 72 73 74 75 76 77 78 79 > + 80 81 82 83 84 85 86 87 88 89 > + 90 91 92 93 94 95 96 97 98 99 > + 100 101 102 103 104 105 106 107 108 109 > + 110 111 112 113 114 115 116 117 118 119 > + 120 121 122 123 124 125 126 127 128 129 > + 130 131 132 133 134 135 136 137 138 139 > + 140 141 142 143 144 145 146 147 148 149 > + 150 151 152 153 154 155 156 157 158 159 > + 160 161 162 163 164 165 166 167 168 169 > + 170 171 172 173 174 175 176 177 178 179 > + 180 181 182 183 184 185 186 187 188 189 > + 190 191 192 193 194 195 196 197 198 199 > + 200 201 202 203 204 205 206 207 208 209 > + 210 211 212 213 214 215 216 217 218 219 > + 220 221 222 223 224 225 226 227 228 229 > + 230 231 232 233 234 235 236 237 238 239 > + 240 241 242 243 244 245 246 247 248 249 > + 250 251 252 253 254 255>; > + default-brightness-level = <255>; > + enable-gpios = <&gpio1 0 GPIO_ACTIVE_HIGH>; > + }; > + > + reg_1p8v: regulator-1p8v { > + compatible = "regulator-fixed"; > + regulator-name = "1P8V"; > + regulator-min-microvolt = <1800000>; > + regulator-max-microvolt = <1800000>; > + regulator-always-on; > + }; > + > + reg_3p3v: regulator-3p3v { > + compatible = "regulator-fixed"; > + regulator-name = "3P3V"; > + regulator-min-microvolt = <3300000>; > + regulator-max-microvolt = <3300000>; > + regulator-always-on; > + }; > + > + reg_lvds: regulator-lvds { > + compatible = "regulator-fixed"; > + regulator-name = "lvds_ppen"; > + regulator-min-microvolt = <3300000>; > + regulator-max-microvolt = <3300000>; > + regulator-boot-on; > + gpio = <&gpio3 22 GPIO_ACTIVE_HIGH>; > + enable-active-high; > + }; > + > + reg_usb_h1_vbus: regulator-usbh1vbus { > + compatible = "regulator-fixed"; > + regulator-name = "usb_h1_vbus"; > + regulator-min-microvolt = <5000000>; > + regulator-max-microvolt = <5000000>; > + }; > + > + reg_usb_otg_vbus: regulator-usbotgvbus { > + compatible = "regulator-fixed"; > + regulator-name = "usb_otg_vbus"; > + regulator-min-microvolt = <5000000>; > + regulator-max-microvolt = <5000000>; > + }; > +}; > + > +&audmux { > + pinctrl-names = "default"; > + pinctrl-0 = <&pinctrl_audmux>; > + status = "okay"; > +}; > + > +&ecspi1 { > + cs-gpios = <&gpio2 30 GPIO_ACTIVE_HIGH>; > + pinctrl-names = "default"; > + pinctrl-0 = <&pinctrl_ecspi1>; > + status = "okay"; > + > + flash: n25q032 at 0 { > + compatible = "jedec,spi-nor"; > + #address-cells = <1>; > + #size-cells = <1>; > + spi-max-frequency = <20000000>; > + reg = <0>; > + > + partition at 0 { > + label = "U-Boot"; > + reg = <0x0 0xc0000>; > + }; > + > + partition at c0000 { > + label = "env"; > + reg = <0xc0000 0x10000>; > + }; > + > + partition at d0000 { > + label = "spare"; > + reg = <0xd0000 0x320000>; > + }; > + > + partition at 3f0000 { > + label = "mfg"; > + reg = <0x3f0000 0x10000>; > + }; > + }; > +}; > + > +&fec { > + pinctrl-names = "default"; > + pinctrl-0 = <&pinctrl_enet>; > + phy-mode = "rgmii-id"; > + status = "okay"; > +}; > + > +&hdmi { > + ddc-i2c-bus = <&i2c2>; > + status = "okay"; > +}; > + > +&i2c1 { > + clock-frequency = <100000>; > + pinctrl-names = "default"; > + pinctrl-0 = <&pinctrl_i2c1>; > + status = "okay"; > +}; > + > +&i2c2 { > + clock-frequency = <100000>; > + pinctrl-names = "default"; > + pinctrl-0 = <&pinctrl_i2c2>; > + status = "okay"; > +}; > + > +&i2c3 { > + clock-frequency = <100000>; > + pinctrl-names = "default"; > + pinctrl-0 = <&pinctrl_i2c3>; > + status = "okay"; > + > + pmic at 58 { > + compatible = "dlg,da9063"; > + reg = <0x58>; > + pinctrl-names = "default"; > + pinctrl-0 = <&pinctrl_pmic>; > + interrupt-parent = <&gpio7>; > + interrupts = <13 IRQ_TYPE_LEVEL_LOW>; > + > + onkey { > + compatible = "dlg,da9063-onkey"; > + }; > + > + regulators { > + vdd_bcore1: bcore1 { > + regulator-min-microvolt = <1420000>; > + regulator-max-microvolt = <1420000>; > + regulator-always-on; > + regulator-boot-on; > + }; > + > + vdd_bcore2: bcore2 { > + regulator-min-microvolt = <1420000>; > + regulator-max-microvolt = <1420000>; > + regulator-always-on; > + regulator-boot-on; > + }; > + > + vdd_bpro: bpro { > + regulator-min-microvolt = <1500000>; > + regulator-max-microvolt = <1500000>; > + regulator-always-on; > + regulator-boot-on; > + }; > + > + vdd_bmem: bmem { > + regulator-min-microvolt = <1800000>; > + regulator-max-microvolt = <1800000>; > + regulator-always-on; > + regulator-boot-on; > + }; > + > + vdd_bio: bio { > + regulator-min-microvolt = <1800000>; > + regulator-max-microvolt = <1800000>; > + regulator-always-on; > + regulator-boot-on; > + }; > + > + vdd_bperi: bperi { > + regulator-min-microvolt = <3300000>; > + regulator-max-microvolt = <3300000>; > + regulator-always-on; > + regulator-boot-on; > + }; > + > + vdd_ldo1: ldo1 { > + regulator-min-microvolt = <600000>; > + regulator-max-microvolt = <1860000>; > + }; > + > + vdd_ldo2: ldo2 { > + regulator-min-microvolt = <600000>; > + regulator-max-microvolt = <1860000>; > + }; > + > + vdd_ldo3: ldo3 { > + regulator-min-microvolt = <900000>; > + regulator-max-microvolt = <3440000>; > + }; > + > + vdd_ldo4: ldo4 { > + regulator-min-microvolt = <900000>; > + regulator-max-microvolt = <3440000>; > + }; > + > + vdd_ldo5: ldo5 { > + regulator-min-microvolt = <900000>; > + regulator-max-microvolt = <3600000>; > + }; > + > + vdd_ldo6: ldo6 { > + regulator-min-microvolt = <900000>; > + regulator-max-microvolt = <3600000>; > + }; > + > + vdd_ldo7: ldo7 { > + regulator-min-microvolt = <900000>; > + regulator-max-microvolt = <3600000>; > + }; > + > + vdd_ldo8: ldo8 { > + regulator-min-microvolt = <900000>; > + regulator-max-microvolt = <3600000>; > + }; > + > + vdd_ldo9: ldo9 { > + regulator-min-microvolt = <950000>; > + regulator-max-microvolt = <3600000>; > + }; > + > + vdd_ldo10: ldo10 { > + regulator-min-microvolt = <900000>; > + regulator-max-microvolt = <3600000>; > + }; > + > + vdd_ldo11: ldo11 { > + regulator-min-microvolt = <900000>; > + regulator-max-microvolt = <3600000>; > + regulator-always-on; > + regulator-boot-on; > + }; > + }; > + }; > + > + rtc at 32 { > + compatible = "epson,rx8010"; > + pinctrl-names = "default"; > + pinctrl-0 = <&pinctrl_rtc>; > + reg = <0x32>; > + interrupt-parent = <&gpio4>; > + interrupts = <10 IRQ_TYPE_LEVEL_HIGH>; > + }; > +}; > + > +&pcie { > + pinctrl-names = "default"; > + pinctrl-0 = <&pinctrl_pcie>; > + reset-gpio = <&gpio7 12 GPIO_ACTIVE_LOW>; > + fsl,tx-swing-full = <103>; > + fsl,tx-swing-low = <103>; > + status = "okay"; > +}; > + > +&pwm1 { > + pinctrl-names = "default"; > + pinctrl-0 = <&pinctrl_pwm1>; > + status = "okay"; > +}; > + > +&pwm2 { > + pinctrl-names = "default"; > + pinctrl-0 = <&pinctrl_pwm2>; > + status = "disabled"; > +}; > + > +&sata { > + status = "okay"; > +}; > + > +&ssi1 { > + status = "okay"; > +}; > + > +&uart3 { > + pinctrl-names = "default"; > + pinctrl-0 = <&pinctrl_uart3>; > + uart-has-rtscts; > + status = "okay"; > +}; > + > +&uart4 { > + pinctrl-names = "default"; > + pinctrl-0 = <&pinctrl_uart4>; > + status = "okay"; > +}; > + > +&usbh1 { > + pinctrl-names = "default"; > + pinctrl-0 = <&pinctrl_usbhub>; > + vbus-supply = <®_usb_h1_vbus>; > + reset-gpios = <&gpio7 11 GPIO_ACTIVE_HIGH>; > + status = "okay"; > +}; > + > +&usbotg { > + vbus-supply = <®_usb_otg_vbus>; > + pinctrl-names = "default"; > + pinctrl-0 = <&pinctrl_usbotg>; > + disable-over-current; > + status = "okay"; > +}; > + > +&usdhc2 { > + pinctrl-names = "default"; > + pinctrl-0 = <&pinctrl_usdhc2>; > + cd-gpios = <&gpio1 4 GPIO_ACTIVE_LOW>; > + no-1-8-v; > + keep-power-in-suspend; > + wakeup-source; > + status = "okay"; > +}; > + > +&usdhc3 { > + pinctrl-names = "default"; > + pinctrl-0 = <&pinctrl_usdhc3 &pinctrl_usdhc3_reset>; > + bus-width = <8>; > + vmmc-supply = <&vdd_bperi>; > + non-removable; > + keep-power-in-suspend; > + status = "okay"; > +}; > + > +&wdog1 { > + pinctrl-names = "default"; > + pinctrl-0 = <&pinctrl_wdog>; > + fsl,ext-reset-output; > +}; > + > +&iomuxc { > + pinctrl-names = "default"; > + pinctrl-0 = <&pinctrl_hog>; > + > + pinctrl_audmux: audmuxgrp { > + fsl,pins = < > + MX6QDL_PAD_DISP0_DAT20__AUD4_TXC 0x130b0 > + MX6QDL_PAD_DISP0_DAT21__AUD4_TXD 0x130b0 > + MX6QDL_PAD_DISP0_DAT22__AUD4_TXFS 0x130b0 > + MX6QDL_PAD_DISP0_DAT23__AUD4_RXD 0x130b0 > + >; > + }; > + > + pinctrl_display: dispgrp { > + fsl,pins = < > + /* BLEN_OUT */ > + MX6QDL_PAD_GPIO_0__GPIO1_IO00 0x1b0b0 > + /* LVDS_PPEN_OUT */ > + MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x1b0b0 > + >; > + }; > + > + pinctrl_ecspi1: ecspi1grp { > + fsl,pins = < > + MX6QDL_PAD_EIM_D17__ECSPI1_MISO 0x100b1 > + MX6QDL_PAD_EIM_D18__ECSPI1_MOSI 0x100b1 > + MX6QDL_PAD_EIM_D16__ECSPI1_SCLK 0x100b1 > + /* SPI1 CS */ > + MX6QDL_PAD_EIM_EB2__GPIO2_IO30 0x1b0b0 > + >; > + }; > + > + pinctrl_ecspi5: ecspi5grp { > + fsl,pins = < > + MX6QDL_PAD_SD1_DAT0__ECSPI5_MISO 0x1b0b0 > + MX6QDL_PAD_SD1_CMD__ECSPI5_MOSI 0x1b0b0 > + MX6QDL_PAD_SD1_CLK__ECSPI5_SCLK 0x1b0b0 > + MX6QDL_PAD_SD1_DAT1__GPIO1_IO17 0x1b0b0 > + >; > + }; > + > + pinctrl_enet: enetgrp { > + fsl,pins = < > + MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x100b0 > + MX6QDL_PAD_ENET_MDC__ENET_MDC 0x100b0 > + MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x10030 > + MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x10030 > + MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x10030 > + MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x10030 > + MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x10030 > + MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x10030 > + MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x100b0 > + MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b030 > + MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b030 > + MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b030 > + MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b030 > + MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b030 > + MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b030 > + /* FEC Reset */ > + MX6QDL_PAD_ENET_TX_EN__GPIO1_IO28 0x1b0b0 > + /* AR8033 Interrupt */ > + MX6QDL_PAD_GPIO_19__GPIO4_IO05 0x1b0b0 > + >; > + }; > + > + pinctrl_hog: hoggrp { > + fsl,pins = < > + /* GPIO 0-7 */ > + MX6QDL_PAD_NANDF_D0__GPIO2_IO00 0x1b0b0 > + MX6QDL_PAD_NANDF_D1__GPIO2_IO01 0x1b0b0 > + MX6QDL_PAD_NANDF_D2__GPIO2_IO02 0x1b0b0 > + MX6QDL_PAD_NANDF_D3__GPIO2_IO03 0x1b0b0 > + MX6QDL_PAD_NANDF_D4__GPIO2_IO04 0x1b0b0 > + MX6QDL_PAD_NANDF_D5__GPIO2_IO05 0x1b0b0 > + MX6QDL_PAD_NANDF_D6__GPIO2_IO06 0x1b0b0 > + MX6QDL_PAD_NANDF_D7__GPIO2_IO07 0x1b0b0 > + /* SUS_S3_OUT to CPLD */ > + MX6QDL_PAD_KEY_ROW2__GPIO4_IO11 0x1b0b0 > + >; > + }; > + > + pinctrl_i2c1: i2c1grp { > + fsl,pins = < > + MX6QDL_PAD_CSI0_DAT8__I2C1_SDA 0x4001b8b1 > + MX6QDL_PAD_CSI0_DAT9__I2C1_SCL 0x4001b8b1 > + >; > + }; > + > + pinctrl_i2c2: i2c2grp { > + fsl,pins = < > + MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1 > + MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1 > + >; > + }; > + > + pinctrl_i2c3: i2c3grp { > + fsl,pins = < > + MX6QDL_PAD_GPIO_3__I2C3_SCL 0x4001b8b1 > + MX6QDL_PAD_GPIO_6__I2C3_SDA 0x4001b8b1 > + >; > + }; > + > + pinctrl_pcie: pciegrp { > + fsl,pins = < > + /* PCIe Reset */ > + MX6QDL_PAD_GPIO_17__GPIO7_IO12 0x1b0b0 > + /* PCIe Wake */ > + MX6QDL_PAD_GPIO_5__GPIO1_IO05 0x1b0b0 > + >; > + }; > + > + pinctrl_pmic: pmicgrp { > + fsl,pins = < > + /* PMIC Interrupt */ > + MX6QDL_PAD_GPIO_18__GPIO7_IO13 0x1b0b0 > + >; > + }; > + > + pinctrl_pwm1: pwm1grp { > + fsl,pins = < > + MX6QDL_PAD_SD1_DAT3__PWM1_OUT 0x1b0b1 > + >; > + }; > + > + pinctrl_pwm2: pwm2grp { > + fsl,pins = < > + MX6QDL_PAD_GPIO_1__PWM2_OUT 0x1b0b1 > + >; > + }; > + > + pinctrl_rtc: rtcgrp { > + fsl,pins = < > + /* RTC_INT */ > + MX6QDL_PAD_KEY_COL2__GPIO4_IO10 0x1b0b0 > + >; > + }; > + > + pinctrl_uart3: uart3grp { > + fsl,pins = < > + MX6QDL_PAD_EIM_D25__UART3_RX_DATA 0x1b0b1 > + MX6QDL_PAD_EIM_D24__UART3_TX_DATA 0x1b0b1 > + MX6QDL_PAD_EIM_D23__UART3_CTS_B 0x1b0b1 > + MX6QDL_PAD_EIM_D31__UART3_RTS_B 0x1b0b1 > + >; > + }; > + > + pinctrl_uart4: uart4grp { > + fsl,pins = < > + MX6QDL_PAD_KEY_COL0__UART4_TX_DATA 0x1b0b1 > + MX6QDL_PAD_KEY_ROW0__UART4_RX_DATA 0x1b0b1 > + >; > + }; > + > + pinctrl_usbhub: usbhubgrp { > + fsl,pins = < > + /* HUB_RESET */ > + MX6QDL_PAD_GPIO_16__GPIO7_IO11 0x1b0b0 > + >; > + }; > + > + pinctrl_usbotg: usbotggrp { > + fsl,pins = < > + MX6QDL_PAD_ENET_RX_ER__USB_OTG_ID 0x17059 > + >; > + }; > + > + pinctrl_usdhc2: usdhc2grp { > + fsl,pins = < > + MX6QDL_PAD_SD2_CMD__SD2_CMD 0x17059 > + MX6QDL_PAD_SD2_CLK__SD2_CLK 0x10059 > + MX6QDL_PAD_SD2_DAT0__SD2_DATA0 0x17059 > + MX6QDL_PAD_SD2_DAT1__SD2_DATA1 0x17059 > + MX6QDL_PAD_SD2_DAT2__SD2_DATA2 0x17059 > + MX6QDL_PAD_SD2_DAT3__SD2_DATA3 0x17059 > + /* uSDHC2 CD */ > + MX6QDL_PAD_GPIO_4__GPIO1_IO04 0x1b0b0 > + >; > + }; > + > + pinctrl_usdhc3: usdhc3grp { > + fsl,pins = < > + MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059 > + MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10059 > + MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059 > + MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059 > + MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059 > + MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059 > + MX6QDL_PAD_SD3_DAT4__SD3_DATA4 0x17059 > + MX6QDL_PAD_SD3_DAT5__SD3_DATA5 0x17059 > + MX6QDL_PAD_SD3_DAT6__SD3_DATA6 0x17059 > + MX6QDL_PAD_SD3_DAT7__SD3_DATA7 0x17059 > + >; > + }; > + > + pinctrl_usdhc3_reset: usdhc3grp-reset { > + fsl,pins = < > + MX6QDL_PAD_SD3_RST__SD3_RESET 0x170F9 > + >; > + }; > + > + pinctrl_usdhc4: usdhc4grp { > + fsl,pins = < > + MX6QDL_PAD_SD4_CMD__SD4_CMD 0x17059 > + MX6QDL_PAD_SD4_CLK__SD4_CLK 0x17059 > + MX6QDL_PAD_SD4_DAT0__SD4_DATA0 0x17059 > + MX6QDL_PAD_SD4_DAT1__SD4_DATA1 0x17059 > + MX6QDL_PAD_SD4_DAT2__SD4_DATA2 0x17059 > + MX6QDL_PAD_SD4_DAT3__SD4_DATA3 0x17059 > + MX6QDL_PAD_SD4_DAT4__SD4_DATA4 0x17059 > + MX6QDL_PAD_SD4_DAT5__SD4_DATA5 0x17059 > + MX6QDL_PAD_SD4_DAT6__SD4_DATA6 0x17059 > + MX6QDL_PAD_SD4_DAT7__SD4_DATA7 0x17059 > + /* uSDHC4 CD */ > + MX6QDL_PAD_NANDF_CS0__GPIO6_IO11 0x1b0b0 > + /* uSDHC4 SDIO PWR */ > + MX6QDL_PAD_NANDF_CS1__GPIO6_IO14 0x1b0b0 > + /* uSDHC4 SDIO WP */ > + MX6QDL_PAD_NANDF_CS2__GPIO6_IO15 0x1b0b0 > + /* uSDHC4 SDIO LED */ > + MX6QDL_PAD_NANDF_CS3__GPIO6_IO16 0x1b0b0 > + >; > + }; > + > + pinctrl_wdog: wdoggrp { > + fsl,pins = < > + MX6QDL_PAD_GPIO_9__WDOG1_B 0x1b0b0 > + >; > + }; > +}; > diff --git a/arch/arm/dts/imx6q-bx50v3.dts b/arch/arm/dts/imx6q-bx50v3.dts > index deaec63509..a44d7004cb 100644 > --- a/arch/arm/dts/imx6q-bx50v3.dts > +++ b/arch/arm/dts/imx6q-bx50v3.dts > @@ -1,4 +1,4 @@ > -/* SPDX-License-Identifier: GPL-2.0+ OR X11 */ > +// SPDX-License-Identifier: GPL-2.0+ OR X11 > /* > * Copyright 2015 Timesys Corporation. > * Copyright 2018 General Electric Company > @@ -7,83 +7,13 @@ > > /dts-v1/; > > -#include "imx6q.dtsi" > -#include <dt-bindings/gpio/gpio.h> > +#include "imx6q-bx50v3.dtsi" > > / { > model = "General Electric Bx50v3"; > compatible = "ge,imx6q-bx50v3", "advantech,imx6q-ba16", "fsl,imx6q"; > -}; > - > -&iomuxc { > - pinctrl-names = "default"; > - > - pinctrl_ecspi1: ecspi1grp { > - fsl,pins = < > - MX6QDL_PAD_EIM_D17__ECSPI1_MISO 0x100b1 > - MX6QDL_PAD_EIM_D18__ECSPI1_MOSI 0x100b1 > - MX6QDL_PAD_EIM_D16__ECSPI1_SCLK 0x100b1 > - /* SPI1 CS */ > - MX6QDL_PAD_EIM_EB2__GPIO2_IO30 0x1b0b0 > - >; > - }; > - > - pinctrl_usdhc3: usdhc3grp { > - fsl,pins = < > - MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059 > - MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10059 > - MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059 > - MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059 > - MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059 > - MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059 > - MX6QDL_PAD_SD3_DAT4__SD3_DATA4 0x17059 > - MX6QDL_PAD_SD3_DAT5__SD3_DATA5 0x17059 > - MX6QDL_PAD_SD3_DAT6__SD3_DATA6 0x17059 > - MX6QDL_PAD_SD3_DAT7__SD3_DATA7 0x17059 > - >; > - }; > - > - pinctrl_usdhc3_reset: usdhc3grp-reset { > - fsl,pins = < > - MX6QDL_PAD_SD3_RST__SD3_RESET 0x170F9 > - >; > - }; > -}; > - > -&usdhc1 { > - status = "disabled"; > -}; > - > -&usdhc2 { > - status = "disabled"; > -}; > - > -/* eMMC */ > -&usdhc3 { > - pinctrl-names = "default"; > - pinctrl-0 = <&pinctrl_usdhc3 &pinctrl_usdhc3_reset>; > - bus-width = <8>; > - non-removable; > - keep-power-in-suspend; > - status = "okay"; > -}; > - > -&usdhc4 { > - status = "disabled"; > -}; > - > -/* SPI NOR */ > -&ecspi1 { > - cs-gpios = <&gpio2 30 GPIO_ACTIVE_LOW>; > - pinctrl-names = "default"; > - pinctrl-0 = <&pinctrl_ecspi1>; > - status = "okay"; > > - flash: n25q032 at 0 { > - compatible = "jedec,spi-nor"; > - #address-cells = <1>; > - #size-cells = <1>; > - spi-max-frequency = <20000000>; > - reg = <0>; > + chosen { > + stdout-path = &uart3; > }; > }; > diff --git a/arch/arm/dts/imx6q-bx50v3.dtsi b/arch/arm/dts/imx6q-bx50v3.dtsi > new file mode 100644 > index 0000000000..009f88e305 > --- /dev/null > +++ b/arch/arm/dts/imx6q-bx50v3.dtsi > @@ -0,0 +1,380 @@ > +// SPDX-License-Identifier: GPL-2.0+ OR X11 > +/* > + * Copyright 2015 Timesys Corporation. > + * Copyright 2015 General Electric Company > + * > + * This file is dual-licensed: you can use it either under the terms > + * of the GPL or the X11 license, at your option. Note that this dual > + * licensing only applies to this file, and not this project as a > + * whole. > + * > + * a) This file is free software; you can redistribute it and/or > + * modify it under the terms of the GNU General Public License > + * version 2 as published by the Free Software Foundation. > + * > + * This file is distributed in the hope that it will be useful, > + * but WITHOUT ANY WARRANTY; without even the implied warranty of > + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the > + * GNU General Public License for more details. > + * > + * Or, alternatively, > + * > + * b) Permission is hereby granted, free of charge, to any person > + * obtaining a copy of this software and associated documentation > + * files (the "Software"), to deal in the Software without > + * restriction, including without limitation the rights to use, > + * copy, modify, merge, publish, distribute, sublicense, and/or > + * sell copies of the Software, and to permit persons to whom the > + * Software is furnished to do so, subject to the following > + * conditions: > + * > + * The above copyright notice and this permission notice shall be > + * included in all copies or substantial portions of the Software. > + * > + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, > + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES > + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND > + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT > + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, > + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING > + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR > + * OTHER DEALINGS IN THE SOFTWARE. > + */ > + > +#include "imx6q-ba16.dtsi" > + > +/ { > + mclk: clock-mclk { > + compatible = "fixed-clock"; > + #clock-cells = <0>; > + clock-frequency = <22000000>; > + }; > + > + gpio-poweroff { > + compatible = "gpio-poweroff"; > + gpios = <&gpio4 11 GPIO_ACTIVE_LOW>; > + status = "okay"; > + }; > + > + reg_wl18xx_vmmc: regulator-wl18xx { > + compatible = "regulator-fixed"; > + regulator-name = "vwl1807"; > + regulator-min-microvolt = <3300000>; > + regulator-max-microvolt = <3300000>; > + gpio = <&pca9539 3 GPIO_ACTIVE_HIGH>; > + startup-delay-us = <70000>; > + enable-active-high; > + }; > + > + reg_wlan: regulator-wlan { > + compatible = "regulator-fixed"; > + regulator-name = "3P3V_wlan"; > + regulator-min-microvolt = <3300000>; > + regulator-max-microvolt = <3300000>; > + regulator-always-on; > + regulator-boot-on; > + gpio = <&gpio6 14 GPIO_ACTIVE_HIGH>; > + }; > + > + sound { > + compatible = "fsl,imx6q-ba16-sgtl5000", > + "fsl,imx-audio-sgtl5000"; > + model = "imx6q-ba16-sgtl5000"; > + ssi-controller = <&ssi1>; > + audio-codec = <&sgtl5000>; > + audio-routing = > + "MIC_IN", "Mic Jack", > + "Mic Jack", "Mic Bias", > + "LINE_IN", "Line In Jack", > + "Headphone Jack", "HP_OUT"; > + mux-int-port = <1>; > + mux-ext-port = <4>; > + }; > + > + aliases { > + mdio-gpio0 = &mdio0; > + }; > + > + mdio0: mdio-gpio { > + compatible = "virtual,mdio-gpio"; > + gpios = <&gpio2 5 GPIO_ACTIVE_HIGH>, /* mdc */ > + <&gpio2 7 GPIO_ACTIVE_HIGH>; /* mdio */ > + > + #address-cells = <1>; > + #size-cells = <0>; > + > + switch at 0 { > + compatible = "marvell,mv88e6085"; /* 88e6240*/ > + reg = <0>; > + > + switch_ports: ports { > + #address-cells = <1>; > + #size-cells = <0>; > + }; > + > + mdio { > + #address-cells = <1>; > + #size-cells = <0>; > + > + switchphy0: switchphy at 0 { > + reg = <0>; > + }; > + > + switchphy1: switchphy at 1 { > + reg = <1>; > + }; > + > + switchphy2: switchphy at 2 { > + reg = <2>; > + }; > + > + switchphy3: switchphy at 3 { > + reg = <3>; > + }; > + > + switchphy4: switchphy at 4 { > + reg = <4>; > + }; > + }; > + }; > + }; > +}; > + > +&ecspi5 { > + cs-gpios = <&gpio1 17 GPIO_ACTIVE_HIGH>; > + pinctrl-names = "default"; > + pinctrl-0 = <&pinctrl_ecspi5>; > + status = "okay"; > + > + m25_eeprom: m25p80 at 0 { > + compatible = "atmel,at25"; > + spi-max-frequency = <10000000>; > + size = <0x8000>; > + pagesize = <64>; > + reg = <0>; > + address-width = <16>; > + }; > +}; > + > +&i2c1 { > + pinctrl-names = "default", "gpio"; > + pinctrl-1 = <&pinctrl_i2c1_gpio>; > + sda-gpios = <&gpio5 26 GPIO_ACTIVE_HIGH>; > + scl-gpios = <&gpio5 27 GPIO_ACTIVE_HIGH>; > + > + pca9547: mux at 70 { > + compatible = "nxp,pca9547"; > + reg = <0x70>; > + #address-cells = <1>; > + #size-cells = <0>; > + > + mux1_i2c1: i2c at 0 { > + #address-cells = <1>; > + #size-cells = <0>; > + reg = <0x0>; > + > + ads7830: ads7830 at 48 { > + compatible = "ti,ads7830"; > + reg = <0x48>; > + }; > + > + mma8453: mma8453 at 1c { > + compatible = "fsl,mma8453"; > + reg = <0x1c>; > + }; > + }; > + > + mux1_i2c2: i2c at 1 { > + #address-cells = <1>; > + #size-cells = <0>; > + reg = <0x1>; > + > + eeprom: eeprom at 50 { > + compatible = "atmel,24c08"; > + reg = <0x50>; > + }; > + > + mpl3115: mpl3115 at 60 { > + compatible = "fsl,mpl3115"; > + reg = <0x60>; > + }; > + }; > + > + mux1_i2c3: i2c at 2 { > + #address-cells = <1>; > + #size-cells = <0>; > + reg = <0x2>; > + }; > + > + mux1_i2c4: i2c at 3 { > + #address-cells = <1>; > + #size-cells = <0>; > + reg = <0x3>; > + > + sgtl5000: codec at a { > + compatible = "fsl,sgtl5000"; > + reg = <0x0a>; > + clocks = <&mclk>; > + VDDA-supply = <®_1p8v>; > + VDDIO-supply = <®_3p3v>; > + }; > + }; > + > + mux1_i2c5: i2c at 4 { > + #address-cells = <1>; > + #size-cells = <0>; > + reg = <0x4>; > + > + pca9539: pca9539 at 74 { > + compatible = "nxp,pca9539"; > + reg = <0x74>; > + gpio-controller; > + #gpio-cells = <2>; > + interrupt-controller; > + interrupt-parent = <&gpio2>; > + interrupts = <3 IRQ_TYPE_LEVEL_LOW>; > + > + P12 { > + gpio-hog; > + gpios = <10 0>; > + output-low; > + line-name = "PCA9539-P12"; > + }; > + > + P13 { > + gpio-hog; > + gpios = <11 0>; > + output-low; > + line-name = "PCA9539-P13"; > + }; > + > + P14 { > + gpio-hog; > + gpios = <12 0>; > + output-low; > + line-name = "PCA9539-P14"; > + }; > + > + P15 { > + gpio-hog; > + gpios = <13 0>; > + output-low; > + line-name = "PCA9539-P15"; > + }; > + > + P16 { > + gpio-hog; > + gpios = <14 0>; > + output-low; > + line-name = "PCA9539-P16"; > + }; > + > + P17 { > + gpio-hog; > + gpios = <15 0>; > + output-low; > + line-name = "PCA9539-P17"; > + }; > + }; > + }; > + > + mux1_i2c6: i2c at 5 { > + #address-cells = <1>; > + #size-cells = <0>; > + reg = <0x5>; > + }; > + > + mux1_i2c7: i2c at 6 { > + #address-cells = <1>; > + #size-cells = <0>; > + reg = <0x6>; > + }; > + > + mux1_i2c8: i2c at 7 { > + #address-cells = <1>; > + #size-cells = <0>; > + reg = <0x7>; > + }; > + }; > +}; > + > +&i2c2 { > + pinctrl-names = "default", "gpio"; > + pinctrl-1 = <&pinctrl_i2c2_gpio>; > + sda-gpios = <&gpio4 13 GPIO_ACTIVE_HIGH>; > + scl-gpios = <&gpio4 12 GPIO_ACTIVE_HIGH>; > +}; > + > +&i2c3 { > + pinctrl-names = "default", "gpio"; > + pinctrl-1 = <&pinctrl_i2c3_gpio>; > + sda-gpios = <&gpio1 6 GPIO_ACTIVE_HIGH>; > + scl-gpios = <&gpio1 3 GPIO_ACTIVE_HIGH>; > +}; > + > +&iomuxc { > + pinctrl_i2c1_gpio: i2c1gpiogrp { > + fsl,pins = < > + MX6QDL_PAD_CSI0_DAT8__GPIO5_IO26 0x1b0b0 > + MX6QDL_PAD_CSI0_DAT9__GPIO5_IO27 0x1b0b0 > + >; > + }; > + > + pinctrl_i2c2_gpio: i2c2gpiogrp { > + fsl,pins = < > + MX6QDL_PAD_KEY_COL3__GPIO4_IO12 0x1b0b0 > + MX6QDL_PAD_KEY_ROW3__GPIO4_IO13 0x1b0b0 > + >; > + }; > + > + pinctrl_i2c3_gpio: i2c3gpiogrp { > + fsl,pins = < > + MX6QDL_PAD_GPIO_3__GPIO1_IO03 0x1b0b0 > + MX6QDL_PAD_GPIO_6__GPIO1_IO06 0x1b0b0 > + >; > + }; > +}; > + > +&pmu { > + secure-reg-access; > +}; > + > +&usdhc2 { > + status = "disabled"; > +}; > + > +&usdhc4 { > + pinctrl-names = "default"; > + pinctrl-0 = <&pinctrl_usdhc4>; > + bus-width = <4>; > + vmmc-supply = <®_wl18xx_vmmc>; > + no-1-8-v; > + non-removable; > + wakeup-source; > + keep-power-in-suspend; > + cap-power-off-card; > + max-frequency = <25000000>; > + #address-cells = <1>; > + #size-cells = <0>; > + status = "okay"; > + > + wlcore: wlcore at 2 { > + compatible = "ti,wl1837"; > + reg = <2>; > + interrupt-parent = <&gpio2>; > + interrupts = <6 IRQ_TYPE_LEVEL_HIGH>; > + tcxo-clock-frequency = <26000000>; > + }; > +}; > + > +&pcie { > + /* Synopsys, Inc. Device */ > + pci_root: root at 0,0 { > + compatible = "pci16c3,abcd"; > + reg = <0x00000000 0 0 0 0>; > + > + #address-cells = <3>; > + #size-cells = <2>; > + #interrupt-cells = <1>; > + }; > +}; > diff --git a/board/ge/bx50v3/bx50v3.c b/board/ge/bx50v3/bx50v3.c > index 917ecc4c18..530b106ba5 100644 > --- a/board/ge/bx50v3/bx50v3.c > +++ b/board/ge/bx50v3/bx50v3.c > @@ -31,12 +31,13 @@ > #include <pwm.h> > #include <version.h> > #include <stdlib.h> > +#include <dm/root.h> > #include "../common/ge_common.h" > #include "../common/vpd_reader.h" > #include "../../../drivers/net/e1000.h" > DECLARE_GLOBAL_DATA_PTR; > > -static int confidx = 3; /* Default to b850v3. */ > +static int confidx; /* Default to generic. */ > static struct vpd_cache vpd; > > #define NC_PAD_CTRL (PAD_CTL_PUS_100K_UP | \ > @@ -552,8 +553,16 @@ int board_init(void) > setup_i2c(2, CONFIG_SYS_I2C_SPEED, 0x7f, &i2c_pad_info3); > > if (!read_vpd(&vpd, vpd_callback)) { > + int ret, rescan; > + > vpd.is_read = true; > set_confidx(&vpd); > + > + ret = fdtdec_resetup(&rescan); > + if (!ret && rescan) { > + dm_uninit(); > + dm_init_and_scan(false); > + } > } > > gpio_request(SUS_S3_OUT, "sus_s3_out"); > @@ -728,3 +737,26 @@ U_BOOT_CMD( > "enable Bx50 backlight", > "" > ); > + > +int board_fit_config_name_match(const char *name) > +{ > + if (!vpd.is_read) > + return strcmp(name, "imx6q-bx50v3"); > + > + switch (vpd.product_id) { > + case VPD_PRODUCT_B450: > + return strcmp(name, "imx6q-b450v3"); > + case VPD_PRODUCT_B650: > + return strcmp(name, "imx6q-b650v3"); > + case VPD_PRODUCT_B850: > + return strcmp(name, "imx6q-b850v3"); > + default: > + return -1; > + } > +} > + > +int embedded_dtb_select(void) > +{ > + vpd.is_read = false; > + return fdtdec_setup(); > +} > diff --git a/configs/ge_bx50v3_defconfig b/configs/ge_bx50v3_defconfig > index 38f72bf8ef..94ad193393 100644 > --- a/configs/ge_bx50v3_defconfig > +++ b/configs/ge_bx50v3_defconfig > @@ -13,6 +13,8 @@ CONFIG_OF_BOARD_SETUP=y > CONFIG_BOOTDELAY=1 > CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE=y > CONFIG_SUPPORT_RAW_INITRD=y > +# CONFIG_DISPLAY_BOARDINFO is not set > +CONFIG_DISPLAY_BOARDINFO_LATE=y > CONFIG_BOUNCE_BUFFER=y > CONFIG_BOARD_EARLY_INIT_F=y > CONFIG_LAST_STAGE_INIT=y > @@ -33,6 +35,9 @@ CONFIG_CMD_FS_GENERIC=y > CONFIG_DOS_PARTITION=y > CONFIG_OF_CONTROL=y > CONFIG_DEFAULT_DEVICE_TREE="imx6q-bx50v3" > +CONFIG_OF_LIST="imx6q-bx50v3 imx6q-b850v3 imx6q-b650v3 imx6q-b450v3" > +CONFIG_DTB_RESELECT=y > +CONFIG_MULTI_DTB_FIT=y > CONFIG_ENV_IS_IN_SPI_FLASH=y > CONFIG_DM=y > CONFIG_BOOTCOUNT_LIMIT=y > -- ===================================================================== DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sbabic at denx.de ===================================================================== ^ permalink raw reply [flat|nested] 24+ messages in thread
* [U-Boot] [RESEND PATCH 01/10] board: ge: bx50v3: sync devicetrees from Linux 2019-11-12 19:15 ` [U-Boot] [RESEND PATCH 01/10] board: ge: bx50v3: sync devicetrees from Linux Robert Beckett 2019-11-12 19:15 ` [U-Boot] [RESEND PATCH 02/10] board: ge: ppd: sync device tree " Robert Beckett 2019-12-27 13:53 ` [U-Boot][RESEND PATCH 01/10] board: ge: bx50v3: sync devicetrees " Stefano Babic @ 2019-12-29 10:27 ` sbabic at denx.de 2 siblings, 0 replies; 24+ messages in thread From: sbabic at denx.de @ 2019-12-29 10:27 UTC (permalink / raw) To: u-boot > Copy device trees from linux, keeping them as separate files for > each board to ease future sync. > Update board code to use generic bx50v3 dt initially, then select > the specific dt based on board detection. > Signed-off-by: Robert Beckett <bob.beckett@collabora.com> Applied to u-boot-imx, -next, thanks ! Best regards, Stefano Babic -- ===================================================================== DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sbabic at denx.de ===================================================================== ^ permalink raw reply [flat|nested] 24+ messages in thread
end of thread, other threads:[~2019-12-29 10:28 UTC | newest] Thread overview: 24+ messages (download: mbox.gz / follow: Atom feed) -- links below jump to the message on this page -- 2019-11-12 19:15 [U-Boot] [RESEND PATCH 00/10] GE boards initial DM conversion Robert Beckett 2019-11-12 19:15 ` [U-Boot] [RESEND PATCH 01/10] board: ge: bx50v3: sync devicetrees from Linux Robert Beckett 2019-11-12 19:15 ` [U-Boot] [RESEND PATCH 02/10] board: ge: ppd: sync device tree " Robert Beckett 2019-11-12 19:15 ` [U-Boot] [RESEND PATCH 03/10] configs: bx50v3: Fix boot hang with video Robert Beckett 2019-11-12 19:15 ` [U-Boot] [RESEND PATCH 04/10] board: ge: bx50v3: Fix run-time warning Robert Beckett 2019-11-12 19:15 ` [U-Boot] [RESEND PATCH 05/10] board: ge: bx50v3: Fix message output to video console Robert Beckett 2019-11-12 19:15 ` [U-Boot] [RESEND PATCH 06/10] configs: ppd: DM for USB and regulators PPD Robert Beckett 2019-11-12 19:15 ` [U-Boot] [RESEND PATCH 07/10] board: ge: bx50v3: Enable DM for PCI and ethernet Robert Beckett 2019-11-12 19:15 ` [U-Boot] [RESEND PATCH 08/10] board: ge: pass rtc_status via device tree Robert Beckett 2019-11-12 19:15 ` [U-Boot] [RESEND PATCH 09/10] board: ge: bx50v3: use imx wdt Robert Beckett 2019-11-12 19:15 ` [U-Boot] [RESEND PATCH 10/10] board: ge: mx53ppd: " Robert Beckett 2019-12-27 16:41 ` [U-Boot][RESEND " Simon Glass 2019-12-29 10:24 ` [U-Boot] [RESEND " sbabic at denx.de 2019-12-29 10:28 ` [U-Boot] [RESEND PATCH 09/10] board: ge: bx50v3: " sbabic at denx.de 2019-12-27 16:41 ` [U-Boot][RESEND PATCH 08/10] board: ge: pass rtc_status via device tree Simon Glass 2019-12-29 10:28 ` [U-Boot] [RESEND " sbabic at denx.de 2019-12-29 10:26 ` [U-Boot] [RESEND PATCH 07/10] board: ge: bx50v3: Enable DM for PCI and ethernet sbabic at denx.de 2019-12-29 10:27 ` [U-Boot] [RESEND PATCH 06/10] configs: ppd: DM for USB and regulators PPD sbabic at denx.de 2019-12-29 10:24 ` [U-Boot] [RESEND PATCH 05/10] board: ge: bx50v3: Fix message output to video console sbabic at denx.de 2019-12-29 10:26 ` [U-Boot] [RESEND PATCH 04/10] board: ge: bx50v3: Fix run-time warning sbabic at denx.de 2019-12-29 10:27 ` [U-Boot] [RESEND PATCH 03/10] configs: bx50v3: Fix boot hang with video sbabic at denx.de 2019-12-29 10:27 ` [U-Boot] [RESEND PATCH 02/10] board: ge: ppd: sync device tree from Linux sbabic at denx.de 2019-12-27 13:53 ` [U-Boot][RESEND PATCH 01/10] board: ge: bx50v3: sync devicetrees " Stefano Babic 2019-12-29 10:27 ` [U-Boot] [RESEND " sbabic at denx.de
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