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* [igt-dev] [PATCH i-g-t 1/3] lib/i915/gem_mman: add mmap_offset support
@ 2019-12-05  7:57 Zbigniew Kempczyński
  2019-12-05  7:57 ` [igt-dev] [PATCH i-g-t 2/3] lib/igt_dummyload: Use mapping selection to allow run batch from lmem Zbigniew Kempczyński
                   ` (2 more replies)
  0 siblings, 3 replies; 5+ messages in thread
From: Zbigniew Kempczyński @ 2019-12-05  7:57 UTC (permalink / raw)
  To: igt-dev

From: Lukasz Kalamarz <lukasz.kalamarz@intel.com>

With introduction of LMEM concept new IOCTL call were implemented
- gem_mmap_offset. This patch add support in IGT for it.

Signed-off-by: Lukasz Kalamarz <lukasz.kalamarz@intel.com>
Signed-off-by: Antonio Argenziano <antonio.argenziano@intel.com>
Signed-off-by: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com>
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Vanshidhar Konda <vanshidhar.r.konda@intel.com>
---
 lib/i915/gem_mman.c | 307 ++++++++++++++++++++++++++++++++++++++------
 lib/i915/gem_mman.h |  22 +++-
 2 files changed, 290 insertions(+), 39 deletions(-)

diff --git a/lib/i915/gem_mman.c b/lib/i915/gem_mman.c
index 6256627b..a5412a6c 100644
--- a/lib/i915/gem_mman.c
+++ b/lib/i915/gem_mman.c
@@ -40,6 +40,31 @@
 #define VG(x) do {} while (0)
 #endif
 
+static int gem_mmap_gtt_version(int fd)
+{
+	struct drm_i915_getparam gp;
+	int gtt_version = -1;
+
+	memset(&gp, 0, sizeof(gp));
+	gp.param = I915_PARAM_MMAP_GTT_VERSION;
+	gp.value = &gtt_version;
+	ioctl(fd, DRM_IOCTL_I915_GETPARAM, &gp);
+
+	return gtt_version;
+}
+
+static bool gem_has_mmap_offset(int fd)
+{
+	int gtt_version = gem_mmap_gtt_version(fd);
+
+	return gtt_version >= 4;
+}
+
+void gem_require_mmap_offset(int i915)
+{
+	igt_require(gem_has_mmap_offset(i915));
+}
+
 /**
  * __gem_mmap__gtt:
  * @fd: open i915 drm file descriptor
@@ -101,46 +126,66 @@ int gem_munmap(void *ptr, uint64_t size)
 	return ret;
 }
 
-bool gem_mmap__has_wc(int fd)
+bool __gem_mmap__has_wc(int fd)
 {
-	static int has_wc = -1;
-
-	if (has_wc == -1) {
-		struct drm_i915_getparam gp;
-		int mmap_version = -1;
-		int gtt_version = -1;
-
-		has_wc = 0;
-
-		memset(&gp, 0, sizeof(gp));
-		gp.param = I915_PARAM_MMAP_GTT_VERSION;
-		gp.value = &gtt_version;
-		ioctl(fd, DRM_IOCTL_I915_GETPARAM, &gp);
-
-		memset(&gp, 0, sizeof(gp));
-		gp.param = I915_PARAM_MMAP_VERSION;
-		gp.value = &mmap_version;
-		ioctl(fd, DRM_IOCTL_I915_GETPARAM, &gp);
-
-		/* Do we have the new mmap_ioctl with DOMAIN_WC? */
-		if (mmap_version >= 1 && gtt_version >= 2) {
-			struct drm_i915_gem_mmap arg;
-
-			/* Does this device support wc-mmaps ? */
-			memset(&arg, 0, sizeof(arg));
-			arg.handle = gem_create(fd, 4096);
-			arg.offset = 0;
-			arg.size = 4096;
-			arg.flags = I915_MMAP_WC;
-			has_wc = igt_ioctl(fd, DRM_IOCTL_I915_GEM_MMAP, &arg) == 0;
-			gem_close(fd, arg.handle);
-		}
-		errno = 0;
+	int has_wc = 0;
+
+	struct drm_i915_getparam gp;
+	int mmap_version = -1;
+
+	memset(&gp, 0, sizeof(gp));
+	gp.param = I915_PARAM_MMAP_VERSION;
+	gp.value = &mmap_version;
+	ioctl(fd, DRM_IOCTL_I915_GETPARAM, &gp);
+
+	/* Do we have the mmap_ioctl with DOMAIN_WC? */
+	if (mmap_version >= 1 && gem_mmap_gtt_version(fd) >= 2) {
+		struct drm_i915_gem_mmap arg;
+
+		/* Does this device support wc-mmaps ? */
+		memset(&arg, 0, sizeof(arg));
+		arg.handle = gem_create(fd, 4096);
+		arg.offset = 0;
+		arg.size = 4096;
+		arg.flags = I915_MMAP_WC;
+		has_wc = igt_ioctl(fd, DRM_IOCTL_I915_GEM_MMAP, &arg) == 0;
+		gem_close(fd, arg.handle);
+
+		if (has_wc && from_user_pointer(arg.addr_ptr))
+			munmap(from_user_pointer(arg.addr_ptr), arg.size);
 	}
+	errno = 0;
+
+	return has_wc > 0;
+}
+
+bool __gem_mmap_offset__has_wc(int fd)
+{
+	int has_wc = 0;
+	struct drm_i915_gem_mmap_offset arg;
+
+	if (!gem_has_mmap_offset(fd))
+		return false;
+
+	/* Does this device support wc-mmaps ? */
+	memset(&arg, 0, sizeof(arg));
+	arg.handle = gem_create(fd, 4096);
+	arg.offset = 0;
+	arg.flags = I915_MMAP_OFFSET_WC;
+	has_wc = igt_ioctl(fd, DRM_IOCTL_I915_GEM_MMAP_OFFSET,
+			   &arg) == 0;
+	gem_close(fd, arg.handle);
+
+	errno = 0;
 
 	return has_wc > 0;
 }
 
+bool gem_mmap__has_wc(int fd)
+{
+	return __gem_mmap_offset__has_wc(fd) || __gem_mmap__has_wc(fd);
+}
+
 /**
  * __gem_mmap:
  * @fd: open i915 drm file descriptor
@@ -157,11 +202,13 @@ bool gem_mmap__has_wc(int fd)
  *
  * Returns: A pointer to the created memory mapping, NULL on failure.
  */
-static void
-*__gem_mmap(int fd, uint32_t handle, uint64_t offset, uint64_t size, unsigned int prot, uint64_t flags)
+void *__gem_mmap(int fd, uint32_t handle, uint64_t offset, uint64_t size,
+		 unsigned int prot, uint64_t flags)
 {
 	struct drm_i915_gem_mmap arg;
 
+	igt_assert(offset == 0);
+
 	memset(&arg, 0, sizeof(arg));
 	arg.handle = handle;
 	arg.offset = offset;
@@ -177,6 +224,50 @@ static void
 	return from_user_pointer(arg.addr_ptr);
 }
 
+/**
+ * __gem_mmap_offset:
+ * @fd: open i915 drm file descriptor
+ * @handle: gem buffer object handle
+ * @offset: offset in the gem buffer of the mmap arena
+ * @size: size of the mmap arena
+ * @prot: memory protection bits as used by mmap()
+ * @flags: flags used to determine caching
+ *
+ * Mmap the gem buffer memory on offset returned in GEM_MMAP_OFFSET ioctl.
+ * Offset argument passed in function call must be 0. In the future
+ * when driver will allow slice mapping of buffer object this restriction
+ * will be removed.
+ *
+ * Returns: A pointer to the created memory mapping, NULL on failure.
+ */
+void *__gem_mmap_offset(int fd, uint32_t handle, uint64_t offset, uint64_t size,
+			unsigned int prot, uint64_t flags)
+{
+	struct drm_i915_gem_mmap_offset arg;
+	void *ptr;
+
+	if (!gem_has_mmap_offset(fd))
+		return NULL;
+
+	igt_assert(offset == 0);
+
+	memset(&arg, 0, sizeof(arg));
+	arg.handle = handle;
+	arg.flags = flags;
+
+	if (igt_ioctl(fd, DRM_IOCTL_I915_GEM_MMAP_OFFSET, &arg))
+		return NULL;
+
+	ptr = mmap64(0, size, prot, MAP_SHARED, fd, arg.offset + offset);
+
+	if (ptr == MAP_FAILED)
+		ptr = NULL;
+	else
+		errno = 0;
+
+	return ptr;
+}
+
 /**
  * __gem_mmap__wc:
  * @fd: open i915 drm file descriptor
@@ -185,7 +276,7 @@ static void
  * @size: size of the mmap arena
  * @prot: memory protection bits as used by mmap()
  *
- * This functions wraps up procedure to establish a memory mapping through
+ * This function wraps up procedure to establish a memory mapping through
  * direct cpu access, bypassing the gpu and cpu caches completely and also
  * bypassing the GTT system agent (i.e. there is no automatic tiling of
  * the mmapping through the fence registers).
@@ -205,17 +296,114 @@ void *__gem_mmap__wc(int fd, uint32_t handle, uint64_t offset, uint64_t size, un
  * @size: size of the mmap arena
  * @prot: memory protection bits as used by mmap()
  *
- * Like __gem_mmap__wc() except we assert on failure.
+ * Try to __gem_mmap__wc(). Assert on failure.
  *
  * Returns: A pointer to the created memory mapping
  */
 void *gem_mmap__wc(int fd, uint32_t handle, uint64_t offset, uint64_t size, unsigned prot)
 {
 	void *ptr = __gem_mmap__wc(fd, handle, offset, size, prot);
+
 	igt_assert(ptr);
 	return ptr;
 }
 
+/**
+ * __gem_mmap_offset__wc:
+ * @fd: open i915 drm file descriptor
+ * @handle: gem buffer object handle
+ * @offset: offset in the gem buffer of the mmap arena
+ * @size: size of the mmap arena
+ * @prot: memory protection bits as used by mmap()
+ *
+ * This function wraps up procedure to establish a memory mapping through
+ * direct cpu access, bypassing the gpu and cpu caches completely and also
+ * bypassing the GTT system agent (i.e. there is no automatic tiling of
+ * the mmapping through the fence registers).
+ *
+ * Returns: A pointer to the created memory mapping, NULL on failure.
+ */
+void *__gem_mmap_offset__wc(int fd, uint32_t handle, uint64_t offset,
+			    uint64_t size, unsigned prot)
+{
+	return __gem_mmap_offset(fd, handle, offset, size, prot,
+				 I915_MMAP_OFFSET_WC);
+}
+
+/**
+ * gem_mmap_offset__wc:
+ * @fd: open i915 drm file descriptor
+ * @handle: gem buffer object handle
+ * @offset: offset in the gem buffer of the mmap arena
+ * @size: size of the mmap arena
+ * @prot: memory protection bits as used by mmap()
+ *
+ * Try to __gem_mmap_offset__wc(). Assert on failure.
+ *
+ * Returns: A pointer to the created memory mapping
+ */
+void *gem_mmap_offset__wc(int fd, uint32_t handle, uint64_t offset,
+			  uint64_t size, unsigned prot)
+{
+	void *ptr = __gem_mmap_offset__wc(fd, handle, offset, size, prot);
+
+	igt_assert(ptr);
+	return ptr;
+}
+
+/**
+ * __gem_mmap__device_coherent:
+ * @fd: open i915 drm file descriptor
+ * @handle: gem buffer object handle
+ * @offset: offset in the gem buffer of the mmap arena
+ * @size: size of the mmap arena
+ * @prot: memory protection bits as used by mmap()
+ *
+ * Returns: A pointer to a block of linear device memory mapped into the
+ * process with WC semantics. When no WC is available try to mmap using GGTT.
+ */
+void *__gem_mmap__device_coherent(int fd, uint32_t handle, uint64_t offset,
+				  uint64_t size, unsigned prot)
+{
+	void *ptr = __gem_mmap_offset(fd, handle, offset, size, prot,
+				      I915_MMAP_OFFSET_WC);
+	if (!ptr)
+		ptr = __gem_mmap__wc(fd, handle, offset, size, prot);
+
+	if (!ptr)
+		ptr = __gem_mmap__gtt(fd, handle, size, prot);
+
+	return ptr;
+}
+
+/**
+ * gem_mmap__device_coherent:
+ * @fd: open i915 drm file descriptor
+ * @handle: gem buffer object handle
+ * @offset: offset in the gem buffer of the mmap arena
+ * @size: size of the mmap arena
+ * @prot: memory protection bits as used by mmap()
+ *
+ * Call __gem_mmap__device__coherent(), asserts on fail.
+ * Offset argument passed in function call must be 0. In the future
+ * when driver will allow slice mapping of buffer object this restriction
+ * will be removed.
+ *
+ * Returns: A pointer to the created memory mapping.
+ */
+void *gem_mmap__device_coherent(int fd, uint32_t handle, uint64_t offset,
+				uint64_t size, unsigned prot)
+{
+	void *ptr;
+
+	igt_assert(offset == 0);
+
+	ptr = __gem_mmap__device_coherent(fd, handle, offset, size, prot);
+	igt_assert(ptr);
+
+	return ptr;
+}
+
 /**
  * __gem_mmap__cpu:
  * @fd: open i915 drm file descriptor
@@ -249,6 +437,49 @@ void *__gem_mmap__cpu(int fd, uint32_t handle, uint64_t offset, uint64_t size, u
 void *gem_mmap__cpu(int fd, uint32_t handle, uint64_t offset, uint64_t size, unsigned prot)
 {
 	void *ptr = __gem_mmap__cpu(fd, handle, offset, size, prot);
+
+	igt_assert(ptr);
+	return ptr;
+}
+
+/**
+ * __gem_mmap_offset__cpu:
+ * @fd: open i915 drm file descriptor
+ * @handle: gem buffer object handle
+ * @offset: offset in the gem buffer of the mmap arena
+ * @size: size of the mmap arena
+ * @prot: memory protection bits as used by mmap()
+ *
+ * This function wraps up procedure to establish a memory mapping through
+ * direct cpu access.
+ *
+ * Returns: A pointer to the created memory mapping, NULL on failure.
+ */
+void *__gem_mmap_offset__cpu(int fd, uint32_t handle, uint64_t offset,
+			     uint64_t size, unsigned prot)
+{
+	return __gem_mmap_offset(fd, handle, offset, size, prot,
+				 I915_MMAP_OFFSET_WB);
+}
+
+/**
+ * gem_mmap_offset__cpu:
+ * @fd: open i915 drm file descriptor
+ * @handle: gem buffer object handle
+ * @offset: offset in the gem buffer of the mmap arena
+ * @size: size of the mmap arena
+ * @prot: memory protection bits as used by mmap()
+ *
+ * Like __gem_mmap__cpu() except we assert on failure.
+ *
+ * Returns: A pointer to the created memory mapping
+ */
+void *gem_mmap_offset__cpu(int fd, uint32_t handle, uint64_t offset,
+			   uint64_t size, unsigned prot)
+{
+	void *ptr = __gem_mmap_offset(fd, handle, offset, size, prot,
+				      I915_MMAP_OFFSET_WB);
+
 	igt_assert(ptr);
 	return ptr;
 }
diff --git a/lib/i915/gem_mman.h b/lib/i915/gem_mman.h
index 096ff592..fb63ec8d 100644
--- a/lib/i915/gem_mman.h
+++ b/lib/i915/gem_mman.h
@@ -25,12 +25,21 @@
 #ifndef GEM_MMAN_H
 #define GEM_MMAN_H
 
+#include <stdint.h>
+
 void *gem_mmap__gtt(int fd, uint32_t handle, uint64_t size, unsigned prot);
 void *gem_mmap__cpu(int fd, uint32_t handle, uint64_t offset, uint64_t size, unsigned prot);
+void *gem_mmap_offset__cpu(int fd, uint32_t handle, uint64_t offset,
+			   uint64_t size, unsigned prot);
 
+bool __gem_mmap__has_wc(int fd);
+bool __gem_mmap_offset__has_wc(int fd);
 bool gem_mmap__has_wc(int fd);
 void *gem_mmap__wc(int fd, uint32_t handle, uint64_t offset, uint64_t size, unsigned prot);
-
+void *gem_mmap_offset__wc(int fd, uint32_t handle, uint64_t offset,
+			  uint64_t size, unsigned prot);
+void *gem_mmap__device_coherent(int fd, uint32_t handle, uint64_t offset,
+				uint64_t size, unsigned prot);
 #ifndef I915_GEM_DOMAIN_WC
 #define I915_GEM_DOMAIN_WC 0x80
 #endif
@@ -38,9 +47,19 @@ void *gem_mmap__wc(int fd, uint32_t handle, uint64_t offset, uint64_t size, unsi
 bool gem_has_mappable_ggtt(int i915);
 void gem_require_mappable_ggtt(int i915);
 
+void *__gem_mmap(int fd, uint32_t handle, uint64_t offset, uint64_t size,
+		 unsigned int prot, uint64_t flags);
+void *__gem_mmap_offset(int fd, uint32_t handle, uint64_t offset, uint64_t size,
+			unsigned int prot, uint64_t flags);
 void *__gem_mmap__gtt(int fd, uint32_t handle, uint64_t size, unsigned prot);
 void *__gem_mmap__cpu(int fd, uint32_t handle, uint64_t offset, uint64_t size, unsigned prot);
+void *__gem_mmap_offset__cpu(int fd, uint32_t handle, uint64_t offset,
+			     uint64_t size, unsigned prot);
 void *__gem_mmap__wc(int fd, uint32_t handle, uint64_t offset, uint64_t size, unsigned prot);
+void *__gem_mmap_offset__wc(int fd, uint32_t handle, uint64_t offset,
+			    uint64_t size, unsigned prot);
+void *__gem_mmap__device_coherent(int fd, uint32_t handle, uint64_t offset,
+				  uint64_t size, unsigned prot);
 
 int gem_munmap(void *ptr, uint64_t size);
 
@@ -53,6 +72,7 @@ int gem_munmap(void *ptr, uint64_t size);
  * through igt_require() if not.
  */
 #define gem_require_mmap_wc(fd) igt_require(gem_mmap__has_wc(fd))
+void gem_require_mmap_offset(int i915);
 
 #endif /* GEM_MMAN_H */
 
-- 
2.23.0

_______________________________________________
igt-dev mailing list
igt-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/igt-dev

^ permalink raw reply related	[flat|nested] 5+ messages in thread

* [igt-dev] [PATCH i-g-t 2/3] lib/igt_dummyload: Use mapping selection to allow run batch from lmem
  2019-12-05  7:57 [igt-dev] [PATCH i-g-t 1/3] lib/i915/gem_mman: add mmap_offset support Zbigniew Kempczyński
@ 2019-12-05  7:57 ` Zbigniew Kempczyński
  2019-12-05  7:58 ` [igt-dev] [PATCH i-g-t 3/3] tests/i915/gem_mmap_offset: remove local mmap calls Zbigniew Kempczyński
  2019-12-05  8:55 ` [igt-dev] ✗ Fi.CI.BAT: failure for series starting with [i-g-t,1/3] lib/i915/gem_mman: add mmap_offset support Patchwork
  2 siblings, 0 replies; 5+ messages in thread
From: Zbigniew Kempczyński @ 2019-12-05  7:57 UTC (permalink / raw)
  To: igt-dev

For batches which need to be run from device memory there's a need to
use mmap offset interface to map the buffer.

Signed-off-by: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com>
Cc: Chris Wilson <chris@chris-wilson.co.uk>
---
 lib/igt_dummyload.c | 15 ++++++---------
 1 file changed, 6 insertions(+), 9 deletions(-)

diff --git a/lib/igt_dummyload.c b/lib/igt_dummyload.c
index 32d4d8d3..b7f4caca 100644
--- a/lib/igt_dummyload.c
+++ b/lib/igt_dummyload.c
@@ -107,12 +107,8 @@ emit_recursive_batch(igt_spin_t *spin,
 	memset(relocs, 0, sizeof(relocs));
 
 	obj[BATCH].handle = gem_create(fd, BATCH_SIZE);
-	batch = __gem_mmap__wc(fd, obj[BATCH].handle,
-			       0, BATCH_SIZE, PROT_WRITE);
-	if (!batch)
-		batch = gem_mmap__gtt(fd, obj[BATCH].handle,
-				      BATCH_SIZE, PROT_WRITE);
-
+	batch = gem_mmap__device_coherent(fd, obj[BATCH].handle,
+					  0, BATCH_SIZE, PROT_WRITE);
 	gem_set_domain(fd, obj[BATCH].handle,
 		       I915_GEM_DOMAIN_GTT, I915_GEM_DOMAIN_GTT);
 	execbuf->buffer_count++;
@@ -152,9 +148,10 @@ emit_recursive_batch(igt_spin_t *spin,
 						   0, 4096,
 						   PROT_READ | PROT_WRITE);
 		else
-			spin->poll = gem_mmap__wc(fd, spin->poll_handle,
-						  0, 4096,
-						  PROT_READ | PROT_WRITE);
+			spin->poll = gem_mmap__device_coherent(fd,
+							       spin->poll_handle,
+							       0, 4096,
+							       PROT_READ | PROT_WRITE);
 
 		igt_assert_eq(spin->poll[SPIN_POLL_START_IDX], 0);
 
-- 
2.23.0

_______________________________________________
igt-dev mailing list
igt-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/igt-dev

^ permalink raw reply related	[flat|nested] 5+ messages in thread

* [igt-dev] [PATCH i-g-t 3/3] tests/i915/gem_mmap_offset: remove local mmap calls
  2019-12-05  7:57 [igt-dev] [PATCH i-g-t 1/3] lib/i915/gem_mman: add mmap_offset support Zbigniew Kempczyński
  2019-12-05  7:57 ` [igt-dev] [PATCH i-g-t 2/3] lib/igt_dummyload: Use mapping selection to allow run batch from lmem Zbigniew Kempczyński
@ 2019-12-05  7:58 ` Zbigniew Kempczyński
  2019-12-05 12:16   ` Chris Wilson
  2019-12-05  8:55 ` [igt-dev] ✗ Fi.CI.BAT: failure for series starting with [i-g-t,1/3] lib/i915/gem_mman: add mmap_offset support Patchwork
  2 siblings, 1 reply; 5+ messages in thread
From: Zbigniew Kempczyński @ 2019-12-05  7:58 UTC (permalink / raw)
  To: igt-dev

From: Lukasz Kalamarz <lukasz.kalamarz@intel.com>

Use gem_mman functions instead local versions.
Limit available memory for 'clear' test to run it on lmem correctly.

Signed-off-by: Lukasz Kalamarz <lukasz.kalamarz@intel.com>
Signed-off-by: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com>
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Vanshidhar Konda <vanshidhar.r.konda@intel.com>
---
 tests/i915/gem_mmap_offset.c | 131 ++++++++++++++++++-----------------
 1 file changed, 68 insertions(+), 63 deletions(-)

diff --git a/tests/i915/gem_mmap_offset.c b/tests/i915/gem_mmap_offset.c
index 95e1e3e6..cd49e7d3 100644
--- a/tests/i915/gem_mmap_offset.c
+++ b/tests/i915/gem_mmap_offset.c
@@ -31,7 +31,7 @@
 #include "igt.h"
 #include "igt_x86.h"
 
-IGT_TEST_DESCRIPTION("Basic MMAP_OFFSET IOCTL tests for mem regions\n");
+IGT_TEST_DESCRIPTION("Basic MMAP_OFFSET IOCTL tests\n");
 
 static const struct mmap_offset {
 	const char *name;
@@ -63,28 +63,6 @@ static int mmap_offset_ioctl(int i915, struct drm_i915_gem_mmap_offset *arg)
 	return err;
 }
 
-static void *
-__mmap_offset(int i915, uint32_t handle, uint64_t offset, uint64_t size,
-	      unsigned int prot, uint64_t flags)
-{
-	struct drm_i915_gem_mmap_offset arg = {
-		.handle = handle,
-		.flags = flags,
-	};
-	void *ptr;
-
-	if (mmap_offset_ioctl(i915, &arg))
-		return NULL;
-
-	ptr = mmap64(0, size, prot, MAP_SHARED, i915, arg.offset + offset);
-	if (ptr == MAP_FAILED)
-		ptr = NULL;
-	else
-		errno = 0;
-
-	return ptr;
-}
-
 static void bad_object(int i915)
 {
 	uint32_t real_handle;
@@ -115,12 +93,19 @@ static void bad_object(int i915)
 
 static void bad_flags(int i915)
 {
+	uint64_t flags = I915_MMAP_OFFSET_UC;
 	struct drm_i915_gem_mmap_offset arg = {
 		.handle = gem_create(i915, 4096),
 		.flags = -1ull,
 	};
 
-	igt_assert_eq(mmap_offset_ioctl(i915, &arg), -EINVAL);
+	while (flags) {
+		igt_debug("Testing flags: %llx\n", arg.flags);
+		igt_assert_eq(mmap_offset_ioctl(i915, &arg), -EINVAL);
+		flags <<= 1;
+		arg.flags = flags;
+	}
+
 	gem_close(i915, arg.handle);
 }
 
@@ -147,24 +132,22 @@ static void basic_uaf(int i915)
 
 	for_each_mmap_offset_type(t) {
 		uint32_t handle = gem_create(i915, obj_size);
-		uint8_t *expected, *buf, *addr;
+		uint8_t *buf, *addr;
 
-		addr = __mmap_offset(i915, handle, 0, obj_size,
-				     PROT_READ | PROT_WRITE,
-				     t->type);
+		addr = __gem_mmap_offset(i915, handle, 0, obj_size,
+					 PROT_READ | PROT_WRITE,
+					 t->type);
 		if (!addr) {
 			gem_close(i915, handle);
 			continue;
 		}
 
-		expected = calloc(obj_size, sizeof(*expected));
+		buf = calloc(obj_size, sizeof(*buf));
 		gem_set_domain(i915, handle, t->domain, 0);
-		igt_assert_f(memcmp(addr, expected, obj_size) == 0,
+		igt_assert_f(memcmp(addr, buf, obj_size) == 0,
 			     "mmap(%s) not clear on gem_create()\n",
 			     t->name);
-		free(expected);
 
-		buf = calloc(obj_size, sizeof(*buf));
 		memset(buf + 1024, 0x01, 1024);
 		gem_write(i915, handle, 0, buf, obj_size);
 		gem_set_domain(i915, handle, t->domain, 0);
@@ -184,15 +167,16 @@ static void basic_uaf(int i915)
 		igt_assert_f(memcmp(buf, addr, obj_size) == 0,
 			     "mmap(%s) not resident after gem_close()\n",
 			     t->name);
-		free(buf);
 
-		igt_debug("Testing unmapping\n");
+		free(buf);
 		munmap(addr, obj_size);
 	}
 }
 
 static void isolation(int i915)
 {
+	int maps_supported = 0;
+
 	for_each_mmap_offset_type(t) {
 		struct drm_i915_gem_mmap_offset mmap_arg = {
 			.flags = t->type
@@ -218,10 +202,10 @@ static void isolation(int i915)
 		igt_assert_eq(mmap_offset_ioctl(B, &mmap_arg), 0);
 		offset_b = mmap_arg.offset;
 
-		igt_info("A[%s]: {fd:%d, handle:%d, offset:%"PRIx64"}\n",
-			 t->name, A, a, offset_a);
-		igt_info("B[%s]: {fd:%d, handle:%d, offset:%"PRIx64"}\n",
-			 t->name, B, b, offset_b);
+		igt_debug("A[%s]: {fd:%d, handle:%d, offset:%"PRIx64"}\n",
+			  t->name, A, a, offset_a);
+		igt_debug("B[%s]: {fd:%d, handle:%d, offset:%"PRIx64"}\n",
+			  t->name, B, b, offset_b);
 
 		errno = 0;
 		ptr = mmap64(0, 4096, PROT_READ, MAP_SHARED, i915, offset_a);
@@ -253,7 +237,11 @@ static void isolation(int i915)
 
 		ptr = mmap64(0, 4096, PROT_READ, MAP_SHARED, A, offset_a);
 		igt_assert(ptr == MAP_FAILED);
+
+		maps_supported++;
 	}
+
+	igt_assert_f(maps_supported, "No mmap offset type found!\n");
 }
 
 static void pf_nonblock(int i915)
@@ -263,9 +251,9 @@ static void pf_nonblock(int i915)
 	for_each_mmap_offset_type(t) {
 		uint32_t *ptr;
 
-		ptr = __mmap_offset(i915, spin->handle, 0, 4096,
-				    PROT_READ | PROT_WRITE,
-				    t->type);
+		ptr = __gem_mmap_offset(i915, spin->handle, 0, 4096,
+					PROT_READ | PROT_WRITE,
+					t->type);
 		if (!ptr)
 			continue;
 
@@ -385,10 +373,13 @@ static void *thread_clear(void *data)
 		npages = get_npages(&arg->max, npages);
 		create.size = npages << 12;
 
+		igt_debug("pages: %lu, size: %llu\n", npages, create.size);
 		create_ioctl(i915, &create);
-		ptr = __mmap_offset(i915, create.handle, 0, create.size,
-				    PROT_READ | PROT_WRITE,
-				    t->type);
+		igt_assert(create.handle);
+		ptr = __gem_mmap_offset(i915, create.handle, 0, create.size,
+					PROT_READ | PROT_WRITE,
+					t->type);
+
 		/* No set-domains as we are being as naughty as possible */
 		for (uint64_t page = 0; ptr && page < npages; page++) {
 			uint64_t x[8] = {
@@ -418,12 +409,43 @@ static void *thread_clear(void *data)
 	return (void *)(uintptr_t)checked;
 }
 
+/*
+ * Depending on allocation region we have different memory constraints.
+ * Try to find reasonable limit to cover the test regardless the region.
+ */
+static uint64_t __get_memory_size_in_mb(int i915)
+{
+	uint64_t aperture_size = gem_available_aperture_size(i915);
+	uint32_t size = 1024*1024;
+	uint32_t *handles;
+	uint32_t num_handles;
+	int i = 0;
+
+	igt_debug("Aperture size: %zd\n", gem_available_aperture_size(i915));
+
+	num_handles = aperture_size / size;
+	handles = malloc(num_handles * sizeof(uint32_t));
+
+	for (i = 0; i < num_handles; i++) {
+		if (__gem_create(i915, size, &handles[i]))
+			break;
+	}
+	igt_debug("Created %d/%u handles of size %u\n", i, num_handles, size);
+	num_handles = i;
+
+	for (i = 0; i < num_handles; i++)
+		gem_close(i915, handles[i]);
+	free(handles);
+
+	return num_handles;
+}
+
 static void always_clear(int i915, int timeout)
 {
 	struct thread_clear arg = {
 		.i915 = i915,
 		.timeout = timeout,
-		.max = intel_get_avail_ram_mb() << (20 - 12), /* in pages */
+		.max = __get_memory_size_in_mb(i915) / 2 << 8, /* in pages */
 	};
 	const int ncpus = sysconf(_SC_NPROCESSORS_ONLN);
 	unsigned long checked;
@@ -441,30 +463,13 @@ static void always_clear(int i915, int timeout)
 	igt_info("Checked %'lu page allocations\n", checked);
 }
 
-static int mmap_gtt_version(int i915)
-{
-	int gtt_version = -1;
-	struct drm_i915_getparam gp = {
-		.param = I915_PARAM_MMAP_GTT_VERSION,
-		.value = &gtt_version,
-	};
-	ioctl(i915, DRM_IOCTL_I915_GETPARAM, &gp);
-
-	return gtt_version;
-}
-
-static bool has_mmap_offset(int i915)
-{
-	return mmap_gtt_version(i915) >= 4;
-}
-
 igt_main
 {
 	int i915;
 
 	igt_fixture {
 		i915 = drm_open_driver(DRIVER_INTEL);
-		igt_require(has_mmap_offset(i915));
+		gem_require_mmap_offset(i915);
 	}
 
 	igt_describe("Verify mapping to invalid gem objects won't be created");
-- 
2.23.0

_______________________________________________
igt-dev mailing list
igt-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/igt-dev

^ permalink raw reply related	[flat|nested] 5+ messages in thread

* [igt-dev] ✗ Fi.CI.BAT: failure for series starting with [i-g-t,1/3] lib/i915/gem_mman: add mmap_offset support
  2019-12-05  7:57 [igt-dev] [PATCH i-g-t 1/3] lib/i915/gem_mman: add mmap_offset support Zbigniew Kempczyński
  2019-12-05  7:57 ` [igt-dev] [PATCH i-g-t 2/3] lib/igt_dummyload: Use mapping selection to allow run batch from lmem Zbigniew Kempczyński
  2019-12-05  7:58 ` [igt-dev] [PATCH i-g-t 3/3] tests/i915/gem_mmap_offset: remove local mmap calls Zbigniew Kempczyński
@ 2019-12-05  8:55 ` Patchwork
  2 siblings, 0 replies; 5+ messages in thread
From: Patchwork @ 2019-12-05  8:55 UTC (permalink / raw)
  To: Zbigniew Kempczyński; +Cc: igt-dev

== Series Details ==

Series: series starting with [i-g-t,1/3] lib/i915/gem_mman: add mmap_offset support
URL   : https://patchwork.freedesktop.org/series/70476/
State : failure

== Summary ==

CI Bug Log - changes from CI_DRM_7487 -> IGTPW_3817
====================================================

Summary
-------

  **FAILURE**

  Serious unknown changes coming with IGTPW_3817 absolutely need to be
  verified manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in IGTPW_3817, please notify your bug team to allow them
  to document this new failure mode, which will reduce false positives in CI.

  External URL: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3817/index.html

Possible new issues
-------------------

  Here are the unknown changes that may have been introduced in IGTPW_3817:

### IGT changes ###

#### Possible regressions ####

  * igt@gem_busy@busy-all:
    - fi-glk-dsi:         [PASS][1] -> [FAIL][2] +1 similar issue
   [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7487/fi-glk-dsi/igt@gem_busy@busy-all.html
   [2]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3817/fi-glk-dsi/igt@gem_busy@busy-all.html
    - fi-bsw-n3050:       [PASS][3] -> [FAIL][4] +2 similar issues
   [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7487/fi-bsw-n3050/igt@gem_busy@busy-all.html
   [4]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3817/fi-bsw-n3050/igt@gem_busy@busy-all.html

  * igt@gem_wait@basic-await-all:
    - fi-byt-n2820:       [PASS][5] -> [FAIL][6] +3 similar issues
   [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7487/fi-byt-n2820/igt@gem_wait@basic-await-all.html
   [6]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3817/fi-byt-n2820/igt@gem_wait@basic-await-all.html
    - fi-elk-e7500:       [PASS][7] -> [FAIL][8] +3 similar issues
   [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7487/fi-elk-e7500/igt@gem_wait@basic-await-all.html
   [8]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3817/fi-elk-e7500/igt@gem_wait@basic-await-all.html

  * igt@gem_wait@basic-busy-all:
    - fi-bsw-kefka:       [PASS][9] -> [FAIL][10] +2 similar issues
   [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7487/fi-bsw-kefka/igt@gem_wait@basic-busy-all.html
   [10]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3817/fi-bsw-kefka/igt@gem_wait@basic-busy-all.html
    - fi-blb-e6850:       [PASS][11] -> [FAIL][12] +6 similar issues
   [11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7487/fi-blb-e6850/igt@gem_wait@basic-busy-all.html
   [12]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3817/fi-blb-e6850/igt@gem_wait@basic-busy-all.html
    - fi-bsw-nick:        [PASS][13] -> [FAIL][14]
   [13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7487/fi-bsw-nick/igt@gem_wait@basic-busy-all.html
   [14]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3817/fi-bsw-nick/igt@gem_wait@basic-busy-all.html
    - fi-bxt-dsi:         [PASS][15] -> [FAIL][16] +3 similar issues
   [15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7487/fi-bxt-dsi/igt@gem_wait@basic-busy-all.html
   [16]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3817/fi-bxt-dsi/igt@gem_wait@basic-busy-all.html

  * igt@gem_wait@basic-wait-all:
    - fi-ilk-650:         [PASS][17] -> [FAIL][18] +6 similar issues
   [17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7487/fi-ilk-650/igt@gem_wait@basic-wait-all.html
   [18]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3817/fi-ilk-650/igt@gem_wait@basic-wait-all.html
    - fi-gdg-551:         [PASS][19] -> [FAIL][20] +2 similar issues
   [19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7487/fi-gdg-551/igt@gem_wait@basic-wait-all.html
   [20]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3817/fi-gdg-551/igt@gem_wait@basic-wait-all.html

  * igt@kms_cursor_legacy@basic-busy-flip-before-cursor-atomic:
    - fi-byt-j1900:       [PASS][21] -> [FAIL][22] +3 similar issues
   [21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7487/fi-byt-j1900/igt@kms_cursor_legacy@basic-busy-flip-before-cursor-atomic.html
   [22]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3817/fi-byt-j1900/igt@kms_cursor_legacy@basic-busy-flip-before-cursor-atomic.html

  * igt@kms_cursor_legacy@basic-busy-flip-before-cursor-legacy:
    - fi-pnv-d510:        [PASS][23] -> [FAIL][24]
   [23]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7487/fi-pnv-d510/igt@kms_cursor_legacy@basic-busy-flip-before-cursor-legacy.html
   [24]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3817/fi-pnv-d510/igt@kms_cursor_legacy@basic-busy-flip-before-cursor-legacy.html
    - fi-bwr-2160:        [PASS][25] -> [FAIL][26]
   [25]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7487/fi-bwr-2160/igt@kms_cursor_legacy@basic-busy-flip-before-cursor-legacy.html
   [26]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3817/fi-bwr-2160/igt@kms_cursor_legacy@basic-busy-flip-before-cursor-legacy.html

  
Known issues
------------

  Here are the changes found in IGTPW_3817 that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@i915_selftest@live_gem_contexts:
    - fi-cfl-guc:         [PASS][27] -> [INCOMPLETE][28] ([fdo#106070] / [i915#424])
   [27]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7487/fi-cfl-guc/igt@i915_selftest@live_gem_contexts.html
   [28]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3817/fi-cfl-guc/igt@i915_selftest@live_gem_contexts.html

  
#### Possible fixes ####

  * igt@i915_pm_rpm@module-reload:
    - fi-skl-6770hq:      [FAIL][29] ([i915#178]) -> [PASS][30]
   [29]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7487/fi-skl-6770hq/igt@i915_pm_rpm@module-reload.html
   [30]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3817/fi-skl-6770hq/igt@i915_pm_rpm@module-reload.html

  * igt@i915_selftest@live_blt:
    - fi-hsw-4770:        [DMESG-FAIL][31] ([i915#563]) -> [PASS][32]
   [31]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7487/fi-hsw-4770/igt@i915_selftest@live_blt.html
   [32]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3817/fi-hsw-4770/igt@i915_selftest@live_blt.html

  * igt@i915_selftest@live_gem_contexts:
    - fi-byt-j1900:       [INCOMPLETE][33] ([i915#45]) -> [PASS][34]
   [33]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7487/fi-byt-j1900/igt@i915_selftest@live_gem_contexts.html
   [34]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3817/fi-byt-j1900/igt@i915_selftest@live_gem_contexts.html
    - fi-byt-n2820:       [DMESG-FAIL][35] ([i915#722]) -> [PASS][36]
   [35]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7487/fi-byt-n2820/igt@i915_selftest@live_gem_contexts.html
   [36]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3817/fi-byt-n2820/igt@i915_selftest@live_gem_contexts.html

  * igt@kms_busy@basic-flip-pipe-a:
    - fi-icl-u2:          [TIMEOUT][37] ([i915#449]) -> [PASS][38]
   [37]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7487/fi-icl-u2/igt@kms_busy@basic-flip-pipe-a.html
   [38]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3817/fi-icl-u2/igt@kms_busy@basic-flip-pipe-a.html

  * igt@kms_chamelium@hdmi-hpd-fast:
    - fi-kbl-7500u:       [FAIL][39] ([fdo#111407]) -> [PASS][40]
   [39]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7487/fi-kbl-7500u/igt@kms_chamelium@hdmi-hpd-fast.html
   [40]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3817/fi-kbl-7500u/igt@kms_chamelium@hdmi-hpd-fast.html

  
#### Warnings ####

  * igt@gem_exec_suspend@basic-s0:
    - fi-kbl-x1275:       [DMESG-WARN][41] ([i915#62] / [i915#92] / [i915#95]) -> [DMESG-WARN][42] ([i915#62] / [i915#92]) +5 similar issues
   [41]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7487/fi-kbl-x1275/igt@gem_exec_suspend@basic-s0.html
   [42]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3817/fi-kbl-x1275/igt@gem_exec_suspend@basic-s0.html

  * igt@gem_exec_suspend@basic-s4-devices:
    - fi-kbl-x1275:       [DMESG-WARN][43] ([fdo#107139] / [i915#62] / [i915#92] / [i915#95]) -> [DMESG-WARN][44] ([fdo#107139] / [i915#62] / [i915#92])
   [43]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7487/fi-kbl-x1275/igt@gem_exec_suspend@basic-s4-devices.html
   [44]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3817/fi-kbl-x1275/igt@gem_exec_suspend@basic-s4-devices.html

  * igt@kms_cursor_legacy@basic-busy-flip-before-cursor-legacy:
    - fi-kbl-x1275:       [DMESG-WARN][45] ([i915#62] / [i915#92]) -> [DMESG-WARN][46] ([i915#62] / [i915#92] / [i915#95]) +9 similar issues
   [45]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7487/fi-kbl-x1275/igt@kms_cursor_legacy@basic-busy-flip-before-cursor-legacy.html
   [46]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3817/fi-kbl-x1275/igt@kms_cursor_legacy@basic-busy-flip-before-cursor-legacy.html

  
  {name}: This element is suppressed. This means it is ignored when computing
          the status of the difference (SUCCESS, WARNING, or FAILURE).

  [fdo#106070]: https://bugs.freedesktop.org/show_bug.cgi?id=106070
  [fdo#107139]: https://bugs.freedesktop.org/show_bug.cgi?id=107139
  [fdo#111407]: https://bugs.freedesktop.org/show_bug.cgi?id=111407
  [fdo#111735]: https://bugs.freedesktop.org/show_bug.cgi?id=111735
  [fdo#111736]: https://bugs.freedesktop.org/show_bug.cgi?id=111736
  [i915#109]: https://gitlab.freedesktop.org/drm/intel/issues/109
  [i915#178]: https://gitlab.freedesktop.org/drm/intel/issues/178
  [i915#424]: https://gitlab.freedesktop.org/drm/intel/issues/424
  [i915#449]: https://gitlab.freedesktop.org/drm/intel/issues/449
  [i915#45]: https://gitlab.freedesktop.org/drm/intel/issues/45
  [i915#563]: https://gitlab.freedesktop.org/drm/intel/issues/563
  [i915#62]: https://gitlab.freedesktop.org/drm/intel/issues/62
  [i915#710]: https://gitlab.freedesktop.org/drm/intel/issues/710
  [i915#722]: https://gitlab.freedesktop.org/drm/intel/issues/722
  [i915#92]: https://gitlab.freedesktop.org/drm/intel/issues/92
  [i915#95]: https://gitlab.freedesktop.org/drm/intel/issues/95


Participating hosts (54 -> 47)
------------------------------

  Missing    (7): fi-ilk-m540 fi-hsw-4200u fi-byt-squawks fi-bsw-cyan fi-ctg-p8600 fi-byt-clapper fi-bdw-samus 


Build changes
-------------

  * CI: CI-20190529 -> None
  * IGT: IGT_5331 -> IGTPW_3817

  CI-20190529: 20190529
  CI_DRM_7487: ed34467a1ef4667b5d0594d27b707e9b29ada35d @ git://anongit.freedesktop.org/gfx-ci/linux
  IGTPW_3817: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3817/index.html
  IGT_5331: dad473697b2e6bb5c45d7fec533b20d5dbe4fa17 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3817/index.html
_______________________________________________
igt-dev mailing list
igt-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/igt-dev

^ permalink raw reply	[flat|nested] 5+ messages in thread

* Re: [igt-dev] [PATCH i-g-t 3/3] tests/i915/gem_mmap_offset: remove local mmap calls
  2019-12-05  7:58 ` [igt-dev] [PATCH i-g-t 3/3] tests/i915/gem_mmap_offset: remove local mmap calls Zbigniew Kempczyński
@ 2019-12-05 12:16   ` Chris Wilson
  0 siblings, 0 replies; 5+ messages in thread
From: Chris Wilson @ 2019-12-05 12:16 UTC (permalink / raw)
  To: Zbigniew Kempczyński, igt-dev

Quoting Zbigniew Kempczyński (2019-12-05 07:58:00)
> From: Lukasz Kalamarz <lukasz.kalamarz@intel.com>
> 
> Use gem_mman functions instead local versions.
> Limit available memory for 'clear' test to run it on lmem correctly.

I advise we don't do this. The lesson learnt with gem_mmap_wc.c et al
is that we want the dedicated tests for particular ioctls to be
independent of the library wrappers -- so that we do not inadvertently
change the basic ioctl tests.
-Chris
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^ permalink raw reply	[flat|nested] 5+ messages in thread

end of thread, other threads:[~2019-12-05 12:16 UTC | newest]

Thread overview: 5+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2019-12-05  7:57 [igt-dev] [PATCH i-g-t 1/3] lib/i915/gem_mman: add mmap_offset support Zbigniew Kempczyński
2019-12-05  7:57 ` [igt-dev] [PATCH i-g-t 2/3] lib/igt_dummyload: Use mapping selection to allow run batch from lmem Zbigniew Kempczyński
2019-12-05  7:58 ` [igt-dev] [PATCH i-g-t 3/3] tests/i915/gem_mmap_offset: remove local mmap calls Zbigniew Kempczyński
2019-12-05 12:16   ` Chris Wilson
2019-12-05  8:55 ` [igt-dev] ✗ Fi.CI.BAT: failure for series starting with [i-g-t,1/3] lib/i915/gem_mman: add mmap_offset support Patchwork

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