* [PATCH 0/3] ARM: dts: meson: clock updates @ 2019-12-08 18:05 ` Martin Blumenstingl 0 siblings, 0 replies; 23+ messages in thread From: Martin Blumenstingl @ 2019-12-08 18:05 UTC (permalink / raw) To: linux-amlogic, khilman, jbrunet Cc: linux-arm-kernel, linux-kernel, Martin Blumenstingl This series moves the XTAL clock out of the main (HHI) clock controller because it's an actual dedicated crystal on the PCBs. The last two patches add the DDR clock controller whose output is used as input for some of the audio clocks. Dependencies: - patch #1 has a runtime dependency on my other series: "provide the XTAL clock via OF on Meson8/8b/8m2" [0] Jerome has already queued this for v5.6 - patches #2 and #3 have a compile time dependency on my other series: "add the DDR clock controller on Meson8 and Meson8b" [1] Jerome has already queued this for v5.6, but you need an immutable tag for the dt-bindings Jerome: can you please rebase the v5.6/dt branch tomorrow on top of v5.6-rc1 and provide a tag so Kevin can apply this series? [0] https://patchwork.kernel.org/cover/11248377/ [1] https://patchwork.kernel.org/cover/11248423/ Martin Blumenstingl (3): ARM: dts: meson: provide the XTAL clock using a fixed-clock ARM: dts: meson8: add the DDR clock controller ARM: dts: meson8b: add the DDR clock controller arch/arm/boot/dts/meson.dtsi | 7 +++++++ arch/arm/boot/dts/meson6.dtsi | 7 ------- arch/arm/boot/dts/meson8.dtsi | 24 +++++++++++++++++------- arch/arm/boot/dts/meson8b-ec100.dts | 2 +- arch/arm/boot/dts/meson8b-mxq.dts | 2 +- arch/arm/boot/dts/meson8b-odroidc1.dts | 2 +- arch/arm/boot/dts/meson8b.dtsi | 24 +++++++++++++++++------- 7 files changed, 44 insertions(+), 24 deletions(-) -- 2.24.0 ^ permalink raw reply [flat|nested] 23+ messages in thread
* [PATCH 0/3] ARM: dts: meson: clock updates @ 2019-12-08 18:05 ` Martin Blumenstingl 0 siblings, 0 replies; 23+ messages in thread From: Martin Blumenstingl @ 2019-12-08 18:05 UTC (permalink / raw) To: linux-amlogic, khilman, jbrunet Cc: Martin Blumenstingl, linux-kernel, linux-arm-kernel This series moves the XTAL clock out of the main (HHI) clock controller because it's an actual dedicated crystal on the PCBs. The last two patches add the DDR clock controller whose output is used as input for some of the audio clocks. Dependencies: - patch #1 has a runtime dependency on my other series: "provide the XTAL clock via OF on Meson8/8b/8m2" [0] Jerome has already queued this for v5.6 - patches #2 and #3 have a compile time dependency on my other series: "add the DDR clock controller on Meson8 and Meson8b" [1] Jerome has already queued this for v5.6, but you need an immutable tag for the dt-bindings Jerome: can you please rebase the v5.6/dt branch tomorrow on top of v5.6-rc1 and provide a tag so Kevin can apply this series? [0] https://patchwork.kernel.org/cover/11248377/ [1] https://patchwork.kernel.org/cover/11248423/ Martin Blumenstingl (3): ARM: dts: meson: provide the XTAL clock using a fixed-clock ARM: dts: meson8: add the DDR clock controller ARM: dts: meson8b: add the DDR clock controller arch/arm/boot/dts/meson.dtsi | 7 +++++++ arch/arm/boot/dts/meson6.dtsi | 7 ------- arch/arm/boot/dts/meson8.dtsi | 24 +++++++++++++++++------- arch/arm/boot/dts/meson8b-ec100.dts | 2 +- arch/arm/boot/dts/meson8b-mxq.dts | 2 +- arch/arm/boot/dts/meson8b-odroidc1.dts | 2 +- arch/arm/boot/dts/meson8b.dtsi | 24 +++++++++++++++++------- 7 files changed, 44 insertions(+), 24 deletions(-) -- 2.24.0 _______________________________________________ linux-amlogic mailing list linux-amlogic@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-amlogic ^ permalink raw reply [flat|nested] 23+ messages in thread
* [PATCH 0/3] ARM: dts: meson: clock updates @ 2019-12-08 18:05 ` Martin Blumenstingl 0 siblings, 0 replies; 23+ messages in thread From: Martin Blumenstingl @ 2019-12-08 18:05 UTC (permalink / raw) To: linux-amlogic, khilman, jbrunet Cc: Martin Blumenstingl, linux-kernel, linux-arm-kernel This series moves the XTAL clock out of the main (HHI) clock controller because it's an actual dedicated crystal on the PCBs. The last two patches add the DDR clock controller whose output is used as input for some of the audio clocks. Dependencies: - patch #1 has a runtime dependency on my other series: "provide the XTAL clock via OF on Meson8/8b/8m2" [0] Jerome has already queued this for v5.6 - patches #2 and #3 have a compile time dependency on my other series: "add the DDR clock controller on Meson8 and Meson8b" [1] Jerome has already queued this for v5.6, but you need an immutable tag for the dt-bindings Jerome: can you please rebase the v5.6/dt branch tomorrow on top of v5.6-rc1 and provide a tag so Kevin can apply this series? [0] https://patchwork.kernel.org/cover/11248377/ [1] https://patchwork.kernel.org/cover/11248423/ Martin Blumenstingl (3): ARM: dts: meson: provide the XTAL clock using a fixed-clock ARM: dts: meson8: add the DDR clock controller ARM: dts: meson8b: add the DDR clock controller arch/arm/boot/dts/meson.dtsi | 7 +++++++ arch/arm/boot/dts/meson6.dtsi | 7 ------- arch/arm/boot/dts/meson8.dtsi | 24 +++++++++++++++++------- arch/arm/boot/dts/meson8b-ec100.dts | 2 +- arch/arm/boot/dts/meson8b-mxq.dts | 2 +- arch/arm/boot/dts/meson8b-odroidc1.dts | 2 +- arch/arm/boot/dts/meson8b.dtsi | 24 +++++++++++++++++------- 7 files changed, 44 insertions(+), 24 deletions(-) -- 2.24.0 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel ^ permalink raw reply [flat|nested] 23+ messages in thread
* [PATCH 1/3] ARM: dts: meson: provide the XTAL clock using a fixed-clock 2019-12-08 18:05 ` Martin Blumenstingl (?) @ 2019-12-08 18:05 ` Martin Blumenstingl -1 siblings, 0 replies; 23+ messages in thread From: Martin Blumenstingl @ 2019-12-08 18:05 UTC (permalink / raw) To: linux-amlogic, khilman, jbrunet Cc: linux-arm-kernel, linux-kernel, Martin Blumenstingl The clock controller driver has provided the XTAL clock so far. This does not match how the hardware actually works because the XTAL clock is an actual crystal which is mounted on the PCB. Add the "xtal" clock to meson.dtsi and replace all references to the clock controller's CLKID_XTAL with the new xtal clock node. Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> --- arch/arm/boot/dts/meson.dtsi | 7 +++++++ arch/arm/boot/dts/meson6.dtsi | 7 ------- arch/arm/boot/dts/meson8.dtsi | 15 ++++++++------- arch/arm/boot/dts/meson8b-ec100.dts | 2 +- arch/arm/boot/dts/meson8b-mxq.dts | 2 +- arch/arm/boot/dts/meson8b-odroidc1.dts | 2 +- arch/arm/boot/dts/meson8b.dtsi | 15 ++++++++------- 7 files changed, 26 insertions(+), 24 deletions(-) diff --git a/arch/arm/boot/dts/meson.dtsi b/arch/arm/boot/dts/meson.dtsi index c4447f6c8b2c..5d198309058a 100644 --- a/arch/arm/boot/dts/meson.dtsi +++ b/arch/arm/boot/dts/meson.dtsi @@ -282,4 +282,11 @@ efuse: nvmem@0 { }; }; }; + + xtal: xtal-clk { + compatible = "fixed-clock"; + clock-frequency = <24000000>; + clock-output-names = "xtal"; + #clock-cells = <0>; + }; }; /* end of / */ diff --git a/arch/arm/boot/dts/meson6.dtsi b/arch/arm/boot/dts/meson6.dtsi index 2d31b7ce3f8c..4716030a48d0 100644 --- a/arch/arm/boot/dts/meson6.dtsi +++ b/arch/arm/boot/dts/meson6.dtsi @@ -36,13 +36,6 @@ apb2: bus@d0000000 { ranges = <0x0 0xd0000000 0x40000>; }; - xtal: xtal-clk { - compatible = "fixed-clock"; - clock-frequency = <24000000>; - clock-output-names = "xtal"; - #clock-cells = <0>; - }; - clk81: clk@0 { #clock-cells = <0>; compatible = "fixed-clock"; diff --git a/arch/arm/boot/dts/meson8.dtsi b/arch/arm/boot/dts/meson8.dtsi index 3c534cd50ee3..add6d7991fdf 100644 --- a/arch/arm/boot/dts/meson8.dtsi +++ b/arch/arm/boot/dts/meson8.dtsi @@ -455,6 +455,8 @@ &gpio_intc { &hhi { clkc: clock-controller { compatible = "amlogic,meson8-clkc"; + clocks = <&xtal>; + clock-names = "xtal"; #clock-cells = <1>; #reset-cells = <1>; }; @@ -529,8 +531,7 @@ &rtc { &saradc { compatible = "amlogic,meson8-saradc", "amlogic,meson-saradc"; - clocks = <&clkc CLKID_XTAL>, - <&clkc CLKID_SAR_ADC>; + clocks = <&xtal>, <&clkc CLKID_SAR_ADC>; clock-names = "clkin", "core"; amlogic,hhi-sysctrl = <&hhi>; nvmem-cells = <&temperature_calib>; @@ -548,31 +549,31 @@ &spifc { }; &timer_abcde { - clocks = <&clkc CLKID_XTAL>, <&clkc CLKID_CLK81>; + clocks = <&xtal>, <&clkc CLKID_CLK81>; clock-names = "xtal", "pclk"; }; &uart_AO { compatible = "amlogic,meson8-uart", "amlogic,meson-uart"; - clocks = <&clkc CLKID_CLK81>, <&clkc CLKID_XTAL>, <&clkc CLKID_CLK81>; + clocks = <&clkc CLKID_CLK81>, <&xtal>, <&clkc CLKID_CLK81>; clock-names = "baud", "xtal", "pclk"; }; &uart_A { compatible = "amlogic,meson8-uart", "amlogic,meson-uart"; - clocks = <&clkc CLKID_CLK81>, <&clkc CLKID_XTAL>, <&clkc CLKID_UART0>; + clocks = <&clkc CLKID_CLK81>, <&xtal>, <&clkc CLKID_UART0>; clock-names = "baud", "xtal", "pclk"; }; &uart_B { compatible = "amlogic,meson8-uart", "amlogic,meson-uart"; - clocks = <&clkc CLKID_CLK81>, <&clkc CLKID_XTAL>, <&clkc CLKID_UART1>; + clocks = <&clkc CLKID_CLK81>, <&xtal>, <&clkc CLKID_UART1>; clock-names = "baud", "xtal", "pclk"; }; &uart_C { compatible = "amlogic,meson8-uart", "amlogic,meson-uart"; - clocks = <&clkc CLKID_CLK81>, <&clkc CLKID_XTAL>, <&clkc CLKID_UART2>; + clocks = <&clkc CLKID_CLK81>, <&xtal>, <&clkc CLKID_UART2>; clock-names = "baud", "xtal", "pclk"; }; diff --git a/arch/arm/boot/dts/meson8b-ec100.dts b/arch/arm/boot/dts/meson8b-ec100.dts index bed1dfef1985..163a200d5a7b 100644 --- a/arch/arm/boot/dts/meson8b-ec100.dts +++ b/arch/arm/boot/dts/meson8b-ec100.dts @@ -377,7 +377,7 @@ &pwm_cd { status = "okay"; pinctrl-0 = <&pwm_c1_pins>, <&pwm_d_pins>; pinctrl-names = "default"; - clocks = <&clkc CLKID_XTAL>, <&clkc CLKID_XTAL>; + clocks = <&xtal>, <&xtal>; clock-names = "clkin0", "clkin1"; }; diff --git a/arch/arm/boot/dts/meson8b-mxq.dts b/arch/arm/boot/dts/meson8b-mxq.dts index 6e39ad52e42d..33037ef62d0a 100644 --- a/arch/arm/boot/dts/meson8b-mxq.dts +++ b/arch/arm/boot/dts/meson8b-mxq.dts @@ -165,7 +165,7 @@ &pwm_cd { status = "okay"; pinctrl-0 = <&pwm_c1_pins>, <&pwm_d_pins>; pinctrl-names = "default"; - clocks = <&clkc CLKID_XTAL>, <&clkc CLKID_XTAL>; + clocks = <&xtal>, <&xtal>; clock-names = "clkin0", "clkin1"; }; diff --git a/arch/arm/boot/dts/meson8b-odroidc1.dts b/arch/arm/boot/dts/meson8b-odroidc1.dts index a24eccc354b9..a2a47804fc4a 100644 --- a/arch/arm/boot/dts/meson8b-odroidc1.dts +++ b/arch/arm/boot/dts/meson8b-odroidc1.dts @@ -340,7 +340,7 @@ &pwm_cd { status = "okay"; pinctrl-0 = <&pwm_c1_pins>, <&pwm_d_pins>; pinctrl-names = "default"; - clocks = <&clkc CLKID_XTAL>, <&clkc CLKID_XTAL>; + clocks = <&xtal>, <&xtal>; clock-names = "clkin0", "clkin1"; }; diff --git a/arch/arm/boot/dts/meson8b.dtsi b/arch/arm/boot/dts/meson8b.dtsi index 099bf8e711c9..1934666ff60f 100644 --- a/arch/arm/boot/dts/meson8b.dtsi +++ b/arch/arm/boot/dts/meson8b.dtsi @@ -434,6 +434,8 @@ &gpio_intc { &hhi { clkc: clock-controller { compatible = "amlogic,meson8-clkc"; + clocks = <&xtal>; + clock-names = "xtal"; #clock-cells = <1>; #reset-cells = <1>; }; @@ -508,8 +510,7 @@ &rtc { &saradc { compatible = "amlogic,meson8b-saradc", "amlogic,meson-saradc"; - clocks = <&clkc CLKID_XTAL>, - <&clkc CLKID_SAR_ADC>; + clocks = <&xtal>, <&clkc CLKID_SAR_ADC>; clock-names = "clkin", "core"; amlogic,hhi-sysctrl = <&hhi>; nvmem-cells = <&temperature_calib>; @@ -523,31 +524,31 @@ &sdio { }; &timer_abcde { - clocks = <&clkc CLKID_XTAL>, <&clkc CLKID_CLK81>; + clocks = <&xtal>, <&clkc CLKID_CLK81>; clock-names = "xtal", "pclk"; }; &uart_AO { compatible = "amlogic,meson8b-uart", "amlogic,meson-uart"; - clocks = <&clkc CLKID_CLK81>, <&clkc CLKID_XTAL>, <&clkc CLKID_CLK81>; + clocks = <&clkc CLKID_CLK81>, <&xtal>, <&clkc CLKID_CLK81>; clock-names = "baud", "xtal", "pclk"; }; &uart_A { compatible = "amlogic,meson8b-uart", "amlogic,meson-uart"; - clocks = <&clkc CLKID_CLK81>, <&clkc CLKID_XTAL>, <&clkc CLKID_UART0>; + clocks = <&clkc CLKID_CLK81>, <&xtal>, <&clkc CLKID_UART0>; clock-names = "baud", "xtal", "pclk"; }; &uart_B { compatible = "amlogic,meson8b-uart", "amlogic,meson-uart"; - clocks = <&clkc CLKID_CLK81>, <&clkc CLKID_XTAL>, <&clkc CLKID_UART1>; + clocks = <&clkc CLKID_CLK81>, <&xtal>, <&clkc CLKID_UART1>; clock-names = "baud", "xtal", "pclk"; }; &uart_C { compatible = "amlogic,meson8b-uart", "amlogic,meson-uart"; - clocks = <&clkc CLKID_CLK81>, <&clkc CLKID_XTAL>, <&clkc CLKID_UART2>; + clocks = <&clkc CLKID_CLK81>, <&xtal>, <&clkc CLKID_UART2>; clock-names = "baud", "xtal", "pclk"; }; -- 2.24.0 ^ permalink raw reply related [flat|nested] 23+ messages in thread
* [PATCH 1/3] ARM: dts: meson: provide the XTAL clock using a fixed-clock @ 2019-12-08 18:05 ` Martin Blumenstingl 0 siblings, 0 replies; 23+ messages in thread From: Martin Blumenstingl @ 2019-12-08 18:05 UTC (permalink / raw) To: linux-amlogic, khilman, jbrunet Cc: Martin Blumenstingl, linux-kernel, linux-arm-kernel The clock controller driver has provided the XTAL clock so far. This does not match how the hardware actually works because the XTAL clock is an actual crystal which is mounted on the PCB. Add the "xtal" clock to meson.dtsi and replace all references to the clock controller's CLKID_XTAL with the new xtal clock node. Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> --- arch/arm/boot/dts/meson.dtsi | 7 +++++++ arch/arm/boot/dts/meson6.dtsi | 7 ------- arch/arm/boot/dts/meson8.dtsi | 15 ++++++++------- arch/arm/boot/dts/meson8b-ec100.dts | 2 +- arch/arm/boot/dts/meson8b-mxq.dts | 2 +- arch/arm/boot/dts/meson8b-odroidc1.dts | 2 +- arch/arm/boot/dts/meson8b.dtsi | 15 ++++++++------- 7 files changed, 26 insertions(+), 24 deletions(-) diff --git a/arch/arm/boot/dts/meson.dtsi b/arch/arm/boot/dts/meson.dtsi index c4447f6c8b2c..5d198309058a 100644 --- a/arch/arm/boot/dts/meson.dtsi +++ b/arch/arm/boot/dts/meson.dtsi @@ -282,4 +282,11 @@ efuse: nvmem@0 { }; }; }; + + xtal: xtal-clk { + compatible = "fixed-clock"; + clock-frequency = <24000000>; + clock-output-names = "xtal"; + #clock-cells = <0>; + }; }; /* end of / */ diff --git a/arch/arm/boot/dts/meson6.dtsi b/arch/arm/boot/dts/meson6.dtsi index 2d31b7ce3f8c..4716030a48d0 100644 --- a/arch/arm/boot/dts/meson6.dtsi +++ b/arch/arm/boot/dts/meson6.dtsi @@ -36,13 +36,6 @@ apb2: bus@d0000000 { ranges = <0x0 0xd0000000 0x40000>; }; - xtal: xtal-clk { - compatible = "fixed-clock"; - clock-frequency = <24000000>; - clock-output-names = "xtal"; - #clock-cells = <0>; - }; - clk81: clk@0 { #clock-cells = <0>; compatible = "fixed-clock"; diff --git a/arch/arm/boot/dts/meson8.dtsi b/arch/arm/boot/dts/meson8.dtsi index 3c534cd50ee3..add6d7991fdf 100644 --- a/arch/arm/boot/dts/meson8.dtsi +++ b/arch/arm/boot/dts/meson8.dtsi @@ -455,6 +455,8 @@ &gpio_intc { &hhi { clkc: clock-controller { compatible = "amlogic,meson8-clkc"; + clocks = <&xtal>; + clock-names = "xtal"; #clock-cells = <1>; #reset-cells = <1>; }; @@ -529,8 +531,7 @@ &rtc { &saradc { compatible = "amlogic,meson8-saradc", "amlogic,meson-saradc"; - clocks = <&clkc CLKID_XTAL>, - <&clkc CLKID_SAR_ADC>; + clocks = <&xtal>, <&clkc CLKID_SAR_ADC>; clock-names = "clkin", "core"; amlogic,hhi-sysctrl = <&hhi>; nvmem-cells = <&temperature_calib>; @@ -548,31 +549,31 @@ &spifc { }; &timer_abcde { - clocks = <&clkc CLKID_XTAL>, <&clkc CLKID_CLK81>; + clocks = <&xtal>, <&clkc CLKID_CLK81>; clock-names = "xtal", "pclk"; }; &uart_AO { compatible = "amlogic,meson8-uart", "amlogic,meson-uart"; - clocks = <&clkc CLKID_CLK81>, <&clkc CLKID_XTAL>, <&clkc CLKID_CLK81>; + clocks = <&clkc CLKID_CLK81>, <&xtal>, <&clkc CLKID_CLK81>; clock-names = "baud", "xtal", "pclk"; }; &uart_A { compatible = "amlogic,meson8-uart", "amlogic,meson-uart"; - clocks = <&clkc CLKID_CLK81>, <&clkc CLKID_XTAL>, <&clkc CLKID_UART0>; + clocks = <&clkc CLKID_CLK81>, <&xtal>, <&clkc CLKID_UART0>; clock-names = "baud", "xtal", "pclk"; }; &uart_B { compatible = "amlogic,meson8-uart", "amlogic,meson-uart"; - clocks = <&clkc CLKID_CLK81>, <&clkc CLKID_XTAL>, <&clkc CLKID_UART1>; + clocks = <&clkc CLKID_CLK81>, <&xtal>, <&clkc CLKID_UART1>; clock-names = "baud", "xtal", "pclk"; }; &uart_C { compatible = "amlogic,meson8-uart", "amlogic,meson-uart"; - clocks = <&clkc CLKID_CLK81>, <&clkc CLKID_XTAL>, <&clkc CLKID_UART2>; + clocks = <&clkc CLKID_CLK81>, <&xtal>, <&clkc CLKID_UART2>; clock-names = "baud", "xtal", "pclk"; }; diff --git a/arch/arm/boot/dts/meson8b-ec100.dts b/arch/arm/boot/dts/meson8b-ec100.dts index bed1dfef1985..163a200d5a7b 100644 --- a/arch/arm/boot/dts/meson8b-ec100.dts +++ b/arch/arm/boot/dts/meson8b-ec100.dts @@ -377,7 +377,7 @@ &pwm_cd { status = "okay"; pinctrl-0 = <&pwm_c1_pins>, <&pwm_d_pins>; pinctrl-names = "default"; - clocks = <&clkc CLKID_XTAL>, <&clkc CLKID_XTAL>; + clocks = <&xtal>, <&xtal>; clock-names = "clkin0", "clkin1"; }; diff --git a/arch/arm/boot/dts/meson8b-mxq.dts b/arch/arm/boot/dts/meson8b-mxq.dts index 6e39ad52e42d..33037ef62d0a 100644 --- a/arch/arm/boot/dts/meson8b-mxq.dts +++ b/arch/arm/boot/dts/meson8b-mxq.dts @@ -165,7 +165,7 @@ &pwm_cd { status = "okay"; pinctrl-0 = <&pwm_c1_pins>, <&pwm_d_pins>; pinctrl-names = "default"; - clocks = <&clkc CLKID_XTAL>, <&clkc CLKID_XTAL>; + clocks = <&xtal>, <&xtal>; clock-names = "clkin0", "clkin1"; }; diff --git a/arch/arm/boot/dts/meson8b-odroidc1.dts b/arch/arm/boot/dts/meson8b-odroidc1.dts index a24eccc354b9..a2a47804fc4a 100644 --- a/arch/arm/boot/dts/meson8b-odroidc1.dts +++ b/arch/arm/boot/dts/meson8b-odroidc1.dts @@ -340,7 +340,7 @@ &pwm_cd { status = "okay"; pinctrl-0 = <&pwm_c1_pins>, <&pwm_d_pins>; pinctrl-names = "default"; - clocks = <&clkc CLKID_XTAL>, <&clkc CLKID_XTAL>; + clocks = <&xtal>, <&xtal>; clock-names = "clkin0", "clkin1"; }; diff --git a/arch/arm/boot/dts/meson8b.dtsi b/arch/arm/boot/dts/meson8b.dtsi index 099bf8e711c9..1934666ff60f 100644 --- a/arch/arm/boot/dts/meson8b.dtsi +++ b/arch/arm/boot/dts/meson8b.dtsi @@ -434,6 +434,8 @@ &gpio_intc { &hhi { clkc: clock-controller { compatible = "amlogic,meson8-clkc"; + clocks = <&xtal>; + clock-names = "xtal"; #clock-cells = <1>; #reset-cells = <1>; }; @@ -508,8 +510,7 @@ &rtc { &saradc { compatible = "amlogic,meson8b-saradc", "amlogic,meson-saradc"; - clocks = <&clkc CLKID_XTAL>, - <&clkc CLKID_SAR_ADC>; + clocks = <&xtal>, <&clkc CLKID_SAR_ADC>; clock-names = "clkin", "core"; amlogic,hhi-sysctrl = <&hhi>; nvmem-cells = <&temperature_calib>; @@ -523,31 +524,31 @@ &sdio { }; &timer_abcde { - clocks = <&clkc CLKID_XTAL>, <&clkc CLKID_CLK81>; + clocks = <&xtal>, <&clkc CLKID_CLK81>; clock-names = "xtal", "pclk"; }; &uart_AO { compatible = "amlogic,meson8b-uart", "amlogic,meson-uart"; - clocks = <&clkc CLKID_CLK81>, <&clkc CLKID_XTAL>, <&clkc CLKID_CLK81>; + clocks = <&clkc CLKID_CLK81>, <&xtal>, <&clkc CLKID_CLK81>; clock-names = "baud", "xtal", "pclk"; }; &uart_A { compatible = "amlogic,meson8b-uart", "amlogic,meson-uart"; - clocks = <&clkc CLKID_CLK81>, <&clkc CLKID_XTAL>, <&clkc CLKID_UART0>; + clocks = <&clkc CLKID_CLK81>, <&xtal>, <&clkc CLKID_UART0>; clock-names = "baud", "xtal", "pclk"; }; &uart_B { compatible = "amlogic,meson8b-uart", "amlogic,meson-uart"; - clocks = <&clkc CLKID_CLK81>, <&clkc CLKID_XTAL>, <&clkc CLKID_UART1>; + clocks = <&clkc CLKID_CLK81>, <&xtal>, <&clkc CLKID_UART1>; clock-names = "baud", "xtal", "pclk"; }; &uart_C { compatible = "amlogic,meson8b-uart", "amlogic,meson-uart"; - clocks = <&clkc CLKID_CLK81>, <&clkc CLKID_XTAL>, <&clkc CLKID_UART2>; + clocks = <&clkc CLKID_CLK81>, <&xtal>, <&clkc CLKID_UART2>; clock-names = "baud", "xtal", "pclk"; }; -- 2.24.0 _______________________________________________ linux-amlogic mailing list linux-amlogic@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-amlogic ^ permalink raw reply related [flat|nested] 23+ messages in thread
* [PATCH 1/3] ARM: dts: meson: provide the XTAL clock using a fixed-clock @ 2019-12-08 18:05 ` Martin Blumenstingl 0 siblings, 0 replies; 23+ messages in thread From: Martin Blumenstingl @ 2019-12-08 18:05 UTC (permalink / raw) To: linux-amlogic, khilman, jbrunet Cc: Martin Blumenstingl, linux-kernel, linux-arm-kernel The clock controller driver has provided the XTAL clock so far. This does not match how the hardware actually works because the XTAL clock is an actual crystal which is mounted on the PCB. Add the "xtal" clock to meson.dtsi and replace all references to the clock controller's CLKID_XTAL with the new xtal clock node. Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> --- arch/arm/boot/dts/meson.dtsi | 7 +++++++ arch/arm/boot/dts/meson6.dtsi | 7 ------- arch/arm/boot/dts/meson8.dtsi | 15 ++++++++------- arch/arm/boot/dts/meson8b-ec100.dts | 2 +- arch/arm/boot/dts/meson8b-mxq.dts | 2 +- arch/arm/boot/dts/meson8b-odroidc1.dts | 2 +- arch/arm/boot/dts/meson8b.dtsi | 15 ++++++++------- 7 files changed, 26 insertions(+), 24 deletions(-) diff --git a/arch/arm/boot/dts/meson.dtsi b/arch/arm/boot/dts/meson.dtsi index c4447f6c8b2c..5d198309058a 100644 --- a/arch/arm/boot/dts/meson.dtsi +++ b/arch/arm/boot/dts/meson.dtsi @@ -282,4 +282,11 @@ efuse: nvmem@0 { }; }; }; + + xtal: xtal-clk { + compatible = "fixed-clock"; + clock-frequency = <24000000>; + clock-output-names = "xtal"; + #clock-cells = <0>; + }; }; /* end of / */ diff --git a/arch/arm/boot/dts/meson6.dtsi b/arch/arm/boot/dts/meson6.dtsi index 2d31b7ce3f8c..4716030a48d0 100644 --- a/arch/arm/boot/dts/meson6.dtsi +++ b/arch/arm/boot/dts/meson6.dtsi @@ -36,13 +36,6 @@ apb2: bus@d0000000 { ranges = <0x0 0xd0000000 0x40000>; }; - xtal: xtal-clk { - compatible = "fixed-clock"; - clock-frequency = <24000000>; - clock-output-names = "xtal"; - #clock-cells = <0>; - }; - clk81: clk@0 { #clock-cells = <0>; compatible = "fixed-clock"; diff --git a/arch/arm/boot/dts/meson8.dtsi b/arch/arm/boot/dts/meson8.dtsi index 3c534cd50ee3..add6d7991fdf 100644 --- a/arch/arm/boot/dts/meson8.dtsi +++ b/arch/arm/boot/dts/meson8.dtsi @@ -455,6 +455,8 @@ &gpio_intc { &hhi { clkc: clock-controller { compatible = "amlogic,meson8-clkc"; + clocks = <&xtal>; + clock-names = "xtal"; #clock-cells = <1>; #reset-cells = <1>; }; @@ -529,8 +531,7 @@ &rtc { &saradc { compatible = "amlogic,meson8-saradc", "amlogic,meson-saradc"; - clocks = <&clkc CLKID_XTAL>, - <&clkc CLKID_SAR_ADC>; + clocks = <&xtal>, <&clkc CLKID_SAR_ADC>; clock-names = "clkin", "core"; amlogic,hhi-sysctrl = <&hhi>; nvmem-cells = <&temperature_calib>; @@ -548,31 +549,31 @@ &spifc { }; &timer_abcde { - clocks = <&clkc CLKID_XTAL>, <&clkc CLKID_CLK81>; + clocks = <&xtal>, <&clkc CLKID_CLK81>; clock-names = "xtal", "pclk"; }; &uart_AO { compatible = "amlogic,meson8-uart", "amlogic,meson-uart"; - clocks = <&clkc CLKID_CLK81>, <&clkc CLKID_XTAL>, <&clkc CLKID_CLK81>; + clocks = <&clkc CLKID_CLK81>, <&xtal>, <&clkc CLKID_CLK81>; clock-names = "baud", "xtal", "pclk"; }; &uart_A { compatible = "amlogic,meson8-uart", "amlogic,meson-uart"; - clocks = <&clkc CLKID_CLK81>, <&clkc CLKID_XTAL>, <&clkc CLKID_UART0>; + clocks = <&clkc CLKID_CLK81>, <&xtal>, <&clkc CLKID_UART0>; clock-names = "baud", "xtal", "pclk"; }; &uart_B { compatible = "amlogic,meson8-uart", "amlogic,meson-uart"; - clocks = <&clkc CLKID_CLK81>, <&clkc CLKID_XTAL>, <&clkc CLKID_UART1>; + clocks = <&clkc CLKID_CLK81>, <&xtal>, <&clkc CLKID_UART1>; clock-names = "baud", "xtal", "pclk"; }; &uart_C { compatible = "amlogic,meson8-uart", "amlogic,meson-uart"; - clocks = <&clkc CLKID_CLK81>, <&clkc CLKID_XTAL>, <&clkc CLKID_UART2>; + clocks = <&clkc CLKID_CLK81>, <&xtal>, <&clkc CLKID_UART2>; clock-names = "baud", "xtal", "pclk"; }; diff --git a/arch/arm/boot/dts/meson8b-ec100.dts b/arch/arm/boot/dts/meson8b-ec100.dts index bed1dfef1985..163a200d5a7b 100644 --- a/arch/arm/boot/dts/meson8b-ec100.dts +++ b/arch/arm/boot/dts/meson8b-ec100.dts @@ -377,7 +377,7 @@ &pwm_cd { status = "okay"; pinctrl-0 = <&pwm_c1_pins>, <&pwm_d_pins>; pinctrl-names = "default"; - clocks = <&clkc CLKID_XTAL>, <&clkc CLKID_XTAL>; + clocks = <&xtal>, <&xtal>; clock-names = "clkin0", "clkin1"; }; diff --git a/arch/arm/boot/dts/meson8b-mxq.dts b/arch/arm/boot/dts/meson8b-mxq.dts index 6e39ad52e42d..33037ef62d0a 100644 --- a/arch/arm/boot/dts/meson8b-mxq.dts +++ b/arch/arm/boot/dts/meson8b-mxq.dts @@ -165,7 +165,7 @@ &pwm_cd { status = "okay"; pinctrl-0 = <&pwm_c1_pins>, <&pwm_d_pins>; pinctrl-names = "default"; - clocks = <&clkc CLKID_XTAL>, <&clkc CLKID_XTAL>; + clocks = <&xtal>, <&xtal>; clock-names = "clkin0", "clkin1"; }; diff --git a/arch/arm/boot/dts/meson8b-odroidc1.dts b/arch/arm/boot/dts/meson8b-odroidc1.dts index a24eccc354b9..a2a47804fc4a 100644 --- a/arch/arm/boot/dts/meson8b-odroidc1.dts +++ b/arch/arm/boot/dts/meson8b-odroidc1.dts @@ -340,7 +340,7 @@ &pwm_cd { status = "okay"; pinctrl-0 = <&pwm_c1_pins>, <&pwm_d_pins>; pinctrl-names = "default"; - clocks = <&clkc CLKID_XTAL>, <&clkc CLKID_XTAL>; + clocks = <&xtal>, <&xtal>; clock-names = "clkin0", "clkin1"; }; diff --git a/arch/arm/boot/dts/meson8b.dtsi b/arch/arm/boot/dts/meson8b.dtsi index 099bf8e711c9..1934666ff60f 100644 --- a/arch/arm/boot/dts/meson8b.dtsi +++ b/arch/arm/boot/dts/meson8b.dtsi @@ -434,6 +434,8 @@ &gpio_intc { &hhi { clkc: clock-controller { compatible = "amlogic,meson8-clkc"; + clocks = <&xtal>; + clock-names = "xtal"; #clock-cells = <1>; #reset-cells = <1>; }; @@ -508,8 +510,7 @@ &rtc { &saradc { compatible = "amlogic,meson8b-saradc", "amlogic,meson-saradc"; - clocks = <&clkc CLKID_XTAL>, - <&clkc CLKID_SAR_ADC>; + clocks = <&xtal>, <&clkc CLKID_SAR_ADC>; clock-names = "clkin", "core"; amlogic,hhi-sysctrl = <&hhi>; nvmem-cells = <&temperature_calib>; @@ -523,31 +524,31 @@ &sdio { }; &timer_abcde { - clocks = <&clkc CLKID_XTAL>, <&clkc CLKID_CLK81>; + clocks = <&xtal>, <&clkc CLKID_CLK81>; clock-names = "xtal", "pclk"; }; &uart_AO { compatible = "amlogic,meson8b-uart", "amlogic,meson-uart"; - clocks = <&clkc CLKID_CLK81>, <&clkc CLKID_XTAL>, <&clkc CLKID_CLK81>; + clocks = <&clkc CLKID_CLK81>, <&xtal>, <&clkc CLKID_CLK81>; clock-names = "baud", "xtal", "pclk"; }; &uart_A { compatible = "amlogic,meson8b-uart", "amlogic,meson-uart"; - clocks = <&clkc CLKID_CLK81>, <&clkc CLKID_XTAL>, <&clkc CLKID_UART0>; + clocks = <&clkc CLKID_CLK81>, <&xtal>, <&clkc CLKID_UART0>; clock-names = "baud", "xtal", "pclk"; }; &uart_B { compatible = "amlogic,meson8b-uart", "amlogic,meson-uart"; - clocks = <&clkc CLKID_CLK81>, <&clkc CLKID_XTAL>, <&clkc CLKID_UART1>; + clocks = <&clkc CLKID_CLK81>, <&xtal>, <&clkc CLKID_UART1>; clock-names = "baud", "xtal", "pclk"; }; &uart_C { compatible = "amlogic,meson8b-uart", "amlogic,meson-uart"; - clocks = <&clkc CLKID_CLK81>, <&clkc CLKID_XTAL>, <&clkc CLKID_UART2>; + clocks = <&clkc CLKID_CLK81>, <&xtal>, <&clkc CLKID_UART2>; clock-names = "baud", "xtal", "pclk"; }; -- 2.24.0 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel ^ permalink raw reply related [flat|nested] 23+ messages in thread
* [PATCH 2/3] ARM: dts: meson8: add the DDR clock controller 2019-12-08 18:05 ` Martin Blumenstingl (?) @ 2019-12-08 18:05 ` Martin Blumenstingl -1 siblings, 0 replies; 23+ messages in thread From: Martin Blumenstingl @ 2019-12-08 18:05 UTC (permalink / raw) To: linux-amlogic, khilman, jbrunet Cc: linux-arm-kernel, linux-kernel, Martin Blumenstingl Add the DDR clock controller and pass it's DDR_CLKID_DDR_PLL to the main (HHI) clock controller as "ddr_clk". The "ddr_clk" is used as one of the inputs for the audio clock muxes. Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> --- arch/arm/boot/dts/meson8.dtsi | 13 +++++++++++-- 1 file changed, 11 insertions(+), 2 deletions(-) diff --git a/arch/arm/boot/dts/meson8.dtsi b/arch/arm/boot/dts/meson8.dtsi index add6d7991fdf..b35d7444c1f4 100644 --- a/arch/arm/boot/dts/meson8.dtsi +++ b/arch/arm/boot/dts/meson8.dtsi @@ -3,6 +3,7 @@ * Copyright 2014 Carlo Caione <carlo@caione.org> */ +#include <dt-bindings/clock/meson8-ddr-clkc.h> #include <dt-bindings/clock/meson8b-clkc.h> #include <dt-bindings/gpio/meson8-gpio.h> #include <dt-bindings/reset/amlogic,meson8b-clkc-reset.h> @@ -195,6 +196,14 @@ mmcbus: bus@c8000000 { #size-cells = <1>; ranges = <0x0 0xc8000000 0x8000>; + ddr_clkc: clock-controller@400 { + compatible = "amlogic,meson8-ddr-clkc"; + reg = <0x400 0x20>; + clocks = <&xtal>; + clock-names = "xtal"; + #clock-cells = <1>; + }; + dmcbus: bus@6000 { compatible = "simple-bus"; reg = <0x6000 0x400>; @@ -455,8 +464,8 @@ &gpio_intc { &hhi { clkc: clock-controller { compatible = "amlogic,meson8-clkc"; - clocks = <&xtal>; - clock-names = "xtal"; + clocks = <&xtal>, <&ddr_clkc DDR_CLKID_DDR_PLL>; + clock-names = "xtal", "ddr_pll"; #clock-cells = <1>; #reset-cells = <1>; }; -- 2.24.0 ^ permalink raw reply related [flat|nested] 23+ messages in thread
* [PATCH 2/3] ARM: dts: meson8: add the DDR clock controller @ 2019-12-08 18:05 ` Martin Blumenstingl 0 siblings, 0 replies; 23+ messages in thread From: Martin Blumenstingl @ 2019-12-08 18:05 UTC (permalink / raw) To: linux-amlogic, khilman, jbrunet Cc: Martin Blumenstingl, linux-kernel, linux-arm-kernel Add the DDR clock controller and pass it's DDR_CLKID_DDR_PLL to the main (HHI) clock controller as "ddr_clk". The "ddr_clk" is used as one of the inputs for the audio clock muxes. Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> --- arch/arm/boot/dts/meson8.dtsi | 13 +++++++++++-- 1 file changed, 11 insertions(+), 2 deletions(-) diff --git a/arch/arm/boot/dts/meson8.dtsi b/arch/arm/boot/dts/meson8.dtsi index add6d7991fdf..b35d7444c1f4 100644 --- a/arch/arm/boot/dts/meson8.dtsi +++ b/arch/arm/boot/dts/meson8.dtsi @@ -3,6 +3,7 @@ * Copyright 2014 Carlo Caione <carlo@caione.org> */ +#include <dt-bindings/clock/meson8-ddr-clkc.h> #include <dt-bindings/clock/meson8b-clkc.h> #include <dt-bindings/gpio/meson8-gpio.h> #include <dt-bindings/reset/amlogic,meson8b-clkc-reset.h> @@ -195,6 +196,14 @@ mmcbus: bus@c8000000 { #size-cells = <1>; ranges = <0x0 0xc8000000 0x8000>; + ddr_clkc: clock-controller@400 { + compatible = "amlogic,meson8-ddr-clkc"; + reg = <0x400 0x20>; + clocks = <&xtal>; + clock-names = "xtal"; + #clock-cells = <1>; + }; + dmcbus: bus@6000 { compatible = "simple-bus"; reg = <0x6000 0x400>; @@ -455,8 +464,8 @@ &gpio_intc { &hhi { clkc: clock-controller { compatible = "amlogic,meson8-clkc"; - clocks = <&xtal>; - clock-names = "xtal"; + clocks = <&xtal>, <&ddr_clkc DDR_CLKID_DDR_PLL>; + clock-names = "xtal", "ddr_pll"; #clock-cells = <1>; #reset-cells = <1>; }; -- 2.24.0 _______________________________________________ linux-amlogic mailing list linux-amlogic@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-amlogic ^ permalink raw reply related [flat|nested] 23+ messages in thread
* [PATCH 2/3] ARM: dts: meson8: add the DDR clock controller @ 2019-12-08 18:05 ` Martin Blumenstingl 0 siblings, 0 replies; 23+ messages in thread From: Martin Blumenstingl @ 2019-12-08 18:05 UTC (permalink / raw) To: linux-amlogic, khilman, jbrunet Cc: Martin Blumenstingl, linux-kernel, linux-arm-kernel Add the DDR clock controller and pass it's DDR_CLKID_DDR_PLL to the main (HHI) clock controller as "ddr_clk". The "ddr_clk" is used as one of the inputs for the audio clock muxes. Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> --- arch/arm/boot/dts/meson8.dtsi | 13 +++++++++++-- 1 file changed, 11 insertions(+), 2 deletions(-) diff --git a/arch/arm/boot/dts/meson8.dtsi b/arch/arm/boot/dts/meson8.dtsi index add6d7991fdf..b35d7444c1f4 100644 --- a/arch/arm/boot/dts/meson8.dtsi +++ b/arch/arm/boot/dts/meson8.dtsi @@ -3,6 +3,7 @@ * Copyright 2014 Carlo Caione <carlo@caione.org> */ +#include <dt-bindings/clock/meson8-ddr-clkc.h> #include <dt-bindings/clock/meson8b-clkc.h> #include <dt-bindings/gpio/meson8-gpio.h> #include <dt-bindings/reset/amlogic,meson8b-clkc-reset.h> @@ -195,6 +196,14 @@ mmcbus: bus@c8000000 { #size-cells = <1>; ranges = <0x0 0xc8000000 0x8000>; + ddr_clkc: clock-controller@400 { + compatible = "amlogic,meson8-ddr-clkc"; + reg = <0x400 0x20>; + clocks = <&xtal>; + clock-names = "xtal"; + #clock-cells = <1>; + }; + dmcbus: bus@6000 { compatible = "simple-bus"; reg = <0x6000 0x400>; @@ -455,8 +464,8 @@ &gpio_intc { &hhi { clkc: clock-controller { compatible = "amlogic,meson8-clkc"; - clocks = <&xtal>; - clock-names = "xtal"; + clocks = <&xtal>, <&ddr_clkc DDR_CLKID_DDR_PLL>; + clock-names = "xtal", "ddr_pll"; #clock-cells = <1>; #reset-cells = <1>; }; -- 2.24.0 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel ^ permalink raw reply related [flat|nested] 23+ messages in thread
* Re: [PATCH 2/3] ARM: dts: meson8: add the DDR clock controller 2019-12-08 18:05 ` Martin Blumenstingl (?) (?) @ 2019-12-09 3:20 ` kbuild test robot -1 siblings, 0 replies; 23+ messages in thread From: kbuild test robot @ 2019-12-09 3:20 UTC (permalink / raw) To: Martin Blumenstingl Cc: kbuild-all, linux-amlogic, khilman, jbrunet, linux-arm-kernel, linux-kernel, Martin Blumenstingl [-- Attachment #1: Type: text/plain, Size: 1913 bytes --] Hi Martin, Thank you for the patch! Yet something to improve: [auto build test ERROR on robh/for-next] [also build test ERROR on v5.5-rc1 next-20191208] [if your patch is applied to the wrong git tree, please drop us a note to help improve the system. BTW, we also suggest to use '--base' option to specify the base tree in git format-patch, please see https://stackoverflow.com/a/37406982] url: https://github.com/0day-ci/linux/commits/Martin-Blumenstingl/ARM-dts-meson-clock-updates/20191209-020750 base: https://git.kernel.org/pub/scm/linux/kernel/git/robh/linux.git for-next config: arm-allmodconfig (attached as .config) compiler: arm-linux-gnueabi-gcc (GCC) 7.5.0 reproduce: wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross chmod +x ~/bin/make.cross # save the attached .config to linux build tree GCC_VERSION=7.5.0 make.cross ARCH=arm If you fix the issue, kindly add following tag Reported-by: kbuild test robot <lkp@intel.com> All errors (new ones prefixed by >>): In file included from arch/arm/boot/dts/meson8-minix-neo-x8.dts:8: >> arch/arm/boot/dts/meson8.dtsi:6:10: fatal error: dt-bindings/clock/meson8-ddr-clkc.h: No such file or directory 6 | #include <dt-bindings/clock/meson8-ddr-clkc.h> | ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ compilation terminated. vim +6 arch/arm/boot/dts/meson8.dtsi > 6 #include <dt-bindings/clock/meson8-ddr-clkc.h> 7 #include <dt-bindings/clock/meson8b-clkc.h> 8 #include <dt-bindings/gpio/meson8-gpio.h> 9 #include <dt-bindings/reset/amlogic,meson8b-clkc-reset.h> 10 #include <dt-bindings/reset/amlogic,meson8b-reset.h> 11 #include "meson.dtsi" 12 --- 0-DAY kernel test infrastructure Open Source Technology Center https://lists.01.org/hyperkitty/list/kbuild-all@lists.01.org Intel Corporation [-- Attachment #2: .config.gz --] [-- Type: application/gzip, Size: 71983 bytes --] ^ permalink raw reply [flat|nested] 23+ messages in thread
* Re: [PATCH 2/3] ARM: dts: meson8: add the DDR clock controller @ 2019-12-09 3:20 ` kbuild test robot 0 siblings, 0 replies; 23+ messages in thread From: kbuild test robot @ 2019-12-09 3:20 UTC (permalink / raw) To: kbuild-all [-- Attachment #1: Type: text/plain, Size: 1959 bytes --] Hi Martin, Thank you for the patch! Yet something to improve: [auto build test ERROR on robh/for-next] [also build test ERROR on v5.5-rc1 next-20191208] [if your patch is applied to the wrong git tree, please drop us a note to help improve the system. BTW, we also suggest to use '--base' option to specify the base tree in git format-patch, please see https://stackoverflow.com/a/37406982] url: https://github.com/0day-ci/linux/commits/Martin-Blumenstingl/ARM-dts-meson-clock-updates/20191209-020750 base: https://git.kernel.org/pub/scm/linux/kernel/git/robh/linux.git for-next config: arm-allmodconfig (attached as .config) compiler: arm-linux-gnueabi-gcc (GCC) 7.5.0 reproduce: wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross chmod +x ~/bin/make.cross # save the attached .config to linux build tree GCC_VERSION=7.5.0 make.cross ARCH=arm If you fix the issue, kindly add following tag Reported-by: kbuild test robot <lkp@intel.com> All errors (new ones prefixed by >>): In file included from arch/arm/boot/dts/meson8-minix-neo-x8.dts:8: >> arch/arm/boot/dts/meson8.dtsi:6:10: fatal error: dt-bindings/clock/meson8-ddr-clkc.h: No such file or directory 6 | #include <dt-bindings/clock/meson8-ddr-clkc.h> | ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ compilation terminated. vim +6 arch/arm/boot/dts/meson8.dtsi > 6 #include <dt-bindings/clock/meson8-ddr-clkc.h> 7 #include <dt-bindings/clock/meson8b-clkc.h> 8 #include <dt-bindings/gpio/meson8-gpio.h> 9 #include <dt-bindings/reset/amlogic,meson8b-clkc-reset.h> 10 #include <dt-bindings/reset/amlogic,meson8b-reset.h> 11 #include "meson.dtsi" 12 --- 0-DAY kernel test infrastructure Open Source Technology Center https://lists.01.org/hyperkitty/list/kbuild-all(a)lists.01.org Intel Corporation [-- Attachment #2: config.gz --] [-- Type: application/gzip, Size: 71983 bytes --] ^ permalink raw reply [flat|nested] 23+ messages in thread
* Re: [PATCH 2/3] ARM: dts: meson8: add the DDR clock controller @ 2019-12-09 3:20 ` kbuild test robot 0 siblings, 0 replies; 23+ messages in thread From: kbuild test robot @ 2019-12-09 3:20 UTC (permalink / raw) To: Martin Blumenstingl Cc: kbuild-all, Martin Blumenstingl, khilman, linux-kernel, linux-amlogic, linux-arm-kernel, jbrunet [-- Attachment #1: Type: text/plain, Size: 1913 bytes --] Hi Martin, Thank you for the patch! Yet something to improve: [auto build test ERROR on robh/for-next] [also build test ERROR on v5.5-rc1 next-20191208] [if your patch is applied to the wrong git tree, please drop us a note to help improve the system. BTW, we also suggest to use '--base' option to specify the base tree in git format-patch, please see https://stackoverflow.com/a/37406982] url: https://github.com/0day-ci/linux/commits/Martin-Blumenstingl/ARM-dts-meson-clock-updates/20191209-020750 base: https://git.kernel.org/pub/scm/linux/kernel/git/robh/linux.git for-next config: arm-allmodconfig (attached as .config) compiler: arm-linux-gnueabi-gcc (GCC) 7.5.0 reproduce: wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross chmod +x ~/bin/make.cross # save the attached .config to linux build tree GCC_VERSION=7.5.0 make.cross ARCH=arm If you fix the issue, kindly add following tag Reported-by: kbuild test robot <lkp@intel.com> All errors (new ones prefixed by >>): In file included from arch/arm/boot/dts/meson8-minix-neo-x8.dts:8: >> arch/arm/boot/dts/meson8.dtsi:6:10: fatal error: dt-bindings/clock/meson8-ddr-clkc.h: No such file or directory 6 | #include <dt-bindings/clock/meson8-ddr-clkc.h> | ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ compilation terminated. vim +6 arch/arm/boot/dts/meson8.dtsi > 6 #include <dt-bindings/clock/meson8-ddr-clkc.h> 7 #include <dt-bindings/clock/meson8b-clkc.h> 8 #include <dt-bindings/gpio/meson8-gpio.h> 9 #include <dt-bindings/reset/amlogic,meson8b-clkc-reset.h> 10 #include <dt-bindings/reset/amlogic,meson8b-reset.h> 11 #include "meson.dtsi" 12 --- 0-DAY kernel test infrastructure Open Source Technology Center https://lists.01.org/hyperkitty/list/kbuild-all@lists.01.org Intel Corporation [-- Attachment #2: .config.gz --] [-- Type: application/gzip, Size: 71983 bytes --] [-- Attachment #3: Type: text/plain, Size: 167 bytes --] _______________________________________________ linux-amlogic mailing list linux-amlogic@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-amlogic ^ permalink raw reply [flat|nested] 23+ messages in thread
* Re: [PATCH 2/3] ARM: dts: meson8: add the DDR clock controller @ 2019-12-09 3:20 ` kbuild test robot 0 siblings, 0 replies; 23+ messages in thread From: kbuild test robot @ 2019-12-09 3:20 UTC (permalink / raw) To: Martin Blumenstingl Cc: kbuild-all, Martin Blumenstingl, khilman, linux-kernel, linux-amlogic, linux-arm-kernel, jbrunet [-- Attachment #1: Type: text/plain, Size: 1913 bytes --] Hi Martin, Thank you for the patch! Yet something to improve: [auto build test ERROR on robh/for-next] [also build test ERROR on v5.5-rc1 next-20191208] [if your patch is applied to the wrong git tree, please drop us a note to help improve the system. BTW, we also suggest to use '--base' option to specify the base tree in git format-patch, please see https://stackoverflow.com/a/37406982] url: https://github.com/0day-ci/linux/commits/Martin-Blumenstingl/ARM-dts-meson-clock-updates/20191209-020750 base: https://git.kernel.org/pub/scm/linux/kernel/git/robh/linux.git for-next config: arm-allmodconfig (attached as .config) compiler: arm-linux-gnueabi-gcc (GCC) 7.5.0 reproduce: wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross chmod +x ~/bin/make.cross # save the attached .config to linux build tree GCC_VERSION=7.5.0 make.cross ARCH=arm If you fix the issue, kindly add following tag Reported-by: kbuild test robot <lkp@intel.com> All errors (new ones prefixed by >>): In file included from arch/arm/boot/dts/meson8-minix-neo-x8.dts:8: >> arch/arm/boot/dts/meson8.dtsi:6:10: fatal error: dt-bindings/clock/meson8-ddr-clkc.h: No such file or directory 6 | #include <dt-bindings/clock/meson8-ddr-clkc.h> | ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ compilation terminated. vim +6 arch/arm/boot/dts/meson8.dtsi > 6 #include <dt-bindings/clock/meson8-ddr-clkc.h> 7 #include <dt-bindings/clock/meson8b-clkc.h> 8 #include <dt-bindings/gpio/meson8-gpio.h> 9 #include <dt-bindings/reset/amlogic,meson8b-clkc-reset.h> 10 #include <dt-bindings/reset/amlogic,meson8b-reset.h> 11 #include "meson.dtsi" 12 --- 0-DAY kernel test infrastructure Open Source Technology Center https://lists.01.org/hyperkitty/list/kbuild-all@lists.01.org Intel Corporation [-- Attachment #2: .config.gz --] [-- Type: application/gzip, Size: 71983 bytes --] [-- Attachment #3: Type: text/plain, Size: 176 bytes --] _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel ^ permalink raw reply [flat|nested] 23+ messages in thread
* [PATCH 3/3] ARM: dts: meson8b: add the DDR clock controller 2019-12-08 18:05 ` Martin Blumenstingl (?) @ 2019-12-08 18:05 ` Martin Blumenstingl -1 siblings, 0 replies; 23+ messages in thread From: Martin Blumenstingl @ 2019-12-08 18:05 UTC (permalink / raw) To: linux-amlogic, khilman, jbrunet Cc: linux-arm-kernel, linux-kernel, Martin Blumenstingl Add the DDR clock controller and pass it's DDR_CLKID_DDR_PLL to the main (HHI) clock controller as "ddr_clk". The "ddr_clk" is used as one of the inputs for the audio clock muxes. Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> --- arch/arm/boot/dts/meson8b.dtsi | 13 +++++++++++-- 1 file changed, 11 insertions(+), 2 deletions(-) diff --git a/arch/arm/boot/dts/meson8b.dtsi b/arch/arm/boot/dts/meson8b.dtsi index 1934666ff60f..8ac8bdfaf58f 100644 --- a/arch/arm/boot/dts/meson8b.dtsi +++ b/arch/arm/boot/dts/meson8b.dtsi @@ -4,6 +4,7 @@ * Author: Carlo Caione <carlo@endlessm.com> */ +#include <dt-bindings/clock/meson8-ddr-clkc.h> #include <dt-bindings/clock/meson8b-clkc.h> #include <dt-bindings/gpio/meson8b-gpio.h> #include <dt-bindings/reset/amlogic,meson8b-reset.h> @@ -172,6 +173,14 @@ mmcbus: bus@c8000000 { #size-cells = <1>; ranges = <0x0 0xc8000000 0x8000>; + ddr_clkc: clock-controller@400 { + compatible = "amlogic,meson8b-ddr-clkc"; + reg = <0x400 0x20>; + clocks = <&xtal>; + clock-names = "xtal"; + #clock-cells = <1>; + }; + dmcbus: bus@6000 { compatible = "simple-bus"; reg = <0x6000 0x400>; @@ -434,8 +443,8 @@ &gpio_intc { &hhi { clkc: clock-controller { compatible = "amlogic,meson8-clkc"; - clocks = <&xtal>; - clock-names = "xtal"; + clocks = <&xtal>, <&ddr_clkc DDR_CLKID_DDR_PLL>; + clock-names = "xtal", "ddr_pll"; #clock-cells = <1>; #reset-cells = <1>; }; -- 2.24.0 ^ permalink raw reply related [flat|nested] 23+ messages in thread
* [PATCH 3/3] ARM: dts: meson8b: add the DDR clock controller @ 2019-12-08 18:05 ` Martin Blumenstingl 0 siblings, 0 replies; 23+ messages in thread From: Martin Blumenstingl @ 2019-12-08 18:05 UTC (permalink / raw) To: linux-amlogic, khilman, jbrunet Cc: Martin Blumenstingl, linux-kernel, linux-arm-kernel Add the DDR clock controller and pass it's DDR_CLKID_DDR_PLL to the main (HHI) clock controller as "ddr_clk". The "ddr_clk" is used as one of the inputs for the audio clock muxes. Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> --- arch/arm/boot/dts/meson8b.dtsi | 13 +++++++++++-- 1 file changed, 11 insertions(+), 2 deletions(-) diff --git a/arch/arm/boot/dts/meson8b.dtsi b/arch/arm/boot/dts/meson8b.dtsi index 1934666ff60f..8ac8bdfaf58f 100644 --- a/arch/arm/boot/dts/meson8b.dtsi +++ b/arch/arm/boot/dts/meson8b.dtsi @@ -4,6 +4,7 @@ * Author: Carlo Caione <carlo@endlessm.com> */ +#include <dt-bindings/clock/meson8-ddr-clkc.h> #include <dt-bindings/clock/meson8b-clkc.h> #include <dt-bindings/gpio/meson8b-gpio.h> #include <dt-bindings/reset/amlogic,meson8b-reset.h> @@ -172,6 +173,14 @@ mmcbus: bus@c8000000 { #size-cells = <1>; ranges = <0x0 0xc8000000 0x8000>; + ddr_clkc: clock-controller@400 { + compatible = "amlogic,meson8b-ddr-clkc"; + reg = <0x400 0x20>; + clocks = <&xtal>; + clock-names = "xtal"; + #clock-cells = <1>; + }; + dmcbus: bus@6000 { compatible = "simple-bus"; reg = <0x6000 0x400>; @@ -434,8 +443,8 @@ &gpio_intc { &hhi { clkc: clock-controller { compatible = "amlogic,meson8-clkc"; - clocks = <&xtal>; - clock-names = "xtal"; + clocks = <&xtal>, <&ddr_clkc DDR_CLKID_DDR_PLL>; + clock-names = "xtal", "ddr_pll"; #clock-cells = <1>; #reset-cells = <1>; }; -- 2.24.0 _______________________________________________ linux-amlogic mailing list linux-amlogic@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-amlogic ^ permalink raw reply related [flat|nested] 23+ messages in thread
* [PATCH 3/3] ARM: dts: meson8b: add the DDR clock controller @ 2019-12-08 18:05 ` Martin Blumenstingl 0 siblings, 0 replies; 23+ messages in thread From: Martin Blumenstingl @ 2019-12-08 18:05 UTC (permalink / raw) To: linux-amlogic, khilman, jbrunet Cc: Martin Blumenstingl, linux-kernel, linux-arm-kernel Add the DDR clock controller and pass it's DDR_CLKID_DDR_PLL to the main (HHI) clock controller as "ddr_clk". The "ddr_clk" is used as one of the inputs for the audio clock muxes. Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> --- arch/arm/boot/dts/meson8b.dtsi | 13 +++++++++++-- 1 file changed, 11 insertions(+), 2 deletions(-) diff --git a/arch/arm/boot/dts/meson8b.dtsi b/arch/arm/boot/dts/meson8b.dtsi index 1934666ff60f..8ac8bdfaf58f 100644 --- a/arch/arm/boot/dts/meson8b.dtsi +++ b/arch/arm/boot/dts/meson8b.dtsi @@ -4,6 +4,7 @@ * Author: Carlo Caione <carlo@endlessm.com> */ +#include <dt-bindings/clock/meson8-ddr-clkc.h> #include <dt-bindings/clock/meson8b-clkc.h> #include <dt-bindings/gpio/meson8b-gpio.h> #include <dt-bindings/reset/amlogic,meson8b-reset.h> @@ -172,6 +173,14 @@ mmcbus: bus@c8000000 { #size-cells = <1>; ranges = <0x0 0xc8000000 0x8000>; + ddr_clkc: clock-controller@400 { + compatible = "amlogic,meson8b-ddr-clkc"; + reg = <0x400 0x20>; + clocks = <&xtal>; + clock-names = "xtal"; + #clock-cells = <1>; + }; + dmcbus: bus@6000 { compatible = "simple-bus"; reg = <0x6000 0x400>; @@ -434,8 +443,8 @@ &gpio_intc { &hhi { clkc: clock-controller { compatible = "amlogic,meson8-clkc"; - clocks = <&xtal>; - clock-names = "xtal"; + clocks = <&xtal>, <&ddr_clkc DDR_CLKID_DDR_PLL>; + clock-names = "xtal", "ddr_pll"; #clock-cells = <1>; #reset-cells = <1>; }; -- 2.24.0 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel ^ permalink raw reply related [flat|nested] 23+ messages in thread
* Re: [PATCH 0/3] ARM: dts: meson: clock updates 2019-12-08 18:05 ` Martin Blumenstingl (?) @ 2019-12-12 15:48 ` Jerome Brunet -1 siblings, 0 replies; 23+ messages in thread From: Jerome Brunet @ 2019-12-12 15:48 UTC (permalink / raw) To: Martin Blumenstingl, linux-amlogic, khilman Cc: linux-arm-kernel, linux-kernel On Sun 08 Dec 2019 at 19:05, Martin Blumenstingl <martin.blumenstingl@googlemail.com> wrote: > This series moves the XTAL clock out of the main (HHI) clock controller > because it's an actual dedicated crystal on the PCBs. > > The last two patches add the DDR clock controller whose output is used > as input for some of the audio clocks. > > > Dependencies: > - patch #1 has a runtime dependency on my other series: > "provide the XTAL clock via OF on Meson8/8b/8m2" [0] > Jerome has already queued this for v5.6 > - patches #2 and #3 have a compile time dependency on my other series: > "add the DDR clock controller on Meson8 and Meson8b" [1] > Jerome has already queued this for v5.6, but you need an immutable > tag for the dt-bindings Bindings tag clk-meson-dt-v5.6-1 available with the necessary ids branch v5.6/drivers with the actual driver changes > > > Jerome: can you please rebase the v5.6/dt branch tomorrow on top of > v5.6-rc1 and provide a tag so Kevin can apply this series? > > > [0] https://patchwork.kernel.org/cover/11248377/ > [1] https://patchwork.kernel.org/cover/11248423/ > > > Martin Blumenstingl (3): > ARM: dts: meson: provide the XTAL clock using a fixed-clock > ARM: dts: meson8: add the DDR clock controller > ARM: dts: meson8b: add the DDR clock controller > > arch/arm/boot/dts/meson.dtsi | 7 +++++++ > arch/arm/boot/dts/meson6.dtsi | 7 ------- > arch/arm/boot/dts/meson8.dtsi | 24 +++++++++++++++++------- > arch/arm/boot/dts/meson8b-ec100.dts | 2 +- > arch/arm/boot/dts/meson8b-mxq.dts | 2 +- > arch/arm/boot/dts/meson8b-odroidc1.dts | 2 +- > arch/arm/boot/dts/meson8b.dtsi | 24 +++++++++++++++++------- > 7 files changed, 44 insertions(+), 24 deletions(-) ^ permalink raw reply [flat|nested] 23+ messages in thread
* Re: [PATCH 0/3] ARM: dts: meson: clock updates @ 2019-12-12 15:48 ` Jerome Brunet 0 siblings, 0 replies; 23+ messages in thread From: Jerome Brunet @ 2019-12-12 15:48 UTC (permalink / raw) To: Martin Blumenstingl, linux-amlogic, khilman Cc: linux-kernel, linux-arm-kernel On Sun 08 Dec 2019 at 19:05, Martin Blumenstingl <martin.blumenstingl@googlemail.com> wrote: > This series moves the XTAL clock out of the main (HHI) clock controller > because it's an actual dedicated crystal on the PCBs. > > The last two patches add the DDR clock controller whose output is used > as input for some of the audio clocks. > > > Dependencies: > - patch #1 has a runtime dependency on my other series: > "provide the XTAL clock via OF on Meson8/8b/8m2" [0] > Jerome has already queued this for v5.6 > - patches #2 and #3 have a compile time dependency on my other series: > "add the DDR clock controller on Meson8 and Meson8b" [1] > Jerome has already queued this for v5.6, but you need an immutable > tag for the dt-bindings Bindings tag clk-meson-dt-v5.6-1 available with the necessary ids branch v5.6/drivers with the actual driver changes > > > Jerome: can you please rebase the v5.6/dt branch tomorrow on top of > v5.6-rc1 and provide a tag so Kevin can apply this series? > > > [0] https://patchwork.kernel.org/cover/11248377/ > [1] https://patchwork.kernel.org/cover/11248423/ > > > Martin Blumenstingl (3): > ARM: dts: meson: provide the XTAL clock using a fixed-clock > ARM: dts: meson8: add the DDR clock controller > ARM: dts: meson8b: add the DDR clock controller > > arch/arm/boot/dts/meson.dtsi | 7 +++++++ > arch/arm/boot/dts/meson6.dtsi | 7 ------- > arch/arm/boot/dts/meson8.dtsi | 24 +++++++++++++++++------- > arch/arm/boot/dts/meson8b-ec100.dts | 2 +- > arch/arm/boot/dts/meson8b-mxq.dts | 2 +- > arch/arm/boot/dts/meson8b-odroidc1.dts | 2 +- > arch/arm/boot/dts/meson8b.dtsi | 24 +++++++++++++++++------- > 7 files changed, 44 insertions(+), 24 deletions(-) _______________________________________________ linux-amlogic mailing list linux-amlogic@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-amlogic ^ permalink raw reply [flat|nested] 23+ messages in thread
* Re: [PATCH 0/3] ARM: dts: meson: clock updates @ 2019-12-12 15:48 ` Jerome Brunet 0 siblings, 0 replies; 23+ messages in thread From: Jerome Brunet @ 2019-12-12 15:48 UTC (permalink / raw) To: Martin Blumenstingl, linux-amlogic, khilman Cc: linux-kernel, linux-arm-kernel On Sun 08 Dec 2019 at 19:05, Martin Blumenstingl <martin.blumenstingl@googlemail.com> wrote: > This series moves the XTAL clock out of the main (HHI) clock controller > because it's an actual dedicated crystal on the PCBs. > > The last two patches add the DDR clock controller whose output is used > as input for some of the audio clocks. > > > Dependencies: > - patch #1 has a runtime dependency on my other series: > "provide the XTAL clock via OF on Meson8/8b/8m2" [0] > Jerome has already queued this for v5.6 > - patches #2 and #3 have a compile time dependency on my other series: > "add the DDR clock controller on Meson8 and Meson8b" [1] > Jerome has already queued this for v5.6, but you need an immutable > tag for the dt-bindings Bindings tag clk-meson-dt-v5.6-1 available with the necessary ids branch v5.6/drivers with the actual driver changes > > > Jerome: can you please rebase the v5.6/dt branch tomorrow on top of > v5.6-rc1 and provide a tag so Kevin can apply this series? > > > [0] https://patchwork.kernel.org/cover/11248377/ > [1] https://patchwork.kernel.org/cover/11248423/ > > > Martin Blumenstingl (3): > ARM: dts: meson: provide the XTAL clock using a fixed-clock > ARM: dts: meson8: add the DDR clock controller > ARM: dts: meson8b: add the DDR clock controller > > arch/arm/boot/dts/meson.dtsi | 7 +++++++ > arch/arm/boot/dts/meson6.dtsi | 7 ------- > arch/arm/boot/dts/meson8.dtsi | 24 +++++++++++++++++------- > arch/arm/boot/dts/meson8b-ec100.dts | 2 +- > arch/arm/boot/dts/meson8b-mxq.dts | 2 +- > arch/arm/boot/dts/meson8b-odroidc1.dts | 2 +- > arch/arm/boot/dts/meson8b.dtsi | 24 +++++++++++++++++------- > 7 files changed, 44 insertions(+), 24 deletions(-) _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel ^ permalink raw reply [flat|nested] 23+ messages in thread
* Re: [PATCH 0/3] ARM: dts: meson: clock updates 2019-12-12 15:48 ` Jerome Brunet (?) @ 2019-12-13 22:34 ` Kevin Hilman -1 siblings, 0 replies; 23+ messages in thread From: Kevin Hilman @ 2019-12-13 22:34 UTC (permalink / raw) To: Jerome Brunet, Martin Blumenstingl, linux-amlogic Cc: linux-arm-kernel, linux-kernel Jerome Brunet <jbrunet@baylibre.com> writes: > On Sun 08 Dec 2019 at 19:05, Martin Blumenstingl <martin.blumenstingl@googlemail.com> wrote: > >> This series moves the XTAL clock out of the main (HHI) clock controller >> because it's an actual dedicated crystal on the PCBs. >> >> The last two patches add the DDR clock controller whose output is used >> as input for some of the audio clocks. >> >> >> Dependencies: >> - patch #1 has a runtime dependency on my other series: >> "provide the XTAL clock via OF on Meson8/8b/8m2" [0] >> Jerome has already queued this for v5.6 >> - patches #2 and #3 have a compile time dependency on my other series: >> "add the DDR clock controller on Meson8 and Meson8b" [1] >> Jerome has already queued this for v5.6, but you need an immutable >> tag for the dt-bindings > > Bindings tag clk-meson-dt-v5.6-1 available with the necessary ids > branch v5.6/drivers with the actual driver changes Queued for v5.6, Kevin ^ permalink raw reply [flat|nested] 23+ messages in thread
* Re: [PATCH 0/3] ARM: dts: meson: clock updates @ 2019-12-13 22:34 ` Kevin Hilman 0 siblings, 0 replies; 23+ messages in thread From: Kevin Hilman @ 2019-12-13 22:34 UTC (permalink / raw) To: Jerome Brunet, Martin Blumenstingl, linux-amlogic Cc: linux-kernel, linux-arm-kernel Jerome Brunet <jbrunet@baylibre.com> writes: > On Sun 08 Dec 2019 at 19:05, Martin Blumenstingl <martin.blumenstingl@googlemail.com> wrote: > >> This series moves the XTAL clock out of the main (HHI) clock controller >> because it's an actual dedicated crystal on the PCBs. >> >> The last two patches add the DDR clock controller whose output is used >> as input for some of the audio clocks. >> >> >> Dependencies: >> - patch #1 has a runtime dependency on my other series: >> "provide the XTAL clock via OF on Meson8/8b/8m2" [0] >> Jerome has already queued this for v5.6 >> - patches #2 and #3 have a compile time dependency on my other series: >> "add the DDR clock controller on Meson8 and Meson8b" [1] >> Jerome has already queued this for v5.6, but you need an immutable >> tag for the dt-bindings > > Bindings tag clk-meson-dt-v5.6-1 available with the necessary ids > branch v5.6/drivers with the actual driver changes Queued for v5.6, Kevin _______________________________________________ linux-amlogic mailing list linux-amlogic@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-amlogic ^ permalink raw reply [flat|nested] 23+ messages in thread
* Re: [PATCH 0/3] ARM: dts: meson: clock updates @ 2019-12-13 22:34 ` Kevin Hilman 0 siblings, 0 replies; 23+ messages in thread From: Kevin Hilman @ 2019-12-13 22:34 UTC (permalink / raw) To: Jerome Brunet, Martin Blumenstingl, linux-amlogic Cc: linux-kernel, linux-arm-kernel Jerome Brunet <jbrunet@baylibre.com> writes: > On Sun 08 Dec 2019 at 19:05, Martin Blumenstingl <martin.blumenstingl@googlemail.com> wrote: > >> This series moves the XTAL clock out of the main (HHI) clock controller >> because it's an actual dedicated crystal on the PCBs. >> >> The last two patches add the DDR clock controller whose output is used >> as input for some of the audio clocks. >> >> >> Dependencies: >> - patch #1 has a runtime dependency on my other series: >> "provide the XTAL clock via OF on Meson8/8b/8m2" [0] >> Jerome has already queued this for v5.6 >> - patches #2 and #3 have a compile time dependency on my other series: >> "add the DDR clock controller on Meson8 and Meson8b" [1] >> Jerome has already queued this for v5.6, but you need an immutable >> tag for the dt-bindings > > Bindings tag clk-meson-dt-v5.6-1 available with the necessary ids > branch v5.6/drivers with the actual driver changes Queued for v5.6, Kevin _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel ^ permalink raw reply [flat|nested] 23+ messages in thread
* Re: [PATCH 0/3] ARM: dts: meson: clock updates 2019-12-08 18:05 ` Martin Blumenstingl ` (5 preceding siblings ...) (?) @ 2019-12-13 22:21 ` patchwork-bot+linux-amlogic -1 siblings, 0 replies; 23+ messages in thread From: patchwork-bot+linux-amlogic @ 2019-12-13 22:21 UTC (permalink / raw) To: Martin Blumenstingl; +Cc: linux-amlogic, khilman Hello: This series was applied to khilman/linux-amlogic.git (refs/heads/for-next). On Sun, 8 Dec 2019 19:05:22 +0100 you wrote: > This series moves the XTAL clock out of the main (HHI) clock controller > because it's an actual dedicated crystal on the PCBs. > > The last two patches add the DDR clock controller whose output is used > as input for some of the audio clocks. > > > [...] Here is a summary with links: - [1/3] ARM: dts: meson: provide the XTAL clock using a fixed-clock https://git.kernel.org/khilman/linux-amlogic/c/630ea3108adf0446b6b4194f3f42bc0bfe245d1d - [2/3] ARM: dts: meson8: add the DDR clock controller https://git.kernel.org/khilman/linux-amlogic/c/c4ac5c37a4a5c5ce94f70542d006568bd4b7d685 - [3/3] ARM: dts: meson8b: add the DDR clock controller https://git.kernel.org/khilman/linux-amlogic/c/6d549ff55c3717c4f5b0202a22c7404395559cec You are awesome, thank you! -- Deet-doot-dot, I am a bot. https://korg.wiki.kernel.org/userdoc/pwbot _______________________________________________ linux-amlogic mailing list linux-amlogic@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-amlogic ^ permalink raw reply [flat|nested] 23+ messages in thread
end of thread, other threads:[~2019-12-13 22:34 UTC | newest] Thread overview: 23+ messages (download: mbox.gz / follow: Atom feed) -- links below jump to the message on this page -- 2019-12-08 18:05 [PATCH 0/3] ARM: dts: meson: clock updates Martin Blumenstingl 2019-12-08 18:05 ` Martin Blumenstingl 2019-12-08 18:05 ` Martin Blumenstingl 2019-12-08 18:05 ` [PATCH 1/3] ARM: dts: meson: provide the XTAL clock using a fixed-clock Martin Blumenstingl 2019-12-08 18:05 ` Martin Blumenstingl 2019-12-08 18:05 ` Martin Blumenstingl 2019-12-08 18:05 ` [PATCH 2/3] ARM: dts: meson8: add the DDR clock controller Martin Blumenstingl 2019-12-08 18:05 ` Martin Blumenstingl 2019-12-08 18:05 ` Martin Blumenstingl 2019-12-09 3:20 ` kbuild test robot 2019-12-09 3:20 ` kbuild test robot 2019-12-09 3:20 ` kbuild test robot 2019-12-09 3:20 ` kbuild test robot 2019-12-08 18:05 ` [PATCH 3/3] ARM: dts: meson8b: " Martin Blumenstingl 2019-12-08 18:05 ` Martin Blumenstingl 2019-12-08 18:05 ` Martin Blumenstingl 2019-12-12 15:48 ` [PATCH 0/3] ARM: dts: meson: clock updates Jerome Brunet 2019-12-12 15:48 ` Jerome Brunet 2019-12-12 15:48 ` Jerome Brunet 2019-12-13 22:34 ` Kevin Hilman 2019-12-13 22:34 ` Kevin Hilman 2019-12-13 22:34 ` Kevin Hilman 2019-12-13 22:21 ` patchwork-bot+linux-amlogic
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