* [PATCH 1/2] pinctrl: intel: Add GPIO <-> pin mapping ranges via callback
@ 2020-01-09 7:53 Linus Walleij
2020-01-09 7:53 ` [PATCH 2/2] pinctrl: intel: Pass irqchip when adding gpiochip Linus Walleij
` (2 more replies)
0 siblings, 3 replies; 6+ messages in thread
From: Linus Walleij @ 2020-01-09 7:53 UTC (permalink / raw)
To: linux-kernel, linux-gpio
Cc: Andy Shevchenko, Mika Westerberg, Mathias Nyman, Linus Walleij,
Hans de Goede
When IRQ chip is instantiated via GPIO library flow, the few functions,
in particular the ACPI event registration mechanism, on some of ACPI based
platforms expect that the pin ranges are initialized to that point.
Add GPIO <-> pin mapping ranges via callback in the GPIO library flow.
Cc: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
---
Please apply this to the Intel pinctrl tree when you're pleased
with it!
---
drivers/pinctrl/intel/pinctrl-intel.c | 35 +++++++++++++++++----------
1 file changed, 22 insertions(+), 13 deletions(-)
diff --git a/drivers/pinctrl/intel/pinctrl-intel.c b/drivers/pinctrl/intel/pinctrl-intel.c
index 4860bc9a4e48..b479bcf1e246 100644
--- a/drivers/pinctrl/intel/pinctrl-intel.c
+++ b/drivers/pinctrl/intel/pinctrl-intel.c
@@ -1160,8 +1160,8 @@ static irqreturn_t intel_gpio_irq(int irq, void *data)
return ret;
}
-static int intel_gpio_add_pin_ranges(struct intel_pinctrl *pctrl,
- const struct intel_community *community)
+static int intel_gpio_add_community_ranges(struct intel_pinctrl *pctrl,
+ const struct intel_community *community)
{
int ret = 0, i;
@@ -1181,6 +1181,24 @@ static int intel_gpio_add_pin_ranges(struct intel_pinctrl *pctrl,
return ret;
}
+static int intel_gpio_add_pin_ranges(struct gpio_chip *gc)
+{
+ struct intel_pinctrl *pctrl = gpiochip_get_data(gc);
+ int ret, i;
+
+ for (i = 0; i < pctrl->ncommunities; i++) {
+ struct intel_community *community = &pctrl->communities[i];
+
+ ret = intel_gpio_add_community_ranges(pctrl, community);
+ if (ret) {
+ dev_err(pctrl->dev, "failed to add GPIO pin range\n");
+ return ret;
+ }
+ }
+
+ return 0;
+}
+
static unsigned int intel_gpio_ngpio(const struct intel_pinctrl *pctrl)
{
const struct intel_community *community;
@@ -1205,7 +1223,7 @@ static unsigned int intel_gpio_ngpio(const struct intel_pinctrl *pctrl)
static int intel_gpio_probe(struct intel_pinctrl *pctrl, int irq)
{
- int ret, i;
+ int ret;
pctrl->chip = intel_gpio_chip;
@@ -1214,6 +1232,7 @@ static int intel_gpio_probe(struct intel_pinctrl *pctrl, int irq)
pctrl->chip.label = dev_name(pctrl->dev);
pctrl->chip.parent = pctrl->dev;
pctrl->chip.base = -1;
+ pctrl->chip.add_pin_ranges = intel_gpio_add_pin_ranges;
pctrl->irq = irq;
/* Setup IRQ chip */
@@ -1231,16 +1250,6 @@ static int intel_gpio_probe(struct intel_pinctrl *pctrl, int irq)
return ret;
}
- for (i = 0; i < pctrl->ncommunities; i++) {
- struct intel_community *community = &pctrl->communities[i];
-
- ret = intel_gpio_add_pin_ranges(pctrl, community);
- if (ret) {
- dev_err(pctrl->dev, "failed to add GPIO pin range\n");
- return ret;
- }
- }
-
/*
* We need to request the interrupt here (instead of providing chip
* to the irq directly) because on some platforms several GPIO
--
2.23.0
^ permalink raw reply related [flat|nested] 6+ messages in thread
* [PATCH 2/2] pinctrl: intel: Pass irqchip when adding gpiochip
2020-01-09 7:53 [PATCH 1/2] pinctrl: intel: Add GPIO <-> pin mapping ranges via callback Linus Walleij
@ 2020-01-09 7:53 ` Linus Walleij
2020-01-09 10:22 ` Mika Westerberg
2020-01-09 11:13 ` Andy Shevchenko
2020-01-09 10:21 ` [PATCH 1/2] pinctrl: intel: Add GPIO <-> pin mapping ranges via callback Mika Westerberg
2020-01-09 11:13 ` Andy Shevchenko
2 siblings, 2 replies; 6+ messages in thread
From: Linus Walleij @ 2020-01-09 7:53 UTC (permalink / raw)
To: linux-kernel, linux-gpio
Cc: Andy Shevchenko, Mika Westerberg, Mathias Nyman, Linus Walleij,
Hans de Goede
We need to convert all old gpio irqchips to pass the irqchip
setup along when adding the gpio_chip. For more info see
drivers/gpio/TODO.
For chained irqchips this is a pretty straight-forward conversion.
Cc: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
---
Please apply this to the Intel pinctrl tree when you are
happy with the result!
---
drivers/pinctrl/intel/pinctrl-intel.c | 26 +++++++++++++-------------
1 file changed, 13 insertions(+), 13 deletions(-)
diff --git a/drivers/pinctrl/intel/pinctrl-intel.c b/drivers/pinctrl/intel/pinctrl-intel.c
index b479bcf1e246..ffacd77861f7 100644
--- a/drivers/pinctrl/intel/pinctrl-intel.c
+++ b/drivers/pinctrl/intel/pinctrl-intel.c
@@ -1224,6 +1224,7 @@ static unsigned int intel_gpio_ngpio(const struct intel_pinctrl *pctrl)
static int intel_gpio_probe(struct intel_pinctrl *pctrl, int irq)
{
int ret;
+ struct gpio_irq_chip *girq;
pctrl->chip = intel_gpio_chip;
@@ -1244,16 +1245,9 @@ static int intel_gpio_probe(struct intel_pinctrl *pctrl, int irq)
pctrl->irqchip.irq_set_wake = intel_gpio_irq_wake;
pctrl->irqchip.flags = IRQCHIP_MASK_ON_SUSPEND;
- ret = devm_gpiochip_add_data(pctrl->dev, &pctrl->chip, pctrl);
- if (ret) {
- dev_err(pctrl->dev, "failed to register gpiochip\n");
- return ret;
- }
-
/*
- * We need to request the interrupt here (instead of providing chip
- * to the irq directly) because on some platforms several GPIO
- * controllers share the same interrupt line.
+ * On some platforms several GPIO controllers share the same interrupt
+ * line.
*/
ret = devm_request_irq(pctrl->dev, irq, intel_gpio_irq,
IRQF_SHARED | IRQF_NO_THREAD,
@@ -1263,14 +1257,20 @@ static int intel_gpio_probe(struct intel_pinctrl *pctrl, int irq)
return ret;
}
- ret = gpiochip_irqchip_add(&pctrl->chip, &pctrl->irqchip, 0,
- handle_bad_irq, IRQ_TYPE_NONE);
+ girq = &pctrl->chip.irq;
+ girq->chip = &pctrl->irqchip;
+ /* This will let us handle the IRQ in the driver */
+ girq->parent_handler = NULL;
+ girq->num_parents = 0;
+ girq->default_type = IRQ_TYPE_NONE;
+ girq->handler = handle_bad_irq;
+
+ ret = devm_gpiochip_add_data(pctrl->dev, &pctrl->chip, pctrl);
if (ret) {
- dev_err(pctrl->dev, "failed to add irqchip\n");
+ dev_err(pctrl->dev, "failed to register gpiochip\n");
return ret;
}
- gpiochip_set_chained_irqchip(&pctrl->chip, &pctrl->irqchip, irq, NULL);
return 0;
}
--
2.23.0
^ permalink raw reply related [flat|nested] 6+ messages in thread
* Re: [PATCH 1/2] pinctrl: intel: Add GPIO <-> pin mapping ranges via callback
2020-01-09 7:53 [PATCH 1/2] pinctrl: intel: Add GPIO <-> pin mapping ranges via callback Linus Walleij
2020-01-09 7:53 ` [PATCH 2/2] pinctrl: intel: Pass irqchip when adding gpiochip Linus Walleij
@ 2020-01-09 10:21 ` Mika Westerberg
2020-01-09 11:13 ` Andy Shevchenko
2 siblings, 0 replies; 6+ messages in thread
From: Mika Westerberg @ 2020-01-09 10:21 UTC (permalink / raw)
To: Linus Walleij
Cc: linux-kernel, linux-gpio, Andy Shevchenko, Mathias Nyman, Hans de Goede
On Thu, Jan 09, 2020 at 08:53:28AM +0100, Linus Walleij wrote:
> When IRQ chip is instantiated via GPIO library flow, the few functions,
> in particular the ACPI event registration mechanism, on some of ACPI based
> platforms expect that the pin ranges are initialized to that point.
>
> Add GPIO <-> pin mapping ranges via callback in the GPIO library flow.
>
> Cc: Hans de Goede <hdegoede@redhat.com>
> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [PATCH 2/2] pinctrl: intel: Pass irqchip when adding gpiochip
2020-01-09 7:53 ` [PATCH 2/2] pinctrl: intel: Pass irqchip when adding gpiochip Linus Walleij
@ 2020-01-09 10:22 ` Mika Westerberg
2020-01-09 11:13 ` Andy Shevchenko
1 sibling, 0 replies; 6+ messages in thread
From: Mika Westerberg @ 2020-01-09 10:22 UTC (permalink / raw)
To: Linus Walleij
Cc: linux-kernel, linux-gpio, Andy Shevchenko, Mathias Nyman, Hans de Goede
On Thu, Jan 09, 2020 at 08:53:29AM +0100, Linus Walleij wrote:
> We need to convert all old gpio irqchips to pass the irqchip
> setup along when adding the gpio_chip. For more info see
> drivers/gpio/TODO.
>
> For chained irqchips this is a pretty straight-forward conversion.
>
> Cc: Hans de Goede <hdegoede@redhat.com>
> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [PATCH 1/2] pinctrl: intel: Add GPIO <-> pin mapping ranges via callback
2020-01-09 7:53 [PATCH 1/2] pinctrl: intel: Add GPIO <-> pin mapping ranges via callback Linus Walleij
2020-01-09 7:53 ` [PATCH 2/2] pinctrl: intel: Pass irqchip when adding gpiochip Linus Walleij
2020-01-09 10:21 ` [PATCH 1/2] pinctrl: intel: Add GPIO <-> pin mapping ranges via callback Mika Westerberg
@ 2020-01-09 11:13 ` Andy Shevchenko
2 siblings, 0 replies; 6+ messages in thread
From: Andy Shevchenko @ 2020-01-09 11:13 UTC (permalink / raw)
To: Linus Walleij
Cc: linux-kernel, linux-gpio, Mika Westerberg, Mathias Nyman, Hans de Goede
On Thu, Jan 09, 2020 at 08:53:28AM +0100, Linus Walleij wrote:
> When IRQ chip is instantiated via GPIO library flow, the few functions,
> in particular the ACPI event registration mechanism, on some of ACPI based
> platforms expect that the pin ranges are initialized to that point.
>
> Add GPIO <-> pin mapping ranges via callback in the GPIO library flow.
>
Pushed to my review and testing queue, thanks!
> Cc: Hans de Goede <hdegoede@redhat.com>
> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
> ---
> Please apply this to the Intel pinctrl tree when you're pleased
> with it!
> ---
> drivers/pinctrl/intel/pinctrl-intel.c | 35 +++++++++++++++++----------
> 1 file changed, 22 insertions(+), 13 deletions(-)
>
> diff --git a/drivers/pinctrl/intel/pinctrl-intel.c b/drivers/pinctrl/intel/pinctrl-intel.c
> index 4860bc9a4e48..b479bcf1e246 100644
> --- a/drivers/pinctrl/intel/pinctrl-intel.c
> +++ b/drivers/pinctrl/intel/pinctrl-intel.c
> @@ -1160,8 +1160,8 @@ static irqreturn_t intel_gpio_irq(int irq, void *data)
> return ret;
> }
>
> -static int intel_gpio_add_pin_ranges(struct intel_pinctrl *pctrl,
> - const struct intel_community *community)
> +static int intel_gpio_add_community_ranges(struct intel_pinctrl *pctrl,
> + const struct intel_community *community)
> {
> int ret = 0, i;
>
> @@ -1181,6 +1181,24 @@ static int intel_gpio_add_pin_ranges(struct intel_pinctrl *pctrl,
> return ret;
> }
>
> +static int intel_gpio_add_pin_ranges(struct gpio_chip *gc)
> +{
> + struct intel_pinctrl *pctrl = gpiochip_get_data(gc);
> + int ret, i;
> +
> + for (i = 0; i < pctrl->ncommunities; i++) {
> + struct intel_community *community = &pctrl->communities[i];
> +
> + ret = intel_gpio_add_community_ranges(pctrl, community);
> + if (ret) {
> + dev_err(pctrl->dev, "failed to add GPIO pin range\n");
> + return ret;
> + }
> + }
> +
> + return 0;
> +}
> +
> static unsigned int intel_gpio_ngpio(const struct intel_pinctrl *pctrl)
> {
> const struct intel_community *community;
> @@ -1205,7 +1223,7 @@ static unsigned int intel_gpio_ngpio(const struct intel_pinctrl *pctrl)
>
> static int intel_gpio_probe(struct intel_pinctrl *pctrl, int irq)
> {
> - int ret, i;
> + int ret;
>
> pctrl->chip = intel_gpio_chip;
>
> @@ -1214,6 +1232,7 @@ static int intel_gpio_probe(struct intel_pinctrl *pctrl, int irq)
> pctrl->chip.label = dev_name(pctrl->dev);
> pctrl->chip.parent = pctrl->dev;
> pctrl->chip.base = -1;
> + pctrl->chip.add_pin_ranges = intel_gpio_add_pin_ranges;
> pctrl->irq = irq;
>
> /* Setup IRQ chip */
> @@ -1231,16 +1250,6 @@ static int intel_gpio_probe(struct intel_pinctrl *pctrl, int irq)
> return ret;
> }
>
> - for (i = 0; i < pctrl->ncommunities; i++) {
> - struct intel_community *community = &pctrl->communities[i];
> -
> - ret = intel_gpio_add_pin_ranges(pctrl, community);
> - if (ret) {
> - dev_err(pctrl->dev, "failed to add GPIO pin range\n");
> - return ret;
> - }
> - }
> -
> /*
> * We need to request the interrupt here (instead of providing chip
> * to the irq directly) because on some platforms several GPIO
> --
> 2.23.0
>
--
With Best Regards,
Andy Shevchenko
^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [PATCH 2/2] pinctrl: intel: Pass irqchip when adding gpiochip
2020-01-09 7:53 ` [PATCH 2/2] pinctrl: intel: Pass irqchip when adding gpiochip Linus Walleij
2020-01-09 10:22 ` Mika Westerberg
@ 2020-01-09 11:13 ` Andy Shevchenko
1 sibling, 0 replies; 6+ messages in thread
From: Andy Shevchenko @ 2020-01-09 11:13 UTC (permalink / raw)
To: Linus Walleij
Cc: linux-kernel, linux-gpio, Mika Westerberg, Mathias Nyman, Hans de Goede
On Thu, Jan 09, 2020 at 08:53:29AM +0100, Linus Walleij wrote:
> We need to convert all old gpio irqchips to pass the irqchip
> setup along when adding the gpio_chip. For more info see
> drivers/gpio/TODO.
>
> For chained irqchips this is a pretty straight-forward conversion.
>
Pushed to my review and testing queue, thanks!
> Cc: Hans de Goede <hdegoede@redhat.com>
> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
> ---
> Please apply this to the Intel pinctrl tree when you are
> happy with the result!
> ---
> drivers/pinctrl/intel/pinctrl-intel.c | 26 +++++++++++++-------------
> 1 file changed, 13 insertions(+), 13 deletions(-)
>
> diff --git a/drivers/pinctrl/intel/pinctrl-intel.c b/drivers/pinctrl/intel/pinctrl-intel.c
> index b479bcf1e246..ffacd77861f7 100644
> --- a/drivers/pinctrl/intel/pinctrl-intel.c
> +++ b/drivers/pinctrl/intel/pinctrl-intel.c
> @@ -1224,6 +1224,7 @@ static unsigned int intel_gpio_ngpio(const struct intel_pinctrl *pctrl)
> static int intel_gpio_probe(struct intel_pinctrl *pctrl, int irq)
> {
> int ret;
> + struct gpio_irq_chip *girq;
>
> pctrl->chip = intel_gpio_chip;
>
> @@ -1244,16 +1245,9 @@ static int intel_gpio_probe(struct intel_pinctrl *pctrl, int irq)
> pctrl->irqchip.irq_set_wake = intel_gpio_irq_wake;
> pctrl->irqchip.flags = IRQCHIP_MASK_ON_SUSPEND;
>
> - ret = devm_gpiochip_add_data(pctrl->dev, &pctrl->chip, pctrl);
> - if (ret) {
> - dev_err(pctrl->dev, "failed to register gpiochip\n");
> - return ret;
> - }
> -
> /*
> - * We need to request the interrupt here (instead of providing chip
> - * to the irq directly) because on some platforms several GPIO
> - * controllers share the same interrupt line.
> + * On some platforms several GPIO controllers share the same interrupt
> + * line.
> */
> ret = devm_request_irq(pctrl->dev, irq, intel_gpio_irq,
> IRQF_SHARED | IRQF_NO_THREAD,
> @@ -1263,14 +1257,20 @@ static int intel_gpio_probe(struct intel_pinctrl *pctrl, int irq)
> return ret;
> }
>
> - ret = gpiochip_irqchip_add(&pctrl->chip, &pctrl->irqchip, 0,
> - handle_bad_irq, IRQ_TYPE_NONE);
> + girq = &pctrl->chip.irq;
> + girq->chip = &pctrl->irqchip;
> + /* This will let us handle the IRQ in the driver */
> + girq->parent_handler = NULL;
> + girq->num_parents = 0;
> + girq->default_type = IRQ_TYPE_NONE;
> + girq->handler = handle_bad_irq;
> +
> + ret = devm_gpiochip_add_data(pctrl->dev, &pctrl->chip, pctrl);
> if (ret) {
> - dev_err(pctrl->dev, "failed to add irqchip\n");
> + dev_err(pctrl->dev, "failed to register gpiochip\n");
> return ret;
> }
>
> - gpiochip_set_chained_irqchip(&pctrl->chip, &pctrl->irqchip, irq, NULL);
> return 0;
> }
>
> --
> 2.23.0
>
--
With Best Regards,
Andy Shevchenko
^ permalink raw reply [flat|nested] 6+ messages in thread
end of thread, other threads:[~2020-01-09 11:13 UTC | newest]
Thread overview: 6+ messages (download: mbox.gz / follow: Atom feed)
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2020-01-09 7:53 [PATCH 1/2] pinctrl: intel: Add GPIO <-> pin mapping ranges via callback Linus Walleij
2020-01-09 7:53 ` [PATCH 2/2] pinctrl: intel: Pass irqchip when adding gpiochip Linus Walleij
2020-01-09 10:22 ` Mika Westerberg
2020-01-09 11:13 ` Andy Shevchenko
2020-01-09 10:21 ` [PATCH 1/2] pinctrl: intel: Add GPIO <-> pin mapping ranges via callback Mika Westerberg
2020-01-09 11:13 ` Andy Shevchenko
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