From: Remi Pommarel <repk@triplefau.lt> To: Kishon Vijay Abraham I <kishon@ti.com>, Yue Wang <yue.wang@Amlogic.com>, Kevin Hilman <khilman@baylibre.com>, Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>, Bjorn Helgaas <bhelgaas@google.com>, Neil Armstrong <narmstrong@baylibre.com>, Martin Blumenstingl <martin.blumenstingl@googlemail.com>, Rob Herring <robh+dt@kernel.org> Cc: Jerome Brunet <jbrunet@baylibre.com>, linux-amlogic@lists.infradead.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, Remi Pommarel <repk@triplefau.lt> Subject: [PATCH v4 0/7] PCI: amlogic: Make PCIe working reliably on AXG platforms Date: Wed, 15 Jan 2020 13:29:01 +0100 [thread overview] Message-ID: <20200115122908.16954-1-repk@triplefau.lt> (raw) PCIe device probing failures have been seen on AXG platforms and were due to unreliable clock signal output. Setting HHI_MIPI_CNTL0[26] bit in MIPI's PHY registers solved the problem. This bit controls band gap reference. As discussed here [1] one of these shared MIPI/PCIE PHY register bits was implemented in the clock driver as CLKID_MIPI_ENABLE. This adds a PHY driver to control this bit instead, as well as setting the band gap one in order to get reliable PCIE communication. While at it add another PHY driver to control PCIE only PHY registers, making AXG code more similar to G12A platform thus allowing to remove some specific platform handling in pci-meson driver. Please note that CLKID_MIPI_ENABLE removable will be done in a different serie. Changes since v3: - Go back to the shared MIPI/PCIe phy driver solution from v2 - Remove syscon usage - Add all dt-bindings documentation Changes since v2: - Remove shared MIPI/PCIE device driver and use syscon to access register in PCIE only driver instead - Include devicetree documentation Changes sinve v1: - Move HHI_MIPI_CNTL0 bit control in its own PHY driver - Add a PHY driver for PCIE_PHY registers - Modify pci-meson.c to make use of both PHYs and remove specific handling for AXG and G12A [1] https://lkml.org/lkml/2019/12/16/119 Remi Pommarel (7): dt-bindings: Add AXG PCIE PHY bindings dt-bindings: Add AXG shared MIPI/PCIE PHY bindings dt-bindings: PCI: meson: Update PCIE bindings documentation arm64: dts: meson-axg: Add PCIE PHY nodes phy: amlogic: Add Amlogic AXG MIPI/PCIE PHY Driver phy: amlogic: Add Amlogic AXG PCIE PHY Driver PCI: amlogic: Use AXG PCIE and shared MIPI/PCIE PHYs .../bindings/pci/amlogic,meson-pcie.txt | 22 +-- .../phy/amlogic,meson-axg-mipi-pcie.yaml | 34 ++++ .../bindings/phy/amlogic,meson-axg-pcie.yaml | 40 ++++ arch/arm64/boot/dts/amlogic/meson-axg.dtsi | 13 ++ drivers/pci/controller/dwc/pci-meson.c | 140 +++++--------- drivers/phy/amlogic/Kconfig | 22 +++ drivers/phy/amlogic/Makefile | 2 + drivers/phy/amlogic/phy-meson-axg-mipi-pcie.c | 179 ++++++++++++++++++ drivers/phy/amlogic/phy-meson-axg-pcie.c | 163 ++++++++++++++++ 9 files changed, 508 insertions(+), 107 deletions(-) create mode 100644 Documentation/devicetree/bindings/phy/amlogic,meson-axg-mipi-pcie.yaml create mode 100644 Documentation/devicetree/bindings/phy/amlogic,meson-axg-pcie.yaml create mode 100644 drivers/phy/amlogic/phy-meson-axg-mipi-pcie.c create mode 100644 drivers/phy/amlogic/phy-meson-axg-pcie.c -- 2.24.1
WARNING: multiple messages have this Message-ID (diff)
From: Remi Pommarel <repk@triplefau.lt> To: Kishon Vijay Abraham I <kishon@ti.com>, Yue Wang <yue.wang@Amlogic.com>, Kevin Hilman <khilman@baylibre.com>, Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>, Bjorn Helgaas <bhelgaas@google.com>, Neil Armstrong <narmstrong@baylibre.com>, Martin Blumenstingl <martin.blumenstingl@googlemail.com>, Rob Herring <robh+dt@kernel.org> Cc: linux-amlogic@lists.infradead.org, devicetree@vger.kernel.org, Remi Pommarel <repk@triplefau.lt>, linux-kernel@vger.kernel.org, Jerome Brunet <jbrunet@baylibre.com> Subject: [PATCH v4 0/7] PCI: amlogic: Make PCIe working reliably on AXG platforms Date: Wed, 15 Jan 2020 13:29:01 +0100 [thread overview] Message-ID: <20200115122908.16954-1-repk@triplefau.lt> (raw) PCIe device probing failures have been seen on AXG platforms and were due to unreliable clock signal output. Setting HHI_MIPI_CNTL0[26] bit in MIPI's PHY registers solved the problem. This bit controls band gap reference. As discussed here [1] one of these shared MIPI/PCIE PHY register bits was implemented in the clock driver as CLKID_MIPI_ENABLE. This adds a PHY driver to control this bit instead, as well as setting the band gap one in order to get reliable PCIE communication. While at it add another PHY driver to control PCIE only PHY registers, making AXG code more similar to G12A platform thus allowing to remove some specific platform handling in pci-meson driver. Please note that CLKID_MIPI_ENABLE removable will be done in a different serie. Changes since v3: - Go back to the shared MIPI/PCIe phy driver solution from v2 - Remove syscon usage - Add all dt-bindings documentation Changes since v2: - Remove shared MIPI/PCIE device driver and use syscon to access register in PCIE only driver instead - Include devicetree documentation Changes sinve v1: - Move HHI_MIPI_CNTL0 bit control in its own PHY driver - Add a PHY driver for PCIE_PHY registers - Modify pci-meson.c to make use of both PHYs and remove specific handling for AXG and G12A [1] https://lkml.org/lkml/2019/12/16/119 Remi Pommarel (7): dt-bindings: Add AXG PCIE PHY bindings dt-bindings: Add AXG shared MIPI/PCIE PHY bindings dt-bindings: PCI: meson: Update PCIE bindings documentation arm64: dts: meson-axg: Add PCIE PHY nodes phy: amlogic: Add Amlogic AXG MIPI/PCIE PHY Driver phy: amlogic: Add Amlogic AXG PCIE PHY Driver PCI: amlogic: Use AXG PCIE and shared MIPI/PCIE PHYs .../bindings/pci/amlogic,meson-pcie.txt | 22 +-- .../phy/amlogic,meson-axg-mipi-pcie.yaml | 34 ++++ .../bindings/phy/amlogic,meson-axg-pcie.yaml | 40 ++++ arch/arm64/boot/dts/amlogic/meson-axg.dtsi | 13 ++ drivers/pci/controller/dwc/pci-meson.c | 140 +++++--------- drivers/phy/amlogic/Kconfig | 22 +++ drivers/phy/amlogic/Makefile | 2 + drivers/phy/amlogic/phy-meson-axg-mipi-pcie.c | 179 ++++++++++++++++++ drivers/phy/amlogic/phy-meson-axg-pcie.c | 163 ++++++++++++++++ 9 files changed, 508 insertions(+), 107 deletions(-) create mode 100644 Documentation/devicetree/bindings/phy/amlogic,meson-axg-mipi-pcie.yaml create mode 100644 Documentation/devicetree/bindings/phy/amlogic,meson-axg-pcie.yaml create mode 100644 drivers/phy/amlogic/phy-meson-axg-mipi-pcie.c create mode 100644 drivers/phy/amlogic/phy-meson-axg-pcie.c -- 2.24.1 _______________________________________________ linux-amlogic mailing list linux-amlogic@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-amlogic
next reply other threads:[~2020-01-15 12:21 UTC|newest] Thread overview: 24+ messages / expand[flat|nested] mbox.gz Atom feed top 2020-01-15 12:29 Remi Pommarel [this message] 2020-01-15 12:29 ` [PATCH v4 0/7] PCI: amlogic: Make PCIe working reliably on AXG platforms Remi Pommarel 2020-01-15 12:29 ` [PATCH v4 1/7] dt-bindings: Add AXG PCIE PHY bindings Remi Pommarel 2020-01-15 12:29 ` Remi Pommarel 2020-01-15 12:29 ` [PATCH v4 2/7] dt-bindings: Add AXG shared MIPI/PCIE " Remi Pommarel 2020-01-15 12:29 ` Remi Pommarel 2020-01-21 23:05 ` Rob Herring 2020-01-21 23:05 ` Rob Herring 2020-01-21 23:08 ` Rob Herring 2020-01-21 23:08 ` Rob Herring 2020-01-15 12:29 ` [PATCH v4 3/7] dt-bindings: PCI: meson: Update PCIE bindings documentation Remi Pommarel 2020-01-15 12:29 ` Remi Pommarel 2020-01-15 12:29 ` [PATCH v4 4/7] arm64: dts: meson-axg: Add PCIE PHY nodes Remi Pommarel 2020-01-15 12:29 ` Remi Pommarel 2020-01-15 12:29 ` [PATCH v4 5/7] phy: amlogic: Add Amlogic AXG MIPI/PCIE PHY Driver Remi Pommarel 2020-01-15 12:29 ` Remi Pommarel 2020-01-15 12:29 ` [PATCH v4 6/7] phy: amlogic: Add Amlogic AXG PCIE " Remi Pommarel 2020-01-15 12:29 ` Remi Pommarel 2020-01-15 12:29 ` [PATCH v4 7/7] PCI: amlogic: Use AXG PCIE and shared MIPI/PCIE PHYs Remi Pommarel 2020-01-15 12:29 ` Remi Pommarel 2020-01-15 12:30 ` Neil Armstrong 2020-01-15 12:30 ` Neil Armstrong 2020-01-15 13:40 ` Remi Pommarel 2020-01-15 13:40 ` Remi Pommarel
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