* [Intel-gfx] [PATCH v1] drm/i915: Ensure no conflicts with BIOS when updating Dbuf
@ 2020-02-12 15:25 Stanislav Lisovskiy
2020-02-12 15:36 ` Jani Nikula
` (2 more replies)
0 siblings, 3 replies; 6+ messages in thread
From: Stanislav Lisovskiy @ 2020-02-12 15:25 UTC (permalink / raw)
To: intel-gfx
TGL BIOS seems to enable both DBuf slices ocasionally, depending
how many displays are connected, while i915 according to BSpec
was powering on S1 DBuf slice, until a modeset was done.
This was causing a brief flash during the boot as we were
disabling slice, previously used by BIOS with that.
To prevent this, now we are ensuring tht we are enabling
_at least_ one slice, but if there are more, let's not
power them off.
Fixes: ff2cd8635e41 ("drm/i915: Correctly map DBUF slices to pipes")
Signed-off-by: Stanislav Lisovskiy <stanislav.lisovskiy@intel.com>
---
drivers/gpu/drm/i915/display/intel_display_power.c | 6 ++++--
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_display_power.c b/drivers/gpu/drm/i915/display/intel_display_power.c
index 53056def5414..b9a9cbad8a03 100644
--- a/drivers/gpu/drm/i915/display/intel_display_power.c
+++ b/drivers/gpu/drm/i915/display/intel_display_power.c
@@ -4470,11 +4470,13 @@ void icl_dbuf_slices_update(struct drm_i915_private *dev_priv,
static void icl_dbuf_enable(struct drm_i915_private *dev_priv)
{
+ skl_ddb_get_hw_state(dev_priv);
/*
- * Just power up 1 slice, we will
+ * Just power up at least 1 slice, we will
* figure out later which slices we have and what we need.
*/
- icl_dbuf_slices_update(dev_priv, BIT(DBUF_S1));
+ icl_dbuf_slices_update(dev_priv, dev_priv->enabled_dbuf_slices_mask |
+ BIT(DBUF_S1));
}
static void icl_dbuf_disable(struct drm_i915_private *dev_priv)
--
2.24.1.485.gad05a3d8e5
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^ permalink raw reply related [flat|nested] 6+ messages in thread* Re: [Intel-gfx] [PATCH v1] drm/i915: Ensure no conflicts with BIOS when updating Dbuf 2020-02-12 15:25 [Intel-gfx] [PATCH v1] drm/i915: Ensure no conflicts with BIOS when updating Dbuf Stanislav Lisovskiy @ 2020-02-12 15:36 ` Jani Nikula 2020-02-12 15:51 ` Ville Syrjälä 2020-02-12 15:52 ` Lisovskiy, Stanislav 2020-02-13 4:38 ` [Intel-gfx] ✓ Fi.CI.BAT: success for " Patchwork 2020-02-16 14:03 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork 2 siblings, 2 replies; 6+ messages in thread From: Jani Nikula @ 2020-02-12 15:36 UTC (permalink / raw) To: Stanislav Lisovskiy, intel-gfx On Wed, 12 Feb 2020, Stanislav Lisovskiy <stanislav.lisovskiy@intel.com> wrote: > TGL BIOS seems to enable both DBuf slices ocasionally, depending > how many displays are connected, while i915 according to BSpec > was powering on S1 DBuf slice, until a modeset was done. > > This was causing a brief flash during the boot as we were > disabling slice, previously used by BIOS with that. > > To prevent this, now we are ensuring tht we are enabling > _at least_ one slice, but if there are more, let's not > power them off. > > Fixes: ff2cd8635e41 ("drm/i915: Correctly map DBUF slices to pipes") > Signed-off-by: Stanislav Lisovskiy <stanislav.lisovskiy@intel.com> > --- > drivers/gpu/drm/i915/display/intel_display_power.c | 6 ++++-- > 1 file changed, 4 insertions(+), 2 deletions(-) > > diff --git a/drivers/gpu/drm/i915/display/intel_display_power.c b/drivers/gpu/drm/i915/display/intel_display_power.c > index 53056def5414..b9a9cbad8a03 100644 > --- a/drivers/gpu/drm/i915/display/intel_display_power.c > +++ b/drivers/gpu/drm/i915/display/intel_display_power.c > @@ -4470,11 +4470,13 @@ void icl_dbuf_slices_update(struct drm_i915_private *dev_priv, > > static void icl_dbuf_enable(struct drm_i915_private *dev_priv) > { > + skl_ddb_get_hw_state(dev_priv); > /* > - * Just power up 1 slice, we will > + * Just power up at least 1 slice, we will > * figure out later which slices we have and what we need. > */ > - icl_dbuf_slices_update(dev_priv, BIT(DBUF_S1)); > + icl_dbuf_slices_update(dev_priv, dev_priv->enabled_dbuf_slices_mask | > + BIT(DBUF_S1)); I don't know anything about this, but it seems obvious to me the enabling code should not do hardware readout; they should be separated from a much higher level. BR, Jani. > } > > static void icl_dbuf_disable(struct drm_i915_private *dev_priv) -- Jani Nikula, Intel Open Source Graphics Center _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [Intel-gfx] [PATCH v1] drm/i915: Ensure no conflicts with BIOS when updating Dbuf 2020-02-12 15:36 ` Jani Nikula @ 2020-02-12 15:51 ` Ville Syrjälä 2020-02-12 15:52 ` Lisovskiy, Stanislav 1 sibling, 0 replies; 6+ messages in thread From: Ville Syrjälä @ 2020-02-12 15:51 UTC (permalink / raw) To: Jani Nikula; +Cc: intel-gfx On Wed, Feb 12, 2020 at 05:36:40PM +0200, Jani Nikula wrote: > On Wed, 12 Feb 2020, Stanislav Lisovskiy <stanislav.lisovskiy@intel.com> wrote: > > TGL BIOS seems to enable both DBuf slices ocasionally, depending > > how many displays are connected, while i915 according to BSpec > > was powering on S1 DBuf slice, until a modeset was done. > > > > This was causing a brief flash during the boot as we were > > disabling slice, previously used by BIOS with that. > > > > To prevent this, now we are ensuring tht we are enabling > > _at least_ one slice, but if there are more, let's not > > power them off. > > > > Fixes: ff2cd8635e41 ("drm/i915: Correctly map DBUF slices to pipes") > > Signed-off-by: Stanislav Lisovskiy <stanislav.lisovskiy@intel.com> > > --- > > drivers/gpu/drm/i915/display/intel_display_power.c | 6 ++++-- > > 1 file changed, 4 insertions(+), 2 deletions(-) > > > > diff --git a/drivers/gpu/drm/i915/display/intel_display_power.c b/drivers/gpu/drm/i915/display/intel_display_power.c > > index 53056def5414..b9a9cbad8a03 100644 > > --- a/drivers/gpu/drm/i915/display/intel_display_power.c > > +++ b/drivers/gpu/drm/i915/display/intel_display_power.c > > @@ -4470,11 +4470,13 @@ void icl_dbuf_slices_update(struct drm_i915_private *dev_priv, > > > > static void icl_dbuf_enable(struct drm_i915_private *dev_priv) > > { > > + skl_ddb_get_hw_state(dev_priv); > > /* > > - * Just power up 1 slice, we will > > + * Just power up at least 1 slice, we will > > * figure out later which slices we have and what we need. > > */ > > - icl_dbuf_slices_update(dev_priv, BIT(DBUF_S1)); > > + icl_dbuf_slices_update(dev_priv, dev_priv->enabled_dbuf_slices_mask | > > + BIT(DBUF_S1)); > > I don't know anything about this, but it seems obvious to me the > enabling code should not do hardware readout; they should be separated > from a much higher level. This is part of display core init, which is more or less half readout vs. half initialization anyway. So can't think of a better place for it really. What I don't like is that it's now only in the icl+ function but not in the pre-icl stuff. In fact I don't see why we even have this pre-icl vs. icl split anymore. The same code should work for both. So as a followup I'd like to see a patch to nuke the redundant code. -- Ville Syrjälä Intel _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [Intel-gfx] [PATCH v1] drm/i915: Ensure no conflicts with BIOS when updating Dbuf 2020-02-12 15:36 ` Jani Nikula 2020-02-12 15:51 ` Ville Syrjälä @ 2020-02-12 15:52 ` Lisovskiy, Stanislav 1 sibling, 0 replies; 6+ messages in thread From: Lisovskiy, Stanislav @ 2020-02-12 15:52 UTC (permalink / raw) To: intel-gfx, jani.nikula On Wed, 2020-02-12 at 17:36 +0200, Jani Nikula wrote: > On Wed, 12 Feb 2020, Stanislav Lisovskiy < > stanislav.lisovskiy@intel.com> wrote: > > TGL BIOS seems to enable both DBuf slices ocasionally, depending > > how many displays are connected, while i915 according to BSpec > > was powering on S1 DBuf slice, until a modeset was done. > > > > This was causing a brief flash during the boot as we were > > disabling slice, previously used by BIOS with that. > > > > To prevent this, now we are ensuring tht we are enabling > > _at least_ one slice, but if there are more, let's not > > power them off. > > > > Fixes: ff2cd8635e41 ("drm/i915: Correctly map DBUF slices to > > pipes") > > Signed-off-by: Stanislav Lisovskiy <stanislav.lisovskiy@intel.com> > > --- > > drivers/gpu/drm/i915/display/intel_display_power.c | 6 ++++-- > > 1 file changed, 4 insertions(+), 2 deletions(-) > > > > diff --git a/drivers/gpu/drm/i915/display/intel_display_power.c > > b/drivers/gpu/drm/i915/display/intel_display_power.c > > index 53056def5414..b9a9cbad8a03 100644 > > --- a/drivers/gpu/drm/i915/display/intel_display_power.c > > +++ b/drivers/gpu/drm/i915/display/intel_display_power.c > > @@ -4470,11 +4470,13 @@ void icl_dbuf_slices_update(struct > > drm_i915_private *dev_priv, > > > > static void icl_dbuf_enable(struct drm_i915_private *dev_priv) > > { > > + skl_ddb_get_hw_state(dev_priv); > > /* > > - * Just power up 1 slice, we will > > + * Just power up at least 1 slice, we will > > * figure out later which slices we have and what we need. > > */ > > - icl_dbuf_slices_update(dev_priv, BIT(DBUF_S1)); > > + icl_dbuf_slices_update(dev_priv, dev_priv- > > >enabled_dbuf_slices_mask | > > + BIT(DBUF_S1)); > > I don't know anything about this, but it seems obvious to me the > enabling code should not do hardware readout; they should be > separated > from a much higher level. Current consensus with Ville is that there is no better place to stick it(could be moved to icl_core_init which calls that however not sure this is any better). That whole readout is simply done just because at this early stage we don't yet do a modeset neither have any info, which slices should be powered on, however if we enable only single slice as BSpec says, we might briefly introduce some screen glithes as BIOS could have used two slices already. Stan > > BR, > Jani. > > > > } > > > > static void icl_dbuf_disable(struct drm_i915_private *dev_priv) > > _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 6+ messages in thread
* [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Ensure no conflicts with BIOS when updating Dbuf 2020-02-12 15:25 [Intel-gfx] [PATCH v1] drm/i915: Ensure no conflicts with BIOS when updating Dbuf Stanislav Lisovskiy 2020-02-12 15:36 ` Jani Nikula @ 2020-02-13 4:38 ` Patchwork 2020-02-16 14:03 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork 2 siblings, 0 replies; 6+ messages in thread From: Patchwork @ 2020-02-13 4:38 UTC (permalink / raw) To: Lisovskiy, Stanislav; +Cc: intel-gfx == Series Details == Series: drm/i915: Ensure no conflicts with BIOS when updating Dbuf URL : https://patchwork.freedesktop.org/series/73369/ State : success == Summary == CI Bug Log - changes from CI_DRM_7926 -> Patchwork_16545 ==================================================== Summary ------- **SUCCESS** No regressions found. External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16545/index.html Known issues ------------ Here are the changes found in Patchwork_16545 that come from known issues: ### IGT changes ### #### Issues hit #### * igt@gem_close_race@basic-threads: - fi-byt-n2820: [PASS][1] -> [INCOMPLETE][2] ([i915#45]) [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7926/fi-byt-n2820/igt@gem_close_race@basic-threads.html [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16545/fi-byt-n2820/igt@gem_close_race@basic-threads.html * igt@i915_selftest@live_execlists: - fi-icl-y: [PASS][3] -> [DMESG-FAIL][4] ([fdo#108569]) [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7926/fi-icl-y/igt@i915_selftest@live_execlists.html [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16545/fi-icl-y/igt@i915_selftest@live_execlists.html * igt@i915_selftest@live_gtt: - fi-bdw-5557u: [PASS][5] -> [TIMEOUT][6] ([fdo#112271]) [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7926/fi-bdw-5557u/igt@i915_selftest@live_gtt.html [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16545/fi-bdw-5557u/igt@i915_selftest@live_gtt.html {name}: This element is suppressed. This means it is ignored when computing the status of the difference (SUCCESS, WARNING, or FAILURE). [fdo#108569]: https://bugs.freedesktop.org/show_bug.cgi?id=108569 [fdo#112271]: https://bugs.freedesktop.org/show_bug.cgi?id=112271 [i915#45]: https://gitlab.freedesktop.org/drm/intel/issues/45 [i915#937]: https://gitlab.freedesktop.org/drm/intel/issues/937 Participating hosts (45 -> 42) ------------------------------ Additional (6): fi-hsw-peppy fi-skl-6770hq fi-bdw-gvtdvm fi-gdg-551 fi-bsw-kefka fi-kbl-7560u Missing (9): fi-ilk-m540 fi-byt-squawks fi-bsw-cyan fi-snb-2520m fi-ctg-p8600 fi-ivb-3770 fi-skl-lmem fi-byt-clapper fi-bdw-samus Build changes ------------- * CI: CI-20190529 -> None * Linux: CI_DRM_7926 -> Patchwork_16545 CI-20190529: 20190529 CI_DRM_7926: 6b2fe829d300abf285e9db8b252ffacd216df3ed @ git://anongit.freedesktop.org/gfx-ci/linux IGT_5437: ae42fedfd0c536c560e8e17b06d9c7b94a4e8f0c @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools Patchwork_16545: d4cfa34dac5fb3d3a2d8464e952923aa5c734cca @ git://anongit.freedesktop.org/gfx-ci/linux == Linux commits == d4cfa34dac5f drm/i915: Ensure no conflicts with BIOS when updating Dbuf == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16545/index.html _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 6+ messages in thread
* [Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915: Ensure no conflicts with BIOS when updating Dbuf 2020-02-12 15:25 [Intel-gfx] [PATCH v1] drm/i915: Ensure no conflicts with BIOS when updating Dbuf Stanislav Lisovskiy 2020-02-12 15:36 ` Jani Nikula 2020-02-13 4:38 ` [Intel-gfx] ✓ Fi.CI.BAT: success for " Patchwork @ 2020-02-16 14:03 ` Patchwork 2 siblings, 0 replies; 6+ messages in thread From: Patchwork @ 2020-02-16 14:03 UTC (permalink / raw) To: Stanislav Lisovskiy; +Cc: intel-gfx == Series Details == Series: drm/i915: Ensure no conflicts with BIOS when updating Dbuf URL : https://patchwork.freedesktop.org/series/73369/ State : success == Summary == CI Bug Log - changes from CI_DRM_7926_full -> Patchwork_16545_full ==================================================== Summary ------- **SUCCESS** No regressions found. Known issues ------------ Here are the changes found in Patchwork_16545_full that come from known issues: ### IGT changes ### #### Issues hit #### * igt@gem_busy@busy-vcs1: - shard-iclb: [PASS][1] -> [SKIP][2] ([fdo#112080]) +10 similar issues [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7926/shard-iclb4/igt@gem_busy@busy-vcs1.html [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16545/shard-iclb7/igt@gem_busy@busy-vcs1.html * igt@gem_exec_schedule@out-order-bsd2: - shard-iclb: [PASS][3] -> [SKIP][4] ([fdo#109276]) +15 similar issues [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7926/shard-iclb4/igt@gem_exec_schedule@out-order-bsd2.html [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16545/shard-iclb5/igt@gem_exec_schedule@out-order-bsd2.html * igt@gem_exec_schedule@pi-distinct-iova-bsd: - shard-iclb: [PASS][5] -> [SKIP][6] ([i915#677]) +1 similar issue [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7926/shard-iclb5/igt@gem_exec_schedule@pi-distinct-iova-bsd.html [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16545/shard-iclb1/igt@gem_exec_schedule@pi-distinct-iova-bsd.html * igt@gem_exec_schedule@reorder-wide-bsd: - shard-iclb: [PASS][7] -> [SKIP][8] ([fdo#112146]) +4 similar issues [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7926/shard-iclb7/igt@gem_exec_schedule@reorder-wide-bsd.html [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16545/shard-iclb1/igt@gem_exec_schedule@reorder-wide-bsd.html * igt@gem_ppgtt@flink-and-close-vma-leak: - shard-glk: [PASS][9] -> [FAIL][10] ([i915#644]) [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7926/shard-glk2/igt@gem_ppgtt@flink-and-close-vma-leak.html [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16545/shard-glk3/igt@gem_ppgtt@flink-and-close-vma-leak.html - shard-apl: [PASS][11] -> [FAIL][12] ([i915#644]) [11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7926/shard-apl2/igt@gem_ppgtt@flink-and-close-vma-leak.html [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16545/shard-apl1/igt@gem_ppgtt@flink-and-close-vma-leak.html * igt@gem_tiled_swapping@non-threaded: - shard-kbl: [PASS][13] -> [DMESG-WARN][14] ([i915#183]) [13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7926/shard-kbl1/igt@gem_tiled_swapping@non-threaded.html [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16545/shard-kbl7/igt@gem_tiled_swapping@non-threaded.html * igt@gem_workarounds@suspend-resume-context: - shard-apl: [PASS][15] -> [DMESG-WARN][16] ([i915#180]) +6 similar issues [15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7926/shard-apl7/igt@gem_workarounds@suspend-resume-context.html [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16545/shard-apl4/igt@gem_workarounds@suspend-resume-context.html * igt@i915_suspend@sysfs-reader: - shard-kbl: [PASS][17] -> [DMESG-WARN][18] ([i915#180]) +4 similar issues [17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7926/shard-kbl6/igt@i915_suspend@sysfs-reader.html [18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16545/shard-kbl2/igt@i915_suspend@sysfs-reader.html * igt@kms_cursor_crc@pipe-c-cursor-128x128-random: - shard-skl: [PASS][19] -> [FAIL][20] ([i915#54]) [19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7926/shard-skl1/igt@kms_cursor_crc@pipe-c-cursor-128x128-random.html [20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16545/shard-skl7/igt@kms_cursor_crc@pipe-c-cursor-128x128-random.html * igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions-varying-size: - shard-skl: [PASS][21] -> [FAIL][22] ([IGT#5]) [21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7926/shard-skl7/igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions-varying-size.html [22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16545/shard-skl5/igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions-varying-size.html * igt@kms_frontbuffer_tracking@basic: - shard-skl: [PASS][23] -> [FAIL][24] ([i915#49]) [23]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7926/shard-skl2/igt@kms_frontbuffer_tracking@basic.html [24]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16545/shard-skl4/igt@kms_frontbuffer_tracking@basic.html * igt@kms_plane_alpha_blend@pipe-b-coverage-7efc: - shard-skl: [PASS][25] -> [FAIL][26] ([fdo#108145] / [i915#265]) [25]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7926/shard-skl5/igt@kms_plane_alpha_blend@pipe-b-coverage-7efc.html [26]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16545/shard-skl8/igt@kms_plane_alpha_blend@pipe-b-coverage-7efc.html * igt@kms_plane_alpha_blend@pipe-c-constant-alpha-min: - shard-skl: [PASS][27] -> [FAIL][28] ([fdo#108145]) +1 similar issue [27]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7926/shard-skl1/igt@kms_plane_alpha_blend@pipe-c-constant-alpha-min.html [28]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16545/shard-skl7/igt@kms_plane_alpha_blend@pipe-c-constant-alpha-min.html * igt@kms_psr2_su@frontbuffer: - shard-iclb: [PASS][29] -> [SKIP][30] ([fdo#109642] / [fdo#111068]) [29]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7926/shard-iclb2/igt@kms_psr2_su@frontbuffer.html [30]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16545/shard-iclb1/igt@kms_psr2_su@frontbuffer.html * igt@kms_psr@psr2_cursor_plane_move: - shard-iclb: [PASS][31] -> [SKIP][32] ([fdo#109441]) +2 similar issues [31]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7926/shard-iclb2/igt@kms_psr@psr2_cursor_plane_move.html [32]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16545/shard-iclb4/igt@kms_psr@psr2_cursor_plane_move.html * igt@perf@short-reads: - shard-glk: [PASS][33] -> [TIMEOUT][34] ([fdo#112271] / [i915#51]) [33]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7926/shard-glk4/igt@perf@short-reads.html [34]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16545/shard-glk7/igt@perf@short-reads.html * igt@perf_pmu@cpu-hotplug: - shard-hsw: [PASS][35] -> [INCOMPLETE][36] ([i915#1176] / [i915#61]) [35]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7926/shard-hsw7/igt@perf_pmu@cpu-hotplug.html [36]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16545/shard-hsw5/igt@perf_pmu@cpu-hotplug.html * igt@prime_mmap_coherency@ioctl-errors: - shard-hsw: [PASS][37] -> [FAIL][38] ([i915#831]) [37]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7926/shard-hsw1/igt@prime_mmap_coherency@ioctl-errors.html [38]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16545/shard-hsw6/igt@prime_mmap_coherency@ioctl-errors.html #### Possible fixes #### * igt@gem_ctx_shared@exec-single-timeline-bsd: - shard-iclb: [SKIP][39] ([fdo#110841]) -> [PASS][40] [39]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7926/shard-iclb2/igt@gem_ctx_shared@exec-single-timeline-bsd.html [40]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16545/shard-iclb3/igt@gem_ctx_shared@exec-single-timeline-bsd.html * igt@gem_exec_schedule@pi-userfault-bsd: - shard-iclb: [SKIP][41] ([i915#677]) -> [PASS][42] [41]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7926/shard-iclb2/igt@gem_exec_schedule@pi-userfault-bsd.html [42]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16545/shard-iclb7/igt@gem_exec_schedule@pi-userfault-bsd.html * igt@gem_exec_schedule@preempt-queue-contexts-chain-bsd: - shard-iclb: [SKIP][43] ([fdo#112146]) -> [PASS][44] +6 similar issues [43]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7926/shard-iclb4/igt@gem_exec_schedule@preempt-queue-contexts-chain-bsd.html [44]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16545/shard-iclb7/igt@gem_exec_schedule@preempt-queue-contexts-chain-bsd.html * igt@gem_ppgtt@flink-and-close-vma-leak: - shard-kbl: [FAIL][45] ([i915#644]) -> [PASS][46] [45]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7926/shard-kbl1/igt@gem_ppgtt@flink-and-close-vma-leak.html [46]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16545/shard-kbl7/igt@gem_ppgtt@flink-and-close-vma-leak.html * igt@gen9_exec_parse@allowed-single: - shard-skl: [INCOMPLETE][47] ([i915#716]) -> [PASS][48] [47]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7926/shard-skl9/igt@gen9_exec_parse@allowed-single.html [48]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16545/shard-skl1/igt@gen9_exec_parse@allowed-single.html * igt@i915_suspend@forcewake: - shard-kbl: [INCOMPLETE][49] ([fdo#103665] / [fdo#112219]) -> [PASS][50] [49]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7926/shard-kbl4/igt@i915_suspend@forcewake.html [50]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16545/shard-kbl7/igt@i915_suspend@forcewake.html * igt@kms_cursor_crc@pipe-a-cursor-128x42-sliding: - shard-tglb: [FAIL][51] ([fdo#111703]) -> [PASS][52] [51]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7926/shard-tglb3/igt@kms_cursor_crc@pipe-a-cursor-128x42-sliding.html [52]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16545/shard-tglb2/igt@kms_cursor_crc@pipe-a-cursor-128x42-sliding.html * igt@kms_cursor_crc@pipe-a-cursor-suspend: - shard-kbl: [DMESG-WARN][53] ([i915#180]) -> [PASS][54] +3 similar issues [53]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7926/shard-kbl4/igt@kms_cursor_crc@pipe-a-cursor-suspend.html [54]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16545/shard-kbl1/igt@kms_cursor_crc@pipe-a-cursor-suspend.html * igt@kms_cursor_edge_walk@pipe-a-128x128-left-edge: - shard-tglb: [FAIL][55] ([i915#70]) -> [PASS][56] [55]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7926/shard-tglb1/igt@kms_cursor_edge_walk@pipe-a-128x128-left-edge.html [56]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16545/shard-tglb5/igt@kms_cursor_edge_walk@pipe-a-128x128-left-edge.html * igt@kms_draw_crc@draw-method-rgb565-mmap-gtt-xtiled: - shard-tglb: [DMESG-FAIL][57] ([i915#402]) -> [PASS][58] [57]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7926/shard-tglb2/igt@kms_draw_crc@draw-method-rgb565-mmap-gtt-xtiled.html [58]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16545/shard-tglb7/igt@kms_draw_crc@draw-method-rgb565-mmap-gtt-xtiled.html * igt@kms_draw_crc@draw-method-xrgb2101010-blt-untiled: - shard-tglb: [FAIL][59] ([i915#559]) -> [PASS][60] [59]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7926/shard-tglb3/igt@kms_draw_crc@draw-method-xrgb2101010-blt-untiled.html [60]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16545/shard-tglb3/igt@kms_draw_crc@draw-method-xrgb2101010-blt-untiled.html * igt@kms_flip@plain-flip-fb-recreate-interruptible: - shard-skl: [FAIL][61] ([i915#34]) -> [PASS][62] [61]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7926/shard-skl6/igt@kms_flip@plain-flip-fb-recreate-interruptible.html [62]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16545/shard-skl3/igt@kms_flip@plain-flip-fb-recreate-interruptible.html * igt@kms_frontbuffer_tracking@psr-1p-offscren-pri-shrfb-draw-render: - shard-skl: [FAIL][63] ([i915#49]) -> [PASS][64] +1 similar issue [63]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7926/shard-skl9/igt@kms_frontbuffer_tracking@psr-1p-offscren-pri-shrfb-draw-render.html [64]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16545/shard-skl8/igt@kms_frontbuffer_tracking@psr-1p-offscren-pri-shrfb-draw-render.html * {igt@kms_hdr@bpc-switch-dpms}: - shard-skl: [FAIL][65] ([i915#1188]) -> [PASS][66] [65]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7926/shard-skl3/igt@kms_hdr@bpc-switch-dpms.html [66]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16545/shard-skl1/igt@kms_hdr@bpc-switch-dpms.html * igt@kms_pipe_crc_basic@suspend-read-crc-pipe-a: - shard-skl: [FAIL][67] ([i915#53]) -> [PASS][68] [67]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7926/shard-skl9/igt@kms_pipe_crc_basic@suspend-read-crc-pipe-a.html [68]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16545/shard-skl8/igt@kms_pipe_crc_basic@suspend-read-crc-pipe-a.html * igt@kms_plane@plane-panning-bottom-right-suspend-pipe-a-planes: - shard-apl: [DMESG-WARN][69] ([i915#180]) -> [PASS][70] +3 similar issues [69]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7926/shard-apl8/igt@kms_plane@plane-panning-bottom-right-suspend-pipe-a-planes.html [70]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16545/shard-apl7/igt@kms_plane@plane-panning-bottom-right-suspend-pipe-a-planes.html * igt@kms_plane_alpha_blend@pipe-a-coverage-7efc: - shard-skl: [FAIL][71] ([fdo#108145]) -> [PASS][72] [71]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7926/shard-skl2/igt@kms_plane_alpha_blend@pipe-a-coverage-7efc.html [72]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16545/shard-skl8/igt@kms_plane_alpha_blend@pipe-a-coverage-7efc.html * igt@kms_plane_alpha_blend@pipe-c-coverage-7efc: - shard-skl: [FAIL][73] ([fdo#108145] / [i915#265]) -> [PASS][74] [73]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7926/shard-skl4/igt@kms_plane_alpha_blend@pipe-c-coverage-7efc.html [74]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16545/shard-skl2/igt@kms_plane_alpha_blend@pipe-c-coverage-7efc.html * igt@kms_plane_cursor@pipe-a-overlay-size-256: - shard-tglb: [FAIL][75] ([i915#1139]) -> [PASS][76] [75]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7926/shard-tglb7/igt@kms_plane_cursor@pipe-a-overlay-size-256.html [76]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16545/shard-tglb8/igt@kms_plane_cursor@pipe-a-overlay-size-256.html * igt@kms_psr@psr2_no_drrs: - shard-iclb: [SKIP][77] ([fdo#109441]) -> [PASS][78] [77]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7926/shard-iclb1/igt@kms_psr@psr2_no_drrs.html [78]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16545/shard-iclb2/igt@kms_psr@psr2_no_drrs.html * igt@kms_setmode@basic: - shard-apl: [FAIL][79] ([i915#31]) -> [PASS][80] [79]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7926/shard-apl7/igt@kms_setmode@basic.html [80]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16545/shard-apl7/igt@kms_setmode@basic.html - shard-hsw: [FAIL][81] ([i915#31]) -> [PASS][82] [81]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7926/shard-hsw1/igt@kms_setmode@basic.html [82]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16545/shard-hsw5/igt@kms_setmode@basic.html * igt@perf_pmu@busy-no-semaphores-vcs1: - shard-iclb: [SKIP][83] ([fdo#112080]) -> [PASS][84] +14 similar issues [83]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7926/shard-iclb8/igt@perf_pmu@busy-no-semaphores-vcs1.html [84]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16545/shard-iclb4/igt@perf_pmu@busy-no-semaphores-vcs1.html * igt@prime_busy@hang-bsd2: - shard-iclb: [SKIP][85] ([fdo#109276]) -> [PASS][86] +18 similar issues [85]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7926/shard-iclb7/igt@prime_busy@hang-bsd2.html [86]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16545/shard-iclb1/igt@prime_busy@hang-bsd2.html #### Warnings #### * igt@gem_ctx_isolation@vcs1-nonpriv: - shard-iclb: [SKIP][87] ([fdo#112080]) -> [FAIL][88] ([IGT#28]) [87]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7926/shard-iclb5/igt@gem_ctx_isolation@vcs1-nonpriv.html [88]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16545/shard-iclb1/igt@gem_ctx_isolation@vcs1-nonpriv.html * igt@gem_tiled_blits@interruptible: - shard-hsw: [FAIL][89] ([i915#818]) -> [FAIL][90] ([i915#694]) [89]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7926/shard-hsw2/igt@gem_tiled_blits@interruptible.html [90]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16545/shard-hsw5/igt@gem_tiled_blits@interruptible.html * igt@runner@aborted: - shard-hsw: [FAIL][91] ([i915#974]) -> ([FAIL][92], [FAIL][93]) ([i915#1176] / [i915#974]) [91]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7926/shard-hsw2/igt@runner@aborted.html [92]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16545/shard-hsw6/igt@runner@aborted.html [93]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16545/shard-hsw5/igt@runner@aborted.html {name}: This element is suppressed. This means it is ignored when computing the status of the difference (SUCCESS, WARNING, or FAILURE). [IGT#28]: https://gitlab.freedesktop.org/drm/igt-gpu-tools/issues/28 [IGT#5]: https://gitlab.freedesktop.org/drm/igt-gpu-tools/issues/5 [fdo#103665]: https://bugs.freedesktop.org/show_bug.cgi?id=103665 [fdo#108145]: https://bugs.freedesktop.org/show_bug.cgi?id=108145 [fdo#109276]: https://bugs.freedesktop.org/show_bug.cgi?id=109276 [fdo#109441]: https://bugs.freedesktop.org/show_bug.cgi?id=109441 [fdo#109642]: https://bugs.freedesktop.org/show_bug.cgi?id=109642 [fdo#110841]: https://bugs.freedesktop.org/show_bug.cgi?id=110841 [fdo#111068]: https://bugs.freedesktop.org/show_bug.cgi?id=111068 [fdo#111703]: https://bugs.freedesktop.org/show_bug.cgi?id=111703 [fdo#112080]: https://bugs.freedesktop.org/show_bug.cgi?id=112080 [fdo#112146]: https://bugs.freedesktop.org/show_bug.cgi?id=112146 [fdo#112219]: https://bugs.freedesktop.org/show_bug.cgi?id=112219 [fdo#112271]: https://bugs.freedesktop.org/show_bug.cgi?id=112271 [i915#1139]: https://gitlab.freedesktop.org/drm/intel/issues/1139 [i915#1176]: https://gitlab.freedesktop.org/drm/intel/issues/1176 [i915#1188]: https://gitlab.freedesktop.org/drm/intel/issues/1188 [i915#180]: https://gitlab.freedesktop.org/drm/intel/issues/180 [i915#183]: https://gitlab.freedesktop.org/drm/intel/issues/183 [i915#265]: https://gitlab.freedesktop.org/drm/intel/issues/265 [i915#31]: https://gitlab.freedesktop.org/drm/intel/issues/31 [i915#34]: https://gitlab.freedesktop.org/drm/intel/issues/34 [i915#402]: https://gitlab.freedesktop.org/drm/intel/issues/402 [i915#49]: https://gitlab.freedesktop.org/drm/intel/issues/49 [i915#51]: https://gitlab.freedesktop.org/drm/intel/issues/51 [i915#53]: https://gitlab.freedesktop.org/drm/intel/issues/53 [i915#54]: https://gitlab.freedesktop.org/drm/intel/issues/54 [i915#559]: https://gitlab.freedesktop.org/drm/intel/issues/559 [i915#61]: https://gitlab.freedesktop.org/drm/intel/issues/61 [i915#644]: https://gitlab.freedesktop.org/drm/intel/issues/644 [i915#677]: https://gitlab.freedesktop.org/drm/intel/issues/677 [i915#694]: https://gitlab.freedesktop.org/drm/intel/issues/694 [i915#70]: https://gitlab.freedesktop.org/drm/intel/issues/70 [i915#716]: https://gitlab.freedesktop.org/drm/intel/issues/716 [i915#818]: https://gitlab.freedesktop.org/drm/intel/issues/818 [i915#831]: https://gitlab.freedesktop.org/drm/intel/issues/831 [i915#974]: https://gitlab.freedesktop.org/drm/intel/issues/974 Participating hosts (10 -> 10) ------------------------------ No changes in participating hosts Build changes ------------- * CI: CI-20190529 -> None * Linux: CI_DRM_7926 -> Patchwork_16545 CI-20190529: 20190529 CI_DRM_7926: 6b2fe829d300abf285e9db8b252ffacd216df3ed @ git://anongit.freedesktop.org/gfx-ci/linux IGT_5437: ae42fedfd0c536c560e8e17b06d9c7b94a4e8f0c @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools Patchwork_16545: d4cfa34dac5fb3d3a2d8464e952923aa5c734cca @ git://anongit.freedesktop.org/gfx-ci/linux piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16545/index.html _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 6+ messages in thread
end of thread, other threads:[~2020-02-16 14:03 UTC | newest] Thread overview: 6+ messages (download: mbox.gz / follow: Atom feed) -- links below jump to the message on this page -- 2020-02-12 15:25 [Intel-gfx] [PATCH v1] drm/i915: Ensure no conflicts with BIOS when updating Dbuf Stanislav Lisovskiy 2020-02-12 15:36 ` Jani Nikula 2020-02-12 15:51 ` Ville Syrjälä 2020-02-12 15:52 ` Lisovskiy, Stanislav 2020-02-13 4:38 ` [Intel-gfx] ✓ Fi.CI.BAT: success for " Patchwork 2020-02-16 14:03 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
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