From: Jani Nikula <jani.nikula@intel.com> To: intel-gfx@lists.freedesktop.org, dri-devel@lists.freedesktop.org Cc: jani.nikula@intel.com, Manasi Navare <manasi.d.navare@intel.com>, Harry Wentland <hwentlan@amd.com>, Vandita Kulkarni <vandita.kulkarni@intel.com> Subject: [PATCH RESEND 1/7] drm/dsc: use rc_model_size from DSC config for PPS Date: Fri, 27 Mar 2020 14:42:23 +0200 [thread overview] Message-ID: <20200327124229.26461-1-jani.nikula@intel.com> (raw) The PPS is supposed to reflect the DSC config instead of hard coding the rc_model_size. Make it so. Currently all users of drm_dsc_pps_payload_pack() hard code the size to 8192 also in the DSC config, so this change should have no impact, other than allowing the drivers to use other sizes as needed. Cc: Alex Deucher <alexdeucher@gmail.com> Cc: Harry Wentland <hwentlan@amd.com> Cc: Manasi Navare <manasi.d.navare@intel.com> Cc: Vandita Kulkarni <vandita.kulkarni@intel.com> Signed-off-by: Jani Nikula <jani.nikula@intel.com> --- drivers/gpu/drm/drm_dsc.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/drivers/gpu/drm/drm_dsc.c b/drivers/gpu/drm/drm_dsc.c index 4a475d9696ff..09afbc01ea94 100644 --- a/drivers/gpu/drm/drm_dsc.c +++ b/drivers/gpu/drm/drm_dsc.c @@ -186,8 +186,7 @@ void drm_dsc_pps_payload_pack(struct drm_dsc_picture_parameter_set *pps_payload, pps_payload->flatness_max_qp = dsc_cfg->flatness_max_qp; /* PPS 38, 39 */ - pps_payload->rc_model_size = - cpu_to_be16(DSC_RC_MODEL_SIZE_CONST); + pps_payload->rc_model_size = cpu_to_be16(dsc_cfg->rc_model_size); /* PPS 40 */ pps_payload->rc_edge_factor = DSC_RC_EDGE_FACTOR_CONST; -- 2.20.1 _______________________________________________ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel
WARNING: multiple messages have this Message-ID (diff)
From: Jani Nikula <jani.nikula@intel.com> To: intel-gfx@lists.freedesktop.org, dri-devel@lists.freedesktop.org Cc: jani.nikula@intel.com, Alex Deucher <alexdeucher@gmail.com>, Harry Wentland <hwentlan@amd.com> Subject: [Intel-gfx] [PATCH RESEND 1/7] drm/dsc: use rc_model_size from DSC config for PPS Date: Fri, 27 Mar 2020 14:42:23 +0200 [thread overview] Message-ID: <20200327124229.26461-1-jani.nikula@intel.com> (raw) The PPS is supposed to reflect the DSC config instead of hard coding the rc_model_size. Make it so. Currently all users of drm_dsc_pps_payload_pack() hard code the size to 8192 also in the DSC config, so this change should have no impact, other than allowing the drivers to use other sizes as needed. Cc: Alex Deucher <alexdeucher@gmail.com> Cc: Harry Wentland <hwentlan@amd.com> Cc: Manasi Navare <manasi.d.navare@intel.com> Cc: Vandita Kulkarni <vandita.kulkarni@intel.com> Signed-off-by: Jani Nikula <jani.nikula@intel.com> --- drivers/gpu/drm/drm_dsc.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/drivers/gpu/drm/drm_dsc.c b/drivers/gpu/drm/drm_dsc.c index 4a475d9696ff..09afbc01ea94 100644 --- a/drivers/gpu/drm/drm_dsc.c +++ b/drivers/gpu/drm/drm_dsc.c @@ -186,8 +186,7 @@ void drm_dsc_pps_payload_pack(struct drm_dsc_picture_parameter_set *pps_payload, pps_payload->flatness_max_qp = dsc_cfg->flatness_max_qp; /* PPS 38, 39 */ - pps_payload->rc_model_size = - cpu_to_be16(DSC_RC_MODEL_SIZE_CONST); + pps_payload->rc_model_size = cpu_to_be16(dsc_cfg->rc_model_size); /* PPS 40 */ pps_payload->rc_edge_factor = DSC_RC_EDGE_FACTOR_CONST; -- 2.20.1 _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
next reply other threads:[~2020-03-27 12:42 UTC|newest] Thread overview: 23+ messages / expand[flat|nested] mbox.gz Atom feed top 2020-03-27 12:42 Jani Nikula [this message] 2020-03-27 12:42 ` [Intel-gfx] [PATCH RESEND 1/7] drm/dsc: use rc_model_size from DSC config for PPS Jani Nikula 2020-03-27 12:42 ` [PATCH RESEND 2/7] drm/dsc: add helper for calculating rc buffer size from DPCD Jani Nikula 2020-03-27 12:42 ` [Intel-gfx] " Jani Nikula 2020-04-08 9:50 ` Kulkarni, Vandita 2020-04-08 9:50 ` [Intel-gfx] " Kulkarni, Vandita 2020-03-27 12:42 ` [PATCH RESEND 3/7] drm/amd/display: use drm_dsc_dp_rc_buffer_size() to get rc buffer size Jani Nikula 2020-03-27 12:42 ` [Intel-gfx] " Jani Nikula 2020-03-27 12:42 ` [PATCH RESEND 4/7] drm/i915/dsc: configure hardware using specified rc_model_size Jani Nikula 2020-03-27 12:42 ` [Intel-gfx] " Jani Nikula 2020-04-08 10:00 ` Kulkarni, Vandita 2020-04-08 10:00 ` [Intel-gfx] " Kulkarni, Vandita 2020-03-27 12:42 ` [PATCH RESEND 5/7] drm/i915/dsc: make rc_model_size an encoder defined value Jani Nikula 2020-03-27 12:42 ` [Intel-gfx] " Jani Nikula 2020-03-27 12:42 ` [PATCH RESEND 6/7] drm/i915/bios: fill in DSC rc_model_size from VBT Jani Nikula 2020-03-27 12:42 ` [Intel-gfx] " Jani Nikula 2020-04-08 10:04 ` Kulkarni, Vandita 2020-04-08 10:04 ` [Intel-gfx] " Kulkarni, Vandita 2020-03-27 12:42 ` [PATCH RESEND 7/7] drm/i915/dsi: use VBT data for rc_model_size Jani Nikula 2020-03-27 12:42 ` [Intel-gfx] " Jani Nikula 2020-03-27 14:09 ` [Intel-gfx] ✗ Fi.CI.BUILD: failure for series starting with [RESEND,1/7] drm/dsc: use rc_model_size from DSC config for PPS Patchwork 2020-04-08 9:46 ` [PATCH RESEND 1/7] " Kulkarni, Vandita 2020-04-08 9:46 ` [Intel-gfx] " Kulkarni, Vandita
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