From: Jani Nikula <jani.nikula@intel.com> To: intel-gfx@lists.freedesktop.org, dri-devel@lists.freedesktop.org Cc: jani.nikula@intel.com, Manasi Navare <manasi.d.navare@intel.com>, Vandita Kulkarni <vandita.kulkarni@intel.com> Subject: [PATCH RESEND 6/7] drm/i915/bios: fill in DSC rc_model_size from VBT Date: Fri, 27 Mar 2020 14:42:28 +0200 [thread overview] Message-ID: <20200327124229.26461-6-jani.nikula@intel.com> (raw) In-Reply-To: <20200327124229.26461-1-jani.nikula@intel.com> The VBT fields match the DPCD data, so use the same helper. Cc: Manasi Navare <manasi.d.navare@intel.com> Cc: Vandita Kulkarni <vandita.kulkarni@intel.com> Signed-off-by: Jani Nikula <jani.nikula@intel.com> --- drivers/gpu/drm/i915/display/intel_bios.c | 11 +++-------- 1 file changed, 3 insertions(+), 8 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_bios.c b/drivers/gpu/drm/i915/display/intel_bios.c index 839124647202..a4ea0e6c3286 100644 --- a/drivers/gpu/drm/i915/display/intel_bios.c +++ b/drivers/gpu/drm/i915/display/intel_bios.c @@ -2494,16 +2494,11 @@ static void fill_dsc(struct intel_crtc_state *crtc_state, crtc_state->dsc.slice_count); /* - * FIXME: Use VBT rc_buffer_block_size and rc_buffer_size for the - * implementation specific physical rate buffer size. Currently we use - * the required rate buffer model size calculated in - * drm_dsc_compute_rc_parameters() according to VESA DSC Annex E. - * * The VBT rc_buffer_block_size and rc_buffer_size definitions - * correspond to DP 1.4 DPCD offsets 0x62 and 0x63. The DP DSC - * implementation should also use the DPCD (or perhaps VBT for eDP) - * provided value for the buffer size. + * correspond to DP 1.4 DPCD offsets 0x62 and 0x63. */ + vdsc_cfg->rc_model_size = drm_dsc_dp_rc_buffer_size(dsc->rc_buffer_block_size, + dsc->rc_buffer_size); /* FIXME: DSI spec says bpc + 1 for this one */ vdsc_cfg->line_buf_depth = VBT_DSC_LINE_BUFFER_DEPTH(dsc->line_buffer_depth); -- 2.20.1 _______________________________________________ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel
WARNING: multiple messages have this Message-ID (diff)
From: Jani Nikula <jani.nikula@intel.com> To: intel-gfx@lists.freedesktop.org, dri-devel@lists.freedesktop.org Cc: jani.nikula@intel.com Subject: [Intel-gfx] [PATCH RESEND 6/7] drm/i915/bios: fill in DSC rc_model_size from VBT Date: Fri, 27 Mar 2020 14:42:28 +0200 [thread overview] Message-ID: <20200327124229.26461-6-jani.nikula@intel.com> (raw) In-Reply-To: <20200327124229.26461-1-jani.nikula@intel.com> The VBT fields match the DPCD data, so use the same helper. Cc: Manasi Navare <manasi.d.navare@intel.com> Cc: Vandita Kulkarni <vandita.kulkarni@intel.com> Signed-off-by: Jani Nikula <jani.nikula@intel.com> --- drivers/gpu/drm/i915/display/intel_bios.c | 11 +++-------- 1 file changed, 3 insertions(+), 8 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_bios.c b/drivers/gpu/drm/i915/display/intel_bios.c index 839124647202..a4ea0e6c3286 100644 --- a/drivers/gpu/drm/i915/display/intel_bios.c +++ b/drivers/gpu/drm/i915/display/intel_bios.c @@ -2494,16 +2494,11 @@ static void fill_dsc(struct intel_crtc_state *crtc_state, crtc_state->dsc.slice_count); /* - * FIXME: Use VBT rc_buffer_block_size and rc_buffer_size for the - * implementation specific physical rate buffer size. Currently we use - * the required rate buffer model size calculated in - * drm_dsc_compute_rc_parameters() according to VESA DSC Annex E. - * * The VBT rc_buffer_block_size and rc_buffer_size definitions - * correspond to DP 1.4 DPCD offsets 0x62 and 0x63. The DP DSC - * implementation should also use the DPCD (or perhaps VBT for eDP) - * provided value for the buffer size. + * correspond to DP 1.4 DPCD offsets 0x62 and 0x63. */ + vdsc_cfg->rc_model_size = drm_dsc_dp_rc_buffer_size(dsc->rc_buffer_block_size, + dsc->rc_buffer_size); /* FIXME: DSI spec says bpc + 1 for this one */ vdsc_cfg->line_buf_depth = VBT_DSC_LINE_BUFFER_DEPTH(dsc->line_buffer_depth); -- 2.20.1 _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
next prev parent reply other threads:[~2020-03-27 12:43 UTC|newest] Thread overview: 23+ messages / expand[flat|nested] mbox.gz Atom feed top 2020-03-27 12:42 [PATCH RESEND 1/7] drm/dsc: use rc_model_size from DSC config for PPS Jani Nikula 2020-03-27 12:42 ` [Intel-gfx] " Jani Nikula 2020-03-27 12:42 ` [PATCH RESEND 2/7] drm/dsc: add helper for calculating rc buffer size from DPCD Jani Nikula 2020-03-27 12:42 ` [Intel-gfx] " Jani Nikula 2020-04-08 9:50 ` Kulkarni, Vandita 2020-04-08 9:50 ` [Intel-gfx] " Kulkarni, Vandita 2020-03-27 12:42 ` [PATCH RESEND 3/7] drm/amd/display: use drm_dsc_dp_rc_buffer_size() to get rc buffer size Jani Nikula 2020-03-27 12:42 ` [Intel-gfx] " Jani Nikula 2020-03-27 12:42 ` [PATCH RESEND 4/7] drm/i915/dsc: configure hardware using specified rc_model_size Jani Nikula 2020-03-27 12:42 ` [Intel-gfx] " Jani Nikula 2020-04-08 10:00 ` Kulkarni, Vandita 2020-04-08 10:00 ` [Intel-gfx] " Kulkarni, Vandita 2020-03-27 12:42 ` [PATCH RESEND 5/7] drm/i915/dsc: make rc_model_size an encoder defined value Jani Nikula 2020-03-27 12:42 ` [Intel-gfx] " Jani Nikula 2020-03-27 12:42 ` Jani Nikula [this message] 2020-03-27 12:42 ` [Intel-gfx] [PATCH RESEND 6/7] drm/i915/bios: fill in DSC rc_model_size from VBT Jani Nikula 2020-04-08 10:04 ` Kulkarni, Vandita 2020-04-08 10:04 ` [Intel-gfx] " Kulkarni, Vandita 2020-03-27 12:42 ` [PATCH RESEND 7/7] drm/i915/dsi: use VBT data for rc_model_size Jani Nikula 2020-03-27 12:42 ` [Intel-gfx] " Jani Nikula 2020-03-27 14:09 ` [Intel-gfx] ✗ Fi.CI.BUILD: failure for series starting with [RESEND,1/7] drm/dsc: use rc_model_size from DSC config for PPS Patchwork 2020-04-08 9:46 ` [PATCH RESEND 1/7] " Kulkarni, Vandita 2020-04-08 9:46 ` [Intel-gfx] " Kulkarni, Vandita
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