From: Eric Auger <eric.auger@redhat.com>
To: eric.auger.pro@gmail.com, eric.auger@redhat.com,
iommu@lists.linux-foundation.org, linux-kernel@vger.kernel.org,
kvm@vger.kernel.org, kvmarm@lists.cs.columbia.edu,
will@kernel.org, joro@8bytes.org, maz@kernel.org,
robin.murphy@arm.com
Cc: jean-philippe@linaro.org, zhangfei.gao@linaro.org,
shameerali.kolothum.thodi@huawei.com, alex.williamson@redhat.com,
jacob.jun.pan@linux.intel.com, yi.l.liu@intel.com,
peter.maydell@linaro.org, zhangfei.gao@gmail.com,
tn@semihalf.com, zhangfei.gao@foxmail.com, bbhushan2@marvell.com
Subject: [PATCH v11 00/13] SMMUv3 Nested Stage Setup (IOMMU part)
Date: Tue, 14 Apr 2020 17:05:54 +0200 [thread overview]
Message-ID: <20200414150607.28488-1-eric.auger@redhat.com> (raw)
This version fixes an issue observed by Shameer on an SMMU 3.2,
when moving from dual stage config to stage 1 only config.
The 2 high 64b of the STE now get reset. Otherwise, leaving the
S2TTB set may cause a C_BAD_STE error.
This series can be found at:
https://github.com/eauger/linux/tree/v5.6-2stage-v11_10.1
(including the VFIO part)
The QEMU fellow series still can be found at:
https://github.com/eauger/qemu/tree/v4.2.0-2stage-rfcv6
Users have expressed interest in that work and tested v9/v10:
- https://patchwork.kernel.org/cover/11039995/#23012381
- https://patchwork.kernel.org/cover/11039995/#23197235
Background:
This series brings the IOMMU part of HW nested paging support
in the SMMUv3. The VFIO part is submitted separately.
The IOMMU API is extended to support 2 new API functionalities:
1) pass the guest stage 1 configuration
2) pass stage 1 MSI bindings
Then those capabilities gets implemented in the SMMUv3 driver.
The virtualizer passes information through the VFIO user API
which cascades them to the iommu subsystem. This allows the guest
to own stage 1 tables and context descriptors (so-called PASID
table) while the host owns stage 2 tables and main configuration
structures (STE).
Best Regards
Eric
History:
v10 -> v11:
- S2TTB reset when S2 is off
- fix compil issue when CONFIG_IOMMU_DMA is not set
v9 -> v10:
- rebase on top of 5.6.0-rc3
v8 -> v9:
- rebase on 5.3
- split iommu/vfio parts
v6 -> v8:
- Implement VFIO-PCI device specific interrupt framework
v7 -> v8:
- rebase on top of v5.2-rc1 and especially
8be39a1a04c1 iommu/arm-smmu-v3: Add a master->domain pointer
- dynamic alloc of s1_cfg/s2_cfg
- __arm_smmu_tlb_inv_asid/s1_range_nosync
- check there is no HW MSI regions
- asid invalidation using pasid extended struct (change in the uapi)
- add s1_live/s2_live checks
- move check about support of nested stages in domain finalise
- fixes in error reporting according to the discussion with Robin
- reordered the patches to have first iommu/smmuv3 patches and then
VFIO patches
v6 -> v7:
- removed device handle from bind/unbind_guest_msi
- added "iommu/smmuv3: Nested mode single MSI doorbell per domain
enforcement"
- added few uapi comments as suggested by Jean, Jacop and Alex
v5 -> v6:
- Fix compilation issue when CONFIG_IOMMU_API is unset
v4 -> v5:
- fix bug reported by Vincent: fault handler unregistration now happens in
vfio_pci_release
- IOMMU_FAULT_PERM_* moved outside of struct definition + small
uapi changes suggested by Kean-Philippe (except fetch_addr)
- iommu: introduce device fault report API: removed the PRI part.
- see individual logs for more details
- reset the ste abort flag on detach
v3 -> v4:
- took into account Alex, jean-Philippe and Robin's comments on v3
- rework of the smmuv3 driver integration
- add tear down ops for msi binding and PASID table binding
- fix S1 fault propagation
- put fault reporting patches at the beginning of the series following
Jean-Philippe's request
- update of the cache invalidate and fault API uapis
- VFIO fault reporting rework with 2 separate regions and one mmappable
segment for the fault queue
- moved to PATCH
v2 -> v3:
- When registering the S1 MSI binding we now store the device handle. This
addresses Robin's comment about discimination of devices beonging to
different S1 groups and using different physical MSI doorbells.
- Change the fault reporting API: use VFIO_PCI_DMA_FAULT_IRQ_INDEX to
set the eventfd and expose the faults through an mmappable fault region
v1 -> v2:
- Added the fault reporting capability
- asid properly passed on invalidation (fix assignment of multiple
devices)
- see individual change logs for more info
Eric Auger (11):
iommu: Introduce bind/unbind_guest_msi
iommu/smmuv3: Dynamically allocate s1_cfg and s2_cfg
iommu/smmuv3: Get prepared for nested stage support
iommu/smmuv3: Implement attach/detach_pasid_table
iommu/smmuv3: Allow stage 1 invalidation with unmanaged ASIDs
iommu/smmuv3: Implement cache_invalidate
dma-iommu: Implement NESTED_MSI cookie
iommu/smmuv3: Nested mode single MSI doorbell per domain enforcement
iommu/smmuv3: Enforce incompatibility between nested mode and HW MSI
regions
iommu/smmuv3: Implement bind/unbind_guest_msi
iommu/smmuv3: Report non recoverable faults
Jacob Pan (1):
iommu: Introduce attach/detach_pasid_table API
Jean-Philippe Brucker (1):
iommu/arm-smmu-v3: Maintain a SID->device structure
drivers/iommu/arm-smmu-v3.c | 744 ++++++++++++++++++++++++++++++++----
drivers/iommu/dma-iommu.c | 142 ++++++-
drivers/iommu/iommu.c | 56 +++
include/linux/dma-iommu.h | 16 +
include/linux/iommu.h | 38 ++
include/uapi/linux/iommu.h | 51 +++
6 files changed, 975 insertions(+), 72 deletions(-)
--
2.20.1
WARNING: multiple messages have this Message-ID (diff)
From: Eric Auger <eric.auger@redhat.com>
To: eric.auger.pro@gmail.com, eric.auger@redhat.com,
iommu@lists.linux-foundation.org, linux-kernel@vger.kernel.org,
kvm@vger.kernel.org, kvmarm@lists.cs.columbia.edu,
will@kernel.org, joro@8bytes.org, maz@kernel.org,
robin.murphy@arm.com
Cc: jean-philippe@linaro.org, peter.maydell@linaro.org,
zhangfei.gao@foxmail.com, alex.williamson@redhat.com,
zhangfei.gao@linaro.org, bbhushan2@marvell.com
Subject: [PATCH v11 00/13] SMMUv3 Nested Stage Setup (IOMMU part)
Date: Tue, 14 Apr 2020 17:05:54 +0200 [thread overview]
Message-ID: <20200414150607.28488-1-eric.auger@redhat.com> (raw)
This version fixes an issue observed by Shameer on an SMMU 3.2,
when moving from dual stage config to stage 1 only config.
The 2 high 64b of the STE now get reset. Otherwise, leaving the
S2TTB set may cause a C_BAD_STE error.
This series can be found at:
https://github.com/eauger/linux/tree/v5.6-2stage-v11_10.1
(including the VFIO part)
The QEMU fellow series still can be found at:
https://github.com/eauger/qemu/tree/v4.2.0-2stage-rfcv6
Users have expressed interest in that work and tested v9/v10:
- https://patchwork.kernel.org/cover/11039995/#23012381
- https://patchwork.kernel.org/cover/11039995/#23197235
Background:
This series brings the IOMMU part of HW nested paging support
in the SMMUv3. The VFIO part is submitted separately.
The IOMMU API is extended to support 2 new API functionalities:
1) pass the guest stage 1 configuration
2) pass stage 1 MSI bindings
Then those capabilities gets implemented in the SMMUv3 driver.
The virtualizer passes information through the VFIO user API
which cascades them to the iommu subsystem. This allows the guest
to own stage 1 tables and context descriptors (so-called PASID
table) while the host owns stage 2 tables and main configuration
structures (STE).
Best Regards
Eric
History:
v10 -> v11:
- S2TTB reset when S2 is off
- fix compil issue when CONFIG_IOMMU_DMA is not set
v9 -> v10:
- rebase on top of 5.6.0-rc3
v8 -> v9:
- rebase on 5.3
- split iommu/vfio parts
v6 -> v8:
- Implement VFIO-PCI device specific interrupt framework
v7 -> v8:
- rebase on top of v5.2-rc1 and especially
8be39a1a04c1 iommu/arm-smmu-v3: Add a master->domain pointer
- dynamic alloc of s1_cfg/s2_cfg
- __arm_smmu_tlb_inv_asid/s1_range_nosync
- check there is no HW MSI regions
- asid invalidation using pasid extended struct (change in the uapi)
- add s1_live/s2_live checks
- move check about support of nested stages in domain finalise
- fixes in error reporting according to the discussion with Robin
- reordered the patches to have first iommu/smmuv3 patches and then
VFIO patches
v6 -> v7:
- removed device handle from bind/unbind_guest_msi
- added "iommu/smmuv3: Nested mode single MSI doorbell per domain
enforcement"
- added few uapi comments as suggested by Jean, Jacop and Alex
v5 -> v6:
- Fix compilation issue when CONFIG_IOMMU_API is unset
v4 -> v5:
- fix bug reported by Vincent: fault handler unregistration now happens in
vfio_pci_release
- IOMMU_FAULT_PERM_* moved outside of struct definition + small
uapi changes suggested by Kean-Philippe (except fetch_addr)
- iommu: introduce device fault report API: removed the PRI part.
- see individual logs for more details
- reset the ste abort flag on detach
v3 -> v4:
- took into account Alex, jean-Philippe and Robin's comments on v3
- rework of the smmuv3 driver integration
- add tear down ops for msi binding and PASID table binding
- fix S1 fault propagation
- put fault reporting patches at the beginning of the series following
Jean-Philippe's request
- update of the cache invalidate and fault API uapis
- VFIO fault reporting rework with 2 separate regions and one mmappable
segment for the fault queue
- moved to PATCH
v2 -> v3:
- When registering the S1 MSI binding we now store the device handle. This
addresses Robin's comment about discimination of devices beonging to
different S1 groups and using different physical MSI doorbells.
- Change the fault reporting API: use VFIO_PCI_DMA_FAULT_IRQ_INDEX to
set the eventfd and expose the faults through an mmappable fault region
v1 -> v2:
- Added the fault reporting capability
- asid properly passed on invalidation (fix assignment of multiple
devices)
- see individual change logs for more info
Eric Auger (11):
iommu: Introduce bind/unbind_guest_msi
iommu/smmuv3: Dynamically allocate s1_cfg and s2_cfg
iommu/smmuv3: Get prepared for nested stage support
iommu/smmuv3: Implement attach/detach_pasid_table
iommu/smmuv3: Allow stage 1 invalidation with unmanaged ASIDs
iommu/smmuv3: Implement cache_invalidate
dma-iommu: Implement NESTED_MSI cookie
iommu/smmuv3: Nested mode single MSI doorbell per domain enforcement
iommu/smmuv3: Enforce incompatibility between nested mode and HW MSI
regions
iommu/smmuv3: Implement bind/unbind_guest_msi
iommu/smmuv3: Report non recoverable faults
Jacob Pan (1):
iommu: Introduce attach/detach_pasid_table API
Jean-Philippe Brucker (1):
iommu/arm-smmu-v3: Maintain a SID->device structure
drivers/iommu/arm-smmu-v3.c | 744 ++++++++++++++++++++++++++++++++----
drivers/iommu/dma-iommu.c | 142 ++++++-
drivers/iommu/iommu.c | 56 +++
include/linux/dma-iommu.h | 16 +
include/linux/iommu.h | 38 ++
include/uapi/linux/iommu.h | 51 +++
6 files changed, 975 insertions(+), 72 deletions(-)
--
2.20.1
_______________________________________________
iommu mailing list
iommu@lists.linux-foundation.org
https://lists.linuxfoundation.org/mailman/listinfo/iommu
WARNING: multiple messages have this Message-ID (diff)
From: Eric Auger <eric.auger@redhat.com>
To: eric.auger.pro@gmail.com, eric.auger@redhat.com,
iommu@lists.linux-foundation.org, linux-kernel@vger.kernel.org,
kvm@vger.kernel.org, kvmarm@lists.cs.columbia.edu,
will@kernel.org, joro@8bytes.org, maz@kernel.org,
robin.murphy@arm.com
Cc: jean-philippe@linaro.org, jacob.jun.pan@linux.intel.com,
zhangfei.gao@foxmail.com, alex.williamson@redhat.com,
yi.l.liu@intel.com, zhangfei.gao@linaro.org,
bbhushan2@marvell.com
Subject: [PATCH v11 00/13] SMMUv3 Nested Stage Setup (IOMMU part)
Date: Tue, 14 Apr 2020 17:05:54 +0200 [thread overview]
Message-ID: <20200414150607.28488-1-eric.auger@redhat.com> (raw)
This version fixes an issue observed by Shameer on an SMMU 3.2,
when moving from dual stage config to stage 1 only config.
The 2 high 64b of the STE now get reset. Otherwise, leaving the
S2TTB set may cause a C_BAD_STE error.
This series can be found at:
https://github.com/eauger/linux/tree/v5.6-2stage-v11_10.1
(including the VFIO part)
The QEMU fellow series still can be found at:
https://github.com/eauger/qemu/tree/v4.2.0-2stage-rfcv6
Users have expressed interest in that work and tested v9/v10:
- https://patchwork.kernel.org/cover/11039995/#23012381
- https://patchwork.kernel.org/cover/11039995/#23197235
Background:
This series brings the IOMMU part of HW nested paging support
in the SMMUv3. The VFIO part is submitted separately.
The IOMMU API is extended to support 2 new API functionalities:
1) pass the guest stage 1 configuration
2) pass stage 1 MSI bindings
Then those capabilities gets implemented in the SMMUv3 driver.
The virtualizer passes information through the VFIO user API
which cascades them to the iommu subsystem. This allows the guest
to own stage 1 tables and context descriptors (so-called PASID
table) while the host owns stage 2 tables and main configuration
structures (STE).
Best Regards
Eric
History:
v10 -> v11:
- S2TTB reset when S2 is off
- fix compil issue when CONFIG_IOMMU_DMA is not set
v9 -> v10:
- rebase on top of 5.6.0-rc3
v8 -> v9:
- rebase on 5.3
- split iommu/vfio parts
v6 -> v8:
- Implement VFIO-PCI device specific interrupt framework
v7 -> v8:
- rebase on top of v5.2-rc1 and especially
8be39a1a04c1 iommu/arm-smmu-v3: Add a master->domain pointer
- dynamic alloc of s1_cfg/s2_cfg
- __arm_smmu_tlb_inv_asid/s1_range_nosync
- check there is no HW MSI regions
- asid invalidation using pasid extended struct (change in the uapi)
- add s1_live/s2_live checks
- move check about support of nested stages in domain finalise
- fixes in error reporting according to the discussion with Robin
- reordered the patches to have first iommu/smmuv3 patches and then
VFIO patches
v6 -> v7:
- removed device handle from bind/unbind_guest_msi
- added "iommu/smmuv3: Nested mode single MSI doorbell per domain
enforcement"
- added few uapi comments as suggested by Jean, Jacop and Alex
v5 -> v6:
- Fix compilation issue when CONFIG_IOMMU_API is unset
v4 -> v5:
- fix bug reported by Vincent: fault handler unregistration now happens in
vfio_pci_release
- IOMMU_FAULT_PERM_* moved outside of struct definition + small
uapi changes suggested by Kean-Philippe (except fetch_addr)
- iommu: introduce device fault report API: removed the PRI part.
- see individual logs for more details
- reset the ste abort flag on detach
v3 -> v4:
- took into account Alex, jean-Philippe and Robin's comments on v3
- rework of the smmuv3 driver integration
- add tear down ops for msi binding and PASID table binding
- fix S1 fault propagation
- put fault reporting patches at the beginning of the series following
Jean-Philippe's request
- update of the cache invalidate and fault API uapis
- VFIO fault reporting rework with 2 separate regions and one mmappable
segment for the fault queue
- moved to PATCH
v2 -> v3:
- When registering the S1 MSI binding we now store the device handle. This
addresses Robin's comment about discimination of devices beonging to
different S1 groups and using different physical MSI doorbells.
- Change the fault reporting API: use VFIO_PCI_DMA_FAULT_IRQ_INDEX to
set the eventfd and expose the faults through an mmappable fault region
v1 -> v2:
- Added the fault reporting capability
- asid properly passed on invalidation (fix assignment of multiple
devices)
- see individual change logs for more info
Eric Auger (11):
iommu: Introduce bind/unbind_guest_msi
iommu/smmuv3: Dynamically allocate s1_cfg and s2_cfg
iommu/smmuv3: Get prepared for nested stage support
iommu/smmuv3: Implement attach/detach_pasid_table
iommu/smmuv3: Allow stage 1 invalidation with unmanaged ASIDs
iommu/smmuv3: Implement cache_invalidate
dma-iommu: Implement NESTED_MSI cookie
iommu/smmuv3: Nested mode single MSI doorbell per domain enforcement
iommu/smmuv3: Enforce incompatibility between nested mode and HW MSI
regions
iommu/smmuv3: Implement bind/unbind_guest_msi
iommu/smmuv3: Report non recoverable faults
Jacob Pan (1):
iommu: Introduce attach/detach_pasid_table API
Jean-Philippe Brucker (1):
iommu/arm-smmu-v3: Maintain a SID->device structure
drivers/iommu/arm-smmu-v3.c | 744 ++++++++++++++++++++++++++++++++----
drivers/iommu/dma-iommu.c | 142 ++++++-
drivers/iommu/iommu.c | 56 +++
include/linux/dma-iommu.h | 16 +
include/linux/iommu.h | 38 ++
include/uapi/linux/iommu.h | 51 +++
6 files changed, 975 insertions(+), 72 deletions(-)
--
2.20.1
_______________________________________________
kvmarm mailing list
kvmarm@lists.cs.columbia.edu
https://lists.cs.columbia.edu/mailman/listinfo/kvmarm
next reply other threads:[~2020-04-14 15:07 UTC|newest]
Thread overview: 81+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-04-14 15:05 Eric Auger [this message]
2020-04-14 15:05 ` [PATCH v11 00/13] SMMUv3 Nested Stage Setup (IOMMU part) Eric Auger
2020-04-14 15:05 ` Eric Auger
2020-04-14 15:05 ` [PATCH v11 01/13] iommu: Introduce attach/detach_pasid_table API Eric Auger
2020-04-14 15:05 ` Eric Auger
2020-04-14 15:05 ` Eric Auger
2020-04-14 22:15 ` Jacob Pan
2020-04-14 22:15 ` Jacob Pan
2020-04-14 22:15 ` Jacob Pan
2020-04-15 14:52 ` Auger Eric
2020-04-15 14:52 ` Auger Eric
2020-04-15 14:52 ` Auger Eric
2020-04-15 15:59 ` Jacob Pan
2020-04-15 15:59 ` Jacob Pan
2020-04-15 15:59 ` Jacob Pan
2020-04-15 16:02 ` Auger Eric
2020-04-15 16:02 ` Auger Eric
2020-04-15 16:02 ` Auger Eric
2020-04-14 15:05 ` [PATCH v11 02/13] iommu: Introduce bind/unbind_guest_msi Eric Auger
2020-04-14 15:05 ` Eric Auger
2020-04-14 15:05 ` Eric Auger
2020-04-14 15:05 ` [PATCH v11 03/13] iommu/arm-smmu-v3: Maintain a SID->device structure Eric Auger
2020-04-14 15:05 ` Eric Auger
2020-04-14 15:05 ` Eric Auger
2020-04-14 15:05 ` [PATCH v11 04/13] iommu/smmuv3: Dynamically allocate s1_cfg and s2_cfg Eric Auger
2020-04-14 15:05 ` Eric Auger
2020-04-14 15:05 ` Eric Auger
2020-04-14 15:05 ` [PATCH v11 05/13] iommu/smmuv3: Get prepared for nested stage support Eric Auger
2020-04-14 15:05 ` Eric Auger
2020-04-14 15:05 ` Eric Auger
2020-04-14 15:06 ` [PATCH v11 06/13] iommu/smmuv3: Implement attach/detach_pasid_table Eric Auger
2020-04-14 15:06 ` Eric Auger
2020-04-14 15:06 ` Eric Auger
2020-04-14 15:06 ` [PATCH v11 07/13] iommu/smmuv3: Allow stage 1 invalidation with unmanaged ASIDs Eric Auger
2020-04-14 15:06 ` Eric Auger
2020-04-14 15:06 ` Eric Auger
2020-04-14 15:06 ` [PATCH v11 08/13] iommu/smmuv3: Implement cache_invalidate Eric Auger
2020-04-14 15:06 ` Eric Auger
2020-04-14 15:06 ` Eric Auger
2020-04-14 15:06 ` [PATCH v11 09/13] dma-iommu: Implement NESTED_MSI cookie Eric Auger
2020-04-14 15:06 ` Eric Auger
2020-04-14 15:06 ` Eric Auger
2020-04-14 15:06 ` [PATCH v11 10/13] iommu/smmuv3: Nested mode single MSI doorbell per domain enforcement Eric Auger
2020-04-14 15:06 ` Eric Auger
2020-04-14 15:06 ` Eric Auger
2020-04-14 15:06 ` [PATCH v11 11/13] iommu/smmuv3: Enforce incompatibility between nested mode and HW MSI regions Eric Auger
2020-04-14 15:06 ` Eric Auger
2020-04-14 15:06 ` Eric Auger
2020-04-14 15:06 ` [PATCH v11 12/13] iommu/smmuv3: Implement bind/unbind_guest_msi Eric Auger
2020-04-14 15:06 ` Eric Auger
2020-04-14 15:06 ` Eric Auger
2020-04-14 15:06 ` [PATCH v11 13/13] iommu/smmuv3: Report non recoverable faults Eric Auger
2020-04-14 15:06 ` Eric Auger
2020-04-14 15:06 ` Eric Auger
2020-04-16 4:25 ` [PATCH v11 00/13] SMMUv3 Nested Stage Setup (IOMMU part) Zhangfei Gao
2020-04-16 4:25 ` Zhangfei Gao
2020-04-16 4:25 ` Zhangfei Gao
2020-04-16 7:45 ` Auger Eric
2020-04-16 7:45 ` Auger Eric
2020-04-16 7:45 ` Auger Eric
2020-04-30 9:39 ` Shameerali Kolothum Thodi
2020-04-30 9:39 ` Shameerali Kolothum Thodi
2020-04-30 9:39 ` Shameerali Kolothum Thodi
2020-05-07 6:59 ` Shameerali Kolothum Thodi
2020-05-07 6:59 ` Shameerali Kolothum Thodi
2020-05-07 6:59 ` Shameerali Kolothum Thodi
2020-05-07 7:45 ` Auger Eric
2020-05-07 7:45 ` Auger Eric
2020-05-07 7:45 ` Auger Eric
2020-05-13 13:28 ` Auger Eric
2020-05-13 13:28 ` Auger Eric
2020-05-13 13:28 ` Auger Eric
2020-05-13 15:57 ` Shameerali Kolothum Thodi
2020-05-13 15:57 ` Shameerali Kolothum Thodi
2020-05-13 15:57 ` Shameerali Kolothum Thodi
2020-11-17 8:39 ` Auger Eric
2020-11-17 8:39 ` Auger Eric
2020-11-17 8:39 ` Auger Eric
2020-11-17 9:16 ` Shameerali Kolothum Thodi
2020-11-17 9:16 ` Shameerali Kolothum Thodi
2020-11-17 9:16 ` Shameerali Kolothum Thodi
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