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From: Eric Auger <eric.auger@redhat.com>
To: eric.auger.pro@gmail.com, eric.auger@redhat.com,
	iommu@lists.linux-foundation.org, linux-kernel@vger.kernel.org,
	kvm@vger.kernel.org, kvmarm@lists.cs.columbia.edu,
	will@kernel.org, joro@8bytes.org, maz@kernel.org,
	robin.murphy@arm.com
Cc: jean-philippe@linaro.org, zhangfei.gao@linaro.org,
	shameerali.kolothum.thodi@huawei.com, alex.williamson@redhat.com,
	jacob.jun.pan@linux.intel.com, yi.l.liu@intel.com,
	peter.maydell@linaro.org, zhangfei.gao@gmail.com,
	tn@semihalf.com, zhangfei.gao@foxmail.com, bbhushan2@marvell.com
Subject: [PATCH v11 07/13] iommu/smmuv3: Allow stage 1 invalidation with unmanaged ASIDs
Date: Tue, 14 Apr 2020 17:06:01 +0200	[thread overview]
Message-ID: <20200414150607.28488-8-eric.auger@redhat.com> (raw)
In-Reply-To: <20200414150607.28488-1-eric.auger@redhat.com>

With nested stage support, soon we will need to invalidate
S1 contexts and ranges tagged with an unmanaged asid, this
latter being managed by the guest. So let's introduce 2 helpers
that allow to invalidate with externally managed ASIDs

Signed-off-by: Eric Auger <eric.auger@redhat.com>
---
 drivers/iommu/arm-smmu-v3.c | 36 ++++++++++++++++++++++++++++++------
 1 file changed, 30 insertions(+), 6 deletions(-)

diff --git a/drivers/iommu/arm-smmu-v3.c b/drivers/iommu/arm-smmu-v3.c
index 21bcf2536320..4ec2106be301 100644
--- a/drivers/iommu/arm-smmu-v3.c
+++ b/drivers/iommu/arm-smmu-v3.c
@@ -2307,13 +2307,18 @@ static int arm_smmu_atc_inv_domain(struct arm_smmu_domain *smmu_domain,
 }
 
 /* IO_PGTABLE API */
-static void arm_smmu_tlb_inv_context(void *cookie)
+
+static void __arm_smmu_tlb_inv_context(struct arm_smmu_domain *smmu_domain,
+				       int ext_asid)
 {
-	struct arm_smmu_domain *smmu_domain = cookie;
 	struct arm_smmu_device *smmu = smmu_domain->smmu;
 	struct arm_smmu_cmdq_ent cmd;
 
-	if (smmu_domain->stage == ARM_SMMU_DOMAIN_S1) {
+	if (ext_asid >= 0) { /* guest stage 1 invalidation */
+		cmd.opcode	= CMDQ_OP_TLBI_NH_ASID;
+		cmd.tlbi.asid	= ext_asid;
+		cmd.tlbi.vmid	= smmu_domain->s2_cfg->vmid;
+	} else if (smmu_domain->stage == ARM_SMMU_DOMAIN_S1) {
 		cmd.opcode	= CMDQ_OP_TLBI_NH_ASID;
 		cmd.tlbi.asid	= smmu_domain->s1_cfg->cd.asid;
 		cmd.tlbi.vmid	= 0;
@@ -2334,9 +2339,17 @@ static void arm_smmu_tlb_inv_context(void *cookie)
 	arm_smmu_atc_inv_domain(smmu_domain, 0, 0, 0);
 }
 
-static void arm_smmu_tlb_inv_range(unsigned long iova, size_t size,
+static void arm_smmu_tlb_inv_context(void *cookie)
+{
+	struct arm_smmu_domain *smmu_domain = cookie;
+
+	__arm_smmu_tlb_inv_context(smmu_domain, -1);
+}
+
+static void __arm_smmu_tlb_inv_range(unsigned long iova, size_t size,
 				   size_t granule, bool leaf,
-				   struct arm_smmu_domain *smmu_domain)
+				   struct arm_smmu_domain *smmu_domain,
+				   int ext_asid)
 {
 	struct arm_smmu_device *smmu = smmu_domain->smmu;
 	unsigned long start = iova, end = iova + size, num_pages = 0, tg = 0;
@@ -2351,7 +2364,11 @@ static void arm_smmu_tlb_inv_range(unsigned long iova, size_t size,
 	if (!size)
 		return;
 
-	if (smmu_domain->stage == ARM_SMMU_DOMAIN_S1) {
+	if (ext_asid >= 0) {  /* guest stage 1 invalidation */
+		cmd.opcode	= CMDQ_OP_TLBI_NH_VA;
+		cmd.tlbi.asid	= ext_asid;
+		cmd.tlbi.vmid	= smmu_domain->s2_cfg->vmid;
+	} else if (smmu_domain->stage == ARM_SMMU_DOMAIN_S1) {
 		cmd.opcode	= CMDQ_OP_TLBI_NH_VA;
 		cmd.tlbi.asid	= smmu_domain->s1_cfg->cd.asid;
 	} else {
@@ -2411,6 +2428,13 @@ static void arm_smmu_tlb_inv_range(unsigned long iova, size_t size,
 	arm_smmu_atc_inv_domain(smmu_domain, 0, start, size);
 }
 
+static void arm_smmu_tlb_inv_range(unsigned long iova, size_t size,
+				   size_t granule, bool leaf,
+				   struct arm_smmu_domain *smmu_domain)
+{
+	__arm_smmu_tlb_inv_range(iova, size, granule, leaf, smmu_domain, -1);
+}
+
 static void arm_smmu_tlb_inv_page_nosync(struct iommu_iotlb_gather *gather,
 					 unsigned long iova, size_t granule,
 					 void *cookie)
-- 
2.20.1


WARNING: multiple messages have this Message-ID (diff)
From: Eric Auger <eric.auger@redhat.com>
To: eric.auger.pro@gmail.com, eric.auger@redhat.com,
	iommu@lists.linux-foundation.org, linux-kernel@vger.kernel.org,
	kvm@vger.kernel.org, kvmarm@lists.cs.columbia.edu,
	will@kernel.org, joro@8bytes.org, maz@kernel.org,
	robin.murphy@arm.com
Cc: jean-philippe@linaro.org, peter.maydell@linaro.org,
	zhangfei.gao@foxmail.com, alex.williamson@redhat.com,
	zhangfei.gao@linaro.org, bbhushan2@marvell.com
Subject: [PATCH v11 07/13] iommu/smmuv3: Allow stage 1 invalidation with unmanaged ASIDs
Date: Tue, 14 Apr 2020 17:06:01 +0200	[thread overview]
Message-ID: <20200414150607.28488-8-eric.auger@redhat.com> (raw)
In-Reply-To: <20200414150607.28488-1-eric.auger@redhat.com>

With nested stage support, soon we will need to invalidate
S1 contexts and ranges tagged with an unmanaged asid, this
latter being managed by the guest. So let's introduce 2 helpers
that allow to invalidate with externally managed ASIDs

Signed-off-by: Eric Auger <eric.auger@redhat.com>
---
 drivers/iommu/arm-smmu-v3.c | 36 ++++++++++++++++++++++++++++++------
 1 file changed, 30 insertions(+), 6 deletions(-)

diff --git a/drivers/iommu/arm-smmu-v3.c b/drivers/iommu/arm-smmu-v3.c
index 21bcf2536320..4ec2106be301 100644
--- a/drivers/iommu/arm-smmu-v3.c
+++ b/drivers/iommu/arm-smmu-v3.c
@@ -2307,13 +2307,18 @@ static int arm_smmu_atc_inv_domain(struct arm_smmu_domain *smmu_domain,
 }
 
 /* IO_PGTABLE API */
-static void arm_smmu_tlb_inv_context(void *cookie)
+
+static void __arm_smmu_tlb_inv_context(struct arm_smmu_domain *smmu_domain,
+				       int ext_asid)
 {
-	struct arm_smmu_domain *smmu_domain = cookie;
 	struct arm_smmu_device *smmu = smmu_domain->smmu;
 	struct arm_smmu_cmdq_ent cmd;
 
-	if (smmu_domain->stage == ARM_SMMU_DOMAIN_S1) {
+	if (ext_asid >= 0) { /* guest stage 1 invalidation */
+		cmd.opcode	= CMDQ_OP_TLBI_NH_ASID;
+		cmd.tlbi.asid	= ext_asid;
+		cmd.tlbi.vmid	= smmu_domain->s2_cfg->vmid;
+	} else if (smmu_domain->stage == ARM_SMMU_DOMAIN_S1) {
 		cmd.opcode	= CMDQ_OP_TLBI_NH_ASID;
 		cmd.tlbi.asid	= smmu_domain->s1_cfg->cd.asid;
 		cmd.tlbi.vmid	= 0;
@@ -2334,9 +2339,17 @@ static void arm_smmu_tlb_inv_context(void *cookie)
 	arm_smmu_atc_inv_domain(smmu_domain, 0, 0, 0);
 }
 
-static void arm_smmu_tlb_inv_range(unsigned long iova, size_t size,
+static void arm_smmu_tlb_inv_context(void *cookie)
+{
+	struct arm_smmu_domain *smmu_domain = cookie;
+
+	__arm_smmu_tlb_inv_context(smmu_domain, -1);
+}
+
+static void __arm_smmu_tlb_inv_range(unsigned long iova, size_t size,
 				   size_t granule, bool leaf,
-				   struct arm_smmu_domain *smmu_domain)
+				   struct arm_smmu_domain *smmu_domain,
+				   int ext_asid)
 {
 	struct arm_smmu_device *smmu = smmu_domain->smmu;
 	unsigned long start = iova, end = iova + size, num_pages = 0, tg = 0;
@@ -2351,7 +2364,11 @@ static void arm_smmu_tlb_inv_range(unsigned long iova, size_t size,
 	if (!size)
 		return;
 
-	if (smmu_domain->stage == ARM_SMMU_DOMAIN_S1) {
+	if (ext_asid >= 0) {  /* guest stage 1 invalidation */
+		cmd.opcode	= CMDQ_OP_TLBI_NH_VA;
+		cmd.tlbi.asid	= ext_asid;
+		cmd.tlbi.vmid	= smmu_domain->s2_cfg->vmid;
+	} else if (smmu_domain->stage == ARM_SMMU_DOMAIN_S1) {
 		cmd.opcode	= CMDQ_OP_TLBI_NH_VA;
 		cmd.tlbi.asid	= smmu_domain->s1_cfg->cd.asid;
 	} else {
@@ -2411,6 +2428,13 @@ static void arm_smmu_tlb_inv_range(unsigned long iova, size_t size,
 	arm_smmu_atc_inv_domain(smmu_domain, 0, start, size);
 }
 
+static void arm_smmu_tlb_inv_range(unsigned long iova, size_t size,
+				   size_t granule, bool leaf,
+				   struct arm_smmu_domain *smmu_domain)
+{
+	__arm_smmu_tlb_inv_range(iova, size, granule, leaf, smmu_domain, -1);
+}
+
 static void arm_smmu_tlb_inv_page_nosync(struct iommu_iotlb_gather *gather,
 					 unsigned long iova, size_t granule,
 					 void *cookie)
-- 
2.20.1

_______________________________________________
iommu mailing list
iommu@lists.linux-foundation.org
https://lists.linuxfoundation.org/mailman/listinfo/iommu

WARNING: multiple messages have this Message-ID (diff)
From: Eric Auger <eric.auger@redhat.com>
To: eric.auger.pro@gmail.com, eric.auger@redhat.com,
	iommu@lists.linux-foundation.org, linux-kernel@vger.kernel.org,
	kvm@vger.kernel.org, kvmarm@lists.cs.columbia.edu,
	will@kernel.org, joro@8bytes.org, maz@kernel.org,
	robin.murphy@arm.com
Cc: jean-philippe@linaro.org, jacob.jun.pan@linux.intel.com,
	zhangfei.gao@foxmail.com, alex.williamson@redhat.com,
	yi.l.liu@intel.com, zhangfei.gao@linaro.org,
	bbhushan2@marvell.com
Subject: [PATCH v11 07/13] iommu/smmuv3: Allow stage 1 invalidation with unmanaged ASIDs
Date: Tue, 14 Apr 2020 17:06:01 +0200	[thread overview]
Message-ID: <20200414150607.28488-8-eric.auger@redhat.com> (raw)
In-Reply-To: <20200414150607.28488-1-eric.auger@redhat.com>

With nested stage support, soon we will need to invalidate
S1 contexts and ranges tagged with an unmanaged asid, this
latter being managed by the guest. So let's introduce 2 helpers
that allow to invalidate with externally managed ASIDs

Signed-off-by: Eric Auger <eric.auger@redhat.com>
---
 drivers/iommu/arm-smmu-v3.c | 36 ++++++++++++++++++++++++++++++------
 1 file changed, 30 insertions(+), 6 deletions(-)

diff --git a/drivers/iommu/arm-smmu-v3.c b/drivers/iommu/arm-smmu-v3.c
index 21bcf2536320..4ec2106be301 100644
--- a/drivers/iommu/arm-smmu-v3.c
+++ b/drivers/iommu/arm-smmu-v3.c
@@ -2307,13 +2307,18 @@ static int arm_smmu_atc_inv_domain(struct arm_smmu_domain *smmu_domain,
 }
 
 /* IO_PGTABLE API */
-static void arm_smmu_tlb_inv_context(void *cookie)
+
+static void __arm_smmu_tlb_inv_context(struct arm_smmu_domain *smmu_domain,
+				       int ext_asid)
 {
-	struct arm_smmu_domain *smmu_domain = cookie;
 	struct arm_smmu_device *smmu = smmu_domain->smmu;
 	struct arm_smmu_cmdq_ent cmd;
 
-	if (smmu_domain->stage == ARM_SMMU_DOMAIN_S1) {
+	if (ext_asid >= 0) { /* guest stage 1 invalidation */
+		cmd.opcode	= CMDQ_OP_TLBI_NH_ASID;
+		cmd.tlbi.asid	= ext_asid;
+		cmd.tlbi.vmid	= smmu_domain->s2_cfg->vmid;
+	} else if (smmu_domain->stage == ARM_SMMU_DOMAIN_S1) {
 		cmd.opcode	= CMDQ_OP_TLBI_NH_ASID;
 		cmd.tlbi.asid	= smmu_domain->s1_cfg->cd.asid;
 		cmd.tlbi.vmid	= 0;
@@ -2334,9 +2339,17 @@ static void arm_smmu_tlb_inv_context(void *cookie)
 	arm_smmu_atc_inv_domain(smmu_domain, 0, 0, 0);
 }
 
-static void arm_smmu_tlb_inv_range(unsigned long iova, size_t size,
+static void arm_smmu_tlb_inv_context(void *cookie)
+{
+	struct arm_smmu_domain *smmu_domain = cookie;
+
+	__arm_smmu_tlb_inv_context(smmu_domain, -1);
+}
+
+static void __arm_smmu_tlb_inv_range(unsigned long iova, size_t size,
 				   size_t granule, bool leaf,
-				   struct arm_smmu_domain *smmu_domain)
+				   struct arm_smmu_domain *smmu_domain,
+				   int ext_asid)
 {
 	struct arm_smmu_device *smmu = smmu_domain->smmu;
 	unsigned long start = iova, end = iova + size, num_pages = 0, tg = 0;
@@ -2351,7 +2364,11 @@ static void arm_smmu_tlb_inv_range(unsigned long iova, size_t size,
 	if (!size)
 		return;
 
-	if (smmu_domain->stage == ARM_SMMU_DOMAIN_S1) {
+	if (ext_asid >= 0) {  /* guest stage 1 invalidation */
+		cmd.opcode	= CMDQ_OP_TLBI_NH_VA;
+		cmd.tlbi.asid	= ext_asid;
+		cmd.tlbi.vmid	= smmu_domain->s2_cfg->vmid;
+	} else if (smmu_domain->stage == ARM_SMMU_DOMAIN_S1) {
 		cmd.opcode	= CMDQ_OP_TLBI_NH_VA;
 		cmd.tlbi.asid	= smmu_domain->s1_cfg->cd.asid;
 	} else {
@@ -2411,6 +2428,13 @@ static void arm_smmu_tlb_inv_range(unsigned long iova, size_t size,
 	arm_smmu_atc_inv_domain(smmu_domain, 0, start, size);
 }
 
+static void arm_smmu_tlb_inv_range(unsigned long iova, size_t size,
+				   size_t granule, bool leaf,
+				   struct arm_smmu_domain *smmu_domain)
+{
+	__arm_smmu_tlb_inv_range(iova, size, granule, leaf, smmu_domain, -1);
+}
+
 static void arm_smmu_tlb_inv_page_nosync(struct iommu_iotlb_gather *gather,
 					 unsigned long iova, size_t granule,
 					 void *cookie)
-- 
2.20.1

_______________________________________________
kvmarm mailing list
kvmarm@lists.cs.columbia.edu
https://lists.cs.columbia.edu/mailman/listinfo/kvmarm

  parent reply	other threads:[~2020-04-14 15:13 UTC|newest]

Thread overview: 81+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-04-14 15:05 [PATCH v11 00/13] SMMUv3 Nested Stage Setup (IOMMU part) Eric Auger
2020-04-14 15:05 ` Eric Auger
2020-04-14 15:05 ` Eric Auger
2020-04-14 15:05 ` [PATCH v11 01/13] iommu: Introduce attach/detach_pasid_table API Eric Auger
2020-04-14 15:05   ` Eric Auger
2020-04-14 15:05   ` Eric Auger
2020-04-14 22:15   ` Jacob Pan
2020-04-14 22:15     ` Jacob Pan
2020-04-14 22:15     ` Jacob Pan
2020-04-15 14:52     ` Auger Eric
2020-04-15 14:52       ` Auger Eric
2020-04-15 14:52       ` Auger Eric
2020-04-15 15:59       ` Jacob Pan
2020-04-15 15:59         ` Jacob Pan
2020-04-15 15:59         ` Jacob Pan
2020-04-15 16:02         ` Auger Eric
2020-04-15 16:02           ` Auger Eric
2020-04-15 16:02           ` Auger Eric
2020-04-14 15:05 ` [PATCH v11 02/13] iommu: Introduce bind/unbind_guest_msi Eric Auger
2020-04-14 15:05   ` Eric Auger
2020-04-14 15:05   ` Eric Auger
2020-04-14 15:05 ` [PATCH v11 03/13] iommu/arm-smmu-v3: Maintain a SID->device structure Eric Auger
2020-04-14 15:05   ` Eric Auger
2020-04-14 15:05   ` Eric Auger
2020-04-14 15:05 ` [PATCH v11 04/13] iommu/smmuv3: Dynamically allocate s1_cfg and s2_cfg Eric Auger
2020-04-14 15:05   ` Eric Auger
2020-04-14 15:05   ` Eric Auger
2020-04-14 15:05 ` [PATCH v11 05/13] iommu/smmuv3: Get prepared for nested stage support Eric Auger
2020-04-14 15:05   ` Eric Auger
2020-04-14 15:05   ` Eric Auger
2020-04-14 15:06 ` [PATCH v11 06/13] iommu/smmuv3: Implement attach/detach_pasid_table Eric Auger
2020-04-14 15:06   ` Eric Auger
2020-04-14 15:06   ` Eric Auger
2020-04-14 15:06 ` Eric Auger [this message]
2020-04-14 15:06   ` [PATCH v11 07/13] iommu/smmuv3: Allow stage 1 invalidation with unmanaged ASIDs Eric Auger
2020-04-14 15:06   ` Eric Auger
2020-04-14 15:06 ` [PATCH v11 08/13] iommu/smmuv3: Implement cache_invalidate Eric Auger
2020-04-14 15:06   ` Eric Auger
2020-04-14 15:06   ` Eric Auger
2020-04-14 15:06 ` [PATCH v11 09/13] dma-iommu: Implement NESTED_MSI cookie Eric Auger
2020-04-14 15:06   ` Eric Auger
2020-04-14 15:06   ` Eric Auger
2020-04-14 15:06 ` [PATCH v11 10/13] iommu/smmuv3: Nested mode single MSI doorbell per domain enforcement Eric Auger
2020-04-14 15:06   ` Eric Auger
2020-04-14 15:06   ` Eric Auger
2020-04-14 15:06 ` [PATCH v11 11/13] iommu/smmuv3: Enforce incompatibility between nested mode and HW MSI regions Eric Auger
2020-04-14 15:06   ` Eric Auger
2020-04-14 15:06   ` Eric Auger
2020-04-14 15:06 ` [PATCH v11 12/13] iommu/smmuv3: Implement bind/unbind_guest_msi Eric Auger
2020-04-14 15:06   ` Eric Auger
2020-04-14 15:06   ` Eric Auger
2020-04-14 15:06 ` [PATCH v11 13/13] iommu/smmuv3: Report non recoverable faults Eric Auger
2020-04-14 15:06   ` Eric Auger
2020-04-14 15:06   ` Eric Auger
2020-04-16  4:25 ` [PATCH v11 00/13] SMMUv3 Nested Stage Setup (IOMMU part) Zhangfei Gao
2020-04-16  4:25   ` Zhangfei Gao
2020-04-16  4:25   ` Zhangfei Gao
2020-04-16  7:45   ` Auger Eric
2020-04-16  7:45     ` Auger Eric
2020-04-16  7:45     ` Auger Eric
2020-04-30  9:39     ` Shameerali Kolothum Thodi
2020-04-30  9:39       ` Shameerali Kolothum Thodi
2020-04-30  9:39       ` Shameerali Kolothum Thodi
2020-05-07  6:59     ` Shameerali Kolothum Thodi
2020-05-07  6:59       ` Shameerali Kolothum Thodi
2020-05-07  6:59       ` Shameerali Kolothum Thodi
2020-05-07  7:45       ` Auger Eric
2020-05-07  7:45         ` Auger Eric
2020-05-07  7:45         ` Auger Eric
2020-05-13 13:28       ` Auger Eric
2020-05-13 13:28         ` Auger Eric
2020-05-13 13:28         ` Auger Eric
2020-05-13 15:57         ` Shameerali Kolothum Thodi
2020-05-13 15:57           ` Shameerali Kolothum Thodi
2020-05-13 15:57           ` Shameerali Kolothum Thodi
2020-11-17  8:39           ` Auger Eric
2020-11-17  8:39             ` Auger Eric
2020-11-17  8:39             ` Auger Eric
2020-11-17  9:16             ` Shameerali Kolothum Thodi
2020-11-17  9:16               ` Shameerali Kolothum Thodi
2020-11-17  9:16               ` Shameerali Kolothum Thodi

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