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From: Chris Wilson <chris@chris-wilson.co.uk>
To: intel-gfx@lists.freedesktop.org
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Subject: [Intel-gfx] [PATCH 6/9] drm/i915/gt: Track use of RPS interrupts in flags
Date: Mon, 27 Apr 2020 09:54:05 +0100	[thread overview]
Message-ID: <20200427085408.13879-6-chris@chris-wilson.co.uk> (raw)
In-Reply-To: <20200427085408.13879-1-chris@chris-wilson.co.uk>

Use the new intel_rps.flags field to store whether or not interrupts are
being used with RPS.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Andi Shyti <andi@etezian.org>
---
 drivers/gpu/drm/i915/gt/intel_rps.c       | 17 ++++++++++++-----
 drivers/gpu/drm/i915/gt/intel_rps.h       | 15 +++++++++++++++
 drivers/gpu/drm/i915/gt/intel_rps_types.h |  1 +
 drivers/gpu/drm/i915/gt/selftest_rps.c    |  2 +-
 4 files changed, 29 insertions(+), 6 deletions(-)

diff --git a/drivers/gpu/drm/i915/gt/intel_rps.c b/drivers/gpu/drm/i915/gt/intel_rps.c
index a27e989a08eb..52151001d7ab 100644
--- a/drivers/gpu/drm/i915/gt/intel_rps.c
+++ b/drivers/gpu/drm/i915/gt/intel_rps.c
@@ -742,7 +742,7 @@ void intel_rps_unpark(struct intel_rps *rps)
 
 	mutex_unlock(&rps->lock);
 
-	if (INTEL_GEN(rps_to_i915(rps)) >= 6)
+	if (intel_rps_has_interrupts(rps))
 		rps_enable_interrupts(rps);
 
 	if (IS_GEN(rps_to_i915(rps), 5))
@@ -751,12 +751,10 @@ void intel_rps_unpark(struct intel_rps *rps)
 
 void intel_rps_park(struct intel_rps *rps)
 {
-	struct drm_i915_private *i915 = rps_to_i915(rps);
-
 	if (!intel_rps_clear_active(rps))
 		return;
 
-	if (INTEL_GEN(i915) >= 6)
+	if (intel_rps_has_interrupts(rps))
 		rps_disable_interrupts(rps);
 
 	if (rps->last_freq <= rps->idle_freq)
@@ -838,7 +836,7 @@ int intel_rps_set(struct intel_rps *rps, u8 val)
 		 * Make sure we continue to get interrupts
 		 * until we hit the minimum or maximum frequencies.
 		 */
-		if (INTEL_GEN(rps_to_i915(rps)) >= 6) {
+		if (intel_rps_has_interrupts(rps)) {
 			struct intel_uncore *uncore = rps_to_uncore(rps);
 
 			set(uncore,
@@ -1257,6 +1255,11 @@ void intel_rps_enable(struct intel_rps *rps)
 	GEM_BUG_ON(rps->efficient_freq < rps->min_freq);
 	GEM_BUG_ON(rps->efficient_freq > rps->max_freq);
 
+	if (INTEL_GEN(i915) >= 6)
+		intel_rps_set_interrupts(rps);
+	else
+		/* Ironlake currently uses intel_ips.ko */ {}
+
 	intel_rps_set_enabled(rps);
 }
 
@@ -1270,6 +1273,7 @@ void intel_rps_disable(struct intel_rps *rps)
 	struct drm_i915_private *i915 = rps_to_i915(rps);
 
 	intel_rps_clear_enabled(rps);
+	intel_rps_clear_interrupts(rps);
 
 	if (INTEL_GEN(i915) >= 6)
 		gen6_rps_disable(rps);
@@ -1741,6 +1745,9 @@ void intel_rps_init(struct intel_rps *rps)
 
 	if (INTEL_GEN(i915) >= 8 && INTEL_GEN(i915) < 11)
 		rps->pm_intrmsk_mbz |= GEN8_PMINTR_DISABLE_REDIRECT_TO_GUC;
+
+	if (INTEL_GEN(i915) >= 6)
+		rps_disable_interrupts(rps);
 }
 
 u32 intel_rps_get_cagf(struct intel_rps *rps, u32 rpstat)
diff --git a/drivers/gpu/drm/i915/gt/intel_rps.h b/drivers/gpu/drm/i915/gt/intel_rps.h
index a01decf70f31..0ce6a0e492ea 100644
--- a/drivers/gpu/drm/i915/gt/intel_rps.h
+++ b/drivers/gpu/drm/i915/gt/intel_rps.h
@@ -66,4 +66,19 @@ static inline bool intel_rps_clear_active(struct intel_rps *rps)
 	return test_and_clear_bit(INTEL_RPS_ACTIVE, &rps->flags);
 }
 
+static inline bool intel_rps_has_interrupts(const struct intel_rps *rps)
+{
+	return test_bit(INTEL_RPS_INTERRUPTS, &rps->flags);
+}
+
+static inline void intel_rps_set_interrupts(struct intel_rps *rps)
+{
+	set_bit(INTEL_RPS_INTERRUPTS, &rps->flags);
+}
+
+static inline void intel_rps_clear_interrupts(struct intel_rps *rps)
+{
+	clear_bit(INTEL_RPS_INTERRUPTS, &rps->flags);
+}
+
 #endif /* INTEL_RPS_H */
diff --git a/drivers/gpu/drm/i915/gt/intel_rps_types.h b/drivers/gpu/drm/i915/gt/intel_rps_types.h
index 1ec44f994bc5..624e93108da4 100644
--- a/drivers/gpu/drm/i915/gt/intel_rps_types.h
+++ b/drivers/gpu/drm/i915/gt/intel_rps_types.h
@@ -34,6 +34,7 @@ struct intel_rps_ei {
 enum {
 	INTEL_RPS_ENABLED = 0,
 	INTEL_RPS_ACTIVE,
+	INTEL_RPS_INTERRUPTS,
 };
 
 struct intel_rps {
diff --git a/drivers/gpu/drm/i915/gt/selftest_rps.c b/drivers/gpu/drm/i915/gt/selftest_rps.c
index f47b59d5943c..1fcbffb8f3db 100644
--- a/drivers/gpu/drm/i915/gt/selftest_rps.c
+++ b/drivers/gpu/drm/i915/gt/selftest_rps.c
@@ -878,7 +878,7 @@ int live_rps_interrupt(void *arg)
 	 * First, let's check whether or not we are receiving interrupts.
 	 */
 
-	if (!intel_rps_is_enabled(rps))
+	if (!intel_rps_has_interrupts(rps))
 		return 0;
 
 	intel_gt_pm_get(gt);
-- 
2.20.1

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  parent reply	other threads:[~2020-04-27  8:54 UTC|newest]

Thread overview: 22+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-04-27  8:54 [Intel-gfx] [PATCH 1/9] drm/i915/gt: Sanitize GT first Chris Wilson
2020-04-27  8:54 ` [Intel-gfx] [PATCH 2/9] drm/i915/gt: Fix up clock frequency Chris Wilson
2020-04-27 19:52   ` Andi Shyti
2020-04-27 20:03     ` Chris Wilson
2020-04-27  8:54 ` [Intel-gfx] [PATCH 3/9] drm/i915/execlists: Check preempt-timeout target before submit_ports Chris Wilson
2020-04-27  8:54 ` [Intel-gfx] [PATCH 4/9] drm/i915/gt: Always enable busy-stats for execlists Chris Wilson
2020-04-27  8:54 ` [Intel-gfx] [PATCH 5/9] drm/i915/gt: Move rps.enabled/active to flags Chris Wilson
2020-04-27 19:53   ` Andi Shyti
2020-04-27  8:54 ` Chris Wilson [this message]
2020-04-27  8:54 ` [Intel-gfx] [PATCH 7/9] drm/i915/gt: Switch to manual evaluation of RPS Chris Wilson
2020-04-27 16:39   ` Andi Shyti
2020-04-27  8:54 ` [Intel-gfx] [PATCH 8/9] drm/i915/gt: Apply the aggressive downclocking to parking Chris Wilson
2020-04-27 20:38   ` Andi Shyti
2020-04-27  8:54 ` [Intel-gfx] [PATCH 9/9] drm/i915/gt: Restore aggressive post-boost downclocking Chris Wilson
2020-04-27 12:40   ` Chris Wilson
2020-04-27 17:06     ` Chris Wilson
2020-04-27 20:42       ` Andi Shyti
2020-04-27  9:41 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [1/9] drm/i915/gt: Sanitize GT first Patchwork
2020-04-27  9:46 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2020-04-27 10:05 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2020-04-27 11:10 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
2020-04-27 19:51 ` [Intel-gfx] [PATCH 1/9] " Andi Shyti

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