* [PATCH 00/16] dts/dt-bindings: Fix Arm Ltd. ARMv8 "boards"
@ 2020-05-05 16:51 ` Andre Przywara
0 siblings, 0 replies; 69+ messages in thread
From: Andre Przywara @ 2020-05-05 16:51 UTC (permalink / raw)
To: Rob Herring, Liviu Dudau, Sudeep Holla, Lorenzo Pieralisi
Cc: Mark Rutland, devicetree, linux-arm-kernel, Marc Zyngier
The .dts files in the arch/arm64/boot/dts/arm directory describe several
boards and platforms provided by Arm Ltd. (mostly Juno and fastmodels).
Both the .dts files and some of their associated .yaml bindings were not
fully compliant, for some boards a simple dtc run complains already.
And make dtbs_check would create quite a list of violations.
This series attempts to fix all of them, although some are not yet
covered, as they require some discussion about potential binding or
DT schema changes.
The first three patches fix some minor omissions in the yaml bindings.
The rest of the series then address the violations that dtbs_check
reported: many node name scheme mismatches, some missing properties or
wrong child node handling. See the respective patches for more details.
After applying this series I still see the following warnings:
- vexpress-v2f-1xv7-ca53x2: leds: linux,default-trigger names not
listed. The kernel provides triggers for each CPU core, which the DT
tries to use. However cpu<x> is not listed in the binding, and I fail
to add a regexp for a property *value* to express this easily.
Alternatively we could drop any constraint on this string at all,
since this might become a moving target and is not really a hardware
property, rather than a convenience Linux configuration option.
- juno: scp-sram: The compatible names for the SCPI child nodes are not
fully converted to yaml yet, so dtbs_check fails to find a matching
schema. Converting the SCPI bindings over is next on my list.
- fvp-base-revc: panel: 'power-supply' is a required property
Indeed the Linux driver depends on that property, not sure how this
ever worked. I am about to test this, the fix should a rather easy
addition of a fixed regulator.
Please have a look, I am open to discussions.
Cheers,
Andre
Andre Przywara (16):
dt-bindings: mali-midgard: Allow dma-coherent
dt-bindings: arm-smmu: Allow mmu-400,smmu-v1 compatible
dt-bindings: ehci/ohci: Allow iommus property
arm64: dts: arm: Fix node address fields
arm64: dts: arm: FVP: Fix motherboard .dtsi
arm64: dts: juno: Fix mem-timer
arm64: dts: arm: Fix GIC compatible names
arm64: dts: arm: Fix GIC child nodes
arm64: dts: arm: Fix ITS node names and #msi-cells
arm64: dts: juno: usb: Use proper DT node name
arm64: dts: arm: Fix serial node names
arm64: dts: fvp: Fix SMMU DT node
arm64: dts: arm: Fix bus node names
arm64: dts: juno: Fix GPU interrupt order
arm64: dts: arm: Fix VExpress LED names
arm64: dts: juno: Fix SCPI shared mem node name
.../bindings/gpu/arm,mali-midgard.yaml | 2 +
.../devicetree/bindings/iommu/arm,smmu.yaml | 4 +-
.../devicetree/bindings/usb/generic-ehci.yaml | 3 +
.../devicetree/bindings/usb/generic-ohci.yaml | 3 +
arch/arm/boot/dts/vexpress-v2m-rs1.dtsi | 38 ++---
.../boot/dts/arm/foundation-v8-gicv2.dtsi | 4 +-
.../boot/dts/arm/foundation-v8-gicv3.dtsi | 3 +-
arch/arm64/boot/dts/arm/foundation-v8.dtsi | 12 +-
arch/arm64/boot/dts/arm/fvp-base-revc.dts | 10 +-
arch/arm64/boot/dts/arm/juno-base.dtsi | 44 ++---
arch/arm64/boot/dts/arm/juno-motherboard.dtsi | 8 +-
arch/arm64/boot/dts/arm/rtsm_ve-aemv8a.dts | 2 +-
.../boot/dts/arm/rtsm_ve-motherboard-rs2.dtsi | 4 +-
.../boot/dts/arm/rtsm_ve-motherboard.dtsi | 152 +++++++++---------
14 files changed, 150 insertions(+), 139 deletions(-)
--
2.17.1
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 69+ messages in thread
* [PATCH 00/16] dts/dt-bindings: Fix Arm Ltd. ARMv8 "boards"
2020-05-05 16:51 ` Andre Przywara
(?)
@ 2020-05-05 16:51 ` Andre Przywara
-1 siblings, 0 replies; 69+ messages in thread
From: Andre Przywara @ 2020-05-05 16:51 UTC (permalink / raw)
To: Rob Herring, Liviu Dudau, Sudeep Holla, Lorenzo Pieralisi
Cc: devicetree, linux-arm-kernel, Mark Rutland, David Airlie,
Daniel Vetter, dri-devel
Date: Mon, 4 May 2020 12:41:55 +0100
Subject: [PATCH 01/16] dt-bindings: mali-midgard: Allow dma-coherent
Add the boolean dma-coherent property to the list of allowed properties,
since some boards (Arm Juno) integrate the GPU this way.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
---
Documentation/devicetree/bindings/gpu/arm,mali-midgard.yaml | 2 ++
1 file changed, 2 insertions(+)
diff --git a/Documentation/devicetree/bindings/gpu/arm,mali-midgard.yaml b/Documentation/devicetree/bindings/gpu/arm,mali-midgard.yaml
index 0407e45eb8c4..5d7165385e1f 100644
--- a/Documentation/devicetree/bindings/gpu/arm,mali-midgard.yaml
+++ b/Documentation/devicetree/bindings/gpu/arm,mali-midgard.yaml
@@ -87,6 +87,8 @@ properties:
"#cooling-cells":
const: 2
+ dma-coherent: true
+
required:
- compatible
- reg
--
2.17.1
^ permalink raw reply related [flat|nested] 69+ messages in thread* [PATCH 00/16] dts/dt-bindings: Fix Arm Ltd. ARMv8 "boards"
@ 2020-05-05 16:51 ` Andre Przywara
0 siblings, 0 replies; 69+ messages in thread
From: Andre Przywara @ 2020-05-05 16:51 UTC (permalink / raw)
To: Rob Herring, Liviu Dudau, Sudeep Holla, Lorenzo Pieralisi
Cc: Mark Rutland, devicetree, David Airlie, dri-devel, linux-arm-kernel
Date: Mon, 4 May 2020 12:41:55 +0100
Subject: [PATCH 01/16] dt-bindings: mali-midgard: Allow dma-coherent
Add the boolean dma-coherent property to the list of allowed properties,
since some boards (Arm Juno) integrate the GPU this way.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
---
Documentation/devicetree/bindings/gpu/arm,mali-midgard.yaml | 2 ++
1 file changed, 2 insertions(+)
diff --git a/Documentation/devicetree/bindings/gpu/arm,mali-midgard.yaml b/Documentation/devicetree/bindings/gpu/arm,mali-midgard.yaml
index 0407e45eb8c4..5d7165385e1f 100644
--- a/Documentation/devicetree/bindings/gpu/arm,mali-midgard.yaml
+++ b/Documentation/devicetree/bindings/gpu/arm,mali-midgard.yaml
@@ -87,6 +87,8 @@ properties:
"#cooling-cells":
const: 2
+ dma-coherent: true
+
required:
- compatible
- reg
--
2.17.1
_______________________________________________
dri-devel mailing list
dri-devel@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/dri-devel
^ permalink raw reply related [flat|nested] 69+ messages in thread* [PATCH 00/16] dts/dt-bindings: Fix Arm Ltd. ARMv8 "boards"
@ 2020-05-05 16:51 ` Andre Przywara
0 siblings, 0 replies; 69+ messages in thread
From: Andre Przywara @ 2020-05-05 16:51 UTC (permalink / raw)
To: Rob Herring, Liviu Dudau, Sudeep Holla, Lorenzo Pieralisi
Cc: Mark Rutland, devicetree, David Airlie, dri-devel, Daniel Vetter,
linux-arm-kernel
Date: Mon, 4 May 2020 12:41:55 +0100
Subject: [PATCH 01/16] dt-bindings: mali-midgard: Allow dma-coherent
Add the boolean dma-coherent property to the list of allowed properties,
since some boards (Arm Juno) integrate the GPU this way.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
---
Documentation/devicetree/bindings/gpu/arm,mali-midgard.yaml | 2 ++
1 file changed, 2 insertions(+)
diff --git a/Documentation/devicetree/bindings/gpu/arm,mali-midgard.yaml b/Documentation/devicetree/bindings/gpu/arm,mali-midgard.yaml
index 0407e45eb8c4..5d7165385e1f 100644
--- a/Documentation/devicetree/bindings/gpu/arm,mali-midgard.yaml
+++ b/Documentation/devicetree/bindings/gpu/arm,mali-midgard.yaml
@@ -87,6 +87,8 @@ properties:
"#cooling-cells":
const: 2
+ dma-coherent: true
+
required:
- compatible
- reg
--
2.17.1
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply related [flat|nested] 69+ messages in thread* Re: [PATCH 00/16] dts/dt-bindings: Fix Arm Ltd. ARMv8 "boards"
2020-05-05 16:51 ` Andre Przywara
(?)
@ 2020-05-05 18:10 ` Robin Murphy
-1 siblings, 0 replies; 69+ messages in thread
From: Robin Murphy @ 2020-05-05 18:10 UTC (permalink / raw)
To: Andre Przywara, Rob Herring, Liviu Dudau, Sudeep Holla,
Lorenzo Pieralisi
Cc: Mark Rutland, devicetree, David Airlie, dri-devel, Daniel Vetter,
linux-arm-kernel
On 2020-05-05 5:51 pm, Andre Przywara wrote:
> Date: Mon, 4 May 2020 12:41:55 +0100
> Subject: [PATCH 01/16] dt-bindings: mali-midgard: Allow dma-coherent
>
> Add the boolean dma-coherent property to the list of allowed properties,
> since some boards (Arm Juno) integrate the GPU this way.
The same comment as for "iommus" applies to some degree here too.
There's a bit more likelihood that the device itself does want to know
whether it's integrated coherently, so that it can choose what memory
attributes to use (as is the case here), but with protocols like
ACE-lite it's possible to hard-wire any old dumb device to behave
coherently without even realising. Thus this is another property that
could legitimately turn up more or less anywhere.
Robin.
> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
> ---
> Documentation/devicetree/bindings/gpu/arm,mali-midgard.yaml | 2 ++
> 1 file changed, 2 insertions(+)
>
> diff --git a/Documentation/devicetree/bindings/gpu/arm,mali-midgard.yaml b/Documentation/devicetree/bindings/gpu/arm,mali-midgard.yaml
> index 0407e45eb8c4..5d7165385e1f 100644
> --- a/Documentation/devicetree/bindings/gpu/arm,mali-midgard.yaml
> +++ b/Documentation/devicetree/bindings/gpu/arm,mali-midgard.yaml
> @@ -87,6 +87,8 @@ properties:
> "#cooling-cells":
> const: 2
>
> + dma-coherent: true
> +
> required:
> - compatible
> - reg
>
^ permalink raw reply [flat|nested] 69+ messages in thread
* Re: [PATCH 00/16] dts/dt-bindings: Fix Arm Ltd. ARMv8 "boards"
@ 2020-05-05 18:10 ` Robin Murphy
0 siblings, 0 replies; 69+ messages in thread
From: Robin Murphy @ 2020-05-05 18:10 UTC (permalink / raw)
To: Andre Przywara, Rob Herring, Liviu Dudau, Sudeep Holla,
Lorenzo Pieralisi
Cc: Mark Rutland, devicetree, David Airlie, dri-devel, linux-arm-kernel
On 2020-05-05 5:51 pm, Andre Przywara wrote:
> Date: Mon, 4 May 2020 12:41:55 +0100
> Subject: [PATCH 01/16] dt-bindings: mali-midgard: Allow dma-coherent
>
> Add the boolean dma-coherent property to the list of allowed properties,
> since some boards (Arm Juno) integrate the GPU this way.
The same comment as for "iommus" applies to some degree here too.
There's a bit more likelihood that the device itself does want to know
whether it's integrated coherently, so that it can choose what memory
attributes to use (as is the case here), but with protocols like
ACE-lite it's possible to hard-wire any old dumb device to behave
coherently without even realising. Thus this is another property that
could legitimately turn up more or less anywhere.
Robin.
> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
> ---
> Documentation/devicetree/bindings/gpu/arm,mali-midgard.yaml | 2 ++
> 1 file changed, 2 insertions(+)
>
> diff --git a/Documentation/devicetree/bindings/gpu/arm,mali-midgard.yaml b/Documentation/devicetree/bindings/gpu/arm,mali-midgard.yaml
> index 0407e45eb8c4..5d7165385e1f 100644
> --- a/Documentation/devicetree/bindings/gpu/arm,mali-midgard.yaml
> +++ b/Documentation/devicetree/bindings/gpu/arm,mali-midgard.yaml
> @@ -87,6 +87,8 @@ properties:
> "#cooling-cells":
> const: 2
>
> + dma-coherent: true
> +
> required:
> - compatible
> - reg
>
_______________________________________________
dri-devel mailing list
dri-devel@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/dri-devel
^ permalink raw reply [flat|nested] 69+ messages in thread
* Re: [PATCH 00/16] dts/dt-bindings: Fix Arm Ltd. ARMv8 "boards"
@ 2020-05-05 18:10 ` Robin Murphy
0 siblings, 0 replies; 69+ messages in thread
From: Robin Murphy @ 2020-05-05 18:10 UTC (permalink / raw)
To: Andre Przywara, Rob Herring, Liviu Dudau, Sudeep Holla,
Lorenzo Pieralisi
Cc: Mark Rutland, devicetree, David Airlie, dri-devel, Daniel Vetter,
linux-arm-kernel
On 2020-05-05 5:51 pm, Andre Przywara wrote:
> Date: Mon, 4 May 2020 12:41:55 +0100
> Subject: [PATCH 01/16] dt-bindings: mali-midgard: Allow dma-coherent
>
> Add the boolean dma-coherent property to the list of allowed properties,
> since some boards (Arm Juno) integrate the GPU this way.
The same comment as for "iommus" applies to some degree here too.
There's a bit more likelihood that the device itself does want to know
whether it's integrated coherently, so that it can choose what memory
attributes to use (as is the case here), but with protocols like
ACE-lite it's possible to hard-wire any old dumb device to behave
coherently without even realising. Thus this is another property that
could legitimately turn up more or less anywhere.
Robin.
> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
> ---
> Documentation/devicetree/bindings/gpu/arm,mali-midgard.yaml | 2 ++
> 1 file changed, 2 insertions(+)
>
> diff --git a/Documentation/devicetree/bindings/gpu/arm,mali-midgard.yaml b/Documentation/devicetree/bindings/gpu/arm,mali-midgard.yaml
> index 0407e45eb8c4..5d7165385e1f 100644
> --- a/Documentation/devicetree/bindings/gpu/arm,mali-midgard.yaml
> +++ b/Documentation/devicetree/bindings/gpu/arm,mali-midgard.yaml
> @@ -87,6 +87,8 @@ properties:
> "#cooling-cells":
> const: 2
>
> + dma-coherent: true
> +
> required:
> - compatible
> - reg
>
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 69+ messages in thread
* [PATCH 00/16] dts/dt-bindings: Fix Arm Ltd. ARMv8 "boards"
2020-05-05 16:51 ` Andre Przywara
(?)
@ 2020-05-05 16:51 ` Andre Przywara
-1 siblings, 0 replies; 69+ messages in thread
From: Andre Przywara @ 2020-05-05 16:51 UTC (permalink / raw)
To: Rob Herring, Liviu Dudau, Sudeep Holla, Lorenzo Pieralisi
Cc: devicetree, linux-arm-kernel, Mark Rutland, Will Deacon,
Robin Murphy, Joerg Roedel, iommu
Date: Mon, 4 May 2020 12:42:49 +0100
Subject: [PATCH 02/16] dt-bindings: arm-smmu: Allow mmu-400,smmu-v1 compatible
The Arm SMMUv1 DT binding only allows combining arm,mmu-401 with
arm,smmu-v1, even though the MMU-400 is compatible as well.
Allow this combination as well to let the Arm Juno board pass the test.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
---
Documentation/devicetree/bindings/iommu/arm,smmu.yaml | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/Documentation/devicetree/bindings/iommu/arm,smmu.yaml b/Documentation/devicetree/bindings/iommu/arm,smmu.yaml
index 6515dbe47508..e3ef1c69d132 100644
--- a/Documentation/devicetree/bindings/iommu/arm,smmu.yaml
+++ b/Documentation/devicetree/bindings/iommu/arm,smmu.yaml
@@ -41,7 +41,9 @@ properties:
- const: arm,mmu-500
- const: arm,smmu-v2
- items:
- - const: arm,mmu-401
+ - enum:
+ - arm,mmu-400
+ - arm,mmu-401
- const: arm,smmu-v1
- enum:
- arm,smmu-v1
--
2.17.1
^ permalink raw reply related [flat|nested] 69+ messages in thread* [PATCH 00/16] dts/dt-bindings: Fix Arm Ltd. ARMv8 "boards"
@ 2020-05-05 16:51 ` Andre Przywara
0 siblings, 0 replies; 69+ messages in thread
From: Andre Przywara @ 2020-05-05 16:51 UTC (permalink / raw)
To: Rob Herring, Liviu Dudau, Sudeep Holla, Lorenzo Pieralisi
Cc: Mark Rutland, devicetree, Robin Murphy, Joerg Roedel, iommu,
Will Deacon, linux-arm-kernel
Date: Mon, 4 May 2020 12:42:49 +0100
Subject: [PATCH 02/16] dt-bindings: arm-smmu: Allow mmu-400,smmu-v1 compatible
The Arm SMMUv1 DT binding only allows combining arm,mmu-401 with
arm,smmu-v1, even though the MMU-400 is compatible as well.
Allow this combination as well to let the Arm Juno board pass the test.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
---
Documentation/devicetree/bindings/iommu/arm,smmu.yaml | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/Documentation/devicetree/bindings/iommu/arm,smmu.yaml b/Documentation/devicetree/bindings/iommu/arm,smmu.yaml
index 6515dbe47508..e3ef1c69d132 100644
--- a/Documentation/devicetree/bindings/iommu/arm,smmu.yaml
+++ b/Documentation/devicetree/bindings/iommu/arm,smmu.yaml
@@ -41,7 +41,9 @@ properties:
- const: arm,mmu-500
- const: arm,smmu-v2
- items:
- - const: arm,mmu-401
+ - enum:
+ - arm,mmu-400
+ - arm,mmu-401
- const: arm,smmu-v1
- enum:
- arm,smmu-v1
--
2.17.1
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply related [flat|nested] 69+ messages in thread* [PATCH 00/16] dts/dt-bindings: Fix Arm Ltd. ARMv8 "boards"
@ 2020-05-05 16:51 ` Andre Przywara
0 siblings, 0 replies; 69+ messages in thread
From: Andre Przywara @ 2020-05-05 16:51 UTC (permalink / raw)
To: Rob Herring, Liviu Dudau, Sudeep Holla, Lorenzo Pieralisi
Cc: Mark Rutland, devicetree, Robin Murphy, iommu, Will Deacon,
linux-arm-kernel
Date: Mon, 4 May 2020 12:42:49 +0100
Subject: [PATCH 02/16] dt-bindings: arm-smmu: Allow mmu-400,smmu-v1 compatible
The Arm SMMUv1 DT binding only allows combining arm,mmu-401 with
arm,smmu-v1, even though the MMU-400 is compatible as well.
Allow this combination as well to let the Arm Juno board pass the test.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
---
Documentation/devicetree/bindings/iommu/arm,smmu.yaml | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/Documentation/devicetree/bindings/iommu/arm,smmu.yaml b/Documentation/devicetree/bindings/iommu/arm,smmu.yaml
index 6515dbe47508..e3ef1c69d132 100644
--- a/Documentation/devicetree/bindings/iommu/arm,smmu.yaml
+++ b/Documentation/devicetree/bindings/iommu/arm,smmu.yaml
@@ -41,7 +41,9 @@ properties:
- const: arm,mmu-500
- const: arm,smmu-v2
- items:
- - const: arm,mmu-401
+ - enum:
+ - arm,mmu-400
+ - arm,mmu-401
- const: arm,smmu-v1
- enum:
- arm,smmu-v1
--
2.17.1
_______________________________________________
iommu mailing list
iommu@lists.linux-foundation.org
https://lists.linuxfoundation.org/mailman/listinfo/iommu
^ permalink raw reply related [flat|nested] 69+ messages in thread* Re: [PATCH 00/16] dts/dt-bindings: Fix Arm Ltd. ARMv8 "boards"
2020-05-05 16:51 ` Andre Przywara
(?)
@ 2020-05-05 17:06 ` Robin Murphy
-1 siblings, 0 replies; 69+ messages in thread
From: Robin Murphy @ 2020-05-05 17:06 UTC (permalink / raw)
To: Andre Przywara, Rob Herring, Liviu Dudau, Sudeep Holla,
Lorenzo Pieralisi
Cc: devicetree, linux-arm-kernel, Mark Rutland, Will Deacon,
Joerg Roedel, iommu
On 2020-05-05 5:51 pm, Andre Przywara wrote:
> Date: Mon, 4 May 2020 12:42:49 +0100
> Subject: [PATCH 02/16] dt-bindings: arm-smmu: Allow mmu-400,smmu-v1 compatible
^^ not sure how you managed that...
> The Arm SMMUv1 DT binding only allows combining arm,mmu-401 with
> arm,smmu-v1, even though the MMU-400 is compatible as well.
>
> Allow this combination as well to let the Arm Juno board pass the test.
Acked-by: Robin Murphy <robin.murphy@arm.com>
> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
> ---
> Documentation/devicetree/bindings/iommu/arm,smmu.yaml | 4 +++-
> 1 file changed, 3 insertions(+), 1 deletion(-)
>
> diff --git a/Documentation/devicetree/bindings/iommu/arm,smmu.yaml b/Documentation/devicetree/bindings/iommu/arm,smmu.yaml
> index 6515dbe47508..e3ef1c69d132 100644
> --- a/Documentation/devicetree/bindings/iommu/arm,smmu.yaml
> +++ b/Documentation/devicetree/bindings/iommu/arm,smmu.yaml
> @@ -41,7 +41,9 @@ properties:
> - const: arm,mmu-500
> - const: arm,smmu-v2
> - items:
> - - const: arm,mmu-401
> + - enum:
> + - arm,mmu-400
> + - arm,mmu-401
> - const: arm,smmu-v1
> - enum:
> - arm,smmu-v1
>
^ permalink raw reply [flat|nested] 69+ messages in thread
* Re: [PATCH 00/16] dts/dt-bindings: Fix Arm Ltd. ARMv8 "boards"
@ 2020-05-05 17:06 ` Robin Murphy
0 siblings, 0 replies; 69+ messages in thread
From: Robin Murphy @ 2020-05-05 17:06 UTC (permalink / raw)
To: Andre Przywara, Rob Herring, Liviu Dudau, Sudeep Holla,
Lorenzo Pieralisi
Cc: Mark Rutland, devicetree, Joerg Roedel, iommu, Will Deacon,
linux-arm-kernel
On 2020-05-05 5:51 pm, Andre Przywara wrote:
> Date: Mon, 4 May 2020 12:42:49 +0100
> Subject: [PATCH 02/16] dt-bindings: arm-smmu: Allow mmu-400,smmu-v1 compatible
^^ not sure how you managed that...
> The Arm SMMUv1 DT binding only allows combining arm,mmu-401 with
> arm,smmu-v1, even though the MMU-400 is compatible as well.
>
> Allow this combination as well to let the Arm Juno board pass the test.
Acked-by: Robin Murphy <robin.murphy@arm.com>
> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
> ---
> Documentation/devicetree/bindings/iommu/arm,smmu.yaml | 4 +++-
> 1 file changed, 3 insertions(+), 1 deletion(-)
>
> diff --git a/Documentation/devicetree/bindings/iommu/arm,smmu.yaml b/Documentation/devicetree/bindings/iommu/arm,smmu.yaml
> index 6515dbe47508..e3ef1c69d132 100644
> --- a/Documentation/devicetree/bindings/iommu/arm,smmu.yaml
> +++ b/Documentation/devicetree/bindings/iommu/arm,smmu.yaml
> @@ -41,7 +41,9 @@ properties:
> - const: arm,mmu-500
> - const: arm,smmu-v2
> - items:
> - - const: arm,mmu-401
> + - enum:
> + - arm,mmu-400
> + - arm,mmu-401
> - const: arm,smmu-v1
> - enum:
> - arm,smmu-v1
>
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 69+ messages in thread
* Re: [PATCH 00/16] dts/dt-bindings: Fix Arm Ltd. ARMv8 "boards"
@ 2020-05-05 17:06 ` Robin Murphy
0 siblings, 0 replies; 69+ messages in thread
From: Robin Murphy @ 2020-05-05 17:06 UTC (permalink / raw)
To: Andre Przywara, Rob Herring, Liviu Dudau, Sudeep Holla,
Lorenzo Pieralisi
Cc: Mark Rutland, devicetree, iommu, Will Deacon, linux-arm-kernel
On 2020-05-05 5:51 pm, Andre Przywara wrote:
> Date: Mon, 4 May 2020 12:42:49 +0100
> Subject: [PATCH 02/16] dt-bindings: arm-smmu: Allow mmu-400,smmu-v1 compatible
^^ not sure how you managed that...
> The Arm SMMUv1 DT binding only allows combining arm,mmu-401 with
> arm,smmu-v1, even though the MMU-400 is compatible as well.
>
> Allow this combination as well to let the Arm Juno board pass the test.
Acked-by: Robin Murphy <robin.murphy@arm.com>
> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
> ---
> Documentation/devicetree/bindings/iommu/arm,smmu.yaml | 4 +++-
> 1 file changed, 3 insertions(+), 1 deletion(-)
>
> diff --git a/Documentation/devicetree/bindings/iommu/arm,smmu.yaml b/Documentation/devicetree/bindings/iommu/arm,smmu.yaml
> index 6515dbe47508..e3ef1c69d132 100644
> --- a/Documentation/devicetree/bindings/iommu/arm,smmu.yaml
> +++ b/Documentation/devicetree/bindings/iommu/arm,smmu.yaml
> @@ -41,7 +41,9 @@ properties:
> - const: arm,mmu-500
> - const: arm,smmu-v2
> - items:
> - - const: arm,mmu-401
> + - enum:
> + - arm,mmu-400
> + - arm,mmu-401
> - const: arm,smmu-v1
> - enum:
> - arm,smmu-v1
>
_______________________________________________
iommu mailing list
iommu@lists.linux-foundation.org
https://lists.linuxfoundation.org/mailman/listinfo/iommu
^ permalink raw reply [flat|nested] 69+ messages in thread
* Re: [PATCH 00/16] dts/dt-bindings: Fix Arm Ltd. ARMv8 "boards"
2020-05-05 17:06 ` Robin Murphy
(?)
@ 2020-05-05 17:13 ` André Przywara
-1 siblings, 0 replies; 69+ messages in thread
From: André Przywara @ 2020-05-05 17:13 UTC (permalink / raw)
To: Robin Murphy, Rob Herring, Liviu Dudau, Sudeep Holla, Lorenzo Pieralisi
Cc: devicetree, linux-arm-kernel, Mark Rutland, Will Deacon,
Joerg Roedel, iommu
On 05/05/2020 18:06, Robin Murphy wrote:
> On 2020-05-05 5:51 pm, Andre Przywara wrote:
>> Date: Mon, 4 May 2020 12:42:49 +0100
>> Subject: [PATCH 02/16] dt-bindings: arm-smmu: Allow mmu-400,smmu-v1
>> compatible
>
> ^^ not sure how you managed that...
Impressive, huh? ;-)
Actually just an accidental empty line when adding Cc: lines to the
header (copy & paste with EOL). Using the previous subject line is
probably an artefact of how git send-email works.
Sorry for that!
I figured that replying would create more churn, as the actual subject
line is still in the email.
>
>> The Arm SMMUv1 DT binding only allows combining arm,mmu-401 with
>> arm,smmu-v1, even though the MMU-400 is compatible as well.
>>
>> Allow this combination as well to let the Arm Juno board pass the test.
>
> Acked-by: Robin Murphy <robin.murphy@arm.com>
Thanks!
Cheers,
Andre
>
>> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
>> ---
>> Documentation/devicetree/bindings/iommu/arm,smmu.yaml | 4 +++-
>> 1 file changed, 3 insertions(+), 1 deletion(-)
>>
>> diff --git a/Documentation/devicetree/bindings/iommu/arm,smmu.yaml
>> b/Documentation/devicetree/bindings/iommu/arm,smmu.yaml
>> index 6515dbe47508..e3ef1c69d132 100644
>> --- a/Documentation/devicetree/bindings/iommu/arm,smmu.yaml
>> +++ b/Documentation/devicetree/bindings/iommu/arm,smmu.yaml
>> @@ -41,7 +41,9 @@ properties:
>> - const: arm,mmu-500
>> - const: arm,smmu-v2
>> - items:
>> - - const: arm,mmu-401
>> + - enum:
>> + - arm,mmu-400
>> + - arm,mmu-401
>> - const: arm,smmu-v1
>> - enum:
>> - arm,smmu-v1
>>
^ permalink raw reply [flat|nested] 69+ messages in thread
* Re: [PATCH 00/16] dts/dt-bindings: Fix Arm Ltd. ARMv8 "boards"
@ 2020-05-05 17:13 ` André Przywara
0 siblings, 0 replies; 69+ messages in thread
From: André Przywara @ 2020-05-05 17:13 UTC (permalink / raw)
To: Robin Murphy, Rob Herring, Liviu Dudau, Sudeep Holla, Lorenzo Pieralisi
Cc: Mark Rutland, devicetree, Joerg Roedel, iommu, Will Deacon,
linux-arm-kernel
On 05/05/2020 18:06, Robin Murphy wrote:
> On 2020-05-05 5:51 pm, Andre Przywara wrote:
>> Date: Mon, 4 May 2020 12:42:49 +0100
>> Subject: [PATCH 02/16] dt-bindings: arm-smmu: Allow mmu-400,smmu-v1
>> compatible
>
> ^^ not sure how you managed that...
Impressive, huh? ;-)
Actually just an accidental empty line when adding Cc: lines to the
header (copy & paste with EOL). Using the previous subject line is
probably an artefact of how git send-email works.
Sorry for that!
I figured that replying would create more churn, as the actual subject
line is still in the email.
>
>> The Arm SMMUv1 DT binding only allows combining arm,mmu-401 with
>> arm,smmu-v1, even though the MMU-400 is compatible as well.
>>
>> Allow this combination as well to let the Arm Juno board pass the test.
>
> Acked-by: Robin Murphy <robin.murphy@arm.com>
Thanks!
Cheers,
Andre
>
>> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
>> ---
>> Documentation/devicetree/bindings/iommu/arm,smmu.yaml | 4 +++-
>> 1 file changed, 3 insertions(+), 1 deletion(-)
>>
>> diff --git a/Documentation/devicetree/bindings/iommu/arm,smmu.yaml
>> b/Documentation/devicetree/bindings/iommu/arm,smmu.yaml
>> index 6515dbe47508..e3ef1c69d132 100644
>> --- a/Documentation/devicetree/bindings/iommu/arm,smmu.yaml
>> +++ b/Documentation/devicetree/bindings/iommu/arm,smmu.yaml
>> @@ -41,7 +41,9 @@ properties:
>> - const: arm,mmu-500
>> - const: arm,smmu-v2
>> - items:
>> - - const: arm,mmu-401
>> + - enum:
>> + - arm,mmu-400
>> + - arm,mmu-401
>> - const: arm,smmu-v1
>> - enum:
>> - arm,smmu-v1
>>
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 69+ messages in thread
* Re: [PATCH 00/16] dts/dt-bindings: Fix Arm Ltd. ARMv8 "boards"
@ 2020-05-05 17:13 ` André Przywara
0 siblings, 0 replies; 69+ messages in thread
From: André Przywara @ 2020-05-05 17:13 UTC (permalink / raw)
To: Robin Murphy, Rob Herring, Liviu Dudau, Sudeep Holla, Lorenzo Pieralisi
Cc: Mark Rutland, devicetree, iommu, Will Deacon, linux-arm-kernel
On 05/05/2020 18:06, Robin Murphy wrote:
> On 2020-05-05 5:51 pm, Andre Przywara wrote:
>> Date: Mon, 4 May 2020 12:42:49 +0100
>> Subject: [PATCH 02/16] dt-bindings: arm-smmu: Allow mmu-400,smmu-v1
>> compatible
>
> ^^ not sure how you managed that...
Impressive, huh? ;-)
Actually just an accidental empty line when adding Cc: lines to the
header (copy & paste with EOL). Using the previous subject line is
probably an artefact of how git send-email works.
Sorry for that!
I figured that replying would create more churn, as the actual subject
line is still in the email.
>
>> The Arm SMMUv1 DT binding only allows combining arm,mmu-401 with
>> arm,smmu-v1, even though the MMU-400 is compatible as well.
>>
>> Allow this combination as well to let the Arm Juno board pass the test.
>
> Acked-by: Robin Murphy <robin.murphy@arm.com>
Thanks!
Cheers,
Andre
>
>> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
>> ---
>> Documentation/devicetree/bindings/iommu/arm,smmu.yaml | 4 +++-
>> 1 file changed, 3 insertions(+), 1 deletion(-)
>>
>> diff --git a/Documentation/devicetree/bindings/iommu/arm,smmu.yaml
>> b/Documentation/devicetree/bindings/iommu/arm,smmu.yaml
>> index 6515dbe47508..e3ef1c69d132 100644
>> --- a/Documentation/devicetree/bindings/iommu/arm,smmu.yaml
>> +++ b/Documentation/devicetree/bindings/iommu/arm,smmu.yaml
>> @@ -41,7 +41,9 @@ properties:
>> - const: arm,mmu-500
>> - const: arm,smmu-v2
>> - items:
>> - - const: arm,mmu-401
>> + - enum:
>> + - arm,mmu-400
>> + - arm,mmu-401
>> - const: arm,smmu-v1
>> - enum:
>> - arm,smmu-v1
>>
_______________________________________________
iommu mailing list
iommu@lists.linux-foundation.org
https://lists.linuxfoundation.org/mailman/listinfo/iommu
^ permalink raw reply [flat|nested] 69+ messages in thread
* [PATCH 00/16] dts/dt-bindings: Fix Arm Ltd. ARMv8 "boards"
2020-05-05 16:51 ` Andre Przywara
@ 2020-05-05 16:51 ` Andre Przywara
-1 siblings, 0 replies; 69+ messages in thread
From: Andre Przywara @ 2020-05-05 16:51 UTC (permalink / raw)
To: Rob Herring, Liviu Dudau, Sudeep Holla, Lorenzo Pieralisi
Cc: devicetree, linux-arm-kernel, Mark Rutland, Greg Kroah-Hartman,
linux-usb
Date: Mon, 4 May 2020 12:43:18 +0100
Subject: [PATCH 03/16] dt-bindings: ehci/ohci: Allow iommus property
A OHCI/EHCI controller could be behind an IOMMU, in which case an iommus
property assigns the stream ID for this device.
Allow that property in the DT bindings to fix a complaint about the Arm Juno
board's DTS file.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
---
Documentation/devicetree/bindings/usb/generic-ehci.yaml | 3 +++
Documentation/devicetree/bindings/usb/generic-ohci.yaml | 3 +++
2 files changed, 6 insertions(+)
diff --git a/Documentation/devicetree/bindings/usb/generic-ehci.yaml b/Documentation/devicetree/bindings/usb/generic-ehci.yaml
index 10edd05872ea..20664c28bfb2 100644
--- a/Documentation/devicetree/bindings/usb/generic-ehci.yaml
+++ b/Documentation/devicetree/bindings/usb/generic-ehci.yaml
@@ -74,6 +74,9 @@ properties:
phy-names:
const: usb
+ iommus:
+ maxItems: 1
+
required:
- compatible
- reg
diff --git a/Documentation/devicetree/bindings/usb/generic-ohci.yaml b/Documentation/devicetree/bindings/usb/generic-ohci.yaml
index bcffec1f1341..ff6c04cde695 100644
--- a/Documentation/devicetree/bindings/usb/generic-ohci.yaml
+++ b/Documentation/devicetree/bindings/usb/generic-ohci.yaml
@@ -73,6 +73,9 @@ properties:
phy-names:
const: usb
+ iommus:
+ maxItems: 1
+
required:
- compatible
- reg
--
2.17.1
^ permalink raw reply related [flat|nested] 69+ messages in thread* [PATCH 00/16] dts/dt-bindings: Fix Arm Ltd. ARMv8 "boards"
@ 2020-05-05 16:51 ` Andre Przywara
0 siblings, 0 replies; 69+ messages in thread
From: Andre Przywara @ 2020-05-05 16:51 UTC (permalink / raw)
To: Rob Herring, Liviu Dudau, Sudeep Holla, Lorenzo Pieralisi
Cc: Mark Rutland, devicetree, linux-usb, linux-arm-kernel,
Greg Kroah-Hartman
Date: Mon, 4 May 2020 12:43:18 +0100
Subject: [PATCH 03/16] dt-bindings: ehci/ohci: Allow iommus property
A OHCI/EHCI controller could be behind an IOMMU, in which case an iommus
property assigns the stream ID for this device.
Allow that property in the DT bindings to fix a complaint about the Arm Juno
board's DTS file.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
---
Documentation/devicetree/bindings/usb/generic-ehci.yaml | 3 +++
Documentation/devicetree/bindings/usb/generic-ohci.yaml | 3 +++
2 files changed, 6 insertions(+)
diff --git a/Documentation/devicetree/bindings/usb/generic-ehci.yaml b/Documentation/devicetree/bindings/usb/generic-ehci.yaml
index 10edd05872ea..20664c28bfb2 100644
--- a/Documentation/devicetree/bindings/usb/generic-ehci.yaml
+++ b/Documentation/devicetree/bindings/usb/generic-ehci.yaml
@@ -74,6 +74,9 @@ properties:
phy-names:
const: usb
+ iommus:
+ maxItems: 1
+
required:
- compatible
- reg
diff --git a/Documentation/devicetree/bindings/usb/generic-ohci.yaml b/Documentation/devicetree/bindings/usb/generic-ohci.yaml
index bcffec1f1341..ff6c04cde695 100644
--- a/Documentation/devicetree/bindings/usb/generic-ohci.yaml
+++ b/Documentation/devicetree/bindings/usb/generic-ohci.yaml
@@ -73,6 +73,9 @@ properties:
phy-names:
const: usb
+ iommus:
+ maxItems: 1
+
required:
- compatible
- reg
--
2.17.1
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply related [flat|nested] 69+ messages in thread* Re: [PATCH 00/16] dts/dt-bindings: Fix Arm Ltd. ARMv8 "boards"
2020-05-05 16:51 ` Andre Przywara
@ 2020-05-05 17:38 ` Greg Kroah-Hartman
-1 siblings, 0 replies; 69+ messages in thread
From: Greg Kroah-Hartman @ 2020-05-05 17:38 UTC (permalink / raw)
To: Andre Przywara
Cc: Rob Herring, Liviu Dudau, Sudeep Holla, Lorenzo Pieralisi,
devicetree, linux-arm-kernel, Mark Rutland, linux-usb
On Tue, May 05, 2020 at 05:51:59PM +0100, Andre Przywara wrote:
> Date: Mon, 4 May 2020 12:43:18 +0100
> Subject: [PATCH 03/16] dt-bindings: ehci/ohci: Allow iommus property
Did you mean these lines to be in the patch body?
Something went wrong :(
greg k-h
^ permalink raw reply [flat|nested] 69+ messages in thread
* Re: [PATCH 00/16] dts/dt-bindings: Fix Arm Ltd. ARMv8 "boards"
@ 2020-05-05 17:38 ` Greg Kroah-Hartman
0 siblings, 0 replies; 69+ messages in thread
From: Greg Kroah-Hartman @ 2020-05-05 17:38 UTC (permalink / raw)
To: Andre Przywara
Cc: Mark Rutland, Rob Herring, Lorenzo Pieralisi, devicetree,
linux-usb, Liviu Dudau, Sudeep Holla, linux-arm-kernel
On Tue, May 05, 2020 at 05:51:59PM +0100, Andre Przywara wrote:
> Date: Mon, 4 May 2020 12:43:18 +0100
> Subject: [PATCH 03/16] dt-bindings: ehci/ohci: Allow iommus property
Did you mean these lines to be in the patch body?
Something went wrong :(
greg k-h
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 69+ messages in thread
* Re: [PATCH 00/16] dts/dt-bindings: Fix Arm Ltd. ARMv8 "boards"
2020-05-05 16:51 ` Andre Przywara
@ 2020-05-05 17:51 ` Robin Murphy
-1 siblings, 0 replies; 69+ messages in thread
From: Robin Murphy @ 2020-05-05 17:51 UTC (permalink / raw)
To: Andre Przywara, Rob Herring, Liviu Dudau, Sudeep Holla,
Lorenzo Pieralisi
Cc: Mark Rutland, devicetree, linux-usb, linux-arm-kernel,
Greg Kroah-Hartman
On 2020-05-05 5:51 pm, Andre Przywara wrote:
> Date: Mon, 4 May 2020 12:43:18 +0100
> Subject: [PATCH 03/16] dt-bindings: ehci/ohci: Allow iommus property
>
> A OHCI/EHCI controller could be behind an IOMMU, in which case an iommus
> property assigns the stream ID for this device.
Hmm, pretty much any DMA master device could be behind an IOMMU, and in
a way that's basically entirely irrelevant to the device itself (and
thus the consumer of its binding). Is there a better way we can handle
this than repeating such "semi-standard" properties in individual
bindings for ever more?
Robin.
> Allow that property in the DT bindings to fix a complaint about the Arm Juno
> board's DTS file.
>
> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
> ---
> Documentation/devicetree/bindings/usb/generic-ehci.yaml | 3 +++
> Documentation/devicetree/bindings/usb/generic-ohci.yaml | 3 +++
> 2 files changed, 6 insertions(+)
>
> diff --git a/Documentation/devicetree/bindings/usb/generic-ehci.yaml b/Documentation/devicetree/bindings/usb/generic-ehci.yaml
> index 10edd05872ea..20664c28bfb2 100644
> --- a/Documentation/devicetree/bindings/usb/generic-ehci.yaml
> +++ b/Documentation/devicetree/bindings/usb/generic-ehci.yaml
> @@ -74,6 +74,9 @@ properties:
> phy-names:
> const: usb
>
> + iommus:
> + maxItems: 1
> +
> required:
> - compatible
> - reg
> diff --git a/Documentation/devicetree/bindings/usb/generic-ohci.yaml b/Documentation/devicetree/bindings/usb/generic-ohci.yaml
> index bcffec1f1341..ff6c04cde695 100644
> --- a/Documentation/devicetree/bindings/usb/generic-ohci.yaml
> +++ b/Documentation/devicetree/bindings/usb/generic-ohci.yaml
> @@ -73,6 +73,9 @@ properties:
> phy-names:
> const: usb
>
> + iommus:
> + maxItems: 1
> +
> required:
> - compatible
> - reg
>
^ permalink raw reply [flat|nested] 69+ messages in thread
* Re: [PATCH 00/16] dts/dt-bindings: Fix Arm Ltd. ARMv8 "boards"
@ 2020-05-05 17:51 ` Robin Murphy
0 siblings, 0 replies; 69+ messages in thread
From: Robin Murphy @ 2020-05-05 17:51 UTC (permalink / raw)
To: Andre Przywara, Rob Herring, Liviu Dudau, Sudeep Holla,
Lorenzo Pieralisi
Cc: Mark Rutland, devicetree, linux-usb, linux-arm-kernel,
Greg Kroah-Hartman
On 2020-05-05 5:51 pm, Andre Przywara wrote:
> Date: Mon, 4 May 2020 12:43:18 +0100
> Subject: [PATCH 03/16] dt-bindings: ehci/ohci: Allow iommus property
>
> A OHCI/EHCI controller could be behind an IOMMU, in which case an iommus
> property assigns the stream ID for this device.
Hmm, pretty much any DMA master device could be behind an IOMMU, and in
a way that's basically entirely irrelevant to the device itself (and
thus the consumer of its binding). Is there a better way we can handle
this than repeating such "semi-standard" properties in individual
bindings for ever more?
Robin.
> Allow that property in the DT bindings to fix a complaint about the Arm Juno
> board's DTS file.
>
> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
> ---
> Documentation/devicetree/bindings/usb/generic-ehci.yaml | 3 +++
> Documentation/devicetree/bindings/usb/generic-ohci.yaml | 3 +++
> 2 files changed, 6 insertions(+)
>
> diff --git a/Documentation/devicetree/bindings/usb/generic-ehci.yaml b/Documentation/devicetree/bindings/usb/generic-ehci.yaml
> index 10edd05872ea..20664c28bfb2 100644
> --- a/Documentation/devicetree/bindings/usb/generic-ehci.yaml
> +++ b/Documentation/devicetree/bindings/usb/generic-ehci.yaml
> @@ -74,6 +74,9 @@ properties:
> phy-names:
> const: usb
>
> + iommus:
> + maxItems: 1
> +
> required:
> - compatible
> - reg
> diff --git a/Documentation/devicetree/bindings/usb/generic-ohci.yaml b/Documentation/devicetree/bindings/usb/generic-ohci.yaml
> index bcffec1f1341..ff6c04cde695 100644
> --- a/Documentation/devicetree/bindings/usb/generic-ohci.yaml
> +++ b/Documentation/devicetree/bindings/usb/generic-ohci.yaml
> @@ -73,6 +73,9 @@ properties:
> phy-names:
> const: usb
>
> + iommus:
> + maxItems: 1
> +
> required:
> - compatible
> - reg
>
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 69+ messages in thread
* Re: [PATCH 03/16] dt-bindings: ehci/ohci: Allow iommus property (fixed subject line)
2020-05-05 17:51 ` Robin Murphy
@ 2020-05-05 18:01 ` André Przywara
-1 siblings, 0 replies; 69+ messages in thread
From: André Przywara @ 2020-05-05 18:01 UTC (permalink / raw)
To: Robin Murphy, Rob Herring, Liviu Dudau, Sudeep Holla, Lorenzo Pieralisi
Cc: Mark Rutland, devicetree, linux-usb, linux-arm-kernel,
Greg Kroah-Hartman
On 05/05/2020 18:51, Robin Murphy wrote:
> On 2020-05-05 5:51 pm, Andre Przywara wrote:
>> Date: Mon, 4 May 2020 12:43:18 +0100
>> Subject: [PATCH 03/16] dt-bindings: ehci/ohci: Allow iommus property
>>
>> A OHCI/EHCI controller could be behind an IOMMU, in which case an iommus
>> property assigns the stream ID for this device.
>
> Hmm, pretty much any DMA master device could be behind an IOMMU, and in
> a way that's basically entirely irrelevant to the device itself (and
> thus the consumer of its binding). Is there a better way we can handle
> this than repeating such "semi-standard" properties in individual
> bindings for ever more?
I was asking exactly the same question to Rob.
Indeed this is more of a parent bus property, if at all, and individual
drivers are not even aware of this.
But what is a device property is the number of device IDs that the
device uses and that would need to be translated into stream IDs.
So I think this is merely saying: just a single device ID.
And no, we couldn't come up with some more generic solution (yet). I
think a similar problem comes up with power-domains and other properties
handled by code in drivers/of.
Cheers,
Andre
>
> Robin.
>
>> Allow that property in the DT bindings to fix a complaint about the
>> Arm Juno
>> board's DTS file.
>>
>> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
>> ---
>> Documentation/devicetree/bindings/usb/generic-ehci.yaml | 3 +++
>> Documentation/devicetree/bindings/usb/generic-ohci.yaml | 3 +++
>> 2 files changed, 6 insertions(+)
>>
>> diff --git a/Documentation/devicetree/bindings/usb/generic-ehci.yaml
>> b/Documentation/devicetree/bindings/usb/generic-ehci.yaml
>> index 10edd05872ea..20664c28bfb2 100644
>> --- a/Documentation/devicetree/bindings/usb/generic-ehci.yaml
>> +++ b/Documentation/devicetree/bindings/usb/generic-ehci.yaml
>> @@ -74,6 +74,9 @@ properties:
>> phy-names:
>> const: usb
>> + iommus:
>> + maxItems: 1
>> +
>> required:
>> - compatible
>> - reg
>> diff --git a/Documentation/devicetree/bindings/usb/generic-ohci.yaml
>> b/Documentation/devicetree/bindings/usb/generic-ohci.yaml
>> index bcffec1f1341..ff6c04cde695 100644
>> --- a/Documentation/devicetree/bindings/usb/generic-ohci.yaml
>> +++ b/Documentation/devicetree/bindings/usb/generic-ohci.yaml
>> @@ -73,6 +73,9 @@ properties:
>> phy-names:
>> const: usb
>> + iommus:
>> + maxItems: 1
>> +
>> required:
>> - compatible
>> - reg
>>
^ permalink raw reply [flat|nested] 69+ messages in thread
* Re: [PATCH 03/16] dt-bindings: ehci/ohci: Allow iommus property (fixed subject line)
@ 2020-05-05 18:01 ` André Przywara
0 siblings, 0 replies; 69+ messages in thread
From: André Przywara @ 2020-05-05 18:01 UTC (permalink / raw)
To: Robin Murphy, Rob Herring, Liviu Dudau, Sudeep Holla, Lorenzo Pieralisi
Cc: Mark Rutland, devicetree, linux-usb, linux-arm-kernel,
Greg Kroah-Hartman
On 05/05/2020 18:51, Robin Murphy wrote:
> On 2020-05-05 5:51 pm, Andre Przywara wrote:
>> Date: Mon, 4 May 2020 12:43:18 +0100
>> Subject: [PATCH 03/16] dt-bindings: ehci/ohci: Allow iommus property
>>
>> A OHCI/EHCI controller could be behind an IOMMU, in which case an iommus
>> property assigns the stream ID for this device.
>
> Hmm, pretty much any DMA master device could be behind an IOMMU, and in
> a way that's basically entirely irrelevant to the device itself (and
> thus the consumer of its binding). Is there a better way we can handle
> this than repeating such "semi-standard" properties in individual
> bindings for ever more?
I was asking exactly the same question to Rob.
Indeed this is more of a parent bus property, if at all, and individual
drivers are not even aware of this.
But what is a device property is the number of device IDs that the
device uses and that would need to be translated into stream IDs.
So I think this is merely saying: just a single device ID.
And no, we couldn't come up with some more generic solution (yet). I
think a similar problem comes up with power-domains and other properties
handled by code in drivers/of.
Cheers,
Andre
>
> Robin.
>
>> Allow that property in the DT bindings to fix a complaint about the
>> Arm Juno
>> board's DTS file.
>>
>> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
>> ---
>> Documentation/devicetree/bindings/usb/generic-ehci.yaml | 3 +++
>> Documentation/devicetree/bindings/usb/generic-ohci.yaml | 3 +++
>> 2 files changed, 6 insertions(+)
>>
>> diff --git a/Documentation/devicetree/bindings/usb/generic-ehci.yaml
>> b/Documentation/devicetree/bindings/usb/generic-ehci.yaml
>> index 10edd05872ea..20664c28bfb2 100644
>> --- a/Documentation/devicetree/bindings/usb/generic-ehci.yaml
>> +++ b/Documentation/devicetree/bindings/usb/generic-ehci.yaml
>> @@ -74,6 +74,9 @@ properties:
>> phy-names:
>> const: usb
>> + iommus:
>> + maxItems: 1
>> +
>> required:
>> - compatible
>> - reg
>> diff --git a/Documentation/devicetree/bindings/usb/generic-ohci.yaml
>> b/Documentation/devicetree/bindings/usb/generic-ohci.yaml
>> index bcffec1f1341..ff6c04cde695 100644
>> --- a/Documentation/devicetree/bindings/usb/generic-ohci.yaml
>> +++ b/Documentation/devicetree/bindings/usb/generic-ohci.yaml
>> @@ -73,6 +73,9 @@ properties:
>> phy-names:
>> const: usb
>> + iommus:
>> + maxItems: 1
>> +
>> required:
>> - compatible
>> - reg
>>
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 69+ messages in thread
* Re: [PATCH 00/16] dts/dt-bindings: Fix Arm Ltd. ARMv8 "boards"
2020-05-05 17:51 ` Robin Murphy
@ 2020-05-05 22:31 ` Rob Herring
-1 siblings, 0 replies; 69+ messages in thread
From: Rob Herring @ 2020-05-05 22:31 UTC (permalink / raw)
To: Robin Murphy
Cc: Andre Przywara, Liviu Dudau, Sudeep Holla, Lorenzo Pieralisi,
Mark Rutland, devicetree, Linux USB List,
moderated list:ARM/FREESCALE IMX / MXC ARM ARCHITECTURE,
Greg Kroah-Hartman
On Tue, May 5, 2020 at 12:52 PM Robin Murphy <robin.murphy@arm.com> wrote:
>
> On 2020-05-05 5:51 pm, Andre Przywara wrote:
> > Date: Mon, 4 May 2020 12:43:18 +0100
> > Subject: [PATCH 03/16] dt-bindings: ehci/ohci: Allow iommus property
> >
> > A OHCI/EHCI controller could be behind an IOMMU, in which case an iommus
> > property assigns the stream ID for this device.
>
> Hmm, pretty much any DMA master device could be behind an IOMMU, and in
> a way that's basically entirely irrelevant to the device itself (and
> thus the consumer of its binding). Is there a better way we can handle
> this than repeating such "semi-standard" properties in individual
> bindings for ever more?
We did that for pinctrl-* properties which I was somewhat lukewarm on.
I think a lot more nodes have pins than DMA, so I prefer to keep this
explicit. We do allow more than 1 iommus entry which might be device
specific, so somewhere we need to capture how many are allowed/valid.
We could define a 'dma-device.yaml' schema and reference that on all
DMA capable device. Not sure that saves much though.
Rob
^ permalink raw reply [flat|nested] 69+ messages in thread
* Re: [PATCH 00/16] dts/dt-bindings: Fix Arm Ltd. ARMv8 "boards"
@ 2020-05-05 22:31 ` Rob Herring
0 siblings, 0 replies; 69+ messages in thread
From: Rob Herring @ 2020-05-05 22:31 UTC (permalink / raw)
To: Robin Murphy
Cc: Mark Rutland, devicetree, Lorenzo Pieralisi, Greg Kroah-Hartman,
Andre Przywara, Linux USB List, Liviu Dudau, Sudeep Holla,
moderated list:ARM/FREESCALE IMX / MXC ARM ARCHITECTURE
On Tue, May 5, 2020 at 12:52 PM Robin Murphy <robin.murphy@arm.com> wrote:
>
> On 2020-05-05 5:51 pm, Andre Przywara wrote:
> > Date: Mon, 4 May 2020 12:43:18 +0100
> > Subject: [PATCH 03/16] dt-bindings: ehci/ohci: Allow iommus property
> >
> > A OHCI/EHCI controller could be behind an IOMMU, in which case an iommus
> > property assigns the stream ID for this device.
>
> Hmm, pretty much any DMA master device could be behind an IOMMU, and in
> a way that's basically entirely irrelevant to the device itself (and
> thus the consumer of its binding). Is there a better way we can handle
> this than repeating such "semi-standard" properties in individual
> bindings for ever more?
We did that for pinctrl-* properties which I was somewhat lukewarm on.
I think a lot more nodes have pins than DMA, so I prefer to keep this
explicit. We do allow more than 1 iommus entry which might be device
specific, so somewhere we need to capture how many are allowed/valid.
We could define a 'dma-device.yaml' schema and reference that on all
DMA capable device. Not sure that saves much though.
Rob
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 69+ messages in thread
* [PATCH 04/16] arm64: dts: arm: Fix node address fields
2020-05-05 16:51 ` Andre Przywara
@ 2020-05-05 16:52 ` Andre Przywara
-1 siblings, 0 replies; 69+ messages in thread
From: Andre Przywara @ 2020-05-05 16:52 UTC (permalink / raw)
To: Rob Herring, Liviu Dudau, Sudeep Holla, Lorenzo Pieralisi
Cc: devicetree, linux-arm-kernel, Mark Rutland
The Arm Ltd. boards were using an outdated address convention in the DT
node names, by separating the high from the low 32-bits of an address by
a comma.
Remove the comma from the node name suffix to be DT spec compliant.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
---
arch/arm/boot/dts/vexpress-v2m-rs1.dtsi | 10 +++++-----
arch/arm64/boot/dts/arm/foundation-v8.dtsi | 4 ++--
arch/arm64/boot/dts/arm/juno-motherboard.dtsi | 6 +++---
arch/arm64/boot/dts/arm/rtsm_ve-motherboard-rs2.dtsi | 2 +-
arch/arm64/boot/dts/arm/rtsm_ve-motherboard.dtsi | 6 +++---
5 files changed, 14 insertions(+), 14 deletions(-)
diff --git a/arch/arm/boot/dts/vexpress-v2m-rs1.dtsi b/arch/arm/boot/dts/vexpress-v2m-rs1.dtsi
index 5c183483ec3b..8010cdcdb37a 100644
--- a/arch/arm/boot/dts/vexpress-v2m-rs1.dtsi
+++ b/arch/arm/boot/dts/vexpress-v2m-rs1.dtsi
@@ -31,7 +31,7 @@
#interrupt-cells = <1>;
ranges;
- nor_flash: flash@0,00000000 {
+ nor_flash: flash@0 {
compatible = "arm,vexpress-flash", "cfi-flash";
reg = <0 0x00000000 0x04000000>,
<4 0x00000000 0x04000000>;
@@ -41,13 +41,13 @@
};
};
- psram@1,00000000 {
+ psram@100000000 {
compatible = "arm,vexpress-psram", "mtd-ram";
reg = <1 0x00000000 0x02000000>;
bank-width = <4>;
};
- ethernet@2,02000000 {
+ ethernet@202000000 {
compatible = "smsc,lan9118", "smsc,lan9115";
reg = <2 0x02000000 0x10000>;
interrupts = <15>;
@@ -59,14 +59,14 @@
vddvario-supply = <&v2m_fixed_3v3>;
};
- usb@2,03000000 {
+ usb@203000000 {
compatible = "nxp,usb-isp1761";
reg = <2 0x03000000 0x20000>;
interrupts = <16>;
port1-otg;
};
- iofpga@3,00000000 {
+ iofpga@300000000 {
compatible = "simple-bus";
#address-cells = <1>;
#size-cells = <1>;
diff --git a/arch/arm64/boot/dts/arm/foundation-v8.dtsi b/arch/arm64/boot/dts/arm/foundation-v8.dtsi
index 12f039fa3dad..e26b492795c5 100644
--- a/arch/arm64/boot/dts/arm/foundation-v8.dtsi
+++ b/arch/arm64/boot/dts/arm/foundation-v8.dtsi
@@ -151,7 +151,7 @@
<0 0 41 &gic 0 0 GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>,
<0 0 42 &gic 0 0 GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>;
- ethernet@2,02000000 {
+ ethernet@202000000 {
compatible = "smsc,lan91c111";
reg = <2 0x02000000 0x10000>;
interrupts = <15>;
@@ -178,7 +178,7 @@
clock-output-names = "v2m:refclk32khz";
};
- iofpga@3,00000000 {
+ iofpga@300000000 {
compatible = "simple-bus";
#address-cells = <1>;
#size-cells = <1>;
diff --git a/arch/arm64/boot/dts/arm/juno-motherboard.dtsi b/arch/arm64/boot/dts/arm/juno-motherboard.dtsi
index e3983ded3c3c..d5cefddde08c 100644
--- a/arch/arm64/boot/dts/arm/juno-motherboard.dtsi
+++ b/arch/arm64/boot/dts/arm/juno-motherboard.dtsi
@@ -103,7 +103,7 @@
};
};
- flash@0,00000000 {
+ flash@0 {
/* 2 * 32MiB NOR Flash memory mounted on CS0 */
compatible = "arm,vexpress-flash", "cfi-flash";
reg = <0 0x00000000 0x04000000>;
@@ -120,7 +120,7 @@
};
};
- ethernet@2,00000000 {
+ ethernet@200000000 {
compatible = "smsc,lan9118", "smsc,lan9115";
reg = <2 0x00000000 0x10000>;
interrupts = <3>;
@@ -133,7 +133,7 @@
vddvario-supply = <&mb_fixed_3v3>;
};
- iofpga@3,00000000 {
+ iofpga@300000000 {
compatible = "simple-bus";
#address-cells = <1>;
#size-cells = <1>;
diff --git a/arch/arm64/boot/dts/arm/rtsm_ve-motherboard-rs2.dtsi b/arch/arm64/boot/dts/arm/rtsm_ve-motherboard-rs2.dtsi
index 60703b5763c6..350cbf17e8b4 100644
--- a/arch/arm64/boot/dts/arm/rtsm_ve-motherboard-rs2.dtsi
+++ b/arch/arm64/boot/dts/arm/rtsm_ve-motherboard-rs2.dtsi
@@ -9,7 +9,7 @@
motherboard {
arm,v2m-memory-map = "rs2";
- iofpga@3,00000000 {
+ iofpga@300000000 {
virtio-p9@140000 {
compatible = "virtio,mmio";
reg = <0x140000 0x200>;
diff --git a/arch/arm64/boot/dts/arm/rtsm_ve-motherboard.dtsi b/arch/arm64/boot/dts/arm/rtsm_ve-motherboard.dtsi
index e333c8d2d0e4..d1bfa62ca073 100644
--- a/arch/arm64/boot/dts/arm/rtsm_ve-motherboard.dtsi
+++ b/arch/arm64/boot/dts/arm/rtsm_ve-motherboard.dtsi
@@ -17,14 +17,14 @@
#interrupt-cells = <1>;
ranges;
- flash@0,00000000 {
+ flash@0 {
compatible = "arm,vexpress-flash", "cfi-flash";
reg = <0 0x00000000 0x04000000>,
<4 0x00000000 0x04000000>;
bank-width = <4>;
};
- ethernet@2,02000000 {
+ ethernet@202000000 {
compatible = "smsc,lan91c111";
reg = <2 0x02000000 0x10000>;
interrupts = <15>;
@@ -51,7 +51,7 @@
clock-output-names = "v2m:refclk32khz";
};
- iofpga@3,00000000 {
+ iofpga@300000000 {
compatible = "simple-bus";
#address-cells = <1>;
#size-cells = <1>;
--
2.17.1
^ permalink raw reply related [flat|nested] 69+ messages in thread* [PATCH 04/16] arm64: dts: arm: Fix node address fields
@ 2020-05-05 16:52 ` Andre Przywara
0 siblings, 0 replies; 69+ messages in thread
From: Andre Przywara @ 2020-05-05 16:52 UTC (permalink / raw)
To: Rob Herring, Liviu Dudau, Sudeep Holla, Lorenzo Pieralisi
Cc: Mark Rutland, devicetree, linux-arm-kernel
The Arm Ltd. boards were using an outdated address convention in the DT
node names, by separating the high from the low 32-bits of an address by
a comma.
Remove the comma from the node name suffix to be DT spec compliant.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
---
arch/arm/boot/dts/vexpress-v2m-rs1.dtsi | 10 +++++-----
arch/arm64/boot/dts/arm/foundation-v8.dtsi | 4 ++--
arch/arm64/boot/dts/arm/juno-motherboard.dtsi | 6 +++---
arch/arm64/boot/dts/arm/rtsm_ve-motherboard-rs2.dtsi | 2 +-
arch/arm64/boot/dts/arm/rtsm_ve-motherboard.dtsi | 6 +++---
5 files changed, 14 insertions(+), 14 deletions(-)
diff --git a/arch/arm/boot/dts/vexpress-v2m-rs1.dtsi b/arch/arm/boot/dts/vexpress-v2m-rs1.dtsi
index 5c183483ec3b..8010cdcdb37a 100644
--- a/arch/arm/boot/dts/vexpress-v2m-rs1.dtsi
+++ b/arch/arm/boot/dts/vexpress-v2m-rs1.dtsi
@@ -31,7 +31,7 @@
#interrupt-cells = <1>;
ranges;
- nor_flash: flash@0,00000000 {
+ nor_flash: flash@0 {
compatible = "arm,vexpress-flash", "cfi-flash";
reg = <0 0x00000000 0x04000000>,
<4 0x00000000 0x04000000>;
@@ -41,13 +41,13 @@
};
};
- psram@1,00000000 {
+ psram@100000000 {
compatible = "arm,vexpress-psram", "mtd-ram";
reg = <1 0x00000000 0x02000000>;
bank-width = <4>;
};
- ethernet@2,02000000 {
+ ethernet@202000000 {
compatible = "smsc,lan9118", "smsc,lan9115";
reg = <2 0x02000000 0x10000>;
interrupts = <15>;
@@ -59,14 +59,14 @@
vddvario-supply = <&v2m_fixed_3v3>;
};
- usb@2,03000000 {
+ usb@203000000 {
compatible = "nxp,usb-isp1761";
reg = <2 0x03000000 0x20000>;
interrupts = <16>;
port1-otg;
};
- iofpga@3,00000000 {
+ iofpga@300000000 {
compatible = "simple-bus";
#address-cells = <1>;
#size-cells = <1>;
diff --git a/arch/arm64/boot/dts/arm/foundation-v8.dtsi b/arch/arm64/boot/dts/arm/foundation-v8.dtsi
index 12f039fa3dad..e26b492795c5 100644
--- a/arch/arm64/boot/dts/arm/foundation-v8.dtsi
+++ b/arch/arm64/boot/dts/arm/foundation-v8.dtsi
@@ -151,7 +151,7 @@
<0 0 41 &gic 0 0 GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>,
<0 0 42 &gic 0 0 GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>;
- ethernet@2,02000000 {
+ ethernet@202000000 {
compatible = "smsc,lan91c111";
reg = <2 0x02000000 0x10000>;
interrupts = <15>;
@@ -178,7 +178,7 @@
clock-output-names = "v2m:refclk32khz";
};
- iofpga@3,00000000 {
+ iofpga@300000000 {
compatible = "simple-bus";
#address-cells = <1>;
#size-cells = <1>;
diff --git a/arch/arm64/boot/dts/arm/juno-motherboard.dtsi b/arch/arm64/boot/dts/arm/juno-motherboard.dtsi
index e3983ded3c3c..d5cefddde08c 100644
--- a/arch/arm64/boot/dts/arm/juno-motherboard.dtsi
+++ b/arch/arm64/boot/dts/arm/juno-motherboard.dtsi
@@ -103,7 +103,7 @@
};
};
- flash@0,00000000 {
+ flash@0 {
/* 2 * 32MiB NOR Flash memory mounted on CS0 */
compatible = "arm,vexpress-flash", "cfi-flash";
reg = <0 0x00000000 0x04000000>;
@@ -120,7 +120,7 @@
};
};
- ethernet@2,00000000 {
+ ethernet@200000000 {
compatible = "smsc,lan9118", "smsc,lan9115";
reg = <2 0x00000000 0x10000>;
interrupts = <3>;
@@ -133,7 +133,7 @@
vddvario-supply = <&mb_fixed_3v3>;
};
- iofpga@3,00000000 {
+ iofpga@300000000 {
compatible = "simple-bus";
#address-cells = <1>;
#size-cells = <1>;
diff --git a/arch/arm64/boot/dts/arm/rtsm_ve-motherboard-rs2.dtsi b/arch/arm64/boot/dts/arm/rtsm_ve-motherboard-rs2.dtsi
index 60703b5763c6..350cbf17e8b4 100644
--- a/arch/arm64/boot/dts/arm/rtsm_ve-motherboard-rs2.dtsi
+++ b/arch/arm64/boot/dts/arm/rtsm_ve-motherboard-rs2.dtsi
@@ -9,7 +9,7 @@
motherboard {
arm,v2m-memory-map = "rs2";
- iofpga@3,00000000 {
+ iofpga@300000000 {
virtio-p9@140000 {
compatible = "virtio,mmio";
reg = <0x140000 0x200>;
diff --git a/arch/arm64/boot/dts/arm/rtsm_ve-motherboard.dtsi b/arch/arm64/boot/dts/arm/rtsm_ve-motherboard.dtsi
index e333c8d2d0e4..d1bfa62ca073 100644
--- a/arch/arm64/boot/dts/arm/rtsm_ve-motherboard.dtsi
+++ b/arch/arm64/boot/dts/arm/rtsm_ve-motherboard.dtsi
@@ -17,14 +17,14 @@
#interrupt-cells = <1>;
ranges;
- flash@0,00000000 {
+ flash@0 {
compatible = "arm,vexpress-flash", "cfi-flash";
reg = <0 0x00000000 0x04000000>,
<4 0x00000000 0x04000000>;
bank-width = <4>;
};
- ethernet@2,02000000 {
+ ethernet@202000000 {
compatible = "smsc,lan91c111";
reg = <2 0x02000000 0x10000>;
interrupts = <15>;
@@ -51,7 +51,7 @@
clock-output-names = "v2m:refclk32khz";
};
- iofpga@3,00000000 {
+ iofpga@300000000 {
compatible = "simple-bus";
#address-cells = <1>;
#size-cells = <1>;
--
2.17.1
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply related [flat|nested] 69+ messages in thread* Re: [PATCH 04/16] arm64: dts: arm: Fix node address fields
2020-05-05 16:52 ` Andre Przywara
@ 2020-05-05 17:18 ` Robin Murphy
-1 siblings, 0 replies; 69+ messages in thread
From: Robin Murphy @ 2020-05-05 17:18 UTC (permalink / raw)
To: Andre Przywara, Rob Herring, Liviu Dudau, Sudeep Holla,
Lorenzo Pieralisi
Cc: Mark Rutland, devicetree, linux-arm-kernel
On 2020-05-05 5:52 pm, Andre Przywara wrote:
> The Arm Ltd. boards were using an outdated address convention in the DT
> node names, by separating the high from the low 32-bits of an address by
> a comma.
I thought that historically that was deliberate, since the actual thing
being encoded is <chip select>,<address>, rather than just cosmetically
splitting a 64-bit address value?
Or maybe I'm thinking too far back and things have already changed in
the meantime :/
Robin.
> Remove the comma from the node name suffix to be DT spec compliant.
>
> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
> ---
> arch/arm/boot/dts/vexpress-v2m-rs1.dtsi | 10 +++++-----
> arch/arm64/boot/dts/arm/foundation-v8.dtsi | 4 ++--
> arch/arm64/boot/dts/arm/juno-motherboard.dtsi | 6 +++---
> arch/arm64/boot/dts/arm/rtsm_ve-motherboard-rs2.dtsi | 2 +-
> arch/arm64/boot/dts/arm/rtsm_ve-motherboard.dtsi | 6 +++---
> 5 files changed, 14 insertions(+), 14 deletions(-)
>
> diff --git a/arch/arm/boot/dts/vexpress-v2m-rs1.dtsi b/arch/arm/boot/dts/vexpress-v2m-rs1.dtsi
> index 5c183483ec3b..8010cdcdb37a 100644
> --- a/arch/arm/boot/dts/vexpress-v2m-rs1.dtsi
> +++ b/arch/arm/boot/dts/vexpress-v2m-rs1.dtsi
> @@ -31,7 +31,7 @@
> #interrupt-cells = <1>;
> ranges;
>
> - nor_flash: flash@0,00000000 {
> + nor_flash: flash@0 {
> compatible = "arm,vexpress-flash", "cfi-flash";
> reg = <0 0x00000000 0x04000000>,
> <4 0x00000000 0x04000000>;
> @@ -41,13 +41,13 @@
> };
> };
>
> - psram@1,00000000 {
> + psram@100000000 {
> compatible = "arm,vexpress-psram", "mtd-ram";
> reg = <1 0x00000000 0x02000000>;
> bank-width = <4>;
> };
>
> - ethernet@2,02000000 {
> + ethernet@202000000 {
> compatible = "smsc,lan9118", "smsc,lan9115";
> reg = <2 0x02000000 0x10000>;
> interrupts = <15>;
> @@ -59,14 +59,14 @@
> vddvario-supply = <&v2m_fixed_3v3>;
> };
>
> - usb@2,03000000 {
> + usb@203000000 {
> compatible = "nxp,usb-isp1761";
> reg = <2 0x03000000 0x20000>;
> interrupts = <16>;
> port1-otg;
> };
>
> - iofpga@3,00000000 {
> + iofpga@300000000 {
> compatible = "simple-bus";
> #address-cells = <1>;
> #size-cells = <1>;
> diff --git a/arch/arm64/boot/dts/arm/foundation-v8.dtsi b/arch/arm64/boot/dts/arm/foundation-v8.dtsi
> index 12f039fa3dad..e26b492795c5 100644
> --- a/arch/arm64/boot/dts/arm/foundation-v8.dtsi
> +++ b/arch/arm64/boot/dts/arm/foundation-v8.dtsi
> @@ -151,7 +151,7 @@
> <0 0 41 &gic 0 0 GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>,
> <0 0 42 &gic 0 0 GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>;
>
> - ethernet@2,02000000 {
> + ethernet@202000000 {
> compatible = "smsc,lan91c111";
> reg = <2 0x02000000 0x10000>;
> interrupts = <15>;
> @@ -178,7 +178,7 @@
> clock-output-names = "v2m:refclk32khz";
> };
>
> - iofpga@3,00000000 {
> + iofpga@300000000 {
> compatible = "simple-bus";
> #address-cells = <1>;
> #size-cells = <1>;
> diff --git a/arch/arm64/boot/dts/arm/juno-motherboard.dtsi b/arch/arm64/boot/dts/arm/juno-motherboard.dtsi
> index e3983ded3c3c..d5cefddde08c 100644
> --- a/arch/arm64/boot/dts/arm/juno-motherboard.dtsi
> +++ b/arch/arm64/boot/dts/arm/juno-motherboard.dtsi
> @@ -103,7 +103,7 @@
> };
> };
>
> - flash@0,00000000 {
> + flash@0 {
> /* 2 * 32MiB NOR Flash memory mounted on CS0 */
> compatible = "arm,vexpress-flash", "cfi-flash";
> reg = <0 0x00000000 0x04000000>;
> @@ -120,7 +120,7 @@
> };
> };
>
> - ethernet@2,00000000 {
> + ethernet@200000000 {
> compatible = "smsc,lan9118", "smsc,lan9115";
> reg = <2 0x00000000 0x10000>;
> interrupts = <3>;
> @@ -133,7 +133,7 @@
> vddvario-supply = <&mb_fixed_3v3>;
> };
>
> - iofpga@3,00000000 {
> + iofpga@300000000 {
> compatible = "simple-bus";
> #address-cells = <1>;
> #size-cells = <1>;
> diff --git a/arch/arm64/boot/dts/arm/rtsm_ve-motherboard-rs2.dtsi b/arch/arm64/boot/dts/arm/rtsm_ve-motherboard-rs2.dtsi
> index 60703b5763c6..350cbf17e8b4 100644
> --- a/arch/arm64/boot/dts/arm/rtsm_ve-motherboard-rs2.dtsi
> +++ b/arch/arm64/boot/dts/arm/rtsm_ve-motherboard-rs2.dtsi
> @@ -9,7 +9,7 @@
> motherboard {
> arm,v2m-memory-map = "rs2";
>
> - iofpga@3,00000000 {
> + iofpga@300000000 {
> virtio-p9@140000 {
> compatible = "virtio,mmio";
> reg = <0x140000 0x200>;
> diff --git a/arch/arm64/boot/dts/arm/rtsm_ve-motherboard.dtsi b/arch/arm64/boot/dts/arm/rtsm_ve-motherboard.dtsi
> index e333c8d2d0e4..d1bfa62ca073 100644
> --- a/arch/arm64/boot/dts/arm/rtsm_ve-motherboard.dtsi
> +++ b/arch/arm64/boot/dts/arm/rtsm_ve-motherboard.dtsi
> @@ -17,14 +17,14 @@
> #interrupt-cells = <1>;
> ranges;
>
> - flash@0,00000000 {
> + flash@0 {
> compatible = "arm,vexpress-flash", "cfi-flash";
> reg = <0 0x00000000 0x04000000>,
> <4 0x00000000 0x04000000>;
> bank-width = <4>;
> };
>
> - ethernet@2,02000000 {
> + ethernet@202000000 {
> compatible = "smsc,lan91c111";
> reg = <2 0x02000000 0x10000>;
> interrupts = <15>;
> @@ -51,7 +51,7 @@
> clock-output-names = "v2m:refclk32khz";
> };
>
> - iofpga@3,00000000 {
> + iofpga@300000000 {
> compatible = "simple-bus";
> #address-cells = <1>;
> #size-cells = <1>;
>
^ permalink raw reply [flat|nested] 69+ messages in thread* Re: [PATCH 04/16] arm64: dts: arm: Fix node address fields
@ 2020-05-05 17:18 ` Robin Murphy
0 siblings, 0 replies; 69+ messages in thread
From: Robin Murphy @ 2020-05-05 17:18 UTC (permalink / raw)
To: Andre Przywara, Rob Herring, Liviu Dudau, Sudeep Holla,
Lorenzo Pieralisi
Cc: Mark Rutland, devicetree, linux-arm-kernel
On 2020-05-05 5:52 pm, Andre Przywara wrote:
> The Arm Ltd. boards were using an outdated address convention in the DT
> node names, by separating the high from the low 32-bits of an address by
> a comma.
I thought that historically that was deliberate, since the actual thing
being encoded is <chip select>,<address>, rather than just cosmetically
splitting a 64-bit address value?
Or maybe I'm thinking too far back and things have already changed in
the meantime :/
Robin.
> Remove the comma from the node name suffix to be DT spec compliant.
>
> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
> ---
> arch/arm/boot/dts/vexpress-v2m-rs1.dtsi | 10 +++++-----
> arch/arm64/boot/dts/arm/foundation-v8.dtsi | 4 ++--
> arch/arm64/boot/dts/arm/juno-motherboard.dtsi | 6 +++---
> arch/arm64/boot/dts/arm/rtsm_ve-motherboard-rs2.dtsi | 2 +-
> arch/arm64/boot/dts/arm/rtsm_ve-motherboard.dtsi | 6 +++---
> 5 files changed, 14 insertions(+), 14 deletions(-)
>
> diff --git a/arch/arm/boot/dts/vexpress-v2m-rs1.dtsi b/arch/arm/boot/dts/vexpress-v2m-rs1.dtsi
> index 5c183483ec3b..8010cdcdb37a 100644
> --- a/arch/arm/boot/dts/vexpress-v2m-rs1.dtsi
> +++ b/arch/arm/boot/dts/vexpress-v2m-rs1.dtsi
> @@ -31,7 +31,7 @@
> #interrupt-cells = <1>;
> ranges;
>
> - nor_flash: flash@0,00000000 {
> + nor_flash: flash@0 {
> compatible = "arm,vexpress-flash", "cfi-flash";
> reg = <0 0x00000000 0x04000000>,
> <4 0x00000000 0x04000000>;
> @@ -41,13 +41,13 @@
> };
> };
>
> - psram@1,00000000 {
> + psram@100000000 {
> compatible = "arm,vexpress-psram", "mtd-ram";
> reg = <1 0x00000000 0x02000000>;
> bank-width = <4>;
> };
>
> - ethernet@2,02000000 {
> + ethernet@202000000 {
> compatible = "smsc,lan9118", "smsc,lan9115";
> reg = <2 0x02000000 0x10000>;
> interrupts = <15>;
> @@ -59,14 +59,14 @@
> vddvario-supply = <&v2m_fixed_3v3>;
> };
>
> - usb@2,03000000 {
> + usb@203000000 {
> compatible = "nxp,usb-isp1761";
> reg = <2 0x03000000 0x20000>;
> interrupts = <16>;
> port1-otg;
> };
>
> - iofpga@3,00000000 {
> + iofpga@300000000 {
> compatible = "simple-bus";
> #address-cells = <1>;
> #size-cells = <1>;
> diff --git a/arch/arm64/boot/dts/arm/foundation-v8.dtsi b/arch/arm64/boot/dts/arm/foundation-v8.dtsi
> index 12f039fa3dad..e26b492795c5 100644
> --- a/arch/arm64/boot/dts/arm/foundation-v8.dtsi
> +++ b/arch/arm64/boot/dts/arm/foundation-v8.dtsi
> @@ -151,7 +151,7 @@
> <0 0 41 &gic 0 0 GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>,
> <0 0 42 &gic 0 0 GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>;
>
> - ethernet@2,02000000 {
> + ethernet@202000000 {
> compatible = "smsc,lan91c111";
> reg = <2 0x02000000 0x10000>;
> interrupts = <15>;
> @@ -178,7 +178,7 @@
> clock-output-names = "v2m:refclk32khz";
> };
>
> - iofpga@3,00000000 {
> + iofpga@300000000 {
> compatible = "simple-bus";
> #address-cells = <1>;
> #size-cells = <1>;
> diff --git a/arch/arm64/boot/dts/arm/juno-motherboard.dtsi b/arch/arm64/boot/dts/arm/juno-motherboard.dtsi
> index e3983ded3c3c..d5cefddde08c 100644
> --- a/arch/arm64/boot/dts/arm/juno-motherboard.dtsi
> +++ b/arch/arm64/boot/dts/arm/juno-motherboard.dtsi
> @@ -103,7 +103,7 @@
> };
> };
>
> - flash@0,00000000 {
> + flash@0 {
> /* 2 * 32MiB NOR Flash memory mounted on CS0 */
> compatible = "arm,vexpress-flash", "cfi-flash";
> reg = <0 0x00000000 0x04000000>;
> @@ -120,7 +120,7 @@
> };
> };
>
> - ethernet@2,00000000 {
> + ethernet@200000000 {
> compatible = "smsc,lan9118", "smsc,lan9115";
> reg = <2 0x00000000 0x10000>;
> interrupts = <3>;
> @@ -133,7 +133,7 @@
> vddvario-supply = <&mb_fixed_3v3>;
> };
>
> - iofpga@3,00000000 {
> + iofpga@300000000 {
> compatible = "simple-bus";
> #address-cells = <1>;
> #size-cells = <1>;
> diff --git a/arch/arm64/boot/dts/arm/rtsm_ve-motherboard-rs2.dtsi b/arch/arm64/boot/dts/arm/rtsm_ve-motherboard-rs2.dtsi
> index 60703b5763c6..350cbf17e8b4 100644
> --- a/arch/arm64/boot/dts/arm/rtsm_ve-motherboard-rs2.dtsi
> +++ b/arch/arm64/boot/dts/arm/rtsm_ve-motherboard-rs2.dtsi
> @@ -9,7 +9,7 @@
> motherboard {
> arm,v2m-memory-map = "rs2";
>
> - iofpga@3,00000000 {
> + iofpga@300000000 {
> virtio-p9@140000 {
> compatible = "virtio,mmio";
> reg = <0x140000 0x200>;
> diff --git a/arch/arm64/boot/dts/arm/rtsm_ve-motherboard.dtsi b/arch/arm64/boot/dts/arm/rtsm_ve-motherboard.dtsi
> index e333c8d2d0e4..d1bfa62ca073 100644
> --- a/arch/arm64/boot/dts/arm/rtsm_ve-motherboard.dtsi
> +++ b/arch/arm64/boot/dts/arm/rtsm_ve-motherboard.dtsi
> @@ -17,14 +17,14 @@
> #interrupt-cells = <1>;
> ranges;
>
> - flash@0,00000000 {
> + flash@0 {
> compatible = "arm,vexpress-flash", "cfi-flash";
> reg = <0 0x00000000 0x04000000>,
> <4 0x00000000 0x04000000>;
> bank-width = <4>;
> };
>
> - ethernet@2,02000000 {
> + ethernet@202000000 {
> compatible = "smsc,lan91c111";
> reg = <2 0x02000000 0x10000>;
> interrupts = <15>;
> @@ -51,7 +51,7 @@
> clock-output-names = "v2m:refclk32khz";
> };
>
> - iofpga@3,00000000 {
> + iofpga@300000000 {
> compatible = "simple-bus";
> #address-cells = <1>;
> #size-cells = <1>;
>
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 69+ messages in thread* Re: [PATCH 04/16] arm64: dts: arm: Fix node address fields
2020-05-05 17:18 ` Robin Murphy
@ 2020-05-21 14:40 ` Liviu Dudau
-1 siblings, 0 replies; 69+ messages in thread
From: Liviu Dudau @ 2020-05-21 14:40 UTC (permalink / raw)
To: Robin Murphy
Cc: Andre Przywara, Rob Herring, Sudeep Holla, Lorenzo Pieralisi,
Mark Rutland, devicetree, linux-arm-kernel
On Tue, May 05, 2020 at 06:18:19PM +0100, Robin Murphy wrote:
> On 2020-05-05 5:52 pm, Andre Przywara wrote:
> > The Arm Ltd. boards were using an outdated address convention in the DT
> > node names, by separating the high from the low 32-bits of an address by
> > a comma.
>
> I thought that historically that was deliberate, since the actual thing
> being encoded is <chip select>,<address>, rather than just cosmetically
> splitting a 64-bit address value?
>
> Or maybe I'm thinking too far back and things have already changed in the
> meantime :/
Robin is right, if you look in the "ARM Motherboard Express µATX Technical
Reference Manual", in the RS1 memory map (aka "Cortex-A Series memory map")
the Ethernet for example is at CS2 offset 0x02000000. CS2 area is between
0x18000000 and 0x1c000000. So actual physical address for LAN9118 is
0x1a000000.
You might want to drop this patch or convert to physical addresses.
Best regards,
Liviu
>
> Robin.
>
> > Remove the comma from the node name suffix to be DT spec compliant.
> >
> > Signed-off-by: Andre Przywara <andre.przywara@arm.com>
> > ---
> > arch/arm/boot/dts/vexpress-v2m-rs1.dtsi | 10 +++++-----
> > arch/arm64/boot/dts/arm/foundation-v8.dtsi | 4 ++--
> > arch/arm64/boot/dts/arm/juno-motherboard.dtsi | 6 +++---
> > arch/arm64/boot/dts/arm/rtsm_ve-motherboard-rs2.dtsi | 2 +-
> > arch/arm64/boot/dts/arm/rtsm_ve-motherboard.dtsi | 6 +++---
> > 5 files changed, 14 insertions(+), 14 deletions(-)
> >
> > diff --git a/arch/arm/boot/dts/vexpress-v2m-rs1.dtsi b/arch/arm/boot/dts/vexpress-v2m-rs1.dtsi
> > index 5c183483ec3b..8010cdcdb37a 100644
> > --- a/arch/arm/boot/dts/vexpress-v2m-rs1.dtsi
> > +++ b/arch/arm/boot/dts/vexpress-v2m-rs1.dtsi
> > @@ -31,7 +31,7 @@
> > #interrupt-cells = <1>;
> > ranges;
> > - nor_flash: flash@0,00000000 {
> > + nor_flash: flash@0 {
> > compatible = "arm,vexpress-flash", "cfi-flash";
> > reg = <0 0x00000000 0x04000000>,
> > <4 0x00000000 0x04000000>;
> > @@ -41,13 +41,13 @@
> > };
> > };
> > - psram@1,00000000 {
> > + psram@100000000 {
> > compatible = "arm,vexpress-psram", "mtd-ram";
> > reg = <1 0x00000000 0x02000000>;
> > bank-width = <4>;
> > };
> > - ethernet@2,02000000 {
> > + ethernet@202000000 {
> > compatible = "smsc,lan9118", "smsc,lan9115";
> > reg = <2 0x02000000 0x10000>;
> > interrupts = <15>;
> > @@ -59,14 +59,14 @@
> > vddvario-supply = <&v2m_fixed_3v3>;
> > };
> > - usb@2,03000000 {
> > + usb@203000000 {
> > compatible = "nxp,usb-isp1761";
> > reg = <2 0x03000000 0x20000>;
> > interrupts = <16>;
> > port1-otg;
> > };
> > - iofpga@3,00000000 {
> > + iofpga@300000000 {
> > compatible = "simple-bus";
> > #address-cells = <1>;
> > #size-cells = <1>;
> > diff --git a/arch/arm64/boot/dts/arm/foundation-v8.dtsi b/arch/arm64/boot/dts/arm/foundation-v8.dtsi
> > index 12f039fa3dad..e26b492795c5 100644
> > --- a/arch/arm64/boot/dts/arm/foundation-v8.dtsi
> > +++ b/arch/arm64/boot/dts/arm/foundation-v8.dtsi
> > @@ -151,7 +151,7 @@
> > <0 0 41 &gic 0 0 GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>,
> > <0 0 42 &gic 0 0 GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>;
> > - ethernet@2,02000000 {
> > + ethernet@202000000 {
> > compatible = "smsc,lan91c111";
> > reg = <2 0x02000000 0x10000>;
> > interrupts = <15>;
> > @@ -178,7 +178,7 @@
> > clock-output-names = "v2m:refclk32khz";
> > };
> > - iofpga@3,00000000 {
> > + iofpga@300000000 {
> > compatible = "simple-bus";
> > #address-cells = <1>;
> > #size-cells = <1>;
> > diff --git a/arch/arm64/boot/dts/arm/juno-motherboard.dtsi b/arch/arm64/boot/dts/arm/juno-motherboard.dtsi
> > index e3983ded3c3c..d5cefddde08c 100644
> > --- a/arch/arm64/boot/dts/arm/juno-motherboard.dtsi
> > +++ b/arch/arm64/boot/dts/arm/juno-motherboard.dtsi
> > @@ -103,7 +103,7 @@
> > };
> > };
> > - flash@0,00000000 {
> > + flash@0 {
> > /* 2 * 32MiB NOR Flash memory mounted on CS0 */
> > compatible = "arm,vexpress-flash", "cfi-flash";
> > reg = <0 0x00000000 0x04000000>;
> > @@ -120,7 +120,7 @@
> > };
> > };
> > - ethernet@2,00000000 {
> > + ethernet@200000000 {
> > compatible = "smsc,lan9118", "smsc,lan9115";
> > reg = <2 0x00000000 0x10000>;
> > interrupts = <3>;
> > @@ -133,7 +133,7 @@
> > vddvario-supply = <&mb_fixed_3v3>;
> > };
> > - iofpga@3,00000000 {
> > + iofpga@300000000 {
> > compatible = "simple-bus";
> > #address-cells = <1>;
> > #size-cells = <1>;
> > diff --git a/arch/arm64/boot/dts/arm/rtsm_ve-motherboard-rs2.dtsi b/arch/arm64/boot/dts/arm/rtsm_ve-motherboard-rs2.dtsi
> > index 60703b5763c6..350cbf17e8b4 100644
> > --- a/arch/arm64/boot/dts/arm/rtsm_ve-motherboard-rs2.dtsi
> > +++ b/arch/arm64/boot/dts/arm/rtsm_ve-motherboard-rs2.dtsi
> > @@ -9,7 +9,7 @@
> > motherboard {
> > arm,v2m-memory-map = "rs2";
> > - iofpga@3,00000000 {
> > + iofpga@300000000 {
> > virtio-p9@140000 {
> > compatible = "virtio,mmio";
> > reg = <0x140000 0x200>;
> > diff --git a/arch/arm64/boot/dts/arm/rtsm_ve-motherboard.dtsi b/arch/arm64/boot/dts/arm/rtsm_ve-motherboard.dtsi
> > index e333c8d2d0e4..d1bfa62ca073 100644
> > --- a/arch/arm64/boot/dts/arm/rtsm_ve-motherboard.dtsi
> > +++ b/arch/arm64/boot/dts/arm/rtsm_ve-motherboard.dtsi
> > @@ -17,14 +17,14 @@
> > #interrupt-cells = <1>;
> > ranges;
> > - flash@0,00000000 {
> > + flash@0 {
> > compatible = "arm,vexpress-flash", "cfi-flash";
> > reg = <0 0x00000000 0x04000000>,
> > <4 0x00000000 0x04000000>;
> > bank-width = <4>;
> > };
> > - ethernet@2,02000000 {
> > + ethernet@202000000 {
> > compatible = "smsc,lan91c111";
> > reg = <2 0x02000000 0x10000>;
> > interrupts = <15>;
> > @@ -51,7 +51,7 @@
> > clock-output-names = "v2m:refclk32khz";
> > };
> > - iofpga@3,00000000 {
> > + iofpga@300000000 {
> > compatible = "simple-bus";
> > #address-cells = <1>;
> > #size-cells = <1>;
> >
--
====================
| I would like to |
| fix the world, |
| but they're not |
| giving me the |
\ source code! /
---------------
¯\_(ツ)_/¯
^ permalink raw reply [flat|nested] 69+ messages in thread* Re: [PATCH 04/16] arm64: dts: arm: Fix node address fields
@ 2020-05-21 14:40 ` Liviu Dudau
0 siblings, 0 replies; 69+ messages in thread
From: Liviu Dudau @ 2020-05-21 14:40 UTC (permalink / raw)
To: Robin Murphy
Cc: Mark Rutland, devicetree, Lorenzo Pieralisi, Rob Herring,
Andre Przywara, Sudeep Holla, linux-arm-kernel
On Tue, May 05, 2020 at 06:18:19PM +0100, Robin Murphy wrote:
> On 2020-05-05 5:52 pm, Andre Przywara wrote:
> > The Arm Ltd. boards were using an outdated address convention in the DT
> > node names, by separating the high from the low 32-bits of an address by
> > a comma.
>
> I thought that historically that was deliberate, since the actual thing
> being encoded is <chip select>,<address>, rather than just cosmetically
> splitting a 64-bit address value?
>
> Or maybe I'm thinking too far back and things have already changed in the
> meantime :/
Robin is right, if you look in the "ARM Motherboard Express µATX Technical
Reference Manual", in the RS1 memory map (aka "Cortex-A Series memory map")
the Ethernet for example is at CS2 offset 0x02000000. CS2 area is between
0x18000000 and 0x1c000000. So actual physical address for LAN9118 is
0x1a000000.
You might want to drop this patch or convert to physical addresses.
Best regards,
Liviu
>
> Robin.
>
> > Remove the comma from the node name suffix to be DT spec compliant.
> >
> > Signed-off-by: Andre Przywara <andre.przywara@arm.com>
> > ---
> > arch/arm/boot/dts/vexpress-v2m-rs1.dtsi | 10 +++++-----
> > arch/arm64/boot/dts/arm/foundation-v8.dtsi | 4 ++--
> > arch/arm64/boot/dts/arm/juno-motherboard.dtsi | 6 +++---
> > arch/arm64/boot/dts/arm/rtsm_ve-motherboard-rs2.dtsi | 2 +-
> > arch/arm64/boot/dts/arm/rtsm_ve-motherboard.dtsi | 6 +++---
> > 5 files changed, 14 insertions(+), 14 deletions(-)
> >
> > diff --git a/arch/arm/boot/dts/vexpress-v2m-rs1.dtsi b/arch/arm/boot/dts/vexpress-v2m-rs1.dtsi
> > index 5c183483ec3b..8010cdcdb37a 100644
> > --- a/arch/arm/boot/dts/vexpress-v2m-rs1.dtsi
> > +++ b/arch/arm/boot/dts/vexpress-v2m-rs1.dtsi
> > @@ -31,7 +31,7 @@
> > #interrupt-cells = <1>;
> > ranges;
> > - nor_flash: flash@0,00000000 {
> > + nor_flash: flash@0 {
> > compatible = "arm,vexpress-flash", "cfi-flash";
> > reg = <0 0x00000000 0x04000000>,
> > <4 0x00000000 0x04000000>;
> > @@ -41,13 +41,13 @@
> > };
> > };
> > - psram@1,00000000 {
> > + psram@100000000 {
> > compatible = "arm,vexpress-psram", "mtd-ram";
> > reg = <1 0x00000000 0x02000000>;
> > bank-width = <4>;
> > };
> > - ethernet@2,02000000 {
> > + ethernet@202000000 {
> > compatible = "smsc,lan9118", "smsc,lan9115";
> > reg = <2 0x02000000 0x10000>;
> > interrupts = <15>;
> > @@ -59,14 +59,14 @@
> > vddvario-supply = <&v2m_fixed_3v3>;
> > };
> > - usb@2,03000000 {
> > + usb@203000000 {
> > compatible = "nxp,usb-isp1761";
> > reg = <2 0x03000000 0x20000>;
> > interrupts = <16>;
> > port1-otg;
> > };
> > - iofpga@3,00000000 {
> > + iofpga@300000000 {
> > compatible = "simple-bus";
> > #address-cells = <1>;
> > #size-cells = <1>;
> > diff --git a/arch/arm64/boot/dts/arm/foundation-v8.dtsi b/arch/arm64/boot/dts/arm/foundation-v8.dtsi
> > index 12f039fa3dad..e26b492795c5 100644
> > --- a/arch/arm64/boot/dts/arm/foundation-v8.dtsi
> > +++ b/arch/arm64/boot/dts/arm/foundation-v8.dtsi
> > @@ -151,7 +151,7 @@
> > <0 0 41 &gic 0 0 GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>,
> > <0 0 42 &gic 0 0 GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>;
> > - ethernet@2,02000000 {
> > + ethernet@202000000 {
> > compatible = "smsc,lan91c111";
> > reg = <2 0x02000000 0x10000>;
> > interrupts = <15>;
> > @@ -178,7 +178,7 @@
> > clock-output-names = "v2m:refclk32khz";
> > };
> > - iofpga@3,00000000 {
> > + iofpga@300000000 {
> > compatible = "simple-bus";
> > #address-cells = <1>;
> > #size-cells = <1>;
> > diff --git a/arch/arm64/boot/dts/arm/juno-motherboard.dtsi b/arch/arm64/boot/dts/arm/juno-motherboard.dtsi
> > index e3983ded3c3c..d5cefddde08c 100644
> > --- a/arch/arm64/boot/dts/arm/juno-motherboard.dtsi
> > +++ b/arch/arm64/boot/dts/arm/juno-motherboard.dtsi
> > @@ -103,7 +103,7 @@
> > };
> > };
> > - flash@0,00000000 {
> > + flash@0 {
> > /* 2 * 32MiB NOR Flash memory mounted on CS0 */
> > compatible = "arm,vexpress-flash", "cfi-flash";
> > reg = <0 0x00000000 0x04000000>;
> > @@ -120,7 +120,7 @@
> > };
> > };
> > - ethernet@2,00000000 {
> > + ethernet@200000000 {
> > compatible = "smsc,lan9118", "smsc,lan9115";
> > reg = <2 0x00000000 0x10000>;
> > interrupts = <3>;
> > @@ -133,7 +133,7 @@
> > vddvario-supply = <&mb_fixed_3v3>;
> > };
> > - iofpga@3,00000000 {
> > + iofpga@300000000 {
> > compatible = "simple-bus";
> > #address-cells = <1>;
> > #size-cells = <1>;
> > diff --git a/arch/arm64/boot/dts/arm/rtsm_ve-motherboard-rs2.dtsi b/arch/arm64/boot/dts/arm/rtsm_ve-motherboard-rs2.dtsi
> > index 60703b5763c6..350cbf17e8b4 100644
> > --- a/arch/arm64/boot/dts/arm/rtsm_ve-motherboard-rs2.dtsi
> > +++ b/arch/arm64/boot/dts/arm/rtsm_ve-motherboard-rs2.dtsi
> > @@ -9,7 +9,7 @@
> > motherboard {
> > arm,v2m-memory-map = "rs2";
> > - iofpga@3,00000000 {
> > + iofpga@300000000 {
> > virtio-p9@140000 {
> > compatible = "virtio,mmio";
> > reg = <0x140000 0x200>;
> > diff --git a/arch/arm64/boot/dts/arm/rtsm_ve-motherboard.dtsi b/arch/arm64/boot/dts/arm/rtsm_ve-motherboard.dtsi
> > index e333c8d2d0e4..d1bfa62ca073 100644
> > --- a/arch/arm64/boot/dts/arm/rtsm_ve-motherboard.dtsi
> > +++ b/arch/arm64/boot/dts/arm/rtsm_ve-motherboard.dtsi
> > @@ -17,14 +17,14 @@
> > #interrupt-cells = <1>;
> > ranges;
> > - flash@0,00000000 {
> > + flash@0 {
> > compatible = "arm,vexpress-flash", "cfi-flash";
> > reg = <0 0x00000000 0x04000000>,
> > <4 0x00000000 0x04000000>;
> > bank-width = <4>;
> > };
> > - ethernet@2,02000000 {
> > + ethernet@202000000 {
> > compatible = "smsc,lan91c111";
> > reg = <2 0x02000000 0x10000>;
> > interrupts = <15>;
> > @@ -51,7 +51,7 @@
> > clock-output-names = "v2m:refclk32khz";
> > };
> > - iofpga@3,00000000 {
> > + iofpga@300000000 {
> > compatible = "simple-bus";
> > #address-cells = <1>;
> > #size-cells = <1>;
> >
--
====================
| I would like to |
| fix the world, |
| but they're not |
| giving me the |
\ source code! /
---------------
¯\_(ツ)_/¯
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 69+ messages in thread* Re: [PATCH 04/16] arm64: dts: arm: Fix node address fields
2020-05-21 14:40 ` Liviu Dudau
@ 2020-05-22 9:25 ` André Przywara
-1 siblings, 0 replies; 69+ messages in thread
From: André Przywara @ 2020-05-22 9:25 UTC (permalink / raw)
To: Liviu Dudau, Robin Murphy
Cc: Rob Herring, Sudeep Holla, Lorenzo Pieralisi, Mark Rutland,
devicetree, linux-arm-kernel
On 21/05/2020 15:40, Liviu Dudau wrote:
Hi,
> On Tue, May 05, 2020 at 06:18:19PM +0100, Robin Murphy wrote:
>> On 2020-05-05 5:52 pm, Andre Przywara wrote:
>>> The Arm Ltd. boards were using an outdated address convention in the DT
>>> node names, by separating the high from the low 32-bits of an address by
>>> a comma.
>>
>> I thought that historically that was deliberate, since the actual thing
>> being encoded is <chip select>,<address>, rather than just cosmetically
>> splitting a 64-bit address value?
>>
>> Or maybe I'm thinking too far back and things have already changed in the
>> meantime :/
>
> Robin is right, if you look in the "ARM Motherboard Express µATX Technical
> Reference Manual", in the RS1 memory map (aka "Cortex-A Series memory map")
> the Ethernet for example is at CS2 offset 0x02000000. CS2 area is between
> 0x18000000 and 0x1c000000. So actual physical address for LAN9118 is
> 0x1a000000.
>
> You might want to drop this patch or convert to physical addresses.
Well, this patch is purely cosmetically, because it just changes the
node names, which have no particular meaning. But the regexp in
dt-schema for simple-bus denies commas after the '@' sign, so we get a
warning.
The question whether we actually need to model the chip select lines in
the DT is separate: we could of course just use an empty ranges;
property here, but that would be an extra patch.
If people see some value in this, I can surely post something.
Cheers,
Andre.
>> Robin.
>>
>>> Remove the comma from the node name suffix to be DT spec compliant.
>>>
>>> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
>>> ---
>>> arch/arm/boot/dts/vexpress-v2m-rs1.dtsi | 10 +++++-----
>>> arch/arm64/boot/dts/arm/foundation-v8.dtsi | 4 ++--
>>> arch/arm64/boot/dts/arm/juno-motherboard.dtsi | 6 +++---
>>> arch/arm64/boot/dts/arm/rtsm_ve-motherboard-rs2.dtsi | 2 +-
>>> arch/arm64/boot/dts/arm/rtsm_ve-motherboard.dtsi | 6 +++---
>>> 5 files changed, 14 insertions(+), 14 deletions(-)
>>>
>>> diff --git a/arch/arm/boot/dts/vexpress-v2m-rs1.dtsi b/arch/arm/boot/dts/vexpress-v2m-rs1.dtsi
>>> index 5c183483ec3b..8010cdcdb37a 100644
>>> --- a/arch/arm/boot/dts/vexpress-v2m-rs1.dtsi
>>> +++ b/arch/arm/boot/dts/vexpress-v2m-rs1.dtsi
>>> @@ -31,7 +31,7 @@
>>> #interrupt-cells = <1>;
>>> ranges;
>>> - nor_flash: flash@0,00000000 {
>>> + nor_flash: flash@0 {
>>> compatible = "arm,vexpress-flash", "cfi-flash";
>>> reg = <0 0x00000000 0x04000000>,
>>> <4 0x00000000 0x04000000>;
>>> @@ -41,13 +41,13 @@
>>> };
>>> };
>>> - psram@1,00000000 {
>>> + psram@100000000 {
>>> compatible = "arm,vexpress-psram", "mtd-ram";
>>> reg = <1 0x00000000 0x02000000>;
>>> bank-width = <4>;
>>> };
>>> - ethernet@2,02000000 {
>>> + ethernet@202000000 {
>>> compatible = "smsc,lan9118", "smsc,lan9115";
>>> reg = <2 0x02000000 0x10000>;
>>> interrupts = <15>;
>>> @@ -59,14 +59,14 @@
>>> vddvario-supply = <&v2m_fixed_3v3>;
>>> };
>>> - usb@2,03000000 {
>>> + usb@203000000 {
>>> compatible = "nxp,usb-isp1761";
>>> reg = <2 0x03000000 0x20000>;
>>> interrupts = <16>;
>>> port1-otg;
>>> };
>>> - iofpga@3,00000000 {
>>> + iofpga@300000000 {
>>> compatible = "simple-bus";
>>> #address-cells = <1>;
>>> #size-cells = <1>;
>>> diff --git a/arch/arm64/boot/dts/arm/foundation-v8.dtsi b/arch/arm64/boot/dts/arm/foundation-v8.dtsi
>>> index 12f039fa3dad..e26b492795c5 100644
>>> --- a/arch/arm64/boot/dts/arm/foundation-v8.dtsi
>>> +++ b/arch/arm64/boot/dts/arm/foundation-v8.dtsi
>>> @@ -151,7 +151,7 @@
>>> <0 0 41 &gic 0 0 GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>,
>>> <0 0 42 &gic 0 0 GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>;
>>> - ethernet@2,02000000 {
>>> + ethernet@202000000 {
>>> compatible = "smsc,lan91c111";
>>> reg = <2 0x02000000 0x10000>;
>>> interrupts = <15>;
>>> @@ -178,7 +178,7 @@
>>> clock-output-names = "v2m:refclk32khz";
>>> };
>>> - iofpga@3,00000000 {
>>> + iofpga@300000000 {
>>> compatible = "simple-bus";
>>> #address-cells = <1>;
>>> #size-cells = <1>;
>>> diff --git a/arch/arm64/boot/dts/arm/juno-motherboard.dtsi b/arch/arm64/boot/dts/arm/juno-motherboard.dtsi
>>> index e3983ded3c3c..d5cefddde08c 100644
>>> --- a/arch/arm64/boot/dts/arm/juno-motherboard.dtsi
>>> +++ b/arch/arm64/boot/dts/arm/juno-motherboard.dtsi
>>> @@ -103,7 +103,7 @@
>>> };
>>> };
>>> - flash@0,00000000 {
>>> + flash@0 {
>>> /* 2 * 32MiB NOR Flash memory mounted on CS0 */
>>> compatible = "arm,vexpress-flash", "cfi-flash";
>>> reg = <0 0x00000000 0x04000000>;
>>> @@ -120,7 +120,7 @@
>>> };
>>> };
>>> - ethernet@2,00000000 {
>>> + ethernet@200000000 {
>>> compatible = "smsc,lan9118", "smsc,lan9115";
>>> reg = <2 0x00000000 0x10000>;
>>> interrupts = <3>;
>>> @@ -133,7 +133,7 @@
>>> vddvario-supply = <&mb_fixed_3v3>;
>>> };
>>> - iofpga@3,00000000 {
>>> + iofpga@300000000 {
>>> compatible = "simple-bus";
>>> #address-cells = <1>;
>>> #size-cells = <1>;
>>> diff --git a/arch/arm64/boot/dts/arm/rtsm_ve-motherboard-rs2.dtsi b/arch/arm64/boot/dts/arm/rtsm_ve-motherboard-rs2.dtsi
>>> index 60703b5763c6..350cbf17e8b4 100644
>>> --- a/arch/arm64/boot/dts/arm/rtsm_ve-motherboard-rs2.dtsi
>>> +++ b/arch/arm64/boot/dts/arm/rtsm_ve-motherboard-rs2.dtsi
>>> @@ -9,7 +9,7 @@
>>> motherboard {
>>> arm,v2m-memory-map = "rs2";
>>> - iofpga@3,00000000 {
>>> + iofpga@300000000 {
>>> virtio-p9@140000 {
>>> compatible = "virtio,mmio";
>>> reg = <0x140000 0x200>;
>>> diff --git a/arch/arm64/boot/dts/arm/rtsm_ve-motherboard.dtsi b/arch/arm64/boot/dts/arm/rtsm_ve-motherboard.dtsi
>>> index e333c8d2d0e4..d1bfa62ca073 100644
>>> --- a/arch/arm64/boot/dts/arm/rtsm_ve-motherboard.dtsi
>>> +++ b/arch/arm64/boot/dts/arm/rtsm_ve-motherboard.dtsi
>>> @@ -17,14 +17,14 @@
>>> #interrupt-cells = <1>;
>>> ranges;
>>> - flash@0,00000000 {
>>> + flash@0 {
>>> compatible = "arm,vexpress-flash", "cfi-flash";
>>> reg = <0 0x00000000 0x04000000>,
>>> <4 0x00000000 0x04000000>;
>>> bank-width = <4>;
>>> };
>>> - ethernet@2,02000000 {
>>> + ethernet@202000000 {
>>> compatible = "smsc,lan91c111";
>>> reg = <2 0x02000000 0x10000>;
>>> interrupts = <15>;
>>> @@ -51,7 +51,7 @@
>>> clock-output-names = "v2m:refclk32khz";
>>> };
>>> - iofpga@3,00000000 {
>>> + iofpga@300000000 {
>>> compatible = "simple-bus";
>>> #address-cells = <1>;
>>> #size-cells = <1>;
>>>
>
^ permalink raw reply [flat|nested] 69+ messages in thread* Re: [PATCH 04/16] arm64: dts: arm: Fix node address fields
@ 2020-05-22 9:25 ` André Przywara
0 siblings, 0 replies; 69+ messages in thread
From: André Przywara @ 2020-05-22 9:25 UTC (permalink / raw)
To: Liviu Dudau, Robin Murphy
Cc: Mark Rutland, Rob Herring, Lorenzo Pieralisi, devicetree,
Sudeep Holla, linux-arm-kernel
On 21/05/2020 15:40, Liviu Dudau wrote:
Hi,
> On Tue, May 05, 2020 at 06:18:19PM +0100, Robin Murphy wrote:
>> On 2020-05-05 5:52 pm, Andre Przywara wrote:
>>> The Arm Ltd. boards were using an outdated address convention in the DT
>>> node names, by separating the high from the low 32-bits of an address by
>>> a comma.
>>
>> I thought that historically that was deliberate, since the actual thing
>> being encoded is <chip select>,<address>, rather than just cosmetically
>> splitting a 64-bit address value?
>>
>> Or maybe I'm thinking too far back and things have already changed in the
>> meantime :/
>
> Robin is right, if you look in the "ARM Motherboard Express µATX Technical
> Reference Manual", in the RS1 memory map (aka "Cortex-A Series memory map")
> the Ethernet for example is at CS2 offset 0x02000000. CS2 area is between
> 0x18000000 and 0x1c000000. So actual physical address for LAN9118 is
> 0x1a000000.
>
> You might want to drop this patch or convert to physical addresses.
Well, this patch is purely cosmetically, because it just changes the
node names, which have no particular meaning. But the regexp in
dt-schema for simple-bus denies commas after the '@' sign, so we get a
warning.
The question whether we actually need to model the chip select lines in
the DT is separate: we could of course just use an empty ranges;
property here, but that would be an extra patch.
If people see some value in this, I can surely post something.
Cheers,
Andre.
>> Robin.
>>
>>> Remove the comma from the node name suffix to be DT spec compliant.
>>>
>>> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
>>> ---
>>> arch/arm/boot/dts/vexpress-v2m-rs1.dtsi | 10 +++++-----
>>> arch/arm64/boot/dts/arm/foundation-v8.dtsi | 4 ++--
>>> arch/arm64/boot/dts/arm/juno-motherboard.dtsi | 6 +++---
>>> arch/arm64/boot/dts/arm/rtsm_ve-motherboard-rs2.dtsi | 2 +-
>>> arch/arm64/boot/dts/arm/rtsm_ve-motherboard.dtsi | 6 +++---
>>> 5 files changed, 14 insertions(+), 14 deletions(-)
>>>
>>> diff --git a/arch/arm/boot/dts/vexpress-v2m-rs1.dtsi b/arch/arm/boot/dts/vexpress-v2m-rs1.dtsi
>>> index 5c183483ec3b..8010cdcdb37a 100644
>>> --- a/arch/arm/boot/dts/vexpress-v2m-rs1.dtsi
>>> +++ b/arch/arm/boot/dts/vexpress-v2m-rs1.dtsi
>>> @@ -31,7 +31,7 @@
>>> #interrupt-cells = <1>;
>>> ranges;
>>> - nor_flash: flash@0,00000000 {
>>> + nor_flash: flash@0 {
>>> compatible = "arm,vexpress-flash", "cfi-flash";
>>> reg = <0 0x00000000 0x04000000>,
>>> <4 0x00000000 0x04000000>;
>>> @@ -41,13 +41,13 @@
>>> };
>>> };
>>> - psram@1,00000000 {
>>> + psram@100000000 {
>>> compatible = "arm,vexpress-psram", "mtd-ram";
>>> reg = <1 0x00000000 0x02000000>;
>>> bank-width = <4>;
>>> };
>>> - ethernet@2,02000000 {
>>> + ethernet@202000000 {
>>> compatible = "smsc,lan9118", "smsc,lan9115";
>>> reg = <2 0x02000000 0x10000>;
>>> interrupts = <15>;
>>> @@ -59,14 +59,14 @@
>>> vddvario-supply = <&v2m_fixed_3v3>;
>>> };
>>> - usb@2,03000000 {
>>> + usb@203000000 {
>>> compatible = "nxp,usb-isp1761";
>>> reg = <2 0x03000000 0x20000>;
>>> interrupts = <16>;
>>> port1-otg;
>>> };
>>> - iofpga@3,00000000 {
>>> + iofpga@300000000 {
>>> compatible = "simple-bus";
>>> #address-cells = <1>;
>>> #size-cells = <1>;
>>> diff --git a/arch/arm64/boot/dts/arm/foundation-v8.dtsi b/arch/arm64/boot/dts/arm/foundation-v8.dtsi
>>> index 12f039fa3dad..e26b492795c5 100644
>>> --- a/arch/arm64/boot/dts/arm/foundation-v8.dtsi
>>> +++ b/arch/arm64/boot/dts/arm/foundation-v8.dtsi
>>> @@ -151,7 +151,7 @@
>>> <0 0 41 &gic 0 0 GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>,
>>> <0 0 42 &gic 0 0 GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>;
>>> - ethernet@2,02000000 {
>>> + ethernet@202000000 {
>>> compatible = "smsc,lan91c111";
>>> reg = <2 0x02000000 0x10000>;
>>> interrupts = <15>;
>>> @@ -178,7 +178,7 @@
>>> clock-output-names = "v2m:refclk32khz";
>>> };
>>> - iofpga@3,00000000 {
>>> + iofpga@300000000 {
>>> compatible = "simple-bus";
>>> #address-cells = <1>;
>>> #size-cells = <1>;
>>> diff --git a/arch/arm64/boot/dts/arm/juno-motherboard.dtsi b/arch/arm64/boot/dts/arm/juno-motherboard.dtsi
>>> index e3983ded3c3c..d5cefddde08c 100644
>>> --- a/arch/arm64/boot/dts/arm/juno-motherboard.dtsi
>>> +++ b/arch/arm64/boot/dts/arm/juno-motherboard.dtsi
>>> @@ -103,7 +103,7 @@
>>> };
>>> };
>>> - flash@0,00000000 {
>>> + flash@0 {
>>> /* 2 * 32MiB NOR Flash memory mounted on CS0 */
>>> compatible = "arm,vexpress-flash", "cfi-flash";
>>> reg = <0 0x00000000 0x04000000>;
>>> @@ -120,7 +120,7 @@
>>> };
>>> };
>>> - ethernet@2,00000000 {
>>> + ethernet@200000000 {
>>> compatible = "smsc,lan9118", "smsc,lan9115";
>>> reg = <2 0x00000000 0x10000>;
>>> interrupts = <3>;
>>> @@ -133,7 +133,7 @@
>>> vddvario-supply = <&mb_fixed_3v3>;
>>> };
>>> - iofpga@3,00000000 {
>>> + iofpga@300000000 {
>>> compatible = "simple-bus";
>>> #address-cells = <1>;
>>> #size-cells = <1>;
>>> diff --git a/arch/arm64/boot/dts/arm/rtsm_ve-motherboard-rs2.dtsi b/arch/arm64/boot/dts/arm/rtsm_ve-motherboard-rs2.dtsi
>>> index 60703b5763c6..350cbf17e8b4 100644
>>> --- a/arch/arm64/boot/dts/arm/rtsm_ve-motherboard-rs2.dtsi
>>> +++ b/arch/arm64/boot/dts/arm/rtsm_ve-motherboard-rs2.dtsi
>>> @@ -9,7 +9,7 @@
>>> motherboard {
>>> arm,v2m-memory-map = "rs2";
>>> - iofpga@3,00000000 {
>>> + iofpga@300000000 {
>>> virtio-p9@140000 {
>>> compatible = "virtio,mmio";
>>> reg = <0x140000 0x200>;
>>> diff --git a/arch/arm64/boot/dts/arm/rtsm_ve-motherboard.dtsi b/arch/arm64/boot/dts/arm/rtsm_ve-motherboard.dtsi
>>> index e333c8d2d0e4..d1bfa62ca073 100644
>>> --- a/arch/arm64/boot/dts/arm/rtsm_ve-motherboard.dtsi
>>> +++ b/arch/arm64/boot/dts/arm/rtsm_ve-motherboard.dtsi
>>> @@ -17,14 +17,14 @@
>>> #interrupt-cells = <1>;
>>> ranges;
>>> - flash@0,00000000 {
>>> + flash@0 {
>>> compatible = "arm,vexpress-flash", "cfi-flash";
>>> reg = <0 0x00000000 0x04000000>,
>>> <4 0x00000000 0x04000000>;
>>> bank-width = <4>;
>>> };
>>> - ethernet@2,02000000 {
>>> + ethernet@202000000 {
>>> compatible = "smsc,lan91c111";
>>> reg = <2 0x02000000 0x10000>;
>>> interrupts = <15>;
>>> @@ -51,7 +51,7 @@
>>> clock-output-names = "v2m:refclk32khz";
>>> };
>>> - iofpga@3,00000000 {
>>> + iofpga@300000000 {
>>> compatible = "simple-bus";
>>> #address-cells = <1>;
>>> #size-cells = <1>;
>>>
>
_______________________________________________
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linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 69+ messages in thread
* [PATCH 05/16] arm64: dts: arm: FVP: Fix motherboard .dtsi
2020-05-05 16:51 ` Andre Przywara
@ 2020-05-05 16:52 ` Andre Przywara
-1 siblings, 0 replies; 69+ messages in thread
From: Andre Przywara @ 2020-05-05 16:52 UTC (permalink / raw)
To: Rob Herring, Liviu Dudau, Sudeep Holla, Lorenzo Pieralisi
Cc: devicetree, linux-arm-kernel, Mark Rutland
The "motherboard" DT include file was mixing MMIO mapped devices with
other peripherals like fixed clocks or regulators. The simple-bus
binding denies this.
Adjust the .dtsi to declare the clocks and not memory mapped devices
outside of the bus node.
This fixes a dtbs_check complaint for the fastmodel DTs.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
---
.../boot/dts/arm/rtsm_ve-motherboard.dtsi | 136 +++++++++---------
1 file changed, 68 insertions(+), 68 deletions(-)
diff --git a/arch/arm64/boot/dts/arm/rtsm_ve-motherboard.dtsi b/arch/arm64/boot/dts/arm/rtsm_ve-motherboard.dtsi
index d1bfa62ca073..f61e313ab1a4 100644
--- a/arch/arm64/boot/dts/arm/rtsm_ve-motherboard.dtsi
+++ b/arch/arm64/boot/dts/arm/rtsm_ve-motherboard.dtsi
@@ -8,6 +8,74 @@
* VEMotherBoard.lisa
*/
/ {
+ v2m_clk24mhz: clk24mhz {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <24000000>;
+ clock-output-names = "v2m:clk24mhz";
+ };
+
+ v2m_refclk1mhz: refclk1mhz {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <1000000>;
+ clock-output-names = "v2m:refclk1mhz";
+ };
+
+ v2m_refclk32khz: refclk32khz {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <32768>;
+ clock-output-names = "v2m:refclk32khz";
+ };
+
+ v2m_fixed_3v3: v2m-3v3 {
+ compatible = "regulator-fixed";
+ regulator-name = "3V3";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-always-on;
+ };
+
+ mcc {
+ compatible = "arm,vexpress,config-bus";
+ arm,vexpress,config-bridge = <&v2m_sysreg>;
+
+ v2m_oscclk1: oscclk1 {
+ /* CLCD clock */
+ compatible = "arm,vexpress-osc";
+ arm,vexpress-sysreg,func = <1 1>;
+ freq-range = <23750000 63500000>;
+ #clock-cells = <0>;
+ clock-output-names = "v2m:oscclk1";
+ };
+
+ reset {
+ compatible = "arm,vexpress-reset";
+ arm,vexpress-sysreg,func = <5 0>;
+ };
+
+ muxfpga {
+ compatible = "arm,vexpress-muxfpga";
+ arm,vexpress-sysreg,func = <7 0>;
+ };
+
+ shutdown {
+ compatible = "arm,vexpress-shutdown";
+ arm,vexpress-sysreg,func = <8 0>;
+ };
+
+ reboot {
+ compatible = "arm,vexpress-reboot";
+ arm,vexpress-sysreg,func = <9 0>;
+ };
+
+ dvimode {
+ compatible = "arm,vexpress-dvimode";
+ arm,vexpress-sysreg,func = <11 0>;
+ };
+ };
+
bus@8000000 {
motherboard {
arm,v2m-memory-map = "rs1";
@@ -30,27 +98,6 @@
interrupts = <15>;
};
- v2m_clk24mhz: clk24mhz {
- compatible = "fixed-clock";
- #clock-cells = <0>;
- clock-frequency = <24000000>;
- clock-output-names = "v2m:clk24mhz";
- };
-
- v2m_refclk1mhz: refclk1mhz {
- compatible = "fixed-clock";
- #clock-cells = <0>;
- clock-frequency = <1000000>;
- clock-output-names = "v2m:refclk1mhz";
- };
-
- v2m_refclk32khz: refclk32khz {
- compatible = "fixed-clock";
- #clock-cells = <0>;
- clock-frequency = <32768>;
- clock-output-names = "v2m:refclk32khz";
- };
-
iofpga@300000000 {
compatible = "simple-bus";
#address-cells = <1>;
@@ -198,53 +245,6 @@
};
};
};
-
- v2m_fixed_3v3: v2m-3v3 {
- compatible = "regulator-fixed";
- regulator-name = "3V3";
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- regulator-always-on;
- };
-
- mcc {
- compatible = "arm,vexpress,config-bus";
- arm,vexpress,config-bridge = <&v2m_sysreg>;
-
- v2m_oscclk1: oscclk1 {
- /* CLCD clock */
- compatible = "arm,vexpress-osc";
- arm,vexpress-sysreg,func = <1 1>;
- freq-range = <23750000 63500000>;
- #clock-cells = <0>;
- clock-output-names = "v2m:oscclk1";
- };
-
- reset {
- compatible = "arm,vexpress-reset";
- arm,vexpress-sysreg,func = <5 0>;
- };
-
- muxfpga {
- compatible = "arm,vexpress-muxfpga";
- arm,vexpress-sysreg,func = <7 0>;
- };
-
- shutdown {
- compatible = "arm,vexpress-shutdown";
- arm,vexpress-sysreg,func = <8 0>;
- };
-
- reboot {
- compatible = "arm,vexpress-reboot";
- arm,vexpress-sysreg,func = <9 0>;
- };
-
- dvimode {
- compatible = "arm,vexpress-dvimode";
- arm,vexpress-sysreg,func = <11 0>;
- };
- };
};
};
};
--
2.17.1
^ permalink raw reply related [flat|nested] 69+ messages in thread* [PATCH 05/16] arm64: dts: arm: FVP: Fix motherboard .dtsi
@ 2020-05-05 16:52 ` Andre Przywara
0 siblings, 0 replies; 69+ messages in thread
From: Andre Przywara @ 2020-05-05 16:52 UTC (permalink / raw)
To: Rob Herring, Liviu Dudau, Sudeep Holla, Lorenzo Pieralisi
Cc: Mark Rutland, devicetree, linux-arm-kernel
The "motherboard" DT include file was mixing MMIO mapped devices with
other peripherals like fixed clocks or regulators. The simple-bus
binding denies this.
Adjust the .dtsi to declare the clocks and not memory mapped devices
outside of the bus node.
This fixes a dtbs_check complaint for the fastmodel DTs.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
---
.../boot/dts/arm/rtsm_ve-motherboard.dtsi | 136 +++++++++---------
1 file changed, 68 insertions(+), 68 deletions(-)
diff --git a/arch/arm64/boot/dts/arm/rtsm_ve-motherboard.dtsi b/arch/arm64/boot/dts/arm/rtsm_ve-motherboard.dtsi
index d1bfa62ca073..f61e313ab1a4 100644
--- a/arch/arm64/boot/dts/arm/rtsm_ve-motherboard.dtsi
+++ b/arch/arm64/boot/dts/arm/rtsm_ve-motherboard.dtsi
@@ -8,6 +8,74 @@
* VEMotherBoard.lisa
*/
/ {
+ v2m_clk24mhz: clk24mhz {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <24000000>;
+ clock-output-names = "v2m:clk24mhz";
+ };
+
+ v2m_refclk1mhz: refclk1mhz {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <1000000>;
+ clock-output-names = "v2m:refclk1mhz";
+ };
+
+ v2m_refclk32khz: refclk32khz {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <32768>;
+ clock-output-names = "v2m:refclk32khz";
+ };
+
+ v2m_fixed_3v3: v2m-3v3 {
+ compatible = "regulator-fixed";
+ regulator-name = "3V3";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-always-on;
+ };
+
+ mcc {
+ compatible = "arm,vexpress,config-bus";
+ arm,vexpress,config-bridge = <&v2m_sysreg>;
+
+ v2m_oscclk1: oscclk1 {
+ /* CLCD clock */
+ compatible = "arm,vexpress-osc";
+ arm,vexpress-sysreg,func = <1 1>;
+ freq-range = <23750000 63500000>;
+ #clock-cells = <0>;
+ clock-output-names = "v2m:oscclk1";
+ };
+
+ reset {
+ compatible = "arm,vexpress-reset";
+ arm,vexpress-sysreg,func = <5 0>;
+ };
+
+ muxfpga {
+ compatible = "arm,vexpress-muxfpga";
+ arm,vexpress-sysreg,func = <7 0>;
+ };
+
+ shutdown {
+ compatible = "arm,vexpress-shutdown";
+ arm,vexpress-sysreg,func = <8 0>;
+ };
+
+ reboot {
+ compatible = "arm,vexpress-reboot";
+ arm,vexpress-sysreg,func = <9 0>;
+ };
+
+ dvimode {
+ compatible = "arm,vexpress-dvimode";
+ arm,vexpress-sysreg,func = <11 0>;
+ };
+ };
+
bus@8000000 {
motherboard {
arm,v2m-memory-map = "rs1";
@@ -30,27 +98,6 @@
interrupts = <15>;
};
- v2m_clk24mhz: clk24mhz {
- compatible = "fixed-clock";
- #clock-cells = <0>;
- clock-frequency = <24000000>;
- clock-output-names = "v2m:clk24mhz";
- };
-
- v2m_refclk1mhz: refclk1mhz {
- compatible = "fixed-clock";
- #clock-cells = <0>;
- clock-frequency = <1000000>;
- clock-output-names = "v2m:refclk1mhz";
- };
-
- v2m_refclk32khz: refclk32khz {
- compatible = "fixed-clock";
- #clock-cells = <0>;
- clock-frequency = <32768>;
- clock-output-names = "v2m:refclk32khz";
- };
-
iofpga@300000000 {
compatible = "simple-bus";
#address-cells = <1>;
@@ -198,53 +245,6 @@
};
};
};
-
- v2m_fixed_3v3: v2m-3v3 {
- compatible = "regulator-fixed";
- regulator-name = "3V3";
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- regulator-always-on;
- };
-
- mcc {
- compatible = "arm,vexpress,config-bus";
- arm,vexpress,config-bridge = <&v2m_sysreg>;
-
- v2m_oscclk1: oscclk1 {
- /* CLCD clock */
- compatible = "arm,vexpress-osc";
- arm,vexpress-sysreg,func = <1 1>;
- freq-range = <23750000 63500000>;
- #clock-cells = <0>;
- clock-output-names = "v2m:oscclk1";
- };
-
- reset {
- compatible = "arm,vexpress-reset";
- arm,vexpress-sysreg,func = <5 0>;
- };
-
- muxfpga {
- compatible = "arm,vexpress-muxfpga";
- arm,vexpress-sysreg,func = <7 0>;
- };
-
- shutdown {
- compatible = "arm,vexpress-shutdown";
- arm,vexpress-sysreg,func = <8 0>;
- };
-
- reboot {
- compatible = "arm,vexpress-reboot";
- arm,vexpress-sysreg,func = <9 0>;
- };
-
- dvimode {
- compatible = "arm,vexpress-dvimode";
- arm,vexpress-sysreg,func = <11 0>;
- };
- };
};
};
};
--
2.17.1
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply related [flat|nested] 69+ messages in thread
* [PATCH 06/16] arm64: dts: juno: Fix mem-timer
2020-05-05 16:51 ` Andre Przywara
@ 2020-05-05 16:52 ` Andre Przywara
-1 siblings, 0 replies; 69+ messages in thread
From: Andre Przywara @ 2020-05-05 16:52 UTC (permalink / raw)
To: Rob Herring, Liviu Dudau, Sudeep Holla, Lorenzo Pieralisi
Cc: devicetree, linux-arm-kernel, Mark Rutland, Marc Zyngier
The Juno's mem-timer DT node was not fully compliant with the DT binding,
which has certain expectation about child nodes and their size and
address cells values.
Use a cell size of 1, as the binding requests, and spell out the ranges
property to be binding compliant.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
---
arch/arm64/boot/dts/arm/juno-base.dtsi | 8 ++++----
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/arch/arm64/boot/dts/arm/juno-base.dtsi b/arch/arm64/boot/dts/arm/juno-base.dtsi
index f5889281545f..3feefd61eb76 100644
--- a/arch/arm64/boot/dts/arm/juno-base.dtsi
+++ b/arch/arm64/boot/dts/arm/juno-base.dtsi
@@ -11,14 +11,14 @@
compatible = "arm,armv7-timer-mem";
reg = <0x0 0x2a810000 0x0 0x10000>;
clock-frequency = <50000000>;
- #address-cells = <2>;
- #size-cells = <2>;
- ranges;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0 0x0 0x2a820000 0x20000>;
status = "disabled";
frame@2a830000 {
frame-number = <1>;
interrupts = <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>;
- reg = <0x0 0x2a830000 0x0 0x10000>;
+ reg = <0x10000 0x10000>;
};
};
--
2.17.1
^ permalink raw reply related [flat|nested] 69+ messages in thread* [PATCH 06/16] arm64: dts: juno: Fix mem-timer
@ 2020-05-05 16:52 ` Andre Przywara
0 siblings, 0 replies; 69+ messages in thread
From: Andre Przywara @ 2020-05-05 16:52 UTC (permalink / raw)
To: Rob Herring, Liviu Dudau, Sudeep Holla, Lorenzo Pieralisi
Cc: Mark Rutland, devicetree, linux-arm-kernel, Marc Zyngier
The Juno's mem-timer DT node was not fully compliant with the DT binding,
which has certain expectation about child nodes and their size and
address cells values.
Use a cell size of 1, as the binding requests, and spell out the ranges
property to be binding compliant.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
---
arch/arm64/boot/dts/arm/juno-base.dtsi | 8 ++++----
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/arch/arm64/boot/dts/arm/juno-base.dtsi b/arch/arm64/boot/dts/arm/juno-base.dtsi
index f5889281545f..3feefd61eb76 100644
--- a/arch/arm64/boot/dts/arm/juno-base.dtsi
+++ b/arch/arm64/boot/dts/arm/juno-base.dtsi
@@ -11,14 +11,14 @@
compatible = "arm,armv7-timer-mem";
reg = <0x0 0x2a810000 0x0 0x10000>;
clock-frequency = <50000000>;
- #address-cells = <2>;
- #size-cells = <2>;
- ranges;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0 0x0 0x2a820000 0x20000>;
status = "disabled";
frame@2a830000 {
frame-number = <1>;
interrupts = <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>;
- reg = <0x0 0x2a830000 0x0 0x10000>;
+ reg = <0x10000 0x10000>;
};
};
--
2.17.1
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply related [flat|nested] 69+ messages in thread
* [PATCH 07/16] arm64: dts: arm: Fix GIC compatible names
2020-05-05 16:51 ` Andre Przywara
@ 2020-05-05 16:52 ` Andre Przywara
-1 siblings, 0 replies; 69+ messages in thread
From: Andre Przywara @ 2020-05-05 16:52 UTC (permalink / raw)
To: Rob Herring, Liviu Dudau, Sudeep Holla, Lorenzo Pieralisi
Cc: devicetree, linux-arm-kernel, Mark Rutland, Marc Zyngier
The GIC DT binding only allows a certain combination of DT compatible
strings, mostly just consisting of one name.
Drop the combination of multiple names and go with the
"arm,cortex-a15-gic" name for GICv2, as this seems to be the most widely
accepted string. "arm,gic-400" would be more correct, but was introduced
much later into the kernel's GIC driver.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
---
arch/arm64/boot/dts/arm/foundation-v8-gicv2.dtsi | 2 +-
arch/arm64/boot/dts/arm/juno-base.dtsi | 2 +-
arch/arm64/boot/dts/arm/rtsm_ve-aemv8a.dts | 2 +-
3 files changed, 3 insertions(+), 3 deletions(-)
diff --git a/arch/arm64/boot/dts/arm/foundation-v8-gicv2.dtsi b/arch/arm64/boot/dts/arm/foundation-v8-gicv2.dtsi
index 15fe81738e94..61a1750fcdd6 100644
--- a/arch/arm64/boot/dts/arm/foundation-v8-gicv2.dtsi
+++ b/arch/arm64/boot/dts/arm/foundation-v8-gicv2.dtsi
@@ -6,7 +6,7 @@
/ {
gic: interrupt-controller@2c001000 {
- compatible = "arm,cortex-a15-gic", "arm,cortex-a9-gic";
+ compatible = "arm,cortex-a15-gic";
#interrupt-cells = <3>;
#address-cells = <2>;
interrupt-controller;
diff --git a/arch/arm64/boot/dts/arm/juno-base.dtsi b/arch/arm64/boot/dts/arm/juno-base.dtsi
index 3feefd61eb76..62392ab1f880 100644
--- a/arch/arm64/boot/dts/arm/juno-base.dtsi
+++ b/arch/arm64/boot/dts/arm/juno-base.dtsi
@@ -69,7 +69,7 @@
};
gic: interrupt-controller@2c010000 {
- compatible = "arm,gic-400", "arm,cortex-a15-gic";
+ compatible = "arm,cortex-a15-gic";
reg = <0x0 0x2c010000 0 0x1000>,
<0x0 0x2c02f000 0 0x2000>,
<0x0 0x2c04f000 0 0x2000>,
diff --git a/arch/arm64/boot/dts/arm/rtsm_ve-aemv8a.dts b/arch/arm64/boot/dts/arm/rtsm_ve-aemv8a.dts
index c5d15cbd8cf6..f86f6451411f 100644
--- a/arch/arm64/boot/dts/arm/rtsm_ve-aemv8a.dts
+++ b/arch/arm64/boot/dts/arm/rtsm_ve-aemv8a.dts
@@ -95,7 +95,7 @@
};
gic: interrupt-controller@2c001000 {
- compatible = "arm,cortex-a15-gic", "arm,cortex-a9-gic";
+ compatible = "arm,cortex-a15-gic";
#interrupt-cells = <3>;
#address-cells = <0>;
interrupt-controller;
--
2.17.1
^ permalink raw reply related [flat|nested] 69+ messages in thread* [PATCH 07/16] arm64: dts: arm: Fix GIC compatible names
@ 2020-05-05 16:52 ` Andre Przywara
0 siblings, 0 replies; 69+ messages in thread
From: Andre Przywara @ 2020-05-05 16:52 UTC (permalink / raw)
To: Rob Herring, Liviu Dudau, Sudeep Holla, Lorenzo Pieralisi
Cc: Mark Rutland, devicetree, linux-arm-kernel, Marc Zyngier
The GIC DT binding only allows a certain combination of DT compatible
strings, mostly just consisting of one name.
Drop the combination of multiple names and go with the
"arm,cortex-a15-gic" name for GICv2, as this seems to be the most widely
accepted string. "arm,gic-400" would be more correct, but was introduced
much later into the kernel's GIC driver.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
---
arch/arm64/boot/dts/arm/foundation-v8-gicv2.dtsi | 2 +-
arch/arm64/boot/dts/arm/juno-base.dtsi | 2 +-
arch/arm64/boot/dts/arm/rtsm_ve-aemv8a.dts | 2 +-
3 files changed, 3 insertions(+), 3 deletions(-)
diff --git a/arch/arm64/boot/dts/arm/foundation-v8-gicv2.dtsi b/arch/arm64/boot/dts/arm/foundation-v8-gicv2.dtsi
index 15fe81738e94..61a1750fcdd6 100644
--- a/arch/arm64/boot/dts/arm/foundation-v8-gicv2.dtsi
+++ b/arch/arm64/boot/dts/arm/foundation-v8-gicv2.dtsi
@@ -6,7 +6,7 @@
/ {
gic: interrupt-controller@2c001000 {
- compatible = "arm,cortex-a15-gic", "arm,cortex-a9-gic";
+ compatible = "arm,cortex-a15-gic";
#interrupt-cells = <3>;
#address-cells = <2>;
interrupt-controller;
diff --git a/arch/arm64/boot/dts/arm/juno-base.dtsi b/arch/arm64/boot/dts/arm/juno-base.dtsi
index 3feefd61eb76..62392ab1f880 100644
--- a/arch/arm64/boot/dts/arm/juno-base.dtsi
+++ b/arch/arm64/boot/dts/arm/juno-base.dtsi
@@ -69,7 +69,7 @@
};
gic: interrupt-controller@2c010000 {
- compatible = "arm,gic-400", "arm,cortex-a15-gic";
+ compatible = "arm,cortex-a15-gic";
reg = <0x0 0x2c010000 0 0x1000>,
<0x0 0x2c02f000 0 0x2000>,
<0x0 0x2c04f000 0 0x2000>,
diff --git a/arch/arm64/boot/dts/arm/rtsm_ve-aemv8a.dts b/arch/arm64/boot/dts/arm/rtsm_ve-aemv8a.dts
index c5d15cbd8cf6..f86f6451411f 100644
--- a/arch/arm64/boot/dts/arm/rtsm_ve-aemv8a.dts
+++ b/arch/arm64/boot/dts/arm/rtsm_ve-aemv8a.dts
@@ -95,7 +95,7 @@
};
gic: interrupt-controller@2c001000 {
- compatible = "arm,cortex-a15-gic", "arm,cortex-a9-gic";
+ compatible = "arm,cortex-a15-gic";
#interrupt-cells = <3>;
#address-cells = <0>;
interrupt-controller;
--
2.17.1
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply related [flat|nested] 69+ messages in thread* Re: [PATCH 07/16] arm64: dts: arm: Fix GIC compatible names
2020-05-05 16:52 ` Andre Przywara
@ 2020-05-05 18:25 ` Marc Zyngier
-1 siblings, 0 replies; 69+ messages in thread
From: Marc Zyngier @ 2020-05-05 18:25 UTC (permalink / raw)
To: Andre Przywara
Cc: Rob Herring, Liviu Dudau, Sudeep Holla, Lorenzo Pieralisi,
devicetree, linux-arm-kernel, Mark Rutland
On Tue, 05 May 2020 17:52:03 +0100,
Andre Przywara <andre.przywara@arm.com> wrote:
>
> The GIC DT binding only allows a certain combination of DT compatible
> strings, mostly just consisting of one name.
>
> Drop the combination of multiple names and go with the
> "arm,cortex-a15-gic" name for GICv2, as this seems to be the most widely
> accepted string. "arm,gic-400" would be more correct, but was introduced
> much later into the kernel's GIC driver.
>
> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
> ---
> arch/arm64/boot/dts/arm/foundation-v8-gicv2.dtsi | 2 +-
> arch/arm64/boot/dts/arm/juno-base.dtsi | 2 +-
> arch/arm64/boot/dts/arm/rtsm_ve-aemv8a.dts | 2 +-
> 3 files changed, 3 insertions(+), 3 deletions(-)
>
> diff --git a/arch/arm64/boot/dts/arm/foundation-v8-gicv2.dtsi b/arch/arm64/boot/dts/arm/foundation-v8-gicv2.dtsi
> index 15fe81738e94..61a1750fcdd6 100644
> --- a/arch/arm64/boot/dts/arm/foundation-v8-gicv2.dtsi
> +++ b/arch/arm64/boot/dts/arm/foundation-v8-gicv2.dtsi
> @@ -6,7 +6,7 @@
>
> / {
> gic: interrupt-controller@2c001000 {
> - compatible = "arm,cortex-a15-gic", "arm,cortex-a9-gic";
> + compatible = "arm,cortex-a15-gic";
> #interrupt-cells = <3>;
> #address-cells = <2>;
> interrupt-controller;
> diff --git a/arch/arm64/boot/dts/arm/juno-base.dtsi b/arch/arm64/boot/dts/arm/juno-base.dtsi
> index 3feefd61eb76..62392ab1f880 100644
> --- a/arch/arm64/boot/dts/arm/juno-base.dtsi
> +++ b/arch/arm64/boot/dts/arm/juno-base.dtsi
> @@ -69,7 +69,7 @@
> };
>
> gic: interrupt-controller@2c010000 {
> - compatible = "arm,gic-400", "arm,cortex-a15-gic";
> + compatible = "arm,cortex-a15-gic";
Why? GIC-400 is definitely the most correct compatible string. I'd
rather see this compatible being generalised to the models rather than
only referencing the A15 GIC.
> reg = <0x0 0x2c010000 0 0x1000>,
> <0x0 0x2c02f000 0 0x2000>,
> <0x0 0x2c04f000 0 0x2000>,
> diff --git a/arch/arm64/boot/dts/arm/rtsm_ve-aemv8a.dts b/arch/arm64/boot/dts/arm/rtsm_ve-aemv8a.dts
> index c5d15cbd8cf6..f86f6451411f 100644
> --- a/arch/arm64/boot/dts/arm/rtsm_ve-aemv8a.dts
> +++ b/arch/arm64/boot/dts/arm/rtsm_ve-aemv8a.dts
> @@ -95,7 +95,7 @@
> };
>
> gic: interrupt-controller@2c001000 {
> - compatible = "arm,cortex-a15-gic", "arm,cortex-a9-gic";
> + compatible = "arm,cortex-a15-gic";
> #interrupt-cells = <3>;
> #address-cells = <0>;
> interrupt-controller;
> --
> 2.17.1
>
>
Thanks,
M.
--
Jazz is not dead, it just smells funny.
^ permalink raw reply [flat|nested] 69+ messages in thread* Re: [PATCH 07/16] arm64: dts: arm: Fix GIC compatible names
@ 2020-05-05 18:25 ` Marc Zyngier
0 siblings, 0 replies; 69+ messages in thread
From: Marc Zyngier @ 2020-05-05 18:25 UTC (permalink / raw)
To: Andre Przywara
Cc: Mark Rutland, Rob Herring, Lorenzo Pieralisi, devicetree,
Liviu Dudau, Sudeep Holla, linux-arm-kernel
On Tue, 05 May 2020 17:52:03 +0100,
Andre Przywara <andre.przywara@arm.com> wrote:
>
> The GIC DT binding only allows a certain combination of DT compatible
> strings, mostly just consisting of one name.
>
> Drop the combination of multiple names and go with the
> "arm,cortex-a15-gic" name for GICv2, as this seems to be the most widely
> accepted string. "arm,gic-400" would be more correct, but was introduced
> much later into the kernel's GIC driver.
>
> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
> ---
> arch/arm64/boot/dts/arm/foundation-v8-gicv2.dtsi | 2 +-
> arch/arm64/boot/dts/arm/juno-base.dtsi | 2 +-
> arch/arm64/boot/dts/arm/rtsm_ve-aemv8a.dts | 2 +-
> 3 files changed, 3 insertions(+), 3 deletions(-)
>
> diff --git a/arch/arm64/boot/dts/arm/foundation-v8-gicv2.dtsi b/arch/arm64/boot/dts/arm/foundation-v8-gicv2.dtsi
> index 15fe81738e94..61a1750fcdd6 100644
> --- a/arch/arm64/boot/dts/arm/foundation-v8-gicv2.dtsi
> +++ b/arch/arm64/boot/dts/arm/foundation-v8-gicv2.dtsi
> @@ -6,7 +6,7 @@
>
> / {
> gic: interrupt-controller@2c001000 {
> - compatible = "arm,cortex-a15-gic", "arm,cortex-a9-gic";
> + compatible = "arm,cortex-a15-gic";
> #interrupt-cells = <3>;
> #address-cells = <2>;
> interrupt-controller;
> diff --git a/arch/arm64/boot/dts/arm/juno-base.dtsi b/arch/arm64/boot/dts/arm/juno-base.dtsi
> index 3feefd61eb76..62392ab1f880 100644
> --- a/arch/arm64/boot/dts/arm/juno-base.dtsi
> +++ b/arch/arm64/boot/dts/arm/juno-base.dtsi
> @@ -69,7 +69,7 @@
> };
>
> gic: interrupt-controller@2c010000 {
> - compatible = "arm,gic-400", "arm,cortex-a15-gic";
> + compatible = "arm,cortex-a15-gic";
Why? GIC-400 is definitely the most correct compatible string. I'd
rather see this compatible being generalised to the models rather than
only referencing the A15 GIC.
> reg = <0x0 0x2c010000 0 0x1000>,
> <0x0 0x2c02f000 0 0x2000>,
> <0x0 0x2c04f000 0 0x2000>,
> diff --git a/arch/arm64/boot/dts/arm/rtsm_ve-aemv8a.dts b/arch/arm64/boot/dts/arm/rtsm_ve-aemv8a.dts
> index c5d15cbd8cf6..f86f6451411f 100644
> --- a/arch/arm64/boot/dts/arm/rtsm_ve-aemv8a.dts
> +++ b/arch/arm64/boot/dts/arm/rtsm_ve-aemv8a.dts
> @@ -95,7 +95,7 @@
> };
>
> gic: interrupt-controller@2c001000 {
> - compatible = "arm,cortex-a15-gic", "arm,cortex-a9-gic";
> + compatible = "arm,cortex-a15-gic";
> #interrupt-cells = <3>;
> #address-cells = <0>;
> interrupt-controller;
> --
> 2.17.1
>
>
Thanks,
M.
--
Jazz is not dead, it just smells funny.
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 69+ messages in thread* Re: [PATCH 07/16] arm64: dts: arm: Fix GIC compatible names
2020-05-05 18:25 ` Marc Zyngier
@ 2020-05-06 8:45 ` André Przywara
-1 siblings, 0 replies; 69+ messages in thread
From: André Przywara @ 2020-05-06 8:45 UTC (permalink / raw)
To: Marc Zyngier
Cc: Rob Herring, Liviu Dudau, Sudeep Holla, Lorenzo Pieralisi,
devicetree, linux-arm-kernel, Mark Rutland
On 05/05/2020 19:25, Marc Zyngier wrote:
> On Tue, 05 May 2020 17:52:03 +0100,
> Andre Przywara <andre.przywara@arm.com> wrote:
>>
>> The GIC DT binding only allows a certain combination of DT compatible
>> strings, mostly just consisting of one name.
>>
>> Drop the combination of multiple names and go with the
>> "arm,cortex-a15-gic" name for GICv2, as this seems to be the most widely
>> accepted string. "arm,gic-400" would be more correct, but was introduced
>> much later into the kernel's GIC driver.
>>
>> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
>> ---
>> arch/arm64/boot/dts/arm/foundation-v8-gicv2.dtsi | 2 +-
>> arch/arm64/boot/dts/arm/juno-base.dtsi | 2 +-
>> arch/arm64/boot/dts/arm/rtsm_ve-aemv8a.dts | 2 +-
>> 3 files changed, 3 insertions(+), 3 deletions(-)
>>
>> diff --git a/arch/arm64/boot/dts/arm/foundation-v8-gicv2.dtsi b/arch/arm64/boot/dts/arm/foundation-v8-gicv2.dtsi
>> index 15fe81738e94..61a1750fcdd6 100644
>> --- a/arch/arm64/boot/dts/arm/foundation-v8-gicv2.dtsi
>> +++ b/arch/arm64/boot/dts/arm/foundation-v8-gicv2.dtsi
>> @@ -6,7 +6,7 @@
>>
>> / {
>> gic: interrupt-controller@2c001000 {
>> - compatible = "arm,cortex-a15-gic", "arm,cortex-a9-gic";
>> + compatible = "arm,cortex-a15-gic";
>> #interrupt-cells = <3>;
>> #address-cells = <2>;
>> interrupt-controller;
>> diff --git a/arch/arm64/boot/dts/arm/juno-base.dtsi b/arch/arm64/boot/dts/arm/juno-base.dtsi
>> index 3feefd61eb76..62392ab1f880 100644
>> --- a/arch/arm64/boot/dts/arm/juno-base.dtsi
>> +++ b/arch/arm64/boot/dts/arm/juno-base.dtsi
>> @@ -69,7 +69,7 @@
>> };
>>
>> gic: interrupt-controller@2c010000 {
>> - compatible = "arm,gic-400", "arm,cortex-a15-gic";
>> + compatible = "arm,cortex-a15-gic";
>
> Why? GIC-400 is definitely the most correct compatible string. I'd
> rather see this compatible being generalised to the models rather than
> only referencing the A15 GIC.
I agree that gic-400 is the far better name, but it was only introduced
in v3.16. So omitting arm,cortex-a15-gic would break any kernels before
that, which I would like to avoid.
It's actually a pity that we are so picky about the compatible listings,
because the existing combination is actually quite nice: we get
compatibility with older DT consumers, but still can say what it
actually is.
I wonder if I should introduce this combination to the GIC DT binding
instead, it seems like there are other users in the tree as well.
What do you think?
Cheers,
Andre
>
>> reg = <0x0 0x2c010000 0 0x1000>,
>> <0x0 0x2c02f000 0 0x2000>,
>> <0x0 0x2c04f000 0 0x2000>,
>> diff --git a/arch/arm64/boot/dts/arm/rtsm_ve-aemv8a.dts b/arch/arm64/boot/dts/arm/rtsm_ve-aemv8a.dts
>> index c5d15cbd8cf6..f86f6451411f 100644
>> --- a/arch/arm64/boot/dts/arm/rtsm_ve-aemv8a.dts
>> +++ b/arch/arm64/boot/dts/arm/rtsm_ve-aemv8a.dts
>> @@ -95,7 +95,7 @@
>> };
>>
>> gic: interrupt-controller@2c001000 {
>> - compatible = "arm,cortex-a15-gic", "arm,cortex-a9-gic";
>> + compatible = "arm,cortex-a15-gic";
>> #interrupt-cells = <3>;
>> #address-cells = <0>;
>> interrupt-controller;
>> --
>> 2.17.1
>>
>>
>
> Thanks,
>
> M.
>
^ permalink raw reply [flat|nested] 69+ messages in thread* Re: [PATCH 07/16] arm64: dts: arm: Fix GIC compatible names
@ 2020-05-06 8:45 ` André Przywara
0 siblings, 0 replies; 69+ messages in thread
From: André Przywara @ 2020-05-06 8:45 UTC (permalink / raw)
To: Marc Zyngier
Cc: Mark Rutland, Rob Herring, Lorenzo Pieralisi, devicetree,
Liviu Dudau, Sudeep Holla, linux-arm-kernel
On 05/05/2020 19:25, Marc Zyngier wrote:
> On Tue, 05 May 2020 17:52:03 +0100,
> Andre Przywara <andre.przywara@arm.com> wrote:
>>
>> The GIC DT binding only allows a certain combination of DT compatible
>> strings, mostly just consisting of one name.
>>
>> Drop the combination of multiple names and go with the
>> "arm,cortex-a15-gic" name for GICv2, as this seems to be the most widely
>> accepted string. "arm,gic-400" would be more correct, but was introduced
>> much later into the kernel's GIC driver.
>>
>> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
>> ---
>> arch/arm64/boot/dts/arm/foundation-v8-gicv2.dtsi | 2 +-
>> arch/arm64/boot/dts/arm/juno-base.dtsi | 2 +-
>> arch/arm64/boot/dts/arm/rtsm_ve-aemv8a.dts | 2 +-
>> 3 files changed, 3 insertions(+), 3 deletions(-)
>>
>> diff --git a/arch/arm64/boot/dts/arm/foundation-v8-gicv2.dtsi b/arch/arm64/boot/dts/arm/foundation-v8-gicv2.dtsi
>> index 15fe81738e94..61a1750fcdd6 100644
>> --- a/arch/arm64/boot/dts/arm/foundation-v8-gicv2.dtsi
>> +++ b/arch/arm64/boot/dts/arm/foundation-v8-gicv2.dtsi
>> @@ -6,7 +6,7 @@
>>
>> / {
>> gic: interrupt-controller@2c001000 {
>> - compatible = "arm,cortex-a15-gic", "arm,cortex-a9-gic";
>> + compatible = "arm,cortex-a15-gic";
>> #interrupt-cells = <3>;
>> #address-cells = <2>;
>> interrupt-controller;
>> diff --git a/arch/arm64/boot/dts/arm/juno-base.dtsi b/arch/arm64/boot/dts/arm/juno-base.dtsi
>> index 3feefd61eb76..62392ab1f880 100644
>> --- a/arch/arm64/boot/dts/arm/juno-base.dtsi
>> +++ b/arch/arm64/boot/dts/arm/juno-base.dtsi
>> @@ -69,7 +69,7 @@
>> };
>>
>> gic: interrupt-controller@2c010000 {
>> - compatible = "arm,gic-400", "arm,cortex-a15-gic";
>> + compatible = "arm,cortex-a15-gic";
>
> Why? GIC-400 is definitely the most correct compatible string. I'd
> rather see this compatible being generalised to the models rather than
> only referencing the A15 GIC.
I agree that gic-400 is the far better name, but it was only introduced
in v3.16. So omitting arm,cortex-a15-gic would break any kernels before
that, which I would like to avoid.
It's actually a pity that we are so picky about the compatible listings,
because the existing combination is actually quite nice: we get
compatibility with older DT consumers, but still can say what it
actually is.
I wonder if I should introduce this combination to the GIC DT binding
instead, it seems like there are other users in the tree as well.
What do you think?
Cheers,
Andre
>
>> reg = <0x0 0x2c010000 0 0x1000>,
>> <0x0 0x2c02f000 0 0x2000>,
>> <0x0 0x2c04f000 0 0x2000>,
>> diff --git a/arch/arm64/boot/dts/arm/rtsm_ve-aemv8a.dts b/arch/arm64/boot/dts/arm/rtsm_ve-aemv8a.dts
>> index c5d15cbd8cf6..f86f6451411f 100644
>> --- a/arch/arm64/boot/dts/arm/rtsm_ve-aemv8a.dts
>> +++ b/arch/arm64/boot/dts/arm/rtsm_ve-aemv8a.dts
>> @@ -95,7 +95,7 @@
>> };
>>
>> gic: interrupt-controller@2c001000 {
>> - compatible = "arm,cortex-a15-gic", "arm,cortex-a9-gic";
>> + compatible = "arm,cortex-a15-gic";
>> #interrupt-cells = <3>;
>> #address-cells = <0>;
>> interrupt-controller;
>> --
>> 2.17.1
>>
>>
>
> Thanks,
>
> M.
>
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 69+ messages in thread* Re: [PATCH 07/16] arm64: dts: arm: Fix GIC compatible names
2020-05-06 8:45 ` André Przywara
@ 2020-05-06 9:16 ` Marc Zyngier
-1 siblings, 0 replies; 69+ messages in thread
From: Marc Zyngier @ 2020-05-06 9:16 UTC (permalink / raw)
To: André Przywara
Cc: Rob Herring, Liviu Dudau, Sudeep Holla, Lorenzo Pieralisi,
devicetree, linux-arm-kernel, Mark Rutland
On 2020-05-06 09:45, André Przywara wrote:
> On 05/05/2020 19:25, Marc Zyngier wrote:
>> On Tue, 05 May 2020 17:52:03 +0100,
>> Andre Przywara <andre.przywara@arm.com> wrote:
>>>
>>> The GIC DT binding only allows a certain combination of DT compatible
>>> strings, mostly just consisting of one name.
>>>
>>> Drop the combination of multiple names and go with the
>>> "arm,cortex-a15-gic" name for GICv2, as this seems to be the most
>>> widely
>>> accepted string. "arm,gic-400" would be more correct, but was
>>> introduced
>>> much later into the kernel's GIC driver.
>>>
>>> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
>>> ---
>>> arch/arm64/boot/dts/arm/foundation-v8-gicv2.dtsi | 2 +-
>>> arch/arm64/boot/dts/arm/juno-base.dtsi | 2 +-
>>> arch/arm64/boot/dts/arm/rtsm_ve-aemv8a.dts | 2 +-
>>> 3 files changed, 3 insertions(+), 3 deletions(-)
>>>
>>> diff --git a/arch/arm64/boot/dts/arm/foundation-v8-gicv2.dtsi
>>> b/arch/arm64/boot/dts/arm/foundation-v8-gicv2.dtsi
>>> index 15fe81738e94..61a1750fcdd6 100644
>>> --- a/arch/arm64/boot/dts/arm/foundation-v8-gicv2.dtsi
>>> +++ b/arch/arm64/boot/dts/arm/foundation-v8-gicv2.dtsi
>>> @@ -6,7 +6,7 @@
>>>
>>> / {
>>> gic: interrupt-controller@2c001000 {
>>> - compatible = "arm,cortex-a15-gic", "arm,cortex-a9-gic";
>>> + compatible = "arm,cortex-a15-gic";
>>> #interrupt-cells = <3>;
>>> #address-cells = <2>;
>>> interrupt-controller;
>>> diff --git a/arch/arm64/boot/dts/arm/juno-base.dtsi
>>> b/arch/arm64/boot/dts/arm/juno-base.dtsi
>>> index 3feefd61eb76..62392ab1f880 100644
>>> --- a/arch/arm64/boot/dts/arm/juno-base.dtsi
>>> +++ b/arch/arm64/boot/dts/arm/juno-base.dtsi
>>> @@ -69,7 +69,7 @@
>>> };
>>>
>>> gic: interrupt-controller@2c010000 {
>>> - compatible = "arm,gic-400", "arm,cortex-a15-gic";
>>> + compatible = "arm,cortex-a15-gic";
>>
>> Why? GIC-400 is definitely the most correct compatible string. I'd
>> rather see this compatible being generalised to the models rather than
>> only referencing the A15 GIC.
>
> I agree that gic-400 is the far better name, but it was only introduced
> in v3.16. So omitting arm,cortex-a15-gic would break any kernels before
> that, which I would like to avoid.
I am not talking about dropping the A15 GIC. I'm saying that both should
stay. Is there anything in the DT binding that forbids multiple names in
the compatible property?
> It's actually a pity that we are so picky about the compatible
> listings,
> because the existing combination is actually quite nice: we get
> compatibility with older DT consumers, but still can say what it
> actually is.
> I wonder if I should introduce this combination to the GIC DT binding
> instead, it seems like there are other users in the tree as well.
>
> What do you think?
I'd say that if the binding forbids multiple compatible strings, the
binding is likely to be wrong. We should fix it, and not make the DTs
worse as a result of a binding issue.
Thanks,
M.
--
Jazz is not dead. It just smells funny...
^ permalink raw reply [flat|nested] 69+ messages in thread* Re: [PATCH 07/16] arm64: dts: arm: Fix GIC compatible names
@ 2020-05-06 9:16 ` Marc Zyngier
0 siblings, 0 replies; 69+ messages in thread
From: Marc Zyngier @ 2020-05-06 9:16 UTC (permalink / raw)
To: André Przywara
Cc: Mark Rutland, Rob Herring, Lorenzo Pieralisi, devicetree,
Liviu Dudau, Sudeep Holla, linux-arm-kernel
On 2020-05-06 09:45, André Przywara wrote:
> On 05/05/2020 19:25, Marc Zyngier wrote:
>> On Tue, 05 May 2020 17:52:03 +0100,
>> Andre Przywara <andre.przywara@arm.com> wrote:
>>>
>>> The GIC DT binding only allows a certain combination of DT compatible
>>> strings, mostly just consisting of one name.
>>>
>>> Drop the combination of multiple names and go with the
>>> "arm,cortex-a15-gic" name for GICv2, as this seems to be the most
>>> widely
>>> accepted string. "arm,gic-400" would be more correct, but was
>>> introduced
>>> much later into the kernel's GIC driver.
>>>
>>> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
>>> ---
>>> arch/arm64/boot/dts/arm/foundation-v8-gicv2.dtsi | 2 +-
>>> arch/arm64/boot/dts/arm/juno-base.dtsi | 2 +-
>>> arch/arm64/boot/dts/arm/rtsm_ve-aemv8a.dts | 2 +-
>>> 3 files changed, 3 insertions(+), 3 deletions(-)
>>>
>>> diff --git a/arch/arm64/boot/dts/arm/foundation-v8-gicv2.dtsi
>>> b/arch/arm64/boot/dts/arm/foundation-v8-gicv2.dtsi
>>> index 15fe81738e94..61a1750fcdd6 100644
>>> --- a/arch/arm64/boot/dts/arm/foundation-v8-gicv2.dtsi
>>> +++ b/arch/arm64/boot/dts/arm/foundation-v8-gicv2.dtsi
>>> @@ -6,7 +6,7 @@
>>>
>>> / {
>>> gic: interrupt-controller@2c001000 {
>>> - compatible = "arm,cortex-a15-gic", "arm,cortex-a9-gic";
>>> + compatible = "arm,cortex-a15-gic";
>>> #interrupt-cells = <3>;
>>> #address-cells = <2>;
>>> interrupt-controller;
>>> diff --git a/arch/arm64/boot/dts/arm/juno-base.dtsi
>>> b/arch/arm64/boot/dts/arm/juno-base.dtsi
>>> index 3feefd61eb76..62392ab1f880 100644
>>> --- a/arch/arm64/boot/dts/arm/juno-base.dtsi
>>> +++ b/arch/arm64/boot/dts/arm/juno-base.dtsi
>>> @@ -69,7 +69,7 @@
>>> };
>>>
>>> gic: interrupt-controller@2c010000 {
>>> - compatible = "arm,gic-400", "arm,cortex-a15-gic";
>>> + compatible = "arm,cortex-a15-gic";
>>
>> Why? GIC-400 is definitely the most correct compatible string. I'd
>> rather see this compatible being generalised to the models rather than
>> only referencing the A15 GIC.
>
> I agree that gic-400 is the far better name, but it was only introduced
> in v3.16. So omitting arm,cortex-a15-gic would break any kernels before
> that, which I would like to avoid.
I am not talking about dropping the A15 GIC. I'm saying that both should
stay. Is there anything in the DT binding that forbids multiple names in
the compatible property?
> It's actually a pity that we are so picky about the compatible
> listings,
> because the existing combination is actually quite nice: we get
> compatibility with older DT consumers, but still can say what it
> actually is.
> I wonder if I should introduce this combination to the GIC DT binding
> instead, it seems like there are other users in the tree as well.
>
> What do you think?
I'd say that if the binding forbids multiple compatible strings, the
binding is likely to be wrong. We should fix it, and not make the DTs
worse as a result of a binding issue.
Thanks,
M.
--
Jazz is not dead. It just smells funny...
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 69+ messages in thread* Re: [PATCH 07/16] arm64: dts: arm: Fix GIC compatible names
2020-05-06 9:16 ` Marc Zyngier
@ 2020-05-06 10:00 ` André Przywara
-1 siblings, 0 replies; 69+ messages in thread
From: André Przywara @ 2020-05-06 10:00 UTC (permalink / raw)
To: Marc Zyngier
Cc: Rob Herring, Liviu Dudau, Sudeep Holla, Lorenzo Pieralisi,
devicetree, linux-arm-kernel, Mark Rutland
On 06/05/2020 10:16, Marc Zyngier wrote:
> On 2020-05-06 09:45, André Przywara wrote:
>> On 05/05/2020 19:25, Marc Zyngier wrote:
>>> On Tue, 05 May 2020 17:52:03 +0100,
>>> Andre Przywara <andre.przywara@arm.com> wrote:
>>>>
>>>> The GIC DT binding only allows a certain combination of DT compatible
>>>> strings, mostly just consisting of one name.
>>>>
>>>> Drop the combination of multiple names and go with the
>>>> "arm,cortex-a15-gic" name for GICv2, as this seems to be the most
>>>> widely
>>>> accepted string. "arm,gic-400" would be more correct, but was
>>>> introduced
>>>> much later into the kernel's GIC driver.
>>>>
>>>> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
>>>> ---
>>>> arch/arm64/boot/dts/arm/foundation-v8-gicv2.dtsi | 2 +-
>>>> arch/arm64/boot/dts/arm/juno-base.dtsi | 2 +-
>>>> arch/arm64/boot/dts/arm/rtsm_ve-aemv8a.dts | 2 +-
>>>> 3 files changed, 3 insertions(+), 3 deletions(-)
>>>>
>>>> diff --git a/arch/arm64/boot/dts/arm/foundation-v8-gicv2.dtsi
>>>> b/arch/arm64/boot/dts/arm/foundation-v8-gicv2.dtsi
>>>> index 15fe81738e94..61a1750fcdd6 100644
>>>> --- a/arch/arm64/boot/dts/arm/foundation-v8-gicv2.dtsi
>>>> +++ b/arch/arm64/boot/dts/arm/foundation-v8-gicv2.dtsi
>>>> @@ -6,7 +6,7 @@
>>>>
>>>> / {
>>>> gic: interrupt-controller@2c001000 {
>>>> - compatible = "arm,cortex-a15-gic", "arm,cortex-a9-gic";
>>>> + compatible = "arm,cortex-a15-gic";
>>>> #interrupt-cells = <3>;
>>>> #address-cells = <2>;
>>>> interrupt-controller;
>>>> diff --git a/arch/arm64/boot/dts/arm/juno-base.dtsi
>>>> b/arch/arm64/boot/dts/arm/juno-base.dtsi
>>>> index 3feefd61eb76..62392ab1f880 100644
>>>> --- a/arch/arm64/boot/dts/arm/juno-base.dtsi
>>>> +++ b/arch/arm64/boot/dts/arm/juno-base.dtsi
>>>> @@ -69,7 +69,7 @@
>>>> };
>>>>
>>>> gic: interrupt-controller@2c010000 {
>>>> - compatible = "arm,gic-400", "arm,cortex-a15-gic";
>>>> + compatible = "arm,cortex-a15-gic";
>>>
>>> Why? GIC-400 is definitely the most correct compatible string. I'd
>>> rather see this compatible being generalised to the models rather than
>>> only referencing the A15 GIC.
>>
>> I agree that gic-400 is the far better name, but it was only introduced
>> in v3.16. So omitting arm,cortex-a15-gic would break any kernels before
>> that, which I would like to avoid.
>
> I am not talking about dropping the A15 GIC. I'm saying that both should
> stay. Is there anything in the DT binding that forbids multiple names in
> the compatible property?
Well, the current form of the YAML bindings require every combination of
compatible strings to be listed, either explicitly, or using an list of
allowed strings for each position. This combination here is not listed
at the moment.
>> It's actually a pity that we are so picky about the compatible listings,
>> because the existing combination is actually quite nice: we get
>> compatibility with older DT consumers, but still can say what it
>> actually is.
>> I wonder if I should introduce this combination to the GIC DT binding
>> instead, it seems like there are other users in the tree as well.
>>
>> What do you think?
>
> I'd say that if the binding forbids multiple compatible strings, the
> binding is likely to be wrong. We should fix it, and not make the DTs
> worse as a result of a binding issue.
OK, thanks for the confirmation, and I agree. I will ditch this patch
and replace it with a respective bindings fix.
Thanks,
Andre.
^ permalink raw reply [flat|nested] 69+ messages in thread* Re: [PATCH 07/16] arm64: dts: arm: Fix GIC compatible names
@ 2020-05-06 10:00 ` André Przywara
0 siblings, 0 replies; 69+ messages in thread
From: André Przywara @ 2020-05-06 10:00 UTC (permalink / raw)
To: Marc Zyngier
Cc: Mark Rutland, Rob Herring, Lorenzo Pieralisi, devicetree,
Liviu Dudau, Sudeep Holla, linux-arm-kernel
On 06/05/2020 10:16, Marc Zyngier wrote:
> On 2020-05-06 09:45, André Przywara wrote:
>> On 05/05/2020 19:25, Marc Zyngier wrote:
>>> On Tue, 05 May 2020 17:52:03 +0100,
>>> Andre Przywara <andre.przywara@arm.com> wrote:
>>>>
>>>> The GIC DT binding only allows a certain combination of DT compatible
>>>> strings, mostly just consisting of one name.
>>>>
>>>> Drop the combination of multiple names and go with the
>>>> "arm,cortex-a15-gic" name for GICv2, as this seems to be the most
>>>> widely
>>>> accepted string. "arm,gic-400" would be more correct, but was
>>>> introduced
>>>> much later into the kernel's GIC driver.
>>>>
>>>> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
>>>> ---
>>>> arch/arm64/boot/dts/arm/foundation-v8-gicv2.dtsi | 2 +-
>>>> arch/arm64/boot/dts/arm/juno-base.dtsi | 2 +-
>>>> arch/arm64/boot/dts/arm/rtsm_ve-aemv8a.dts | 2 +-
>>>> 3 files changed, 3 insertions(+), 3 deletions(-)
>>>>
>>>> diff --git a/arch/arm64/boot/dts/arm/foundation-v8-gicv2.dtsi
>>>> b/arch/arm64/boot/dts/arm/foundation-v8-gicv2.dtsi
>>>> index 15fe81738e94..61a1750fcdd6 100644
>>>> --- a/arch/arm64/boot/dts/arm/foundation-v8-gicv2.dtsi
>>>> +++ b/arch/arm64/boot/dts/arm/foundation-v8-gicv2.dtsi
>>>> @@ -6,7 +6,7 @@
>>>>
>>>> / {
>>>> gic: interrupt-controller@2c001000 {
>>>> - compatible = "arm,cortex-a15-gic", "arm,cortex-a9-gic";
>>>> + compatible = "arm,cortex-a15-gic";
>>>> #interrupt-cells = <3>;
>>>> #address-cells = <2>;
>>>> interrupt-controller;
>>>> diff --git a/arch/arm64/boot/dts/arm/juno-base.dtsi
>>>> b/arch/arm64/boot/dts/arm/juno-base.dtsi
>>>> index 3feefd61eb76..62392ab1f880 100644
>>>> --- a/arch/arm64/boot/dts/arm/juno-base.dtsi
>>>> +++ b/arch/arm64/boot/dts/arm/juno-base.dtsi
>>>> @@ -69,7 +69,7 @@
>>>> };
>>>>
>>>> gic: interrupt-controller@2c010000 {
>>>> - compatible = "arm,gic-400", "arm,cortex-a15-gic";
>>>> + compatible = "arm,cortex-a15-gic";
>>>
>>> Why? GIC-400 is definitely the most correct compatible string. I'd
>>> rather see this compatible being generalised to the models rather than
>>> only referencing the A15 GIC.
>>
>> I agree that gic-400 is the far better name, but it was only introduced
>> in v3.16. So omitting arm,cortex-a15-gic would break any kernels before
>> that, which I would like to avoid.
>
> I am not talking about dropping the A15 GIC. I'm saying that both should
> stay. Is there anything in the DT binding that forbids multiple names in
> the compatible property?
Well, the current form of the YAML bindings require every combination of
compatible strings to be listed, either explicitly, or using an list of
allowed strings for each position. This combination here is not listed
at the moment.
>> It's actually a pity that we are so picky about the compatible listings,
>> because the existing combination is actually quite nice: we get
>> compatibility with older DT consumers, but still can say what it
>> actually is.
>> I wonder if I should introduce this combination to the GIC DT binding
>> instead, it seems like there are other users in the tree as well.
>>
>> What do you think?
>
> I'd say that if the binding forbids multiple compatible strings, the
> binding is likely to be wrong. We should fix it, and not make the DTs
> worse as a result of a binding issue.
OK, thanks for the confirmation, and I agree. I will ditch this patch
and replace it with a respective bindings fix.
Thanks,
Andre.
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 69+ messages in thread* Re: [PATCH 07/16] arm64: dts: arm: Fix GIC compatible names
2020-05-06 10:00 ` André Przywara
@ 2020-05-06 10:11 ` Marc Zyngier
-1 siblings, 0 replies; 69+ messages in thread
From: Marc Zyngier @ 2020-05-06 10:11 UTC (permalink / raw)
To: André Przywara
Cc: Rob Herring, Liviu Dudau, Sudeep Holla, Lorenzo Pieralisi,
devicetree, linux-arm-kernel, Mark Rutland
On 2020-05-06 11:00, André Przywara wrote:
> On 06/05/2020 10:16, Marc Zyngier wrote:
>> On 2020-05-06 09:45, André Przywara wrote:
>>> On 05/05/2020 19:25, Marc Zyngier wrote:
>>>> On Tue, 05 May 2020 17:52:03 +0100,
>>>> Andre Przywara <andre.przywara@arm.com> wrote:
>>>>>
>>>>> The GIC DT binding only allows a certain combination of DT
>>>>> compatible
>>>>> strings, mostly just consisting of one name.
>>>>>
>>>>> Drop the combination of multiple names and go with the
>>>>> "arm,cortex-a15-gic" name for GICv2, as this seems to be the most
>>>>> widely
>>>>> accepted string. "arm,gic-400" would be more correct, but was
>>>>> introduced
>>>>> much later into the kernel's GIC driver.
>>>>>
>>>>> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
>>>>> ---
>>>>> arch/arm64/boot/dts/arm/foundation-v8-gicv2.dtsi | 2 +-
>>>>> arch/arm64/boot/dts/arm/juno-base.dtsi | 2 +-
>>>>> arch/arm64/boot/dts/arm/rtsm_ve-aemv8a.dts | 2 +-
>>>>> 3 files changed, 3 insertions(+), 3 deletions(-)
>>>>>
>>>>> diff --git a/arch/arm64/boot/dts/arm/foundation-v8-gicv2.dtsi
>>>>> b/arch/arm64/boot/dts/arm/foundation-v8-gicv2.dtsi
>>>>> index 15fe81738e94..61a1750fcdd6 100644
>>>>> --- a/arch/arm64/boot/dts/arm/foundation-v8-gicv2.dtsi
>>>>> +++ b/arch/arm64/boot/dts/arm/foundation-v8-gicv2.dtsi
>>>>> @@ -6,7 +6,7 @@
>>>>>
>>>>> / {
>>>>> gic: interrupt-controller@2c001000 {
>>>>> - compatible = "arm,cortex-a15-gic", "arm,cortex-a9-gic";
>>>>> + compatible = "arm,cortex-a15-gic";
>>>>> #interrupt-cells = <3>;
>>>>> #address-cells = <2>;
>>>>> interrupt-controller;
>>>>> diff --git a/arch/arm64/boot/dts/arm/juno-base.dtsi
>>>>> b/arch/arm64/boot/dts/arm/juno-base.dtsi
>>>>> index 3feefd61eb76..62392ab1f880 100644
>>>>> --- a/arch/arm64/boot/dts/arm/juno-base.dtsi
>>>>> +++ b/arch/arm64/boot/dts/arm/juno-base.dtsi
>>>>> @@ -69,7 +69,7 @@
>>>>> };
>>>>>
>>>>> gic: interrupt-controller@2c010000 {
>>>>> - compatible = "arm,gic-400", "arm,cortex-a15-gic";
>>>>> + compatible = "arm,cortex-a15-gic";
>>>>
>>>> Why? GIC-400 is definitely the most correct compatible string. I'd
>>>> rather see this compatible being generalised to the models rather
>>>> than
>>>> only referencing the A15 GIC.
>>>
>>> I agree that gic-400 is the far better name, but it was only
>>> introduced
>>> in v3.16. So omitting arm,cortex-a15-gic would break any kernels
>>> before
>>> that, which I would like to avoid.
>>
>> I am not talking about dropping the A15 GIC. I'm saying that both
>> should
>> stay. Is there anything in the DT binding that forbids multiple names
>> in
>> the compatible property?
>
> Well, the current form of the YAML bindings require every combination
> of
> compatible strings to be listed, either explicitly, or using an list of
> allowed strings for each position. This combination here is not listed
> at the moment.
I think this should be relaxed. What the tool should be warning against
is a set of incompatible "compatible" strings (like a15 + a9, which is
totally bonkers).
>>> It's actually a pity that we are so picky about the compatible
>>> listings,
>>> because the existing combination is actually quite nice: we get
>>> compatibility with older DT consumers, but still can say what it
>>> actually is.
>>> I wonder if I should introduce this combination to the GIC DT binding
>>> instead, it seems like there are other users in the tree as well.
>>>
>>> What do you think?
>>
>> I'd say that if the binding forbids multiple compatible strings, the
>> binding is likely to be wrong. We should fix it, and not make the DTs
>> worse as a result of a binding issue.
>
> OK, thanks for the confirmation, and I agree. I will ditch this patch
> and replace it with a respective bindings fix.
Please keep removal of the A9 GIC reference though, because it doesn't
make any sense as it is.
Thanks,
M.
--
Jazz is not dead. It just smells funny...
^ permalink raw reply [flat|nested] 69+ messages in thread* Re: [PATCH 07/16] arm64: dts: arm: Fix GIC compatible names
@ 2020-05-06 10:11 ` Marc Zyngier
0 siblings, 0 replies; 69+ messages in thread
From: Marc Zyngier @ 2020-05-06 10:11 UTC (permalink / raw)
To: André Przywara
Cc: Mark Rutland, Rob Herring, Lorenzo Pieralisi, devicetree,
Liviu Dudau, Sudeep Holla, linux-arm-kernel
On 2020-05-06 11:00, André Przywara wrote:
> On 06/05/2020 10:16, Marc Zyngier wrote:
>> On 2020-05-06 09:45, André Przywara wrote:
>>> On 05/05/2020 19:25, Marc Zyngier wrote:
>>>> On Tue, 05 May 2020 17:52:03 +0100,
>>>> Andre Przywara <andre.przywara@arm.com> wrote:
>>>>>
>>>>> The GIC DT binding only allows a certain combination of DT
>>>>> compatible
>>>>> strings, mostly just consisting of one name.
>>>>>
>>>>> Drop the combination of multiple names and go with the
>>>>> "arm,cortex-a15-gic" name for GICv2, as this seems to be the most
>>>>> widely
>>>>> accepted string. "arm,gic-400" would be more correct, but was
>>>>> introduced
>>>>> much later into the kernel's GIC driver.
>>>>>
>>>>> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
>>>>> ---
>>>>> arch/arm64/boot/dts/arm/foundation-v8-gicv2.dtsi | 2 +-
>>>>> arch/arm64/boot/dts/arm/juno-base.dtsi | 2 +-
>>>>> arch/arm64/boot/dts/arm/rtsm_ve-aemv8a.dts | 2 +-
>>>>> 3 files changed, 3 insertions(+), 3 deletions(-)
>>>>>
>>>>> diff --git a/arch/arm64/boot/dts/arm/foundation-v8-gicv2.dtsi
>>>>> b/arch/arm64/boot/dts/arm/foundation-v8-gicv2.dtsi
>>>>> index 15fe81738e94..61a1750fcdd6 100644
>>>>> --- a/arch/arm64/boot/dts/arm/foundation-v8-gicv2.dtsi
>>>>> +++ b/arch/arm64/boot/dts/arm/foundation-v8-gicv2.dtsi
>>>>> @@ -6,7 +6,7 @@
>>>>>
>>>>> / {
>>>>> gic: interrupt-controller@2c001000 {
>>>>> - compatible = "arm,cortex-a15-gic", "arm,cortex-a9-gic";
>>>>> + compatible = "arm,cortex-a15-gic";
>>>>> #interrupt-cells = <3>;
>>>>> #address-cells = <2>;
>>>>> interrupt-controller;
>>>>> diff --git a/arch/arm64/boot/dts/arm/juno-base.dtsi
>>>>> b/arch/arm64/boot/dts/arm/juno-base.dtsi
>>>>> index 3feefd61eb76..62392ab1f880 100644
>>>>> --- a/arch/arm64/boot/dts/arm/juno-base.dtsi
>>>>> +++ b/arch/arm64/boot/dts/arm/juno-base.dtsi
>>>>> @@ -69,7 +69,7 @@
>>>>> };
>>>>>
>>>>> gic: interrupt-controller@2c010000 {
>>>>> - compatible = "arm,gic-400", "arm,cortex-a15-gic";
>>>>> + compatible = "arm,cortex-a15-gic";
>>>>
>>>> Why? GIC-400 is definitely the most correct compatible string. I'd
>>>> rather see this compatible being generalised to the models rather
>>>> than
>>>> only referencing the A15 GIC.
>>>
>>> I agree that gic-400 is the far better name, but it was only
>>> introduced
>>> in v3.16. So omitting arm,cortex-a15-gic would break any kernels
>>> before
>>> that, which I would like to avoid.
>>
>> I am not talking about dropping the A15 GIC. I'm saying that both
>> should
>> stay. Is there anything in the DT binding that forbids multiple names
>> in
>> the compatible property?
>
> Well, the current form of the YAML bindings require every combination
> of
> compatible strings to be listed, either explicitly, or using an list of
> allowed strings for each position. This combination here is not listed
> at the moment.
I think this should be relaxed. What the tool should be warning against
is a set of incompatible "compatible" strings (like a15 + a9, which is
totally bonkers).
>>> It's actually a pity that we are so picky about the compatible
>>> listings,
>>> because the existing combination is actually quite nice: we get
>>> compatibility with older DT consumers, but still can say what it
>>> actually is.
>>> I wonder if I should introduce this combination to the GIC DT binding
>>> instead, it seems like there are other users in the tree as well.
>>>
>>> What do you think?
>>
>> I'd say that if the binding forbids multiple compatible strings, the
>> binding is likely to be wrong. We should fix it, and not make the DTs
>> worse as a result of a binding issue.
>
> OK, thanks for the confirmation, and I agree. I will ditch this patch
> and replace it with a respective bindings fix.
Please keep removal of the A9 GIC reference though, because it doesn't
make any sense as it is.
Thanks,
M.
--
Jazz is not dead. It just smells funny...
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 69+ messages in thread
* [PATCH 08/16] arm64: dts: arm: Fix GIC child nodes
2020-05-05 16:51 ` Andre Przywara
@ 2020-05-05 16:52 ` Andre Przywara
-1 siblings, 0 replies; 69+ messages in thread
From: Andre Przywara @ 2020-05-05 16:52 UTC (permalink / raw)
To: Rob Herring, Liviu Dudau, Sudeep Holla, Lorenzo Pieralisi
Cc: devicetree, linux-arm-kernel, Mark Rutland, Marc Zyngier
The GIC DT nodes for the Arm Ltd. boards were not fully compliant with
the DT binding, which has certain expectations about child nodes and
their size and address cells values.
Use smaller #address-cells and #size-cells values, as the binding
requests, and adjust the reg properties accordingly.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
---
arch/arm64/boot/dts/arm/foundation-v8-gicv2.dtsi | 2 +-
arch/arm64/boot/dts/arm/juno-base.dtsi | 14 +++++++-------
2 files changed, 8 insertions(+), 8 deletions(-)
diff --git a/arch/arm64/boot/dts/arm/foundation-v8-gicv2.dtsi b/arch/arm64/boot/dts/arm/foundation-v8-gicv2.dtsi
index 61a1750fcdd6..c8ebffca12a7 100644
--- a/arch/arm64/boot/dts/arm/foundation-v8-gicv2.dtsi
+++ b/arch/arm64/boot/dts/arm/foundation-v8-gicv2.dtsi
@@ -8,7 +8,7 @@
gic: interrupt-controller@2c001000 {
compatible = "arm,cortex-a15-gic";
#interrupt-cells = <3>;
- #address-cells = <2>;
+ #address-cells = <0>;
interrupt-controller;
reg = <0x0 0x2c001000 0 0x1000>,
<0x0 0x2c002000 0 0x2000>,
diff --git a/arch/arm64/boot/dts/arm/juno-base.dtsi b/arch/arm64/boot/dts/arm/juno-base.dtsi
index 62392ab1f880..65b6176f76a5 100644
--- a/arch/arm64/boot/dts/arm/juno-base.dtsi
+++ b/arch/arm64/boot/dts/arm/juno-base.dtsi
@@ -74,35 +74,35 @@
<0x0 0x2c02f000 0 0x2000>,
<0x0 0x2c04f000 0 0x2000>,
<0x0 0x2c06f000 0 0x2000>;
- #address-cells = <2>;
+ #address-cells = <1>;
#interrupt-cells = <3>;
- #size-cells = <2>;
+ #size-cells = <1>;
interrupt-controller;
interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_HIGH)>;
- ranges = <0 0 0 0x2c1c0000 0 0x40000>;
+ ranges = <0 0 0x2c1c0000 0x40000>;
v2m_0: v2m@0 {
compatible = "arm,gic-v2m-frame";
msi-controller;
- reg = <0 0 0 0x10000>;
+ reg = <0 0x10000>;
};
v2m@10000 {
compatible = "arm,gic-v2m-frame";
msi-controller;
- reg = <0 0x10000 0 0x10000>;
+ reg = <0x10000 0x10000>;
};
v2m@20000 {
compatible = "arm,gic-v2m-frame";
msi-controller;
- reg = <0 0x20000 0 0x10000>;
+ reg = <0x20000 0x10000>;
};
v2m@30000 {
compatible = "arm,gic-v2m-frame";
msi-controller;
- reg = <0 0x30000 0 0x10000>;
+ reg = <0x30000 0x10000>;
};
};
--
2.17.1
^ permalink raw reply related [flat|nested] 69+ messages in thread* [PATCH 08/16] arm64: dts: arm: Fix GIC child nodes
@ 2020-05-05 16:52 ` Andre Przywara
0 siblings, 0 replies; 69+ messages in thread
From: Andre Przywara @ 2020-05-05 16:52 UTC (permalink / raw)
To: Rob Herring, Liviu Dudau, Sudeep Holla, Lorenzo Pieralisi
Cc: Mark Rutland, devicetree, linux-arm-kernel, Marc Zyngier
The GIC DT nodes for the Arm Ltd. boards were not fully compliant with
the DT binding, which has certain expectations about child nodes and
their size and address cells values.
Use smaller #address-cells and #size-cells values, as the binding
requests, and adjust the reg properties accordingly.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
---
arch/arm64/boot/dts/arm/foundation-v8-gicv2.dtsi | 2 +-
arch/arm64/boot/dts/arm/juno-base.dtsi | 14 +++++++-------
2 files changed, 8 insertions(+), 8 deletions(-)
diff --git a/arch/arm64/boot/dts/arm/foundation-v8-gicv2.dtsi b/arch/arm64/boot/dts/arm/foundation-v8-gicv2.dtsi
index 61a1750fcdd6..c8ebffca12a7 100644
--- a/arch/arm64/boot/dts/arm/foundation-v8-gicv2.dtsi
+++ b/arch/arm64/boot/dts/arm/foundation-v8-gicv2.dtsi
@@ -8,7 +8,7 @@
gic: interrupt-controller@2c001000 {
compatible = "arm,cortex-a15-gic";
#interrupt-cells = <3>;
- #address-cells = <2>;
+ #address-cells = <0>;
interrupt-controller;
reg = <0x0 0x2c001000 0 0x1000>,
<0x0 0x2c002000 0 0x2000>,
diff --git a/arch/arm64/boot/dts/arm/juno-base.dtsi b/arch/arm64/boot/dts/arm/juno-base.dtsi
index 62392ab1f880..65b6176f76a5 100644
--- a/arch/arm64/boot/dts/arm/juno-base.dtsi
+++ b/arch/arm64/boot/dts/arm/juno-base.dtsi
@@ -74,35 +74,35 @@
<0x0 0x2c02f000 0 0x2000>,
<0x0 0x2c04f000 0 0x2000>,
<0x0 0x2c06f000 0 0x2000>;
- #address-cells = <2>;
+ #address-cells = <1>;
#interrupt-cells = <3>;
- #size-cells = <2>;
+ #size-cells = <1>;
interrupt-controller;
interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_HIGH)>;
- ranges = <0 0 0 0x2c1c0000 0 0x40000>;
+ ranges = <0 0 0x2c1c0000 0x40000>;
v2m_0: v2m@0 {
compatible = "arm,gic-v2m-frame";
msi-controller;
- reg = <0 0 0 0x10000>;
+ reg = <0 0x10000>;
};
v2m@10000 {
compatible = "arm,gic-v2m-frame";
msi-controller;
- reg = <0 0x10000 0 0x10000>;
+ reg = <0x10000 0x10000>;
};
v2m@20000 {
compatible = "arm,gic-v2m-frame";
msi-controller;
- reg = <0 0x20000 0 0x10000>;
+ reg = <0x20000 0x10000>;
};
v2m@30000 {
compatible = "arm,gic-v2m-frame";
msi-controller;
- reg = <0 0x30000 0 0x10000>;
+ reg = <0x30000 0x10000>;
};
};
--
2.17.1
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply related [flat|nested] 69+ messages in thread
* [PATCH 09/16] arm64: dts: arm: Fix ITS node names and #msi-cells
2020-05-05 16:51 ` Andre Przywara
@ 2020-05-05 16:52 ` Andre Przywara
-1 siblings, 0 replies; 69+ messages in thread
From: Andre Przywara @ 2020-05-05 16:52 UTC (permalink / raw)
To: Rob Herring, Liviu Dudau, Sudeep Holla, Lorenzo Pieralisi
Cc: devicetree, linux-arm-kernel, Mark Rutland, Marc Zyngier
The GIC ITS nodes in the fastmodel DTS files were not fully binding
compliant.
Use one of the allowed node names, also add the required #msi-cells
property for the older model.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
---
arch/arm64/boot/dts/arm/foundation-v8-gicv3.dtsi | 3 ++-
arch/arm64/boot/dts/arm/fvp-base-revc.dts | 2 +-
2 files changed, 3 insertions(+), 2 deletions(-)
diff --git a/arch/arm64/boot/dts/arm/foundation-v8-gicv3.dtsi b/arch/arm64/boot/dts/arm/foundation-v8-gicv3.dtsi
index f2c75c756039..c668162ee3bf 100644
--- a/arch/arm64/boot/dts/arm/foundation-v8-gicv3.dtsi
+++ b/arch/arm64/boot/dts/arm/foundation-v8-gicv3.dtsi
@@ -19,9 +19,10 @@
<0x0 0x2c02f000 0x0 0x2000>;
interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH>;
- its: its@2f020000 {
+ its: msi-controller@2f020000 {
compatible = "arm,gic-v3-its";
msi-controller;
+ #msi-cells = <1>;
reg = <0x0 0x2f020000 0x0 0x20000>;
};
};
diff --git a/arch/arm64/boot/dts/arm/fvp-base-revc.dts b/arch/arm64/boot/dts/arm/fvp-base-revc.dts
index 66381d89c1ce..0cf96ceff431 100644
--- a/arch/arm64/boot/dts/arm/fvp-base-revc.dts
+++ b/arch/arm64/boot/dts/arm/fvp-base-revc.dts
@@ -126,7 +126,7 @@
<0x0 0x2c02f000 0 0x2000>; // GICV
interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH>;
- its: its@2f020000 {
+ its: msi-controller@2f020000 {
#msi-cells = <1>;
compatible = "arm,gic-v3-its";
reg = <0x0 0x2f020000 0x0 0x20000>; // GITS
--
2.17.1
^ permalink raw reply related [flat|nested] 69+ messages in thread* [PATCH 09/16] arm64: dts: arm: Fix ITS node names and #msi-cells
@ 2020-05-05 16:52 ` Andre Przywara
0 siblings, 0 replies; 69+ messages in thread
From: Andre Przywara @ 2020-05-05 16:52 UTC (permalink / raw)
To: Rob Herring, Liviu Dudau, Sudeep Holla, Lorenzo Pieralisi
Cc: Mark Rutland, devicetree, linux-arm-kernel, Marc Zyngier
The GIC ITS nodes in the fastmodel DTS files were not fully binding
compliant.
Use one of the allowed node names, also add the required #msi-cells
property for the older model.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
---
arch/arm64/boot/dts/arm/foundation-v8-gicv3.dtsi | 3 ++-
arch/arm64/boot/dts/arm/fvp-base-revc.dts | 2 +-
2 files changed, 3 insertions(+), 2 deletions(-)
diff --git a/arch/arm64/boot/dts/arm/foundation-v8-gicv3.dtsi b/arch/arm64/boot/dts/arm/foundation-v8-gicv3.dtsi
index f2c75c756039..c668162ee3bf 100644
--- a/arch/arm64/boot/dts/arm/foundation-v8-gicv3.dtsi
+++ b/arch/arm64/boot/dts/arm/foundation-v8-gicv3.dtsi
@@ -19,9 +19,10 @@
<0x0 0x2c02f000 0x0 0x2000>;
interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH>;
- its: its@2f020000 {
+ its: msi-controller@2f020000 {
compatible = "arm,gic-v3-its";
msi-controller;
+ #msi-cells = <1>;
reg = <0x0 0x2f020000 0x0 0x20000>;
};
};
diff --git a/arch/arm64/boot/dts/arm/fvp-base-revc.dts b/arch/arm64/boot/dts/arm/fvp-base-revc.dts
index 66381d89c1ce..0cf96ceff431 100644
--- a/arch/arm64/boot/dts/arm/fvp-base-revc.dts
+++ b/arch/arm64/boot/dts/arm/fvp-base-revc.dts
@@ -126,7 +126,7 @@
<0x0 0x2c02f000 0 0x2000>; // GICV
interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH>;
- its: its@2f020000 {
+ its: msi-controller@2f020000 {
#msi-cells = <1>;
compatible = "arm,gic-v3-its";
reg = <0x0 0x2f020000 0x0 0x20000>; // GITS
--
2.17.1
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply related [flat|nested] 69+ messages in thread
* [PATCH 10/16] arm64: dts: juno: usb: Use proper DT node name
2020-05-05 16:51 ` Andre Przywara
@ 2020-05-05 16:52 ` Andre Przywara
-1 siblings, 0 replies; 69+ messages in thread
From: Andre Przywara @ 2020-05-05 16:52 UTC (permalink / raw)
To: Rob Herring, Liviu Dudau, Sudeep Holla, Lorenzo Pieralisi
Cc: devicetree, linux-arm-kernel, Mark Rutland
The EHCI/OCHI DT binding requires to use "usb" as the node name stub.
Replace the existing name with "usb" to comply with the binding.
---
arch/arm64/boot/dts/arm/juno-base.dtsi | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/arm64/boot/dts/arm/juno-base.dtsi b/arch/arm64/boot/dts/arm/juno-base.dtsi
index 65b6176f76a5..1374e72951c0 100644
--- a/arch/arm64/boot/dts/arm/juno-base.dtsi
+++ b/arch/arm64/boot/dts/arm/juno-base.dtsi
@@ -768,7 +768,7 @@
};
};
- ohci@7ffb0000 {
+ usb@7ffb0000 {
compatible = "generic-ohci";
reg = <0x0 0x7ffb0000 0x0 0x10000>;
interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>;
@@ -776,7 +776,7 @@
clocks = <&soc_usb48mhz>;
};
- ehci@7ffc0000 {
+ usb@7ffc0000 {
compatible = "generic-ehci";
reg = <0x0 0x7ffc0000 0x0 0x10000>;
interrupts = <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>;
--
2.17.1
^ permalink raw reply related [flat|nested] 69+ messages in thread* [PATCH 10/16] arm64: dts: juno: usb: Use proper DT node name
@ 2020-05-05 16:52 ` Andre Przywara
0 siblings, 0 replies; 69+ messages in thread
From: Andre Przywara @ 2020-05-05 16:52 UTC (permalink / raw)
To: Rob Herring, Liviu Dudau, Sudeep Holla, Lorenzo Pieralisi
Cc: Mark Rutland, devicetree, linux-arm-kernel
The EHCI/OCHI DT binding requires to use "usb" as the node name stub.
Replace the existing name with "usb" to comply with the binding.
---
arch/arm64/boot/dts/arm/juno-base.dtsi | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/arm64/boot/dts/arm/juno-base.dtsi b/arch/arm64/boot/dts/arm/juno-base.dtsi
index 65b6176f76a5..1374e72951c0 100644
--- a/arch/arm64/boot/dts/arm/juno-base.dtsi
+++ b/arch/arm64/boot/dts/arm/juno-base.dtsi
@@ -768,7 +768,7 @@
};
};
- ohci@7ffb0000 {
+ usb@7ffb0000 {
compatible = "generic-ohci";
reg = <0x0 0x7ffb0000 0x0 0x10000>;
interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>;
@@ -776,7 +776,7 @@
clocks = <&soc_usb48mhz>;
};
- ehci@7ffc0000 {
+ usb@7ffc0000 {
compatible = "generic-ehci";
reg = <0x0 0x7ffc0000 0x0 0x10000>;
interrupts = <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>;
--
2.17.1
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply related [flat|nested] 69+ messages in thread
* [PATCH 11/16] arm64: dts: arm: Fix serial node names
2020-05-05 16:51 ` Andre Przywara
@ 2020-05-05 16:52 ` Andre Przywara
-1 siblings, 0 replies; 69+ messages in thread
From: Andre Przywara @ 2020-05-05 16:52 UTC (permalink / raw)
To: Rob Herring, Liviu Dudau, Sudeep Holla, Lorenzo Pieralisi
Cc: devicetree, linux-arm-kernel, Mark Rutland
The UARTs for all Arm Ltd. boards were using "uart" as their node name
stub.
Replace that with the required "serial" string, to comply with the PL011
DT binding.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
---
arch/arm/boot/dts/vexpress-v2m-rs1.dtsi | 8 ++++----
arch/arm64/boot/dts/arm/foundation-v8.dtsi | 8 ++++----
arch/arm64/boot/dts/arm/juno-base.dtsi | 2 +-
arch/arm64/boot/dts/arm/rtsm_ve-motherboard.dtsi | 8 ++++----
4 files changed, 13 insertions(+), 13 deletions(-)
diff --git a/arch/arm/boot/dts/vexpress-v2m-rs1.dtsi b/arch/arm/boot/dts/vexpress-v2m-rs1.dtsi
index 8010cdcdb37a..675a51e12eb1 100644
--- a/arch/arm/boot/dts/vexpress-v2m-rs1.dtsi
+++ b/arch/arm/boot/dts/vexpress-v2m-rs1.dtsi
@@ -162,7 +162,7 @@
clock-names = "KMIREFCLK", "apb_pclk";
};
- v2m_serial0: uart@90000 {
+ v2m_serial0: serial@90000 {
compatible = "arm,pl011", "arm,primecell";
reg = <0x090000 0x1000>;
interrupts = <5>;
@@ -170,7 +170,7 @@
clock-names = "uartclk", "apb_pclk";
};
- v2m_serial1: uart@a0000 {
+ v2m_serial1: serial@a0000 {
compatible = "arm,pl011", "arm,primecell";
reg = <0x0a0000 0x1000>;
interrupts = <6>;
@@ -178,7 +178,7 @@
clock-names = "uartclk", "apb_pclk";
};
- v2m_serial2: uart@b0000 {
+ v2m_serial2: serial@b0000 {
compatible = "arm,pl011", "arm,primecell";
reg = <0x0b0000 0x1000>;
interrupts = <7>;
@@ -186,7 +186,7 @@
clock-names = "uartclk", "apb_pclk";
};
- v2m_serial3: uart@c0000 {
+ v2m_serial3: serial@c0000 {
compatible = "arm,pl011", "arm,primecell";
reg = <0x0c0000 0x1000>;
interrupts = <8>;
diff --git a/arch/arm64/boot/dts/arm/foundation-v8.dtsi b/arch/arm64/boot/dts/arm/foundation-v8.dtsi
index e26b492795c5..d1918253ab39 100644
--- a/arch/arm64/boot/dts/arm/foundation-v8.dtsi
+++ b/arch/arm64/boot/dts/arm/foundation-v8.dtsi
@@ -189,7 +189,7 @@
reg = <0x010000 0x1000>;
};
- v2m_serial0: uart@90000 {
+ v2m_serial0: serial@90000 {
compatible = "arm,pl011", "arm,primecell";
reg = <0x090000 0x1000>;
interrupts = <5>;
@@ -197,7 +197,7 @@
clock-names = "uartclk", "apb_pclk";
};
- v2m_serial1: uart@a0000 {
+ v2m_serial1: serial@a0000 {
compatible = "arm,pl011", "arm,primecell";
reg = <0x0a0000 0x1000>;
interrupts = <6>;
@@ -205,7 +205,7 @@
clock-names = "uartclk", "apb_pclk";
};
- v2m_serial2: uart@b0000 {
+ v2m_serial2: serial@b0000 {
compatible = "arm,pl011", "arm,primecell";
reg = <0x0b0000 0x1000>;
interrupts = <7>;
@@ -213,7 +213,7 @@
clock-names = "uartclk", "apb_pclk";
};
- v2m_serial3: uart@c0000 {
+ v2m_serial3: serial@c0000 {
compatible = "arm,pl011", "arm,primecell";
reg = <0x0c0000 0x1000>;
interrupts = <8>;
diff --git a/arch/arm64/boot/dts/arm/juno-base.dtsi b/arch/arm64/boot/dts/arm/juno-base.dtsi
index 1374e72951c0..4381e73bc5c8 100644
--- a/arch/arm64/boot/dts/arm/juno-base.dtsi
+++ b/arch/arm64/boot/dts/arm/juno-base.dtsi
@@ -729,7 +729,7 @@
};
};
- soc_uart0: uart@7ff80000 {
+ soc_uart0: serial@7ff80000 {
compatible = "arm,pl011", "arm,primecell";
reg = <0x0 0x7ff80000 0x0 0x1000>;
interrupts = <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>;
diff --git a/arch/arm64/boot/dts/arm/rtsm_ve-motherboard.dtsi b/arch/arm64/boot/dts/arm/rtsm_ve-motherboard.dtsi
index f61e313ab1a4..b81651b1890a 100644
--- a/arch/arm64/boot/dts/arm/rtsm_ve-motherboard.dtsi
+++ b/arch/arm64/boot/dts/arm/rtsm_ve-motherboard.dtsi
@@ -158,7 +158,7 @@
clock-names = "KMIREFCLK", "apb_pclk";
};
- v2m_serial0: uart@90000 {
+ v2m_serial0: serial@90000 {
compatible = "arm,pl011", "arm,primecell";
reg = <0x090000 0x1000>;
interrupts = <5>;
@@ -166,7 +166,7 @@
clock-names = "uartclk", "apb_pclk";
};
- v2m_serial1: uart@a0000 {
+ v2m_serial1: serial@a0000 {
compatible = "arm,pl011", "arm,primecell";
reg = <0x0a0000 0x1000>;
interrupts = <6>;
@@ -174,7 +174,7 @@
clock-names = "uartclk", "apb_pclk";
};
- v2m_serial2: uart@b0000 {
+ v2m_serial2: serial@b0000 {
compatible = "arm,pl011", "arm,primecell";
reg = <0x0b0000 0x1000>;
interrupts = <7>;
@@ -182,7 +182,7 @@
clock-names = "uartclk", "apb_pclk";
};
- v2m_serial3: uart@c0000 {
+ v2m_serial3: serial@c0000 {
compatible = "arm,pl011", "arm,primecell";
reg = <0x0c0000 0x1000>;
interrupts = <8>;
--
2.17.1
^ permalink raw reply related [flat|nested] 69+ messages in thread* [PATCH 11/16] arm64: dts: arm: Fix serial node names
@ 2020-05-05 16:52 ` Andre Przywara
0 siblings, 0 replies; 69+ messages in thread
From: Andre Przywara @ 2020-05-05 16:52 UTC (permalink / raw)
To: Rob Herring, Liviu Dudau, Sudeep Holla, Lorenzo Pieralisi
Cc: Mark Rutland, devicetree, linux-arm-kernel
The UARTs for all Arm Ltd. boards were using "uart" as their node name
stub.
Replace that with the required "serial" string, to comply with the PL011
DT binding.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
---
arch/arm/boot/dts/vexpress-v2m-rs1.dtsi | 8 ++++----
arch/arm64/boot/dts/arm/foundation-v8.dtsi | 8 ++++----
arch/arm64/boot/dts/arm/juno-base.dtsi | 2 +-
arch/arm64/boot/dts/arm/rtsm_ve-motherboard.dtsi | 8 ++++----
4 files changed, 13 insertions(+), 13 deletions(-)
diff --git a/arch/arm/boot/dts/vexpress-v2m-rs1.dtsi b/arch/arm/boot/dts/vexpress-v2m-rs1.dtsi
index 8010cdcdb37a..675a51e12eb1 100644
--- a/arch/arm/boot/dts/vexpress-v2m-rs1.dtsi
+++ b/arch/arm/boot/dts/vexpress-v2m-rs1.dtsi
@@ -162,7 +162,7 @@
clock-names = "KMIREFCLK", "apb_pclk";
};
- v2m_serial0: uart@90000 {
+ v2m_serial0: serial@90000 {
compatible = "arm,pl011", "arm,primecell";
reg = <0x090000 0x1000>;
interrupts = <5>;
@@ -170,7 +170,7 @@
clock-names = "uartclk", "apb_pclk";
};
- v2m_serial1: uart@a0000 {
+ v2m_serial1: serial@a0000 {
compatible = "arm,pl011", "arm,primecell";
reg = <0x0a0000 0x1000>;
interrupts = <6>;
@@ -178,7 +178,7 @@
clock-names = "uartclk", "apb_pclk";
};
- v2m_serial2: uart@b0000 {
+ v2m_serial2: serial@b0000 {
compatible = "arm,pl011", "arm,primecell";
reg = <0x0b0000 0x1000>;
interrupts = <7>;
@@ -186,7 +186,7 @@
clock-names = "uartclk", "apb_pclk";
};
- v2m_serial3: uart@c0000 {
+ v2m_serial3: serial@c0000 {
compatible = "arm,pl011", "arm,primecell";
reg = <0x0c0000 0x1000>;
interrupts = <8>;
diff --git a/arch/arm64/boot/dts/arm/foundation-v8.dtsi b/arch/arm64/boot/dts/arm/foundation-v8.dtsi
index e26b492795c5..d1918253ab39 100644
--- a/arch/arm64/boot/dts/arm/foundation-v8.dtsi
+++ b/arch/arm64/boot/dts/arm/foundation-v8.dtsi
@@ -189,7 +189,7 @@
reg = <0x010000 0x1000>;
};
- v2m_serial0: uart@90000 {
+ v2m_serial0: serial@90000 {
compatible = "arm,pl011", "arm,primecell";
reg = <0x090000 0x1000>;
interrupts = <5>;
@@ -197,7 +197,7 @@
clock-names = "uartclk", "apb_pclk";
};
- v2m_serial1: uart@a0000 {
+ v2m_serial1: serial@a0000 {
compatible = "arm,pl011", "arm,primecell";
reg = <0x0a0000 0x1000>;
interrupts = <6>;
@@ -205,7 +205,7 @@
clock-names = "uartclk", "apb_pclk";
};
- v2m_serial2: uart@b0000 {
+ v2m_serial2: serial@b0000 {
compatible = "arm,pl011", "arm,primecell";
reg = <0x0b0000 0x1000>;
interrupts = <7>;
@@ -213,7 +213,7 @@
clock-names = "uartclk", "apb_pclk";
};
- v2m_serial3: uart@c0000 {
+ v2m_serial3: serial@c0000 {
compatible = "arm,pl011", "arm,primecell";
reg = <0x0c0000 0x1000>;
interrupts = <8>;
diff --git a/arch/arm64/boot/dts/arm/juno-base.dtsi b/arch/arm64/boot/dts/arm/juno-base.dtsi
index 1374e72951c0..4381e73bc5c8 100644
--- a/arch/arm64/boot/dts/arm/juno-base.dtsi
+++ b/arch/arm64/boot/dts/arm/juno-base.dtsi
@@ -729,7 +729,7 @@
};
};
- soc_uart0: uart@7ff80000 {
+ soc_uart0: serial@7ff80000 {
compatible = "arm,pl011", "arm,primecell";
reg = <0x0 0x7ff80000 0x0 0x1000>;
interrupts = <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>;
diff --git a/arch/arm64/boot/dts/arm/rtsm_ve-motherboard.dtsi b/arch/arm64/boot/dts/arm/rtsm_ve-motherboard.dtsi
index f61e313ab1a4..b81651b1890a 100644
--- a/arch/arm64/boot/dts/arm/rtsm_ve-motherboard.dtsi
+++ b/arch/arm64/boot/dts/arm/rtsm_ve-motherboard.dtsi
@@ -158,7 +158,7 @@
clock-names = "KMIREFCLK", "apb_pclk";
};
- v2m_serial0: uart@90000 {
+ v2m_serial0: serial@90000 {
compatible = "arm,pl011", "arm,primecell";
reg = <0x090000 0x1000>;
interrupts = <5>;
@@ -166,7 +166,7 @@
clock-names = "uartclk", "apb_pclk";
};
- v2m_serial1: uart@a0000 {
+ v2m_serial1: serial@a0000 {
compatible = "arm,pl011", "arm,primecell";
reg = <0x0a0000 0x1000>;
interrupts = <6>;
@@ -174,7 +174,7 @@
clock-names = "uartclk", "apb_pclk";
};
- v2m_serial2: uart@b0000 {
+ v2m_serial2: serial@b0000 {
compatible = "arm,pl011", "arm,primecell";
reg = <0x0b0000 0x1000>;
interrupts = <7>;
@@ -182,7 +182,7 @@
clock-names = "uartclk", "apb_pclk";
};
- v2m_serial3: uart@c0000 {
+ v2m_serial3: serial@c0000 {
compatible = "arm,pl011", "arm,primecell";
reg = <0x0c0000 0x1000>;
interrupts = <8>;
--
2.17.1
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply related [flat|nested] 69+ messages in thread
* [PATCH 12/16] arm64: dts: fvp: Fix SMMU DT node
2020-05-05 16:51 ` Andre Przywara
@ 2020-05-05 16:52 ` Andre Przywara
-1 siblings, 0 replies; 69+ messages in thread
From: Andre Przywara @ 2020-05-05 16:52 UTC (permalink / raw)
To: Rob Herring, Liviu Dudau, Sudeep Holla, Lorenzo Pieralisi
Cc: devicetree, linux-arm-kernel, Mark Rutland
The SMMU name in the RevC FVP DT file was not fully binding compliant.
Adjust the node name to match the binding's list of allowed names, also
shuffle the order of the interrupts to comply with the expected order.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
---
arch/arm64/boot/dts/arm/fvp-base-revc.dts | 8 ++++----
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/arch/arm64/boot/dts/arm/fvp-base-revc.dts b/arch/arm64/boot/dts/arm/fvp-base-revc.dts
index 0cf96ceff431..b8a21092db4d 100644
--- a/arch/arm64/boot/dts/arm/fvp-base-revc.dts
+++ b/arch/arm64/boot/dts/arm/fvp-base-revc.dts
@@ -172,14 +172,14 @@
dma-coherent;
};
- smmu: smmu@2b400000 {
+ smmu: iommu@2b400000 {
compatible = "arm,smmu-v3";
reg = <0x0 0x2b400000 0x0 0x100000>;
interrupts = <GIC_SPI 74 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 79 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 75 IRQ_TYPE_EDGE_RISING>,
- <GIC_SPI 77 IRQ_TYPE_EDGE_RISING>,
- <GIC_SPI 79 IRQ_TYPE_EDGE_RISING>;
- interrupt-names = "eventq", "priq", "cmdq-sync", "gerror";
+ <GIC_SPI 77 IRQ_TYPE_EDGE_RISING>;
+ interrupt-names = "eventq", "gerror", "priq", "cmdq-sync";
dma-coherent;
#iommu-cells = <1>;
msi-parent = <&its 0x10000>;
--
2.17.1
^ permalink raw reply related [flat|nested] 69+ messages in thread* [PATCH 12/16] arm64: dts: fvp: Fix SMMU DT node
@ 2020-05-05 16:52 ` Andre Przywara
0 siblings, 0 replies; 69+ messages in thread
From: Andre Przywara @ 2020-05-05 16:52 UTC (permalink / raw)
To: Rob Herring, Liviu Dudau, Sudeep Holla, Lorenzo Pieralisi
Cc: Mark Rutland, devicetree, linux-arm-kernel
The SMMU name in the RevC FVP DT file was not fully binding compliant.
Adjust the node name to match the binding's list of allowed names, also
shuffle the order of the interrupts to comply with the expected order.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
---
arch/arm64/boot/dts/arm/fvp-base-revc.dts | 8 ++++----
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/arch/arm64/boot/dts/arm/fvp-base-revc.dts b/arch/arm64/boot/dts/arm/fvp-base-revc.dts
index 0cf96ceff431..b8a21092db4d 100644
--- a/arch/arm64/boot/dts/arm/fvp-base-revc.dts
+++ b/arch/arm64/boot/dts/arm/fvp-base-revc.dts
@@ -172,14 +172,14 @@
dma-coherent;
};
- smmu: smmu@2b400000 {
+ smmu: iommu@2b400000 {
compatible = "arm,smmu-v3";
reg = <0x0 0x2b400000 0x0 0x100000>;
interrupts = <GIC_SPI 74 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 79 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 75 IRQ_TYPE_EDGE_RISING>,
- <GIC_SPI 77 IRQ_TYPE_EDGE_RISING>,
- <GIC_SPI 79 IRQ_TYPE_EDGE_RISING>;
- interrupt-names = "eventq", "priq", "cmdq-sync", "gerror";
+ <GIC_SPI 77 IRQ_TYPE_EDGE_RISING>;
+ interrupt-names = "eventq", "gerror", "priq", "cmdq-sync";
dma-coherent;
#iommu-cells = <1>;
msi-parent = <&its 0x10000>;
--
2.17.1
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply related [flat|nested] 69+ messages in thread
* [PATCH 13/16] arm64: dts: arm: Fix bus node names
2020-05-05 16:51 ` Andre Przywara
@ 2020-05-05 16:52 ` Andre Przywara
-1 siblings, 0 replies; 69+ messages in thread
From: Andre Przywara @ 2020-05-05 16:52 UTC (permalink / raw)
To: Rob Herring, Liviu Dudau, Sudeep Holla, Lorenzo Pieralisi
Cc: devicetree, linux-arm-kernel, Mark Rutland
Most Arm Ltd. boards are employing a layered bus structure, to map
the hardware design (SoC, motherboard, IOFPGA) and structure the DTs.
The "simple-bus" nodes only allow a limited set of node names. Switch
to use *-bus to be binding compliant.
This relies on a pending dt-schema.git fix for now:
https://github.com/devicetree-org/dt-schema/pull/38
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
---
arch/arm/boot/dts/vexpress-v2m-rs1.dtsi | 4 ++--
arch/arm64/boot/dts/arm/foundation-v8.dtsi | 2 +-
arch/arm64/boot/dts/arm/juno-base.dtsi | 2 +-
arch/arm64/boot/dts/arm/juno-motherboard.dtsi | 4 ++--
arch/arm64/boot/dts/arm/rtsm_ve-motherboard-rs2.dtsi | 4 ++--
arch/arm64/boot/dts/arm/rtsm_ve-motherboard.dtsi | 4 ++--
6 files changed, 10 insertions(+), 10 deletions(-)
diff --git a/arch/arm/boot/dts/vexpress-v2m-rs1.dtsi b/arch/arm/boot/dts/vexpress-v2m-rs1.dtsi
index 675a51e12eb1..4aaae848f370 100644
--- a/arch/arm/boot/dts/vexpress-v2m-rs1.dtsi
+++ b/arch/arm/boot/dts/vexpress-v2m-rs1.dtsi
@@ -20,7 +20,7 @@
/ {
bus@8000000 {
- motherboard {
+ motherboard-bus {
model = "V2M-P1";
arm,hbi = <0x190>;
arm,vexpress,site = <0>;
@@ -66,7 +66,7 @@
port1-otg;
};
- iofpga@300000000 {
+ iofpga-bus@300000000 {
compatible = "simple-bus";
#address-cells = <1>;
#size-cells = <1>;
diff --git a/arch/arm64/boot/dts/arm/foundation-v8.dtsi b/arch/arm64/boot/dts/arm/foundation-v8.dtsi
index d1918253ab39..23fe81737b1c 100644
--- a/arch/arm64/boot/dts/arm/foundation-v8.dtsi
+++ b/arch/arm64/boot/dts/arm/foundation-v8.dtsi
@@ -178,7 +178,7 @@
clock-output-names = "v2m:refclk32khz";
};
- iofpga@300000000 {
+ iofpga-bus@300000000 {
compatible = "simple-bus";
#address-cells = <1>;
#size-cells = <1>;
diff --git a/arch/arm64/boot/dts/arm/juno-base.dtsi b/arch/arm64/boot/dts/arm/juno-base.dtsi
index 4381e73bc5c8..a1bdaf455a5c 100644
--- a/arch/arm64/boot/dts/arm/juno-base.dtsi
+++ b/arch/arm64/boot/dts/arm/juno-base.dtsi
@@ -828,7 +828,7 @@
<0 0 12 &gic 0 0 GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>;
};
- site2: tlx@60000000 {
+ site2: tlx-bus@60000000 {
compatible = "simple-bus";
#address-cells = <1>;
#size-cells = <1>;
diff --git a/arch/arm64/boot/dts/arm/juno-motherboard.dtsi b/arch/arm64/boot/dts/arm/juno-motherboard.dtsi
index d5cefddde08c..ddda5df28ba0 100644
--- a/arch/arm64/boot/dts/arm/juno-motherboard.dtsi
+++ b/arch/arm64/boot/dts/arm/juno-motherboard.dtsi
@@ -37,7 +37,7 @@
clock-output-names = "juno_mb:refclk32khz";
};
- motherboard {
+ motherboard-bus {
compatible = "arm,vexpress,v2p-p1", "simple-bus";
#address-cells = <2>; /* SMB chipselect number and offset */
#size-cells = <1>;
@@ -133,7 +133,7 @@
vddvario-supply = <&mb_fixed_3v3>;
};
- iofpga@300000000 {
+ iofpga-bus@300000000 {
compatible = "simple-bus";
#address-cells = <1>;
#size-cells = <1>;
diff --git a/arch/arm64/boot/dts/arm/rtsm_ve-motherboard-rs2.dtsi b/arch/arm64/boot/dts/arm/rtsm_ve-motherboard-rs2.dtsi
index 350cbf17e8b4..b917d9d3f1c4 100644
--- a/arch/arm64/boot/dts/arm/rtsm_ve-motherboard-rs2.dtsi
+++ b/arch/arm64/boot/dts/arm/rtsm_ve-motherboard-rs2.dtsi
@@ -6,10 +6,10 @@
*/
/ {
bus@8000000 {
- motherboard {
+ motherboard-bus {
arm,v2m-memory-map = "rs2";
- iofpga@300000000 {
+ iofpga-bus@300000000 {
virtio-p9@140000 {
compatible = "virtio,mmio";
reg = <0x140000 0x200>;
diff --git a/arch/arm64/boot/dts/arm/rtsm_ve-motherboard.dtsi b/arch/arm64/boot/dts/arm/rtsm_ve-motherboard.dtsi
index b81651b1890a..001a0a3c7f66 100644
--- a/arch/arm64/boot/dts/arm/rtsm_ve-motherboard.dtsi
+++ b/arch/arm64/boot/dts/arm/rtsm_ve-motherboard.dtsi
@@ -77,7 +77,7 @@
};
bus@8000000 {
- motherboard {
+ motherboard-bus {
arm,v2m-memory-map = "rs1";
compatible = "arm,vexpress,v2m-p1", "simple-bus";
#address-cells = <2>; /* SMB chipselect number and offset */
@@ -98,7 +98,7 @@
interrupts = <15>;
};
- iofpga@300000000 {
+ iofpga-bus@300000000 {
compatible = "simple-bus";
#address-cells = <1>;
#size-cells = <1>;
--
2.17.1
^ permalink raw reply related [flat|nested] 69+ messages in thread* [PATCH 13/16] arm64: dts: arm: Fix bus node names
@ 2020-05-05 16:52 ` Andre Przywara
0 siblings, 0 replies; 69+ messages in thread
From: Andre Przywara @ 2020-05-05 16:52 UTC (permalink / raw)
To: Rob Herring, Liviu Dudau, Sudeep Holla, Lorenzo Pieralisi
Cc: Mark Rutland, devicetree, linux-arm-kernel
Most Arm Ltd. boards are employing a layered bus structure, to map
the hardware design (SoC, motherboard, IOFPGA) and structure the DTs.
The "simple-bus" nodes only allow a limited set of node names. Switch
to use *-bus to be binding compliant.
This relies on a pending dt-schema.git fix for now:
https://github.com/devicetree-org/dt-schema/pull/38
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
---
arch/arm/boot/dts/vexpress-v2m-rs1.dtsi | 4 ++--
arch/arm64/boot/dts/arm/foundation-v8.dtsi | 2 +-
arch/arm64/boot/dts/arm/juno-base.dtsi | 2 +-
arch/arm64/boot/dts/arm/juno-motherboard.dtsi | 4 ++--
arch/arm64/boot/dts/arm/rtsm_ve-motherboard-rs2.dtsi | 4 ++--
arch/arm64/boot/dts/arm/rtsm_ve-motherboard.dtsi | 4 ++--
6 files changed, 10 insertions(+), 10 deletions(-)
diff --git a/arch/arm/boot/dts/vexpress-v2m-rs1.dtsi b/arch/arm/boot/dts/vexpress-v2m-rs1.dtsi
index 675a51e12eb1..4aaae848f370 100644
--- a/arch/arm/boot/dts/vexpress-v2m-rs1.dtsi
+++ b/arch/arm/boot/dts/vexpress-v2m-rs1.dtsi
@@ -20,7 +20,7 @@
/ {
bus@8000000 {
- motherboard {
+ motherboard-bus {
model = "V2M-P1";
arm,hbi = <0x190>;
arm,vexpress,site = <0>;
@@ -66,7 +66,7 @@
port1-otg;
};
- iofpga@300000000 {
+ iofpga-bus@300000000 {
compatible = "simple-bus";
#address-cells = <1>;
#size-cells = <1>;
diff --git a/arch/arm64/boot/dts/arm/foundation-v8.dtsi b/arch/arm64/boot/dts/arm/foundation-v8.dtsi
index d1918253ab39..23fe81737b1c 100644
--- a/arch/arm64/boot/dts/arm/foundation-v8.dtsi
+++ b/arch/arm64/boot/dts/arm/foundation-v8.dtsi
@@ -178,7 +178,7 @@
clock-output-names = "v2m:refclk32khz";
};
- iofpga@300000000 {
+ iofpga-bus@300000000 {
compatible = "simple-bus";
#address-cells = <1>;
#size-cells = <1>;
diff --git a/arch/arm64/boot/dts/arm/juno-base.dtsi b/arch/arm64/boot/dts/arm/juno-base.dtsi
index 4381e73bc5c8..a1bdaf455a5c 100644
--- a/arch/arm64/boot/dts/arm/juno-base.dtsi
+++ b/arch/arm64/boot/dts/arm/juno-base.dtsi
@@ -828,7 +828,7 @@
<0 0 12 &gic 0 0 GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>;
};
- site2: tlx@60000000 {
+ site2: tlx-bus@60000000 {
compatible = "simple-bus";
#address-cells = <1>;
#size-cells = <1>;
diff --git a/arch/arm64/boot/dts/arm/juno-motherboard.dtsi b/arch/arm64/boot/dts/arm/juno-motherboard.dtsi
index d5cefddde08c..ddda5df28ba0 100644
--- a/arch/arm64/boot/dts/arm/juno-motherboard.dtsi
+++ b/arch/arm64/boot/dts/arm/juno-motherboard.dtsi
@@ -37,7 +37,7 @@
clock-output-names = "juno_mb:refclk32khz";
};
- motherboard {
+ motherboard-bus {
compatible = "arm,vexpress,v2p-p1", "simple-bus";
#address-cells = <2>; /* SMB chipselect number and offset */
#size-cells = <1>;
@@ -133,7 +133,7 @@
vddvario-supply = <&mb_fixed_3v3>;
};
- iofpga@300000000 {
+ iofpga-bus@300000000 {
compatible = "simple-bus";
#address-cells = <1>;
#size-cells = <1>;
diff --git a/arch/arm64/boot/dts/arm/rtsm_ve-motherboard-rs2.dtsi b/arch/arm64/boot/dts/arm/rtsm_ve-motherboard-rs2.dtsi
index 350cbf17e8b4..b917d9d3f1c4 100644
--- a/arch/arm64/boot/dts/arm/rtsm_ve-motherboard-rs2.dtsi
+++ b/arch/arm64/boot/dts/arm/rtsm_ve-motherboard-rs2.dtsi
@@ -6,10 +6,10 @@
*/
/ {
bus@8000000 {
- motherboard {
+ motherboard-bus {
arm,v2m-memory-map = "rs2";
- iofpga@300000000 {
+ iofpga-bus@300000000 {
virtio-p9@140000 {
compatible = "virtio,mmio";
reg = <0x140000 0x200>;
diff --git a/arch/arm64/boot/dts/arm/rtsm_ve-motherboard.dtsi b/arch/arm64/boot/dts/arm/rtsm_ve-motherboard.dtsi
index b81651b1890a..001a0a3c7f66 100644
--- a/arch/arm64/boot/dts/arm/rtsm_ve-motherboard.dtsi
+++ b/arch/arm64/boot/dts/arm/rtsm_ve-motherboard.dtsi
@@ -77,7 +77,7 @@
};
bus@8000000 {
- motherboard {
+ motherboard-bus {
arm,v2m-memory-map = "rs1";
compatible = "arm,vexpress,v2m-p1", "simple-bus";
#address-cells = <2>; /* SMB chipselect number and offset */
@@ -98,7 +98,7 @@
interrupts = <15>;
};
- iofpga@300000000 {
+ iofpga-bus@300000000 {
compatible = "simple-bus";
#address-cells = <1>;
#size-cells = <1>;
--
2.17.1
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply related [flat|nested] 69+ messages in thread
* [PATCH 14/16] arm64: dts: juno: Fix GPU interrupt order
2020-05-05 16:51 ` Andre Przywara
@ 2020-05-05 16:52 ` Andre Przywara
-1 siblings, 0 replies; 69+ messages in thread
From: Andre Przywara @ 2020-05-05 16:52 UTC (permalink / raw)
To: Rob Herring, Liviu Dudau, Sudeep Holla, Lorenzo Pieralisi
Cc: devicetree, linux-arm-kernel, Mark Rutland
The Mali binding insists on the GPU interrupts to be in ordered as: job,
mmu, gpu.
Sort the GPU interrupts and interrupt-names properties accordingly.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
---
arch/arm64/boot/dts/arm/juno-base.dtsi | 8 ++++----
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/arch/arm64/boot/dts/arm/juno-base.dtsi b/arch/arm64/boot/dts/arm/juno-base.dtsi
index a1bdaf455a5c..9a2a8d23fd1e 100644
--- a/arch/arm64/boot/dts/arm/juno-base.dtsi
+++ b/arch/arm64/boot/dts/arm/juno-base.dtsi
@@ -501,10 +501,10 @@
gpu: gpu@2d000000 {
compatible = "arm,juno-mali", "arm,mali-t624";
reg = <0 0x2d000000 0 0x10000>;
- interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
- interrupt-names = "gpu", "job", "mmu";
+ interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "job", "mmu", "gpu";
clocks = <&scpi_dvfs 2>;
power-domains = <&scpi_devpd 1>;
dma-coherent;
--
2.17.1
^ permalink raw reply related [flat|nested] 69+ messages in thread* [PATCH 14/16] arm64: dts: juno: Fix GPU interrupt order
@ 2020-05-05 16:52 ` Andre Przywara
0 siblings, 0 replies; 69+ messages in thread
From: Andre Przywara @ 2020-05-05 16:52 UTC (permalink / raw)
To: Rob Herring, Liviu Dudau, Sudeep Holla, Lorenzo Pieralisi
Cc: Mark Rutland, devicetree, linux-arm-kernel
The Mali binding insists on the GPU interrupts to be in ordered as: job,
mmu, gpu.
Sort the GPU interrupts and interrupt-names properties accordingly.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
---
arch/arm64/boot/dts/arm/juno-base.dtsi | 8 ++++----
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/arch/arm64/boot/dts/arm/juno-base.dtsi b/arch/arm64/boot/dts/arm/juno-base.dtsi
index a1bdaf455a5c..9a2a8d23fd1e 100644
--- a/arch/arm64/boot/dts/arm/juno-base.dtsi
+++ b/arch/arm64/boot/dts/arm/juno-base.dtsi
@@ -501,10 +501,10 @@
gpu: gpu@2d000000 {
compatible = "arm,juno-mali", "arm,mali-t624";
reg = <0 0x2d000000 0 0x10000>;
- interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
- interrupt-names = "gpu", "job", "mmu";
+ interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "job", "mmu", "gpu";
clocks = <&scpi_dvfs 2>;
power-domains = <&scpi_devpd 1>;
dma-coherent;
--
2.17.1
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply related [flat|nested] 69+ messages in thread
* [PATCH 15/16] arm64: dts: arm: Fix VExpress LED names
2020-05-05 16:51 ` Andre Przywara
@ 2020-05-05 16:52 ` Andre Przywara
-1 siblings, 0 replies; 69+ messages in thread
From: Andre Przywara @ 2020-05-05 16:52 UTC (permalink / raw)
To: Rob Herring, Liviu Dudau, Sudeep Holla, Lorenzo Pieralisi
Cc: devicetree, linux-arm-kernel, Mark Rutland
The common LED binding wants the LED node names to start with led- and
then have just a single number.
Changing the naming for the 8 user LEDs from using user<x> to led-<x>.
Also there is no default-trigger named "mmc0" in the kernel, so use the
more generic "disk-activity".
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
---
arch/arm/boot/dts/vexpress-v2m-rs1.dtsi | 18 +++++++++---------
1 file changed, 9 insertions(+), 9 deletions(-)
diff --git a/arch/arm/boot/dts/vexpress-v2m-rs1.dtsi b/arch/arm/boot/dts/vexpress-v2m-rs1.dtsi
index 4aaae848f370..1681e046b855 100644
--- a/arch/arm/boot/dts/vexpress-v2m-rs1.dtsi
+++ b/arch/arm/boot/dts/vexpress-v2m-rs1.dtsi
@@ -315,49 +315,49 @@
leds {
compatible = "gpio-leds";
- user1 {
+ led-1 {
label = "v2m:green:user1";
gpios = <&v2m_led_gpios 0 0>;
linux,default-trigger = "heartbeat";
};
- user2 {
+ led-2 {
label = "v2m:green:user2";
gpios = <&v2m_led_gpios 1 0>;
- linux,default-trigger = "mmc0";
+ linux,default-trigger = "disk-activity";
};
- user3 {
+ led-3 {
label = "v2m:green:user3";
gpios = <&v2m_led_gpios 2 0>;
linux,default-trigger = "cpu0";
};
- user4 {
+ led-4 {
label = "v2m:green:user4";
gpios = <&v2m_led_gpios 3 0>;
linux,default-trigger = "cpu1";
};
- user5 {
+ led-5 {
label = "v2m:green:user5";
gpios = <&v2m_led_gpios 4 0>;
linux,default-trigger = "cpu2";
};
- user6 {
+ led-6 {
label = "v2m:green:user6";
gpios = <&v2m_led_gpios 5 0>;
linux,default-trigger = "cpu3";
};
- user7 {
+ led-7 {
label = "v2m:green:user7";
gpios = <&v2m_led_gpios 6 0>;
linux,default-trigger = "cpu4";
};
- user8 {
+ led-8 {
label = "v2m:green:user8";
gpios = <&v2m_led_gpios 7 0>;
linux,default-trigger = "cpu5";
--
2.17.1
^ permalink raw reply related [flat|nested] 69+ messages in thread* [PATCH 15/16] arm64: dts: arm: Fix VExpress LED names
@ 2020-05-05 16:52 ` Andre Przywara
0 siblings, 0 replies; 69+ messages in thread
From: Andre Przywara @ 2020-05-05 16:52 UTC (permalink / raw)
To: Rob Herring, Liviu Dudau, Sudeep Holla, Lorenzo Pieralisi
Cc: Mark Rutland, devicetree, linux-arm-kernel
The common LED binding wants the LED node names to start with led- and
then have just a single number.
Changing the naming for the 8 user LEDs from using user<x> to led-<x>.
Also there is no default-trigger named "mmc0" in the kernel, so use the
more generic "disk-activity".
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
---
arch/arm/boot/dts/vexpress-v2m-rs1.dtsi | 18 +++++++++---------
1 file changed, 9 insertions(+), 9 deletions(-)
diff --git a/arch/arm/boot/dts/vexpress-v2m-rs1.dtsi b/arch/arm/boot/dts/vexpress-v2m-rs1.dtsi
index 4aaae848f370..1681e046b855 100644
--- a/arch/arm/boot/dts/vexpress-v2m-rs1.dtsi
+++ b/arch/arm/boot/dts/vexpress-v2m-rs1.dtsi
@@ -315,49 +315,49 @@
leds {
compatible = "gpio-leds";
- user1 {
+ led-1 {
label = "v2m:green:user1";
gpios = <&v2m_led_gpios 0 0>;
linux,default-trigger = "heartbeat";
};
- user2 {
+ led-2 {
label = "v2m:green:user2";
gpios = <&v2m_led_gpios 1 0>;
- linux,default-trigger = "mmc0";
+ linux,default-trigger = "disk-activity";
};
- user3 {
+ led-3 {
label = "v2m:green:user3";
gpios = <&v2m_led_gpios 2 0>;
linux,default-trigger = "cpu0";
};
- user4 {
+ led-4 {
label = "v2m:green:user4";
gpios = <&v2m_led_gpios 3 0>;
linux,default-trigger = "cpu1";
};
- user5 {
+ led-5 {
label = "v2m:green:user5";
gpios = <&v2m_led_gpios 4 0>;
linux,default-trigger = "cpu2";
};
- user6 {
+ led-6 {
label = "v2m:green:user6";
gpios = <&v2m_led_gpios 5 0>;
linux,default-trigger = "cpu3";
};
- user7 {
+ led-7 {
label = "v2m:green:user7";
gpios = <&v2m_led_gpios 6 0>;
linux,default-trigger = "cpu4";
};
- user8 {
+ led-8 {
label = "v2m:green:user8";
gpios = <&v2m_led_gpios 7 0>;
linux,default-trigger = "cpu5";
--
2.17.1
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply related [flat|nested] 69+ messages in thread
* [PATCH 16/16] arm64: dts: juno: Fix SCPI shared mem node name
2020-05-05 16:51 ` Andre Przywara
@ 2020-05-05 16:52 ` Andre Przywara
-1 siblings, 0 replies; 69+ messages in thread
From: Andre Przywara @ 2020-05-05 16:52 UTC (permalink / raw)
To: Rob Herring, Liviu Dudau, Sudeep Holla, Lorenzo Pieralisi
Cc: devicetree, linux-arm-kernel, Mark Rutland
The SRAM DT binding requires child nodes to use a certain node name
scheme.
Change the naming from scp-shmem to scp-sram to comply with that.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
---
arch/arm64/boot/dts/arm/juno-base.dtsi | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/arm64/boot/dts/arm/juno-base.dtsi b/arch/arm64/boot/dts/arm/juno-base.dtsi
index 9a2a8d23fd1e..547db919ccc3 100644
--- a/arch/arm64/boot/dts/arm/juno-base.dtsi
+++ b/arch/arm64/boot/dts/arm/juno-base.dtsi
@@ -521,12 +521,12 @@
#size-cells = <1>;
ranges = <0 0x0 0x2e000000 0x8000>;
- cpu_scp_lpri: scp-shmem@0 {
+ cpu_scp_lpri: scp-sram@0 {
compatible = "arm,juno-scp-shmem";
reg = <0x0 0x200>;
};
- cpu_scp_hpri: scp-shmem@200 {
+ cpu_scp_hpri: scp-sram@200 {
compatible = "arm,juno-scp-shmem";
reg = <0x200 0x200>;
};
--
2.17.1
^ permalink raw reply related [flat|nested] 69+ messages in thread* [PATCH 16/16] arm64: dts: juno: Fix SCPI shared mem node name
@ 2020-05-05 16:52 ` Andre Przywara
0 siblings, 0 replies; 69+ messages in thread
From: Andre Przywara @ 2020-05-05 16:52 UTC (permalink / raw)
To: Rob Herring, Liviu Dudau, Sudeep Holla, Lorenzo Pieralisi
Cc: Mark Rutland, devicetree, linux-arm-kernel
The SRAM DT binding requires child nodes to use a certain node name
scheme.
Change the naming from scp-shmem to scp-sram to comply with that.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
---
arch/arm64/boot/dts/arm/juno-base.dtsi | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/arm64/boot/dts/arm/juno-base.dtsi b/arch/arm64/boot/dts/arm/juno-base.dtsi
index 9a2a8d23fd1e..547db919ccc3 100644
--- a/arch/arm64/boot/dts/arm/juno-base.dtsi
+++ b/arch/arm64/boot/dts/arm/juno-base.dtsi
@@ -521,12 +521,12 @@
#size-cells = <1>;
ranges = <0 0x0 0x2e000000 0x8000>;
- cpu_scp_lpri: scp-shmem@0 {
+ cpu_scp_lpri: scp-sram@0 {
compatible = "arm,juno-scp-shmem";
reg = <0x0 0x200>;
};
- cpu_scp_hpri: scp-shmem@200 {
+ cpu_scp_hpri: scp-sram@200 {
compatible = "arm,juno-scp-shmem";
reg = <0x200 0x200>;
};
--
2.17.1
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