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From: Chao Hao <chao.hao@mediatek.com>
To: Joerg Roedel <joro@8bytes.org>, Rob Herring <robh+dt@kernel.org>,
	Matthias Brugger <matthias.bgg@gmail.com>
Cc: <iommu@lists.linux-foundation.org>, <devicetree@vger.kernel.org>,
	<linux-kernel@vger.kernel.org>,
	<linux-arm-kernel@lists.infradead.org>,
	<linux-mediatek@lists.infradead.org>, <wsd_upstream@mediatek.com>,
	Chao Hao <chao.hao@mediatek.com>, Yong Wu <yong.wu@mediatek.com>,
	FY Yang <fy.yang@mediatek.com>, Jun Yan <jun.yan@mediatek.com>
Subject: [PATCH v3 00/07] MT6779 IOMMU SUPPORT
Date: Sat, 9 May 2020 16:36:47 +0800	[thread overview]
Message-ID: <20200509083654.5178-1-chao.hao@mediatek.com> (raw)

This patchset adds mt6779 iommu support.

mt6779 has two iommus, they are MM_IOMMU(M4U) and APU_IOMMU which used ARM Short-Descriptor translation format.
The mt6779's MM_IOMMU-SMI and APU_IOMMU HW diagram is as below, it is only a brief diagram:

                             EMI
			      |
	   --------------------------------------
	   |                                    |
       MM_IOMMU                            APU_IOMMU
           |                                    |
       SMI_COMMOM-----------                 APU_BUS
           |                |                   |
      SMI_LARB(0~11)        |                   |
           |                |                   |
           |                |             --------------
           |                |             |     |      |
    Multimedia engine      CCU           VPU   MDLA   EMDA

All the connections are hardware fixed, software can not adjust it.

Compared with mt8183, SMI_BUS_ID width has changed from 10 to 12. SMI Larb number is described in bit[11:7],
Port number is described in bit[6:2]. In addition, there are some registers has changed in mt6779, so we need
to redefine and reuse them.

The patchset only used MM_IOMMU, so we only add MM_IOMMU basic function, such as smi_larb port definition, registers
definition and hardware initialization.

change notes:
 v3:
  1. Rebase on v5.7-rc1.
  2. Remove unused port definition,ex:APU and CCU port in mt6779-larb-port.h.
  3. Remove "change single domain to multiple domain" part(from PATCH v2 09/19 to PATCH v2 19/19).
  4. Redesign mt6779 basic part
   (1)Add some register definition and reuse them.
   (2)Redesign smi larb bus ID to analyze IOMMU translation fault.
   (3)Only init MM_IOMMU and not use APU_IOMMU.

 v2:
  1. Rebase on v5.5-rc1.
  2. Delete M4U_PORT_UNKNOWN define because of not use it.
  3. Correct coding format.
  4. Rename offset=0x48 register.
  5. Split "iommu/mediatek: Add mt6779 IOMMU basic support(patch v1)" to several patches(patch v2).

  http://lists.infradead.org/pipermail/linux-mediatek/2020-January/026131.html

 v1:
  http://lists.infradead.org/pipermail/linux-mediatek/2019-November/024567.html

Chao Hao (7):
  dt-bindings: mediatek: Add bindings for MT6779
  iommu/mediatek: Rename the register STANDARD_AXI_MODE(0x48) to
                  MISC_CTRL
  iommu/mediatek: Disable STANDARD_AXI_MODE in MISC_CTRL
  iommu/mediatek: Move inv_sel_reg into the plat_data
  iommu/mediatek: Add sub_comm id in translation fault
  iommu/mediatek: Add REG_MMU_WR_LEN definition preparing for mt6779
  iommu/mediatek: Add mt6779 basic support

 .../bindings/iommu/mediatek,iommu.txt         |   2 +
 drivers/iommu/mtk_iommu.c                     |  77 +++++--
 drivers/iommu/mtk_iommu.h                     |  10 +-
 include/dt-bindings/memory/mt6779-larb-port.h | 206 ++++++++++++++++++
 4 files changed, 273 insertions(+), 22 deletions(-)

--
2.18.0

WARNING: multiple messages have this Message-ID (diff)
From: Chao Hao <chao.hao@mediatek.com>
To: Joerg Roedel <joro@8bytes.org>, Rob Herring <robh+dt@kernel.org>,
	Matthias Brugger <matthias.bgg@gmail.com>
Cc: devicetree@vger.kernel.org, FY Yang <fy.yang@mediatek.com>,
	wsd_upstream@mediatek.com, linux-kernel@vger.kernel.org,
	Chao Hao <chao.hao@mediatek.com>,
	iommu@lists.linux-foundation.org,
	linux-mediatek@lists.infradead.org,
	Jun Yan <jun.yan@mediatek.com>,
	linux-arm-kernel@lists.infradead.org
Subject: [PATCH v3 00/07] MT6779 IOMMU SUPPORT
Date: Sat, 9 May 2020 16:36:47 +0800	[thread overview]
Message-ID: <20200509083654.5178-1-chao.hao@mediatek.com> (raw)

This patchset adds mt6779 iommu support.

mt6779 has two iommus, they are MM_IOMMU(M4U) and APU_IOMMU which used ARM Short-Descriptor translation format.
The mt6779's MM_IOMMU-SMI and APU_IOMMU HW diagram is as below, it is only a brief diagram:

                             EMI
			      |
	   --------------------------------------
	   |                                    |
       MM_IOMMU                            APU_IOMMU
           |                                    |
       SMI_COMMOM-----------                 APU_BUS
           |                |                   |
      SMI_LARB(0~11)        |                   |
           |                |                   |
           |                |             --------------
           |                |             |     |      |
    Multimedia engine      CCU           VPU   MDLA   EMDA

All the connections are hardware fixed, software can not adjust it.

Compared with mt8183, SMI_BUS_ID width has changed from 10 to 12. SMI Larb number is described in bit[11:7],
Port number is described in bit[6:2]. In addition, there are some registers has changed in mt6779, so we need
to redefine and reuse them.

The patchset only used MM_IOMMU, so we only add MM_IOMMU basic function, such as smi_larb port definition, registers
definition and hardware initialization.

change notes:
 v3:
  1. Rebase on v5.7-rc1.
  2. Remove unused port definition,ex:APU and CCU port in mt6779-larb-port.h.
  3. Remove "change single domain to multiple domain" part(from PATCH v2 09/19 to PATCH v2 19/19).
  4. Redesign mt6779 basic part
   (1)Add some register definition and reuse them.
   (2)Redesign smi larb bus ID to analyze IOMMU translation fault.
   (3)Only init MM_IOMMU and not use APU_IOMMU.

 v2:
  1. Rebase on v5.5-rc1.
  2. Delete M4U_PORT_UNKNOWN define because of not use it.
  3. Correct coding format.
  4. Rename offset=0x48 register.
  5. Split "iommu/mediatek: Add mt6779 IOMMU basic support(patch v1)" to several patches(patch v2).

  http://lists.infradead.org/pipermail/linux-mediatek/2020-January/026131.html

 v1:
  http://lists.infradead.org/pipermail/linux-mediatek/2019-November/024567.html

Chao Hao (7):
  dt-bindings: mediatek: Add bindings for MT6779
  iommu/mediatek: Rename the register STANDARD_AXI_MODE(0x48) to
                  MISC_CTRL
  iommu/mediatek: Disable STANDARD_AXI_MODE in MISC_CTRL
  iommu/mediatek: Move inv_sel_reg into the plat_data
  iommu/mediatek: Add sub_comm id in translation fault
  iommu/mediatek: Add REG_MMU_WR_LEN definition preparing for mt6779
  iommu/mediatek: Add mt6779 basic support

 .../bindings/iommu/mediatek,iommu.txt         |   2 +
 drivers/iommu/mtk_iommu.c                     |  77 +++++--
 drivers/iommu/mtk_iommu.h                     |  10 +-
 include/dt-bindings/memory/mt6779-larb-port.h | 206 ++++++++++++++++++
 4 files changed, 273 insertions(+), 22 deletions(-)

--
2.18.0
_______________________________________________
iommu mailing list
iommu@lists.linux-foundation.org
https://lists.linuxfoundation.org/mailman/listinfo/iommu

WARNING: multiple messages have this Message-ID (diff)
From: Chao Hao <chao.hao@mediatek.com>
To: Joerg Roedel <joro@8bytes.org>, Rob Herring <robh+dt@kernel.org>,
	Matthias Brugger <matthias.bgg@gmail.com>
Cc: devicetree@vger.kernel.org, FY Yang <fy.yang@mediatek.com>,
	wsd_upstream@mediatek.com, linux-kernel@vger.kernel.org,
	Chao Hao <chao.hao@mediatek.com>,
	iommu@lists.linux-foundation.org,
	linux-mediatek@lists.infradead.org,
	Yong Wu <yong.wu@mediatek.com>, Jun Yan <jun.yan@mediatek.com>,
	linux-arm-kernel@lists.infradead.org
Subject: [PATCH v3 00/07] MT6779 IOMMU SUPPORT
Date: Sat, 9 May 2020 16:36:47 +0800	[thread overview]
Message-ID: <20200509083654.5178-1-chao.hao@mediatek.com> (raw)

This patchset adds mt6779 iommu support.

mt6779 has two iommus, they are MM_IOMMU(M4U) and APU_IOMMU which used ARM Short-Descriptor translation format.
The mt6779's MM_IOMMU-SMI and APU_IOMMU HW diagram is as below, it is only a brief diagram:

                             EMI
			      |
	   --------------------------------------
	   |                                    |
       MM_IOMMU                            APU_IOMMU
           |                                    |
       SMI_COMMOM-----------                 APU_BUS
           |                |                   |
      SMI_LARB(0~11)        |                   |
           |                |                   |
           |                |             --------------
           |                |             |     |      |
    Multimedia engine      CCU           VPU   MDLA   EMDA

All the connections are hardware fixed, software can not adjust it.

Compared with mt8183, SMI_BUS_ID width has changed from 10 to 12. SMI Larb number is described in bit[11:7],
Port number is described in bit[6:2]. In addition, there are some registers has changed in mt6779, so we need
to redefine and reuse them.

The patchset only used MM_IOMMU, so we only add MM_IOMMU basic function, such as smi_larb port definition, registers
definition and hardware initialization.

change notes:
 v3:
  1. Rebase on v5.7-rc1.
  2. Remove unused port definition,ex:APU and CCU port in mt6779-larb-port.h.
  3. Remove "change single domain to multiple domain" part(from PATCH v2 09/19 to PATCH v2 19/19).
  4. Redesign mt6779 basic part
   (1)Add some register definition and reuse them.
   (2)Redesign smi larb bus ID to analyze IOMMU translation fault.
   (3)Only init MM_IOMMU and not use APU_IOMMU.

 v2:
  1. Rebase on v5.5-rc1.
  2. Delete M4U_PORT_UNKNOWN define because of not use it.
  3. Correct coding format.
  4. Rename offset=0x48 register.
  5. Split "iommu/mediatek: Add mt6779 IOMMU basic support(patch v1)" to several patches(patch v2).

  http://lists.infradead.org/pipermail/linux-mediatek/2020-January/026131.html

 v1:
  http://lists.infradead.org/pipermail/linux-mediatek/2019-November/024567.html

Chao Hao (7):
  dt-bindings: mediatek: Add bindings for MT6779
  iommu/mediatek: Rename the register STANDARD_AXI_MODE(0x48) to
                  MISC_CTRL
  iommu/mediatek: Disable STANDARD_AXI_MODE in MISC_CTRL
  iommu/mediatek: Move inv_sel_reg into the plat_data
  iommu/mediatek: Add sub_comm id in translation fault
  iommu/mediatek: Add REG_MMU_WR_LEN definition preparing for mt6779
  iommu/mediatek: Add mt6779 basic support

 .../bindings/iommu/mediatek,iommu.txt         |   2 +
 drivers/iommu/mtk_iommu.c                     |  77 +++++--
 drivers/iommu/mtk_iommu.h                     |  10 +-
 include/dt-bindings/memory/mt6779-larb-port.h | 206 ++++++++++++++++++
 4 files changed, 273 insertions(+), 22 deletions(-)

--
2.18.0
_______________________________________________
Linux-mediatek mailing list
Linux-mediatek@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-mediatek

WARNING: multiple messages have this Message-ID (diff)
From: Chao Hao <chao.hao@mediatek.com>
To: Joerg Roedel <joro@8bytes.org>, Rob Herring <robh+dt@kernel.org>,
	Matthias Brugger <matthias.bgg@gmail.com>
Cc: devicetree@vger.kernel.org, FY Yang <fy.yang@mediatek.com>,
	wsd_upstream@mediatek.com, linux-kernel@vger.kernel.org,
	Chao Hao <chao.hao@mediatek.com>,
	iommu@lists.linux-foundation.org,
	linux-mediatek@lists.infradead.org,
	Yong Wu <yong.wu@mediatek.com>, Jun Yan <jun.yan@mediatek.com>,
	linux-arm-kernel@lists.infradead.org
Subject: [PATCH v3 00/07] MT6779 IOMMU SUPPORT
Date: Sat, 9 May 2020 16:36:47 +0800	[thread overview]
Message-ID: <20200509083654.5178-1-chao.hao@mediatek.com> (raw)

This patchset adds mt6779 iommu support.

mt6779 has two iommus, they are MM_IOMMU(M4U) and APU_IOMMU which used ARM Short-Descriptor translation format.
The mt6779's MM_IOMMU-SMI and APU_IOMMU HW diagram is as below, it is only a brief diagram:

                             EMI
			      |
	   --------------------------------------
	   |                                    |
       MM_IOMMU                            APU_IOMMU
           |                                    |
       SMI_COMMOM-----------                 APU_BUS
           |                |                   |
      SMI_LARB(0~11)        |                   |
           |                |                   |
           |                |             --------------
           |                |             |     |      |
    Multimedia engine      CCU           VPU   MDLA   EMDA

All the connections are hardware fixed, software can not adjust it.

Compared with mt8183, SMI_BUS_ID width has changed from 10 to 12. SMI Larb number is described in bit[11:7],
Port number is described in bit[6:2]. In addition, there are some registers has changed in mt6779, so we need
to redefine and reuse them.

The patchset only used MM_IOMMU, so we only add MM_IOMMU basic function, such as smi_larb port definition, registers
definition and hardware initialization.

change notes:
 v3:
  1. Rebase on v5.7-rc1.
  2. Remove unused port definition,ex:APU and CCU port in mt6779-larb-port.h.
  3. Remove "change single domain to multiple domain" part(from PATCH v2 09/19 to PATCH v2 19/19).
  4. Redesign mt6779 basic part
   (1)Add some register definition and reuse them.
   (2)Redesign smi larb bus ID to analyze IOMMU translation fault.
   (3)Only init MM_IOMMU and not use APU_IOMMU.

 v2:
  1. Rebase on v5.5-rc1.
  2. Delete M4U_PORT_UNKNOWN define because of not use it.
  3. Correct coding format.
  4. Rename offset=0x48 register.
  5. Split "iommu/mediatek: Add mt6779 IOMMU basic support(patch v1)" to several patches(patch v2).

  http://lists.infradead.org/pipermail/linux-mediatek/2020-January/026131.html

 v1:
  http://lists.infradead.org/pipermail/linux-mediatek/2019-November/024567.html

Chao Hao (7):
  dt-bindings: mediatek: Add bindings for MT6779
  iommu/mediatek: Rename the register STANDARD_AXI_MODE(0x48) to
                  MISC_CTRL
  iommu/mediatek: Disable STANDARD_AXI_MODE in MISC_CTRL
  iommu/mediatek: Move inv_sel_reg into the plat_data
  iommu/mediatek: Add sub_comm id in translation fault
  iommu/mediatek: Add REG_MMU_WR_LEN definition preparing for mt6779
  iommu/mediatek: Add mt6779 basic support

 .../bindings/iommu/mediatek,iommu.txt         |   2 +
 drivers/iommu/mtk_iommu.c                     |  77 +++++--
 drivers/iommu/mtk_iommu.h                     |  10 +-
 include/dt-bindings/memory/mt6779-larb-port.h | 206 ++++++++++++++++++
 4 files changed, 273 insertions(+), 22 deletions(-)

--
2.18.0
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

             reply	other threads:[~2020-05-09  8:40 UTC|newest]

Thread overview: 56+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-05-09  8:36 Chao Hao [this message]
2020-05-09  8:36 ` [PATCH v3 00/07] MT6779 IOMMU SUPPORT Chao Hao
2020-05-09  8:36 ` Chao Hao
2020-05-09  8:36 ` Chao Hao
2020-05-09  8:36 ` [PATCH v3 1/7] dt-bindings: mediatek: Add bindings for MT6779 Chao Hao
2020-05-09  8:36   ` Chao Hao
2020-05-09  8:36   ` Chao Hao
2020-05-09  8:36   ` Chao Hao
2020-05-09  8:36 ` [PATCH v3 2/7] iommu/mediatek: Rename the register STANDARD_AXI_MODE(0x48) to MISC_CTRL Chao Hao
2020-05-09  8:36   ` Chao Hao
2020-05-09  8:36   ` Chao Hao
2020-05-09  8:36   ` Chao Hao
2020-05-25  6:11   ` Yong Wu
2020-05-25  6:11     ` Yong Wu
2020-05-25  6:11     ` Yong Wu
2020-05-25  6:11     ` Yong Wu
2020-05-09  8:36 ` [PATCH v3 3/7] iommu/mediatek: Disable STANDARD_AXI_MODE in MISC_CTRL Chao Hao
2020-05-09  8:36   ` Chao Hao
2020-05-09  8:36   ` Chao Hao
2020-05-09  8:36   ` Chao Hao
2020-05-25  6:14   ` Yong Wu
2020-05-25  6:14     ` Yong Wu
2020-05-25  6:14     ` Yong Wu
2020-05-25  6:14     ` Yong Wu
2020-06-16  6:10     ` chao hao
2020-06-16  6:10       ` chao hao
2020-06-16  6:10       ` chao hao
2020-06-16  6:10       ` chao hao
2020-05-09  8:36 ` [PATCH v3 4/7] iommu/mediatek: Move inv_sel_reg into the plat_data Chao Hao
2020-05-09  8:36   ` Chao Hao
2020-05-09  8:36   ` Chao Hao
2020-05-09  8:36   ` Chao Hao
2020-05-25  6:22   ` Yong Wu
2020-05-25  6:22     ` Yong Wu
2020-05-25  6:22     ` Yong Wu
2020-05-25  6:22     ` Yong Wu
2020-05-09  8:36 ` [PATCH v3 5/7] iommu/mediatek: Add sub_comm id in translation fault Chao Hao
2020-05-09  8:36   ` Chao Hao
2020-05-09  8:36   ` Chao Hao
2020-05-09  8:36   ` Chao Hao
2020-05-25  6:31   ` Yong Wu
2020-05-25  6:31     ` Yong Wu
2020-05-25  6:31     ` Yong Wu
2020-05-25  6:31     ` Yong Wu
2020-05-09  8:36 ` [PATCH v3 6/7] iommu/mediatek: Add REG_MMU_WR_LEN definition preparing for mt6779 Chao Hao
2020-05-09  8:36   ` Chao Hao
2020-05-09  8:36   ` Chao Hao
2020-05-09  8:36   ` Chao Hao
2020-05-09  8:36 ` [PATCH v3 7/7] iommu/mediatek: Add mt6779 basic support Chao Hao
2020-05-09  8:36   ` Chao Hao
2020-05-09  8:36   ` Chao Hao
2020-05-09  8:36   ` Chao Hao
2020-05-25  6:54   ` Yong Wu
2020-05-25  6:54     ` Yong Wu
2020-05-25  6:54     ` Yong Wu
2020-05-25  6:54     ` Yong Wu

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