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From: Jordan Crouse <jcrouse@codeaurora.org>
To: Jonathan Marek <jonathan@marek.ca>
Cc: freedreno@lists.freedesktop.org, David Airlie <airlied@linux.ie>,
	"open list:DRM DRIVER FOR MSM ADRENO GPU" 
	<linux-arm-msm@vger.kernel.org>,
	open list <linux-kernel@vger.kernel.org>,
	"open list:DRM DRIVER FOR MSM ADRENO GPU" 
	<dri-devel@lists.freedesktop.org>,
	Rob Clark <robdclark@gmail.com>, Daniel Vetter <daniel@ffwll.ch>,
	Sean Paul <sean@poorly.run>
Subject: Re: [Freedreno] [PATCH v3 1/9] drm/msm: add msm_gem_get_and_pin_iova_range
Date: Mon, 18 May 2020 08:42:43 -0600	[thread overview]
Message-ID: <20200518144243.GC3915@jcrouse1-lnx.qualcomm.com> (raw)
In-Reply-To: <20200423210946.28867-2-jonathan@marek.ca>

On Thu, Apr 23, 2020 at 05:09:13PM -0400, Jonathan Marek wrote:
> This function allows pinning iova to a specific page range (for a6xx GMU).

Reviewed-by: Jordan Crouse <jcrouse@codeaurora.org>

> Signed-off-by: Jonathan Marek <jonathan@marek.ca>
> ---
>  drivers/gpu/drm/msm/msm_drv.h     |  6 +++++-
>  drivers/gpu/drm/msm/msm_gem.c     | 28 +++++++++++++++++++++-------
>  drivers/gpu/drm/msm/msm_gem_vma.c |  6 ++++--
>  3 files changed, 30 insertions(+), 10 deletions(-)
> 
> diff --git a/drivers/gpu/drm/msm/msm_drv.h b/drivers/gpu/drm/msm/msm_drv.h
> index 194d900a460e..966fd9068c94 100644
> --- a/drivers/gpu/drm/msm/msm_drv.h
> +++ b/drivers/gpu/drm/msm/msm_drv.h
> @@ -236,7 +236,8 @@ int msm_crtc_enable_vblank(struct drm_crtc *crtc);
>  void msm_crtc_disable_vblank(struct drm_crtc *crtc);
>  
>  int msm_gem_init_vma(struct msm_gem_address_space *aspace,
> -		struct msm_gem_vma *vma, int npages);
> +		struct msm_gem_vma *vma, int npages,
> +		u64 range_start, u64 range_end);
>  void msm_gem_purge_vma(struct msm_gem_address_space *aspace,
>  		struct msm_gem_vma *vma);
>  void msm_gem_unmap_vma(struct msm_gem_address_space *aspace,
> @@ -276,6 +277,9 @@ vm_fault_t msm_gem_fault(struct vm_fault *vmf);
>  uint64_t msm_gem_mmap_offset(struct drm_gem_object *obj);
>  int msm_gem_get_iova(struct drm_gem_object *obj,
>  		struct msm_gem_address_space *aspace, uint64_t *iova);
> +int msm_gem_get_and_pin_iova_range(struct drm_gem_object *obj,
> +		struct msm_gem_address_space *aspace, uint64_t *iova,
> +		u64 range_start, u64 range_end);
>  int msm_gem_get_and_pin_iova(struct drm_gem_object *obj,
>  		struct msm_gem_address_space *aspace, uint64_t *iova);
>  uint64_t msm_gem_iova(struct drm_gem_object *obj,
> diff --git a/drivers/gpu/drm/msm/msm_gem.c b/drivers/gpu/drm/msm/msm_gem.c
> index 5a6a79fbc9d6..d8f56a34c117 100644
> --- a/drivers/gpu/drm/msm/msm_gem.c
> +++ b/drivers/gpu/drm/msm/msm_gem.c
> @@ -389,7 +389,8 @@ put_iova(struct drm_gem_object *obj)
>  }
>  
>  static int msm_gem_get_iova_locked(struct drm_gem_object *obj,
> -		struct msm_gem_address_space *aspace, uint64_t *iova)
> +		struct msm_gem_address_space *aspace, uint64_t *iova,
> +		u64 range_start, u64 range_end)
>  {
>  	struct msm_gem_object *msm_obj = to_msm_bo(obj);
>  	struct msm_gem_vma *vma;
> @@ -404,7 +405,8 @@ static int msm_gem_get_iova_locked(struct drm_gem_object *obj,
>  		if (IS_ERR(vma))
>  			return PTR_ERR(vma);
>  
> -		ret = msm_gem_init_vma(aspace, vma, obj->size >> PAGE_SHIFT);
> +		ret = msm_gem_init_vma(aspace, vma, obj->size >> PAGE_SHIFT,
> +			range_start, range_end);
>  		if (ret) {
>  			del_vma(vma);
>  			return ret;
> @@ -443,9 +445,13 @@ static int msm_gem_pin_iova(struct drm_gem_object *obj,
>  			msm_obj->sgt, obj->size >> PAGE_SHIFT);
>  }
>  
> -/* get iova and pin it. Should have a matching put */
> -int msm_gem_get_and_pin_iova(struct drm_gem_object *obj,
> -		struct msm_gem_address_space *aspace, uint64_t *iova)
> +/*
> + * get iova and pin it. Should have a matching put
> + * limits iova to specified range (in pages)
> + */
> +int msm_gem_get_and_pin_iova_range(struct drm_gem_object *obj,
> +		struct msm_gem_address_space *aspace, uint64_t *iova,
> +		u64 range_start, u64 range_end)
>  {
>  	struct msm_gem_object *msm_obj = to_msm_bo(obj);
>  	u64 local;
> @@ -453,7 +459,8 @@ int msm_gem_get_and_pin_iova(struct drm_gem_object *obj,
>  
>  	mutex_lock(&msm_obj->lock);
>  
> -	ret = msm_gem_get_iova_locked(obj, aspace, &local);
> +	ret = msm_gem_get_iova_locked(obj, aspace, &local,
> +		range_start, range_end);
>  
>  	if (!ret)
>  		ret = msm_gem_pin_iova(obj, aspace);
> @@ -465,6 +472,13 @@ int msm_gem_get_and_pin_iova(struct drm_gem_object *obj,
>  	return ret;
>  }
>  
> +/* get iova and pin it. Should have a matching put */
> +int msm_gem_get_and_pin_iova(struct drm_gem_object *obj,
> +		struct msm_gem_address_space *aspace, uint64_t *iova)
> +{
> +	return msm_gem_get_and_pin_iova_range(obj, aspace, iova, 0, U64_MAX);
> +}
> +
>  /*
>   * Get an iova but don't pin it. Doesn't need a put because iovas are currently
>   * valid for the life of the object
> @@ -476,7 +490,7 @@ int msm_gem_get_iova(struct drm_gem_object *obj,
>  	int ret;
>  
>  	mutex_lock(&msm_obj->lock);
> -	ret = msm_gem_get_iova_locked(obj, aspace, iova);
> +	ret = msm_gem_get_iova_locked(obj, aspace, iova, 0, U64_MAX);
>  	mutex_unlock(&msm_obj->lock);
>  
>  	return ret;
> diff --git a/drivers/gpu/drm/msm/msm_gem_vma.c b/drivers/gpu/drm/msm/msm_gem_vma.c
> index 1af5354bcd46..407b7ab82818 100644
> --- a/drivers/gpu/drm/msm/msm_gem_vma.c
> +++ b/drivers/gpu/drm/msm/msm_gem_vma.c
> @@ -103,7 +103,8 @@ void msm_gem_close_vma(struct msm_gem_address_space *aspace,
>  
>  /* Initialize a new vma and allocate an iova for it */
>  int msm_gem_init_vma(struct msm_gem_address_space *aspace,
> -		struct msm_gem_vma *vma, int npages)
> +		struct msm_gem_vma *vma, int npages,
> +		u64 range_start, u64 range_end)
>  {
>  	int ret;
>  
> @@ -111,7 +112,8 @@ int msm_gem_init_vma(struct msm_gem_address_space *aspace,
>  		return -EBUSY;
>  
>  	spin_lock(&aspace->lock);
> -	ret = drm_mm_insert_node(&aspace->mm, &vma->node, npages);
> +	ret = drm_mm_insert_node_in_range(&aspace->mm, &vma->node, npages, 0,
> +		0, range_start, range_end, 0);
>  	spin_unlock(&aspace->lock);
>  
>  	if (ret)
> -- 
> 2.26.1
> 
> _______________________________________________
> Freedreno mailing list
> Freedreno@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/freedreno

-- 
The Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
a Linux Foundation Collaborative Project

WARNING: multiple messages have this Message-ID (diff)
From: Jordan Crouse <jcrouse@codeaurora.org>
To: Jonathan Marek <jonathan@marek.ca>
Cc: Sean Paul <sean@poorly.run>, David Airlie <airlied@linux.ie>,
	"open list:DRM DRIVER FOR MSM ADRENO GPU"
	<linux-arm-msm@vger.kernel.org>,
	open list <linux-kernel@vger.kernel.org>,
	"open list:DRM DRIVER FOR MSM ADRENO GPU"
	<dri-devel@lists.freedesktop.org>,
	freedreno@lists.freedesktop.org
Subject: Re: [Freedreno] [PATCH v3 1/9] drm/msm: add msm_gem_get_and_pin_iova_range
Date: Mon, 18 May 2020 08:42:43 -0600	[thread overview]
Message-ID: <20200518144243.GC3915@jcrouse1-lnx.qualcomm.com> (raw)
In-Reply-To: <20200423210946.28867-2-jonathan@marek.ca>

On Thu, Apr 23, 2020 at 05:09:13PM -0400, Jonathan Marek wrote:
> This function allows pinning iova to a specific page range (for a6xx GMU).

Reviewed-by: Jordan Crouse <jcrouse@codeaurora.org>

> Signed-off-by: Jonathan Marek <jonathan@marek.ca>
> ---
>  drivers/gpu/drm/msm/msm_drv.h     |  6 +++++-
>  drivers/gpu/drm/msm/msm_gem.c     | 28 +++++++++++++++++++++-------
>  drivers/gpu/drm/msm/msm_gem_vma.c |  6 ++++--
>  3 files changed, 30 insertions(+), 10 deletions(-)
> 
> diff --git a/drivers/gpu/drm/msm/msm_drv.h b/drivers/gpu/drm/msm/msm_drv.h
> index 194d900a460e..966fd9068c94 100644
> --- a/drivers/gpu/drm/msm/msm_drv.h
> +++ b/drivers/gpu/drm/msm/msm_drv.h
> @@ -236,7 +236,8 @@ int msm_crtc_enable_vblank(struct drm_crtc *crtc);
>  void msm_crtc_disable_vblank(struct drm_crtc *crtc);
>  
>  int msm_gem_init_vma(struct msm_gem_address_space *aspace,
> -		struct msm_gem_vma *vma, int npages);
> +		struct msm_gem_vma *vma, int npages,
> +		u64 range_start, u64 range_end);
>  void msm_gem_purge_vma(struct msm_gem_address_space *aspace,
>  		struct msm_gem_vma *vma);
>  void msm_gem_unmap_vma(struct msm_gem_address_space *aspace,
> @@ -276,6 +277,9 @@ vm_fault_t msm_gem_fault(struct vm_fault *vmf);
>  uint64_t msm_gem_mmap_offset(struct drm_gem_object *obj);
>  int msm_gem_get_iova(struct drm_gem_object *obj,
>  		struct msm_gem_address_space *aspace, uint64_t *iova);
> +int msm_gem_get_and_pin_iova_range(struct drm_gem_object *obj,
> +		struct msm_gem_address_space *aspace, uint64_t *iova,
> +		u64 range_start, u64 range_end);
>  int msm_gem_get_and_pin_iova(struct drm_gem_object *obj,
>  		struct msm_gem_address_space *aspace, uint64_t *iova);
>  uint64_t msm_gem_iova(struct drm_gem_object *obj,
> diff --git a/drivers/gpu/drm/msm/msm_gem.c b/drivers/gpu/drm/msm/msm_gem.c
> index 5a6a79fbc9d6..d8f56a34c117 100644
> --- a/drivers/gpu/drm/msm/msm_gem.c
> +++ b/drivers/gpu/drm/msm/msm_gem.c
> @@ -389,7 +389,8 @@ put_iova(struct drm_gem_object *obj)
>  }
>  
>  static int msm_gem_get_iova_locked(struct drm_gem_object *obj,
> -		struct msm_gem_address_space *aspace, uint64_t *iova)
> +		struct msm_gem_address_space *aspace, uint64_t *iova,
> +		u64 range_start, u64 range_end)
>  {
>  	struct msm_gem_object *msm_obj = to_msm_bo(obj);
>  	struct msm_gem_vma *vma;
> @@ -404,7 +405,8 @@ static int msm_gem_get_iova_locked(struct drm_gem_object *obj,
>  		if (IS_ERR(vma))
>  			return PTR_ERR(vma);
>  
> -		ret = msm_gem_init_vma(aspace, vma, obj->size >> PAGE_SHIFT);
> +		ret = msm_gem_init_vma(aspace, vma, obj->size >> PAGE_SHIFT,
> +			range_start, range_end);
>  		if (ret) {
>  			del_vma(vma);
>  			return ret;
> @@ -443,9 +445,13 @@ static int msm_gem_pin_iova(struct drm_gem_object *obj,
>  			msm_obj->sgt, obj->size >> PAGE_SHIFT);
>  }
>  
> -/* get iova and pin it. Should have a matching put */
> -int msm_gem_get_and_pin_iova(struct drm_gem_object *obj,
> -		struct msm_gem_address_space *aspace, uint64_t *iova)
> +/*
> + * get iova and pin it. Should have a matching put
> + * limits iova to specified range (in pages)
> + */
> +int msm_gem_get_and_pin_iova_range(struct drm_gem_object *obj,
> +		struct msm_gem_address_space *aspace, uint64_t *iova,
> +		u64 range_start, u64 range_end)
>  {
>  	struct msm_gem_object *msm_obj = to_msm_bo(obj);
>  	u64 local;
> @@ -453,7 +459,8 @@ int msm_gem_get_and_pin_iova(struct drm_gem_object *obj,
>  
>  	mutex_lock(&msm_obj->lock);
>  
> -	ret = msm_gem_get_iova_locked(obj, aspace, &local);
> +	ret = msm_gem_get_iova_locked(obj, aspace, &local,
> +		range_start, range_end);
>  
>  	if (!ret)
>  		ret = msm_gem_pin_iova(obj, aspace);
> @@ -465,6 +472,13 @@ int msm_gem_get_and_pin_iova(struct drm_gem_object *obj,
>  	return ret;
>  }
>  
> +/* get iova and pin it. Should have a matching put */
> +int msm_gem_get_and_pin_iova(struct drm_gem_object *obj,
> +		struct msm_gem_address_space *aspace, uint64_t *iova)
> +{
> +	return msm_gem_get_and_pin_iova_range(obj, aspace, iova, 0, U64_MAX);
> +}
> +
>  /*
>   * Get an iova but don't pin it. Doesn't need a put because iovas are currently
>   * valid for the life of the object
> @@ -476,7 +490,7 @@ int msm_gem_get_iova(struct drm_gem_object *obj,
>  	int ret;
>  
>  	mutex_lock(&msm_obj->lock);
> -	ret = msm_gem_get_iova_locked(obj, aspace, iova);
> +	ret = msm_gem_get_iova_locked(obj, aspace, iova, 0, U64_MAX);
>  	mutex_unlock(&msm_obj->lock);
>  
>  	return ret;
> diff --git a/drivers/gpu/drm/msm/msm_gem_vma.c b/drivers/gpu/drm/msm/msm_gem_vma.c
> index 1af5354bcd46..407b7ab82818 100644
> --- a/drivers/gpu/drm/msm/msm_gem_vma.c
> +++ b/drivers/gpu/drm/msm/msm_gem_vma.c
> @@ -103,7 +103,8 @@ void msm_gem_close_vma(struct msm_gem_address_space *aspace,
>  
>  /* Initialize a new vma and allocate an iova for it */
>  int msm_gem_init_vma(struct msm_gem_address_space *aspace,
> -		struct msm_gem_vma *vma, int npages)
> +		struct msm_gem_vma *vma, int npages,
> +		u64 range_start, u64 range_end)
>  {
>  	int ret;
>  
> @@ -111,7 +112,8 @@ int msm_gem_init_vma(struct msm_gem_address_space *aspace,
>  		return -EBUSY;
>  
>  	spin_lock(&aspace->lock);
> -	ret = drm_mm_insert_node(&aspace->mm, &vma->node, npages);
> +	ret = drm_mm_insert_node_in_range(&aspace->mm, &vma->node, npages, 0,
> +		0, range_start, range_end, 0);
>  	spin_unlock(&aspace->lock);
>  
>  	if (ret)
> -- 
> 2.26.1
> 
> _______________________________________________
> Freedreno mailing list
> Freedreno@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/freedreno

-- 
The Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
a Linux Foundation Collaborative Project
_______________________________________________
dri-devel mailing list
dri-devel@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/dri-devel

  reply	other threads:[~2020-05-18 14:42 UTC|newest]

Thread overview: 28+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-04-23 21:09 [PATCH v3 0/9] Add support for A640 and A650 Jonathan Marek
2020-04-23 21:09 ` Jonathan Marek
2020-04-23 21:09 ` [PATCH v3 1/9] drm/msm: add msm_gem_get_and_pin_iova_range Jonathan Marek
2020-04-23 21:09   ` Jonathan Marek
2020-05-18 14:42   ` Jordan Crouse [this message]
2020-05-18 14:42     ` [Freedreno] " Jordan Crouse
2020-04-23 21:09 ` [PATCH v3 2/9] drm/msm: add internal MSM_BO_MAP_PRIV flag Jonathan Marek
2020-04-23 21:09   ` Jonathan Marek
2020-04-23 21:09 ` [PATCH v3 3/9] drm/msm/a6xx: use msm_gem for GMU memory objects Jonathan Marek
2020-04-23 21:09   ` Jonathan Marek
2020-04-23 21:09 ` [PATCH v3 4/9] drm/msm/a6xx: add A640/A650 to gpulist Jonathan Marek
2020-04-23 21:09   ` Jonathan Marek
2020-04-23 21:09 ` [PATCH v3 5/9] drm/msm/a6xx: HFI v2 for A640 and A650 Jonathan Marek
2020-04-23 21:09   ` Jonathan Marek
2020-04-23 21:09 ` [PATCH v3 6/9] drm/msm/a6xx: A640/A650 GMU firmware path Jonathan Marek
2020-04-23 21:09   ` Jonathan Marek
2020-05-18 14:44   ` Jordan Crouse
2020-05-18 14:44     ` Jordan Crouse
2020-04-23 21:09 ` [PATCH v3 7/9] drm/msm/a6xx: update pdc/rscc GMU registers for A640/A650 Jonathan Marek
2020-04-23 21:09   ` Jonathan Marek
2020-05-18 14:46   ` Jordan Crouse
2020-05-18 14:46     ` Jordan Crouse
2020-04-23 21:09 ` [PATCH v3 8/9] drm/msm/a6xx: enable GMU log Jonathan Marek
2020-04-23 21:09   ` Jonathan Marek
2020-04-23 21:09 ` [PATCH v3 9/9] drm/msm/a6xx: update a6xx_hw_init for A640 and A650 Jonathan Marek
2020-04-23 21:09   ` Jonathan Marek
2020-05-18 14:47   ` Jordan Crouse
2020-05-18 14:47     ` Jordan Crouse

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