[PULL 00/57] target-arm queue

[Peter Maydell <peter.maydell@linaro.org>]

Mostly this is RTH's memtag series, but there are also some cleanups
from Philippe.

thanks
-- PMM

The following changes since commit 10f7ffabf9c507fc02382b89912003b1c43c3231:

  Merge remote-tracking branch 'remotes/mcayland/tags/qemu-macppc-20200626' into staging (2020-06-26 12:14:18 +0100)

are available in the Git repository at:

  https://git.linaro.org/people/pmaydell/qemu-arm.git tags/pull-target-arm-20200626

for you to fetch changes up to c7459633baa71d1781fde4a245d6ec9ce2f008cf:

  target/arm: Enable MTE (2020-06-26 14:32:24 +0100)

----------------------------------------------------------------
target-arm queue:
 * hw/arm/aspeed: improve QOM usage
 * hw/misc/pca9552: trace GPIO change events
 * target/arm: Implement ARMv8.5-MemTag for system emulation

----------------------------------------------------------------
Philippe Mathieu-Daudé (12):
      hw/arm/aspeed: Remove extraneous MemoryRegion object owner
      hw/arm/aspeed: Rename AspeedBoardState as AspeedMachineState
      hw/arm/aspeed: QOM'ify AspeedMachineState
      hw/i2c/core: Add i2c_try_create_slave() and i2c_realize_and_unref()
      hw/misc/pca9552: Rename 'nr_leds' as 'pin_count'
      hw/misc/pca9552: Rename generic code as pca955x
      hw/misc/pca9552: Add generic PCA955xClass, parent of TYPE_PCA9552
      hw/misc/pca9552: Add a 'description' property for debugging purpose
      hw/misc/pca9552: Trace GPIO High/Low events
      hw/arm/aspeed: Describe each PCA9552 device
      hw/misc/pca9552: Trace GPIO change events
      hw/misc/pca9552: Model qdev output GPIOs

Richard Henderson (45):
      target/arm: Add isar tests for mte
      target/arm: Improve masking of SCR RES0 bits
      target/arm: Add support for MTE to SCTLR_ELx
      target/arm: Add support for MTE to HCR_EL2 and SCR_EL3
      target/arm: Rename DISAS_UPDATE to DISAS_UPDATE_EXIT
      target/arm: Add DISAS_UPDATE_NOCHAIN
      target/arm: Add MTE system registers
      target/arm: Add MTE bits to tb_flags
      target/arm: Implement the IRG instruction
      target/arm: Revise decoding for disas_add_sub_imm
      target/arm: Implement the ADDG, SUBG instructions
      target/arm: Implement the GMI instruction
      target/arm: Implement the SUBP instruction
      target/arm: Define arm_cpu_do_unaligned_access for user-only
      target/arm: Implement LDG, STG, ST2G instructions
      target/arm: Implement the STGP instruction
      target/arm: Restrict the values of DCZID.BS under TCG
      target/arm: Simplify DC_ZVA
      target/arm: Implement the LDGM, STGM, STZGM instructions
      target/arm: Implement the access tag cache flushes
      target/arm: Move regime_el to internals.h
      target/arm: Move regime_tcr to internals.h
      target/arm: Add gen_mte_check1
      target/arm: Add gen_mte_checkN
      target/arm: Implement helper_mte_check1
      target/arm: Implement helper_mte_checkN
      target/arm: Add helper_mte_check_zva
      target/arm: Use mte_checkN for sve unpredicated loads
      target/arm: Use mte_checkN for sve unpredicated stores
      target/arm: Use mte_check1 for sve LD1R
      target/arm: Tidy trans_LD1R_zpri
      target/arm: Add arm_tlb_bti_gp
      target/arm: Add mte helpers for sve scalar + int loads
      target/arm: Add mte helpers for sve scalar + int stores
      target/arm: Add mte helpers for sve scalar + int ff/nf loads
      target/arm: Handle TBI for sve scalar + int memory ops
      target/arm: Add mte helpers for sve scatter/gather memory ops
      target/arm: Complete TBI clearing for user-only for SVE
      target/arm: Implement data cache set allocation tags
      target/arm: Set PSTATE.TCO on exception entry
      target/arm: Always pass cacheattr to get_phys_addr
      target/arm: Cache the Tagged bit for a page in MemTxAttrs
      target/arm: Create tagged ram when MTE is enabled
      target/arm: Add allocation tag storage for system mode
      target/arm: Enable MTE

 include/hw/arm/aspeed.h        |   12 +-
 include/hw/i2c/i2c.h           |    2 +
 include/hw/misc/pca9552.h      |   16 +-
 target/arm/cpu.h               |   50 +-
 target/arm/helper-a64.h        |   16 +
 target/arm/helper-sve.h        |  488 ++++++++++++++
 target/arm/helper.h            |    2 +
 target/arm/internals.h         |  153 ++++-
 target/arm/translate-a64.h     |    5 +
 target/arm/translate.h         |   23 +-
 hw/arm/aspeed.c                |   46 +-
 hw/arm/virt.c                  |   55 +-
 hw/i2c/core.c                  |   18 +-
 hw/misc/pca9552.c              |  216 +++++--
 target/arm/cpu.c               |   81 ++-
 target/arm/cpu64.c             |    5 +
 target/arm/helper-a64.c        |   94 +--
 target/arm/helper.c            |  423 ++++++++++---
 target/arm/m_helper.c          |   11 +-
 target/arm/mte_helper.c        |  906 ++++++++++++++++++++++++++
 target/arm/op_helper.c         |   16 +
 target/arm/sve_helper.c        |  616 ++++++++++++++----
 target/arm/tlb_helper.c        |   13 +-
 target/arm/translate-a64.c     |  657 ++++++++++++++++---
 target/arm/translate-sve.c     | 1366 ++++++++++++++++++++++++++--------------
 target/arm/translate-vfp.inc.c |    4 +-
 target/arm/translate.c         |   16 +-
 hw/misc/trace-events           |    4 +
 target/arm/Makefile.objs       |    1 +
 29 files changed, 4391 insertions(+), 924 deletions(-)
 create mode 100644 target/arm/mte_helper.c