From: Peter Maydell <peter.maydell@linaro.org>
To: QEMU Developers <qemu-devel@nongnu.org>
Subject: Re: [PULL 00/57] target-arm queue
Date: Fri, 26 Jun 2020 19:56:51 +0100 [thread overview]
Message-ID: <CAFEAcA8Y1iWB++bahiRz38xevxy=UVx_j2phgjdGX0kS0Xzfqw@mail.gmail.com> (raw)
In-Reply-To: <20200626151424.30117-1-peter.maydell@linaro.org>
On Fri, 26 Jun 2020 at 16:14, Peter Maydell <peter.maydell@linaro.org> wrote:
>
> Mostly this is RTH's memtag series, but there are also some cleanups
> from Philippe.
>
> thanks
> -- PMM
>
> The following changes since commit 10f7ffabf9c507fc02382b89912003b1c43c3231:
>
> Merge remote-tracking branch 'remotes/mcayland/tags/qemu-macppc-20200626' into staging (2020-06-26 12:14:18 +0100)
>
> are available in the Git repository at:
>
> https://git.linaro.org/people/pmaydell/qemu-arm.git tags/pull-target-arm-20200626
>
> for you to fetch changes up to c7459633baa71d1781fde4a245d6ec9ce2f008cf:
>
> target/arm: Enable MTE (2020-06-26 14:32:24 +0100)
>
> ----------------------------------------------------------------
> target-arm queue:
> * hw/arm/aspeed: improve QOM usage
> * hw/misc/pca9552: trace GPIO change events
> * target/arm: Implement ARMv8.5-MemTag for system emulation
>
Applied, thanks.
Please update the changelog at https://wiki.qemu.org/ChangeLog/5.1
for any user-visible changes.
-- PMM
next prev parent reply other threads:[~2020-06-26 18:57 UTC|newest]
Thread overview: 64+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-06-26 15:13 [PULL 00/57] target-arm queue Peter Maydell
2020-06-26 15:13 ` [PULL 01/57] hw/arm/aspeed: Remove extraneous MemoryRegion object owner Peter Maydell
2020-06-26 15:13 ` [PULL 02/57] hw/arm/aspeed: Rename AspeedBoardState as AspeedMachineState Peter Maydell
2020-06-26 15:13 ` [PULL 03/57] hw/arm/aspeed: QOM'ify AspeedMachineState Peter Maydell
2020-06-26 15:13 ` [PULL 04/57] hw/i2c/core: Add i2c_try_create_slave() and i2c_realize_and_unref() Peter Maydell
2020-06-26 15:13 ` [PULL 05/57] hw/misc/pca9552: Rename 'nr_leds' as 'pin_count' Peter Maydell
2020-06-26 15:13 ` [PULL 06/57] hw/misc/pca9552: Rename generic code as pca955x Peter Maydell
2020-06-26 15:13 ` [PULL 07/57] hw/misc/pca9552: Add generic PCA955xClass, parent of TYPE_PCA9552 Peter Maydell
2020-06-26 15:13 ` [PULL 08/57] hw/misc/pca9552: Add a 'description' property for debugging purpose Peter Maydell
2020-06-26 15:13 ` [PULL 09/57] hw/misc/pca9552: Trace GPIO High/Low events Peter Maydell
2020-06-26 15:13 ` [PULL 10/57] hw/arm/aspeed: Describe each PCA9552 device Peter Maydell
2020-06-26 15:13 ` [PULL 11/57] hw/misc/pca9552: Trace GPIO change events Peter Maydell
2020-06-26 15:13 ` [PULL 12/57] hw/misc/pca9552: Model qdev output GPIOs Peter Maydell
2020-06-26 15:13 ` [PULL 13/57] target/arm: Add isar tests for mte Peter Maydell
2020-06-26 15:13 ` [PULL 14/57] target/arm: Improve masking of SCR RES0 bits Peter Maydell
2020-06-26 15:13 ` [PULL 15/57] target/arm: Add support for MTE to SCTLR_ELx Peter Maydell
2020-06-26 15:13 ` [PULL 16/57] target/arm: Add support for MTE to HCR_EL2 and SCR_EL3 Peter Maydell
2020-06-26 15:13 ` [PULL 17/57] target/arm: Rename DISAS_UPDATE to DISAS_UPDATE_EXIT Peter Maydell
2020-06-26 15:13 ` [PULL 18/57] target/arm: Add DISAS_UPDATE_NOCHAIN Peter Maydell
2020-06-26 15:13 ` [PULL 19/57] target/arm: Add MTE system registers Peter Maydell
2020-06-26 15:13 ` [PULL 20/57] target/arm: Add MTE bits to tb_flags Peter Maydell
2020-06-26 15:13 ` [PULL 21/57] target/arm: Implement the IRG instruction Peter Maydell
2020-06-26 15:13 ` [PULL 22/57] target/arm: Revise decoding for disas_add_sub_imm Peter Maydell
2020-06-26 15:13 ` [PULL 23/57] target/arm: Implement the ADDG, SUBG instructions Peter Maydell
2020-06-26 15:13 ` [PULL 24/57] target/arm: Implement the GMI instruction Peter Maydell
2020-06-26 15:13 ` [PULL 25/57] target/arm: Implement the SUBP instruction Peter Maydell
2020-06-26 15:13 ` [PULL 26/57] target/arm: Define arm_cpu_do_unaligned_access for user-only Peter Maydell
2020-06-26 15:13 ` [PULL 27/57] target/arm: Implement LDG, STG, ST2G instructions Peter Maydell
2020-06-26 15:13 ` [PULL 28/57] target/arm: Implement the STGP instruction Peter Maydell
2020-06-26 15:13 ` [PULL 29/57] target/arm: Restrict the values of DCZID.BS under TCG Peter Maydell
2020-06-26 15:13 ` [PULL 30/57] target/arm: Simplify DC_ZVA Peter Maydell
2020-06-26 15:13 ` [PULL 31/57] target/arm: Implement the LDGM, STGM, STZGM instructions Peter Maydell
2020-06-26 15:13 ` [PULL 32/57] target/arm: Implement the access tag cache flushes Peter Maydell
2020-06-26 15:14 ` [PULL 33/57] target/arm: Move regime_el to internals.h Peter Maydell
2020-06-26 15:14 ` [PULL 34/57] target/arm: Move regime_tcr " Peter Maydell
2020-06-26 15:14 ` [PULL 35/57] target/arm: Add gen_mte_check1 Peter Maydell
2020-06-26 15:14 ` [PULL 36/57] target/arm: Add gen_mte_checkN Peter Maydell
2020-06-26 15:14 ` [PULL 37/57] target/arm: Implement helper_mte_check1 Peter Maydell
2020-06-26 15:14 ` [PULL 38/57] target/arm: Implement helper_mte_checkN Peter Maydell
2020-06-26 15:14 ` [PULL 39/57] target/arm: Add helper_mte_check_zva Peter Maydell
2020-06-26 15:14 ` [PULL 40/57] target/arm: Use mte_checkN for sve unpredicated loads Peter Maydell
2020-06-26 15:14 ` [PULL 41/57] target/arm: Use mte_checkN for sve unpredicated stores Peter Maydell
2020-06-26 15:14 ` [PULL 42/57] target/arm: Use mte_check1 for sve LD1R Peter Maydell
2020-06-26 15:14 ` [PULL 43/57] target/arm: Tidy trans_LD1R_zpri Peter Maydell
2020-06-26 15:14 ` [PULL 44/57] target/arm: Add arm_tlb_bti_gp Peter Maydell
2020-06-26 15:14 ` [PULL 45/57] target/arm: Add mte helpers for sve scalar + int loads Peter Maydell
2020-06-26 15:14 ` [PULL 46/57] target/arm: Add mte helpers for sve scalar + int stores Peter Maydell
2020-06-26 15:14 ` [PULL 47/57] target/arm: Add mte helpers for sve scalar + int ff/nf loads Peter Maydell
2020-06-26 15:14 ` [PULL 48/57] target/arm: Handle TBI for sve scalar + int memory ops Peter Maydell
2020-06-26 15:14 ` [PULL 49/57] target/arm: Add mte helpers for sve scatter/gather " Peter Maydell
2020-06-27 21:44 ` Peter Maydell
2020-06-26 15:14 ` [PULL 50/57] target/arm: Complete TBI clearing for user-only for SVE Peter Maydell
2020-06-26 15:14 ` [PULL 51/57] target/arm: Implement data cache set allocation tags Peter Maydell
2020-06-26 15:14 ` [PULL 52/57] target/arm: Set PSTATE.TCO on exception entry Peter Maydell
2020-06-26 15:14 ` [PULL 53/57] target/arm: Always pass cacheattr to get_phys_addr Peter Maydell
2020-06-26 15:14 ` [PULL 54/57] target/arm: Cache the Tagged bit for a page in MemTxAttrs Peter Maydell
2020-06-26 15:14 ` [PULL 55/57] target/arm: Create tagged ram when MTE is enabled Peter Maydell
2020-06-26 15:14 ` [PULL 56/57] target/arm: Add allocation tag storage for system mode Peter Maydell
2020-06-26 15:14 ` [PULL 57/57] target/arm: Enable MTE Peter Maydell
2020-06-26 15:52 ` [PULL 00/57] target-arm queue no-reply
2020-06-26 16:20 ` no-reply
2020-06-26 18:56 ` Peter Maydell [this message]
2021-06-21 16:27 Peter Maydell
2021-06-21 17:25 ` no-reply
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